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SH7060 E8000 Emulator HS7060EDD81H User`s Manual

1. Rev 0 1 08 00 page 105 of 450 RENESAS 4 2 2 Specifying the SH7060 Operating Mode Specify the emulator operating mode by the following procedures Operations Display Message 1 Enter MODE C RET to specify the MODE C RET emulator operating mode 2 The message shown on the right is E8000 MD MD5 0 01 _ displayed 3 To select operating mode 9 of the E8000 MD MD5 0 01 9 RET SH7060 for example enter 9 RET 4 After the above entry has been CONFIGURATION STORE OK Y N Y completed the emulator asks if the RET mode settings should be stored in the flash memory To store the mode settings enter Y RET After that the emulator operates in the mode specified above whenever initiated If N RET is entered MODE command execution terminates without storing the mode settings and the emulator enters emulation command input wait state 5 When Y RET is entered the E8000 START E8000 system program automatically S START E8000 terminates and the message in the right i AOR MEMORY TOOL L SET LAN PARAMETER appears T START DIAGNOSTIC TEST S F L T _ 6 To re initiate the E8000 system S F L T S RET program enter S RET Rev 0 1 08 00 page 106 of 450 RENESAS 4 2 3 Allocating Standard Emulation Memory and Specifying Attributes To load the
2. PLEASE SELECT NO 1 10 L E Q X 1 RET IP ADDRESS 128 1 2 1 RET ET ID 128 1 2 0 RET PLEASE SELECT NO 1 10 L E Q X L RET O lt IP ADDRESS gt lt NET ID gt NO IP ADDRESS lt NET ID gt 01 128 1 2 1 128 1 2 0 PLEASE SELECT NO 1 10 L E Q X E RET LAN CONFIGURATION FILE WRITE OK Y N Y RET Rev 0 1 08 00 page 85 of 450 RENESAS SL SL SL Loads the system program Command Format Load SL RET Description e Load Loads the system program Example To load the system program FM gt SL RET SELECT LOAD No 1 PC or 2 WS 1 RET SELECT INTERFACE 1 RS 232C or 2 PARALLEL 2 RET D E8000 SYSTEM FILE OK Y N Y RET UT COMMAND B A E8000 SYS RET D CONFIGURATION FILE OK Y N Y RET INPUT COMMAND B A SHCNF706 SYS RET D 01 FIRMWARE FILE OK Y N RET COMMAND B A SHDCT706 SYS RET LOAD ITRONDEBUGGER FILE OK Y N N RET LOAD DIAGNOSTIC FILE OK Y N N RET Rev 0 1 08 00 page 86 of 450 RENESAS SN SN SN Defines the subnet mask value Command Format e Definition SN lt subnet mask value gt C RET e Display SN RET Description e Definition Defines the subnet mask value FM gt SN subnet mask value RET FM e Save Saves the setting
3. Pin No Signal Name Pin No Signal Name 1 PeriphAck 19 SignalGround 2 Xflag 20 SignalGround 3 PeriphClk 21 SignalGround 4 nPeriphRequest 22 SignalGround 5 nAckReverse 23 SignalGround 6 Data1 LSB 24 SignalGround 7 Data2 25 SignalGround 8 Data3 26 SignalGround 9 Data4 27 SignalGround 10 Data5 28 SignalGround 11 Data6 29 SignalGround 12 Data7 30 SignalGround 13 Data8 MSB 31 SignalGround 14 nReverseRequest 32 SignalGround 15 HostClk 33 SignalGround 16 IEEE1284 active 34 SignalGround 17 HostAck 35 SignalGround 18 HostLogicHigh 36 PeripheralLogicHigh RENESAS Rev 0 1 08 00 page 435 of 450 LAN Connector Figure A 3 shows the LAN connector pin alignment at the emulator station Table A 3 lists signal names Figure LAN Connector Pin Alignment at the Emulator Station Rev 0 1 08 00 page 436 of 450 RENESAS Table Signal Names Pin No Signal Name 1 Not connected 2 COL 3 TX 4 5 RX 6 GND 7 8 9 COL 10 TX 11 12 RX 13 12 14 15 m RENESAS Rev 0 1 08 00 page 437 of 450 A 4 Serial Interface Cable Figure A 4 shows the wiring for the serial interface cable Emulator serial connector The numbers represent connector pin numbers Figure 4 Serial Interface Cable Note that the serial interface cable provided may not be suitable for some host computers In
4. X x x TCC7 OO OO O OP OP OOO O O OPOP O OOP OO OPOP O OD OOP OP OPOP OOO OOO OOOO TCC8 All 16 24 Note Condition can be specified X Condition cannot be specified IX X X X X X X X X O ZX O X O X O X X X X X X Xx N Rev 0 1 08 00 page 354 of 450 RENESAS TRACE_CONDITION_A B C When conditions for subroutine trace range trace or subroutine range trace are specified together the trace acquisition conditions for each mode are ORed If no conditions are specified for these modes free trace is assumed When the specified trace stop condition is satisfied trace information acquisition stops and the emulator enters parallel mode and waits for command input To resume trace information acquisition exit parallel mode with the END command Inrange trace or trace stop mode the items shown in tables 7 24 can be specified as lt condition gt and they can be combined by ANDing them Several conditions can be specified in any order Rev 0 1 08 00 page 355 of 450 RENESAS TRACE_CONDITION_A B C Table 7 24 Specifiable Conditions TRACE_CONDITION_A Commands Item and Input Format Description that can be Set Address condition When only lt address 1 gt is specified the TCA condition is satisfied when the address bus value matches the specified value TCC NOT When both address 1 and
5. 433 Table A 2 Signal Names of Parallel 435 Table A 3 Signal Names uote er E EEEE EEEE EEEE E 437 Table C 1 User System Interface Cable and User Interfaces eee 443 Table D 1 Address Map Internal ROM Disabled Mode 449 Table D 2 Address Map Internal ROM Enabled Mode eene 450 Rev 0 1 08 00 page xv of xvi RENESAS Rev 0 1 08 00 page xvi of xvi RENESAS Part I Overview RENESAS RENESAS Section 1 Overview 1 1 Overview This system is an efficient software and hardware development support tool for application systems using the SH7060 microcomputer developed by Hitachi Ltd The SH7060 incorporates an interrupt controller user break controller bus state controller DMA timer pulse unit motor management timer watchdog timer compare match timer serial communication interface A D converter D A converter I O port and memory as peripheral functions in addition to the high speed CPU and the DSP The emulator operates on the user system in exactly the same way as the SH7060 and enables realtime emulation of the user system The emulator also provides functions for efficient hardware and software debugging The emulator consists of an emulator E8000 station an SH7060 device control board an evaluation chip board h
6. HELP RET lt gt ALI ALIAS A BI BACKGROUND INTERRUPT BCA 1 2 3 4 5 6 7 8 BREAK CONDITION 1 2 BCB 1 2 3 4 5 6 7 8 BREAK CONDITION B 1 2 FEBCC 2 Sp hp oppo 178 BREAK CONDITION C 1 2 BCU 1 2 3 4 BREAK CONDITION UBC l1 BS BREAK SEQUENCE CH E PACT CLOCK CNF CV CONVERT DC DS DATA_SEARCH D DUMP EXECUTION MODE F G GO HE HT HISTORY P ODE MV R MOVE_TO_RAM PA 1 2 3 4 5 6 7 8 PERFORMANCE_ANALYSIS 1 QUIT RX R REGISTER RS RT RESUL ST S STEP SI SO STEP OVER T i 1 2 3 4 5 6 7 8 RACE_CONDITION_A 1 2 TCB 1 2 3 4 5 06 7 8 RACE CONDITION B 1 2 TCC 1 2 3 4 5 6 7 8 TRACE CONDITION C 1 2 TDM RACE DISPLAY MODE TMO CTS RACE SEARCH L SV SAVE V IL INTFC LOAD IS IV INTFC VERIFY LAN LH LAN HOST LL LSV SAVE LV LO LOGOUT LS OPEN OPEN PWD RTR ROUTER STA SN SUBNE Rev 0 1 08 00 page 292 of 450 RENESAS URATION CHANGE EMBLE 2 3 4 5 6 1 8 RADIX TATUS INFORMATION R 5 5 T ti 29 SAVI LAN LOAD VERIFY LS PWD STA Note Usable in parallel mode No Unusable in parallel mode Available only for display in parallel mode Available when the FTP server is open Displays command format when command name
7. 448 Rev 0 1 08 00 page xiii of xvi RENESAS Tables Part I Table 1 1 Environmental Conditions nennen nennen 7 Table 1 2 E8000 Station Components 58000 5 02 8 Table 1 3 Device Control Board Components HS7060EDD81H 9 Table 1 4 EV Chip Board Components esses een een 9 Table 1 5 Optional Component Specifications essere 10 Table 2 1 Contents of E8000 System Disk sess 21 Table 3 1 Console Interface 46 Table 3 2 PC Interface Board 48 Table 3 3 Switch Settings for Memory Areas ssessssssseeeeeenreneeeee eene 51 Table 3 4 Personal Computer Interface 55 Table 3 5 Ethernet and Cheapernet Specifications 57 Table 3 6 Recommended Transceiver and Transceiver Cable sss 59 Table 3 7 Recommended BNC T Type Connector and Thin Wire 61 Table 3 8 Emulator Monitor Commands sees ener nennen 78 Table 3 9 Flash Memory Management Tool Commands eee 80 Part II Table I SSH7060 Functions ee rere tert rt he Roth be Pere Li Sp Ergo ca bkn tr DRE E Se abe Ene 125 Table 1 2 Emulation Functions ierit rettet
8. aaa 176 1 10 Emulation Monitoring Function seseeeeeeeeeneeeeeeen nennen nennen een rennen 178 1 11 Assembly Function cag enirn tht rte 180 LAL 1 Tm 180 1 11 2 Input anise 181 1 11 3 Disassembly pne eee er eer utar EEE EE 184 Section 2 Differences between the SH7060 and the Emulator 185 Section 3 SH7060 Function Suppotrt 187 3 1 Operating Mode Setting eere banni orba esie SY 187 3 2 Memory Space 190 2 24 1 Internal Ate cnet Rete S ane eee 190 3 2 2 Internal RAM X RAM Y RAM 191 2223 IBnt r nal VO Afed oU E 191 3 2 4 Pxternal Memory AT a a 191 3 3 Low Power consumption Mode Sleep Software Standby and Hardware Standby 200 3 3 1 Hardware Standby Mode6 teen 200 3 3 2 Sleep and Software Standby 200 Rev 0 1 08 00 page vi of xvi RENESAS ell C 201 3 5 Control Input Signals RES BREQ ener ener enne 201 3 0 Watchdog Timer
9. 206 User System Interface 207 Troubleshooting PAD emere rt tetto 215 Emulation Command Description 223 Display Range Specified by 346 Description Format of Host Computer Related Command 374 LAN Command Description 393 Serial Connector Pin Alignment at the Emulator Station 433 Rev 0 1 08 00 page xii of xvi RENESAS Figure A 2 Parallel Connector Pin Alignment at the Emulator Station sss 434 Figure LAN Connector Pin Alignment at the Emulator Station sss 436 Figure A 4 Serial Interface Cable esce netter tenerte tte rr tei 438 Figure A 5 Serial Interface Cable Using Other 1 439 Figure B 1 External Dimensions and Weight of the E8000 Emulator 441 Figure 2 External Dimensions and Weight of the EV Chip Board 442 Figure Connection Using the HS7065ECHSIH eee eee ene 445 Figure C 2 Restrictions on Component Installation 446 Figure C 3 Recommended Mount Pad Dimensions of the User System IC Socket 447 Figure C 4 Examples of Securing the Emulator
10. nae ERR EE RP ea Leo sedora 126 Table 1 3 Host Computer Interface Functions eene 136 Table 1 4 Specifiable Hardware Break Conditions a nnnsnnsasssasss 143 Table 1 5 Maximum Specifiable Numbers in Trace Mode sese 157 Table 1 6 Maximum Number of Measurable Subroutines eee 169 Table 1 7 Execution Status 22 400 177 Table 1 8 Operating Status 2 44440000 nre 178 Table 1 9 Assembler Directives iios che retur ep npe Loeb 182 Table 1 10 Operand Descriptions urere tene eret ter tete dett tran Len rete tbe 183 Table 2 1 Differences between Initial Values of the SH7060 and Emulator Registers 185 Table 3 1 597060 Operating Mode 5 eerte rient 188 Table 3 2 Clock Operating Mode Setting nennen 189 Table 3 3 Memory Blocks in Extended Mode without 192 Table 3 4 Memory Blocks in Extended Mode with ROM esee 196 KENN NBI 205 Table 7 1 Emulation Commands sese esae rsen nemen 221 Table 7 2 Subcommands for Line Assembly essere 231 Table 7 3 Causes of BACKGROUND INTERRUPT Command Termination 234 Table 7 4 Maximum Conditions
11. 2 2 4 44 2 63 3 4 2 Interface Software IPW Settings ene 64 3 4 3 Debugging Support Functions 68 3 5 Power On Procedures for Emulator essere eene enne 70 3 5 1 Power On Procedures for LAN Interface essere 70 3 5 2 Power On Procedures for RS 232C 77 3 6 Emulator Monitor Commands 78 3 6 1 Emulator Monitor 78 3 6 2 S 5 Initiates the E8000 system 79 3 6 3 F F Initiates the flash memory management tool 80 3 6 4 L L Sets the emulator IP 4 89 3 6 5 T T Initiates the diagnostic 90 3 7 System Program Installation 3 c sssccsesseseresosestesedsesnenssoessasadesdenssspesensebenteunesenseansssnseoresys 91 3 7 1 E8000 System DiSK amp uu oorr rir te Fere 9 3 7 2 Installation eiue Et ibn HER bes eb 92 3 8 E8000 System Program Initiation eeseseeeeeeseeeeenerenneen nennen eem rennen 100 3 8 1 Initiation on Emulator 100 3 8 2 Automatic Initiation of E8000 System Program sss 101 Section 4 Operating puso eimi 103 4
12. 65 Figure 3 23 Scr en Setting BOX 66 lure BEDS MC 67 Figure 3 25 Power On Procedures for LAN ass 71 Figure 3 26 Power On Procedures for RS 232C 2 77 Figure 3 27 E8000 System Disk 91 Rev 0 1 08 00 page xi of xvi Part II Figure 1 1 Figure 1 2 Figure 1 3 Figure 1 4 Figure 1 5 Figure 1 6 Figure 1 7 Figure 1 8 Figure 1 9 Figure 1 10 Figure 1 11 Figure 1 12 Figure 1 13 Figure 1 14 Figure 1 15 Figure 1 16 Figure 1 17 Figure 1 18 Figure 1 19 Figure 1 20 Figure 1 21 Figure 1 22 Figure 1 23 Figure 1 24 Figure 1 25 Figure 1 26 Figure 1 27 Figure 1 28 Figure 1 29 Figure 1 30 Figure 4 1 Figure 4 2 Figure 5 1 Figure 7 1 Figure 7 2 Figure 8 1 Figure 9 1 Part III Figure A 1 Cycle Reset Mod iere ree tre pe ooi it eei 137 Trigger Signal Output Timing sees 138 Transition to Parallel 139 ICI NU aasa 140 Break with Address Bus Value esee nemen 144 Break with Data Bus nre 145 Break with Read Wnte eiit Pe erret huh 145 Break by Access Dy pe P n 146 Break with Dela
13. X1 YO and Y1 ALL All register information is output default at emulator initiation No information displayed Default ALL lt start address gt Start address of memory contents lt end address gt End address of memory contents Default is 16 bytes of memory beginning at lt start address gt lt number of bytes gt Number of bytes of memory contents Default is 16 bytes lt stack display byte count gt Number of bytes of stack contents Rev 0 1 08 00 page 338 of 450 RENESAS STEP_INFORMATION Description Specification Displays register information executed instruction information memory contents and cause of termination during STEP and STEP_OVER command execution This command also selects the register information and memory contents which are to be displayed a b c d f g PC 00001000 SR 000000F0 000000000000 ITIT00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000FFE00 DSR200000000 tx ke 3 k k ak k k k k k k k k kkk A0G 00 0 00000000 M0 00000000 X0 00000000 Y0 00000000 A1G 00 A1 00000000 M1 00000000 X1 00000000 Y1 00000000 00001002 MOV 00 RO MEMORY 0000FF80 00 04 00 FF FO 00 02 00 10 00 02 00 OF 00 00 00
14. Description Single step Performs single step execution from start address gt to stop PC or from start address gt for number of execution steps The type of emulation performed described below depends on the specified parameters and option In addition register and memory contents address instruction mnemonic and termination cause are displayed in the following format a b c d 00001000 SR 000000F0 000000000000 ITII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000FF 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000FFE00 5 00000000 3k k kk kk kk kk A0G 00 A0 00000000 M0 00000000 X0 00000000 Y0 00000000 A1G 00 A1 00000000 M1 00000000 X1 00000000 Y1 00000000 lt address gt lt instruction mnemonic gt MEMORY lt memory contents gt lt cause of termination gt a Register information b Address and mnemonic of the executed instruction c Memory contents display d Cause of termination refer to table 7 21 Information a and c is displayed according to specifications made with the STEP_INFORMATION command The termination cause d is displayed only when the STEP command is completed Rev 0 1 08 00 page 333 of 450 RENESAS Table 7 21 Causes of STEP Command Ter
15. Rev 0 1 08 00 page 280 of 450 RENESAS 7 2 21 GO G Command Format e Execution GO A lt start address gt lt break address gt lt mode gt Description e Execution GO Provides realtime emulation start address gt lt break address gt A lt mode gt RET Start address of realtime emulation or the word RESET Breakpoint address Break occurs before the instruction at the break address is executed Emulation mode R lt n gt Cycle reset mode n 1 to 12 N Temporarily invalidates break conditions Time interval measurement mode 1 I2 Time interval measurement mode 2 I3 Time interval measurement mode 3 5 BREAK CONDITION sequential break mode 1 SB2 BREAK CONDITION sequential break mode 2 SB3 BREAK CONDITION UBC sequential break mode 3 TB Causes a break to occur at the timeout value specified with the TIME option of the PERFORMANCE ANALYSISI command Executes realtime emulation user program execution starting from the specified start address The following data can be specified as start address GO address RET Executes the program from the specified address GO RET When omitting the address the program executes GO RESET from the address where the current PC indicates RET After a RES signal input to the SH7060 PC and SP are set to the values specified with the reset vector and program execution starts Rev 0 1 08 00 pa
16. our customers Old Company Name in Catalogs and Other Documents On April 1 2010 NEC Electronics Corporation merged with Renesas Technology Corporation and Renesas Electronics Corporation took over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry 24 N S AS 10 11 12 Notice All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise
17. 23 Parameter Error The parameter data is invalid 24 Response Timeout Happened response timeout error has occurred 25 Check Sum Error A checksum error has occurred 26 ICMP Error An ICMP error has been detected 27 ethernet address error An Ethernet address error has occurred 28 not HOST File The HOSTS information does not exist 30 illegal initialized The HOSTS initialization information is invalid 31 illegal My data Main station information is invalid 32 illegal Other Party data Remote station information is invalid 33 remote Nothing Remote station has not been defined 34 transmission error A data transfer error has occurred 35 closing error A termination error has occurred FF unknown error An undefined error has occurred Rev 0 1 08 00 page 426 of 450 RENESAS Table 10 4 Process Code for LAN I O Error Messages Error No Process 01 Initialization 02 TELNET data transfer 03 TELNET close 04 TELNET open 10 FTP connection 20 File transmission 30 File reception 40 FTP disconnection 50 Directory modification 60 Directory display 70 Current directory display 80 File transfer binary specification 90 File transfer ASCII specification AO Forcible termination RENESAS Rev 0 1 08 00 page 427 of 450 10 2 IBM PC Interface Software Error Messages The IBM PC interface software outputs error messages on the IBM PC Table 10 5 lists error messages descriptions
18. 24 2 3 4 System Configuration Using a LAN Adapter sese 25 Section 3 Preparation before Use asap 27 35 1 Emulator Preparato uere rerit pete e tS Unite steals sedes 27 3 2 Emulator Connection kuu AERE E UERBO aed 29 3 2 1 Connecting the Device Control 29 3 2 2 Connecting the EV Chip Board esee eene 31 3 2 3 Connecting the User System Interface 2 044402211 36 3 2 4 Connecting the External 37 32 5 Selecung the CLOCK sinini anne eieiaeo steterit tpe e 40 3 2 6 Connecting the System 43 3 3 System COMMCCHON M 45 3 3 1 PC Interface Board 48 3 3 2 Switch Settings of the PC Interface 2 41210101 49 3 3 3 Installing the PC Interface 51 3 3 4 Connecting the E8000 Station to the PC Interface Board 53 Rev 0 1 08 00 page iv of xvi RENESAS 3 3 5 Connecting to a Serial Interface Parallel Interface 55 3 3 6 Connecting to a LAN 56 3 3 7 System Connection 2 58 3 4 Operation Procedures of Interface Software IPW sss 63 3 4 1 Installation and Initiation of Interface Software
19. BT BF BRA BSR JMP JSR BT S BE S BRAF BSRF TRAPA RTS RTE Subroutine Display When a subroutine is called the information for the subroutine executed at first is displayed Rev 0 1 08 00 page 162 of 450 RENESAS wc race information is acquired Figure 1 21 Subroutine Display This function interrupts the execution state display at the JSR BSR or BSRF instruction in the designated subroutine and resumes the execution state display when the instruction placed immediately after the JSR BSR or BSRF instruction is executed After that if another JSR BSR or BSRF instruction is executed the execution state display is interrupted Subroutine Step Execution When executing a JSR BSR or BSRF instruction the emulator treats the called subroutine as a single step All other instructions are executed one at a time This function is valid only in the user RAM or the emulation memory area 1 6 2 Setting Display Information The user can set the information displayed at each instruction using the STEP INFORMATION command For details refer to section 7 2 38 STEP INFORMATION 1 6 3 Termination of Single Step Function The single step function stops after executing a specified number of steps from the specified start address or the current PC address The user can stop execution by specifying a stop address However the specified address must be at the start of an instruction If the second byte of an instruction is spe
20. Note TIME and CLK cannot be set as E display enabled at the same time Table 7 27 shows the default of each trace item display at emulator shipment Table 7 27 Shipment Defaults of TRACE_DISPLAY_MODE Command Trace Items Default at Shipment A D MA RW ST NMI RES BREQ VCC and PRB E TIME and CLK D When the C option is specified the following message is displayed to confirm with the user whether to overwrite the existing configuration information in the emulator flash memory TRACE DISPLAY MODE RET CONFIGURATION STORE OK Y N a RET a Y Stores the specifications as configuration information in the emulator flash memory Hereafter when the emulator is activated the saved specifications go into effect N Does not overwrite configuration information The existing specifications are valid Rev 0 1 08 00 page 363 of 450 RENESAS TRACE_DISPLAY_MODE e Display Displays the specified trace mode as shown below TRACE DISPLAY MODE RET PTR D yyyyyy D yyyyyy DISPLAY ITEM 7777 7777 yyyyyy Default values of start and end bus cycle pointers for trace information display and search 7777 Information to be displayed at trace information display A D MA RW ST NMI RES BREQ VCC PRB TIME and CLK Examples 1 To set the default values of the pointers to addresses D 10 and D 10 at trace information display TDM PTR D 10 D 10 RET 2 To display the spec
21. Operations 1 The program counter points to the next address to be executed when the GO command terminates Entering STEP RET here executes only a single instruction The information shown on the right is displayed 01001010 ADD FF RO shows the address and mnemonic code executed by the STEP command and STEP NORMAL END shows that single step execution has terminated To repeat single step execution enter only RET This can be repeated until another command is executed Rev 0 1 08 00 page 112 of 450 Display Message STEP RET PC 01001012 SR 000000F1 000000000000 IIIIO0 T GBR 00000000 VBR 00000000 MACH 00000000 MACI 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000009 00000001 00000002 00000001 OFOFFFFC 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0100FFFC DSR 00000000 k k amp amp amp COB A0G 00 A0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 01001010 ADD TEF RO 5 NORMAL END RET 01001014 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACI 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000009 00000001 00000002 00000001 OFOFFFFC 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0100FFF
22. Suite 17 3 Level 17 Menara IMC Letter Box No 5 Menara IMC No 8 Jalan Sultan Ismail 50250 Kuala Lumpur Tel lt 60 gt 3 201 8751 Fax lt 60 gt 3 201 8757 Thailand Hitachi Asia Thailand Co Ltd 18th Floor Ramaland Bldg 952 Rama IV Road Bangrak Bangkok 10500 Tel 66 2 632 9292 Fax 66 2 632 9299 ASIA Hong Kong Headquarters Hitachi Asia Hong Kong Ltd Group Ill Electronic Components 7th North Tower World Finance Centre Harbour City Canton Road Tsim Sha Tsui Kowloon Hong Kong Tel 852 2 735 9218 Fax 852 2 730 0281 Telex 40815 HITEC HX Sales Offices Korea Hitachi Asia Hong Kong Ltd Seoul Branch Office 18 F Hanil Group Bldg 191 2 Ka Hangang Ro Yongsan ku Seoul Tel 82 2 796 3115 Fax 82 2 796 2145 Telex 28863 HITEC SL China Hitachi Asia Hong Kong Ltd Beijing Office Room No 1412 Beijing Fortune Bldg 5 Dong San Huan Bei Lu Chaoyang District Beijing 100004 Tel 86 10 6590 8852 Fax 86 10 6590 8850 Telex 210509 HTCBJ CN Hitachi Asia HongKong Ltd Shanghai Office Suite 315 Level 3 West Podium Shanghai Centre 1376 Nanjing Xi Lu Shanghai 200040 Tel 86 21 6279 8351 8361 8365 Fax 86 21 6279 8275 Hitachi Asia HongKong Ltd Guangzhou Office Room 3406 07 34 F Office Tower Citic Plaza No 233 Tianhe Bei Road Guangzhou 510620 Tel lt 86 gt 20 8755 3748 Fax
23. Turn off to the right 57 58 SW1 on the E8000 station rear panel Run interface software IPW EXE on the host computer connected via the RS 232C interface Power the E8000 station Emulator monitor command input wait state Select L to set the IP address of the E8000 station Define the subnet mask value with the flash memory management tool command SN when using the LAN board HS7000ELNO2H Define the routing information with the flash memory management tool command RTR when using the LAN board HS7000ELNO2H Define the host computer name with the flash memory management tool command LH Turn off the E8000 station 10 Turn off to the right S7 and turn on to the left S8 in SW1 on the E8000 station rear panel Power on the E8000 station Execute the TELNET command on the host computer for connection to the emulator Initiation messages are displayed Internal system test is executed No Test result OK Yes Y 14 Emulator monitor command input wait state 14 Error message is displayed Figure 3 25 Power On Procedures for LAN Interface Rev 0 1 08 00 page 71 of 450 RENESAS The following describes the power on procedures when using the LAN interface T Check that 57 and 58 console interface switch SW1 on the E8000 station rear panel are t
24. X X O X measurement mode 3 Area access count X X X O X measurement mode Subroutine nest call count O X X X O X measurement mode Note O Mode can be specified X Mode cannot be specified Up to eight subroutines can be specified when using only subroutine execution time measurement mode or 2 for measurement However only up to four subroutines can be specified in subroutine execution time measurement mode 3 area access count measurement mode and subroutine call count measurement mode This command cannot be executed during program execution by the STEP or STEP_OVER command RENESAS Rev 0 1 08 00 page 315 of 450 PERFORMANCE ANALYSIS If timeout value is specified in the PERFORMANCE ANALYSISI command and the subroutine execution time exceeds the specified timeout value a break occurs To enable this make sure to specify TB as the mode with the GO command If specified count is specified in the PERFORMANCE ANALYSIS command and the subroutine execution count reaches the specified count a break occurs To enable this make sure to specify TB as the mode with the GO command Note An execution count that is exceeded is detected when the program passes through the subroutine end address Consequently a subroutine execution count that is equivalent to the specified count plus one and the corresponding subroutine execution time are displayed Cancellation
25. a Emulator IP address Specify the emulator IP address with the emulator monitor command L Since the emulator IP address is written to the emulator flash memory it needs not to be written each time the LAN interface is used The emulator IP address can be modified as required Host computer IP address host computer connected via FTP interface With the emulator monitor flash memory management tool command LH specify the name and IP address of the host computer to be connected to the emulator via the FTP interface when initiating the E8000 system program Since the specified host name and IP address are written to the emulator flash memory they need not to be written each time the LAN interface is used The host computer name and IP address can be modified as required Rev 0 1 08 00 page 391 of 450 RENESAS 9 2 2 Data Transfer Data transfer is performed by connecting the emulator to the host computer via the FTP interface after the environmental settings have been completed In the FTP interface the optional LAN board supports only the client function Therefore the FTP command must be entered to the emulator and not the host computer to establish the FTP interface Transfer data using the following procedure Procedure 1 E8000 system program initiation Initiate the E8000 system program after confirming that the host computer to be connected has been defined with the emulator monitor flash memory management tool command LH
26. a GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000FFEO00 05800000000 COB A0G 00 0 00000000 0 00000000 0 00000000 YO 00000000 16 00 1 00000000 M1 00000000 1 00000000 Y1 00000000 I TIME 2 gt 1 D 0000H 00M 00S 000000US 000NS 00 0 E COUNT D 00000 b MAX D 0000H 00M 00S 000000US 000NS MIN D 0000H 00M 00S 000000US 000NS c d AVE D 0000H 00M 00S 000000US 000NS e I TIME 4 gt 3 D 0000H 00M 00S 000000US 000NS 00 0 E COUNT D 00000 f MAX D 0000H 00M 00S 000000US 000NS MIN D 0000H 00M 00S 000000US 000NS g h AVE D 0000H 00M 00S 000000US 000NS i RUN TIME D 0000H 00M 00S 000000US 000NS 0 lt cause of termination gt k a The register contents at emulation termination b Time interval measurement modes 1 and 2 display the execution time from satisfaction of BCU2 condition to the satisfaction of BCU1 condition Time interval measurement mode 2 displays the execution count from satisfaction of BCU2 condition to the satisfaction of BCU1 condition c Time interval measurement modes 2 and 3 display the maximum execution time from satisfaction of BCU2 condition to the satisfaction of BCU1 condition d Time interval measurement modes 2 and 3 display the minimum execution time from satisfact
27. 1 2 3 4 5 6 7 8 312 7231 323 RADIN IRN Qu ee 324 7 2 33 REGISTER R 326 7 2 34 RESET RS 327 1235 RESULT RT edet Odio p EU vd ced 328 7956 STATUS uuu nuqan 330 ge STPEBISE NR eaten an eens 332 7 2 38 STEP INFORMATION SI ennt 338 7 2 39 STEP_OVER SO iic dario 341 7240 TRACE a us k ED 345 7 2 41 TRACE_CONDITION_A B C TCA TCB TCC ees 352 7 2 42 TRACE DISPLAY MODE 362 7 243 TRACE MODE 365 7244 SEARCH TS 368 Section 8 Data Transfer from Host Computer Connected by ic PP EMI oat 373 HANE TUO T 373 8 2 Host Computer Related Commands eese een een eene 374 82 1 INEEC LOADI ID u n Er lees 376 8 2 2 INTEC SAVE IS ini a EUER Uie basal 378 Rev 0 1 08 00 page viii of xvi 8 2 3 IV ect rrt t tee nt cn rrr tete etc 380 824 LOAD L E 382 8 2 5 SAVE SV i iore E qawa asa 384 8
28. 78 EMULATOR BUSY The emulator was processing a break processing in parallel mode so another command could not be executed Re enter the command This error occurs when software breakpoints are set with the BREAK or BREAK_SEQUENCE command 81 TRACE CONDITION RESET Satisfied trace conditions are all reset when parallel mode is entered When parallel mode is terminated the trace conditions are rechecked from the beginning 82 ODD ADDRESS An instruction was written to an odd address with the ASSEMBLE command Processing was initiated from the odd address Rev 0 1 08 00 page 423 of 450 RENESAS Table 10 1 Error Messages cont Error No Error Message Description and Solution 83 INVALID OPERAND SIZE An invalid operand size was specified with the ASSEMBLE command Processing was performed with the correct size 84 INVALID ABSOLUTE An invalid operand address was specified with ADDRESS the ASSEMBLE command Processing was performed with the maximum address allowed 86 INTERNAL AREA An area other than CSO to CS5 was also to be processed Processing specified with the MEMORY command is performed normally but other command processing are performed for only the CSO to CS5 areas 87 INTERNAL I O AREA The internal I O area was accessed 88 RESERVED AREA A reserved area was accessed 92 PERFORMANCE ANALYSIS The minimum unit for execution performance TABLE BUSY measurement cannot be changed du
29. Emulator Operating 2 ener trennen 103 4 2 Basic EX amples c 105 4 2 1 Preparing for Connection of the LAN Host Computer esee 105 4 2 2 Specifying the SH7060 Operating 107 4 2 3 Allocating Standard Emulation Memory and Specifying Attributes 108 4 2 4 Loading the User ren rennen 109 4 55 Executing the Program i oett 110 4 2 6 Setting a Software Breakpoint sese 112 43 7 Executing a Single Step tee reet Re een 113 4 2 8 Setting Hardware Break Conditions 114 4 2 9 Displaying Trace Information sees 115 4 3 Application Examples reete keen dope Se are qe cde 117 4 3 1 Break with Pass Count 117 4 3 2 Conditional iei rie EENE 118 4 3 3 Parallel Mod uu oae eter terr nnde EE ERR 120 4 3 4 Searching Trace Information sess 122 Part II Rev 0 1 08 00 page v of xvi RENESAS Section 1 Emulator Functions 125 1 1 125 1 2
30. Table 3 3 Memory Blocks in Extended Mode without ROM cont Register Bit Capacity Address Space Type Memory Type EMRC LBCO 16 Mbytes H 10000000 H 1 OFFFFFF CS8 Normal space 16 Mbytes H 90000000 H 90FFFFFF burst ROM LBC1 16 Mbytes H 11000000 H 11FFFFFF multiplexed I O space 16 Mbytes H 91000000 H 91 FFFFFF LBC2 16 Mbytes H 12000000 H 1 2FFFFFF 16 Mbytes H 92000000 H 92FFFFFF LBC3 16 Mbytes H 13000000 H 13FFFFFF 16 Mbytes H 93000000 H 93FFFFFF LBC4 16 Mbytes H 14000000 H 1 4FFFFFF 59 Normal space 16 Mbytes H 94000000 H 94FFFFFF burst ROM LBC5 16 Mbytes H 15000000 H 15FFFFFF multiplexed I O space 16 Mbytes H 95000000 H 95FFFFFF LBC6 16 Mbytes H 16000000 H 1 6FFFFFF 16 Mbytes H 96000000 H 96FFFFFF LBC7 16 Mbytes H 17000000 H 1 7FFFFFF 16 Mbytes H 97000000 H 97FFFFFF LBC8 16 Mbytes H 18000000 H 1 8FFFFFF CS6 Normal space 16 Mbytes H 98000000 H 98FFFFFF peripheral device space LBC9 16 Mbytes H 19000000 H 1 9FFFFFF 16 Mbytes H 99000000 H 99FFFFFF LBC10 16 Mbytes H 1A000000 H 1 AFFFFFF 16 Mbytes H 9A000000 H 9AFFFFFF LBC11 16 Mbytes H 1B000000 H 1 BFFFFFF 16 Mbytes H 9B000000 H 9BFFFFFF LBC12 16 Mbytes H 1C000000 HMCFFFFFF CS7 Normal space 16 Mbytes H 9C000000 H 9CFFFFFF peripheral device space LBC13 16 Mbytes H 1D000000 H 1 DFFFFFF 16 Mbytes H 9D000000 H 9DFFFFFF LBC14 16 Mbytes H 1E000000 H 1 EFFFFFF 16 Mbytes H 9E000000 H 9EFFFFFF LBC15 16 Mbyte
31. g STACK OOOFFFEO 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4 STEP NORMAL END a System and control register information PC SR PR GBR VBR MACH MACL RS RE and MOD b General register information RO to R15 DSP register information DSR A0G 0 MO XO YO and Y1 d Address and assembler instruction mnemonic of the executed instruction Memory contents display f Stack contents display h Cause of termination Display Displays STEP information according to the specified contents However the address and assembler instruction mnemonic of each executed instruction are not displayed Rev 0 1 08 00 page 339 of 450 RENESAS STEP_INFORMATION Examples 1 To display only the contents of system and control registers PC SR PR GBR VBR MACH MACL RS RE and MOD during STEP or STEP_OVER command execution SI 1 RET 2 To display no register information during STEP or STEP OVER command execution SI RET 3 To display memory contents from addresses H FB80 to H FB87 during STEP or STEP OVER command execution SI A FB80 FB87 RET 4 To display contents according to the specified display information SI RET 00001004 SR 2000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000
32. type ELF type S type or HEX type load module gt LAN VERIFY offset S file name If an offset is specified a verification address is calculated as follows Verification address load module address offset Notes 1 Data can be verified only in the internal memory areas or areas CSO to 55 2 Before verifying a SYSROF type load module the file type must be changed to binary code with the BIN command At emulator initiation binary code is selected as the default However if ASCII is selected with the ASC command change the file type to binary code with the BIN command before verifying For details refer to section 9 3 2 BIN Example To verify SYSROF type load module file F11 ABS in the host computer against the memory contents FTP 5 1 RET Username USERI RET Password RET login command success FTP gt LV F11 ABS VERIFYING ADDRESS 00000 00 ADDRESS 00000000 END ADDRESS 00000FFF FTP gt Rev 0 1 08 00 page 409 of 450 RENESAS LS 9 3 12 LS LS Displays the host computer directory connected via the FTP interface Command Format e Display LS A directory name RET directory name of host computer directory Default Current directory of the host computer Description Display Displays the specified directory contents in the host computer connected via the FTP interface If direc
33. CS4 space DRAM 64 Mbytes 8 16 32 bits H 44000000 H 47FFFFFF 55 space 64 Mbytes 8 16 32 bits H 48000000 H 57FFFFFF Reserved Reserved H 58000000 H 5803FFFF Internal ROM Internal ROM 256 kbytes 32 bits H 58040000 H FFFFFFFF Reserved Reserved H FFFF0000 H FFFF13FF Internal Internal peripheral 5 kbytes 8 16 bits peripheral module module H FFFF1400 H FFFF7FFF Reserved Reserved H FFFF8000 H FFFF8FFF X RAM 4 kbytes 32 bits H FFFF9000 H FFFF9FFF Reserved Reserved H FFFFA000 H FFFFAFFF Y RAM 4 kbytes 32 bits H FFFFBOOO H FFFFFFFF Reserved Reserved Rev 0 1 08 00 page 449 of 450 RENESAS Table D 2 Address Map Internal ROM Enabled Mode Address Type of Space Type of Memory Size Bus Width H 00000000 H 0003FFFF Internal ROM Internal ROM 256 kbytes 32 bits H 00040000 H 00FFFFFF Reserved Reserved H 01000000 H 03FFFFFF CS0 space Normal space 48 Mbytes 8 16 32 bits H 04000000 H 07FFFFFF CS1 space Normal space 64 Mbytes 8 16 32 bits H 08000000 H OBFFFFFF CS2 space burst ROM 64 Mbytes 8 16 32 bits H 0C000000 H OFFFFFFF CS3 space multiplexed I O 64 Mbytes 8 16 32 bits space H 10000000 H 3FFFFFFF Reserved Reserved H 40000000 H 43FFFFFF 54 space DRAM 64 Mbytes 8 16 32 bits H 44000000 H 47FFFFFF CS5 space 64 Mbytes 8 16 32 bits H 48000000 H 57FFFFFF Reserved Reserved H 58000000 H 5803FFFF Internal ROM Internal ROM 256 kbytes 32 bits H 58040000 H FFFEFFFF Reserved Reserv
34. Cancels measuring execution performance for the specified subroutine number If the subroutine number is omitted all subroutines assigned for execution performance measurement are canceled Initialization Clears the current execution time and count for all subroutines as well as the total run time The total run time begins to be measured only after a subroutine to be measured by this command is assigned If no subroutines are assigned the total run time is not measured Display Displays specified subroutine addresses or performance measurement results in one of the following three formats If a subroutine name is specified the subroutine addresses and measurement results are displayed in numerical form or graph form Rev 0 1 08 00 page 316 of 450 RENESAS PERFORMANCE_ANALYSIS Execution time ratio displayed in graph form No option is specified PERFORMANCE_ANALYSIS NO NAME 1 SUBA 2 SUBB 3 SUBC 4 5 SUBD 7 SUBE b MODE RATE 100 200 200 D 15 0 SC D 30 096 c d RET 0 10 20 30 40 50 60 70 80 90 100 k kok kok TOTAL RUN TIME D 0000H 10M 00S 000020US 250NS f a Subroutine number b Subroutine name up to 8 characters are displayed c Execution measurement mode Il 12 I3 AC SC Subroutine execution time measurement mode 1 Subroutine execution tim
35. Decimal HEX Hexadecimal FIX Fixed point c BREAK D xxx Number of breakpoints decimal d HOST x1x2x3x4x5 Interface conditions with serial port 1 Baud rate BPS Bits per second 1 2400 BPS 2 4800 BPS 3 9600 BPS 4 19200 BPS 5 38400 BPS x2 Data length for one character 8 8bits 7 7 bits x3 Parity None E Even Odd x4 Number of stop bits 1 1 stop bit 2 2 stop bits x5 Busy control method X X ON X OFF control RTS CTS control Rev 0 1 08 00 page 330 of 450 RENESAS STATUS e STEP_INFO REG x1 x2 x3 Register information displayed with the STEP command 1 1 Control register PC SR PR GBR VBR MACH MACL RS and MOD information is displayed Space No control register PC SR PR GBR VBR MACH MACL RS RE and MOD information is displayed x2 2 General register RO to R15 information is displayed Space No general register RO to R15 information is displayed x3 3 DSP register DSR AO 0 1 MO XO YO and Y1 information is displayed Space No DSP register DSR AO MO YO and Y1 information is displayed f Memory address range displayed with the STEP command g SP xxxxxxxx Display size of stack contents h CLOCK xxxx Clock signal type MHz E8000 internal clock 7 5 MHz 15MHz E8000 internal clock 15 MHz USER User system clock XTAL Crystal oscil
36. Figure 3 15 Connecting the E8000 Station to the PC Interface Board Rev 0 1 08 00 page 53 of 450 RENESAS 3 3 5 Connecting to Serial Interface Parallel Interface A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST This section describes how to set the personal computer interface when the emulator is connected to a personal computer The personal computer connector marked SERIAL is located on the E8000 station s rear panel Connecting this connector to a personal computer via the RS 232C interface cable enables data transfer between the emulator and the personal computer Table 3 4 lists the personal computer interface specifications The system program can be loaded to the E8000 station memory with the bidirectional parallel interface At this time confirm that the printer driver has been set by checking the PC settings Use a personal computer to which the bidirectional parallel interface can be applied See section 3 7 System Program Installation Table 3 4 Personal Computer Interface Specifications Specifications Signal level RS 232C High 5 to 15 V Low 5 to 15 V Transfer rate 2400 4800 9600 19200 38400 BPS bits per second Synchronization method Asynchronous method Start bit l
37. HEX type load module M Memory image file E ELF type load module Default SYSROF type load module lt file name gt File name in the host computer Description e Load Loads a user program from the host computer into user system memory via the bidirectional parallel interface Use interface software IPW for the host computer to transfer the specified file to the emulator via the bidirectional parallel interface Enter BA before the command to request data output to the host computer B LOAD load module type gt lt file name gt RET When loading is completed the start and end addresses are displayed as follows TOP ADDRESS lt start address gt END ADDRESS lt end address gt An offset value to be added can be specified for the address of an SYSROF type ELF type S type or HEX type load module B LOAD lt offset gt S lt file name gt RET If an offset is specified a load address is calculated as follows Load address lt load module address gt lt offset gt Rev 0 1 08 00 page 382 of 450 RENESAS LOAD Notes 1 The load module can be loaded only to the internal memory areas or areas CSO to CS5 2 Verification is not performed during load If the program must be verified use the VERIFY command For details refer to section 8 2 6 VERIFY Examples 1 load SYSROF type load module F11 ABS B L F11 ABS RET TOP ADDRESS 00007000 END ADDRESS 00007FFF
38. RW read write ST status NMI NMI signal RES RESET signal BREQ BREQ signal VCC VCC voltage state PRB external probe TIME time stamp and CLK clock cycle C Stores the settings as configuration information in the emulator flash memory Description e Setting Specifies the default values of start and end pointers for trace information display and search which are used when the pointer values are not specified in the TRACE or TRACE SEARCH command Trace information in the emulator is available for approximately 128 k bus cycles Use this command to specify the range of the default values when all trace information is not required The specified pointers will function as bus cycle pointers in the TRACE SEARCH command and according to the option as instruction or bus cycle pointers in the TRACE command The pointer value ranges from 131070 to 131070 When exceeding this range start and end pointers are automatically specified as 131070 and 131070 respectively TRACE DISPLAY MODE PTR D 2048 D 2048 RET Rev 0 1 08 00 page 362 of 450 RENESAS TRACE_DISPLAY_MODE Sets trace items to be displayed as bus cycle information at trace information display with the TRACE or TRACE SEARCH command TRACE DISPLAY MODEAzzzz E D RET zzzz Information to be displayed at trace information display A D MA RW ST NMI RES BREQ VCC PRB TIME and CLK E Display is enabled D Display is disabled
39. To specify the mask specify each digit to be masked at input as an asterisk When address 2 is not specified for an address condition address 1 gt can be consecutively masked from the lowest bit It is not possible to mask any desired bit position Table 7 6 shows address mask specification examples Example The following condition is satisfied when the lower four bits of the address condition are not specified BREAK CONDITION A1 H 400000 RET Table 7 6 Address Mask Specifications BREAK CONDITION Radix Mask Unit Example Mask Position Binary 1 bit B 01110 Bits 2 to 0 are masked Hexadecimal 4 bits H 000F50 Bits 7 to 0 are masked Note When address 2 is not specified for an address condition address 1 gt be consecutively masked from the lowest bit It is not possible to mask any desired bit position as shown in the following examples Examples Allowed BREAK CONDITION A1 Az H 10 Not allowed BREAK CONDITION A1 A H 1 00 BREAK CONDITION A1 H 100 10 A bit mask in 1 bit or 4 bit units can be specified for the data or PRB condition of the BREAK CONDITION command When a bit is masked the condition is satisfied irrespective of its bit value To specify the mask specify each digit to be masked at input as an asterisk Table 7 7 shows these mask specification examples Example The following condition is satisfied when address 3000000 is the address condition
40. When all options are omitted the current values are displayed and the emulator enters the interactive mode Enter the required value for each item Enter RET for the item not to be modified To exit the interactive mode enter a period In this case modifications before entering a period are valid EXECUTION_MODE RET TIME 1 6us TRGUZD TRGB D MON 1 MB D Displays current value BREQ D DISABLE E ENABLE RET TIME 1 1 6us 2 406ns 3 20ns RET TRGU D DISABLE E ENABLE M MULTI RET TRGB A ALL 1 B1 2 B2 3 B3 4 B4 5 B5 6 B6 7 B7 8 B8 D DISABLE RET MON 0 DISABLE 1 200ms 2 2s RET MB D DISABLE E ENABLE RET Rev 0 1 08 00 page 277 of 450 RENESAS EXECUTION_MODE Examples 1 To enable the BREQ bus request signal inputs and store configuration information EM BREQ E C RET CONFIGURATION STORE OK Y N Y RET 2 To display the specified values of the current emulation mode and modify them in interactive mode command execution can be terminated by entering a period EM RET BREQ E TIME 20ns TRGU D TRGB D MON 1 MB D BREQ D DISABLE E ENABLE RET Input RET for no modification TIME 1 1 6us 2 406ns 3 20ns 1 RET Input 1 to set minimum measure time to 1 6 ps TRGU D DISABLE E ENABLE M MULTI RET Command is terminated and new settings become valid Rev 0 1 08 00 page 278 of 450 RENESAS FILL 7 2 20 FILL F Writes data to me
41. address 2 gt are specified the condition is satisfied when the address bus value is in the range from address 1 to address 2 Condition is satisfied when the address bus value provided by the NOT option setting is not equal to the specified value Only TCB can be set This condition can be masked A lt address 1 gt lt address 2 gt Data condition The condition is satisfied when the data bus TCA LD WD D lt value gt NOT value matches the specified value TCB When D WD and LD are specified the break condition is satisfied when the address is accessed in bytes words and longwords respectively In program fetch cycles the data condition is not satisfied irrespective of the data bus value When the byte access is specified as the data condition specify the address condition as well Condition is satisfied when the data bus value provided by the NOT option setting is not equal to the specified value Only TCB can be set This condition can be masked Read Write condition The condition is satisfied in read cycle R TCA R Read is specified or a write cycle W is specified TCB W Write Access type The condition is satisfied when the bus TCA DAT Execution cycle cycle type matches the specified type TCB Omitted All bus cycles Multiple access types cannot be specified TCC including program fetch cycle either select one of the access types on the left or specify none
42. e Execution count measurement This is counted up in the end address every time the start address of the specified subroutine is passed e Execution time measurement The measurement result includes the execution time of the subroutine called by the specified subroutine between the start address and end address 2 Start address m Time is measured End address Figure 1 27 Time Measurement Mode 2 Rev 0 1 08 00 page 170 of 450 RENESAS Time Measurement Mode 3 The execution time and count of the subroutine specified by the start address and end address The combination of the channels is fixed as follows e land2 e 3and4 e 5and6 e 7and8 Start address range set with channel 1 3 5 or 7 End address range set with channel 2 4 6 or 8 Figure 1 28 Time Measurement Mode 3 e Execution count measurement This is counted up in the end address every time the start address of the specified subroutine is passed e Execution time measurement The measurement starts from the program fetch cycles of the start address range and ends with the program fetch cycles of the end address range Accordingly the execution time of a subroutine called during this period is included Rev 0 1 08 00 page 171 of 450 RENESAS Specified Count Access Range count that the data in the user specification area has been accessed is measured in the subroutine specified by the start address and end address The combination
43. is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable care in preparing the information included in this do
44. rE KERES 126 1 3 Realtime OPERE SER ua Sa 136 1 31 Normal Mod uu 136 1 3 2 Cycle Reset desee Re aden aa 137 12 23 MM UICE 139 I MC edipi MEC 142 L4 Hardware Break uuu ke ET 142 1 42 Software Break u unu ERRORES S EEEE 151 1 4 3 Forced Break crniiin 155 1 5 Realtime Trace Function 155 1 5 1 Trace bu 155 1 5 2 Trace Condition Setting u a E NEE EEEE EEEE E E 157 1 5 3 Trace Display 162 1 6 Single Step teen E eae EE SEEE EEE 163 1 6 1 Single Step Execution certet ee sesa sa oi 163 1 6 2 Setting Display Information sees rennen 164 1 6 3 Termination of Single Step Function a ansnssssssssssssssssssssss 164 1 7 Execution Time Measurement esses eene nennen eene nenne tenerse netten nnne tenen 165 1 7 1 Execution Time Measurement 165 1 7 2 Subroutine Time Measurement and Number of Times Measurement 169 126 ros 174 1 9 SH7060 Control and Status CheckKk
45. 0000 00 055 00100005 250 AVE D 0000H 00M 05S 001000US 250NS SUBB I2 D 20 0 D 0000H 00M 10S 010305US 500 MAX D 0000H 00M 10S 010305US 250NS MIN D 0000H 00M AVE D 0000H 00M 10S 010305US 250NS SUBC D 20 0 D 0000H 00M 10S 010305US 500 AVE D 0000H 00M 10S 010305US 250NS SUBD AC D 10 0 D 0000H 00M 05S 001000US 250 lt ACCESS gt D 00005 SUBE SC D 20 0 D 0000H 00M 10S 010305US 500 lt CALL SUB gt D 00010 E COUNT S D 00005 S D 00010 105 01030505 250 5 S 100010 TOTAL RUN TIME D 0001H 00M 40S 022917US 000NS 5 To cancel all registered subroutines RET Rev 0 1 08 00 page 322 of 450 RENESAS QUIT 7 2 31 QUIT Q Terminates E8000 system program Command Format e Termination QUIT RET Description e Termination Terminates the E8000 system program and puts the emulator monitor in command input wait state QUIT RET START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T Example To terminate the E8000 system program Q RET START E8000 START E8000 FLASH MEMORY TOOL SET LAN PARAMETER START DIAGNOSTIC TEST S F L T _ H p n Rev 0 1 08 00 page 323 of 450 RENESAS RADIX 7 2 32 RADIX RX Specifies and displays radix for numeric input Command Format e Specification RADIXA lt radix gt RET e Display RADIX RET
46. 00000006 00000007 R8 15 00000008 00000009 0000000A 0000000B 00000000 0000000C 0000000D 000FFE00 DSR200000000 amp k A amp k k k k k COB A0G 00 A0 00000000 M0 00000000 X0 00000000 Y0 00000000 A1G 00 1 00000000 1 00000000 X1 00000000 Y1 00000000 00001004 BSR 00002020 Subroutine is not displayed 00001006 NOP SUBROUTINE END RET PC 0000100A 5 000000 0 000000000000 00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 00000001 00000002 00000003 00000004 00000005 00000006 00000007 R8 15 00000008 00000009 0000000A 0000000 00000000 0000000 00000000 000 00 DSR O00000000 amp amp x k amp k k k k k k k k k k k COB A0G 00 A0 00000000 M0 00000000 X0 00000000 Y0 00000000 A1G 00 1 00000000 1 00000000 X1 00000000 Y1 00000000 00001008 NOP ONE STEP END Rev 0 1 08 00 page 344 of 450 RENESAS 7 2 40 TRACE Displays trace information Command Format e Display lt start pointer gt lt end pointer gt BP lt display information gt RET lt start pointer gt Start pointer of trace display Default is the PTR option of the TRACE_DISPLAY_MODE command lt end pointer gt End pointer of trace display Default is the PTR option of the TRACE_DISPLAY_MODE command Trace up until the break condition is sa
47. 08 00 page 269 of 450 RENESAS DISASSEMBLE 2 To disassemble and display 16 instructions starting from address H 1000 and to disassemble and display furthermore 16 instructions by only entering RET DA 1000 ADDR 00001000 00001002 00001004 00001006 00001008 0000100A 0000100 0000100 00001 00001 00001 00001 00001 00001 00001 00001 01 FJ gt gt 00001020 00001022 00001024 Rev 0 1 08 00 page 270 of 450 RET CODE 1F01 6673 E001 3708 1F52 1F43 EQOA 6053 1658 5568 6053 880A 8902 001 380 0009 CODE 2100 2201 2302 MNEMONIC OPERAND MOV L RO G 4 R15 MOV R7 R6 MOV 1 RO SUB RO R7 MOV L R5 8 R15 MOV L R4 C R15 MOV 0A RO MOV R5 RO MOV L R5 20 R6 MOV L 20 R6 R5 MOV R5 RO CMP EQ 0A RO BT 00001020 MOV 01 0 ADD RO R8 NOP MNEMONIC OPERAND MOV B RO R1 MOV W RO R2 MOV L RO R3 RENESAS DUMP 7 2 17 DUMP D Displays memory contents Command Format e Display DUMPA start address A end address gt A lt number of bytes gt lt display unit gt RET lt start address gt Start address for memory dump lt end address gt End address for memory dump lt number of bytes gt Size of data for memory dump If is omitted this value is determined as lt end address gt or l
48. 2 FTP connection Connect the emulator to the designated host computer with the FTP command using the format shown below Enter the host computer name defined with the emulator monitor flash memory management tool command LH In addition enter the user name and password FTP lt host computer name gt RET Username lt user name gt RET Password lt password gt RET login command success FTP gt 3 Transfer data using the LAN_LOAD LAN_SAVE or LAN_VERIFY command after the FTP interface is established For details refer to the corresponding command descriptions 9 2 3 Notes on FTP Interface Before turning off the emulator power the FTP interface must be terminated using the BYE command Otherwise the host computer interface processing may remain uncompleted In this case the FTP interface cannot be re established correctly even if the emulator is re initiated Rev 0 1 08 00 page 392 of 450 RENESAS 9 3 LAN Commands This section provides details of LAN commands in the format shown in figure 9 1 Command Name No Command Name Abbr Function Command Format Function 1 Command input format Function 2 Command input format lt parameter 1 gt Parameter description 1 lt parameter 2 gt Parameter description 2 Description Function 1 Description of function 1 Function 2 Description of function 2 Notes Examples Command Name Full command name Abbr Abbreviated command name
49. 2 6 VERIEY V ite o a E ti oad ain ES 386 Section 9 Data Transfer from Host Computer Connected by LAN URSA gat este 389 OVI CC 389 92 Data Transfer 391 9 2 1 Setting the Data Transfer 391 9 2 2 Data PLE 392 9 23 Notes on FIP Interface onere OR 392 9 3 LAN Commands r l nere tek eer ait a ERE EUR Eee ke rares eub Peek eoe REE 393 9 3 1 ASC ASC L L Du ek YR Dae Er aie 395 9 3 2 BIN rene Sa 396 933 BYB BYB 5 xe EU 397 OBA CD CD uu 398 9 35 CLOSE CLOSE e ep ie 399 9 3 6 ETP trt ri ar er e Tete 400 9437 GAN GAN sau repe m et dg Ln ase 402 9 3 8 LAN HOST LH 403 9 3 0 LAN LOAD LL uu E a 404 9 310 LAN SAVE u y ha nu s a eret te 406 9 3 11 LAN VERIEY LV eere Det pet 408 9 3 12 TES ADEM 410 9 3 13 OPEN OP
50. 450 RENESAS INTFC_SAVE Notes 1 Data can be saved only in the internal memory areas or areas CSO to CS5 2 Verification is not performed after save If the program must be verified use the INTFC_VERIFY command For details refer to section 8 2 3 INTFC_VERIFY 3 If the specified file name already exists an overwrite confirmation message is displayed If N is entered to halt save some unnecessary characters may be output to the following line Example To save memory contents in the address range from H 7000 to H 7FFF in host computer file F11 MOT in the S type load module format IS 7000 7FFF 11 RET TOP ADDRESS 00007000 END ADDRESS 00007FFF Rev 0 1 08 00 page 379 of 450 RENESAS VERIFY 8 2 3 IV Verifies memory contents against host computer file Serial interface Command Format e Verification INTFC_VERIFY A lt offset gt lt load module type gt lt file name gt RET lt offset gt Value to be added to the address lt load module type gt Load module type R SYSROF type load module S S type load module H HEX type load module M Memory image file E ELF type load module Default SYSROF type load module lt file name gt File name in the host computer Description e Verification Verifies data transferred from the host computer against data in memory via the serial interface Use interface software IPW for the
51. 450 RENESAS Rev 0 1 08 00 page 186 of 450 RENESAS Section 3 7060 Function Support SH7060 has ten operating modes The emulator does not support operating modes FO F2 F3 and F7 This section describes how the emulator supports the SH7060 functions Note The crystal oscillator connected to the crystal oscillator terminals X0 and X1 on the EV chip board is connected to the oscillator on the EV chip board to perform clock oscillation This clock source is input to the EXTAL pin of the SH7060 Note that the crystal oscillator cannot be directly connected to the EXTAL and XTAL pins of the SH7060 3 1 Operating Mode Setting The emulator can select the operating mode and the bus width in the CSO area The operating mode is set by the MODE command Each SH7060 operating mode can be set by mode setting pins FWE and MDO to MD2 as shown in table 3 1 In the emulator two methods for specifying the operating mode are used one is the E8000 mode in which the desired operating mode can be set regardless of the setting of the mode setting pins on the user system and the other is the user mode in which the operating mode is determined by the setting of the mode setting pins on the user system For details refer to section 7 2 27 MODE When the user system is not connected the E8000 mode is automatically selected The emulator can also read the mode setting pin status of the user system in E8000 mode without affecting the emulat
52. 974 0534 Fax 1 713 974 0587 Mid Atlantic Hitachi Semiconductor America Inc 325 Columbia Turnpike Suite 203 Florham Park NJ 07932 Tel 1 973 514 2100 Fax 1 973 514 2020 Southeast Hitachi Semiconductor America Inc 4901 N W 17th Way Suite 302 Fort Lauderdale FL 33309 Tel 1 954 491 6154 Fax 1 954 771 7217 CANADA Ottawa Hitachi Canadian Ltd 320 March Road Suite 602 Kanata Ontario K2K2E3 Tel 1 613 591 1990 Fax 1 613 591 1994 Toronto Hitachi Canadian Ltd 6740 Campobello Road Mississauga Ontario L5N 2L8 Tel 1 905 826 1363 Fax 1 905 826 8818 Calgary Hitachi Canadian Ltd 10655 Southport Road S W Suite 460 Calgary Alberta T2W4Y1 Tel 1 403 278 1881 Fax 1 403 278 1810 EUROPE CONTINENTAL EUROPE Headquarters Hitachi Europe GmbH Electronic Components Group Dornacher StraBe 3 D 85622 Feldkirchen Munich Germany Tel lt 49 gt 89 9 9180 0 Fax lt 49 gt 89 9 29 30 00 Sales Offices North Germany Benelux Hitachi Europe GmbH Am Seestem 18 D 40547 D sseldorf Postfach 11 05 36 D 40505 D sseldorf Tel 49 211 52 83 0 Fax 49 211 52 83 779 Central Germany Hitachi Europe GmbH Friedrich List StraBe 42 D 70771 Leinfelden Echterdingen Tel 49 711 99085 5 Fax 49 711 99085 75 South Germany Austria Switzerland Hitachi Europe GmbH Dornacher StraBe 3 D 85622 Feldkirchen
53. BREAK Sets displays and cancels software breakpoints Command Format e Setting BREAK lt A software breakpoint to be set gt lt software breakpoint to be set gt RET e Display BREAK RET e Cancellation BREAK A lt software breakpoint to be cancelled gt lt software breakpoint to be cancelled gt RET software breakpoint to be set address A number of times gt address Software breakpoint address number of times Specifies the pass counts H 1 to H FFFF of the software breakpoint Default H 1 software breakpoint to be cancelled Address of the software breakpoint to be cancelled Note When an odd address is specified it is rounded down to an even address Description e Setting Sets a software breakpoint at the specified address by replacing its contents with a break instruction H 0000 GO command emulation terminates when the break instruction is executed The instruction at the software breakpoint itself is not executed Up to four breakpoints can be set each time this command is issued and a maximum of 255 breakpoints can be set in total A software breakpoint can only be set in a RAM area including standard emulation memory because the contents of the specified address is replaced with a break instruction to cause a break Do not set software breakpoints at any of the addresses below Address that holds an illegal instruction H 0000 e Areas other than CSO to CS5 excluding i
54. C 449 Rev 0 1 08 00 page x of xvi RENESAS Figures Part I Figure 1 1 Emulator for the 7060 4 Figure 2 1 Emulator Hardware Components eese eene 12 Figure 2 2 E8000 Station Front Panel sees eene nemen nennen 13 Figure 2 3 E8000 Station Rear 44040404 0 00 14 Figure 2 4 Control Board 16 Figure 2 5 EV Chip Board 57060 2 440222224 1 1 00000001000000010 17 Figure 2 6 User System Interface 19 Figure 2 7 Emulator Software Components eesessssssseeseeeeeeeen eene 20 Figure 2 8 System Configuration Using a LAN Interface 2 22 Figure 2 9 System Configuration Using an RS 232C or Bidirectional Parallel Interface 23 Figure 2 10 System Configuration Using a PC Interface Board esses 24 Figure 2 11 System Configuration Using a LAN Adapter 25 Figure 3 1 Emulator Preparation Flow 28 Figure 3 2 Connecting the Device Control Board sese 30 Figure 3 3 Connecting Trace Cables to the E8000 Station sse 33 Figure 3 4 Connecting Trace Cables to the EV Chip Board sse 35 Figure 3 5 User System Interface Cable
55. CONDI TION TION TION TION TION TION TION Condition UBC1 _UBC2 _UBC3 _UBC4 _A 1 to 8 _B 1 to 8 _C 1 to 8 Address O O O O O condition Data O O O O O condition Read O O O O O write condition Access type O specification Probe O condition External O O interrupt condition Pass count O Delay count specifi cation Sequential break Note Only the BREAK_CONDITION_B7 can be specified for the delay count specification Rev 0 1 08 00 page 142 of 450 RENESAS Address Bus Value break occurs when SH7060 address bus value matches the specified condition Break condition When the address bus value is 1204 Specification A 1204 User program 1200 NOP MOV instruction is fetched Break 1202 NOP i Break occurs when the condition _ y 1204 MOV L R1 R2 is satisfied Figure 1 5 Break with Address Bus Value Data Bus Value A break occurs when the SH7060 data bus value matches the specified condition The emulator checks both program fetch and data access for the condition The data size must be selected from longword access LD word access WD or byte access D Rev 0 1 08 00 page 143 of 450 RENESAS Break condition When the data bus value is 12 Specification D 12 User program NOP Break NOP Break occurs when the condition y MOV 12 R1 o gt 12 is fetched is satisfied MOV R1 R2 Figure
56. Connector a nasnsssssssssss 36 Figure 3 6 External Probe Insertion Opening sees 38 Figure 3 7 External Probe Connector isse ense tbe 39 Figure 3 8 Installing the Crystal Oscillator sees 4 Figure 3 9 Connecting the System Ground 2 22 0 000 43 Figure 3 10 Connecting the Frame Ground 44 Figure 3 11 Console Interface 5 45 Figure 3 12 Allocatable Memory Area of PC Interface 2 2222 49 Figure 3 13 PC Interface Board Switch nennen nene 50 Figure 3 14 Installing the PC Interface Board sss 52 Figure 3 15 Connecting the E8000 Station to the PC Interface 54 Figure 3 16 Ethernet Interface ete eerte abe un e bre RE 59 Figure 3 17 Cheapernet Interface Ro lege enar e bab eigen 60 Figure 3 18 RS 232C Interface ect t er Pre Pa De dade 61 Figure 3 19 Bidirectional Parallel Interface seen 62 Figure 3 20 IPW WIn nQ0W PER 63 Figure 3 21 File Menu and Setting 64 Figure 3 22 Communication Setting
57. Data bus value According to the SH7060 access size longword word and byte values are displayed at the digits corresponding to the bus lines through which the data is accessed For bus lines through which no data is accessed asterisks are displayed c Memory area type Display Description IO Internal area access INT Internal area access EXT CS0 to CS5 area access including reserved area access d Read write type Display Description R Data read Data write MCU status Display Description PRG Instruction fetch cycle including PC relative data access cycle DAT Data access cycle except for PC relative data access cycle Rev 0 1 08 00 page 348 of 450 RENESAS TRACE g NMI signal level 0 low level 1 high level h RES signal level low level 1 high level i BREQ signal level 0 low level 1 high level J Vcc voltage Display Description 0 Vcc voltage is 2 6 V or less the MCU is not operating correctly 1 Vcc voltage is more than 2 6 V k External probe signal level 0 low level 1 high level 1 Time stamp display Displayed only when time stamp display is enabled with the TIME option TIME E specification of the TRACE_DISPLAY_MODE command Time stamp display is dmn The number of clock cycles required from the end of the previous bus cycle to the end of this bus cycle Up to 255 H FF clocks are counted If the number exceeds 255
58. EXECUTION_MODE BREQ D RET e To enable the BREQ signal inputs during emulator operation and user program execution EXECUTION_MODE BREQ E RET Specifies the minimum time to be measured for GO command execution e To set the minimum time to 1 6 us EXECUTION MODE 1 RET To set the minimum time to 406 ns EXECUTION MODE TIME 2 RET e To set the minimum time to 20 ns EXECUTION MODE TIME 3 RET Rev 0 1 08 00 page 275 of 450 RENESAS EXECUTION_MODE Specifies whether to continue program execution and whether to output a pulse from the trigger output pin when hardware break conditions set by the BREAK_CONDITION_ and UBC2 commands are satisfied e To terminate program execution and not output a pulse when hardware break conditions are satisfied EXECUTION MODE TRGU D RET To terminate program execution and output a pulse when hardware break conditions are satisfied EXECUTION MODE RET e To continue program execution and output a pulse when hardware break conditions are satisfied EXECUTION MODE TRGU E RET Specifies whether to output a pulse from the trigger output pin when conditions set by the BREAK CONDITION or TRACE CONDITION command are satisfied a trigger when the condition set by the BREAK CONDITION B or TRACE CONDITION B command is satisfied EXECUTION MODE TRGB 1 RET To output a trigger wh
59. EXECUTION_MODE command the maximum measurable time is 488 124 or 6 hours where the minimum measurement time is 1 6 us 406 ns or 20 ns respectively If the period exceeds the maximum measurable time it is displayed as k Cause of termination Displayed register contents show values at program termination not the current values Example To display execution results RT RET 00005 60 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 5 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000FF 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR200000000 Xxx kk oko KK KK e e e KK KK COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 00S 002241US 000NS BREAKPOINT Rev 0 1 08 00 page 329 of 450 RENESAS STATUS 7 2 36 STATUS ST Displays emulator execution status Command Format e Display STATUS RET Description e Display Displays emulator execution status in the following format MODE a RADIX b BREAK c HOST d STEP INFO REG e A f SP g CLOCK h MEM S i MODE xx SH7060 operating mode specified with the MODE command b RADIX xxx Default input number type BIN Binary OCT Octal DEC
60. Emulator IP address setting T Diagnostic program initiation Rev 0 1 08 00 page 78 of 450 RENESAS 3 6 2 S S Command Format Initiation Description Ini tiation Initiates the E8000 system program S RET Initiates the E8000 system program Example To initiate the E8000 system program 5 8000 800 0 S SH Co CO S F L T 7060 E8000 pyright C MEMORY TOOL ET LAN PARAMETER ART DIAGNOSTIC TEST S RET HS7060EDD81SF Vm n Hitachi Ltd 1998 Licensed Material of Hitachi FIGURATION FILE LOADING HARDWARE REG I Ltd STER READ WRITE CHECK RMWARE SYS TE M LOADING ULATOR FIRI RESET BY OCK 7 5M WARE TEST E8000 2 DE 12 MD5 0 1F U LATION MEMORY LB 4096KB RENESAS Rev 0 1 08 00 page 79 of 450 3 6 3 Initiates the flash memory management tool Command Format e Flash memory F RET management tool Description e Flash memory management tool Initiates the flash memory management tool The flash memory management tool can use the commands listed in table 3 9 Table 3 9 Flash Memory Management Tool Commands Command Function DI
61. FLASH MEMORY TOOL ET LAN PARAMETER ART DIAGNOSTIC TEST S F L T RET 8000 5 amp MAINTENANCE PROGRAM DIAG SYS Version 1999 Copyright Hitachi LTD 1999 Please key in TEST PARAMETE OPERETOR TEST EXECUTE Y N Rev 0 1 08 00 page 90 of 450 RENESAS 3 7 System Program Installation 3 7 1 E8000 System Disk The emulator contains one floppy disk SH7060 E8000 SYSTEM 1 SYSTEM HS7060EDD81SF Vm n 2 PC I F HS8000EIWO1SF Vm n 3 DIAGNOSTIC TEST Vm nn XX XX XX E8000 Figure 3 27 8000 System Disk The E8000 system disk with a 1 44 Mbyte format is for PC This floppy disk contains the following six files e E8000 SYS SHCNF706 SYS SHDCT706 SYS e SETUP CC e IPW EXE DIAG SYS E8000 S YS SHCNF706 SYS and SHDCT706 SYS are system programs that must be installed to the emulator flash memory with emulator monitor command F flash memory management tool initiation SETUP CC is a file for writing the system programs via the parallel interface IPW EXE is a file containing interface software that runs on the Microsoft Windows 95 and must be installed to the host computer It is used when the host computer and the RS 232C interface is connected Rev 0 1 08 00 page 91 of 450 RENESAS 3 7 2 Installation use the emulato
62. FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T _ RENESAS Manual System Program Load by Bidirectional Parallel Interface To use the emulator files E8000 SYS SHCNF706 SYS and SHDCT706 SYS must be installed in the emulator flash memory If the emulator is connected to the host computer via the bidirectional parallel interface the E8000 system program can be loaded with the following procedures Note that the E8000 system disk is assumed to be inserted in drive A of the host computer It takes approximately one minute Operations 1 Initiate IPW in the E8000 system floppy disk Power on the emulator For details on the power on procedures refer to section 3 5 2 Power On Procedures for RS 232C Interface Emulator monitor command prompt Enter F RET to initiate the flash memory management tool The emulator displays prompt FM gt and waits for a flash memory management tool command Enter SL RET to load the system program Enter 1 RET to select PC as the host computer type and 2 RET to select parallel interface as the interface method Enter Y RET to allow system program E8000 SYS to be loaded Then enter the parallel transfer command to load E8000 SYS in drive A on the host computer to the emulator flash memory Display Message START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAM
63. Function Command function Command Format Command input format for each function Description Function and usage in detail Notes Warnings and restrictions for using the command If additional information is not required this item is omitted Examples Command usage examples Figure 9 1 LAN Command Description Format RENESAS Rev 0 1 08 00 page 393 of 450 Symbols used the command format have following meanings a b lt gt E RET Parameters enclosed by can be omitted One of the parameters enclosed by and separated by that is either a or b must be specified Contents shown in are to be specified or displayed The entry specified just before this symbol can be repeated Indicates a space Used only for command format description Pressing the RET key Although italic and bold characters are used throughout this manual to indicate input it is not used in the command format sections of these descriptions Rev 0 1 08 00 page 394 of 450 RENESAS ASC 9 3 1 ASC ASC Specifies the file type as ASCII Command Format e Setting ASC RET Description e Setting Specifies the file type as ASCII in the FTP interface To load a SYSROF type load module file binary must be specified with the BIN command Example To set the file type as ASCII in the FTP interface gt ASC RET asc command success FTP gt Rev 0 1 08 00 page 39
64. H 1D000000 H 1 DFFFFFF 16 Mbytes H 9D000000 H 9DFFFFFF LBC14 16 Mbytes H 1E000000 H 1 EFFFFFF 16 Mbytes H 9E000000 H 9EFFFFFF LBC15 16 Mbytes H 1FO000000 H 1 FFFFFFF 16 Mbytes H 9F000000 H 9FFFFFFF Rev 0 1 08 00 page 198 of 450 RENESAS Table 3 4 Memory Blocks Extended Mode with ROM cont Register EMRD Bit Capacity Address Space Type Memory Type LBDO 16 Mbytes H 40000000 H 40FFFFFF CS4 DRAM 16 Mbytes H C0000000 H COFFFFFF synchronous DRAM LBD1 16 Mbytes H 41000000 H 41FFFFFF 16 Mbytes H C1000000 H C1FFFFFF LBD2 16 Mbytes H 42000000 H 42FFFFFF 16 Mbytes H C2000000 H C2FFFFFF LBD3 16 Mbytes H 43000000 H 43FFFFFF 16 Mbytes H C3000000 H C3FFFFFF LBD4 16 Mbytes H 44000000 H 44FFFFFF CS5 DRAM 16 Mbytes H C4000000 H C4FFFFFF synchronous DRAM LBD5 16 Mbytes H 45000000 H 45FFFFFF 16 Mbytes H C5000000 H C5FFFFFF LBD6 16 Mbytes H 46000000 H 46FFFFFF 16 Mbytes H C6000000 H C6FFFFFF LBD7 16 Mbytes H 47000000 H 47FFFFFF 16 Mbytes H C7000000 H C7FFFFFF LBD8 16 Mbytes H 48000000 H 48FFFFFF CS10 DRAM 16 Mbytes H C8000000 H C8FFFFFF synchronous DRAM LBD9 16 Mbytes H 49000000 H 49FFFFFF 16 Mbytes H C9000000 H C9FFFFFF LBD10 16 Mbytes H 4A000000 H 4AFFFFFF 16 Mbytes H CA000000 H CAFFFFFF LBD11 16 Mbytes H 4B000000 H 4BFFFFFF 16 Mbytes H CB000000 H CBFFFFFF LBD12 16 Mbytes H 4C000000 H ACFFFFFF CS11 DRAM 16 Mbytes H CC000000 H CCFFFFFF synchron
65. Mbytes H CE000000 H CEFFFFFF LBD15 16 Mbytes H 4F000000 H 4FFFFFFF 16 Mbytes H CF000000 H CFFFFFFF RENESAS Rev 0 1 08 00 page 195 of 450 Table 3 4 Memory Blocks Extended Mode with Register Bit Capacity Address Space Type Memory Type 16 Mbytes H 00000000 H O0FFFFFF Internal ROM 16 Mbytes H 80000000 H 80FFFFFF EMRA SBO 256 kbytes H 01000000 H 0103FFFF CSO Normal space 256 kbytes H 81000000 H 8103FFFF burst ROM SB1 256 kbytes H 01040000 H 0107FFFF multiplexed 1 space 256 kbytes H 81040000 H 8107FFFF SB2 256 kbytes H 01080000 H 010BFFFF 256 kbytes H 81080000 H 810BFFFF SB3 256 kbytes H 010C0000 H 010FFFFF 256 kbytes H 810C0000 H 810FFFFF 5 4 256 kbytes H 01100000 H 0113FFFF 256 kbytes H 81100000 H 8113FFFF SB5 256 kbytes H 01140000 H 0117FFFF 256 kbytes H 81140000 H 8117FFFF SB6 256 kbytes H 01180000 H 011BFFFF 256 kbytes H 81180000 H 811BFFFF SB7 256 kbytes H 011C0000 H 01 1 FFFFF 256 kbytes H 811C0000 H 811FFFFF SB8 SB9 2 Mbytes H 01200000 H 013FFFFF 2 Mbytes H 81200000 H 813FFFFF SB10 2 Mbytes H 01400000 H 015FFFFF 2 Mbytes H 81400000 H 815FFFFF SB11 2 Mbytes H 01600000 H 017FFFFF 2 Mbytes H 81600000 H 817FFFFF SB12 2 Mbytes H 01800000 H 019FFFFF 2 Mbytes H 81800000 H 819FFFFF SB13 2 Mbytes H 01A00000 H 01BFFFFF 2 Mbytes H 81A00000 H 81BFFFFF SB14 2 Mbytes H 01C00000 H 01DFFFFF 2 Mbytes H 81C
66. PA 1 PA 2 8 to 25 1 to 23 1 to 23 PCO to 25 PCO to 25 PDO to 31 PDO to 31 PF1 to 7 PF1 107 PG29 to 31 PG29 to 31 PHO to 1 PHO to 1 MAX709R MAX709R AQV251A 3Vcc 5Vcc MAX709R j Figure 4 2 User System Interface Circuits Rev 0 1 08 00 page 207 of 450 RENESAS SH7060 User system LVTH163244 x2 LVTH16244 Vcc LVTH244 4 47 E x2 EPM7064 Vcc E 47 KQ IRQO to 7 EPM7064 47 Q PLLVCC PLLVCC PLLCAP1 PLLCAP1 PLLGND gt PLLCAP2 PLLCAP2 NC PLLGND AN0 to 7 AN0 to 7 Figure 4 2 User System Interface Circuits cont Rev 0 1 08 00 page 208 of 450 RENESAS User system SH7060 EPM7192 EPM7192 MDO to 5 MDO to 5 EPM7064 LVT16244 Vec VHC14 2 LVT16374 WDTOVF LVT16244 Figure 4 2 User System Interface Circuits cont Rev 0 1 08 00 page 209 of 450 RENESAS User system External probes EXT1 to 4 Trigger signal output and execution state signal input Figure 4 2 User System Interface Circuits cont Rev 0 1 08 00 page 210 of 450 RENESAS Section 5 Troubleshooting The emulator internal system test checks the emulator s internal RAM and registers at power on and at system program initiation 5 1 Internal System Test Internal System Test at Power On The emulator checks its internal RAM and registers at power on While tests
67. PVcc 4 4 V 3 3 V is applied 2 When PVcc gt 4 4 V 5 0 V is applied 3 14 A D Converter and D A Converter Analog input pins and analog output pins are directly connected to the user system from the 5 7060 installed on the EV chip board Therefore these pins are valid in the emulator command input wait state as well as during emulation The A D converter and D A converter have AVcc AVss and ADTRG pins as well as the analog input pins and analog output pins Because these converters operate with an independent power supply connect AVcc the power supply pin to the A D and D A converter power supplies on the user system I O port pins are also valid in the emulator command input wait state or during emulation Notes 1 When not using the A D converter connect AVcc to Vcc 2 Because the user system interface cable printed circuit boards and protective circuits are connected between the SH7060 and the user system in the emulator pod the conversion precision is lower than that of the SH7060 At final debugging of the user system using the A D converter use the actual SH7060 series F ZTAT microcomputer chip Rev 0 1 08 00 page 203 of 450 RENESAS Rev 0 1 08 00 page 204 of 450 RENESAS Section 4 User System Interface The emulator is connected to the user system with the EV chip board Probe signal trace and break can be enabled by connecting four external probes to the user system The trigger output probe can ou
68. Parameter description 1 parameter 2 Parameter description 2 Description Function 1 Description of function 1 Function 2 Description of function 2 Notes Examples Command Name Full command name Abbr Abbreviated command name Function Command function Command Format Command input format for each function Description Function and usage in detail Notes Warnings and restrictions for using the command If additional information is not required this item is omitted Examples Command usage examples Figure 7 1 Emulation Command Description Format Parameters enclosed by can be omitted Symbols used in the command format have the following meanings a b One of the parameters enclosed by and separated by that is either a or b must be specified lt gt Contents shown in lt gt are to be specified or displayed The entry specified just before this symbol can be repeated A Indicates a space Used only for command format description RET Pressing the RET key Although italic and bold characters are used throughout this manual to indicate input it is not used in the command format parts of these descriptions Rev 0 1 08 00 page 223 of 450 RENESAS register 7 2 1 lt gt lt register gt Modifies and displays register contents Command Format e Modification direct mode lt register gt A lt data gt RET Modif
69. RESULT RT Displays execution results Command Format Display RESULT RET Description e Display Displays register contents execution time and the GO STEP or STEP_OVER command termination cause The display format is as follows RESULT RET PC 00005C60 5 000000 0 000000000000 00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000FF 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR O0000000 eR KKK KKK KK KKK KK KKK COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 2 gt 1 D 0000H 00M 00S 000000US 000NS 00 0 E COUNT D 00000 b MAX D 0000H 00M 00S 000000US 000NS MIN D 0000H 00M 00S 000000US 000NS d AVE D 0000H 00M 00S 000000US 000NS e I TIME 4 gt 3 D 0000H 00M 00S 000000US 000NS 00 0 E COUNT D 00000 MAX D 0000H 00M 00S 000000US 000NS g MIN D 0000H 00M 00S 000000US 000NS h AVE D 0000H 00M 00S 000000US 000NS i RUN TIME D 0000H 00M 00S 000018US 000NS 7 cause of termination k a The register contents at emulation termination b Time interval measurement modes 1 2 and 3 display the execution time from satisfaction of BCU2 condition to the satisfaction of BCU1 condition Time i
70. Refer to the debugger and IBM PC manuals and specify a correct file name INTFC ERROR TIMEOUT ERROR A timeout error has occurred during data transfer from the debugger Check the cable connection and re transfer Rev 0 1 08 00 page 429 of 450 RENESAS Rev 0 1 08 00 page 430 of 450 RENESAS Part II Appendix RENESAS RENESAS Appendix Connectors A 1 Serial Connector Figure A 1 shows the serial connector pin alignment in the emulator station Table A 1 lists signal names and their usage Figure A 1 Serial Connector Pin Alignment at the Emulator Station Table A 1 Signal Names and Usage of Serial Connector Pin No Signal name Usage 1 Not connected 2 Receive Data RD Data receive line 3 Transmit Data TD Data transmit line 4 Data Terminal Ready High when emulator s power is on DTR 5 Ground GND Connected to the emulator s frame ground 6 Data Set Ready DSR Not connected 7 Request To Send RTS High when emulator s power is on 8 Clear To Send CTS Not connected 9 Not connected Rev 0 1 08 00 page 433 of 450 RENESAS 2 Parallel Connector Figure A 2 shows the parallel connector pin alignment at the emulator station Table A 2 lists signal names 79 gt gt Z m Figure A 2 Parallel Connector Pin Alignment at the Emulator Station Rev 0 1 08 00 page 434 of 450 RENESAS Table A 2 Signal Names of Parallel Connector
71. Rev 0 1 08 00 page 356 of 450 RENESAS TRACE CONDITION Table 7 24 Specifiable Conditions TRACE CONDITION cont Item and Input Format External probe condition PRB lt value gt Commands Description that can be Set The condition is satisfied when all of the TCA emulator s external probe signals match the TCB specified values Specify lt value gt as 1 byte data Each bit corresponds to a probe number as follows 3 2 1 0 Bit x X X X lt Specified value 4 3 2 1 lt Probe number x 0 Low level 1 High level This condition can be masked External interrupt condition 1 NMI L or NMI H The condition is satisfied when the NMI signal TCA matches the specified level TCB NMI or NMI L The condition is satisfied when NMI is low NMI H The condition is satisfied when NMI is high Count setting COUNT lt value gt value H 1 to H FFFF This is set in conjunction with address data TCB read write access type and external probe conditions and external interrupt conditions 1 and 2 The true condition is satisfied when the set condition satisfies the set number of events Delay count setting DELAY lt value gt value H 1 to H 7FFF This is set in conjunction with address TCB condition data condition read write condition access type external probe condition external interrupt condition 1 and count setting When the condition is
72. and bit 0 is zero in the byte data condition BREAK CONDITION 1 A H 3000000 D B 0 RET Table 7 7 Mask Specifications BREAK CONDITION Radix Mask Unit Example Mask Position Allowed Condition Binary 1 bit B 01 1010 Bits 0 and 5 are masked Data D WD LD or PRB Hexa 4 bits H F 50 Bits 15 to 8 are masked Data D WD LD or PRB decimal If a hardware break condition is satisfied emulation may stop after two or more instructions have been executed Rev 0 1 08 00 page 244 of 450 RENESAS BREAK CONDITION Display Displays specified conditions The character string that was input for specifying conditions will be displayed as it was input If the break number is omitted all specified break conditions for that break type are displayed If no break condition is specified a blank is displayed BREAK CONDITION B RET BCBI B1 break setting BCB2 B2 break setting BCB3 B3 break setting BCBA B4 break setting 5 B5 break setting BCB6 B6 break setting BCB7 B7 break setting BCBS lt 8 break setting Cancellation Cancels specified conditions When break numbers 1 to 8 are omitted all break conditions are cancelled Cancels all conditions for the BREAK CONDITION A command BREAK CONDITION A RET Cancels BREAK CONDITION 1 conditions BREAK CONDITION A1 RET Notes 1 When conditions have already been set
73. and display bus cycle information and instruction mnemonic information in bus cycle units T D 20 D 16 BP B RET BP AB DB MA RW STS NMI RES BRQ VCC PRB D 000020 00002014 AFF40009 EXT R PRG 00002014 BRA 00002000 00002016 NOP D 000019 00002000 A0060009 EXT R PRG 00002000 BRA 00002010 00002022 D 000018 00002010 400 0009 EXT R 00002010 JSR GRO 00002012 NOP D 000017 00002020 21020009 EXT R PRG 00002020 MOV L RO R1 00002022 NOP D 000016 00002024 6403000B EXT R PRG 00002024 RO R4 00002026 RTS To specify a display range by bus cycle pointers and display bus cycle information in bus cycle units T D 20 D 16 BP RET BP AB DB MA RW STS NMI RES BRQ VCC PRB D 000020 00002014 AFF40009 EXT PRG 1 1 1 1 1111 D 000019 00002000 A0060009 EXT R PRG 1 1 1 1 D 000018 00002010 400 0009 EXT PRG 1 1 L 1111 D 000017 00002020 21020009 EXT R PRG 1 1 1 L JATI D 000016 00002024 6403000B EXT R PRG 1 1 1 1 41111 Rev 0 1 08 00 page 351 of 450 RENESAS TRACE_CONDITION_A B C 7 2 41 TRACE CONDITION Specifies displays and cancels a trace TCA TCB TCC condition Command Format e Setting TRACE_CONDITION_ A B C 1 2 3 4 5 6 7 8 AS lt start address gt lt end address gt ST RET Subroutine trace TRACE_CONDITION_ A B C 1 2 3 4 5 6 7 8 A lt condition gt A lt condition gt A lt condition gt R RET Range tr
74. any CABLES make sure that pin 1 on both sides are correctly aligned Supply power according to the power specifications and do not apply an incorrect power voltage Use only the provided power cable Rev 0 1 08 00 page V of VIII RENESAS Warnings Emulator Usage Warnings described below apply as long as you use this emulator Be sure to read and understand the warnings below before using this emulator Note that these are the main warnings not the complete list A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES or PARTS Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator product or will result in PERSONAL INJURY The USER PROGRAM will be LOST Rev 0 1 08 00 page VI of VIII RENESAS CAUTION Place the emulator station and EV chip board so that the trace cables are not bent or twisted A bent or twisted cable will impose stress on the user interface leading to connection or contact failure Make sure that the emulator station is placed in a secure position so that it does not move during use nor impose stress on the user interface Rev 0 1 08 00 page VII of VIII RENESAS CAUTION This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interferen
75. as 4 byte values before the expression is converted Therefore the expression cannot be converted correctly Rev 0 1 08 00 page 262 of 450 RENESAS Examples 1 2 To convert hexadecimal data H 7F CV H 7F RET H 7F 127 Q 177 1111111 X 0 0000000591 To convert the expression CV 31 0 16 RET H 41 D 65 01101 B 1000001 X 0 0000000303 RENESAS CONVERT Rev 0 1 08 00 page 263 of 450 DATA_CHANGE 7 2 14 DATA CHANGE DC Replaces memory data Command Format Replacement DATA_CHANGEA lt data 1 gt A lt data 2 gt A lt start address gt A end address gt A lt number of bytes gt lt size gt AY RET data 1 Old data data 2 New data start address Start address of the memory area to be changed end address End address of the memory area to be changed number of bytes number of bytes in the memory area to be changed size Length of data B 1 byte W 2bytes L 4 bytes Default 1 byte Y Specify Y if a confirmation message is not necessary If Y is specified data in all assigned areas is replaced without a confirmation message Description Replacement Replaces data 1 in the specified memory area set by the start address and end address gt or the number of bytes with data 2 and verifies the results If option Y is specified data is replaced without confirmation messages If option Y
76. break is specified the user program is stopped only when conditions BREAK CONDITION 2 3 are satisfied in the order 3 2 1 Sequential break mode 3 When BREAK CONDITION UBC sequential break is specified the user program is stopped only when conditions BREAK CONDITION 2 3 4 are satisfied in the order 4 3 2 1 Rev 0 1 08 00 page 283 of 450 RENESAS GO e Timeout break mode A break occurs when the timeout or execution count condition specified with the PERFORMANCE ANALYSIS command is satisfied The restrictions for each mode at emulation are listed in table 7 13 Table 7 13 Restrictions for Realtime Emulation Modes Modes Restrictions Cycle reset mode Software breakpoints specified with the BREAK or BREAK SEQUENCE command are ignored Hardware break conditions specified with the BREAK CONDITION A B C or BREAK CONDITION UBC command are ignored All conditions specified with the TRACE CONDITION command are ignored Parallel mode cannot be entered Break prohibition mode Software breakpoints specified with the BREAK or BREAK SEQUENCE command are ignored Hardware break conditions specified with the BREAK CONDITION A B C or BREAK CONDITION UBC command are ignored Time interval measurement modesl 2and3 Software breakpoints specified with the BREAK or SEQUENCE command are ignored Hardware break conditions specified with the BREAK_CONDITION_A
77. cannot be included in the alias definition contents Rev 0 1 08 00 page 228 of 450 RENESAS ALIAS Examples 1 To define the alias name for the command to display the contents of register FRCOH as SHOW_FRCOH ALIAS SHOW_FRCOH D 0D000042 1 B RET 2 To display all defined aliases ALIAS RET SHOW_FRCOH D 00000042 1 B SHOW FRCOL 00000043 1 B LT 11 test abs 3 To cancel the alias with alias name LT ALIAS LT RET Rev 0 1 08 00 page 229 of 450 RENESAS ASSEMBLE 7 2 4 ASSEMBLE A Assembles program one line each Command Format e Line assembly ASSEMBLE A lt address gt RET lt address gt The address where the object program is to be written Description e Line assembly After displaying the memory contents at the specified address the emulator enters subcommand input wait state Line input in subcommand input wait state is assembled into machine code which is written to memory Assembly is continued until a period finishing subcommand is entered The input and output formats are as follows ASSEMBLE address RET XXXXXXXX lt disassemble display gt XXXXXXXX lt subcommand gt RET XXXXXXXX lt subcommand gt RET a b a Address When an odd address is specified it is rounded down to an even address b Subcommand Input the contents shown in table 7 2 When an assembly sentence is input a space of one character or more must be input at
78. command input or start and end of logging acquisition can be specified when the emulator is in command input wait state the emulator prompt is or Automatic Command Input The file from which commands are to be input command file is specified with lt and lt file name gt when the emulator is in command input wait state Do not insert a space between lt and lt file name gt Example lt FILENAME RET Commands are sequentially read from the specified command file and transferred to the emulator As in the following example when the command file is specified commands in that file are sequentially executed Commands requiring further input such as the MEMORY command can be read from a file and executed Example File contents f 400000 43ffff O w m 400000 1 aaaaaaaa 55555555 12345678 400000 1 Execution results f 400000 43ffff 0 1 m 400000 1 00400000 00000000 aaaaaaaa 00400004 00000000 55555555 00400008 00000000 12345678 0040000C 00000000 400000 1 lt ADDRESS gt lt D A T A gt lt ASCII CODE gt 00400000 AAAAAAAA 55555555 12345678 00000000 UUUU 4Vx 00400010 00000000 00000000 00000000 00000000 m 00400020 00000000 00000000 00000000 00000000 Rev 0 1 08 00 page 68 of 450 RENESAS command file reading does not terminate until the end of the file is detected or the CTRL keys are pressed If the CTRL C keys are pressed the c
79. condition of the TRACE CONDITION command When a bit is masked the condition is satisfied irrespective of its bit value To specify the mask specify each digit to be masked at input as an asterisk Table 7 25 shows address mask specification examples Example The following condition is satisfied when the lower four bits of the address condition are not specified TRACE CONDITION A1 A H 400000 S RET Table 7 25 Address Mask Specifications TRACE CONDITION Radix Mask Unit Example Mask Position Binary 1 bit B 01101 Bits 2 to 0 are masked Hexadecimal 4 bits H F50 Bits 11 to 0 are masked Note When lt address 2 gt is not specified for an address condition lt address 1 gt can be consecutively masked from the lowest bit It is not possible to mask any desired bit position as shown in the following examples Examples Allowed TRACE CONDITION A1 H 10 R Not allowed TRACE CONDITION A1 A 1 00 R TRACE CONDITION A1 A H 100 10 R Rev 0 1 08 00 page 358 of 450 RENESAS TRACE_CONDITION_A B C A bit mask in 1 bit or 4 bit units can be specified for the data or PRB condition of the TRACE CONDITION A B C command When a bit is masked the condition is satisfied irrespective of its bit value To implement the mask specify each digit to be masked at input as an asterisk Table 7 26 shows these mask specification examples Example following condition is satisfie
80. conditions set with the above commands before setting the break conditions Rev 0 1 08 00 page 360 of 450 RENESAS TRACE_CONDITION_A B C Examples 1 To specify a trace stop condition TCA1 4320 S RET 2 To specify a range trace condition TCA2 A 2000 27FF R RET 3 To specify a subroutine range trace condition TCB1 S 1000 13FF A 2000 27FF SR RET 4 To display specified trace conditions RET 1 A 4320 S TCA2 A 2000 27FF R TCA3 TCA4 5 6 TOAT TCA8 5 To cancel the trace condition specified with the TRACE_CONDITION_A3 command TCA3 RET 6 To cancel all trace conditions specified with the TRACE CONDITION A command TCA RET Rev 0 1 08 00 page 361 of 450 RENESAS TRACE_DISPLAY_MODE 7 2 42 TRACE_DISPLAY_MODE Specifies and displays trace information TDM display mode Command Format e Setting TRACE_DISPLA Y_MODEAPTR lt start pointer lt end pointer gt A lt display item gt D E A lt display item gt D E C RET e Display TRACE_DISPLAY_MODE RET lt start pointer gt Default start pointer for trace information display and search emulator shipment D 4095 lt end pointer gt Default end pointer for trace information display and search emulator shipment D 4095 lt display item gt Information to be displayed at trace information display A address bus D data bus MA memory area type
81. connected to the emulator This enables the following transmission of host computer load module files e Loads a load module file in the host computer to user system memory e Saves data in the user system memory as a load module file in the host computer Commands listed in table 8 1 can be used to transfer data between the emulator and host computer Table 8 1 Host Computer Related Commands Usable Unusable Command Function in Parallel Mode INTFC_LOAD Loads program from host computer Unusable Serial interface INTFC_SAVE Saves program in host computer Unusable Serial interface INTFC_VERIFY Verifies memory contents against host computer file Unusable Serial interface LOAD Loads program from host computer Unusable Bidirectional parallel interface SAVE Saves program in host computer Unusable Bidirectional parallel interface VERIFY Verifies memory contents against host computer file Unusable Bidirectional parallel interface Rev 0 1 08 00 page 373 of 450 RENESAS 8 2 Host Computer Related Commands This section provides details of host computer related commands in the format shown in figure 8 1 Command Name No Command Name Abbr Function Command Format Function 1 Command input format Function 2 Command input format parameter 1 Parameter description 1 parameter 2 Parameter description 2 Description Function 1 Description of func
82. created 02 Insufficient Buffer The internal buffer is insufficient 03 Socket not Support The requested function is not supported 04 Socket is Already The socket has already been connected 05 time out error A timeout error has occurred 06 Ip Address Nothing The IP address destination is undefined 07 Not socket Connection The socket has not been connected 08 connection failire A connection failure has occurred 09 Illegal IP Address An illegal IP address has been specified 10 be Shutdowning The connection is being terminated 11 Not Socket Entry The socket information has not been defined 12 Socket is already The socket information has already been defined 13 HOSTS Name Nothing The host computer name does not exist 14 Socket not Assign Connected socket cannot be assigned 15 illegal port No The port number is invalid 16 initialized error An error has occurred during LAN board initialization Rev 0 1 08 00 page 425 of 450 RENESAS Table 10 3 LAN I O Error Messages cont Error No Error Message Description 17 Not Terminate The LAN board has not been terminated 18 terminate error A LAN board termination error has occurred 19 Not initialized The LAN board has not been initialized 20 Board An error has occurred in the LAN board 21 System Error A LAN board system error has occurred 22 Illegal Request An invalid request has been issued
83. displaying instructions within the called subroutine SO RET 00001002 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000001 00000001 00000002 00000003 00000004 00000005 00000006 00000007 R8 15 00000008 00000009 0000000 0000000B 00000000 0000000C 0000000D 000 00 DSR200000000 k kkkkkkkkk COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 00001000 MOV RO R1 ONE STEP END RET Rev 0 1 08 00 page 343 of 450 RENESAS STEP OVER 00001004 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 00000001 00000002 00000003 00000004 00000005 00000006 00000007 R8 15 00000008 00000009 0000000A 0000000B 00000000 0000000C 0000000D 000FFE00 DSR200000000 Xxx KK KK KK KK KK KK K COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 00001002 MOV 00 RO ONE STEP END RET 00001008 5 000000 0 000000000000 00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 00000001 00000002 00000003 00000004 00000005
84. emulator waits for flash memory management tool command prompt gt entering Q RET terminates the flash memory management tool FM gt Q RET START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T _ 9 Turn off the E8000 station 10 Check that S7 and 58 in console interface switch SW1 on the E8000 station rear panel are turned off to the right and on to the left respectively 11 Turn on the power switch at the E8000 station rear panel 12 Execute the TELNET command on the host computer 13 The following messages are displayed and the internal system tests are executed E8000 MONITOR HS8000ESTO2SR Vm n Copyright C Hitachi Ltd 1995 Licensed Material of Hitachi Ltd TESTING RAM 0123 14 If no error occurs the emulator waits for an emulator monitor command START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T _ Refer to section 3 6 1 Emulator Monitor Initiation for details on operations after emulator power on and section 3 8 E8000 System Program Initiation for details on emulator system initiation Rev 0 1 08 00 page 76 of 450 RENESAS 3 5 2 Power On Procedures for RS 232C Interface Figure 3 26 shows the power on procedures when the RS 232C interface is used 1 Turn off to the right S7 and S8 in SW1 on the E8000 station rear panel 2 Run interface software IPW EXE on the h
85. for any questions regarding this document or Hitachi semiconductor products IMPORTANT INFORMATION READ FIRST READ this user s manual before using this emulator product KEEP the user s manual handy for future reference Do not attempt to use the emulator product until you fully understand its mechanism Emulator Product Throughout this document the term emulator product shall be defined as the following products produced only by Hitachi Ltd excluding all subsidiary products e Emulator station e Device control board e EV chip board Evaluation chip board e Cable The user system or a host computer is not included in this definition Purpose of the Emulator Product This emulator product is a software and hardware development tool for systems employing the Hitachi microcomputer HD64F7065 hereafter referred to as SH7060 By exchanging the device control board EV chip board and cable this emulator product can also be used for systems using other microcomputers This emulator product must only be used for the above purpose Limited Applications This emulator product is not authorized for use in MEDICAL atomic energy aeronautical or space technology applications without consent of the appropriate officer of a Hitachi sales company Such use includes but is not limited to use in life support systems Buyers of this emulator product must notify the relevant Hitachi sales offices before planning to use
86. for interfacing with the E8000 station Includes connectors dedicated connectors for interfacing with the user system interface cable The EV chip dedicated board For connecting HS7060PWB20H and HS7060PWB30H Note The generic term for items 1 to 9 above is HS7060EBK8 1H Rev 0 1 08 00 page 18 of 450 RENESAS 2 1 4 User System Interface Cable Configuration Each part of the name in the user system interface cable HS7065ECH8 1H is shown below Coaxial cable for clock Figure 2 6 User System Interface Cable 1 User system connector For connecting the user system 2 EV chip board to user system For the EV chip board connector UCN1 which interface cable connector UCNI connects the EV chip board to the user system interface cable 3 EV chip board to user system For the EV chip board connector UCN2 which interface cable connector UCN2 connects the EV chip board to the user system interface cable 4 EV chip board to user system For the EV chip board connector UCN3 which interface cable connector UCN3 connects the EV chip board to the user system interface cable Rev 0 1 08 00 page 19 of 450 RENESAS 2 2 Emulator Software Components The emulator s software components are illustrated in figure 2 7 A 3 5 inch floppy disk is packaged together with the device control board The system disk files are described in table 2 1 E8000 system program Loadable file types S type files HEX type files SYSR
87. host computer INTFC_VERIFY lt load module type gt lt file name RET Ifa verification error occurs the address and its contents are displayed as follows lt ADDR gt lt FILE gt lt MEM gt XXXXXXXX yy y zz 7 Verification error address yy y Load module data in hexadecimal and ASCII characters zz z Memory data in hexadecimal and ASCII characters Rev 0 1 08 00 page 380 of 450 RENESAS An offset value to be added or subtracted be specified for the address of an SYSROF type ELF type S type or HEX type load module INTFC_VERIFY offset S lt file name gt RET If an offset is specified a verification address is calculated as follows Verification address lt load module address gt lt offset gt Note Data be verified only in the internal memory areas or areas CSO to 55 Example To verify SYSROF type load module F1 ABS against the memory contents IV F1 ABS RET lt ADDR gt FILE MEM 00001012 311 ot Rev 0 1 08 00 page 381 of 450 RENESAS LOAD 8 2 4 LOAD L Loads program from host computer Bidirectional parallel interface Command Format e Load LOAD A lt offset gt lt load module type gt lt file name gt RET lt offset gt Value to be added to the load module address lt load module type gt Load module type R SYSROF type load module S S type load module H
88. input 2 The default for radix of constants is set by the RADIX command Table 1 9 Assembler Directives Directive Operand Description A DATA s A lt value gt lt value gt e Reserves an area for initialized fixed length data The size of the area is equal to the unit length given by s B byte W word or L longword Default size is L e If any lt value gt exceeds the capacity of the size code s an error occurs e A line can contain up to 40 bytes A RES s A value e Reserves data areas The number of areas is given by value The size of each area is given by s B byte W word or L longword Default size is L e Up to 4 294 967 295 byte area can be reserved at one time Rev 0 1 08 00 page 179 of 450 RENESAS Table 1 10 Operand Descriptions Format Addressing Mode Remarks Rn Register direct Rn General register name SP can be specified instead of R15 SR SR Status register GBR GBR Global base register VBR VBR Vector base register MACH MACH Multiply and accumulate register MACL MACL Multiply and accumulate register PR PR Procedure register SSR SSR Saving status register SPC SPC Saving program counter Rn Register indirect Rn General register name Rn Register indirect with Rn General register name post incrementation Rn Register indirect with Rn General register name pre decrementation disp Rn Register indirect with disp Displacement value d
89. is displayed The bus cycle stops for 1 28 ms or more VCC DOWN User system Vcc power voltage is 2 6 V or less The MCU is not operating correctly Displayed only when the user clock is selected WAIT A XXXXXXXX The WAIT signal is low The address bus value is displayed Not displayed during refresh cycles If the TB option is specified user program execution stops when the timeout value or execution count limit specified with the PERFORMANCE ANALYSISI command 15 exceeded Rev 0 1 08 00 page 288 of 450 RENESAS Notes 1 When a hardware break condition set by BREAK_CONDITION_A B C command is satisfied during program execution the program does not terminate until at least one of the instructions that have been already fetched is executed If another hardware break is satisfied before the user program terminates several termination causes will be displayed For further details study trace information At each software breakpoint set with the BREAK command or at each pass point set with the BREAK SEQUENCE command the program halts at that address the emulator analyzes the pass count and pass point of the program and then the program continues When the memory access command processing in parallel mode occurs during this termination memory cannot be accessed At this time 78 EMULATOR BUSY is displayed and the command should be re input However when the inter
90. is specified HELP command name RET Displays command format Example To display GO command format HELP GO RET Executes real tim mulation G lt addr1 gt lt breakaddr gt mode RET lt 1 gt RESET lt address gt RESET execute after MPU reset lt address gt starting address if deleted executes from current PC lt breakaddr gt address when stopping the program lt mode gt R lt n gt cycle reset mode 1 to 12 N temporarily invalidates break conditions Il time interval measurement mode 1 2 time interval measurement mode 2 I3 time interval measurement mode 3 SB1 sequential break mode UBC1 2 SB2 sequential break mode UBC1 2 3 SB3 sequential break mode UBC1 2 3 4 TB time out break mode default normal mode Rev 0 1 08 00 page 293 of 450 RENESAS 8 7 2 23 HISTORY HT Displays input command history Command Format e Display HISTORY RET Displays all input commands HISTORY lt history number gt RET Displays the input command of the specified history number lt history number gt History number 1 to 16 Description e Display Displays the 16 commands most recently input including the HISTORY command in the input order If lt history number gt is entered the command corresponding to lt history number gt is displayed as shown below and the emulator enters command input wai
91. lt data gt is not specified a semicolon can be omitted to specify options L W period Table 7 18 lists option functions Table 7 18 MEMORY Command Options Option Description B Modification in 1 byte units Modification in 2 byte units L Modification in 4 byte units XW Modification in 16 bit fixed point units XL Modification in 32 bit fixed point units Odd address modification in 1 byte units E Even address modification in 1 byte units A Display of previous address contents Display of current address contents Command termination Default Display of next address contents When specifying lt address gt and lt data gt memory contents are modified immediately and the emulator waits for the next command input MEMORY H FFFO H F8 RET Rev 0 1 08 00 page 304 of 450 RENESAS Examples 1 To modify memory contents from address H 1000 1000 RET 00001000 00 FF RET 00001001 O1 10 RET 00001002 22 00001003 00 30 W RET 00001004 0000 1234 RET 00001006 1100 00001004 1234 L RET 00001004 12341100 12345678 RET RET 00001008 00000000 MEMORY 2 To modify memory contents from address H 8000 in 2 byte units without verification M 8000 W N RET 00008000 0000 RET 00008002 0002 1000 RET 00008004 FFF2 RET 3 To modify memory contents from address H F000 i
92. lt radix gt Radix to be used for input of numeric values Hexadecimal default at system program initiation Decimal Octal Binary x WOU Fixed point Description e Specification Specifies the radix used by the emulator to interpret numbers entered on the command line The RADIX command sets the radix to be used for numbers entered simply as numbers Hexadecimal is used at emulator initiation Numbers may be entered in any radix at any time provided that each value is prefixed with the appropriate character Radix Input Example Binary B 1010 Octal Q 2370 Decimal D 6904 Hexadecimal H AF10 Fixed point X 0 6634049566 Rev 0 1 08 00 page 324 of 450 RENESAS RADIX e Display Displays the currently set radix as follows RADIX Radix character Radix character displayed as one of the following B BINARY Q OCTAL D DECIMAL H HEXADECIMAL X FIXED POINT Examples 1 To set the radix to decimal RX D RET B 10 RET 10 is input in decimal 2 To display the current radix RADIX RET RADIX D DECIMAL Rev 0 1 08 00 page 325 of 450 RENESAS REGISTER 7 2 33 REGISTER R Displays register contents Command Format Display REGISTER RET Example To display all register contents R RET PC 00005C60 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 0000000
93. of CK No MD5 MD4 MD3 Source put 1 2 Pin Pin CKM CKP CKE CKIO CK 0 0 0 0 EXTAL ON ON Out Out x1 x1 xi x2 1 x2 x2 CK 1 0 0 1 crystal x4 x2 x2 x2 x2 oscillator 2 0 1 0 ON ON Out Out x1 x1 x1 x4 x1 1 x4 put 3 0 1 1 x4 x2 x4 x4 x2 4 1 0 0 OFF ON Hi Z Out x1 x1 x1 x4 x1 x 4 put 5 1 0 1 x4 x2 x2 x4 x2 6 1 1 0 CKIO CK ON OFF Input Out x2 x1 x1 x1 x1 x 2 put 7 1 1 1 ON x1 x1 x1 x1 xi x1 In the emulator the operating mode previously set is saved in the configuration file on the flash memory of the E8000 station At initialization the emulator initiates the system with the operating mode or clock mode specified with the MODE command Note When the clock operating mode is switched to modes 6 or 7 from modes 0 to 5 be sure to turn the power of the E8000 station off and on to avoid collision between the CKIO output and the CKIO input from the user system In clock operating modes 6 or 7 if the user power supply is turned off turn off the power supply of the E8000 station and turn it back on with the user power system RENESAS Rev 0 1 08 00 page 189 of 450 3 2 Memory Space The SH7060 has a 4 Gbyte memory space in its architecture Standard emulation memory 4 Mbytes can be set in 1 Mbyte or 256 kbyte units to the memory space Areas that are not set as emulation memory are set as user system memory For details refer to section 7 2 25 MAP e U User system memory
94. option PC interface cable option Ae Trace cables EV chip board option A HS7060EBK81H E8000 Serial interface cable PC interface board option E8000 station 58000 5 02 User system interface cable External probe and gt HS7065ECH81H trigger output pin Figure 2 1 Emulator Hardware Components Rev 0 1 08 00 page 12 of 450 RENESAS 2 1 1 8000 Station Components Front Panel Figure 2 2 E8000 Station Front Panel 1 POWER lamp Is lit up when the E8000 station power is on 2 RUN lamp _ Is lit up when the user program is running Rev 0 1 08 00 page 13 of 450 RENESAS Rear Panel Figure 2 3 E8000 Station Rear Panel Rev 0 1 08 00 page 14 of 450 RENESAS ON ips 9 10 1 12 13 14 15 16 Power switch Fuse box AC power connector Cheapernet connector Ethernet connector Parallel interface connector PC interface cable connector Host interface switches Serial interface connector Station to EV chip board interface connector CN1 Station to EV chip board interface connector CN2 Trace cable mis insertion inhibiting seal LAN board slot Control board slot Trace board slot Device control board slot the target device Turning this switch to I input supplies power to the emulator E8000 station and EV chip board Contains a 3 A 250 V AC fuse For a AC100 120 V 200 240 V pow
95. or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator The USER PROGRAM will be LOST If it is difficult to separate the signal ground from the frame ground insert the user system power cable and the emulator s power cable into the same outlet figure 3 10 so that the ground lines of the cables are maintained at the same ground potential The user system must be connected to an appropriate ground so as to minimize noise and the adverse effects of ground loops When connecting the EV chip board and the user system confirm that the ground pins of the EV chip board are firmly connected to the user system s ground Emulator power User system power cable cable m m ELE Ground 100 120 V AC power 200 240 V AC power Figure 3 10 Connecting the Frame Ground Rev 0 1 08 00 page 44 of 450 RENESAS 3 3 System Connection The following describes the procedure for connecting the emulator to a work station or a personal computer See figure 2 3 for the connector arrangement in the E8000 station Console Interface Setting The settings of the transfer rate data bit length stop bit length and parity can be changed Use console interface switches SW1 and SW2 on the back of the E8000 station to change the settings Switches SW1 and SW2 also include switches for the use of the console interface the LAN interface or the PC interface The console interfa
96. point or a reset point at any of the addresses below Address specified with the BREAK command Address that holds an illegal instruction H 0000 Areas other than CSO to CS5 excluding internal memory area Address where BREAK CONDITION settings are satisfied refer to the following description Address containing a slot delayed branch instruction refer to the following description Address of the lower 16 bits of a 32 bit DSP instruction 2 Pass points or a reset point are ignored during STEP and STEP OVER command execution Therefore the pass count is not updated during STEP and STEP OVER command execution If the pass points have not been passed in the specified sequence break checking begins again from the first pass point Rev 0 1 08 00 page 252 of 450 RENESAS BREAK_SEQUENCE When the specified reset point is passed break checking begins again at the first pass point even if the remaining pass points are then passed in the assigned sequence When pass points or a reset point are specified the emulator temporarily stops emulation and analyzes the pass sequence at each point Therefore realtime emulation is not performed When execution starts at the address set with the BREAK SEQUENCE command immediately after execution starts the BREAK CONDITION command settings are invalidated Therefore even though a BREAK CONDITION command setting is satisfied im
97. rear panel Figure 3 16 Ethernet Interface Table 3 6 Recommended Transceiver and Transceiver Cable Item Product Type Manufacturer Transceiver HBN 200 series Hitachi Cable Ltd Transceiver cable HBN TC 100 Hitachi Cable Ltd For setting up the Ethernet interface refer to the LAN board user s manual Rev 0 1 08 00 page 58 of 450 RENESAS Cheapernet Interface The LAN board of the emulator incorporates a transceiver and a BNC connector for a Cheapernet interface Figure 3 17 shows an example of the Cheapernet system configuration Use a commercially available Cheapernet BNC T type connector with a characteristic impedance of 50 Q and a RG 58A U thin wire cable or its equivalent Table 3 7 shows a recommended BNC T type connector and thin wire cable Note Ifa connector or a cable with a characteristic impedance other than 50 is used the impedance mismatch will cause incorrect data transmission and reception LAN board Cheapernet thin wire cable T type connector 090 5 AS Sly 3 Workstation E8000 station rear panel Figure 3 17 Cheapernet Interface Rev 0 1 08 00 page 59 of 450 RENESAS Table 3 7 Recommended BNC Connector and Thin Wire Cable Item Product Type Manufacturer BNC T type connector HBN TA JPJ Hitachi Cable Ltd Thin wire cable HBN 3D2V LAN Hitachi Cable Ltd For setting up Cheapernet refer to the LAN board user s manual
98. recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein The information described here may contain technical inaccuracies or typographical errors Renesas Technology Corporation assumes no responsibility for any damage liability or other loss rising from these inaccuracies or errors Please also pay attention to information published by Renesas Technology Corporation by various means including the Renesas Technology Corporation Semiconductor home page http www renesas com When using any or all of the information contained in these materials including product data diagrams charts programs and algorithms please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products Renesas Technology Corporation assumes no responsibility for any damage liability or other loss resulting from the information contained herein Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes such as apparatus or
99. satisfied the true condition is satisfied after the bus cycle of the specified value is executed Only TCB7 can be specified Rev 0 1 08 00 page 357 of 450 RENESAS TRACE_CONDITION_A B C Address and data conditions are satisfied when address bus values and data bus values match the specified values Note the following when specifying trace conditions Longword access Longword data is accessed in one bus cycle Only longword data LD and a multiple of four can be specified as the data and address conditions respectively Word access Word data is accessed in one bus cycle Only word data WD and a multiple of two can be specified as the data and address conditions respectively Note that the data condition must be specified in combination with a specific address condition If no address condition is specified or if the address is masked the data condition will be satisfied when the address is a multiple of four Byte access Byte data is accessed in one bus cycle Only byte data D can be specified as the data condition Both even and odd address values can be specified as the address condition Note that the data condition must be specified in combination with a specific address condition If no address condition is specified or if the address is masked the data condition will be satisfied when the address is a multiple of four A bit mask in 1 bit or 4 bit units can be specified for the address
100. systems for transportation vehicular medical aerospace nuclear or undersea repeater use The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials If these products or technologies are subject to the Japanese export control restrictions they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination Any diversion or reexport contrary to the export control laws and regulations of Japan and or the country of destination is prohibited Please contact Renesas Technology Corporation for further details on these materials or the products contained therein C 7 D m lt D 5 D tENESAS SH7060 E8000 Emulator User s Manual Renesas Microcomputer Development Environment System HS7060EDD81H Renesas Electronics Rev 1 0 2000 08 www renesas com Cautions 1 Hitachi neither warrants nor grants licenses of any rights of Hitachi s or any third party s patent copyright trademark or other intellectual property rights for information contained in this document Hitachi bears no responsibility for problems that may arise with third party s rights including intellectual property rights in connection with use of the information contained in this document 2 Products and product specifications may be subject to change without notice Confirm that you
101. that case use the wiring shown in figure A 5 Rev 0 1 08 00 page 438 of 450 RENESAS 5 232 RS 232 connector 2 The numbers represent connector pin numbers numbers represent connector pin numbers a X ON X OFF control RTS CTS control Figure A 5 Serial Interface Cable Using Other Cables Rev 0 1 08 00 page 439 of 450 RENESAS Rev 0 1 08 00 page 440 of 450 RENESAS Appendix Emulator External Dimensions and Weight Figures 1 and B 2 show the external dimensions and weight of the emulator station and EV chip board respectively HITACHI E8000 Station pod interface cable 170 0 Unit mm Weight of the emulator station 5 05 kg Figure B 1 External Dimensions and Weight of the E8000 Emulator Rev 0 1 08 00 page 441 of 450 RENESAS 40 0 120 0 23 0 HS7060EBK81H Unit mm Weight of the EV chip board HS7060EBK81H 0 170 kg Figure B 2 External Dimensions and Weight of the EV Chip Board Rev 0 1 08 00 page 442 of 450 RENESAS Appendix C Connecting the Emulator to the User System C 1 Connecting to the User System AWARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system or emulator or result in PERSONAL INJURY Also the USER PROGRAM will be LOST The emula
102. the host computer to user system memory e Saves data in the user system memory as a load module file in the host computer e Transfers files between the emulator and host computer The emulator supports the LAN commands listed in table 9 1 to transfer data between the emulator and the host computer These commands are explained in section 9 3 LAN Commands Rev 0 1 08 00 page 389 of 450 RENESAS Table 9 1 LAN Commands Usable Unusable Command Function in Parallel Mode ASC Specifies the file type to be transferred as ASCII Usable BIN Specifies the file type to be transferred as binary Usable BYE Terminates the FTP interface Usable Re connects the FTP interface with the FTP command CD Changes the directory of the FTP server Usable CLOSE Disconnects the host computer from the FTP interface Usable Re connects the host computer to the FTP interface with the OPEN command FTP Connects the host computer and emulator via the FTP Usable interface LAN Displays emulator IP address Usable LAN_HOST Displays all defined host computers Usable LAN_LOAD Loads a load module file from the host computer to Unusable memory via the FTP interface LAN_SAVE Saves the specified memory contents in the host Unusable computer connected via the FTP interface LAN VERIFY Verifies memory contents against the host computer file Unusable connected via the FTP interface LS Displays the host computer directory connecte
103. the product in such applications Improvement Policy Hitachi Ltd including its subsidiaries hereafter collectively referred to as Hitachi pursues a policy of continuing improvement in design performance and safety of the emulator product Hitachi reserves the right to change wholly or partially the specifications design user s manual and other documentation at any time without notice Target User of the Emulator Product This emulator product should only be used by those who have carefully read and thoroughly understood the information and restrictions contained in the user s manual Do not attempt to use the emulator product until you fully understand its mechanism It is highly recommended that first time users be instructed by users that are well versed in the operation of the emulator product Rev 0 1 08 00 page of VIII RENESAS LIMITED WARRANTY Hitachi warrants its emulator products to be manufactured in accordance with published specifications and free from defects in material and or workmanship Hitachi at its option will repair or replace any emulator products returned intact to the factory transportation charges prepaid which Hitachi upon inspection determine to be defective in material and or workmanship The foregoing shall constitute the sole remedy for any breach of Hitachi s warranty See the Hitachi warranty booklet for details on the warranty period This warranty extends only to you the original
104. user program is initiated and execution does not return to the loop program for accepting user interrupts During user interrupt processing in command input wait state the software breakpoints set with the BREAK or BREAK_SEQUENCE command and hardware break conditions become invalid During user interrupt processing in command input wait state no trace information is acquired Rev 0 1 08 00 page 235 of 450 RENESAS BACKGROUND_INTERRUPT Examples 1 To specify the executing address of the loop program for accepting user interrupts to H FFFC and begin to accept user interrupts in command input wait state BI E FFFC RET USER_INTERRUPT E LOOP_PROGRAM_ADDRESS FFFC To display the current user interrupt accepting mode in command input wait state BI RET USER INTERRUPT E LOOP_PROGRAM_ADDRESS 0000FFFC 00005 60 SR 00000000 000000000000 00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000FFEO00 58 00000000 COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 16 00 1 00000000 1 00000000 1 00000000 1 00000000 ILLEGAL INSTRUCTION Rev 0 1 08 00 page 236 of 450 RENESAS 7 2 6
105. user program to memory and run the user program allocate standard emulation memory by the following procedures Operations Display Message 1 Enter MAP 01000000 0103FFFF S MAP 01000000 0103FFFF S RET RET to allocate standard emulation memory to addresses H 01000000 to H 0103FFFF 2 The message shown on the right REMAINING EMULATION MEMORY LB 3072KB SB0 which indicates that memory 3 0768KB allocation has been completed is displayed 3 Enter MAP RET to display the MAP RET attributes of all the memory areas 01000000 0103FFFF 8 ROM AREA 00000000 0003FFFF X RAM AREA FFFF8000 FFFF8FFF Y RAM AREA FFFFA000 FFFFAFFF INTERNAL I O FFFF0000 FFFF13FF REMAINING EMULATION MEMORY LB 3072KB SB0 3 0768KB Rev 0 1 08 00 page 107 of 450 RENESAS 4 2 4 Loading the User Program Connect the emulator to the host computer using the FTP server and load the user program by the following procedures This example assumes that in host computer HITACHI the user name is defined as E8000 and its password as MAX60MHZ Operations 1 Enter FTP HITACHI to connect the emulator to the host computer using the FTP server The emulator asks for the user name Enter E8000 The emulator asks for the password Enter MAX60MHZ RET The message shown on the right which indicates that the emulator and the host computer have been connected is displayed The prompt becomes FTP gt To load program PROGRAM MOT
106. within the specified range is prefetched again The subroutine execution count is incremented every time the subroutine end address is fetched after the start address is passed The execution time of subroutines called from the specified subroutine is not included in the measurement results Subroutine execution time measurement mode 2 Measures the execution time and count of the subroutine defined by lt start address gt and lt end address gt Measurement starts when the start address is prefetched and halts when the end address is prefetched The subroutine execution count is incremented every time the subroutine end address is fetched after the start address is passed The execution time of subroutines called from the specified subroutine is included in the measurement results Subroutine execution time measurement mode 3 Measures the execution time and count of the subroutine defined by lt start address range gt and lt end address range gt Measurement starts when an address in the start address range is prefetched and halts when an address in the end address range is prefetched The subroutine execution count is incremented every time lt end address range gt is passed after the start address is passed Area access count measurement mode Counts the number of times the subroutine defined by lt start address gt and lt end address gt accesses the range specified by lt accessed area address range gt The subroutine execution tim
107. xxxxxx BUS CYCLE NUMBER xxxxxx Number of instructions decimal yyyyyy Number of bus cycles decimal Rev 0 1 08 00 page 368 of 450 RENESAS TRACE_SEARCH If the L option is specified displays only the last bus cycle information to be searched for Items listed in table 7 29 can be specified for lt condition gt and they can be combined by ANDing them Table 7 29 Specifiable Conditions TRACE_SEARCH Item and Input Format Address condition A lt address 1 address 2 gt Description When only lt address 1 gt is specified the condition is satisfied when the address bus value matches the specified value When both lt address 1 gt and lt address 2 gt are specified the condition is satisfied when the address bus value is in the range from lt address 1 gt to lt address 2 gt This condition can be masked Data condition D lt 1 byte value gt WD lt 2 byte value gt LD lt 4 byte value gt The condition is satisfied when the data bus value matches the specified value When D WD and LD are specified the data is traced when the address is accessed in bytes words or longwords respectively This condition can be masked Read Write condition R Read W Write The condition is satisfied in a read cycle R is specified or a write cycle W is specified Access type DAT Execution cycle Default All bus cycles described above including program
108. 0 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR200000000 COB A0G 00 A0 00000000 M0 00000000 X0 00000000 Y0 00000000 A1G 00 1 00000000 M1 00000000 X1 00000000 Y1 00000000 Rev 0 1 08 00 page 326 of 450 RENESAS 7 2 34 RESET RS Command Format Reset RESET RET Description Reset RESET Resets SH7060 Resets the SH7060 The SH7060 system register control register general register and DSP register contents will be reset to the following values RO to R14 The value before reset R15 SP Power on reset vector value MACH The value before reset PC Power on reset vector value PR The value before reset MOD The value before reset The value before reset VBR H 00000000 GBR The value before reset MACL The value before reset SR H 000000F0 RS RE The value before reset DSR H 00000000 A1 MO MI XO X1 YO Y1 The value before reset The internal I O register contents will also be reset Note In the SH7060 the initial value of the registers must be set in the program because the register contents are not stable after the SH7060 is reset Example To reset the 5 7060 RS RESET BY Rev 0 1 08 00 page 327 of 450 RENESAS RESULT 7 2 35
109. 000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR200000000 kkkkkkkkkk COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 0000106A BT 00001070 00001072 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR 200000000 k kkkkkkkk k COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 00001070 STOP ADDRESS Rev 0 1 08 00 page 337 of 450 RENESAS STEP_INFORMATION 7 2 38 STEP_INFORMATION Specifies and displays information during SI single step execution Command Format e Specification STEP INFORMATION Acregister information gt AA lt start address gt A end address gt A lt number of bytes gt ASP lt stack display byte count gt RET e Display STEP_INFORMATION RET lt register information gt Register to be displayed 1 Displays PC SR PR GBR VBR MACH and MACL 2 Displays RO to R15 3 Displays DSP registers DSR 0 AOG Al MO M1
110. 00000 H 81DFFFFF SB15 2 Mbytes H 01E00000 H 01FFFFFF 2 Mbytes H 81E00000 H 81FFFFFF Rev 0 1 08 00 page 196 of 450 RENESAS Table 3 4 Memory Blocks Extended Mode with ROM cont Register EMRB Bit Capacity Address Space Type Memory Type LBBO CSO Normal space burst ROM LBB1 multiplexed 1 space LBB2 16 Mbytes H 02000000 H O2FFFFFF 16 Mbytes H 82000000 H 82FFFFFF LBB3 16 Mbytes H 03000000 H O3FFFFFF 16 Mbytes H 83000000 H 83FFFFFF LBB4 16 Mbytes H 04000000 H 04FFFFFF CS1 Normal space 16 Mbytes H 84000000 H 84FFFFFF burst ROM LBB5 16 Mbytes H 05000000 H 05FFFFFF multiplexed 1 space 16 Mbytes H 85000000 H 85FFFFFF LBB6 16 Mbytes H 06000000 H 06FFFFFF 16 Mbytes H 86000000 H 86FFFFFF LBB7 16 Mbytes H 07000000 H 07FFFFFF 16 Mbytes H 87000000 H 87FFFFFF LBB8 16 Mbytes H 08000000 H 08FFFFFF CS2 Normal space 16 Mbytes H 88000000 H 88FFFFFF burst ROM LBB9 16 Mbytes H 09000000 H 09FFFFFF multiplexed I O space 16 Mbytes H 89000000 H 89FFFFFF LBB10 16 Mbytes H 0A000000 H OAFFFFFF 16 Mbytes H 8A000000 H 8AFFFFFF LBB11 16 Mbytes H 0B000000 H OBFFFFFF 16 Mbytes H 8B000000 H 8BFFFFFF LBB12 16 Mbytes H 0C000000 H OCFFFFFF 53 Normal space 16 Mbytes H 8C000000 H 8CFFFFFF burst ROM LBB13 16 Mbytes H 0D000000 H ODFFFFFF multiplexed 1 space 16 Mbytes H 8D000000 H 8DFFFFFF LBB14 16 Mbytes H 0E000000 H OEFFFFFF 16 Mb
111. 0000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR 200000000 kk amp k k k k k k k k k k k COB A0G 00 0 00000000 M0 00000000 X0 00000000 Y0 00000000 1 00 1 00000000 M1 00000000 X1 00000000 Y1 00000000 00001000 MOV RO R1 STEP NORMAL END Rev 0 1 08 00 page 336 of 450 RENESAS 2 To perform single step execution from addresses H 1060 to H 1070 with information displayed only for branch instructions S FFFF 1060 1070 J RET PC 0000106A SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR2000000000 k kkkkkkkkkk COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 00001064 RO 00001066 NOP 0000106 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000
112. 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR200000000 kkkkkkkkkkk k COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 Y1 00000000 00001002 MOV 00 RO MEMORY 0000 80 00 04 00 FF FO 00 02 00 10 00 02 00 OF 00 00 00 7 STACK OOOFFFEO 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 5 NORMAL END Rev 0 1 08 00 page 340 of 450 RENESAS STEP OVER 7 2 39 STEP OVER Performs single step execution except for SO subroutines Command Format e Execution STEP OVER lt start address I RET start address Start address of single step execution Default is the current PC address I Interrupt permission during single step execution Description e Execution Beginning at lt start address gt performs single step execution of instructions except for subroutines called by the BSR JSR BSRF or TRAPA instruction If a BSR JSR BSRF or TRAPA instruction is executed acts as if the subroutine called by the BSR JSR BSRF or TRAPA instruction is a single instruction If an instruction other than BSR JSR BSRF or TRAPA is executed register contents and the executed instruction are shown after each instruction is executed like in the STEP command Ifa BSR JSR or BSRF instruction is executed sets a PC break be
113. 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 OOOFFEOO DSR200000000 xXx Xxx A KK KK KK KK KK K COB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 000H 00M 03S 000409US 120NS BREAK KEY Rev 0 1 08 00 page 227 of 450 RENESAS ALIAS 7 2 3 ALIAS ALI Sets displays and cancels aliases Command Format e Setting ALIASA lt alias name gt A lt alias definition RET e Display ALIAS RET e Cancellation ALIAS A A alias name gt RET ALIAS A RET alias name Alias definition name alias definition Alias definition contents Description e Setting Sets aliases for commands Up to 40 aliases can be set An alias name is defined with up to 16 characters and an alias definition with up to 230 characters ALIASA lt alias name A alias definition Display Displays defined aliases as follows ALIAS RET alias name gt lt definition 1 gt alias name 2 gt lt alias definition 2 gt alias name 3 gt lt alias definition 3 gt e Cancellation Cancels the specified alias ALIAS A alias name RET When no alias name is specified cancels all aliases ALIAS RET Note An alias itself
114. 00003 NE Rev 0 1 08 00 page 272 of 450 RENESAS END 7 2 18 END E Cancels parallel mode Command Format e Cancellation END RET Description e Cancellation Cancels parallel mode during GO command execution Entering the END command clears old trace information and starts storing new trace information Example To cancel parallel mode during GO command execution GO RET PC 00003400 Parallel mode entered FD80 RET OOOOFD80 00 FF RET Command execution in parallel mode 0000FD81 00 22 RET END RET Parallel mode cancellation PC 00003800 Rev 0 1 08 00 page 273 of 450 RENESAS EXECUTION_MODE 7 219 EXECUTION_MODE Specifies and displays execution mode EM Command Format e Setting EXECUTION_MODE ABREQ lt BREQ option gt ATIME lt TIME option gt ATRGU lt TRGU option gt ATRGB lt TRGB option gt AMON lt MON option gt AMB lt MB option gt C RET e Setting EXECUTION MODE C RET interactive mode BREQ option Specifies whether the BREQ bus request signal inputs are enabled E Enables the BREQ signal inputs default at emulator shipment D Disables the BREQ signal inputs TIME option Specifies the minimum time to be measured for the GO command execution 1 1 6 us default at emulator shipment 2 406 ns 3 20ns TRGU option When hardware break conditions set by the BREAK CONDITION UBC 1 2 3 4 c
115. 1 6 Break with Data Bus Value Read Write Condition A break occurs when the SH7060 s RW signal levels match the specified conditions Usually the read write condition is specified together with the address or data conditions Break condition When writing 01 to address 000000 Specification 000000 W User program NOP MOV 01 Break occurs when 01 MOV B R1 R2 is written to address R2 F000000 Break condition is satisfied Figure 1 7 Break with Read Write Access Type Condition A break occurs when the SH7060 s bus cycle matches the specified conditions Rev 0 1 08 00 page 144 of 450 RENESAS Break condition When writing 01 to address 00000 Specification 00000 W DAT User program NOP Break MOV 01 R1 Break occurs when data condition MOV B R1 R2 is written to address is satisfied R2 F00000 Figure 1 8 Break by Access Type Delay Count and Number of Times Break Condition is Satisfied These functions can only be specified with the BREAK CONDITION UBCI and BREAK CONDITION B7 commands Note that these functions cannot be specified together specify one function at a time In delay count specification a break occurs when the above break condition address bus value data bus value or read write condition is satisfied and the emulator executes the bus cycle for a specified number of times 65 535 max When specifying this condition specify it in
116. 1 BCB to 7 The true condition is satisfied when the specified condition satisfies the set number of events Delay count setting DELAY lt value gt value H 1 to H 7FFF Rev 0 1 08 00 page 242 of 450 This is set in conjunction with conditions 1 BCB to 7 When the condition is satisfied the true condition is satisfied after the bus cycle of the specified value is executed Only BCB7 can be specified RENESAS BREAK_CONDITION_A B C Address and data conditions are satisfied when address bus values and data bus values match the specified values Note the following when specifying break conditions Longword access Longword data is accessed in one bus cycle Only longword data LD and a multiple of four can be specified as the data and address conditions respectively Word access Word data is accessed in one bus cycle Only word data WD and a multiple of two can be specified as the data and address conditions respectively Byte access Byte data is accessed in one bus cycle Only byte data D can be specified as the data condition Both even and odd address values can be specified as the address condition Rev 0 1 08 00 page 243 of 450 RENESAS BREAK_CONDITION_A B C A bit mask in 1 bit or 4 bit units can be specified for the address condition of the BREAK CONDITION A B C command When a bit is masked the condition is satisfied irrespective of its bit value
117. 100FFFC 5 00000000 lt x COOB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 1 00 1 00000000 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 00S 000020US 800NS BREAK CONDITION UBC1 Rev 0 1 08 00 page 113 of 450 RENESAS 4 2 9 Displaying Trace Information Trace information acquired during program execution can be displayed in various ways as follows Operation 1 To display the instruction mnemonic information enter TRACE RET D 000009 D 000008 D 000007 D 000006 D 000005 D 000004 D 000003 D 000002 p 000001 p 000000 ADDR 01001000 01001002 01001004 01001006 01001008 0100100A 0100100C 0100100E 01001010 01001012 2 To display the trace information in bus cycle units enter TRACE B RET BP D 000008 D 000007 D 000006 D 000005 D 000004 D 000003 D 000002 D 000001 D 000000 AB 01001000 01001004 01001000 01001008 01001002 01001004 0100100C 01001006 01001008 0100101 01001010 0100100 0100100 01001014 0100100 0100FFF8 01001010 01001018 01001012 DB 00 101 E201D405 6323321C 24266133 0100 70FF8800 8BF80009 00000002 AFFE0009 Rev 0 1 08 00 page 114 of 450 Display Message MA RW EXT EXT EXT EXT EXT EXT EXT EXT EXT R R TRACE RET MN
118. 17 illustrates the free trace operation User program Program flow Trace memory Break condition is gt 131 071 satisfied bus cycles Figure 1 17 Free Trace Execution State Rev 0 1 08 00 page 157 of 450 RENESAS Subroutine Trace When a subroutine trace is specified the emulator acquires operand accesses and instructions between a specified start address and end address However when the specified subroutine calls another subroutine the called subroutine is not traced Figure 1 18 illustrates the operation of the subroutine trace Start address a ma race information is acquired Figure 1 18 Subroutine Trace Execution State Rev 0 1 08 00 page 158 of 450 RENESAS Range Trace When a range trace is specified the emulator only traces at points where specified conditions are satisfied The following conditions can be specified e Address bus value range specification and NOT condition available Read write condition e Access type program fetch cycle and program execution cycle Figure 1 19 illustrates the trace acquisition condition User program Program Trace acquisition condition is satisfied When the user program stops the trace buffer stores trace information from the address at which the trace acquisition condition was satisfied Break condition is satisfied Figure 1 19 Trace Acquisition Condition State Rev 0 1 08 00 page 159 of 450 RENESAS Trace Stop Paral
119. 2 To load S type load module ST MOT L S ST MOT RET TOP ADDRESS 00000000 END ADDRESS 00003042 Rev 0 1 08 00 page 383 of 450 RENESAS SAVE 8 2 5 SAVE SV Saves program in host computer Bidirectional parallel interface Command Format e Save SAVEA lt start address gt A lt end address gt A lt number of bytes lt load module type gt ALF lt file name gt RET lt start address gt Start memory address lt end address gt End memory address lt number of bytes gt Number of bytes to be saved lt load module type gt Load module type S S type load module H HEX type load module Default S type load module LF Adds an LF code H 0A to the end of each record lt file name gt File name in the host computer Description e Save Saves the specified memory contents in the specified load module type in a host computer file via the bidirectional parallel interface Use interface software IPW for the host computer An S type or HEX type load module can be saved An SYSROF type or ELF type load module cannot be saved Enter NA before the command to request data receipt to the host computer N SAVE lt start address gt lt end address gt lt load module type gt lt file name gt RET When save is completed the start and end memory addresses are displayed as follows TOP ADDRESS lt start address gt END ADDRESS lt end address gt When the LF option is speci
120. 33 INVALID ASM OPERAND An operand in an assembly language statement is invalid Correct the operand 34 ALREADY ASSIGNED A condition cannot be specified by the BREAK CONDITION TRACE CONDITION or PERFORMANCE ANALYSIS command Too many conditions are specified Cancel a condition for another command and re specify 35 CANNOT USE THIS MODE Rev 0 1 08 00 page 420 of 450 GO The GO command cannot be executed because settings for the execution mode are invalid Correctly specify the settings necessary for the specified execution mode RENESAS Table 10 1 Error Messages cont Error No 37 Error Message TOO MANY POINTS Description and Solution Too many points are specified Remove any unnecessary settings and re enter 38 SET POINT IS NOT IN RAM A write protected address is specified by the BREAK or BREAK_SEQUENCE command Specify a correct address 39 BUFFER EMPTY TRACE or TRACE_SEARCH The trace buffer is empty Check trace conditions and execution state and re execute Then display trace information 41 INVALID ALIGNMENT In the assembler the boundaries of the data size and address are illegal Check the address or data size and re enter the instruction 42 CANNOT CHANGE ATTRIBUTE OF ROM AREA An attempt was made to change the memory attribute of the internal ROM RAM area Allocate emulation memory to areas other than the internal
121. 4FFFFF SW ROM AREA 00000000 0003FFFF X RAM AREA FFFF8000 FFFF8FFF Y RAM AREA FFFFA000 FFFFAFFF INTERNAL I O FFFF0000 FFFF13FF REMAINING EMULATION MEMORY 0000 5 0 7 0768 4 To cancel write protection for the standard emulation memory allocated to the address range from H 400000 to H AFFFFF MP 400000 4FFFFF S RET REMAINING EMULATION MEMORY 3072 5 0 3 0896 5 To set write protection for the user memory allocated to the address range from H 500000 to H SFFFFF MP 500000 5FFFFF W RET REMAINING EMULATION MEMORY LB 3072KB SB0 7 0896KB MP RET 00020000 0003FFFF S 00400000 004FFFFF S 00500000 005FFFFF W ROM AREA 00000000 0003FFFF X RAM AREA FFFF8000 FFFF8FFF Y RAM AREA FFFFA000 FFFFAFFF INTERNAL I O FFFF0000 FFFF13FF REMAINING EMULATION MEMORY LB 3072KB SB0 3 0896KB Rev 0 1 08 00 page 302 of 450 RENESAS 7 2 26 MEMORY Displays or modifies memory contents Command Format Display modification MEMORYA lt address gt A lt data gt lt option gt AN RET lt address gt Address of memory area whose contents are to be displayed or modified lt data gt Data to be written to the specified address lt option gt Length of display or modification units B 1 byte units W 2 byte units L 4 byte units XW 16 bit fixed point units XL 32 bit fixed point units O Odd addres
122. 5 of 450 RENESAS BIN 9 3 2 BIN BIN Specifies the file type as binary Command Format e Setting BIN RET Description e Setting Specifies the file type as binary in the FTP interface This specification is required to transfer files with the LAN LOAD LAN SAVE or LAN VERIFY command To load or verify a SYSROF type load module file binary must be specified with this command Otherwise a transfer error will occur At emulator initiation binary is the default setting Example To set the file type as binary in the FTP interface FTP BIN RET bin command success FTP Rev 0 1 08 00 page 396 of 450 RENESAS 9 3 3 BYE BYE Terminates the FTP interface Command Format e FTP interface termination BYE RET Description e FTP interface termination Terminates the FTP interface and changes the prompt to a colon To re establish the FTP interface enter the FTP command For details refer to section 9 3 6 FTP Example To terminate the FTP interface FTP gt BYE RET bye command success Rev 0 1 08 00 page 397 of 450 RENESAS 9 3 4 CD CD Changes the directory name of the FTP server Command Format Directory change CD A lt directory name RET directory name Name of directory to be changed Description e Directory change Changes the current directory of the FTP server connected host computer to the specified directory The modif
123. 50 RENESAS 3 2 Emulator Connection 3 21 Connecting the Device Control Board At shipment the device control board is packed separately from the E8000 station Connect the device control board to the E8000 station according to the following procedure Also use the following procedure to connect them after remove the device control board from the E8000 station to change the device control board AWARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST 1 Check that the emulator power switch is turned off Ensure that the power lamp on the left side of the E8000 station s front panel is not lit 2 Remove the AC power cable of the E8000 station from the outlet if the cable is connected to the outlet 3 Remove the back panel from the E8000 station For the slot to which the device control board is to be connected DCONT is marked 4 Connect the device control board to the E8000 station When connecting the board prevent the upper or lower side of the board from lifting off the connector Alternately tighten the screws on both sides of the board Rev 0 1 08 00 page 29 of 450 RENESAS DCONT TRC CONT dT1vuvd Device control board L e K m e L AC100 120V AC200 240V 2A 50 60Hz E8000 s
124. 81SF Vm n 2 PC I F HS8000EIW01 SF Vm n 3 DIAGNOSTIC TEST Vm nn XX XX XX E8000 Figure E8000 System Disk Rev 0 1 08 00 page i of xvi RENESAS Before using the system disk back up it to a floppy disk according to the instructions in manuals of the personal computer and the operating system Install copy the system program to the personal computer connected to the emulator For details on the copy procedure refer to section 3 7 System Program Installation in Part I E8000 Guide Related Manuals HS7060EBK81H Manual LAN Board Manual Description Notes on Using the PC Interface Board HS6000EII01H Description Notes on Using the PCI Interface Board HS6000EICO1H Description Notes on Using the PCMCIA Interface Board HS6000EIPO1H Description Notes on Using the LAN Adapter HS6000ELNO1H SuperH RISC engine C C Compiler User s Manual SuperH RISC engine Assembler User s Manual H Series Linkage Editor Librarian and Object Converter User s Manual SH7060 E8000 Hitachi Debugging Interface User s Manual Rev 0 1 08 00 page ii of xvi RENESAS Notes 1 IBM PC is a registered trademark of International Business Machines Corporation 2 SPARC is a registered trademark of SPARC International INC 3 Ethernet is a registered trademark of Xerox Corporation 4 Microsoft and Windows are registered trademarks of Microsoft Corporation in the United States and or other countries Rev 0 1 08 00 page iii of xv
125. 86 20 8750 8835 Colohon 1 0
126. ADING HARD WARE REGISTER READ WRITE CHECK FIRMWARE SYSTEM LOADING EMULATOR FIRMWARE TEST RESET BY E8000 CLOCK 7 5MHz MODE 12 MD5 0 1F REMAINING EMULATION MEMORY LB 4096KB Rev 0 1 08 00 page 100 of 450 RENESAS If the E8000 system program is automatically initiated without being loaded to the emulator flash memory after displaying an error message the emulator enters monitor command input wait state Make sure to load the E8000 system program to the emulator flash memory before initiation E8000 SYSTEM PROGRAM NOT FOUND START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S FIL T _ Rev 0 1 08 00 page 101 of 450 RENESAS Rev 0 1 08 00 page 102 of 450 RENESAS Section 4 Operating Examples 4 1 Emulator Operating Examples This section covers explanations on how to operate the emulator using examples Sections 4 2 Basic Examples and 4 3 Application Examples are based on the following user program These examples assume that the emulator is connected to the host computer by a LAN interface and is used with a TELNET connection ADDR CODE MNEMONIC OPERAND 01001000 E00A MOV 0A RO 01001002 E101 MOV 01 R1 01001004 E201 MOV 01 R2 01001006 D405 MOV L 0100101C R4 01001008 6323 MOV R2 R3 01001004 321C ADD R1 R2 0100100C 2426 MOV L R2 R4 0100100E 6133 MOV R3 R1 01001010 70 ADD FF RO 01001012 8800 CMP EQ 00 RO 01001014 8BF8 BF 01001008 01001016 0009 NO
127. AK _CONDITION_UBC BCU 247 7 29 BREAK SEQUENCE BS eR e e EE e Eee ek 252 Rev 0 1 08 00 page vii of xvi 72210 CHECK CH et Ee Pene re AEE E E EA EE E 256 224 ennn 258 7 2 12 CONFIGURATION 260 7313 CONVERT 262 7 2 14 DATA_CHANGE DC reto iaa oat rsen re mu e 264 7 2 15 DATA SEARCH DS rbd agii 266 7 2 16 DISASSEMBLE DAT aaa 268 72 17 DUMP D LM E E EE 271 aa umanan 273 7 2 19 EXECUTION MODE treten 274 279 281 2003 HELP eT 291 72 23 HISTORY os 294 295 296 72 26 MEMORY 303 7 2 27 MODE MD ovccssocssccseccsssesecssscesscessssescenvsesscessscsneessucsecevscesnseessureesnsesecanesennsessues 306 12 08 MONVE MV cea cee vec etum 309 72 29 MOVE TO 310 7 2 30 PERFORMANCE_ANALYSIS1 8
128. Area The emulator uses the internal RAM of the SH7060 The internal RAM can be accessed both with the user program and with the emulator command in one state 3 2 3 Internal I O Area If an attempt is made to access the internal I O area the internal I O area in the SH7060 installed in the emulator is accessed regardless of the memory attribute set with the MAP command In addition the user program is not terminated even if the internal I O area is written to or accessed by the user program while the attribute setting is write protected attribute W or access prohibited attribute G To break the user program when the internal I O area is written to or accessed use the BREAK CONDITION_UBC1 2 3 4 or BREAK CONDITION commands The internal I O area can be read from or written to by the user program or with emulator commands When writing to the internal I O area with an emulator command MEMORY command the following warning message is displayed and the emulator starts writing without verifying 86 INTERNAL AREA 3 2 4 External Memory Area The SH7060 external memory area can be set with all memory attributes that the emulator supports Memory corresponding to the allocated attributes can be accessed by the user program or with emulator commands The emulator controls memory areas in memory block units as shown in tables 3 3 and 3 4 The user system memory and the emulation memory in the emulator cannot be allocated in the sa
129. B C command are ignored Conditions must be specified with the BREAK CONDITION UBC1 2 commands For time interval measurement mode 3 conditions must be specified with the BREAK CONDITION UBC3 4 commands All conditions specified with the TRACE CONDITION command ignored Parallel mode cannot be entered Sequential break mode1 2 3 4 Software breakpoints specified with the BREAK or BREAK SEQUENCE command are ignored Conditions must be specified with the BREAK_CONDITION_UBC1 2 command Timeout break Software breakpoints specified with the BREAK or BREAK SEQUENCE mode command are ignored If lt break address gt is specified realtime emulation stops when the specified address is reached The instruction at the specified address is not executed This specification is valid for only the current GO command emulation BREAK CONDITION UBC4A command settings are invalid when a break address is specified Rev 0 1 08 00 page 284 of 450 RENESAS GO During user program execution program fetch addresses are displayed according to the time interval specified with the MON option in the EXECUTION_MODE command During GO command emulation pressing the SPACE key or RET key enters parallel mode If emulation is terminated register contents execution time and cause of termination are displayed in the following format 00005 60 SR 000000F0 000000000000 ITII00
130. BACK BACK signal is low SOFTWARE STANDBY The MCU is in the software standby state SLEEP The MCU is in the sleep state User System Power and Clock Status The emulator monitors the user system power and clock status If the user system power is off or the clock stops when the SH7060 clock is set to USER Rev 0 1 08 00 page 176 of 450 RENESAS with the CLOCK command the emulator executes the following operation according to the emulator status Notes 1 If the user system power is turned off Vcc is 2 6 V or lower this is detected before the clock stop is detected 2 Clock stop means that only the clock stops and the user system power remains on e During user program execution When the user system is turned off Vcc is 2 6 V or lower VCC DOWN is displayed When the power is turned on again the emulation restarts and current position of PC in the user program is displayed When the clock stops Vcc is 2 6 V or lower USER SYSTEM NOT READY NO CLOCK is displayed and the emulator system program stops To operate the emulator again restart the system program e During command input wait state When the user system is turned off Vcc is 2 6 V or lower USER SYSTEM NOT READY NO CLOCK is displayed and the SH7060 operating clock is switched to the internal 7 5 MHz clock and the emulator waits for command input A RES signal is input to the SH7060 and the internal registers are initialized USER SYSTEM NOT R
131. C commands Rev 0 1 08 00 page 240 of 450 RENESAS BREAK_CONDITION_A B C Table 7 5 Specifiable Conditions BREAK_CONDITION_A1 A8 Item and Input Format Address condition A lt address 1 gt lt address 2 gt NOT Commands Description that can be Set When only lt address 1 gt is specified the BCA condition is satisfied when the address BCB bus value matches the specified value BCC When both lt address 1 gt and lt address 2 gt are specified the condition is satisfied when the address bus value is in the range from lt address 1 gt to lt address 2 gt Condition is satisfied when the address bus value provided by the NOT option setting is not equal to the specified value Only BCB can be set This condition can be masked Data condition lt LD WD D gt lt value gt NOT The condition is satisfied when the data bus value matches the specified value BCB When D WD and LD are specified the break condition is satisfied when the address is accessed in bytes words and longwords respectively In program fetch cycles the data condition is not satisfied irrespective of the data bus value When the byte access is specified as the data condition specify the address condition as well Condition is satisfied when the data bus value provided by the NOT option setting is not equal to the specified value Only BCB can be set This condition can be masked Read Write co
132. C DSR200000000 xoxoekdokookokcekekcx COOB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 01001012 00 RO STEP NORMAL END RENESAS 4 2 8 Setting Hardware Break Conditions Various hardware break conditions can be specified by the following procedures Operations 1 Enter BREAK RET to cancel the software breakpoint To confirm the cancellation execute the BREAK command enter BREAK RET 45 NOT FOUND shows that no software breakpoint is set To specify that program execution should terminate when data is written to address H 100FFF8 enter BREAK CONDITION UBCI A 100FFF8 W Enter GO 1001000 RET to start executing the program from address H 1001000 When the break condition is satisfied the information shown on the right is displayed BREAK CONDITION UBC shows that GO command execution has terminated because the break condition was satisfied Display Message BREAK RET BREAK RET 45 NOT FOUND BREAK CONDITION UBC1 A 100FFF8 W RET GO 1001000 RET PC 01001014 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 00000000 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000009 00000001 00000002 00000001 0100FFF8 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0
133. C gt R RET If a break occurs while executing a subroutine with R option specification the subroutine start address and its instruction mnemonic are displayed No interrupts are accepted during STEP command execution unless the I option has been specified After the STEP command has been executed so long as it was not forcibly terminated and if no other command has been entered single step execution can be continued by simply pressing the RET key Notes 1 Single step execution is achieved by using the hardware break function BREAK_CONDITION_UBC4 command Accordingly conditions specified with the BREAK_CONDITION_UBC4 command are invalid when using the STEP command 2 Software breakpoints specified with the BREAK or BREAK SEQUENCE command are ignored during single step execution Rev 0 1 08 00 page 335 of 450 RENESAS 3 If a delayed branch instruction is executed during single step emulation single step execution stops after the instruction immediately following the delayed branch instruction is executed Therefore two instruction mnemonics are displayed 3 If break conditions specified with the BREAK CONDITION or BREAK CONDITION UBC command are satisfied STEP execution may terminate without executing a single instruction Examples 1 To execute a program one step at a time starting from the address given by the current PC S RET PC 00001002 SR 000000F0 00000
134. DATA xxxxxxxx Rev 0 1 08 00 page 212 of 450 RENESAS vi vii i Another MCU device control board is connected Please check the MCU type and install the suitable emulator system program or change the device control board i The device control board is disconnected iii The EV chip board is disconnected iv An error occurred in the register xxx Name of emulator internal register where an error occurs BOTRAR ECT BOCNR BOMDCNR BOMASCR BOCECR BIMDCNR BIMASCR BICECR MAPR2 MAPR3 v An error occurred in the shared RAM vi An error occurred in the trace buffer memory vii An error occurred in the firm RAM area d e A program operating in the device control board is being loaded and the device control board is being tested If an error occurs the following message is displayed INVALID FIRMWARE SYSTEM 1 EMULATOR FIRMWARE READY ii FIRMWARE SYSTEM FILE NOT FOUND iii i Another MCU firmware has been installed Reinstall the correct emulator system program ii program operating in the device control board is not operating correctly Please check that the EV chip board is connected correctly iii A program operating in the device control board does not exist An incorrect system program has been registered in the flash memory Reinstall the system program and restart the emulator Note If the CTRL C keys or BREAK key is pres
135. Datagram Protocol Not supported Rev 0 1 08 00 page 56 of 450 RENESAS Session Presentation and Application Layers e FTP File Transfer Protocol The emulator operates as a client e TELNET Teletype Network The emulator operates as a server Note The emulator communicates through routers or gateways for the HS7000ELN02H but not for HS7000ELNO01H 3 3 7 System Connection Examples A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST System configuration examples are shown below Ethernet Interface The LAN board of the emulator has a 15 pin D SUB connector for the Ethernet transceiver cables Figure 3 16 shows an example of the Ethernet system configuration Use commercially available Ethernet transceivers and transceiver cables Table 3 6 shows a recommended transceiver and transceiver cable Note When using the LAN interface refer to section 3 5 1 Power On Procedures for LAN Interface and set the IP address Rev 0 1 08 00 page 57 of 450 RENESAS Ethernet transceivers LAN board Ethernet L CONT LAN EN VN N Anil Workstation 1 L Ethernet transceiver cables 5 E8000 station
136. EADY NO CLOCK is displayed after the user system has been turned off and one command has been executed When the clock stops Vcc is 2 6 V or lower USER SYSTEM NOT READY NO CLOCK is displayed and the emulator system terminates Restart the emulator in order to continue emulation Rev 0 1 08 00 page 177 of 450 RENESAS 1 11 Assembly Function 1 11 1 Overview The ASSEMBLE command enables line assembly as shown in figure 1 30 User memory Write to k ASSEMBLE memory command gt Assembly language source input Figure 1 30 Assembly Function Line assembly Assembly language source is input from the console line by line Refer to section 7 2 4 ASSEMBLE for command initiation instructions Rev 0 1 08 00 page 178 of 450 RENESAS 1 11 2 Input Format The basic instruction format is as follows instruction mnemonic gt A lt operand gt A lt comment gt RET instruction mnemonic gt Any instruction mnemonic described in the SH7060 Series Programming Manual and any assembler directive listed in table 1 9 can be used lt operand gt Any mnemonic described in the SH Series Programming Manual can be used table 1 10 lt comment gt A character string after a semicolon is considered to be a comment Items within square brackets can be omitted However some lt operand gt values for specific instructions are required A Indicates a space Notes 1 Continuation lines cannot be
137. EMONIC MOV MOV MOV MOV L MOV ADD MOV L MOV ADD OPERAND 0A RO 01 R1 01 R2 0100101C R4 R2 R3 R1 R2 R2 R4 R3 R1 fFF RO 00 RO0 TRACE B RET STS NMI RES BRQ VCC PRG 1 PRG 1 MOV PRG 1 MOV MOV PRG 1 MOV L MOV DAT 1 PRG 1 ADD MOV L PRG 1 MOV DAT 1 ADD PRG 1 EQ RENESAS 1 1 1 1 1 1111 1 1 0A RO 1 1 1111 01 R1 01 R2 1 1 1111 0100101C R4 R2 R3 1 1 4431 1 1 1111 R1 R2 R2 R4 1 1 1111 R3 R1 1 E3341 FF RO 1 1 1111 00 RO0 3 To temporarily stop the trace information TRACE RET display enter CTRL S To continue CTRL S stops trace information display CTRL Q restarts trace information display the trace information display enter CTRL CTRL S and CTRL Q are also effective with other information displays Rev 0 1 08 00 page 115 of 450 RENESAS 4 3 Application Examples 4 3 1 Break with Pass Count Condition The pass count condition can be set to a breakpoint by the following procedures Operations 1 Enter BREAK 1001012 5 RET to terminate program execution immediately after address H 1001012 is passed five times 2 To start execution from address H 1001000 enter GO 1001000 RET 3 When address H 1001012 is passed five times the data shown on the right is displayed and GO command execution terminates 4 Entering BREAK RET displays the breakpoint addres
138. EN E RE Do UO SURE tiep t Rae ee ieee 411 9 3 14 PWD PWD Leto rient etr Eee te 413 9 3 15 ROUTER RTR Con p ERES bo Mee CU 414 93 160 STA STA 415 9 3 17 SUBNET SN iei e ee ee ee 416 93 19 LOGOUT EO vua uu l uQ a 417 Section 10 Error Messages uu aperi rap ed Haas dt saaneuacaesnadadahates 419 10 1 Emulator Error Messages of E8000 sess eene enne 419 10 2 IBM PC Interface Software Error Messages essere eee 420 Part III Appendix Connecctors 433 A Serial COMME dc 433 A 2 Parallel Connector rero reir 434 A 3 LAN u osetia ies ave hee dates eevee 436 Rev 0 1 08 00 page ix of xvi A4 Seral Interface Cable u 438 Appendix B Emulator External Dimensions and Weight 44 Appendix C Connecting the Emulator to the User System 443 C 1 Connecting to the User 443 C 1 1 Connection Using the 57065 444 C 2 Precautions for User System 448 Appendix D Memory Map
139. ENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Others MOVE Transfers memory contents 7 2 28 MOVE RAM Memory to memory 7 2 29 e ROM to memory CONVERT Converts number display 7 2 18 e Displays in binary octal decimal or hexadecimal STATUS Displays emulator operating status 7 2 36 GO Monitors emulation 7 2 21 e Monitors emulation status periodically and dispylays the emulation status RESET Inputs RES signal to SH7060 7 2 34 MODE Sets and displays the SH7060 operating 7 2 27 mode HELP Displays all commands 7 2 22 HISTORY Displays the history of the input 7 2 23 command ALIAS Alias function 7 2 3 e Defines aliases ID Displays versions of the system program 7 2 24 ABORT Stops emulation in parallel mode 7 2 2 END Cancels parallel mode 7 2 18 QUIT Quits system program 7 2 31 Rev 0 1 08 00 page 134 of 450 RENESAS Table 1 3 Host Computer Interface Functions Reference Command Type Command Function Section Serial interface INTFC_LOAD Loads program from host computer 8 2 1 INTFC SAVE Saves program in host computer 8 2 2 VERIFY Verifies memory contents against 8 2 3 host computer files Bi directional LOAD Loads program from host computer 8 2 4 parallel interface SAVE Saves program in host computer 8 2 5 VERIFY Verifies memory contents against 8 2 6 host computer files 1 3 Realtime Emulati
140. ESS 00007000 TOP ADDRESS 00007000 END ADDRESS 00007FFF gt Rev 0 1 08 00 page 407 of 450 RENESAS LAN VERIFY 9 3 11 LAN VERIFY LV Verifies memory contents against the host computer file connected via the FTP interface Command Format e Verification LAN VERIFY A lt offset gt lt load module type file name RET offset Value to be added to the load module address load module type Load module type R SYSROF type load module 5 S type load module H HEX type load module M Memory image file E ELF type load module Default SYSROF type load module file name File name in the host computer Description e Verification Verifies the file in the host computer connected via the FTP interface against data in memory in the following format Before executing this command connect the emulator to the host computer with the FTP command gt LAN VERIFY load module type gt lt file name gt RET Ifa verification error occurs the address and its contents are displayed as follows lt ADDR gt lt FILE gt lt MEM gt XXXXXXXX yy y 227 Verification error address y Load module data in hexadecimal and ASCII characters zz z Memory data in hexadecimal and ASCII characters Rev 0 1 08 00 page 408 of 450 RENESAS LAN VERIFY An offset value to be added or subtracted can be specified for the address of a SYSROF
141. ETER T START DIAGNOSTIC TEST S F L T _ S F L T F RET FM gt FM gt SL RET 1 PC or 2 WS 1 1 RS 232C or 2 PARALLEL 2 RET Y N Y SELEC OAD No RET SELECT LOAD E8000 SYSTEM FILE OK RET INPUT COMMAND COMPLETED RENESAS B A E8000 SYS RET Rev 0 1 08 00 page 93 of 450 Operations 8 Enter Y RET to allow configuration file SHCNF706 SYS to be loaded Then enter the parallel transfer command to load SHCNF706 SYS in drive A on the host computer to the emulator flash memory 9 Enter Y RET to allow firmware file SHDCT706 SYS to be loaded Then enter the parallel transfer command to load SHDCT706 SYS in drive A on the host computer to the emulator flash memory 10 Enter N RET not to load the ITRON debugger 11 Enter N RET not to load the diagnostic program 12 Enter DIR RET to check whether the necessary files have been loaded 13 Enter Q RET to terminate the flash memory management tool 14 Installation is completed Rev 0 1 08 00 page 94 of 450 Display Message LOAD CONFIGURATION FILE OK Y N Y RET INPUT COMMAND B A SHCNF706 SYS RET COMPLETED LOAD FIRMWARE FILE OK Y N RET INPUT COMMAND B A SHDCT706 SYS RET COMPLETED LOAD ITRON DEBUGGER FILE OK Y N N RET LOAD D
142. Germany Tel lt 49 gt 89 9 91 80 0 Fax lt 49 gt 89 9 91 80 266 Italy Hitachi Europe GmbH Via Tommaso Gulli 39 20147 Milano Tel lt 39 gt 2 4878 61 Fax lt 39 gt 2 48 78 63 91 Via F D Ovidio 97 1 00137 Roma Tel lt 39 gt 6 82 00 18 24 Fax lt 39 gt 6 82 00 18 25 Spain Hitachi Europe GmbH c Buganvilla 5 E 28036 Madrid Tel lt 34 gt 91 7 67 27 82 Fax lt 34 gt 91 3 83 85 11 EUROPE NORTHERN EUROPE Headquarters Hitachi Europe Ltd Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel lt 44 gt 1628 585000 Fax lt 44 gt 1628 585160 Sales Offices Sweden Hitachi Europe Ltd Haukadalsgatan 10 Box 1062 S 164 21 Kista Stockholm Tel lt 46 gt 8 751 0035 Fax 46 8 751 5073 France Hitachi Europe France S A 18 rue Grange Dame Rose B P 134 F 78148 Velizy Cedex Tel lt 33 gt 1 34 63 05 00 Fax lt 33 gt 1 34 65 34 31 ASIA Headquarters Hitachi Asia Ltd 16 Collyer Quay 20 00 Hitachi Tower Singapore 049318 Tel lt 65 gt 535 2100 lt 65 gt 538 6533 Fax lt 65 gt 535 1533 lt 65 gt 538 6933 Sales Offices Taiwan Hitachi Asia Ltd Taipei Branch Office 3rd Fir Hung Kuo Building No 167 Tun Hwa North Road Taipei 105 Taiwan Tel lt 886 gt 2 2718 3666 Fax lt 886 gt 2 2718 8180 Telex 23222 HAS TP Malaysia Hitachi Asia Malaysia Sdn Bhd
143. IAGNOSTIC FILE OK Y N N RET FM DIR RET FILE ID STATUS SYS OK CONF OK LAN NO FIRM OK TRON NO DIAG NO INI OK MON OK FM Q RET START E8000 S START E8000 F FLASH EMORY TOOL L SET LAN PARAME T STAR DIAGNOSTIC TEST S F L T _ H RENESAS Manual System Program Load by RS 232C Interface To use the emulator files E8000 SYS SHCNF706 SYS and SHDCT706 SYS must be installed in the emulator flash memory If the emulator is connected to the host computer via the RS 232C interface the E8000 system program can be loaded with the following procedures Note that the E8000 system disk is assumed to be inserted in drive A of the host computer It takes approximately 20 minutes Operations 1 Initiate the E8000 system floppy disk Power on the emulator For details on the power on procedures refer to section 3 5 2 Power On Procedures for RS 232C Interface Emulator monitor command prompt Enter F RET to initiate the flash memory management tool The emulator displays prompt FM gt and waits for a flash memory management tool command Enter SL RET to load the system program Enter 1 RET to select PC as the host computer type and 1 RET to select RS 232C serial interface as the interface method Enter the directory containing the system file In this example A RET is
144. K_CONDITION_UBC4 command settings are invalidated Therefore even though a BREAK_CONDITION_UBC4 command setting is satisfied immediately after execution start GO command execution does not terminate e Display Display format is as follows BREAK RET lt ADDR gt CNT PASS XXXXXXXX 7777 5 a Setting address b Specified pass count hexadecimal c Value of pass counter shows how many times the specified address has been passed at GO command termination in hexadecimal Note The pass counter is cleared by the next GO command Rev 0 1 08 00 page 238 of 450 RENESAS Cancellation Cancels software breakpoints Breakpoints be cancelled in the following two ways Cancellation of specified software breakpoints A maximum of four breakpoints can be cancelled with one command BREAK software breakpoint gt lt software breakpoint gt RET Cancellation of all software breakpoints BREAK RET Examples 1 To set a software breakpoint at address H 100 B 100 RET 2 To generate a break when address H 6004 has been passed three times B 6004 3 RET 3 To display set software breakpoints RET lt ADDR gt lt gt PASS 00000100 0001 00000 00006004 0003 0000 4 To cancel the software breakpoint at address H 100 B 100 RET 5 To cancel all software breakpoints B RET Rev 0 1 08 00 p
145. LB24 H 42000000 to H A2FFFFFF H 42000000 to H A2FFFFFF LB25 H 43000000 to H A3FFFFFF H 43000000 to H A3FFFFFF LB26 H 44000000 to H A4FFFFFF H 44000000 to H A4FFFFFF CS5 LB27 45000000 to H 45FFFFFF H 45000000 to H 45FFFFFF LB28 H 46000000 to H 46FFFFFF H 46000000 to H 46FFFFFF LB29 H 47000000 to H 47FFFFFF H 47000000 to H A7FFFFFF Rev 0 1 08 00 page 299 of 450 RENESAS Display Displays the memory attribute of the area defined by lt start address gt lt end address gt in the following format MAP start address gt end address RET XXXXXXXX XXXXXXXX y a XXXXXXXX XXXXXXXX y INTERNAL I O b REMAINING EMULATION MEMORY LBzxxxxKB SBO 3zyyyyKB SB4 7 zzzzKB c a Address range and memory attribute of standard emulation memory Displays the addresses to which standard emulation memory is allocated y Memory attribute S Standard emulation memory SW Standard emulation memory write protection SG Standard emulation memory access inhibited W Memory on the user system write protection G Memory on the user system access inhibited b Range of internal I O area c Unused standard emulation memory size in hexadecimal The size of standard emulation memory that can be allocated is displayed LB xxxxKB SB0 3 yyyyKB SB4 7 zzzzKB Standard emulation memory Unused size of standard emulation memory LBO to LB53 block 1 Mbyte
146. LOCK Selects emulator internal clock 7 2 11 7 15 7 5 MHz 15 MHz e Selects user system clock USER U 2 to 15 MHz e Selects oscillator of EV chip board XTAL X 8 to 15 MHz e CKIO input mode Register access REGISTER Displays and modifies SH7060 register 7 2 33 lt register gt contents Line assembly ASSEMBLE Assembles instruction mnemonics and 7 2 4 writes them to the specified address Disassembly DISASSEMBLE Disassembles memory contents 7 2 16 Rev 0 1 08 00 page 132 of 450 RENESAS Table 1 22 Emulation Functions cont Reference Command Type Command Function Section Execution time GO Measures GO command execution time 7 2 21 measurement e Measures total run time e Measures execution time from BREAK_CONDITION_UBC2 condition satisfaction to BREAK CONDITION UBCt1 condition satisfaction e Measures execution time from BREAK_CONDITION_UBC4 condition satisfaction to BREAK_CONDITION_UBC3 condition satisfaction Test functions FILL Reads or writes the specified data to the 7 2 20 memory CHECK Tests SH7060 input signals 7 2 10 Command input e Automatically inputs from file e Enables editing with cursor keys e Copies immediately preceding line e Copies operand of previous command RADIX Enables value input in binary octal 7 2 32 hexadecimal or ASCII characters Default can be specified Results display RESULT Displays emulation results 7 2 35 Rev 0 1 08 00 page 133 of 450 R
147. MCIA bus Install the PC interface board to the extension slot of the personal computer and connect the interface cable supplied with the PC interface board to the E8000 station Figure 2 10 shows the system configuration using the PC interface board For information on using the PC interface board refer to the description notes of the PC interface board in use Installs the PC interface board to the extension slot of the ISA bus specification in a personal computer 1 interface board E8000 station Em PC interface cable Personal computer Figure 2 10 System Configuration Using a PC Interface Board Rev 0 1 08 00 page 24 of 450 RENESAS 2 3 4 System Configuration Using a LAN Adapter The E8000 station can be connected to a workstation via the LAN adapter For description on using the LAN adapter refer to its description notes Figure 2 11 shows the system configuration using the LAN adapter Network LAN board is not necessary E8000 station baa ee Personal computer PC interface cable Figure 2 11 System Configuration Using a LAN Adapter Rev 0 1 08 00 page 25 of 450 RENESAS Rev 0 1 08 00 page 26 of 450 RENESAS Section 3 Preparation before Use 3 1 Emulator Preparation CAUTION Read the reference sections shaded in figure 3 1 and the following warnings before using the emulator Incorrect operation will damage the user system and the emulator The USER PROGRAM will be LOST Unpack the
148. NDITION Sets displays and cancels hardware break conditions Only display function is available BREAK CONDITION UBC Sets displays and cancels hardware break conditions Only display function is available BREAK SEQUENCE Sets displays and cancels software sequential break conditions Only display function is available CHECK Tests SH7060 pin status Unusable CLOCK Sets and displays clock Only display function is available CONFIGURATION Saves and restores configuration information Unusable and displays a list CONVERT Converts data Usable DATA CHANGE Replaces memory data Unusable DATA SEARCH Searches for memory data Unusable DISASSEMBLE Disassembles and displays memory contents Usable DUMP Displays memory contents Usable END Cancels parallel mode Usable EXECUTION MODE Sets and displays execution mode Unusable FILL Writes data to memory Unusable Rev 0 1 08 00 page 221 of 450 RENESAS Table 7 1 Emulation Commands cont Usable Unusable Command Function in Parallel Mode GO Executes realtime emulation Unusable HELP Displays all commands and command format Usable HISTORY Displays all input commands Usable ID Displays the version number of the E8000 Usable system program MAP Specifies and displays memory attribute Unusable MEMORY Displays and modifies memory contents Usable MODE Specifie
149. NPUT FILE NAME SHCNF706 SYS RET COMPLETED LOAD FIRMWARE FILE OK Y N Y RET INPUT FILE NAME SHDCT706 SYS RET COMPLETED LOAD ITRON DEBUGGER FILE RET LOAD DIAGNOSTIC FILE OK FM DIR RET FILE ID STATUS SYS OK CONF OK LAN NO FIRM OK TRON NO DIAG NO INI gt START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAME 5 ART DIAGNOSTIC TEST S F L T _ RENESAS OK Y N N Y N N RET Manual System Program Load by LAN Interface To use the emulator files E8000 SYS SHCNF706 SYS and SHDCT706 SYS must be installed in the emulator flash memory If the emulator is connected to the host computer via the LAN interface the E8000 system program can be loaded with the following procedures Transfer all files on the system floppy disk to the host computer using the FTP before installation For details on the transfer method refer to the host computer user s manual It takes approximately one minute Operations 1 Power the emulator For details on the power on procedures refer to section 3 5 1 Power On Procedures for LAN Interface Confirm the emulator monitor command prompt is displayed Enter F RET to initiate the flash memory management tool The emulator displays prompt FM gt and wai
150. OF type files Interface software C compiler Cross assembler Linkage editor Personal computer Figure 2 7 Emulator Software Components Rev 0 1 08 00 page 20 of 450 RENESAS Table 2 1 Contents of E8000 System Disk File Name E8000 SYS Description E8000 system program Controls the EV chip board and processes commands such as emulation commands Loaded into the emulator memory when the system program is initialized SHDCT706 SYS SH7060 control program Controls the SH7060 in the EV chip board Loaded into the emulator memory when the system program is initialized SHCNF706 SYS Configuration file Contains SH7060 operating mode and MAP information Loaded with the system program IPW EXE Interface program Operates on the Microsoft Windows 95 of the PC and communicates with the emulator DIAG SYS Diagnostic program Loaded into the emulator memory for testing and maintenance SETUP CC Program to load files Loads files E8000 SYS SHDCT706 SYS and SHCNF706 SYS to the emulator memory Note See section 3 7 System Program Installation Rev 0 1 08 00 page 21 of 450 RENESAS 2 3 System Configuration The E8000 station can be connected to the host computer via a LAN interface optional LAN board an RS 232C interface a bidirectional parallel interface or a PC interface board 2 3 1 System Configuration Using a LAN Interface By installing an optional LAN board in the E8000 stati
151. ON to 4 command In this case specifiable conditions are address bus values data bus values or read write conditions One reset point can be specified and specifiable conditions are address bus values When executing the user program specify the mode option of the GO command as a sequential break option SB1 to SB3 Unless the option is specified a sequential break does not occur In this case a break occurs whenever each break condition is satisfied e Sequential break mode When break condition UBC2 and then break condition are satisfied a break occurs Note When the sequential break option SB of the GO command is specified while the BREAK CONDITION UBCI or 2 or both are not specified the error message below will be output At this time a user program will not be executed 35 CAN NOT USE THIS MODE Rev 0 1 08 00 page 149 of 450 RENESAS Initiation condition User program is executed in sequential break mode User program from address H 2000 Program Specification GO 2000 SB1 flow Break condition 2 is satisfied No break occurs Break condition When break condition 1 is satisfied after 1 is satisfied break condition 2 a break occurs Figure 1 12 Break with Sequential Specification 1 4 2 Software Break The contents at the specified address are replaced with a break instruction The program execution stops when the break instruction is executed The replaced instruction at the add
152. OV 01 81 01001004 201 OV 01 R2 01001006 D405 OV L 0100101C R4 01001008 6323 OV R2 R3 0100100A 321C ADD R1 R2 0100100C 2426 OV L R2 R4 0100100 6133 OV R3 R1 01001010 70FF ADD FF 01001012 8800 00 RO 01001014 8BF8 BF 01001008 01001016 0009 NOP 01001018 AFFD BRA 01001016 0100101A 0009 NOP 0100101C 0100 DATA W 0100 0100101E FFFC DATA W FFFC Rev 0 1 08 00 page 120 of 450 RENESAS 4 3 4 Searching Trace Information A particular part of the acquired trace information can be searched for using the TRACE_SEARCH command as follows Operation Display Message Enter TRACE_SEARCH A 1001018 RET TRACE_SEARCH A 1001018 RET to display the parts of trace information in which the address bus value is H 1001018 BP AB DB MA RW STS NMI RES BRQ VCC PRB D 004093 01001018 AFFD0009 EXT PRG 1 ak 1 1 1111 D 004090 01001018 AFFD0009 EXT R PRG 1 1 1 4211 D 004087 01001018 AFFD0009 EXT PRG 1 d 1 L ELET Rev 0 1 08 00 page 121 of 450 RENESAS Rev 0 1 08 00 page 122 of 450 RENESAS Part II Emulator Function Guide RENESAS RENESAS Section 1 Emulator Functions 1 1 Overview This system is an efficient software and hardware development support tool for application systems using the SH7060 microcomputer developed by Hitachi Ltd The SH7060 incorporates an interrupt controller user break controller bus state controller DMA timer pulse unit motor management timer watchdog timer co
153. P 01001018 AFFE BRA 01001018 0100101A 0009 NOP 0100101C 0100 DATA W 0100 0100101E FFFC DATA W FFFC Store the user program in the host computer before initiating the emulator and download it to the emulator In these examples the IP address is set to 128 1 1 1 CAUTION In these examples the IP address is set to 128 1 1 1 to 128 1 1 10 For the actual host computer an IP address available on the network connected to the emulator must be specified If an unavailable IP address is specified the network will have problems Rev 0 1 08 00 page 103 of 450 RENESAS 4 2 Basic Examples 4 2 1 Preparing for Connection of the LAN Host Computer The following host name and IP address are examples Specify the actual host computer name and IP address of the host computer Operations 1 Specify the host name and IP address of the host computer to which the emulator is to be connected by the LAN interface Enter the F command to initiate the flash memory management tool in the monitor command input wait state 2 Enter LH RET to store the host name and IP address of the host computer 3 Enter 1 as the selection number HITACHI RET as the host name and 128 1 1 10 RET as the IP address After that the emulator prompts the user to select another number 4 Enter E RET to enable the settings and to exit interactive mode 5 The emulator confirms whether to save the settings in the configuration file with the ab
154. PC 5C60 RET SP FFEOO RET R1 FF RET R2 11 RET R RET PC 00005C60 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 0 7 00000000 000000FF 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000 00 DSR200000000 xx KK kk KK ke e KK e e x CcOB A0G 00 0 00000000 0 00000000 x0 00000000 0 00000000 1 00 1 00000000 1 00000000 1 00000000 1 00000000 2 To modify the contents of control registers in interactive mode PC RET PC 00001000 2000 RET SR 000003F3 000000000000 005 303 RET PR 00000000 RET Rev 0 1 08 00 page 226 of 450 RENESAS 7 2 2 Terminates emulation in parallel mode Command Format e Termination ABORT RET Description e Termination Terminates GO command execution in parallel mode prompt and cancels parallel mode When GO command execution is terminated by the ABORT command in parallel mode BREAK KEY is displayed as the termination cause Example To terminate GO command emulation in parallel mode GO RESET RET PC 00001022 RET To enter parallel mode ABORT RET PC 00005C60 5 000000 0 000000000000 00 GBR 00000000 VBR 00000000 00000000 MACL
155. Purchaser It is not transferable to anyone who subsequently purchases the emulator product from you Hitachi is not liable for any claim made by a third party or made by you for a third party DISCLAIMER HITACHI MAKES NO WARRANTIES EITHER EXPRESS OR IMPLIED ORAL OR WRITTEN EXCEPT AS PROVIDED HEREIN INCLUDING WITHOUT LIMITATION THEREOF WARRANTIES AS TO MARKETABILITY MERCHANTABILITY FITNESS FOR ANY PARTICULAR PURPOSE OR USE OR AGAINST INFRINGEMENT OF ANY PATENT IN NO EVENT SHALL HITACHI BE LIABLE FOR ANY DIRECT INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY NATURE OR LOSSES OR EXPENSES RESULTING FROM ANY DEFECTIVE EMULATOR PRODUCT THE USE OF ANY EMULATOR PRODUCT OR ITS DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES EXCEPT AS EXPRESSLY STATED OTHERWISE IN THIS WARRANTY THIS EMULATOR PRODUCT IS SOLD AS IS AND YOU MUST ASSUME ALL RISK FOR THE USE AND RESULTS OBTAINED FROM THE EMULATOR PRODUCT Rev 0 1 08 00 page II of VIII RENESAS State Law Some states do not allow the exclusion or limitation of implied warranties or liability for incidental or consequential damages so the above limitation or exclusion may not apply to you This warranty gives you specific legal rights and you may have other rights which may vary from state to state The Warranty is Void in the Following Cases Hitachi shall have no liability or legal responsibility for any problems caused by misuse abuse misapplication negl
156. Q2 signal is fixed low IRQ3 IRQ3 signal is fixed low IRQ4 IRQ4 signal is fixed low IRQ5 IRQ5 signal is fixed low IRQ6 IRQ6 signal is fixed low IRQ7 IRQ7 signal is fixed low Rev 0 1 08 00 page 256 of 450 RENESAS If an error occurs FAILED AT lt pin name gt is displayed Example When the IRQO signal is low CH RET FAILED AT IRQO RENESAS CHECK Rev 0 1 08 00 page 257 of 450 CLOCK 7 2 11 CLOCK CL Sets or displays clock Command Format e Setting CLOCKA lt clock gt RET e Display CLOCK RET lt clock gt One of the following clock signals 7 Uses E8000 internal clock signal 7 5 MHz 15 Uses E8000 internal clock signal 15 MHz U User system CLOCK signal X Crystal oscillator CLOCK signal Description e Setting Selects emulator clock signals from the user system or from the emulator internal clock installed in the emulator Resets the SH7060 when a clock is selected and consequently internal I O registers and control registers return to their reset values Displays the specified clock signal If the user system clock U is specified but the user system clock signal is not input an error occurs and the emulator internal clock E is set instead At emulator initiation the user system clock U crystal oscillator on the EV chip board X and emulator internal clock 7 5 are selected in that order and the correct clock signal is set e Display Dis
157. R Displays system file loading status LH Defines the host name and IP address of the host computer to be connected Q Terminates the flash memory management tool RTR Defines routing information for remote network SL Loads the E8000 system program SN Defines the subnet mask value Note RTR and SN commands can be used only when the LAN board HS7000ELNO2H is used Example To initiate the flash memory management tool START E8000 S START E8000 F FLASH MEMORY TOOL PARAMETER ART DIAGNOSTIC TEST S F L T F RET nun man 2 gt Rev 0 1 08 00 page 80 of 450 RENESAS DIR DIR Displays system file loading status Command Format e Display DIR RET Description e Display DIR Displays system file loading status Displays OK for correctly loaded system file NG for abnormally loaded on and NO for not loaded Example To display system file loading status FM gt DIR RET lt FILE ID gt lt STATUS gt SYS CONF LAN FIRM TRON DIAG INI MON FM OK OK NO OK NO OK OK OK RENESAS Rev 0 1 08 00 page 81 of 450 LH LH LH Defines the host name and IP address of the host computer Command Format Definition LH RET Description Definition Defines the host name and IP address of the host computer Enter the host name and IP address as follows after the specified n
158. RET RET RET Rev 0 1 08 00 page 231 of 450 RENESAS BACKGROUND_INTERRUPT 7 2 5 BACKGROUND_INTERRUPT Sets and displays user interrupts in BI command input wait state Command Format e Setting BACKGROUND_INTERRUPT A E lt loop program address gt D C RET e Display BACKGROUND_INTERRUPT RET E D User interrupt accepting mode in command input wait state E Enables user interrupts in command input wait state D Disables user interrupts in command input wait state default at emulator shipment lt loop program address gt Address of the loop program for accepting user interrupts When omitted the last address of internal Y RAM area 3 Stores the settings as configuration information in emulator flash memory Description e Setting Enables user interrupts in command input wait state and sets the address of the loop program for accepting user interrupts If the above settings are reset when user interrupts have already been enabled even in the middle of the user interrupt processing the emulator forcibly terminates the processing and then initiates the loop program for accepting user interrupts again BACKGROUND_INTERRUPT RET Enables user interrupts in command input wait state and sets the address of the loop program for accepting user interrupts The loop program must be stored in the RAM area If no address is specified the address specified before is used After setting the
159. RMANCE_ANALYSIS1 command Specifiable range H 1 to H FFFF Subroutine entry address range lt start address of subroutine entry range gt lt end address of subroutine entry range gt Subroutine exit address range lt start address of subroutine exit range gt lt end address of subroutine exit range gt Address range of the area which is accessed by the subroutine lt start address of range gt lt end address of range gt Bus cycle type for the specified access area DAT Execution cycle Address range of the called subroutine accessed by the calling subroutine lt start address gt lt end address gt Initializes performance measurement information Displays specified subroutine addresses Displays subroutine execution time and execution count in numerical form If V is omitted display is in graph form Rev 0 1 08 00 page 313 of 450 RENESAS PERFORMANCE ANALYSIS Description e Specification Measures the execution time and count of the specified subroutine during user program execution initiated with the GO command The following modes can be specified a Subroutine execution time measurement mode 1 Measures the execution time and count of the subroutine defined by lt start address gt and lt end address gt Measurement starts when an address within the range from the start address to the end address is prefetched halts when an address outside the specified range is prefetched and restarts when an address
160. ROM RAM area 43 CANNOT RECOVER A XXXXXXXX The break instruction at the address xxxxxxxx where a breakpoint is specified with the BREAK or BREAK_SEQUENCE command could not be recovered after GO command execution terminates Accordingly a break instruction remains at the breakpoint address A hardware error might have occurred Correct the error and reload and re execute the program 44 VERIFY ERROR A verification error occurred when modifying memory contents Writing to ROM was attempted or there was a hardware error Check the memory area 45 NOT FOUND The specified data or information was not found Correctly specify data 47 FTP NOT CONNECTED The command cannot be executed because the FTP interface is not connected Connect the FTP interface with the FTP command 48 FTP ALREADY CONNECTION The FTP interface has already been connected Disconnect the FTP interface and re enter the command 49 CONDITION ALREADY USED The condition cannot be specified because another command has already specified it Rev 0 1 08 00 page 421 of 450 RENESAS Table 10 1 Error Messages cont Error No Error Message Description and Solution 50 RESERVED AREA A reserved area was accessed 51 INTERNAL I O AREA The internal I O area was accessed 52 INTERNAL AREA An attempt was made to access an area other than CSO to CS5 This area cannot be accessed w
161. ROR FILE OPEN ERROR The directory to which the specified IBM PC file is to be saved is full or the file name contains an error INTFC ERROR FILE READ ERROR An error has occurred while reading an IBM PC file ERROR FILE RENAME ERROR Rev 0 1 08 00 page 428 of 450 An error has occurred while changing an IBM PC file name Check the specified file name RENESAS Table 10 5 Interface Software Error Messages cont Error Message INTFC ERROR FILE WRITE ERROR Description and Solution An error has occurred while writing to an IBM PC file The available memory on the disk is insufficient INTFC ERROR INVALID COMMAND An invalid command has been sent from the debugger INTFC ERROR I O ERROR An I O error has occurred during file transfer Check the cable connection and the operating environment and re transfer the file INTFC ERROR NO INTERFACE BOARD The interface board is not inserted in the IBM PC expansion slot Check the DIP switch setting on the interface board and that the interface board is inserted in the expansion slot correctly and re transfer If the same error occurs again inform a Hitachi sales agency INTFC ERROR STOP COMMAND CHAIN Y N Automatic command input from the IBM PC file has been completed Enter Y to terminate command input enter N to continue command input INTFC ERROR SYNTAX ERROR An error exists in the IBM PC file name
162. RS 232C Interface Figure 3 18 shows the E8000 station connected to the personal computer via an RS 232C for a serial interface DCONT TRC CONT LAN H180Q3090 SH 100 120 00 240 2 Personal computer 6 232 interface cable supplied E8000 station rear panel Figure 3 18 RS 232C Interface Rev 0 1 08 00 page 60 of 450 RENESAS Parallel Interface Figure 3 19 shows the E8000 station connected to a personal computer via parallel cable for a parallel interface The parallel interface enables higher speed installation of the system program and higher speed load save or verification of the user program as compared with the RS 232C interface Note When using the parallel interface connect not only the parallel interface cable but also the RS 232C cable It is impossible to use only the bidirectional parallel interface cable 8003090 5 Bidirectional parallel interface cable supplied C T mi RS 232C interface cable supplied E8000 station rear panel Figure 3 19 Bidirectional Parallel Interface Rev 0 1 08 00 page 61 of 450 RENESAS Rev 0 1 08 00 page 62 of 450 RENESAS 3 4 Operation Procedures of Interface Software IPW Interface software IPW is used when the emulator is connected to the host computer via the RS 232C interface Interface software IPW runs on the Microsoft Windows 95 3 4 1 Installation and Initiation of Interface Software IPW Make a copy of file IPW EXE in the sy
163. Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics To all our customers Regarding the change of names mentioned in the document such as Hitachi Electric and Hitachi XX to Renesas Technology Corp The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003 These operations include microcomputer logic analog and discrete devices and memory chips other than DRAMs flash memory SRAMs etc Accordingly although Hitachi Hitachi Ltd Hitachi Semiconductors and other Hitachi brand names are mentioned in the document these names have in fact all been changed to Renesas Technology Corp Thank you for your understanding Except for our corporate trademark logo and corporate statement no changes whatsoever have been made to the contents of the document and these changes do not constitute any alteration to the contents of the document itself Renesas Technology Home Page http www renesas com Renesas Technology Corp Customer Support Dept April 1 2003 34 NESAS Renesas Technology Corp Cautions Keep safety first in your circuit designs 1 Renesas Techno
164. S Table 10 1 Error Messages cont Error No 68 Error Message INVALID HOST NAME Description and Solution The specified host name is not defined in flash memory Define the host name with the emulator monitor command F flash memory management tool initiation 69 OUT OF CS AREA ADDRESS An attempt was made to allocate emulation memory to an area other than CSO to CS5 Check the specified address 70 OUT OF CS AREA ADDRESS An attempt was made to allocate emulation memory to an area other than CSO to CS5 Emulation memory was allocated only to the allocatable area 71 MAPPING BOUND MUST BE IN 1MB UNITS Memory was allocated in 1 Mbyte units with the MAP or MOVE TO RAM command For details refer to the MAP command 73 BREAK POINT IS DELETED XXXXXXXX A software breakpoint specified at the displayed address was canceled because the contents of the address were modified with the user program 74 CANNOT SET A xxxxxxxx A breakpoint cannot be specified at the displayed address by the BREAK or BREAK_SEQUENCE command before GO command execution A hardware error might have occurred or the contents of the memory address might be a break instruction H 0000 Correct the error and reload and re execute the program 76 MAPPING BOUND MUST BE IN 256KB UNITS Memory was allocated in 256 kbyte units with the MAP or MOVE_TO_RAM command For details refer to the MAP command
165. SAS Section 10 Error Messages 10 1 Emulator Error Messages of E8000 The E8000 system program outputs error messages in the format below Table 10 1 lists error messages descriptions of the errors and error solutions nn error message nn Error No Table 10 1 Error Messages Error No Error Message Description and Solution 1 INTERNAL ERROR nn An error occurred in the E8000 system program or station Error code nn gives specific details Contact a Hitachi sales agency and inform them of the code and state 2 HOST ERROR nn An I O error occurred in data transfer between the emulator and host computer Error code nn gives specific details Refer to table 10 2 5 INVALID DEVICE CONTROL The connected device control board is not BOARD supported by this E8000 system program Check the E8000 system program and device control board numbers 6 USER SYSTEM NOT READY The user clock or crystal oscillator clock was not input and therefore could not be selected The emulator internal clock was used instead Check if the clock signal is output correctly 9 INVALID OPTION The specified option is incorrect Check the specified option 10 FLASH MEMORY IS WRITE Flash memory is write protected Remove write PROTECTED protection 11 FLASH MEMORY WRITE An error occurred during write to flash memory ERROR 13 FILE NOT FOUND The configuration information specified to be restored with the CONFIGURATION comm
166. SS 00000000 END ADDRESS 00003042 Rev 0 1 08 00 page 377 of 450 RENESAS INTFC_SAVE 8 2 2 INTFC_SAVE IS Saves program in host computer Serial interface Command Format e Save INTFC_SAVEA lt start address gt A lt end address gt A lt number of bytes lt load module type gt ALF lt file name gt RET lt start address gt Start memory address lt end address gt End memory address lt number of bytes gt Number of bytes to be saved lt load module type gt Load module type S S type load module H HEX type load module Default S type load module LF Adds an LF code H 0A to the end of each record lt file name gt File name in the host computer Description e Save Saves the memory contents in the specified load module type in a host computer file via the serial interface Use interface software IPW for the host computer An S type or HEX type load module can be saved An SYSROF type or ELF type load module cannot be saved SAVE start address gt end address gt lt load module type gt lt file name gt RET When save is completed the start and end memory addresses are displayed as follows TOP ADDRESS lt start address gt END ADDRESS lt end address gt When the LF option is specified the emulator adds an LF code H 0A to the end of each record in addition to a CR code in the S type or HEX type load module Rev 0 1 08 00 page 378 of
167. TERNET ADDRESS 128 1 1 10 Rev 0 1 08 00 page 402 of 450 RENESAS 9 3 8 LAN HOST LH Command Format e Display Description Display LAN HOST all defined host computers LAN HOST RET Displays the names and IP addresses of Displays the LAN host computer names and internet addresses defined in the emulator flash memory in the following format LAN HOST NO 01 XXXXXX 03 XXXXXX 05 XXXXXX 07 XXXXXX 09 XXXXXX Example RET HOST NAME IP ADDRESS NO XXX XXX XXX XXX 02 04 XXX XXX XXX XXX 06 XXX XXX XXX xxx 08 XXX XXX XXX XXX HOST NAME IP ADDRESS XXXXXX XXXXXX XXXXXX XXXXXX To display all of the defined host computer names and IP addresses LH NO 01 03 05 07 09 RET HOST HOST HOST 1 X NAM E gt lt IP ADDRESS gt NO lt HOS 128 1 1 1 02 HOST2 128 1 1 8 04 06 08 RENESAS NAM XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX XXX E IP ADDRESS gt 12851 4 Rev 0 1 08 00 page 403 of 450 LAN_LOAD 9 3 9 LAN_LOAD LL Loads a load module file from the host computer to memory via the FTP interface Command Format LoadLAN_LOAD A lt offset gt lt load module type gt lt file name gt RET lt offset gt Value to be added to the load module address lt load module type gt Load module type R SYSROF type load modu
168. TOR The USER PROGRAM will be LOST Use the following procedure to install the crystal oscillator 1 Check that the emulator power switch is turned off Ensure that the power lamp on the left side of the E8000 station s front panel is not lit 2 Attach the crystal oscillator into the terminals on the EV chip board figure 3 8 Rev 0 1 08 00 page 40 of 450 RENESAS Crystal oscillator Enlarged view Crystal oscillator terminals Figure 3 8 Installing the Crystal Oscillator 3 Turn on the user system power and then the emulator power X crystal oscillator will then be automatically specified in the CLOCK command Using the crystal oscillator enables execution of the user program at the user system s operating frequency even when the user system is not connected Rev 0 1 08 00 page 41 of 450 RENESAS External Clock Use the following procedure to select the external clock A WARNING Always switch OFF the emulator and user system before connecting or disconnecting the EV CHIP BOARD and the USER SYSTEM Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST 1 Check that the emulator power switch is turned off Ensure that the power lamp on the left side of the E8000 station s front panel is not lit 2 Connect the EV chip board to the user system and supply a clock through the EXTAL pin
169. WDT hn Ea aE Ena E 202 3 7 Timer Pulse Unit TPU Motor Management Timer MMT and Compare Match Timer reb Ee eene nire vega oer 202 3 8 Serial Communication Interface SCI essere 202 3 9 DMA Controller DMA9 a aa nennen nennen nenne erre 202 310 Bus State Comtroller re Sasu 202 3 11 User Break Controller UBO enne enne enne 203 O Por bees s eic 203 DI PV 203 3 14 A D Converter and D A Convetrter a 203 Section 4 User System Interface 205 Section5 Troubleshooting Rus IER 211 921 Internal System E e PE LEE PR RENDER ER E E 211 5 2 Troubleshooting Procedure iege epe deett tea tna 214 Section 6 Command Input and Display eee 217 6 1 Command S Ota x qm 217 6 1 1 Command Input FOgm0at 217 6 12 H
170. When C to F of the switch are set memory areas cannot be allocated Set one of 0 to B 3 3 3 Installing the PC Interface Board A WARNING Always switch OFF the PC and peripheral devices connected to the PC before installing the PC interface board Failure to do so will result in a FIRE HAZARD and will damage the PC interface board and peripheral devices or will result in PERSONAL INJURY Remove the cover of the PC and install the PC interface board in the ISA bus specification extension slot Tighten the screw after confirming that the PC interface cable can be connected to the board Rev 0 1 08 00 page 51 of 450 RENESAS PC interface board Screw 8 Interface cable PC case ISA bus specification extension slot Figure 3 14 Installing the PC Interface Board Rev 0 1 08 00 page 52 of 450 RENESAS 3 3 4 Connecting the E8000 Station to the PC Interface Board A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM vwill be LOST Before using the emulator connect the E8000 station to the PC interface board with the PC interface cable supplied as shown in figure 3 15 DCONT TRC CONT LAN PC interface board NO HI80Q03090Z28H PC interface cable V x on mm alll E8000 station rear panel
171. a gt Inputs the value to be newly set Terminates the command A Displays the previous register Only RET Does not modify the register displays the following one To display all register contents use the REGISTER command Note Registers are set as follows at emulator initiation RO to R14 H 00000000 VBR H 00000000 R15 SP Power on reset vector value GBR H 00000000 MACH H 00000000 MACL 00000000 PC Power on reset vector value SR H 000000F0 PR 00000000 RS RE 00000000 MOD H 00000000 DSR H 00000000 AIG H 00 0 1 0 YO 00000000 If the 597060 is reset by the emulator RESET or CLOCK command registers are set as follows RO to R14 The value before reset VBR H 00000000 R15 SP Power on reset vector value GBR The value before reset MACH The value before reset The value before reset PC Power on reset vector value SR H 000000F0 PR The value before reset RS RE The value before reset MOD The value before reset DSR H 00000000 The value before reset A1 MO MI 0 X1 YO Y1 The value before reset Since the reset values of RO to R14 in the SH7060 are not fixed the initial values must be set by a program Rev 0 1 08 00 page 225 of 450 RENESAS lt register gt Examples 1 To set H 5C60 in PC H FFE00 in SP H FF in R1 and 11 in R2 and then display all registers
172. ace TRACE_CONDITION_ A B C 1 2 3 4 5 6 7 8 AS lt start address gt lt end address gt A lt condition gt A lt condition gt A lt condition gt SR RET Subroutine range trace TRACE_CONDITION_ A B C 1 2 3 4 5 6 7 8 A lt condition gt A lt condition gt A lt condition gt S RET Trace stop e Display TRACE_CONDITION_ A B C 1 2 3 4 5 6 7 8 TRACE_CONDITION_ A B C RET Cancellation TRACE CONDITION A B C 1 2 3 4 5 6 7 8 RET TRACE_CONDITION_ A B C RET A B C Trace condition type 1 2 3 4 5 6 7 8 Trace condition number When omitted all conditions will be displayed or canceled lt start address gt Start address of subroutine lt end address gt End address of subroutine lt condition gt Trace conditions to be specified ST Subroutine trace mode specification R Range trace mode specification SR Subroutine range trace mode specification S Trace stop specification Rev 0 1 08 00 page 352 of 450 RENESAS TRACE_CONDITION_A B C Description Setting Specifies a trace acquisition condition trace mode for user program emulation GO command execution Trace condition numbers are automatically set to trace conditions in their specified order The specified trace acquisition condition trace mode will apply for trace acquisition following this command execution Free Trace Acquires trace information during all bus cycles if no conditions have been set wi
173. age 239 of 450 RENESAS BREAK_CONDITION_A B C 7 27 BREAK CONDITION Specifies displays and cancels a BCA BCB BCC hardware break condition Command Format e Setting BREAK CONDITION A B C 1 2 3 4 5 6 7 8 A lt condition gt lt condition gt A lt condition gt RET e Display BREAK CONDITION A B C 1 2 3 4 5 6 7 8 RET e Cancellation BREAK CONDITION A B C 1 2 3 4 5 6 7 8 A RET A B C Break type 1 2 3 4 5 6 7 8 Break number When omitted all conditions will be displayed or cancelled lt condition gt Hardware break condition refer to table 7 5 for details Description e Setting Specifies hardware break conditions BREAK_CONDITION_A B C Program execution stops when the specified conditions are satisfied The specifiable conditions for the three types of hardware breaks BREAK_CONDITION_A B C are summarized in table 7 5 Table 7 4 Maximum Conditions for Each Break Type Maximum Break Type Conditions Remarks BREAK 8 The maximum specifiable number of conditions is reduced CONDITION A by the number of conditions set with the TRACE CONDITION A command BREAK 8 The maximum specifiable number of conditions is reduced CONDITION B by the number of conditions set with the TRACE CONDITION B command BREAK 8 The maximum specifiable number of conditions is reduced CONDITION C by the number of conditions set with the PERFORMANCE ANALYSIS and TRACE CONDITION
174. als are connected to the user system directly from the SH7060 on the EV chip board Therefore like the timers the interface is valid during the command input wait state as well as emulation For example when data is written to the transmit data register TDR using the MEMORY command after the serial communication interface output has been prepared data is output to the TxD pin 3 9 DMA Controller DMA The DMA operates during the command input wait state as well as during emulation When a transfer is requested the DMA executes a DMA transfer 3 10 Bus State Controller The SH7060 wait state controller has a programmable wait mode and a WAIT pin input mode The programmable wait mode is valid when the emulation memory or user external memory is accessed but input to the user WAIT pin is only valid when user external memory is accessed Rev 0 1 08 00 page 202 of 450 RENESAS 3 11 User Break Controller UBC The SH7060 UBC operates only during emulation 3 12 T O Port The SH7060 I O port can also be used as peripheral module input output pins or as an address data bus It is specified as I O port pins according to the operating mode or internal register settings The I O port pins are also valid in the emulator command input wait state or during emulation The I O port pins can be read from and written to by using the MEMORY command 3 13 PVcc This emulator determines and switches the input voltage level of PVcc 1 When
175. ame format is as follows lt drive name gt lt file name gt lt extension gt 6 2 Special Key Input The emulator supports special key functions to facilitate keyboard operations In the following description CTRL X means pressing the CTRL and X keys simultaneously 6 2 1 Command Execution and Termination e Command execution RET Enters all characters on that line regardless of the cursor position and executes the command Command termination CTRL C Terminates command execution All characters BREAK typed so far are lost and the emulator enters command input wait state 6 2 2 Display Control e Display stop CTRL S Suspends display Resumes display by entering CTRL and Q keys e Display restart CTRL Resumes display Rev 0 1 08 00 page 219 of 450 RENESAS 6 2 3 Command Re entry Display last entered line Display last entered command 6 2 4 Display Control Move cursor backwards Move cursor to word starting position Delete one character Cancel line Advance cursor Insert space Tab over CTRL L lt command name gt CTRL CTRL T CTRL D CTRL X CTRL W CTRL U CTRL I Rev 0 1 08 00 page 220 of 450 Redisplays the last line entered Pressing these keys will repeatedly redisplay up to 16 lines and then return to the last line again When a period is entered after a command the previously input parameters of that command are displayed If two periods are en
176. and At emulator initiation binary code is selected as the default However if ASCII is selected with the ASC command change the file type to binary code with the BIN command before loading For details refer to section 9 3 2 BIN Example To load a SYSROF type load module enter the following command line F11 ABS indicates the host computer file name Before entering the LAN LOAD command connect the emulator to the host computer with the FTP command FTP 5 1 RET Username USER1 RET Password x RET login command success gt LL F11 ABS RET LOADING ADDRESS 00007000 TOP ADDRESS 00007000 END ADDRESS 00007FFF FTP gt Rev 0 1 08 00 page 405 of 450 RENESAS LAN_SAVE 9 3 10 LAN_SAVE LSV Saves the specified memory contents in the host computer connected via the FTP interface Command Format e Save LAN SAVEA sstart address gt A lt end address gt A lt number of bytes load module type gt ALF lt file name gt RET start address gt Start memory address end address gt End memory address number of bytes number of bytes to be saved lt load module type Load module type 5 S type load module H HEX type load module M Memory image file Default S type load module LF Adds an LF code H 0A to the end of each record lt file name gt File name in the host computer Description e Save Saves the specified memory contents i
177. and was not found in the emulator flash memory 15 INVALID FILE The specified file has invalid contents and cannot be read from or written to Check the contents of the specified file Rev 0 1 08 00 page 419 of 450 RENESAS Table 10 1 Error Messages cont Error No 20 Error Message SYNTAX ERROR Description and Solution The command syntax is incorrect Correct the syntax 21 INVALID COMMAND The specified command is invalid or this command cannot be executed in parallel mode Correctly enter the command 22 INVALID DATA The specified data is invalid Correctly enter the data 23 INVALID ADDRESS The specified address or address range is invalid Correctly enter the address 24 DATA OVERFLOW The specified data is more than 4 bytes Correctly specify the data 27 INVALID CONDITION Invalid conditions are specified Correctly enter the conditions 28 DOUBLE DEFINITION The item has already been defined Check the item to be defined 29 TOO MANY ALIASES Too many aliases are specified Delete any unnecessary alias and re specify 31 INSUFFICIENT MEMORY The size of emulation memory to be allocated with the MAP command was not available Emulation memory was allocated within the available memory size 32 INVALID ASM MNEMONIC An instruction mnemonic in an assembly language statement is invalid Correct the instruction mnemonic
178. ansfer with the LAN_LOAD LAN_SAVE or LAN_VERIFY command The host name specified in this command must be defined with the flash memory management tool If lt host name gt has been defined enter the user name and password in the following format After FTP command execution the prompt changes from a colon to FTP gt Emulation commands can be executed even after FTP connection FTP host name gt Username RET Password RET login command success FTP gt c a Enter user name b Enter password c An FTP gt prompt is displayed after FTP connection Note A password must be specified before a host computer can be connected via the FTP interface Rev 0 1 08 00 page 400 of 450 RENESAS To connect the emulator to host computer HOST1 via the FTP interface FTP HOST1 RET Username USERI RET Password RET login command success FY P gt RENESAS Rev 0 1 08 00 page 401 of 450 9 3 7 LAN LAN Displays emulator IP address Command Format e Display LAN RET Description e Display Displays the emulator s internet IP address stored in the emulator in the following format LAN RET E8000 INTERNET ADDRESS xxx xxx xxx xxx a a Emulator IP address Specify the emulator IP address with the emulator monitor command L Example To display the emulator IP address LAN RET E8000 IN
179. are in progress the following messages are displayed E8000 MONITOR HS8000ESTO2SR Vm n Copyright C Hitachi Ltd 1995 a Licensed Material of Hitachi Ltd ESTING b RAM 0123 START E8000 S START E8000 F FLASH MEMORY TOOL c SET LAN PARAMETER START DIAGNOSTIC TEST S F L T a Emulator monitor start message b Internal RAM and registers are being tested A number from 0 to 3 is displayed as each of the four internal RAM blocks has been tested If an error occurs the address write data and read data are displayed as follows RAM ERROR ADDR xxxxxxxx W DATA xxxxxxxx R DATA xxxxxxxx After RAM testing is completed the registers are tested No data will be displayed if an error does not occur If an error occurs the following message is displayed xxxx REGISTER ERROR W DATA xx R DATA xx xxxx Name of emulator internal register where an error occurs c The emulator monitor is in command input wait state Note Operation continues if an error occurs in step b but the error should be investigated according to section 5 2 Troubleshooting Procedure without loading the emulator system program Rev 0 1 08 00 page 211 of 450 RENESAS Internal System Test at Emulator System Program Initiation The emulator system program performs internal system tests mainly on the emulator registers at its initiation a Emulat
180. at the break address specified with the GO command SUBROUTINE TIMEOUT The timeout condition specified with the PERFORMANCE_ANALYSIS1 command was satisfied SUBROUTINE COUNT The execution count limit specified with the OVERFLOW PERFORMANCE_ANALYSIS1 command was exceeded TRACE BUFFER The trace buffer overflowed OVERFLOW Rev 0 1 08 00 page 287 of 450 RENESAS GO During user program execution the SH7060 execution status is displayed Displayed contents are shown in table 7 15 Time interval specified when MON option of the EXECUTION_MODE command was specified and if there is a difference from the previous status the status is displayed Table 7 15 Execution Status Display Display BACK Meaning The BACK signal is low POZXXXXXXXX During user program execution the program fetch address is displayed according to the time interval specified with the MON option in the EXECUTION MODE command RESET The MCU has been reset The RESET signal is low RUNNING User program execution has started This message is displayed once when GO command execution starts or when parallel mode is cancelled Note that this message will be deleted when second message in this table is displayed SLEEP The MCU is in the sleep state SOFTWARE STANDBY The MCU is in the software standby state TOUT A The address bus value
181. ate a break when byte data H 10 is accessed at address H F000000 BCU1 A F000000 D 10 RET 2 generate a break when data is written to address H 1000000 BCU2 A 1000000 W DAT RET 3 To display the specified conditions BCU RET BCU1 A F000000 D 10 BCU2 A 1000000 DAT BCU3 BCU4 RESET 4 To cancel the specified conditions BCU1 RET BCU2 RET Rev 0 1 08 00 page 251 of 450 RENESAS BREAK_SEQUENCE 7 2 9 BREAK_SEQUENCE Sets displays and cancels software BS breakpoints with pass sequence specification Command Format e Setting BREAK SEQUENCEA lt pass point gt A lt pass point gt A lt pass point A lt pass point gt A lt pass point gt A lt pass point gt A lt pass point gt RET Pass point setting BREAK SEQUENCEA reset point gt R RET Reset point setting e Display BREAK SEQUENCE RET e Cancellation BREAK SEQUENCBE A Pass point cancellation BREAK SEQUENCE A R RET Reset point cancellation pass point Addresses two to seven points R Reset point specification reset point Address one point Note When an odd address is specified it is rounded down to an even address Description e Setting Sets pass points to enable the break for which the pass sequence is specified sequential break GO command emulation is terminated when these pass points have been passed in the specified sequence Notes 1 Do not set a pass
182. ation connector CN3 to the EV chip board 3 External probe connector For connecting to the external probe Rev 0 1 08 00 page 16 of 450 RENESAS 4 Device control board slot For installing the device control board depends on the target device 2 1 3 EV Chip Board Configuration Each part of the name in the EV chip board HS7060EBK81H is shown below User system interface cable connector Coaxial cable connector Top view of HS7060EBK81H Bottom view of HS7060EBK81H Station to EV chip board x interface connectors Coaxial cable connector Side view of HS7060EBK81H Figure 2 5 EV Chip Board HS7060EBK81H 1 Station to EV chip board interface For trace cable 4 which connects the emulator to connector CN4 the EV chip board 2 Station to EV chip board interface For trace cable 3 which connects the emulator to connector CN3 the EV chip board Rev 0 1 08 00 page 17 of 450 RENESAS 3 Station to EV chip board interface connector CN2 4 Station to EV chip board interface connector CN1 5 Crystal oscillator terminals 6 HS7060PWB20H 7 HS7060PWB30H 8 HS7060PWB40H 9 Board connector For trace cable 2 which connects the emulator to the EV chip board For trace cable 1 which connects the emulator to the EV chip board For installing a crystal oscillator to be used as an external clock source for the SH7060 Includes connectors
183. atisfied is displayed with a minus To specify a bus cycle pointer the BP option must be selected The default is the instruction pointer Note When a delay count condition is specified with the BREAK CONDITION B or TRACE CONDITION B command the combination of conditions also specified is handled as a delay start condition Delay starts to be counted when the delay start condition is satisfied When no delay start condition has been specified or termination has been caused by another reason the pointer value will be relative to the latest trace information Pointer Trace information Oldest information Display start pointer Delay count Display range condition satisfied _ Display end pointer Latest information Figure 7 2 Display Range Specified by Pointers Pointer default is as follows a If lt start pointer gt is omitted the start pointer specified by the PTR option of the TRACE DISPLAY MODE command is used b If end pointer is omitted the end pointer specified by the PTR option of the TRACE DISPLAY MODE command is used Rev 0 1 08 00 page 346 of 450 RENESAS To display only instruction mnemonics of the executed instructions uses the following format IP ADDR MNEMONIC OPERAND D XXXXXX XX XX XX XX a b c d a Instruction pointer Relative instruction location based on the instruction where a delay count c
184. body of EV chip board Flat cable User cable head Y EV chip board Coaxial cable connector number Connector number Connector number of cable body of EV chip board Figure C 1 Connection Using the HS7065ECH81H Cable head IC socket NQPACK176SD manufactured by Unit mm User system Tokyo Electech Corporation Tolerance 0 5 mm Figure 2 Restrictions on Component Installation Rev 0 1 08 00 page 445 of 450 RENESAS 27 10 min 23 10 0 50 x 43 21 50 0 30 ri p 42 50 0 05 0 25 0 05 10 0 0 2 10 0 0 2 gt i m 91 0 Guide hole 2 00 0 10 4 21 5 0 30 0 50 43 Unit mm Tolerance 0 5 mm Figure C 3 Recommended Mount Pad Dimensions of the User System IC Socket Rev 0 1 08 00 page 446 of 450 RENESAS 2 Precautions for User System Connection When connecting the EV chip board to the user system note the following 1 Secure the E8000 station location Place the E8000 station and EV chip board so that the station to EV chip board interface cable is not bent or twisted as shown in figure C 4 A bent or twisted cable will impose stress on the user interface leading to connection or contact failure Make sure that the emulator station is placed in a secure position so that it does not move and impose stress on the user interface during
185. ce consists of 16 switches eight switches in both SW1 and SW2 as shown in figure 3 11 The switch state becomes on when the switches are pushed to the left and the state becomes off when the switches are pushed to the right ON state ON state OFF state Side view of SW1 and SW2 ON OFF states Setting at shipment Figure 3 11 Console Interface Switches Rev 0 1 08 00 page 45 of 450 RENESAS change the console interface settings turn switches S1 to 58 or off in the console interface switches SW1 and SW2 Table 3 1 lists the console interface settings and the corresponding setting states Note Be sure to turn off the power supply of the E8000 station before changing the settings of console interface switches SW1 and SW2 Table 3 1 Console Interface Settings Transfer Rate SW2 53 52 1 2400 bps OFF OFF OFF 4800 bps OFF OFF ON 9600 bps OFF ON OFF Setting at shipment 19200 bps OFF ON ON 38400 bps ON OFF OFF Stop bit Length SW2 54 1 bit OFF Setting at shipment 2 bits ON Bit Length SW2 55 7 bits OFF 8 bits ON Setting at shipment Parity SW2 S6 None OFF Setting at shipment Parity ON Even odd Parity SW2 S7 1 bit OFF Setting at shipment 2 bits ON Note Effective only with a parity Rev 0 1 08 00 page 46 of 450 RENESAS Table 3 1 Console Interface Settings cont Flow Conirol Protocol SW2 58 CTS RTS OFF X ON OFF ON Settin
186. ce when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Rev 0 1 08 00 page VIII of VIII RENESAS Preface Thank you for purchasing the emulator for the Hitachi microcomputer SH7060 CAUTION Read section 3 Preparation before Use in Part I E8000 Guide of this user s manual before using the emulator product Incorrect operation will damage the user system the emulator product and the user program The emulator is an efficient software and hardware development tool for systems based on Hitachi microcomputer SH7060 By exchanging the device control board the EV chip board and the cable this emulator can also be used for systems using other microcomputers This manual describes the emulator functions and operations Please read this manual carefully in order to gain a full understanding of the emulator s performance In particular be sure to read section 1 2 Warnings in Part I E8000 Guide A 3 5 type system floppy disk in PC 1 44 Mbyte format is packaged together with the device control board SH7060 E8000 SYSTEM 1 SYSTEM HS7060EDD
187. cified not the start of an instruction the single step function will not stop and execution continues for the specified number of steps Rev 0 1 08 00 page 163 of 450 RENESAS 1 7 Execution Time Measurement 1 7 1 Execution Time Measurement GO to BREAK Time The user can measure the user program execution time by specifying with the GO command In this mode the emulator measures the total execution time from when the user program is started with the GO command to when it is stopped by a break lt Program execution starts Time measurement The break condition is The break condition is satisfied satisfied Figure 1 22 Normal Mode Time Measurement Range Rev 0 1 08 00 page 164 of 450 RENESAS Time Interval Measurement Mode 1 emulator measures the elapsing between the satisfaction of hardware break conditions 2 BREAK CONDITION UBC2 and 1 BREAK CONDITION UBCI Condition 2 Condition 2 __ Condition 2 __ is satisfied is satisfied is satisfied Condition 2 b is satisfied Condition 1 Condition 1 BREAK _ _ is satisfied is satisfied Measurement time a Measurement time b Measurement time Figure 1 23 Time Interval Measurement Mode 1 In this mode even if break condition 2 is satisfied a break does not occur A break occurs after the hardware break condition 2 and then break condition 1 are satisfied Even if break condition 2 is satisfied many times before break conditi
188. combination with any of the above break conditions Note For BREAK CONDITION command only a satisfaction count can be specified Rev 0 1 08 00 page 145 of 450 RENESAS Break condition H 50 bus cycles are executed after the address H 2000 User program prog is accessed Program n flow Specification A 2000 DELAY 50 Break condition is satisfied No break occurs H 50 bus cycles Break occurs H 50 bus E cycles after the satisfaction of the condition _ Figure 1 9 Break with Delay Count Specification Rev 0 1 08 00 page 146 of 450 RENESAS In satisfaction count specification break occurs when the above break condition address bus value data bus value or read write condition is satisfied for a specified number of times 65 535 max When specifying this condition specify it in combination with any of the above break conditions Break condition The address H 2000 is accessed for H 50 times User program Specification A 2000 COUNT 50 dition i Break occurs after the address bear H 2000 is accessed for H 50 times satisfied Program flow Branch instructions etc Figure 1 10 Break with Satisfaction Count Specification Rev 0 1 08 00 page 147 of 450 RENESAS PC Value BREAK_CONDITION_UBC1 to 4 A break occurs when the SH7060 program counter PC value satisfies the specified condition The break timing depends on the P option setting as
189. concurrently This function is useful to observe the waveform from the initial state such as power on reset to a specified time User program Re execution from Program flow Low level pulse is output to the trigger output probe RES input to the SH7060 after gt trie specified time Figure 1 1 Cycle Reset Mode Cycle Reset Mode Specification Set R n as a GO command option to specify cycle reset mode For details refer to section 7 2 21 GO Emulation Stop In cycle reset mode hardware break conditions and software break conditions are invalid To stop emulation press the CTRL C keys or the BREAK key Rev 0 1 08 00 page 136 of 450 RENESAS Trigger Signal Output Timing in Cycle Reset Mode In cycle reset mode the RES signal is output to the SH7060 regardless of the SH7060 operating status when the time specified by the command has elapsed Figure 1 2 shows the timing in which the TRIG signal is output to the trigger output probe in cycle reset mode Time specified by the command Figure 1 2 Trigger Signal Output Timing Rev 0 1 08 00 page 137 of 450 RENESAS 1 3 3 Parallel Mode Parallel Mode Function In parallel mode the emulator can display and modify memory or display trace information during realtime emulation However during memory contents display or modification realtime emulation cannot be performed Parallel Mode Specification Parallel mode can be activated during GO comman
190. configuration number gt A lt comment gt S RET e Restoration CONFIGURATIONA lt configuration number gt RET e List display CONFIGURATION RET configuration number 1 or 2 comment Comment on the defined configuration information A comment can contain of one to 32 characters not counting the semicolon Description e Saving Saves configuration information various emulation information that are listed in table 7 11 in the emulator flash memory CNF configuration number comment 5 RET Table 7 11 Saved Configuration Information Item Description Software breakpoints Information set by the BREAK and BREAK SEQUENCE commands Hardware break conditions Information set by the BREAK CONDITION A B C and BREAK CONDITION UBC commands Trace conditions Information set by the TRACE CONDITION A B C TRACE DISPLAY MODE and TRACE MODE commands Performance analysis data Information set by the PERFORMANCE ANALYSIS command Memory map Information set by the MAP command Emulation operating mode Information set by the EXECUTION MODE command Aliases Information set by the ALIAS command Background interrupt data Information set by the BACKGROUND INTERRUPT command Rev 0 1 08 00 page 260 of 450 RENESAS CONFIGURATION e Restoration Restores the configuration information saved in the emulator flash memory lt configuration number gt RET ist display Displays the con
191. cument but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics products are classified according to the following three quality grades Standard High Quality and Specific The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application categorized as Specific without the prior written consent of Renesas Electronics Further you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas Electronics product is Standard unless otherwise expressly specified in a Renesas Electronics data sheets or data books etc Standard Com
192. cuting the program 01001018 SR 000000F1 000000000000 111100 T then the BREAK key to GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 00000000 0 7 00000000 00000059 00000090 00000059 0100FFD4 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 O100FFFC DSR 00000000 8 KKK k kkk kk k KK KK AK KKK O0B A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 A1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 00S 88276905 600NS BREAK KEY terminate the program Enter TRACE B RET to TRACE B RET display the trace information acquired under the specified condition BP AB DB MA RW STS NMI RES BRQ VCC PRB p 000019 01001010 70FF8800 EXT R PRG 1 1 1i 1 1111 D 000018 01001014 8BF80009 EXT R PRG 1 1 1 g 3111 01001010 ADD FF RO 01001014 01001008 Rev 0 1 08 00 page 117 of 450 RENESAS 5 Enter TRACE CONDITION A1 RET TRACE CONDITION AI RET to cancel the trace acquisition condition Rev 0 1 08 00 page 118 of 450 RENESAS 4 3 3 Parallel Mode During program execution in parallel mode the memory contents can be displayed or modified by the following procedures Operations After executing command enter RET to move to parallel mode Enter DUMP 1002000 100200F RET to display the memo
193. cution steps lt start address gt RET Instruction mnemonics and register information are also displayed for each step when stop PC is specified and single step emulation is executed until the instruction at stop PC is executed STEP lt number of execution steps start address gt stop PC RET Rev 0 1 08 00 page 334 of 450 RENESAS If the J option is specified instruction mnemonics and register information are displayed only for branch instructions and single step emulation is executed until the instruction at lt stop PC gt is executed If lt stop PC gt is set at the start address of an interrupt STEP execution may not terminate STEP lt number of execution steps gt lt start address gt lt stop PC gt J RET The following instructions are valid when the J option is specified BT BF BRA JMP BSR JSR BTS BFS BRAF BSRF TRAPA and RTE If the R option is specified instruction mnemonics and register information are displayed only during execution within the opening routine At that time single step execution continues until the instruction at lt stop PC gt is executed The jump addresses of branch instructions such as JSR or BSR are not displayed Although this function is similar to the STEP_OVER command function the latter is recommended because of its faster execution time STEP lt number of execution steps lt start address stop P
194. d H 2000 have been executed in sequence Figure 1 14 Sequential Break Rev 0 1 08 00 page 152 of 450 RENESAS Break condition A break occurs when the instructions at addresses H 1000 and H 2000 have been executed in sequence Specification BREAK SEQUENCE 1000 2000 User program BREAK_SEQUENCE 500 R Program flow 1000 No break occurs Break condition 1 Wait for break condition 2 500 No break occurs Searches for the condition Reset point Wait for break condition 1 from break condition 1 2000 No break occurs Break condition 2 Wait for break condition 1 1000 No break occurs Break condition 1 Wait for break condition 2 2000 A break occurs when the instructions Break Condition 2 3 at addresses H 1000 and H 2000 have been executed in sequence Figure 1 15 Sequential Break Reset Point Specification Note When specifying the sequential break BREAK SEQUENCE emulator firmware performs processing every time the program passes the pass point or reset point As a result the program will not operate in realtime When the program passes the pass point or reset point the emulator executes the instruction at the address for one step then returns to program execution Accordingly the BREAK CONDITION 4 settings are invalid at pass point or reset point execution 1 4 3 Forced Break Pressing the CTRL C keys or the BREAK key stops program execution Rev 0 1 08 00 page 153
195. d address while if the option is omitted a break occurs after program execution When is selected only the satisfaction count specification is valid When or is selected specify the address in words When XD and YD are selected as the data conditions XA can be specified respectively This condition can be masked In BCU1 and BCUS the range address can be set as the address condition However the address condition cannot be set for BCU2 in BCU1 and BCU4 BCU3 Data condition D lt 1 byte value WD lt 2 byte value LD lt 4 byte value XD lt X bus data value YDz Y bus data value The condition is satisfied when the data bus value matches the specified value When D WD or LD is specified the break condition is satisfied when the address is accessed in bytes words or longwords respectively In program fetch cycles the data condition is not satisfied irrespective of the data bus value When or YD is selected specify the data value in words When and are selected as the address conditions XD and YD can be specified respectively Multiple data conditions cannot be specified This condition can be masked Read Write condition R Read W Write The condition is satisfied in a read cycle R is specified or a write cycle W is specified Access type DAT Execution cycle DMA DMA cycle Default All bus cycles described above includ
196. d instruction will be displayed in mnemonics from the trace information Bus Cycle Display Trace information is displayed in bus cycle units Search Display The emulator searches for specified trace information and displays all the appropriate bus cycles In this case use the TRACE SEARCH command Rev 0 1 08 00 page 161 of 450 RENESAS 1 6 Single Step Function In addition to realtime emulation effective debugging is facilitated by the single step function This function displays the following information every time a program instruction is executed SH7060 control registers PC PR SR GBR VBR RS RE MOD MACH MACL e SH7060 general registers RO to R15 e DSP registers of SH7060 DSR 0 0 A1G Al MO M1 XO YO Instruction address e Instruction mnemonic e Memory contents e Termination cause 1 6 1 Single Step Execution Single step execution has three modes one in which all the instructions are displayed one in which only branch instructions are displayed and another in which instructions of a subroutine executed at first are displayed To execute this function use the STEP command or to execute a subroutine in a single step use the STEP OVER command Displaying Instructions The emulator displays the information shown in section 1 6 Single Step Function after every instruction Branch Instruction Display The information is only displayed at branch instructions listed below
197. d realtime emulation by any of the following methods as shown in figure 1 3 e Press the RET key e Press the space key e Satisfy a trace stop condition specified by the TRACE_CONDITION_A B C command If any of the above occurs the emulator will display a prompt and enter parallel mode command input wait state Emulation however continues without interruption Input the END E command to return to the normal mode Input the ABORT AB command to stop user program execution in the parallel mode By pressing the RET key or space key or by satisfying the trace stop condition Normal mode Parallel mode executing executing a user program END command a user program GO command BREAK or CTRL C ABORT command Command input wait state Figure 1 3 Transition to Parallel Mode Rev 0 1 08 00 page 138 of 450 RENESAS User program Program flow By pressing the RET key A prompt is By pressing the space key gt displayed By satisfying the trace stop the emulator waits for condition parallel mode Program does not stop Figure 1 4 Parallel Mode Note that debugging differs in parallel mode operation depending on the method used to activate it as follows e By pressing the RET key or satisfying a trace stop condition The emulator stops acquiring trace information as soon as parallel mode is entered The emulator can execute multiple commands entered b
198. d size of standard emulation memory SB4 to SB7 block 256 kbyte units Rev 0 1 08 00 page 310 of 450 RENESAS _ _ If there is not enough unused standard emulation memory to satisfy the specification data transfer is performed only for the memory area available and command execution terminates Contents of only areas CSO to CS5 can be transferred Refer to the MAP command for details on write protected area settings Example To allocate standard emulation memory to the address range from H O to H 3FFFF in the user system ROM area and transfer ROM contents MR 0 3FFFF S RET RI EMULATION EMORY LB 3072KB SB0 320768KB Rev 0 1 08 00 page 311 of 450 RENESAS PERFORMANCE ANALYSIS 7 2 30 PERFORMANCE ANALYSISI 8 Specifies cancels initializes and displays PA 1 2 3 4 5 6 7 8 performance measurement data Command Format e Specification PERFORMANCE ANALYSIS 1 2 3 4 5 6 7 8 A subroutine name gt A lt start address gt A lt end address gt ATIME lt timeout value gt ACOUNT lt count value gt I1 RET Subroutine execution time measurement mode 1 PERFORMANCE_ANALYSIS 1 2 3 4 5 6 7 8 A lt subroutine name gt A lt start address gt A lt end address gt ATIME lt timeout value gt ACOUNT lt count value gt I2 RET Subroutine execution time measurement mode 2 PERFORMANCE ANALYSIS 1 3 5 7 A subroutine name gt A lt s
199. d via Usable the FTP interface OPEN Connects the host computer to the FTP interface Usable PWD Displays the current directory name of the host Usable computer connected via the FTP interface ROUTER Displays routing information Usable STA Displays the type of file to be transferred Usable SUBNET Displays the subnet mask value Usable LOGOUT Disconnects from the TELNET Usable Rev 0 1 08 00 page 390 of 450 RENESAS Note The optional LAN board supports the TELNET server function in addition to the FTP client function When the emulator is connected to the host computer through TELNET the emulator can be disconnected from the TELNET with the LOGOUT command For details on the TELNET interface refer to section 3 5 1 Power On Procedure for LAN Interface in Part I E8000 Guide Note that the FTP can be connected via TELNET or the RS 232C interface 9 2 LAN Data Transfer 9 2 1 Setting the Data Transfer Environment The optional LAN board enables data transfer between the emulator and host computer via the FTP interface The transfer environment must be specified before starting data transfer as follows Note that the optional LAN board supports the FTP client function only Procedure 1 Specify the host computer environment including the host computer name and IP address to the network database of the host computer For details refer to the appropriate host computer s User s Manual 2 Specify the following emulator environment
200. d when address 4000000 is the address condition and bit 0 is zero in the byte data condition TRACE CONDITION A1 A H 4000000 D B Q0 S RET Table 7 26 Mask Specifications TRACE CONDITION A B C Radix Mask Unit Example Mask Position Allowed Condition Binary 1 bit B 01 1010 Bits 0 and 5 are masked Data D WD LD or PRB Hexa 4 bits H F 50 Bits 15 to 8 are masked Data D WD LD or PRB decimal n parallel mode this command is executed as follows Parallel mode is entered by the RET key or the trace stop condition is satisfied This command setting is invalid during parallel mode No trace information is acquired As soon as parallel mode is terminated this command setting is validated and trace information acquisition starts In this case conditions that have been satisfied are all cleared and the conditions are rechecked from the beginning Old trace information is also cleared At this time 831 TRACE CONDITION RESET is displayed Parallel mode is entered by the SPACE key This command setting is valid Trace information is acquired During the following command execution this command setting is invalid and no trace information is acquired 1 condition is newly set with the TRACE CONDITION command 1 TRACE command iii TRACE SEARCH command Rev 0 1 08 00 page 359 of 450 RENESAS TRACE_CONDITION_A B C As soon as the above command is te
201. e To search for a bus cycle where bit 0 is zero in the byte data condition TRACE_SEARCH A 4000000 D B 0 RET Table 7 30 Mask Specifications TRACE_SEARCH Radix Mask Unit Example Mask Position Allowed Condition Binary 1 bit B 01 1010 Bits 0 and 5 are masked Address data D WD LD or PRB Hexa 4 bits H F 50 Bits 15 to 8 are masked Address data D WD LD decimal or PRB The display contents are the same as the bus cycle display of the TRACE command However instruction mnemonics are not displayed no trace information satisfies the specified condition AS NOT FOUND is displayed If there is no trace information in the trace buffer 39 BUFFER EMPTY is displayed Rev 0 1 08 00 page 371 of 450 RENESAS TRACE_SEARCH Example To search for bus cycles where data is written to addresses from 10000 to H 10050 TS 10000 10050 W RET BP AB DB MA RW STS NMI RES BRQ VCC PRB D 000063 00010003 44 EXT W DAT 1 a 1 1 1111 D 000062 00010022 3344 EXT W DAT 1 1 1 1 1111 D 000060 00010040 11223344 EXT W DAT 1 1 1 1 ILLI Rev 0 1 08 00 page 372 of 450 RENESAS Section 8 Data Transfer from Host Computer Connected by RS 232C Interface 8 1 Overview When the emulator is connected to a host computer by the RS 232C interface data can be transferred between the host computer and the emulator or between the host computer and memory in the user system
202. e 5 Standard emulation memory The area which is set as standard emulation memory can be independently specified as a write protected area or an access prohibited guarded memory area In addition a write protected area or an access prohibited guarded memory area can each be allocated to the user system memory in 1 Mbyte units e W Write protected Access prohibited guarded The above attribute settings are valid in the external memory area only they are invalid in the internal ROM internal X RAM and Y RAM referred to as internal RAM and internal I O area 3 2 1 Internal ROM Area The emulator includes substitute RAM for the SH7060 internal ROM The substitute RAM is accessed if an attempt is made to access the internal ROM regardless of the MAP command attribute settings In addition the internal ROM area access differs between user program execution and the emulator commands e Access in user program execution Read only write disabled user program execution is terminated if attempted e Access with the emulation command Read write enabled Therefore the internal ROM contents can be changed or an object program can be loaded using commands such as MEMORY and LOAD but they cannot be rewritten from the user program If this is attempted the user program execution is terminated The internal ROM area is accessed in one state Rev 0 1 08 00 page 190 of 450 RENESAS 3 2 2 Internal RAM Y RAM
203. e PC The memory area to be used must be allocated to the memory area on the PC with a switch on the PC interface board Any 16 kbytes in the range of H C0000 to H EFFFF can be allocated figure 3 12 Addresses to be allocated must not overlap the memory addresses of other boards An overlap will cause incorrect operation H C0000 H C4000 H C8000 000 H D0000 Setting at shipment H D4000 H D8000 H DC000 H E0000 H E4000 H E8000 H ECO00 H EFFFF Figure 3 12 Allocatable Memory Area of PC Interface Board Rev 0 1 08 00 page 49 of 450 RENESAS Switch Setting rotary switch is installed on the PC interface board figure 3 13 switch is used to set the memory area allocation Table 3 3 lists the switch setting states The switch setting at emulator shipment is No 4 memory area H D0000 to H D3FFF PC interface board Enlarged front view Rotary switch Figure 3 13 PC Interface Board Switch Rev 0 1 08 00 page 50 of 450 RENESAS Table 3 3 Switch Settings for Memory Areas Switch Switch Setting Memory Area Setting Memory Area 0 H C0000 to H C3FFF 8 H E0000 to H ESFFF 1 H C4000 to H C7FFF 9 H E4000 to H E7FFF 2 H C8000 to H CBFFF A H E8000 to H EBFFF 3 H CCO000 to H CFFFF B 000 to H EFFFF 4 setting at shipment H D0000 to H D3FFF C Not used 5 H D4000 to H D7FFF D Not used 6 H D8000 to H DBFFF E Not used 7 H DCO000 to H DFFFF F Not used Note
204. e is measured using subroutine execution time measurement mode 1 Rev 0 1 08 00 page 314 of 450 RENESAS Subroutine call count measurement mode PERFORMANCE_ANALYSIS Counts the number of times the subroutine defined by lt subroutine name gt lt start address gt and lt end address gt calls the subroutine specified by lt called subroutine address range gt The subroutine execution time is measured using subroutine execution time measurement mode 1 Note The performance analysis is measured by using the address bus value of the prefetch cycle When the end address is specified for the near address of the instruction next to the branch or delay slot instruction the measurement is incorrect Analyze the SH7060 operation following the cycle which prefetched the branch instruction in the trace bus cycle unit and do not set the address in the prefetch cycle which is not executed with the branch instruction to the end address Table 7 20 lists the measurement modes that can be specified by each PERFORMANCE_ANALYSIS command When break conditions or trace conditions have been set subroutines may not be set to their maximum number Table 7 20 Measurement Modes for Each Command Measurement Mode PA1 PA2 PA3 PA4 5 6 Subroutine execution time O O measurement mode 1 Subroutine execution time measurement mode 2 Subroutine execution time O X
205. e measurement mode 2 Subroutine execution time measurement mode 3 Area access count measurement mode Subroutine call count measurement mode d Execution time ratio as a percentage e Execution time ratio in graph form in units of 2 asterisk rounded up f Total run time displayed as H hour M minutes S second US microsecond and NS nanosecond Rev 0 1 08 00 page 317 of 450 RENESAS PERFORMANCE ANALYSIS Execution time ratio displayed in graph form Option A is specified PERFORMANCE_ANALYSIS A RET NO NAME MODE ADDRESS 1 SUBA 00000100 00001 0 TIME xxxH xxM xxS xxxxxxUS COUNT nnnnnnnn d e f g 2 SUBB 12 00005000 00007FF0 3 SUBC 00010000 0001008F h 00020000 00020098 i 4 SUBE AC 00002030 0000207F lt ACCESS gt 00 FFFFFF7F DAT 0 k 7 SUBD SC 00020100 0002FFFF lt CALL SUB gt 00030000 00030060 1 TOTAL RUN TIME D 0000H 10M 00S 000020US 250NS m a Subroutine number b Subroutine name up to 8 characters are displayed c Time measurement mode I1 Subroutine execution time measurement mode 1 I2 Subroutine execution time measurement mode 2 I3 Subroutine execution time measurement mode 3 AC Area access count measurement mode SC Subroutine call count measurement mode d Subroutine start address e Subroutine end address f Timeout value displayed only when the timeout value is set with the TIME
206. e the diagnostic program as described in the Diagnostic Program Manual HS7060TMS81 HE and inform a Hitachi sales agency of the test results in detail because a system defect may be caused by a number of reasons Rev 0 1 08 00 page 214 of 450 RENESAS Emulator system System failure defect START System defect Emulator monitor Console message connected Yes displayed correctly Power lamp Connect on with correctly power on No Check power supply breaker fuse outlet to emulator Set power Defect in source supply power or emulator power Breaker fuse Failure fails again occurred Emulator fan working Internal system Switch test at power on defect passed System defect Power lamp defect System program initiated correctly Correct system program installed Re install correct system program Figure 5 1 Troubleshooting PAD Rev 0 1 08 00 page 215 of 450 RENESAS Internal system test at emulator system program 5 syster ystem initiation passed defect Register break memory shared RAM DCONT System error error defect EV chip board connected correctly Connect correctly CHECK command passed User system Without use connected system User nem nem CHECK Emulator CHECK command command input command passed cor
207. ect improper handling installation repair or modifications of the emulator product without Hitachi s prior written consent or any problems caused by the user system All Rights Reserved This user s manual and emulator product are copyrighted and all rights are reserved by Hitachi No part of this user s manual all or part may be reproduced or duplicated in any form in hard copy or machine readable form by any means available without Hitachi s prior written consent Other Important Things to Keep in Mind 1 Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi s semiconductor products Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein 2 No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi Figures Some figures in this user s manual may show items different from your actual system Limited Anticipation of Danger Hitachi cannot anticipate every possible circumstance that might involve a potential hazard The warnings in this user s manual and on the emulator product are therefore not all inclusive Therefore you must use the emulator product safely at your own risk Rev 0 1 08 00 page III of VIII RENESAS SAFETY PAGE READ FIRST READ this user s manual before using this emulator p
208. ed H FFFF0000 H FFFF13FF Internal Internal peripheral 5 kbytes 8 16 bits peripheral module module H FFFF1400 H FFFF7FFF Reserved Reserved H FFFF8000 H FFFF8FFF X RAM 4 kbytes 32 bits H FFFF9000 H FFFF9FFF Reserved Reserved H FFFFA000 H FFFFAFFF Y RAM Y RAM 4 kbytes 32 bits H FFFFB000 H FFFFFFFF Reserved Reserved Note A shadow area of H 00000000 to H 0003FFFF in the internal ROM enabled mode Rev 0 1 08 00 page 450 of 450 RENESAS SH7060 E8000 Emulator User s Manual Publication Date 1st Edition August 2000 Published by Electronic Devices Sales amp Marketing Group Semiconductor amp Integrated Circuits Hitachi Ltd Edited by Technical Documentation Group Hitachi Kodaira Semiconductor Co Ltd Copyright Hitachi Ltd 2000 All rights reserved Printed in Japan HITACHI LTD SEMICONDUCTOR AND INTEGRATED CIRCUITS DIVISION SALES OFFICES URL NorthAmerica http semiconductor hitachi com Europe http www hitachi eu com hel ecg Asia http www hitachi com sg grp3 sicd Japan http www hitachi co jp Sicd indx htm HEADQUARTERS Great Lakes Semiconductor amp Integrated Circuits Nippon Bldg 2 6 2 Ohte machi Chiyoda ku Tokyo 100 0004 Japan Tel lt 81 gt 3 3270 2111 Fax lt 81 gt 3 3270 5109 USA Headquarters Hitachi Semiconductor America Inc 179 East Tasman Drive San Jose CA 95134 Tel lt 1 gt 408 433 1990 Fax lt 1 gt 408 433 0223 Sales Offices West
209. elp ertet ebd Ar E EEEE EEE EEEE EEE EEE EE 217 6 1 3 Word Definition LIL rneer Ee EAEE 218 6 2 Special Key Input e tert e rete ra EEEE EE EEEE EEE TEE E 219 6 2 1 Command Execution and Termination 1201212 220 0 10000000000000000 219 6 2 2 Display Control au envii es Ere reet ERE E 219 62 3 ce ette EA E e Lue aee uou dese 220 6 2 4 Display Control eerte me cep En E 220 Section 7 Emulation Commands a 221 SOV va PL 221 7 2 Emulation Commands n u unas 223 PQA T lt register gt Lu 224 722 ABORT AB i ec rtr eher er 227 7 23 ALTAS ALT inet e Re 228 7 2 4 ASSEMBLE A 230 7 2 5 BACKGROUND 2 041 22 2 000 000000000000 232 7 26 BREAK B eere E OE e HERE RR 237 7 27 BREAK CONDITION_A B C BCA BCB 240 7 2 8 BRE
210. emulator waits for an emulator monitor command the emulator displays prompt FM gt and waits for a flash memory management tool command refer to table 3 9 START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T F RET FM gt Next define the subnet mask value Rev 0 1 08 00 page 72 of 450 RENESAS FM SN subnet mask value gt C RET Enter Q RET to terminate the flash memory management tool FM Q RET Setthe routing information with the flash memory management tool command RTR when the LAN board HS7000ELNO2H is used to connect the host computer in a different network to the emulator A maximum of ten routing information can be defined Enter the number to be defined and then the IP address and the network number of the router FM RTR RET NO ENTRY DATA PLEASE SELECT NO 1 10 L E Q X 1 RET 01 IP ADDRESS router IP address RET 01 NET ID network number RET Enter E RET and terminate the RTR command to enable the input contents and save the settings in the emulator PLEASE SELECT NO 1 10 L E Q X E RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM Enter Q RET to terminate the flash memory management tool FM Q RET Rev 0 1 08 00 page 73 of 450 RENESAS 8 Store the host name and address of the host computer in the emulator To transfer data between the host computer and emulator initiate the FTP se
211. emulator and prepare it for use as follows Here the LAN board PC interface board ISA bus RS 232C and bidirectional parallel interface cable are described For other preparations such as the PCI bus PCMCIA bus or LAN adapter refer to the description notes Rev 0 1 08 00 page 27 of 450 RENESAS Reference Check the components against the component list Component list Connect the E8000 station and the device control board Connect the user system and the EV chip board Connect the E8000 station and the EV chip board Connect the external probe Sec 3 2 3 Select the clock Install the crystal oscillator Sec 3 2 4 Connect the system ground Sec 3 2 5 When the RS 232C interface When the PC interface cable or and bidirectional parallel When the LAN interface is used board is used interface cable is used Set the console Set the console Sec 3 3 Set the console interface switch interface switch co interface switch Connect the LAN Set the PC interface sss 342 interface cable board switch Connect the RS 232C Install the PC Sec 3 3 3 interface cable or and interface board bidirectional parallel interface cable Connect the PC interface cable Sposi Sec 3 3 7 Figure 3 1 Emulator Preparation Flow Chart Rev 0 1 08 00 page 28 of 4
212. en any condition set by the BREAK CONDITION B or TRACE CONDITION command is satisfied EXECUTION MODE TRGB RET e Not to output a trigger EXECUTION MODE TRGB D RET Notes 1 When the BREAK CONDITION B conditions where a trigger output is set are satisfied a trigger is output without a break 2 When a trigger output is set the trace stop function of the TRACE CONDITION cannot be used Specifies a time interval for execution status display during GO command execution e To not display PC EXECUTION_MODE 0 To display PC every 200 ms EXECUTION_MODE MON 1 RET To display PC every 2 s EXECUTION MODE 2 RET Rev 0 1 08 00 page 276 of 450 RENESAS EXECUTION_MODE Sets the multi break function e To disable the multi break function EXECUTION MODE MB D RET To enable the multi break function EXECUTION_MODE MB E RET When the C option is specified the following message is displayed to confirm with the user whether to overwrite the existing configuration information in the emulator flash memory CONFIGURATION STORE OK Y N a RET a Y Stores the specifications as configuration information in the emulator flash memory Hereafter when the emulator is activated the saved specifications go into effect N Does not overwrite configuration information The existing specifications remain valid Specification interactive mode
213. enabled the loop program is being executed D User interrupts are disabled the loop program has been stopped S A break has occurred during user interrupt processing the loop program has been stopped yyyyyyyy Address of loop program for accepting user interrupts c cause of termination Register values and the cause of termination listed in table 7 3 at loop program termination displayed only when 5 is selected above Rev 0 1 08 00 page 233 of 450 RENESAS BACKGROUND_INTERRUPT Table 7 3 Causes of BACKGROUND INTERRUPT Command Termination Message Termination Cause ILLEGAL INSTRUCTION An illegal instruction was executed RESET BY E8000 The emulator terminates program execution with the RESET signal because an error has occurred in the user system LOOP PROGRAM ADDRESS The executing address of the loop program for accepting user IS NOT IN RAM interrupts is not in the RAM area therefore the loop program cannot be executed STOPPED IN INTERRUPT A break occurred during the user interrupt processing PROCESS Notes 1 In command input wait state a BRA or instruction instruction code 0009 is set to the address of the loop program for accepting user interrupts and executed Note the following e Do not specify the address of the loop program for accepting user interrupts in the ROM area If the specified address is in the ROM area the loop program cannot be executed Specif
214. ength 1 bit Data bit length 7 8 bits Stop bit length 1 2 bits Parity Even odd or none Control method X ON X OFF control RTS CTS control Rev 0 1 08 00 page 54 of 450 RENESAS Personal Computer Interface Settings at Emulator Start Up When the emulator is turned on or when the emulator system program is initiated the personal computer interface settings are determined by the console interface switches in the same way as in the console interface the control method will be X ON X OFF control Changing the Personal Computer Interface Settings The transfer rate data bit length stop bit length parity and control method can be changed with the console interface switch For the personal computer connector pin assignments and signal names refer to Appendix A Connectors 3 3 6 Connecting to a LAN Interface A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST The LAN board for the emulator supports Ethernet 10 5 5 and Cheapernet LOBASE2 interfaces conforming to Ethernet specifications V2 0 The LAN board communicates with a workstation according to the TCP IP protocol and the workstation transfers files and commands according to the FTP TELNET protocol The LAN board specifications at each layer of the OSI mode
215. enter LAN LOAD S PROGRAM MOT RET This example assumes that the load module is S type While loading the address to which the program is being loaded is displayed as shown on the right When the program has been loaded the start address of the program TOP ADDRESS and its end address END ADDRESS are displayed Entering BYE RET terminates the server connection The message shown on the right is displayed Rev 0 1 08 00 page 108 of 450 Display Message FTP HITACHI RET Username E8000 RET Password MAX60MHZ RET login command success gt FTP gt LAN_LOAD S PROGRAM MOT RET LOADING ADDRESS TOP ADDRESS 01001000 END ADDRESS 0100101F gt RET bye command success RENESAS 4 2 5 Executing the Program Execute the loaded program by the following procedures Operations 1 Set the initial values of the registers Enter SP RET to set the stack pointer SP register to H 0100FFFC The emulator asks for the program counter value Enter 1001000 RET as the program counter value The emulator then asks for the status register value In this example other registers need not to be set or changed therefore enter RET to exit this interactive mode Enter GO RET to execute the loaded program from the address pointed to by the PC While the program is executed the current program counter value is displayed Display M
216. entered Enter Y RET to allow system program E8000 SYS to be loaded in the emulator flash memory Then enter system program file name E8000 SYS Display Message START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T _ S F L T F RET FM gt FM gt SL RET SELECT LOAD No 1 PC or 2 WS 1 RET SELECT INTERFACE 1 RS 232C or 2 PARALLEL 1 RET INPUT SYSTEM DIRECTORY A RET LOAD E8000 SYSTEM FILE OK Y N Y RET INPUT FILE NAME E8000 SYS RET COMPLETED RENESAS Rev 0 1 08 00 page 95 of 450 Operations 9 Enter Y RET to allow configuration file SHCNF706 SYS to be loaded in the emulator flash memory Then enter configuration file name SHCNF706 SYS 10 Enter Y RET to allow firmware file SHDCT706 SYS to be loaded in the emulator flash memory Then enter firmware file name SHDCT706 SYS Enter N RET not to load the ITRON debugger Enter N RET not to load the diagnostic program Enter DIR RET to check whether the necessary files have been loaded 1 1 N 1 Uo 14 Enter Q RET to terminate the flash memory management tool 15 Installation is completed Rev 0 1 08 00 page 96 of 450 PDisplay Message LOAD CONFIGURATION FILE OK Y N Y RET I
217. er supply For a Cheapernet cable Marked BNC For an Ethernet cable Marked LAN For a parallel interface cable with the host PCIF board Conforms to IEEE P1284 ECP mode Marked PARALLEL For the PC interface cable which connects the PC to the E8000 station Interfaces with the PC interface board in the host computer Marked PCIF For selecting the host interface Specifies the connection of the LAN interface RS 232C interface or PC interface board When the RS 232C interface is used the data bit length stop bit length or parity setting transfer rate can be switched Marked SW1 and SW2 For RS 232C communication with a host PC Marked SERIAL For trace cable 1 which connects the E8000 station to the EV chip board For trace cable 2 which connects the E8000 station to the EV chip board Prevents a trace cable from being inserted into the wrong place For installing the optional LAN board For installing the control board For installing the trace board For installing the device control board depends on Rev 0 1 08 00 page 15 of 450 RENESAS 2 1 2 Device Control Board Components DCONT TRC I n N o m g gt AC100 120V AC200 240V 2A 50 60Hz Figure 2 4 Device Control Board 1 Station to EV chip board interface For trace cable 4 which connects the E8000 station connector CN4 to the EV chip board 2 Station to EV chip board interface For trace cable 3 which connects the E8000 st
218. ereafter referred to as an EV chip board and a user system interface cable The user system is connected to the EV chip board via the user system interface cable Installing the PC interface board option ISA bus PCI bus or PCMCIA bus on the IBM PC enables connection with the IBM PC LAN adapter option or LAN board option are connected to the emulator via network Connecting the LAN adapter enables debugging using the HDI option For details on PC interface boards each for ISA bus PCI bus or PCMCIA bus specifications and LAN adapter refer to their description notes Rev 0 1 08 00 page 3 of 450 RENESAS LAN board option Device control board HS7060EDD81H 4 gt LAN adapter Bidirectional parallel interface cable option PC interface cable option Ae Trace cables EV chip board option A HS7060EBK81H E8000 Serial interface cable PC interface board option E8000 station 58000 5 02 User system interface cable External probe and gt HS7065ECH81H trigger output pin Figure 1 1 Emulator for the SH7060 Rev 0 1 08 00 page 4 of 450 RENESAS The emulator provides the following features Realtime emulation of the SH7060 at 60 MHz e A wide selection of emulation commands promoting efficient system development On line help functions to facilitate command usage without a manual e Efficient debugging enabled by variable break functions and a mass
219. ermination Message Termination Cause BREAK CONDITION 1 2 Break condition is satisfied by BREAK_CONDITION_A 3 4 5 6 7 8 BREAK CONDITION B1 2 Break condition is satisfied by BREAK CONDITION B 3 4 5 6 7 8 BREAK CONDITION C1 2 Break condition is satisfied by BREAK CONDITION C 3 4 5 6 7 8 BREAK CONDITION UBC1 2 9 4 Break condition is satisfied by BREAK CONDITION UBC BREAK CONDITION SB Sequential break condition is satisfied by BREAK CONDITION UBC BREAK KEY The CTRL C keys were pressed or the ABORT command was executed for forcible termination BREAKPOINT Emulation stopped at a software breakpoint specified with the BREAK command BREAK SEQUENCE A condition for passing software breakpoints specified with the BREAK SEQUENCE command was satisfied GUARDED OR WRITE Execution is stopped because access to access inhibited area or PROTECT write to write protected area occurred ILLEGAL INSTRUCTION A break instruction H 0000 was executed MULTI BREAK Execution is stopped by multi break E is specified with the MB option of the EM command and a break occurs by edge detection of probe 0 NO EXECUTION The user program was not executed this message is displayed only for the RESULT command RESET BY E8000 The emulator forcibly terminates program execution with the RESET signal because an error has occurred in the user system STOP ADDRESS Emulation stopped
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221. essage SP RET R15 SP 23000000 0100 PC 04000040 1001000 SR 000000F0 000000000000 IIIIO00 GO RET PC 01001018 Rev 0 1 08 00 page 109 of 450 RENESAS 5 Enter the BREAK key to terminate program execution The contents of the program counter status register control registers general registers RO to R15 and DSP registers are displayed at GO command termination RUN TIME shows the duration of program execution from GO command execution to BREAK key entry BREAK KEY shows that execution has been terminated because the BREAK key was entered Rev 0 1 08 00 page 110 of 450 BREAK 01001018 SR 000000F1 000000000000 IIII00 T GBR 00000000 VBR 00000000 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 00000000 RO 7 00000000 00000059 00000090 00000059 OFOFFFD8 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0100FFFC DSR 00000000 AOG 00 A0 00000000 0 00000000 0 00000000 0 00000000 2416 00 A1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 05S 109873US 60055 BREAK KEY RENESAS 4 2 6 Setting a Software Breakpoint Execution of the GO command can be stopped immediately before executing a particular address by setting a software breakpoint by the following procedures Operations 1 Ente
222. fetch cycle The condition is satisfied when the bus cycle type matches the specified type Multiple access types cannot be specified either select one of the access types on the left or specify none External probe condition PRB lt value gt The condition is satisfied when all of the emulator s external probe signals match the specified values Specify value as 1 byte data Each bit corresponds to a probe number as follows 3 2 1 0 Bit x x x x lt Specified value 4 3 2 1 lt Probe number x O Low level 1 High level This condition can be masked Rev 0 1 08 00 page 369 of 450 RENESAS SEARCH Table 7 29 Specifiable Conditions TRACE_SEARCH cont Item and Input Format Memory type condition INT Internal area IO Internal I O area EXT External area Description Searches for a bus cycle in which the specified memory area type is accessed External interrupt condition 1 NMI L or NMI H The condition is satisfied when the NMI signal matches the specified level NMI or NMI L The condition is satisfied when NMI is low NMI H The condition is satisfied when NMI is high RES Searches for a bus cycle in which the RESET signal is low Time stamp TS lt elapsed time 1 gt A lt elapsed time 2 gt Searches for the specified elapsed time When only lt elapsed time 1 gt is specified searches for the time specified with lt elapsed t
223. fied the emulator adds an LF code H 0A to the end of each record in addition to a CR code H OD in the S type or HEX type load module Rev 0 1 08 00 page 384 of 450 RENESAS SAVE Notes 1 Data be saved only in the internal memory areas or areas CSO to 55 2 Verification is not performed after save If the program must be verified use the VERIFY command For details refer to section 8 2 6 VERIFY Example To save memory contents in the address range from H 7000 to H 7FFF in host computer file F11 MOT in the S type load module format N SV 7000 7FFF 11 RET TOP ADDRESS 00007000 END ADDRESS 00007FFF Rev 0 1 08 00 page 385 of 450 RENESAS VERIFY 8 2 6 VERIFY V Verifies memory contents against host computer file Bidirectional parallel interface Command Format Verification VERIFY A lt offset gt lt load module type gt lt file name RET lt offset gt Value to be added to the address lt load module type gt Load module type R SYSROF type load module S S type load module H HEX type load module M Memory image file E ELF type load module Default SYSROF type load module file name File name in the host computer Description e Verification Verifies data transferred from the host computer against data in memory via the bidirectional parallel interface Use interface software IPW for the host computer Enter BA before the c
224. figuration information saved in the emulator flash memory CNF RET 1 comment 2 comment Examples 1 To save configuration information with comment CNFI 1 1 S RET 2 Torestore configuration information saved under configuration number 1 CNF 1 RET 3 To display the configuration information list CNF RET CNF1 2 ETC Rev 0 1 08 00 page 261 of 450 RENESAS CONVERT 7 2 13 CONVERT CV Converts data Command Format e Conversion CONVERTA lt data gt CONVERTA lt expression gt RET lt data gt Data to be converted lt expression gt Addition or subtraction lt data gt lt data gt lt data gt lt data gt Description e Conversion Converts data to hexadecimal decimal octal binary fixed point and ASCII formats Input data is handled as 4 byte values If there is no corresponding ASCII character including undisplayable character a period is displayed instead CONVERT lt data gt RET H xxx D xxx Q xxx B xxx a b c d e f a Hexadecimal display b Decimal display c Octal display d Binary display ASCII display f Fixed point display If the H B or X radix is not specified for data at data input the radix specified with the RADIX command is assumed Note When an expression includes fixed point values the fixed point values are converted
225. follows e PC value without option P PC 1000 Break after execution A break occurs after the instruction at the specified address is executed e PC value followed by option P PC 1000 P Break before execution A break occurs before the instruction at the specified address is executed Break after execution Break condition Break occurs after the User program prog instruction at address H 1004 1000 MOV 0 RO is executed Break 1002 ADD 1 RO Specification PC 1004 condition 1004 ADD 1 RO At break RO 2 is satisfied Break before execution Break condition Break occurs before the instruction at address H 1004 is executed Specification PC 1004 P At break RO 1 Figure 1 11 Break with PC Value Specification Rev 0 1 08 00 page 148 of 450 RENESAS Sequential Break Condition BREAK_CONDITION_UBC1 to 4 In sequential break mode a break occurs when hardware break conditions UBC4 to UBCI have been satisfied in that order Depending on the number of specified conditions three sequential break modes are available e Sequential break mode 1 When conditions are satisfied in the order of UBC2 and a break occurs e Sequential break mode 2 When conditions are satisfied in the order of UBC3 UBC2 and UBCI a break occurs e Sequential break mode 3 When conditions are satisfied in the order of UBC4 UBC3 UBC2 and UBC1 a break occurs Specify break conditions with the BREAK CONDITI
226. for Each Break Type esee 240 Table 7 5 Specifiable Conditions BREAK CONDITION 1 8 241 Rev 0 1 08 00 page xiv of xvi RENESAS Table 7 6 Address Mask Specifications BREAK_CONDITION_A B C 244 Table 7 7 Mask Specifications BREAK CONDITION eee 244 Table 7 8 Specifiable Conditions a aaa eene eene emen 248 Table 7 9 Mask Specifications BREAK CONDITION UBCI 2 eee 250 Table 7 10 SH7060 Pin Test eai err tree there aee rrr 256 Table 7 11 Saved Configuration Information 260 Table 7 12 Cycle Reset Times ss uut eerte ettet eei HO Er pre eere teo ea 282 Table 7 13 Restrictions for Realtime Emulation Modes 284 Table 7 14 Causes of GO Command Termination eese nennen 287 Table 7 15 Execution Status Display sess 288 Table 7 16 List of Map Control Blocks S Block eese 298 Table 7 17 List of Map Control Blocks L Block eene 299 Table 7 18 MEMORY Command Options nennen nennen 304 Table 7 19 Operating Mode Selection Pin Status and Display sess 307 Table 7 20 Measurement Modes for Each Command essen 315 Table 7 21 Causes of STEP Com
227. fore the instruction following the slot delayed branch instruction for the BSR JSR or BSRF instruction and executes the user program During STEP_OVER command execution register contents can be displayed in the following format The register information and memory contents are displayed according to the STEP_INFORMATION command specifications Rev 0 1 08 00 page 341 of 450 RENESAS STEP OVER 00001004 SR 000000F0 000000000000 ITTI00 GBR 00000000 VBR 00000000 MACH 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 000000FF 00000011 00000000 00000000 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000FFE00 08800000000 0 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 b lt address gt lt instruction mnemonic gt c MEMORY lt memory contents gt d STACK lt stack contents gt e lt cause of termination gt a Register information b Address and mnemonics of the executed instruction c Memory contents display d Stack contents display e Cause of termination refer to table 7 22 After the STEP_OVER command has been executed so long as it was not forcibly terminated and if no other command has been entered single step execution can be continued by simply pressing the RET key Software breakpoint
228. from the user system 3 Turn on the user system power and then the emulator power U external clock will then be automatically specified in the CLOCK command Emulator Internal Clock Specify 7 5 7 5 MHz or 15 15 MHz with the CLOCK command Reference When the emulator system program is initiated the emulator automatically selects the SH7060 clock source according to the following priority 1 External clock when supplied from the user system 2 Crystal oscillator when attached to the EV chip board 3 7 5 MHz emulator internal clock Note The clock is always input from the CKIO pin in clock operating modes 6 or 7 Rev 0 1 08 00 page 42 of 450 RENESAS 3 2 6 Connecting the System Ground A WARNING Separate the frame ground from the signal ground at the user system Failure to do so will result ina FIRE HAZARD or ELECTROCUTION and will damage the user system and the emulator or will result in PERSONAL INJURY The emulator s signal ground is connected to the user system s signal ground via the EV chip board In the E8000 station the signal ground and frame ground are connected figure 3 9 At the user system connect the frame ground only do not connect the signal ground to the frame ground E8000 station Signal ground Frame ground Ground Figure 3 9 Connecting the System Ground Rev 0 1 08 00 page 43 of 450 RENESAS A WARNING Always switch OFF the emulator and user system before connecting
229. g at shipment Automatic System Program Initiation Quit amp Warm Start SW1 54 NO OFF Setting at shipment YES ON Console LAN PC Interface SW1 57 S8 Console OFF OFF Setting at shipment LAN OFF ON PC interface board ON ON Notes 1 Switches S1 S2 S3 S5 and S6 of SW1 are not used Use these switches with the off state Console interface settings must be performed before the E8000 station power is turned on 2 Ifthe settings of the console interface S7 and S8 of SW1 are incorrect the initiation of the E8000 station cannot be confirmed on the screen After turning off the E8000 station power correct the interface settings See section 3 5 Power On Procedure for Emulator 3 When the PC interface board ISA bus PCI bus or PCMCIA bus or LAN adapter is used set S7 and S8 in SW1 to ON Rev 0 1 08 00 page 47 of 450 RENESAS 3 31 Interface Board Specifications Table 3 2 lists the PC interface board specifications Table 3 2 PC Interface Board Specifications Item Specifications Available personal computer ISA bus specification PC or compatible machine System bus ISA bus specification Memory area 16 kbytes Memory area setting be set at every 16 kbytes in the range from 0000 to H EFFFF with a switch Rev 0 1 08 00 page 48 of 450 RENESAS 3 3 2 Switch Settings of the PC Interface Board Memory area Setting The PC interface board uses a 16 kbyte memory area on th
230. ge 281 of 450 RENESAS GO According to the lt mode gt specification at GO command input the user program is executed in one of the following modes If no lt mode gt is specified normal emulation mode is assumed e Cycle reset mode A RESET signal is input to the SH7060 at the intervals given in table 7 12 and program execution continues In this mode all break conditions and trace conditions are invalidated Table 7 12 Cycle Reset Times Value of n Reset Interval 6 5 us 9 8 us 50 us 100 us 500 us 1ms 5 ms co oO 10 ms co 50 ms k 100 ms 500 ms 15 e Temporary invalidation of break conditions If the N option is specified software breakpoints set with the BREAK or BREAK_SEQUENCE command and hardware break conditions set with the BREAK CONDITION A B C or BREAK CONDITION UBC command are invalidated temporarily and user program emulation continues The breakpoints and break conditions are invalidated only within one GO command emulation If the N option is not specified in the next GO command emulation breakpoints and break conditions are validated again Rev 0 1 08 00 page 282 of 450 RENESAS GO Time interval measurement mode 1 The execution time from the point when the BREAK CONDITION UBC2 condition is satisfied until the BREAK CONDITION UBCI condition is satisfied is measured Af
231. gt Search start address Default H 0 end address gt Search end address Default Maximum address of H FFFFFFFF lt number of bytes gt The number of bytes to be searched for Default Maximum address of H FFFFFFFF same as end address gt size Length of data to be searched for B 1 byte W 2bytes L 4 bytes Default 1 byte N Data other than the specified data is searched for Description e Search Searches for data from the start address to the end address or for the specified number of bytes All addresses where data is found are displayed If data is not found the following message is displayed 45 NOT FOUND If the N option is specified data other than the specified data is searched for Search with this command can be performed only in areas CSO to CS5 or the internal memory areas Rev 0 1 08 00 page 266 of 450 RENESAS DATA_SEARCH Examples 1 To search for 1 byte data H 20 in the address range from H FB80 to H FF7F DS 20 H FB80 H FF7F RET 0000FBFB 0000FCCD 2 search for data other than 2 byte data H O in H 100 bytes starting from address H 1000 DS 0 1000 100 W RET 45 NOT FOUND Rev 0 1 08 00 page 267 of 450 RENESAS DISASSEMBLE 7 2 16 DISASSEMBLE DA Disassembles and displays memory contents Command Format Display DISASSEMBLEA cstart address gt A lt end address gt A lt number of instruc
232. h as the CLOCK command switching the clock or the RESET command note that the general registers and part of the control registers are initialized Table 2 1 Differences between Initial Values of the SH7060 and Emulator Registers Status Register Emulator SH7060 Emulator initiation PC Reset vector address Reset vector address power on value value RO to R14 H 00000000 Undefined R15 SP Stack pointer address Stack pointer address value value SR H 000000F0 H 00000XFX PR H 00000000 Undefined VBR H 00000000 H 00000000 GBR H 00000000 Undefined MACH H 00000000 Undefined MACL H 00000000 Undefined DSR H 00000000 Undefined MOD H 00000000 Undefined RS RE H 00000000 Undefined AO 1 H 00000000 Undefined MO M1 H 00000000 Undefined X1 H 00000000 Undefined YO Y1 H 00000000 Undefined AOG A1G H 00 Undefined Note Xis an undefined value The emulator s user system interface is provided with pull up resistors and a buffer causing the signals to be delayed slightly Also the pull up resistors will change high impedance signals to high level signals Adjust the user system hardware accordingly Refer to section 4 User System Interface The emulator for the SH7060 can use an operating frequency of 60 MHz or lower Note however that the emulator cannot use an operating frequency higher than 60 MHz If the operating frequency is set to higher than 60 MHz correct emulation cannot be guaranteed Rev 0 1 08 00 page 185 of
233. have received the latest product standards or specifications before final design purchase or use 3 Hitachi makes every attempt to ensure that its products are of high quality and reliability However contact Hitachi s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury such as aerospace aeronautics nuclear power combustion control transportation traffic safety equipment or medical equipment for life support 4 Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating operating supply voltage range heat radiation characteristics installation conditions and other characteristics Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges Even within the guaranteed ranges consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail safes so that the equipment incorporating Hitachi product does not cause bodily injury fire or other consequential damage due to operation of the Hitachi product 5 This product is not designed to be radiation resistant 6 No one is permitted to reproduce or duplicate in any form the whole or part of this document without written approval from Hitachi 7 Contact Hitachi s sales office
234. i RENESAS Contents Part I OvervieW D 3 IMNEOU uU 3 1 2 rmm 6 1 3 Environmental Conditions u rope te 7 1 4 Components aeo ERR HS ERE ERE WES DRE OE REOR CIE eee 8 1 4 1 E8000 Emulator Station oie ia 8 1 4 2 SH7060 Device Control Board and EV Chip Board a 8 I SEES IP 9 Section 2 su oeste Dn ms A ee Ida AUDI DER dE N S UE ANM 11 2 1 Emulator Hardware Components essen eren eene enne 11 2 1 1 E8000 Station Components nennen eene rennen rennen 13 2 1 2 Device Control Board Components sess eene 16 2 1 3 EV Chip Board 17 2 1 4 User System Interface Cable Configuration eee 19 2 2 Emulator Software Components nennen nennen eene 20 2 3 System Configuration REC EE HIER EU RE IEEE 22 2 3 1 System Configuration Using a LAN Interface ssssseeeeeeeee 22 2 3 2 System Configuration Using an RS 232C or Bidirectional Parallel Interface 23 2 3 3 System Configuration Using PC Interface Board 2 22242 21
235. ication interactive mode register register System register control register general register or DSP register to be modified or displayed System registers PC PR MACH MACL Control registers SR GBR VBR RS RE MOD General registers RO R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 SP DSP registers DSR AO Al MO MI XO YO data The value to be set in the specified register Description Modification Direct mode Sets the specified value in the specified register SP can be specified instead of R15 MOD can be specified separately as MS and ME 16 bit unit each lt register gt data RET Interactive mode If no data is specified on the command line with lt register gt register modification is performed in interactive mode In this case the emulator displays the current register value and requests its modification Registers are processed in the following order and processing can begin at any register RO to R14 R15 SP PC SR PR GBR VBR MACH MACL RS RE MOD 0 AO MO XO YO DSR Rev 0 1 08 00 page 224 of 450 RENESAS lt register gt Display format for modifying registers in interactive mode is as follows lt register gt RET register RET register RET yyyyyyyy lt dat
236. ied directory must be formatted depending on which host computer is connected via the FTP interface Example To change the current directory of the FTP server to subdir FTP gt CD subdir RET cd command success FIPS Rev 0 1 08 00 page 398 of 450 RENESAS CLOSE 9 3 5 CLOSE CLOSE Disconnects the host computer from the FTP interface Command Format e FTP interface disconnection CLOSE RET Description e FTP interface disconnection Disconnects the FTP interface from the host computer to which it is currently connected Before changing host computers disconnect the FTP interface with this command and re connect with the OPEN command For details refer to section 9 3 13 OPEN Example To disconnect the FTP interface and change the host computer to be connected FTP gt CLOSE RET bye command success FTP gt OPEN HOST1 RET Username ABC RET Password RET login command success FTP gt Rev 0 1 08 00 page 399 of 450 RENESAS 9 3 6 FTP FTP Connects host computer and emulator via the FTP interface Command Format e FTP interface connection FTP lt host name gt RET lt host name gt Name of the host computer to be connected with the FTP server The host computer name must be already defined with the flash memory management tool Description e FTP interface connection Connects the host computer and emulator via the FTP interface to enable data tr
237. ified contents RET PTR D 000010 D 000010 DISPLAY ITEM A D MA RW ST NMI RES BREQ VCC PRB 3 To specify not to display external probe information PRB as bus cycle information at trace information display with the TRACE or TRACE SEARCH command TDM PRB D RET Rev 0 1 08 00 page 364 of 450 RENESAS TRACE MODE 7 2 43 TRACE MODE Specifies and displays trace information TMO acquisition mode Command Format e Setting TRACE MODE AOVFB D E ATIME 0 1 2 3 C RET Display TRACE MODE RET OVFB Specifies whether a break occurs when the trace buffer overflows D A break does not occur when the trace buffer overflows default at emulator shipment E A break occurs when the trace buffer overflows TIME Specifies the minimum time stamp unit 0 Acquires trace information on the number of clock cycles CLK instead of time stamp 1 20 ns default at emulator shipment 2 1 6 us 3 52 us C Stores the settings as configuration information in the emulator flash memory Description e Specification Specifies whether or not to generate a break when the trace buffer overflows To generate a break when the trace buffer overflows TRACE MODE RET To not generate a break when the trace buffer overflows TRACE MODE OVFB D RET Rev 0 1 08 00 page 365 of 450 RENESAS TRACE MODE Specifies minimum time stamp unit acquire trace informati
238. ime 1 gt When both lt elapsed time 1 gt and lt elapsed time 2 gt are specified searches for the time range specified with lt elapsed time 1 gt and lt elapsed time 2 gt elapsed time 1 gt hhh mm ss uuuuuu elapsed time 2 hhh mm ss uuuuuu hhh Hour mm Minute ss Second uuuuuu Microsecond When an address or data condition is specified the emulator searches for a bus cycle where address bus and data bus values match the specified values respectively Note the following when specifying search conditions Longword access Longword data is accessed in one bus cycle Only longword data LD and a multiple of four can be specified as data and address conditions respectively Word access Word data is accessed in one bus cycle Only word data WD and a multiple of two can be specified as the data and address conditions respectively Byte access Byte data is accessed in one bus cycle Only byte data D can be specified as the data condition Both even and odd addresses can be specified as the address condition Rev 0 1 08 00 page 370 of 450 RENESAS SEARCH A bit mask in 1 bit or 4 bit units can be specified for address data or PRB condition When a bit is masked the condition is satisfied irrespective of its bit value To specify the mask specify each digit to be masked at input as an asterisk Table 7 30 shows mask specification examples Exampl
239. ing program fetch cycle Rev 0 1 08 00 page 248 of 450 The condition is satisfied when the bus cycle type matches the specified type Multiple access types cannot be specified either select one of the access types on the left or specify none RENESAS BREAK_CONDITION_UBC Table 7 8 Specifiable Conditions cont Item and Input Format Description Satisfaction count specification This condition can be specified in combination with any of the COUNT lt value gt address data read write and access type conditions The complete condition combination is satisfied when the other specified condition has been satisfied for the specified number of times Only BREAK_CONDITION_UBC1 can be specified value H 1 to H FFFF The data conditions of the BREAK CONDITION break are satisfied when the address bus and data bus values match the specified values The data bus the SH7060 internal bus is always 32 bits long Note the following when specifying break conditions e Longword access Longword data is accessed in one bus cycle Only longword data LD and a multiple of four can be specified as the data and address conditions respectively Word access Word data is accessed in one bus cycle Only word data WD and a multiple of two can be specified as the data and address conditions respectively Byte access Byte data is accessed in one bus cycle Only byte data D can be specified as the data conditio
240. inserted between words Words are described below Constants Numeric constants character constants and expression can be used as constants e Numeric constants The following shows numeric constant formats A radix is entered at the head of a numeric constant S nnnnnnnn S Radix of a constant B Binary Q Octal D Decimal H Hexadecimal X Fixed point Default Value specified with the RADIX command nnnnnnnn Value based on the radix 4 byte value maximum Example To indicate 100 in decimal D 100 If the radix is omitted the radix specified with the RADIX command is automatically used Example If the radix is omitted while hexadecimal is specified with the RADIX command entering 10 means H 10 e Character constants Enclosed with single or double quotation marks If a single or double quotation mark is used as data add two sequential quotation marks Example 1 A H 41 Example 2 27 single quotation mark Multiple characters can be included inside the quotation marks within the specified data size as shown below Example 4142 2 byte data Rev 0 1 08 00 page 218 of 450 RENESAS e Expression An expression can be described using numeric constants character constants and operators As an operator addition or subtraction can be specified Examples D 10 H 20 20 4 1 File Name A file name can be specified as a command parameter The general file n
241. ion Therefore realtime emulation cannot be performed In the above two cases the emulator pauses at the following timing MEMORY command At each memory access DUMP command In 16 byte units DISASSEMBLE command In 4 byte units 2 During execution of the TRACE TRACE SEARCH or TRACE CONDITION A B C command the emulator stops trace information acquisition 3 The emulator cannot enter parallel mode when executing emulation in the following modes Cycle reset mode R option of GO command Time measurement mode I1 D2 or I3 option of GO command Rev 0 1 08 00 page 140 of 450 RENESAS 1 4 Break Function The following four methods are useful to stop emulation The break function can be used regardless of the SH7060 s operating mode Hardware break Software break Forced break Write protect guarded break 1 4 11 Hardware Break Caused by the SH7060 s signal status as specified Caused by a program counter Caused by pressing the CTRL C keys or the BREAK key Caused by writing to a write protected area or accessing guarded area A hardware break can be specified using the BREAK CONDITION UBC command or BREAK CONDITION A B C commands Specifiable break conditions are listed in table 1 4 Rev 0 1 08 00 page 141 of 450 RENESAS Table 1 4 Specifiable Hardware Break Conditions BREAK BREAK_ BREAK BREAK BREAK BREAK BREAK_ CONDI CONDI CONDI CONDI CONDI CONDI
242. ion 2 Differences between the SH7060 and the Emulator in Part II Emulator Function Guide Rev 0 1 08 00 page 6 of 450 RENESAS 1 3 Environmental Conditions The following environmental conditions must be satisfied when using the emulator Failure to do so will damage the user system and the emulator The USER PROGRAM will be LOST CAUTION Observe the conditions listed in table 1 1 when using the emulator Table 1 1 Environmental Conditions Specifications Temperature Operating 10 to 35 C Storage 10 to 50 C Humidity Operating 35 to 80 RH no condensation Storage 35 to 80 RH no condensation Vibration Operating 2 45 m s max Storage 4 9 m s max Transportation 14 7 m s max AC input power Voltage AC100 120 V 200 240 V 10 Frequency 50 60 Hz Power consumption 200 VA Ambient gases There must be no corrosive gases present Rev 0 1 08 00 page 7 of 450 RENESAS 1 4 Components The emulator consists of the E8000 station device control board and EV chip board Check all components after unpacking If any component is missing contact the sales office from which the emulator was purchased 1 4 4 E8000 Emulator Station Table 1 2 lists the E8000 station components Table 1 2 E8000 Station Components HS8000EST02H Classification Item Quantity Remarks Hardware E8000 station 1 Power supply control board and trace board are installed Trace cable Length 50 c
243. ion of BCU2 condition to the satisfaction of BCU1 condition e Time interval measurement modes 2 and 3 display the average execution time from satisfaction of BCU2 condition to the satisfaction of BCU1 condition Rev 0 1 08 00 page 285 of 450 RENESAS GO f Time interval measurement mode 3 displays the execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition Time interval measurement mode 2 displays the execution count from satisfaction of BCU2 condition to the satisfaction of BCUI condition g Time interval measurement mode 3 displays the maximum execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition h Time interval measurement mode 3 displays the minimum execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition 1 Time interval measurement mode 3 displays the average execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition j User program execution time in decimal According to the TIME option of the MODE command the maximum measurable time is 488 124 or 6 hours where the minimum measurement time is 1 6 us 406 ns or 20 ns respectively If the period exceeds the maximum measurable time it is displayed as k Cause of termination as listed in table 7 14 Rev 0 1 08 00 page 286 of 450 RENESAS Table 7 14 Causes of GO Command T
244. is not specified the following message is displayed whenever the data specified by data gt is found Xxxxxxxx CHANGE Y N y Address where data 1 gt was found y Y data 1 is replaced with data 2 gt N Data is not replaced continues to search for another occurrence of the specified data To terminate this command before reaching end address gt press the CTRL keys Rev 0 1 08 00 page 264 of 450 RENESAS DATA_CHANGE If lt data 1 gt is not found at any point in the replacement range the following message is displayed 45 NOT FOUND Memory modification with this command can be performed only in areas CSO to CS5 the internal memory areas Examples 1 To replace 2 byte data H 6475 in the address range from H 7000 to H 7FFF with H 5308 with confirmation message DC 6475 5308 7000 7FFF W RET 00007508 CHANGE Y N Y RET 00007530 CHANGE Y N N RET 2 replace 4 byte data DATA in the address range from H FB80 to H FE00 with DATE without confirmation message DC DATA DATE FB80 FEO0 L Y RET Rev 0 1 08 00 page 265 of 450 RENESAS DATA_SEARCH 7 2 15 DATA_SEARCH DS Searches for memory data Command Format e Search DATA_SEARCHA lt data gt A lt start address gt A lt end address gt A lt number of bytes gt lt size gt AN RET lt data gt Data to be searched for start address
245. isplacement Rn General register name RO Rn Register indirect with RO Rn General register name index disp GBR GBR indirect with disp Displacement value displacement GBR Global base register RO GBR GBR indirect with index RO General register name GBR Global base register disp PC PC relative with disp Displacement value displacement PC PC value within vector address table aaaa PC relative aaaa Address value Usable with BF BT BRA and BSR instructions imm Immediate imm Immediate data value Notes 1 For the address value immediate data value and displacement values the formula addition or subtraction can be used However disassemble is displayed only in address value 2 If the immediate data value is different from the specified operation size an error occurs Rev 0 1 08 00 page 180 of 450 RENESAS 1 11 3 Disassembly The emulator has a disassembly function to display user program contents in mnemonics This function is performed with the DISASSEMBLE command and enables to debug without referencing to a program list For details refer to section 7 2 16 DISASSEMBLE Rev 0 1 08 00 page 181 of 450 RENESAS Rev 0 1 08 00 page 182 of 450 RENESAS Rev 0 1 08 00 page 183 of 450 RENESAS Rev 0 1 08 00 page 184 of 450 RENESAS Section 2 Differences between the SH7060 and the Emulator When the emulator system is initiated or when the emulator resets the SH7060 as a result of a command suc
246. it is displayed The clock cycle cannot be displayed together with the time stamp display m Rev 0 1 08 00 page 349 of 450 RENESAS TRACE Note When the display is in bus cycle units the following message is displayed as the emulator cycle following the last bus cycle of user program execution Note that this emulator cycle does not affect user program execution cycles Examples 1 To display all trace information with only instruction mnemonics RET IP ADDR D 000004 00002010 D 000003 00002012 D 000002 00002020 D 000001 00002022 00002024 D 000000 MNEMONIC JS NO MOV L NOP MOV L OP ERAND GRO RO RO R1 To display bus cycle information and instruction mnemonic information in bus cycle units from five instructions before the point where a delay count condition was satisfied T 5 B RET BP D 000005 D 000004 D 000003 D 000002 D 000001 D 000000 AB 00002010 00002012 00002010 00002020 00002022 00002020 00002024 00002024 00F00000 00002028 DB 400B0009 21020009 6403000B 00002020 00090009 R8000 Rev 0 1 08 00 page 350 of 450 MA RW JSR NOP EXT MOV L NOP EXT MOV EXT EXT EXT STS GRO PRG RO R1 PRG RO R4 PRG DAT PRG NMI RES VCC PRB RENESAS TRACE To specify a display range by bus cycle pointers
247. ith this command Check the specified address 54 INVALID CONFIGURATION The configuration file in emulator flash memory FILE is invalid Re install the configuration file from the system disk 55 CONFIGURATION FILE NOT configuration file was not found in the FOUND emulator flash memory Re install the configuration file from the system disk 56 INVALID CONFIGURATION The configuration file in emulator flash memory CHECK ERROR contains invalid data Re install the configuration file from the system disk 57 ILLEGAL INSTRUCTION The memory contents of the address specified ADDRESS with the BREAK or BREAK_SEQUENCE command is a break instruction H 0000 A breakpoint cannot be specified at this address 58 CANNOT SELECT EMULATOR An operating mode not supported with this CLOCK emulator was specified Check the operating mode 59 TOO MANY CHARACTERS Too many characters were specified Check the number of characters 61 CANNOT GET INTO The execution mode specified with the GO PARALLEL MODE command prevents the emulator from entering parallel mode Change the execution mode 62 LAN BOARD This command cannot be executed because the DISCONNECTION LAN board is not installed Install the optional LAN board and re enter the command 66 BACKGROUND INTERRUPT BACKGROUND_INTERRUPT command COMMAND STOPPED execution was terminated 67 LAN I O ERROR A LAN I O error occurred Refer to table 10 3 Rev 0 1 08 00 page 422 of 450 RENESA
248. ition Access type External probe value System control signal NOT condition Delay count e Stops trace when a trace stop condition is satisfied a maximum of 24 points Address bus value or data bus value Read write condition Access type External probe value System control signals NOT condition Delay count e Subroutine trace a maximum of 16 points Rev 0 1 08 00 page 129 of 450 RENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Trace data TRACE_ e Low pulse is output from the trigger 7 2 41 acquisition and CONDITION_ output pin when conditions are display cont A B C cont satisfied Address bus value or data bus value Read write condition Access type External probe value System control signals NOT condition Delay count TRACE Searches for trace data 7 2 44 SEARCH TRACE MODE Sets and displays trace information 7 2 48 Rev 0 1 08 00 page 130 of 450 acquisition mode RENESAS Table 1 22 Emulation Functions cont Command Type Command Performance PERFORMANC E ANALYSIS 1 to 8 Table 1 2 Emulation Functions cont Command Type Command Single step STEP execution STEP_OVER STEP_ INFORMATION Reference Section 7 2 30 Function A maximum of eight measurement modules Time intervals 20 ns 6 hours 406 ns 124 hours and 1 6 us 488 hours A maximum of 65 535 executio
249. l are as follows Physical and Data Link Layers The LAN board communicates with Ethernet and Cheapernet Table 3 5 shows the Ethernet and Cheapernet specifications Rev 0 1 08 00 page 55 of 450 RENESAS Table 3 5 Ethernet Cheapernet Specifications Ethernet Cheapernet Transfer rate 10 Mbits second 10 Mbits second Maximum distance 500 m 185 between segments Maximum network length 2500 m 925 Maximum number of 100 30 nodes in one segment Minimum distance 2 5m 0 5m between nodes Network cable Diameter 0 4 inch 1 02 cm Diameter 0 25 inch 0 64 cm 50 Q shielded coaxial cable 50 Q shielded coaxial cable RG 58A U Network connector N type connector BNC connector Transceiver cable Diameter 0 38 inch 0 97 cm Ethernet cable to be connected to the 15 pin D SUB connector Network Layer IP Internet Protocol Transmits and receives data in datagram format Does not support IP options Does not have subnet mask functions when HS7000ELNO1H is used Supports subnet mask functions when HS7000ELNO2H is used Does not support broadcast communications ICMP Internet Control Message Protocol Supports only echo reply functions ARP Address Resolution Protocol Calculates Ethernet addresses from IP addresses by using broadcast communications Transport Layer TCP Transmission Control Protocol Logically connects the emulator to the workstation UDP User
250. lator clock 1 5 Remaining size of standard emulation memory xxxxKB Remaining size of standard emulation memory Example To display the emulator status ST RET MODE 02 RADIX HEX BREAK D 001 HOST 38N1X STEP_INFO REG 12 A 3 SP CLOCK 7 5MHz 5 4096 Rev 0 1 08 00 page 331 of 450 RENESAS 7 2 37 STEP S Command Format Performs single step execution e Single step STEP A lt number of execution steps gt A lt start address gt lt number of execution steps gt lt start address gt lt stop PC gt lt display option gt Rev 0 1 08 00 page 332 of 450 lt stop PC gt A lt display option gt AI RET Number of steps to be executed H 1 to H FFFFFFFF Default If stop PC and display option are specified H FFFFFFFF is assumed If not H 1 is assumed Start address of single step execution Default is the current PC address PC address when single step execution is terminated Default is number of execution steps Specification of instructions to be displayed J Displays instructions and register contents only when branch instructions are executed R Displays instructions and register contents only within the opening routine Default Displays instructions and register contents for all executed instructions Interrupt permission during STEP command execution RENESAS
251. le S S type load module H HEX type load module M Memory image file E ELF type load module Default SYSROF type load module lt file name gt File name in the host computer Description e Load Loads a load module file from the host computer to memory via the FTP interface Before executing this command the emulator must be connected to the host computer with the FTP command For details refer to section 9 3 6 FTP The current load address is displayed as follows LOADING ADDRESS xxxxxxxx Current load address continuously updated When loading is completed the start and end addresses are displayed as follows TOP ADDRESS lt start address gt END ADDRESS lt end address gt Rev 0 1 08 00 page 404 of 450 RENESAS LAN_LOAD An offset value to be added can be specified for the address of a SYSROF type ELF type S type or HEX type load module LAN LOAD offset S lt file name RET If an offset is specified a load address is calculated as follows Load address load module address offset Notes 1 A load module file can be loaded only to the internal memory areas or areas CSO to CS3 2 Verification is not performed during load If the program must be verified use the LAN VERIFY command For details refer to section 9 3 11 LAN VERIFY 3 Before loading a SYSROF type load module the file type must be changed to binary code with the BIN comm
252. lel Mode When a trace stop condition is specified the emulator acquires trace information until the specified condition is satisfied At this point trace acquisition stops and the emulator prompts for command input in parallel mode although realtime emulation does not stop Refer to section 1 3 3 Parallel Mode for details Once the trace stop conditions have been satisfied and the trace information has been displayed the user can specify the trace stop condition again The user can specify the following conditions e Address bus or data bus value Read write condition e Access type DAT DMA e External probe value e NOT condition Delay count H 1 to H FFFF Figure 1 20 shows the trace stop condition specification User program Program flow Trace memory E x 131 070 condition is cycles satisfied Realtime emulation continues No break occurs Figure 1 20 Trace Stop Condition Specification State Subroutine Range Trace Trace information is acquired only when the instructions and operands are accessed in the specified subroutine under the specified condition The subroutine and condition can be specified with the TRACE_CONDITION_A B C commands Rev 0 1 08 00 page 160 of 450 RENESAS 1 5 3 Trace Display The user can display trace information using the TRACE command There are three display formats as follows Instruction Display Only the execute
253. logy Corporation puts the maximum effort into making semiconductor products better and more reliable but there is always the possibility that trouble may occur with them Trouble with semiconductors may lead to personal injury fire or property damage Remember to give due consideration to safety when making your circuit designs with appropriate measures such as 1 placement of substitutive auxiliary circuits ii use of nonflammable material or iii prevention against any malfunction or mishap Notes regarding these materials 1 These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer s application they do not convey any license under any intellectual property rights or any other rights belonging to Renesas Technology Corporation or a third party Renesas Technology Corporation assumes no responsibility for any damage or infringement of any third party s rights originating in the use of any product data diagrams charts programs algorithms or circuit application examples contained in these materials All information contained in these materials including product data diagrams charts programs and algorithms represents information on products at the time of publication of these materials and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons Itis therefore
254. loop program execution starts BACKGROUND INTERRUPT E FFFFAFFC RET Disables user interrupts in command input wait state BACKGROUND INTERRUPT D RET Rev 0 1 08 00 page 232 of 450 RENESAS BACKGROUND_INTERRUPT When the C option is specified the following message is displayed to confirm with the user whether to overwrite the existing configuration information in the emulator flash memory CONFIGURATION STORE OK Y N a RET a Y Stores the specifications as configuration information in emulator flash memory Hereafter when the emulator is activated the saved specifications go into effect N Does not overwrite configuration information The existing specifications are valid When user interrupts are enabled in command input wait state E is specified only commands usable in parallel mode and the BACKGROUND_INTERRUPT command can be executed e Display Displays user interrupt accepting mode in command input wait state and the executing address of the loop program for accepting user interrupts If a break has occurred during user interrupt processing and the loop program has been stopped the register values at termination and the cause of termination are displayed in the following format BACKGROUND_INTERRUPT RET USER INTERRUPT x LOOP PROGRAM ADDRESS yyyyyyyy b Register contents lt cause of termination gt c b x User interrupt accepting mode E User interrupts are
255. ls when the emulation memory is accessed checking normal operation and displaying the execution state This function is effective for debugging the user system hardware Clock Switching The emulation clock can be supplied from the user system clock hereafter referred to as the user clock the crystal oscillator installed on the emulator pod and the internal clock 7 5 MHz or 15 MHz To switch the clock refer to section 7 2 11 CLOCK and note the following In addition refer to section 3 2 5 Selecting the Clock in part I E8000 Guide e When the clock is switched the emulator inputs a RES signal to the SH7060 This initializes the registers e When the user switches to the user clock and the user clock signal is not supplied an error message is displayed and the internal clock is selected instead e When initiating the emulator system program the emulator selects the SH7060 clock automatically in the following order When an external clock is supplied from the user system selects the user clock When a crystal oscillator is installed to the emulator pod selects the crystal oscillator Selects the emulation clock 7 5 MHz Note When the system is initialized the clock operating mode that has been set is selected However if the system is initialized in clock operating mode 7 and there is no input from CKIO the emulator waits for the clock input and normal initialization will fail Check the CKIO input and reinitialize the
256. lt load module type gt Load module type R SYSROF type load module S S type load module H HEX type load module M Memory image file E ELF type load module Default SYSROF type load module file name File name in the host computer Description Load Loads a user program from the host computer into user system memory via the serial interface Use interface software IPW for the host computer INTFC LOAD load module type gt lt file name RET When loading is completed the start and end addresses are displayed as follows TOP ADDRESS start address gt END ADDRESS end address An offset value to be added can be specified for the address of an SYSROF type ELF type S type or HEX type load module LOAD lt offset gt S file name gt RET If an offset is specified a load address is calculated as follows Load address load module address gt offset Rev 0 1 08 00 page 376 of 450 RENESAS INTFC_LOAD Notes 1 The load module can be loaded only to the internal memory areas or areas CSO to CS5 2 Verification is not performed during load If the program must be verified use the INTFC_VERIFY command For details refer to section 8 2 3 INTFC_VERIFY Examples 1 To load SYSROF type load module F11 ABS IL 11 5 RET TOP ADDRESS 00007000 END ADDRESS 00007FFF 2 To load S type load module ST MOT IL S ST MOT RET TOP ADDRE
257. m AC power cable Serial cable RS 232C interface Parallel cable Conforms to IEEE P1284 k lt Spare 3 A or T3 15A corresponding to CE marking Fuse Manual HS8000ESTO2H 1 HS8000ESTO2HE description notes Rev 0 1 08 00 page 8 of 450 RENESAS 1 4 2 SH7060 Device Control Board EV Chip Board Tables 1 3 and 1 4 list the device control board and EV chip board components For details refer to each users manual Table 1 3 Device Control Board Components HS7060EDD81H Classification Item Quantity Remarks Hardware Device control board 1 One board installed in the E8000 station SH7060 trace cable 1 Length 50 cm External trigger cable 1 Software 3 5 type floppy disk 1 E8000 system program Manual HS7060EDD81H 1 HS7060EDD81 HE description notes Table 1 4 EV Chip Board Components Classification Item Quantity Remarks Hardware EV chip board 1 Three boards HS7060EBK81H to be connected to the user system via the user system interface cable Rev 0 1 08 00 page 9 of 450 RENESAS 1 4 3 Options In addition to the E8000 station and EV chip board components the options listed in table 1 5 also available Refer to each option manual for details on these optional components Table 1 5 Optional Component Specifications Item Model Name Specifications LAN board HS7000ELNO02H TCP IP communications protocol Ethernet 10BASE5 Cheapernet 10BASE2 U
258. mand Termination eese 334 Table 7 22 Causes of STEP OVER Command Termination eee 343 Table 7 23 5 Conditions in Each Trace Mode sse 354 Table 7 24 Specifiable Conditions TRACE CONDITION 356 Table 7 25 Address Mask Specifications TRACE_CONDITION_A B O 358 Table 7 26 Mask Specifications TRACE CONDITION 359 Table 7 27 Shipment Defaults of TRACE DISPLAY MODE Command 363 Table 7 28 Display of Minimum Time Stamp Unit essere 366 Table 7 29 Specifiable Conditions TRACE 5 0 369 Table 7 30 Mask Specifications TRACE SEARCH eene 371 Table 8 1 Host Computer Related Commands essere 373 Table 9 1 LAN Commands eerte trt treten tene EE Ursa aep Ree EF EUER 390 Table 10 1 Error Message8 eee ere EHE RR vice Fu ELS 420 Table 10 2 Host T O Brror Codes ener erret 425 Table 10 3 LAN I O Error 22240 040 00000 00 nennen nennen rennen enne 426 Table 10 4 Process Code for LAN I O Error 428 Table 10 5 Interface Software Error Messages sese eere 429 Part Table A 1 Signal Names and Usage of Serial
259. me block Rev 0 1 08 00 page 191 of 450 RENESAS Table 3 3 Memory Blocks in Extended Mode without Rev 0 1 08 00 page 192 of 450 RENESAS Space Type CS0 Memory Type Normal space burst ROM multiplexed space Register Bit Capacity Address EMRA SB0 256 kbytes H 00000000 H 0003FFFF 256 kbytes H 80000000 H 8003FFFF SB1 256 kbytes H 00040000 H 0007FFFF 256 kbytes H 80040000 H 8007FFFF SB2 256 kbytes H 00080000 H 000BFFFF 256 kbytes H 80080000 H 800BFFFF SB3 256 kbytes H 000C0000 H 000FFFFF 256 kbytes H 800C0000 H 800FFFFF SB4 256 kbytes H 00100000 H 0013FFFF 256 kbytes H 80100000 H 8013FFFF SB5 256 kbytes H 00140000 H 0017FFFF 256 kbytes H 80140000 H 8017FFFF SB6 256 kbytes H 00180000 H 001BFFFF 256 kbytes H 80180000 H 801BFFFF SB7 256 kbytes H 001C0000 H 001FFFFF 256 kbytes H 801C0000 H 801FFFFF SB8 5 9 2 Mbytes H 00200000 H 003FFFFF 2 Mbytes H 80200000 H 803FFFFF 5 10 2 Mbytes H 00400000 H 005FFFFF 2 Mbytes H 80400000 H 805FFFFF SB11 2 Mbytes H 00600000 H 007FFFFF 2 Mbytes H 80600000 H 807FFFFF SB12 2 Mbytes H 00800000 H 009FFFFF 2 Mbytes H 80800000 H 809FFFFF SB13 2 Mbytes H 00A00000 H OOBFFFFF 2 Mbytes H 80A00000 H 80BFFFFF SB14 2 Mbytes H 00C00000 H OODFFFFF 2 Mbytes H 80C00000 H 80DFFFFF SB15 2 Mbytes H 00E00000 H O0FFFFFF 2 Mbytes Table 3 3 Memory Blocks Extended Mode without ROM cont Regi
260. mediately after execution start GO command execution does not terminate Ifa pass point is set at a slot delayed branch instruction instead of terminating program execution a slot illegal instruction interrupt occurs Make sure not to set a pass point at a slot delayed branch instruction Display Displays specified pass points and reset point as follows BREAK SEQUENCE PASS POINT NO 1 PASS POINT NO 2 yyyy PASS POINT NO 3 PASS POINT NO 4 xxxxxxxx PASS POINT NO 5 PASS POINT NO 6 PASS POINT NO 7 RESET POINT a b a Address If nothing is specified a blank is displayed b Number of times passed The number of times the pass point was passed is displayed in hexadecimal If it exceeds H FFFF counting restarts from H O The number of times passed is cleared by the next GO command Rev 0 1 08 00 page 253 of 450 RENESAS BREAK_SEQUENCE e Cancellation Cancels specified pass points or a reset point Cancellation of pass points BREAK SEQUENCE RET Cancellation of a reset point BREAK_SEQUENCE RET Note In parallel mode if a command for example memory access is executed and the emulation stops at a pass point or the reset point at the same time command execution may not
261. mination Message Termination Cause BREAK CONDITION UBC1 break condition specified with the BREAK_CONDITION_UBC1 command was satisfied BREAK CONDITION An A break condition specified with the BREAK_CONDITION_An command was satisfied 1 to 8 BREAK CONDITION Bn A break condition specified with the BREAK_CONDITION_Bn command was satisfied n 1 to 8 BREAK CONDITION Cn A break condition specified with the BREAK_CONDITION_Cn command was satisfied 1 to 8 BREAK CONDITION Multiple break conditions specified with the BREAK_CONDITION_A A1 8 A1 to A8 commands were satisfied BREAK CONDITION Multiple break conditions specified with the BREAK CONDITION B B1 8 B1 to 8 commands satisfied BREAK CONDITION Multiple break conditions specified with the BREAK_CONDITION_C C1 8 C1 to C8 commands were satisfied BREAK KEY The BREAK key or CTRL C keys were pressed for forcible termination ILLEGAL INSTRUCTION A break instruction H 0000 was executed RESET BY E8000 The emulator forcibly terminates program execution with the RESET signal because an error has occurred in the user system STEP NORMAL END The specified number of steps were executed STOP ADDRESS The instruction at stop PC was executed If stop PC and display option are omitted instruction mnemonics and register information are displayed for each step executed STEP number of exe
262. mitted break conditions for both break types are displayed If no break condition is specified a blank is displayed BREAK CONDITION UBC RET BCUI UBCI break setting BCU2 lt 2 break setting BCU3 UBC3 break setting BCU4 lt UBC4 break setting RESET Reset point setting e Cancellation Cancels specified conditions When break numbers 1 and 2 are omitted all break conditions are cancelled Cancellation of all break conditions BREAK CONDITION UBC RET Cancellation of BREAK CONDITION UBC2 break conditions BREAK CONDITION UBC2 RET Cancellation of reset point conditions BREAK CONDITION R RET Rev 0 1 08 00 page 250 of 450 RENESAS BREAK_CONDITION_UBC Notes 1 The BREAK CONDITION_UBC4 settings are ignored when a stop address is specified with the GO command or during STEP and STEP OVER command execution 2 Executing addresses containing software breakpoints set by the BREAK or BREAK SEQUENCE command invalidates the BREAK CONDITION settings Make sure not to set software breakpoints at addresses where the BREAK _ CONDITION settings are satisfied 3 A slot delayed branch instruction cannot terminate user program execution before a PC break Occurs setting an execution stop condition for a PC break at a slot delayed branch instruction will stop emulation before executing the branch destination instruction Examples 1 To gener
263. mitted the number of bus cycles and the number of instructions in the trace buffer are displayed Specified when searching for trace information acquired before the trace or break condition has been satisfied This option is usually necessary except for displaying trace information during delays when a delay count condition is specified by the BREAK CONDITION B or TRACE CONDITION B command start bus cycle pointer Start pointer of bus cycle to be searched for or displayed end bus cycle pointer End pointer of bus cycle to be searched for or displayed If both start bus cycle pointer and end bus cycle pointer are omitted bus cycles are searched for or displayed according to the pointers specified with the TRACE DISPLAY MODE command L Displays the last bus cycle information to be searched for Description e Search and display Searches for information in the trace buffer under the specified conditions and displays all applicable bus cycle information If start bus cycle pointer and end bus cycle pointer are specified searches for and displays the bus cycle information between start bus cycle pointer and end bus cycle pointer Trace information is displayed in the same format as the bus cycle information display by the TRACE command If no conditions are specified the number of bus cycles and instructions saved in the trace buffer are displayed TRACE SEARCH RET INSTRUCTION NUMBER D
264. mode setting method in the following format MODE RET MODE xx MD5 0 nn a a Operating mode xx and operating mode selection pin status on the user system MD5 0 nn refer to table 7 19 When the user system is not connected nn is displayed as undefined Rev 0 1 08 00 page 306 of 450 RENESAS MODE Table 7 19 Operating Mode Selection Pin Status and Display Clock Mode Operating Mode MD5 MD4 MD3 MD2 MD1 MDO Display nn Low Low Low Low Low Low 0 Low Low Low Low Low High 1 Low Low Low Low High Low 2 High High High High High High 3F Notes 1 The emulator operating mode is specified with the MODE command regardless of the operating mode selection pin MD5 to MDO status on the user system 2 The emulator does not operate correctly if clock mode 6 or 7 is selected unless the clock signal is input from the user system Make sure to input the clock signal from the user system When the user system is not connected select clock mode 0 1 2 3 4 or 5 with the MODE command and restart the emulator If clock mode 6 or 7 is selected and the E8000 does not activate normally the command wait state is entered if the break key is input Select correct mode with the MODE command 3 For available emulator operating modes refer to the Hardware Manual of the SH7060 RENESAS Rev 0 1 08 00 page 307 of 450 MODE Examples 1 To specify the operating mode as mode 2 and sto
265. mory Command Format e Write FILLA lt start address gt A lt end address gt A lt number of bytes gt A lt data gt lt size gt AN RET lt start address gt Write start address lt end address gt Write end address lt number of bytes gt The number of bytes to be written lt data gt Data to be written Default is H 00 lt size gt Length of data to be written B 1 byte W 2 bytes L 4 bytes Default 1 byte N No verification Description e Write Writes data to the specified memory area Default value is H 00 After data is written it is also verified This command can therefore be used as a memory test If an error occurs the following message is displayed and processing is terminated FAILED AT xxxxxxxx WRITE yy y READ 22 7 Error address yy y Write data hexadecimal and ASCII characters 77 7 Read data hexadecimal and ASCII characters Data can be written to only areas CSO to CS5 or the internal memory areas If Wis specified as lt size gt but the start address is odd the lowest bit is rounded down to the preceding even address If L is specified as lt size gt the lower bits are rounded down to become a multiple of four Writing never exceeds the specified lt end address gt Rev 0 1 08 00 page 279 of 450 RENESAS FILL Example To fill the entire area from addresses H O to H 6FFF with 1 byte data H 00 F 0 6FFF 0
266. mory SB4 to SB7 block 256 kbyte units 0 to 5 area can be set to write prohibited and access prohibited in MAP control block units Write protected Execution stops if writing occurs from the user program Access prohibited Execution stops if access read or write occurs from the user program Read write to the write protection area is possible using the 8000 command use memory in the user system specify U for the memory attribute To cancel the write protection SW or W or access inhibited SG or G of the memory attributes set S for standard emulation memory or U for user system memory Rev 0 1 08 00 page 297 of 450 RENESAS Table 7 16 List of Map Control Blocks 5 Block S Block SBO Address No Internal ROM H 00000000 to H 0003FFFF Internal ROM Available H 01000000 to H O103FFFF SB1 H 00040000 to H 0007FFFF H 01040000 to H O107FFFF SB2 H 00080000 to H 01080000 to H 010BFFFF SB3 H 000C0000 to H O00FFFFF H 010C0000 to H O10FFFFF SB4 H 00100000 to H 0013FFFF H 01100000 to H 0113FFFF SB5 H 00140000 to H 0017FFFF H 01140000 to H 0117FFFF SB6 H 00180000 to H 001BFFFF H 01180000 to H 011BFFFF SB7 H 001C0000 to H 001FFFFF Rev 0 1 08 00 page 298 of 450 H 011C0000 to H 011FFFFF RENESAS CS Section 50 Table 7 17 List of Control Blocks L Bl
267. mpare match timer serial communication interface A D converter D A converter I O port and memory as peripheral functions in addition to the high speed CPU and the DSP Table 1 1 SH7060 Functions ltem Specification Support device SH7060 Maximum controllable memory size 4 Gbytes Maximum external bus width 32 bits Internal ROM 256 kbytes Internal RAM X RAM Y RAM 4 kbytes 4 kbytes DMA 4ch Interrupt controller Nine external interrupt factors NMI 0 7 User break controller 1 ch Bus state controller Internal Timer pulse unit 6 ch Motor management timer 1 ch Watchdog timer 1 ch Compare match timer 2ch A D converter 10 bits x 4 ch x 2 D A converter 8 bits x 2 ch Serial communication 3 ch interface clock synchronous I O port Common pins 107 Input only pins 8 Rev 0 1 08 00 page 125 of 450 RENESAS The emulator operates on the user system in exactly the same way as the SH7060 and enables realtime emulation of the user system with functions for debugging hardware and software The emulator consists of an emulator E8000 station an evaluation chip board hereafter referred to as an EV chip board and a user system interface cable The user system is connected to the EV chip board via the user system interface cable 1 2 Specification The main features of the emulator are its emulation functions and its host com
268. mulator is waiting for command input the user cannot input RES or BREQ signal to the SH7060 The BREQ signal will not be input to the SH7060 during user program execution when the BREQ signal is masked that is the option BREQ D is specified using the EXECUTION_MODE command The BREQ signal interrupt processing can be performed in command input wait state by using the BACKGROUND_INTERRUPT command described in section 3 4 Interrupts A loop program is executed in the background in command input wait state and when an interrupt occurs the processing for the interrupt starts Rev 0 1 08 00 page 201 of 450 RENESAS 3 6 Watchdog Timer WDT The WDT only operates during emulation GO or STEP command execution and does not operate when the emulator is waiting for command input The timer count stops at a break and restarts when emulation is resumed 3 7 Timer Pulse Unit TPU Motor Management Timer MMT and Compare Match Timer CMT The TPU MMT and CMT operate during the command input wait state as well as during emulation Even after the user program has stopped when a break condition is satisfied after the user program has been started with a GO command the TPU MMT and CMT continue to operate Therefore the timer pins are valid even when user program execution has stopped The user can rewrite the timer registers with the MEMORY command 3 8 Serial Communication Interface SCI The serial communication interface sign
269. n Both even and odd address values can be specified as the address condition A bit mask in 1 bit or 4 bit units can be specified for the address PC and data conditions of the BREAK CONDITION command When a bit is masked the condition is satisfied irrespective of its bit value To specify the mask specify each digit to be masked at input as an asterisk Table 7 9 shows mask specification examples Example 1 following condition is satisfied when the lower four bits of the address condition are not specified BREAK CONDITION 1 A H 400000 RET Example 2 following condition is satisfied when address 3000000 is the address condition and bit 0 is zero in the byte data condition BREAK CONDITION UBC1 A H 3000000 DzB 0 RET Rev 0 1 08 00 page 249 of 450 RENESAS BREAK_CONDITION_UBC Table 7 9 Mask Specifications BREAK_CONDITION_UBC1 2 Radix Mask Unit Example Mask Position Allowed Condition Binary 1 bit B 01 1010 Bits 0 and 5 are masked Address data D WD LD or PC Hexa 4 bits H F 50 Bits 15 to 8 are masked Address data D WD LD or decimal PC reset point can be specified by setting the option Only the address condition can be specified BREAK CONDITION UBC PC xxxxxxx R RET e Display Displays specified conditions The character string that was input for specifying conditions will be displayed as it was input If break numbers are o
270. n 16 bit fixed point units M F000 XW RET 0000F000 0 87544 0 875 RET 0000F002 0 45637 0 5 RET 0000F004 0 39285 RET 4 To write data H 10 to address 00 without displaying the memory contents 00 10 RET RENESAS Rev 0 1 08 00 page 305 of 450 MODE 7 2 27 MODE MD Specifies or displays SH7060 operating mode Command Format Specification MODE C RET Display MODE RET Description Specification Interactively specifies the SH7060 operating mode in the emulator as shown below MODE C RET E8000 MODE MD5 0 xx CONFIGURATION STORE OK Y N b RET a Operating mode Input hexadecimal values to specify MD5 to MDO bits b Confirmation message for configuration information storage Y The specified parameters are stored as configuration information in the emulator flash memory N The specified parameters are not stored as configuration information and command execution is terminated If Y is input in b stores the settings as configuration information in the emulator flash memory When the emulator is initiated after configuration information storage it emulates in the stored operating mode The E8000 system program terminates after the SH7060 operating mode is set and must then be re initiated Display Displays the SH7060 operating mode in the emulator the operating mode selection pin MD5 to MDO status on the user system and the operating
271. n count measurements e Subroutine measurement Subroutine execution count Access count to specified area in the subroutine Access count from a subroutine parent to another subroutine child e Time measurement GO POINT time POINT POINT time Reference Section 7 2 37 7 2 39 7 2 38 Function Executes one step at a time and displays the following Instruction mnemonic Memory contents Register contents Displays the above data for a specified routine until a specified address is reached The above operations are performed for a specified number of steps or until a specified address is reached Selects the displayed information of the single step execution time Executes subroutine as a single step Rev 0 1 08 00 page 131 of 450 RENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Memory access MEMORY Displays or modifies memory contents 7 2 26 DUMP e Displays or modifies memory contents 1 2 or 4 byte units e DUMP displays fixed points of memory contents MAP Specifies memory attributes of emulation 7 2 25 memory in 256 kbyte or 1 Mbyte units e User memory e Write protected e Access prohibited e Emulation memory Standard 4 Mbytes provided FILL Writes data in specified pattern 7 2 20 DATA SEARCH Searches for and replaces data in 7 2 15 DATA CHANGE specified pattern 7 2 14 Clock selection C
272. n the host computer connected via the FTP interface An S type HEX type or M type load module can be saved A SYSROF type or ELF type load module cannot be saved Before executing this command connect the emulator to the host computer with the FTP command The current save address is displayed as follows SAVING ADDRESS XXXXXXXx Current save address continuously updated When save is completed the start and end memory addresses are displayed as follows TOP ADDRESS start address gt END ADDRESS end address Rev 0 1 08 00 page 406 of 450 RENESAS LAN_SAVE When the LF option is specified the emulator adds an LF code H 0A to the end of each record of an S or HEX type load module in addition to a CR code Notes 1 Data can be saved only in the internal memory areas or areas CSO to CS5 2 Verification is not performed after save If the program must be verified use the LAN_VERIFY command if necessary For details refer to section 9 3 11 LAN_VERIFY Example To save the memory contents in the address range from H 7000 to H 7FFF in the host computer as an S type load module file file name F11 S enter the following command line Before entering the LAN SAVE command connect the emulator to the host computer with the FTP command HOST1 RET Username USERI RET Password RET login command success FTP gt LSV 7000 7FFF F11 S RET SAVING ADDR
273. nal probe signal Trace information is sampled at falling edges in the T2 cycles of CK figure 1 16 1 When the external probe signal changes between samplings it cannot be reflected in the trace data figure 1 16 2 When a sampling edge coincides with a change in the external probe signal the trace contents are undefined figure 1 16 3 e Clock number Three clock cycles are traced in bus cycle A Rev 0 1 08 00 page 155 of 450 RENESAS 1 5 2 Trace Condition Setting The user can specify the following five conditions with the TRACE CONDITION commands For details refer to section 7 2 41 TRACE CONDITION Table 1 5 shows the maximum specifiable numbers in trace mode Free trace Subroutine trace Range trace Trace stop parallel mode Subroutine range trace Table 1 5 Maximum Specifiable Numbers in Trace Mode TRACE TRACE _ TRACE CONDITION A CONDITION B CONDITION C Total Subroutine trace 8 8 16 Range trace 8 8 8 24 Subroutine range 4 4 trace Trace stop 8 8 8 24 Parallel mode Rev 0 1 08 00 page 156 of 450 RENESAS Free Trace In free trace when the user program is executed as a result of the GO STEP or STEP_OVER command tracing is carried out continuously for a maximum of the latest 131 070 bus cycles until a break condition is satisfied When no parameter is given with the TRACE_CONDITION_A B C commands the default is free trace Figure 1
274. nation transfer is performed to only the internal memory areas and areas CSO to 55 Example To transfer data in the address range from H 101C to H 10FC to address 1000 101C 10FC 1000 RET Rev 0 1 08 00 page 309 of 450 RENESAS _ _ 7 2 02 MOVE TO RAM Moves contents of ROM to standard emulation MR memory Command Format e Movement MOVE TO RAMMscstart address A end address gt lt memory attribute gt RET lt start address gt Start address of the ROM area to be moved lt end address gt End address of the ROM area to be moved lt memory attribute gt Type of standard emulation memory to be allocated S Standard emulation memory SW Standard emulation memory with write protection Default Standard emulation memory Description Movement Use this command to temporarily modify ROM contents in the user system and execute the modified program Transfers user system ROM contents to the specified standard emulation memory area where data can be modified Data transfer to standard emulation memory is performed in 256 kbyte or 1 Mbyte units After data transfer the unused standard emulation memory area is displayed as follows REMAINING EMULATION MEMORY LB 4096KB SBO 3 yyyyKB SB4 7 zzzzKB xxxx Unused size of standard emulation memory LBO to LB11 block 1 Mbyte units yyyy Unused size of standard emulation memory SBO to SB3 block 256 kbyte units zzzz Unuse
275. nd cancels BCU hardware break conditions Command Format e Setting BREAK_CONDITION_UBC 1 2 3 4 A lt condition gt A lt condition gt A lt condition gt R RET e Display BREAK_CONDITION_UBC 1 2 3 4 RET e Cancellation BREAK CONDITION UBC 1 2 3 4 R RET 1 2 3 4 UBC break number When omitted all conditions will be displayed or cancelled lt condition gt Hardware break condition refer to table 7 8 for details Description e Setting Set the hardware break BREAK_CONDITION_UBC break condition If the specified condition is satisfied program execution is stopped In BREAK CONDITION UBC break each condition shown in Table 7 8 can be set Also BREAK CONDITION UBC break can be used in up to four levels of sequential break conditions Sequential break is specified using the GO command Rev 0 1 08 00 page 247 of 450 RENESAS BREAK_CONDITION_UBC Table 7 8 Specifiable Conditions Item and Input Format Address condition A lt address gt PC lt address gt P XA X bus address gt YA lt Y bus address gt Description The condition is satisfied when the address bus value matches the specified value When is selected the address bus in data access or program fetch cycles is specified and when is selected the address bus in program fetch cycles is specified When the P option is specified with PC a break occurs before program execution at the specifie
276. ndition R Read W Write The condition is satisfied in read cycle R is specified or a write cycle W is BCB specified Access type DAT Execution cycle VCF Vector fetch cycle Default All bus cycles described above including program fetch cycle The condition is satisfied when the bus BCA cycle type matches the specified type BCB Multiple access types cannot be specified BCC either select one of the access types on the left or specify none Rev 0 1 08 00 page 241 of 450 RENESAS BREAK_CONDITION_A B C Table 7 5 Specifiable Conditions BREAK_CONDITION_A1 A8 cont Item and Input Format External probe condition PRB lt value gt Commands Description that can be Set The condition is satisfied when all of the BCA emulator s external probe signals match pcp the specified values Specify value as 1 byte data Each bit corresponds to a probe number as follows 3 2 1 0 lt Bit x x x x Specified value 4 3 2 1 lt Probe number x O Low level 1 High level This condition can be masked External interrupt condition 1 NMI L or NMI H The condition is satisfied when the NMI BCA signal matches the specified level BCB NMI or NMI L The condition is satisfied when NMI is low NMI H The condition is satisfied when NMI is high Count setting COUNT lt value gt value H 1 to H FFFF This is set in conjunction with conditions
277. nt tool Command Format Termination Q RET Description e Termination Terminates the flash memory management tool Example To terminate the flash memory management tool FM gt Q RET START E8000 S START E8000 F FLASH MEMORY TOOL SET LAN PARAMETER START DIAGNOSTIC TEST S F L T Rev 0 1 08 00 page 84 of 450 RENESAS RTR RTR RTR Defines the remote network routing information Command Format Definition RTR RET Description Definition Defines the remote network routing information Enter the IP address and network number as follows after the specified number is entered and the emulator prompts them FM gt RTR RET PLEASE SELECT NO 1 10 L E Q X lt definition number gt RET IP ADDRESS lt router IP address gt RET NET ID lt network number gt RET Display Entering L RET displays the list of the defined host computer Initiation Entering E RET saves the new specifications in the emulator flash memory and initiates the LAN board Entering Q RET saves the new specifications in the emulator flash memory without initializing the LAN board and terminates LH command execution Entering X RET terminates LH command execution without saving the new specifications Example To define router IP address 128 1 2 1 for network number 128 1 2 0 as the routing information FM gt RTR RET
278. nter Y RET to allow LOAD CONFIGURATION FILE OK Y N Y configuration file RET SHCNF706 SYS to be loaded in INPUT FILE NAME SHCNF706 SYS RET the emulator flash memory Then enter configuration file name SHCNF706 SYS 11 Enter Y RET to allow firmware LOAD FIRMWARE FILE OK Y N Y RET file SHDCT706 SYS to be loaded INPUT FILE NAME SHDCT706 SYS RET in the emulator flash memory SEE Then enter firmware file name SHDCT706 SYS 12 Enter N RET not to load the LOAD ITRON DEBUGGER FILE OK Y N N ITRON debugger RET 13 Enter N RET not to load the LOAD DIAGNOSTIC FILE OK Y N RET diagnostic program 14 Enter DIR RET to check FM gt DIR RET whether the necessary files have FILE ID lt STATUS gt been loaded Bim 95 CONF OK LAN NO FIRM OK TRON NO DIAG NO INI OK MON OK 15 Enter Q RET to terminate the FM gt Q RET flash memory management tool START E8000 S START E8000 F FLASH EMORY TOOL L SET LAN PARAME T STAR DIAGNOSTIC TEST S F L T _ nE 16 Installation is completed Rev 0 1 08 00 page 98 of 450 RENESAS 3 8 E8000 System Program Initiation When the emulator is turned on while S4 in DIP SW1 is turned off to the right and a manual system program load method is selected the emulator enters monitor command input wait state and the E8000 system program must be loaded and initiated by monitor c
279. nternal memory area e Address where the BREAK CONDITION command settings are satisfied refer to the following descriptions e Address containing a slot delayed branch instruction refer to the following descriptions e Address of the lower 16 bits of a 32 bit DSP instruction Note If a software breakpoint is set at a slot delayed branch instruction a slot illegal instruction interrupt occurs instead of terminating program execution Make sure not to set a software breakpoint at a slot delayed branch instruction Rev 0 1 08 00 page 237 of 450 RENESAS specifying the number of times a breakpoint must be reached when setting the breakpoint program execution terminates when reaching the breakpoint for the specified number of times Note When multiple passes are specified for a breakpoint the program must be temporarily stopped each time a software breakpoint is passed to update the pass count and user program emulation continues until the number of times the breakpoint must be passed is satisfied As a result realtime emulation is not performed Example To generate a break when the instruction at address 300 is executed five times BREAK 300 5 RET Software breakpoints are ignored during STEP and STEP_OVER command execution so the pass count is not updated at this time When execution starts at the address set with the BREAK command immediately after execution starts the BREA
280. nterval measurement mode 2 displays the execution count from satisfaction of BCU2 condition to the satisfaction of BCUI condition c Time interval measurement modes 2 and 3 display the maximum execution time from satisfaction of BCU2 condition to the satisfaction of BCUI condition d Time interval measurement modes 2 and 3 display the minimum execution time from satisfaction of BCU2 condition to the satisfaction of BCUI condition Rev 0 1 08 00 page 328 of 450 RENESAS Note RESULT Time interval measurement modes 2 and 3 display the average execution time from satisfaction of BCU2 condition to the satisfaction of BCUI condition f Time interval measurement mode 3 displays the execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition Time interval measurement mode 2 displays the execution count from satisfaction of BCU2 condition to the satisfaction of BCU1 condition g Time interval measurement mode 3 displays the maximum execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition h Time interval measurement mode 3 displays the minimum execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition i Time interval measurement mode 3 displays the average execution time from satisfaction of BCU4 condition to the satisfaction of BCU3 condition j User program execution time in decimal According to the TIME option of the
281. ntervals measured are added together by repeatedly executing the function which is the same as that of time interval measurement mode 1 using BREAK CONDITION 2 and BREAK CONDITION UBCI Likewise the time intervals measured are added together using BREAK CONDITION and BREAK CONDITION UBC3 This mode is selected by specifying option with the GO command In time interval measurement mode 1 a break occurs after the hardware break condition 2 and then break condition 1 are satisfied However in this mode even if break condition 1 or 3 is satisfied a break does not occur When this mode is specified PC breaks are invalid Condition 2 4 is satisfied Condition 1 3 is satisfied Condition 2 4 is satisfied L Condition 1 3 is Y_ satisfied BREAK key Measurement time a b Condition 2 4 is satisfied Condition 2 4 is satisfied Condition 1 3 is satisfied Condition 2 4 is satisfied 4 BREAK key Measurement time c d Figure 1 25 Time Interval Measurement Mode 3 RENESAS Rev 0 1 08 00 page 167 of 450 1 7 2 Subroutine Time Measurement Number of Times Measurement The subroutine time and number of times the subroutines are executed can be measured based on the total program execution time by the PERFORMANCE_ANALYSIS command Specify the subroutine to be measured with start and end addresses The maximum number of subroutines which can be measured is sh
282. obe input 0 Synchronous break input O pin 2 2 Probe input 1 3 3 Probe input 2 4 4 Probe input 3 5 RUN break status RUN state identification signal output pin 6 T Trigger output Trigger mode output pin 7 G GND Connection pin for GND 8 G External probe connector External probe Enlarged view Side view of the device control board DCONT Figure 3 7 External Probe Connector Rev 0 1 08 00 page 39 of 450 RENESAS 3 2 5 Selecting the Clock This emulator supports three types of clock for the SH7060 a crystal oscillator attached on the EV chip board external clock input from the user system and the emulator internal clock The clock is specified with the CLOCK command However when the user system is initialized in clock operating modes 6 or 7 CKIO input the SH7060 clock is input only from the CKIO pin This emulator can use a clock source of up to 60 MHz quadruple of external clock frequency 15 MHz as the SH7060 clock input X Crystal oscillator 8 to 15 MHz CLOCK command U External clock 2 to 15 MHz E Emulatorinternal clock 7 5 MHz L uw Crystal Oscillator crystal oscillator is not supplied with the emulator Use one that has the same frequency as that of the user system When using a crystal oscillator as the SH7060 clock source the frequency must be from 8 to 15 MHz CAUTION Always switch OFF the emulator and user system before connecting or disconnecting the CRYSTAL OSCILLA
283. ock Address L Block No Internal ROM Internal ROM Available CS Section LBO H 00200000 to H 003FFFFF H 01200000 to H 013FFFFF CS0 LB1 H 00400000 to H 005FFFFF H 01400000 to H 015FFFFF LB2 H 00600000 to H 007FFFFF H 01600000 to H 017FFFFF LB3 H 00800000 to H 009FFFFF H 01800000 to H 019FFFFF LB4 H 00A00000 to H 00BFFFFF H 01A00000 to H 01BFFFFF LB5 H 00C00000 to H 00DFFFFF H 01C00000 to H 01DFFFFF LB6 H 00E00000 to H 00FFFFFF H 01E00000 to H 01FFFFFF LB7 H 01000000 to H 01FFFFFF LB8 H 02000000 to H 02FFFFFF H 02000000 to H 02FFFFFF LB9 H 03000000 to H 03FFFFFF H 03000000 to H 03FFFFFF LB10 H 04000000 to H 04FFFFFF H 04000000 to H 04FFFFFF CS1 LB11 H 05000000 to H 05FFFFFF H 05000000 to H 05FFFFFF LB12 H 06000000 to H 06FFFFFF H 06000000 to H 06FFFFFF LB13 H 07000000 to H 07FFFFFF H 07000000 to H 07FFFFFF LB14 H 08000000 to H 08FFFFFF H 08000000 to H 08FFFFFF CS2 LB15 H 09000000 to H 09FFFFFF H 09000000 to H 09FFFFFF LB16 H 0A000000 to H OAFFFFFF H 0A000000 to H OAFFFFFF LB17 H 0B000000 to H OBFFFFFF H 0B000000 to H OBFFFFFF LB18 H 0C000000 to H OCFFFFFF H 0C000000 to H OCFFFFFF CS3 LB19 H 0D000000 to H ODFFFFFF H 0D000000 to H ODFFFFFF LB20 0 000000 to H OEFFFFFF 0 000000 to H OEFFFFFF LB21 H OF000000 to H OFFFFFFF H OF000000 to H OFFFFFFF LB22 H 40000000 to H 41FFFFFF H 40000000 to H 41FFFFFF CS4 LB23 H 41000000 to H 41FFFFFF H 41000000 to H 41FFFFFF
284. of 450 RENESAS 1 5 Realtime Trace Function The emulator can trace SH7060 external bus information during realtime emulation without affecting the user system The emulator can fetch external bus information of the SH7060 address or data and the external probe value up to 131 070 bus cycles Trace information is referenced with the TRACE command Display of this information enables a check on executed program Trace information e Address bus 32 bits e Data bus 32 bits e External probe Four e Time stamp value 32 bits SH7060 control I O signal 28 Emulator displays trace information in the following methods e Displays the trace information in bus cycle units e Searches for the specified information and displays it Use the TRACE SEARCH command 1 5 4 Trace Timing Trace information is acquired in trace memory synchronized with falling edges in the T2 cycles of the CK signal Note Because external probe signal input is not synchronized with the CK signal it may not be possible to log all the changes in the external probe signal In each bus cycle the clock number is the number of clock CK cycles between the end of the previous bus cycle and the end of the current bus cycle Figure 1 16 shows an example of the external probe signal trace Rev 0 1 08 00 page 154 of 450 RENESAS Ti Tw T2 Ti Tw T2 Tt Tw T2 Tw T2 Address External probe Figure 1 16 External Probe Signal Trace Example e Exter
285. of cables bound into a bundle and the colors for connectors when connecting the cables CAUTION Make sure the connector shapes and numbers are correctly matched when connecting trace cables to the station to EV chip interface connectors Failure to do so will damage the connectors 4 Connect the trace cables to the station to EV chip board interface connectors CN1 CN2 CN3 and CN4 on the EV chip board Confirm that each trace cable connected to a connector on the E8000 station is also connected to its corresponding station to EV chip board interface connector on the EV chip board Connect the cables using the same method as in step 3 Figure 3 4 shows how to connect the trace cables to the EV chip board interface connectors Rev 0 1 08 00 page 34 of 450 RENESAS 4 black CN3 blue CN2 yellow Trace cable CN1 CN1 red interface CN4 Station to EV chip board interface CN3 Station to EV chip board interface CN2 T n 3 Station to EV chip board 22272 za interface CN1 Z gt i Station to EV chip board User system Figure 3 4 Connecting Trace Cables to the EV Chip Board Rev 0 1 08 00 page 35 of 450 RENESAS 3 2 3 Connecting the User System Interface Cable For connecting the user system interface cable refer to the E8000 SH7060 Series QFP 176 User System Interface Cable HS7065ECH8 1H Manual Flat cable connectornumber Connector number Connector number of cable bod
286. of the channels is the same as that for time measurement mode 3 In this case this is measured in subroutine time measurement mode 1 Subroutine Call Count Measurement Mode The access count to a subroutine child is measured during subroutine parent execution The combination of the channels is the same as that for time measurement mode 3 In this case this is measured in subroutine parent time measurement mode 1 Maximum Minimum Subroutine Time Detection Function The maximum minimum subroutine time can be measured by the time measurement mode 2 of PERFORMANCE ANALYSIS 1 2 3 4 This measures the maximum minimum execution time for a subroutine specified by the start address and end address Timeout Function This compares a measured value and a user specification time during user specified subroutine execution e User specification time Measured value User program execution breaks e User specification time gt Measured value Execution time is measured Rev 0 1 08 00 page 172 of 450 RENESAS 1 8 Trigger Output During user program execution the emulator outputs a low level pulse from the trigger output probe under the following two conditions e Trace condition satisfaction e Hardware break condition satisfaction When using this pulse as an oscilloscope trigger input signal it becomes easy to adjust the user system hardware For example wave forms can be seen when the user program goes to a specified point T
287. of the errors and error solutions Table 10 5 Interface Software Error Messages Error Message INTFC ERROR ABORT BY BREAK Description and Solution File transfer has been forcibly terminated by pressing the BREAK STOP or CTRL C keys ERROR ALREADY ASSIGNED The specified command is already being executed Re execute the command after command execution has been completed ERROR EMULATOR READY The debugger power has been turned off or a cable connected to the debugger has been disconnected Check that the debugger power is turned on and that cables are connected correctly and restart If the same error occurs again inform a Hitachi sales agency ERROR ENVIRONMENT NOT SPECIFIED The specified environment variable name could not be found Specify the environment variable name with the SET command ERROR FILE ALREADY EXISTS OVERWRITE Y N The specified IBM PC file already exists Enter Y to transfer any way after deleting the file enter N to cancel transfer INTFC ERROR FILE CLOSE ERROR An error has occurred while closing an IBM PC file INTFC ERROR FILE DELETE ERROR An error has occurred while deleting an IBM file Check the specified file name INTFC ERROR FILE NOT FOUND The IBM PC file specified at load cannot be found or the file name contains an error Check the specified file name ER
288. ol F CANCEL Figure 3 22 Communication Setting Box Rev 0 1 08 00 page 65 of 450 RENESAS 2 Selecting Screen the Setting menu displays the Screen Setting box figure 3 23 The Screen Setting box can also be displayed by pressing Alt S keys and then the S key Font Font Style Terminal Courier Courier New Fixedsys Terminal Effects O Strikeout L Underline AaBbY yZz Color Figure 3 23 Screen Setting Box Rev 0 1 08 00 page 66 of 450 RENESAS 3 Clicking Exit in the File menu terminates interface software IPW Interface software IPW also be terminated by pressing Alt F keys and then the X key figure 3 24 Note that in the following conditions a termination request is ignored and interface software IPW will not be terminated e File transfer between the emulator and host computer e Automatic command input from a file Pile ES Setting 5 NTERFACE HS8000EIWOTSF 1 1 4 pyright C Hitachi Ltd 1996 Licensed Material of Hitachi Ltd Figure 3 24 Exit Menu Note Set communication setting and screen setting in the Setting menu immediately after IPW initiation because they are not saved at IPW termination Rev 0 1 08 00 page 67 of 450 RENESAS 3 4 3 Debugging Support Functions Interface software IPW supports the following two debugging functions e Automatic command input from a host computer file e Logging acquisition The start of automatic
289. ommand are satisfied specifies whether a pulse is output from the trigger output pin of the emulator without a break E Outputs a trigger without a break M Break occurs and outputs a trigger D Break occurs but does not output a trigger default at emulator shipment TRGB option When conditions set by the BREAK CONDITION B or TRACE _ CONDITION B command are satisfied specifies whether a pulse is output from the trigger output pin of the emulator 1 2 3 4 5 6 7 8 Outputs a trigger when the condition set by the specified channel of the BREAK CONDITION B or TRACE CONDITION B command is satisfied A Outputs a trigger when any condition set by the BREAK _ CONDITION B or TRACE CONDITION command is satisfied D Does not output a trigger default at emulator shipment Rev 0 1 08 00 page 274 of 450 RENESAS EXECUTION_MODE lt MON option gt Specifies time interval for execution status display 0 No display 1 Approximately 200 ms default at emulator shipment 2 Approximately 2 s lt MB option gt Multi break setting E Multi break is enabled D Multi break is disabled default at emulator shipment C Stores the settings as configuration information in the emulator flash memory Description e Specification Enables or disables the BREQ signal bus request signal inputs during user program execution e To disable the BREQ signal inputs during emulator operation and user program execution
290. ommand being executed is terminated and the message below is displayed According to the input reply command file reading is continued or terminated INTFC ERROR STOP COMMAND CHAIN Y N a RET Y Terminate N Continue Logging When logging acquisition is specified not only are command inputs execution results and error messages afterwards the specification displayed on the console but they are output to the file specified with FILENAME Logging is specified with gt and characters when the emulator is in command input wait state Do not insert a space between gt and characters e To overwrite FILENAME gt FILENAME RET e To add to FILENAME gt gt FILENAME RET e To terminate logging to FILENAME gt RET To overwrite the existing file enter Y when the following message is displayed INTFC ERROR FILE ALREADY EXISTS OVERWRITE Y N a RET a Y Overwrites the existing file with the new file N Terminates command execution Addresses during load save or verification cannot be logged Rev 0 1 08 00 page 69 of 450 RENESAS 3 5 Power On Procedures for Emulator The emulator power on procedures differ in each system configuration Power on the emulator in the appropriate way for the system configuration as shown below 3 5 1 Power On Procedures for LAN Interface Figure 3 25 shows the power on procedures when the LAN interface is used Rev 0 1 08 00 page 70 of 450 RENESAS
291. ommand to request data output to the host computer VERIFY load module type gt lt file name gt RET Ifa verification error occurs the address and its contents are displayed as follows lt ADDR gt lt FILE gt lt MEM gt XXXXXXXX yy y zz 7 Verification error address yy y Load module data in hexadecimal and ASCII characters zz z Memory data in hexadecimal and ASCII characters Rev 0 1 08 00 page 386 of 450 RENESAS VERIFY An offset value to be added or subtracted can be specified for the address of an SYSROF type ELF type S type or HEX type load module B VERIFY lt offset gt S lt file name gt RET If an offset is specified a verification address is calculated as follows Verification address lt load module address gt lt offset gt Note Data be verified only in the internal memory areas or areas CSO to 55 Example To verify SYSROF type load module F1 ABS against the memory contents B 1 5 RET lt ADDR gt FILE MEM 00001012 007 Rev 0 1 08 00 page 387 of 450 RENESAS Rev 0 1 08 00 page 388 of 450 RENESAS Section 9 Data Transfer from Host Computer Connected by LAN Interface 9 1 Overview The optional LAN board supports the FTP client function This function enables the following data transfer between the emulator and the host computer connected via the LAN interface e Loads a load module file in
292. ommands If S4 in DIP SW1 has been turned on to the left and the automatic system program load method is selected the E8000 system program is automatically loaded and initiated 3 8 1 Initiation on Emulator Monitor If S is entered followed by RET when the emulator is in monitor command input wait state the E8000 system program in the emulator flash memory is initiated Display at E8000 System Program Initiation START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T S RET SH7060 E8000 HS7060EDD81SF Vm n Copyright C Hitachi Ltd 1998 Licensed Material of Hitachi Ltd CONFIGURATION FILE LOADING HARD WARE REGISTER READ WRITE CHECK FIRMWARE SYSTEM LOADING EMULATOR FIRMWARE TEST RESET BY E8000 CLOCK 7 5MHz MODE 12 MD5 0 1F REMAINING EMULATION MEMORY LB 4096KB Rev 0 1 08 00 page 99 of 450 RENESAS 3 8 2 Automatic Initiation of E8000 System Program If S4 in DIP SWI has been turned on to the left and the automatic system program load method is selected the E8000 system program is automatically loaded and initiated and the emulator waits for an emulation command Display at Power On Power on E8000 MONITOR HS8000ESTO2SR Vm n Copyright C Hitachi Ltd 1995 Licensed Material of Hitachi Ltd TESTING RAM 0123 SH7060 E8000 HS7060EDD81SF Vm n Copyright C Hitachi Ltd 1998 Licensed Material of Hitachi Ltd CONFIGURATION FILE LO
293. on The emulator enables realtime emulation with a clock frequency of 60 MHz for the SH7060 with no wait states Realtime emulation consists of the following three modes e Normal mode Executes only emulation e Cycle reset mode Forcibly inputs the RES signal to the SH7060 periodically e Parallel mode Enables the user to display and modify memory and display trace information during user program execution The user can select the mode which best suits the user s debugging needs The following describes each of these modes 1 3 1 Normal Mode Normal Mode Function This mode executes only user program emulation Until a break condition is satisfied the emulator executes the user program When a hardware break condition or software break condition is satisfied the emulator stops the program execution When a number of times or sequential break for the software break condition is specified the emulator stops only for a moment the program execution every time the specified address is passed and then resumes program execution Normal Mode Specification Specifying no option with the GO command sets normal mode Rev 0 1 08 00 page 135 of 450 RENESAS 1 3 3 Cycle Reset Mode Cycle Reset Mode Function The emulator periodically inputs the RES signal to the SH7060 during realtime emulation and repeats the execution from the reset state When the RES signal is input to the SH7060 a low level pulse is output to the trigger output probe
294. on the emulator can communicate with a workstation using a LAN interface The LAN board contains connectors for both Cheapernet LOBASE2 and Ethernet 10 5 The system configuration using LAN interface is shown in figure 2 8 Cheapernet Interface Ethernet Interface E8000 station station Workstation Workstation Figure 2 8 System Configuration Using a LAN Interface Cheapernet Interface This is achieved by connecting a coaxial cable referred to as the Cheapernet thin wire cable between the BNC connector on the LAN board and the workstation Ethernet Interface This is achieved by connecting transceivers and transceiver cables between the D SUB connector on the LAN board and the workstation Rev 0 1 08 00 page 22 of 450 RENESAS 2 3 2 System Configuration Using RS 232C or Bidirectional Parallel Interface Using an RS 232C interface or a bidirectional parallel interface the E8000 station can be connected to a personal computer Figure 2 9 shows the system configuration using the RS 232C or bidirectional parallel interface RS 232C Interface Bidirectional Parallel Interface Personal computer E8000 station Figure 2 9 System Configuration Using an RS 232C or Bidirectional Parallel Interface Rev 0 1 08 00 page 23 of 450 RENESAS 2 3 3 System Configuration Using PC Interface Board The E8000 station can be connected to a personal computer via a PC interface board options ISA bus PCI bus or PC
295. on 1 the emulator measures the time from the first occasion on which break condition 2 is satisfied When this mode is specified PC breaks are invalid Rev 0 1 08 00 page 165 of 450 RENESAS Time Interval Measurement Mode 2 this mode the time intervals between the satisfaction of break condition 2 BREAK CONDITION UBC2 and break condition 1 BREAK CONDITION UBC I are added together by repeatedly executing the function of time interval measurement mode 1 This mode is selected by specifying option I2 with the GO command In time interval measurement mode 1 a break occurs after the hardware break condition 2 and then break condition 1 are satisfied However in this mode even if break condition 1 is satisfied a break does not occur When this mode is specified PC breaks are invalid Condition 2 is Condition 2 is satisfied satisfied Condition 1 is Condition 2 is satisfied satisfied Condition 2 is Condition 1 is satisfied satisfied Condition 1 is Condition 2 is satisfied satisfied BREAK key BREAK key Measurement time a b Measurement time c d Figure 1 24 Time Interval Measurement Mode 2 Rev 0 1 08 00 page 166 of 450 RENESAS Time Interval Measurement Mode 3 In this mode the time intervals between the satisfaction of BREAK_CONDITION_UBC4 and BREAK CONDITION UBC3 and between the satisfaction of BREAK CONDITION 2 and BREAK CONDITION are independently measured The time i
296. on on the number of clock cycles The time stamp is not acquired TRACE MODE 0 RET Tosetthe minimum time stamp unit to 20 ns TRACE MODE TIME 1 RET set the minimum time stamp unit to 1 6 us TRACE MODE TIME 2 RET set the minimum time stamp unit to 52 us TRACE MODE TIME 3 RET Display Displays the specified trace mode in the following format TRACE MODE RET OVFB y TIME zzzzz y break occurs when the trace buffer overflows E A break occurs D A break does not occur 77777 Minimum time stamp unit Table 7 28 Display of Minimum Time Stamp Unit Display Description CLK Acquires trace information on the number of clock cycles Does not acquire trace information on time stamp 20ns 20 nanoseconds 1 6us 1 6 microseconds 52us 52 microseconds Rev 0 1 08 00 page 366 of 450 RENESAS TRACE MODE Examples 1 Toset the minimum time stamp unit to 20 ns TMO TIME 1 RET 2 To display the specified contents TMO RET OVFB D TIME 20ns Rev 0 1 08 00 page 367 of 450 RENESAS TRACE_SEARCH 7 2 44 TRACE SEARCH TS Searches for and displays trace information Command Format e Searchand TRACE _SEARCH A lt condition gt A lt condition gt display start bus cycle pointer gt lt end bus cycle pointer gt L RET lt condition gt Condition governing trace information to be searched for or displayed If this is o
297. on the 8000 station s rear panel Confirm that the shape of the trace cable plug matches that of the station to EV chip board interface connector before connecting Also note which trace cable is connected to which E8000 station connector so that the other end of the trace cable is connected to the matching connector number on the EV chip board After the connection is completed alternately tighten the screws on both sides of the trace cable to prevent the upper or lower side of the trace cable from lifting off the connector Figure 3 3 shows how to correctly connect the trace cables to the E8000 station connectors Rev 0 1 08 00 page 32 of 450 RENESAS CN1 red CN4 black Colors of the station to EV chip board interface connectors red black yellow and blue seals on the panel Colors of the screws on the trace cables red CN2 yellow CN1 red CN3 blue CN4 black CN2 yellow CN3 blue Figure 3 3 Connecting Trace Cables to the E8000 Station Rev 0 1 08 00 page 33 of 450 RENESAS Note At shipment the trace cable screws colored to prevent an insertion error red CN2 yellow CN3 blue CN4 black In addition the trace cables CN1 and CN4 and CN2 and CN3 to be connected to the E8000 station are bound into two respective bundles and the opposite ends of the trace cables CN1 CN2 CN3 and CN4 to be connected to the EV chip board are bound into a single bundle Check the number
298. ondition cannot be set with the PERFORMANCE ANALYSISI command If necessary cancel conditions set with the above commands before setting the break conditions Examples 1 To measure the execution time of subroutines SUBB H 5000 to H 7FEO SUBD H 20100 to H 2FFFF and initialize the performance measurement data PA2 SUBB 5000 7FEO 12 RET PA7 SUBD 20100 2FFFF SC 30000 30060 RET PA I RET Rev 0 1 08 00 page 320 of 450 RENESAS PERFORMANCE_ANALYSIS 2 To display addresses of the set subroutines PA A RET NO NAME MODE ADDRESS 1 SUBA I1 00000100 00001FF0 COUNT D 00000 2 SUBB I2 00005000 00007FF0 3 SUBC 00010000 0001008 00020000 00020098 4 5 SUBE 00002030 0000207F lt 55 gt FFFFFF00 FFFFFF7F DAT 7 SUBD SC 00020100 0002FFFF lt CALL SUB gt 00030000 00030060 TOTAL RUN TIME D 0001H 00M 40S 022917US 000NS 3 To display execution time ratio in graph form PA RET NO NAME MODE RATE 0 10 20 30 40 50 60 70 80 90 100 1 5 Il D 10 0 3 2 SUBB I2 D 20 0 w 3 SUBC D 20 0 xxx 4 5 SUBD AC 115 0 7 SUBE SC D 20 0 TOTAL RUN TIME D 0001H 00M 408 02291708 000NS Rev 0 1 08 00 page 321 of 450 RENESAS PERFORMANCE ANALYSIS 4 To display execution time and count in numerical form PA NO 1 V MODE RATE RUN TIME SUBA Il D 10 0
299. ondition is satisfied An instruction pointer begins with an asterisk to differentiate it from a bus cycle pointer Although the pointer usually has a negative value D xxxxxx if a delay count condition is specified as a break or trace condition the delay will be indicated as a positive value D xxxxxx b Instruction address c Instruction mnemonic d Instruction operand To display trace information in bus cycle units uses the following format Time Stamp Display BP AB DB MA RW STS NMI RES BRQ VCC PRB TIME STAMP D Xxxxxx XXXXXXXX XXXXXXXX XXX x xxxHxxMxxSxxxxxxUxxxN b c D g b i k Clock Cycle Display BP AB DB MA RW STS NMI RES VCC PRB CLK D xxxxxx XXXXXXXX XXXXXXXX XXX x XXX x x x x XXXX Bus cycle pointer Number of bus cycles from an instruction where a delay count condition is satisfied In bus cycles which prefetch instructions the instruction mnemonics and instruction addresses are displayed as described above When two instructions are executed in one bus cycle both mnemonics are displayed along with the address of the first instruction Although the pointer usually has a negative value D xxxxxx when a delay count condition is specified as a break or trace condition the delay will be indicated as a positive value D xxxxxx b Address bus value Rev 0 1 08 00 page 347 of 450 RENESAS TRACE c
300. option in mode I1 or I2 g Count value displayed only when the count value is set with the COUNT option in mode I1 or I2 h Start address range in subroutine execution time measurement mode 3 i End address range subroutine execution time measurement mode 3 j Accessed area address range in area access count measurement mode k Access type of accessed area in area access count measurement mode DAT Execution cycle 1 Called subroutine address range in subroutine call count measurement mode m Total run time Rev 0 1 08 00 page 318 of 450 RENESAS PERFORMANCE_ANALYSIS Execution time and count displayed as numerical values Option V is specified PERFORMANCE_ANALYSIS V RET NO MODE RATE RUN TIME E COUNT 1 SUBA 12 D 10 0 D 0000H 00M 05S 001000US 250NS 00005 a b c d e f MAX D 0000H 00M 05S 001000US 250NS MIN D 0000H 00M 05S 001000US 250NS g h AVE D 0000H 00M 058 001000US 250NS 2 SUBB D 20 0 D 0000H 00M 108 010305US 500NS 00010 AVE _ D 0000H 00M 05S 001000US 250NS 3 SUBC 13 D 20 0 D 0000H 00M 108 010305US 500NS 00010 AVE _ D 0000H 00M 05S 001000US 250NS 4 5 SUBD AC D 10 0 D 0000H 00M 05S 001000US 250NS lt ACCESS gt D 00005 T7 SUBE SC D 20 0 D 0000H 00M 10S 010305US 500NS lt CALL SUB gt D 00010 TOTAL RUN TIME D 0001H 00M 508 000020US 250NS 0 a Subroutine number b Subroutine name up to 8 characters are displayed c Time meas
301. or SH7060 operating mode Rev 0 1 08 00 page 187 of 450 RENESAS Table 3 1 SH7060 Operating Mode Pin Setting cso Operating Internal Bus Mode Mode Name FWE MD5 MD4 MD MD1 MDO ROM Width Bits 0 Single chip 0 Used to select the 0 0 0 Enabled mode clock operating mode 1 MCU mode1 0 0 0 1 Enabled 8 16 32 2 MCU mode2 0 0 1 0 Disabled 32 3 MCU mode3 0 0 1 1 Disabled 16 4 MCU mode4 0 1 0 0 Disabled 8 FO User program 1 0 0 0 Enabled mode single chip 1 User program 1 0 0 1 Enabled 8 16 32 mode F2 Boot mode 1 0 1 0 Enabled single chip F3 Boot mode 1 0 1 1 Enabled 8 16 32 F7 PROM mode Oor 1 1 1 Enabled writer mode 1 Other than Reserved the above must not be set Notes 1 An operating mode specified using the MODE command will be valid only after the emulator is re initiated Therefore the emulator must be reset after specifying an operating mode At this time emulator specifications such as emulation memory attributes and breakpoint settings will not be saved 2 This emulator does not support operating modes FO F1 F2 and F7 Rev 0 1 08 00 page 188 of 450 RENESAS Table 3 2 Clock Operating Mode Setting Clock Input Initial Value Compared with Clock Pin Setting Output When Input Clock is 1 PLL PLL Initial Initial Cir Cir State of State Mode Supply Out cuit cuit CKIO
302. or system program start message Vm n indicates the version number SH7060 E8000 HS7 O60EDD81SF Vm n Copyright C Hitachi LTD 1998 Licensed Material o CONFIGURATION FILE Hitachi Ltd OADING HARDWARE REGISTER R EAD WRITE CHECK FIRMWARE SYSTEM LOADING EMULATOR FIRMWARE T EST RESET BY E8000 CLOCK 7 5MHz MODE xx MD5 0 xx FAILED AT xxxx REMAINING EMULATION MEMORY LB 4096KB a f b c d e f g h i 0 6 Configuration file is being loaded If an invalid configuration file is assigned the following message is displayed SASINVALID CONFIGURATION FILE If no configuration file is contained in the memory the following message is displayed 55 CONFIGURATION FILE NOT FOUND Reinstall the configuration file c The emulator control registers are being checked If an error occurs one of the following messages is displayed INVALID DCONT BOARD DEVICE CONTROL BOARD DISCONNECTION EVACHIP BOARD DISCONNECTION xxx REGISTER ERROR W DATA xxxx R DATA xxxx G ii ii v SHARED RAM ERROR ADDR W DATA R DATA xxxxxxxx v BxTBM ERROR ADDR xxxxxx W DATA R DATA xxxxxxxx FIRM RAM ERROR ADDR W DATA R
303. ost computer connected via the RS 232C interface E 3 Power on the E8000 station Internal system test is Kwa executed ON state OFF state 4 Initiation messages are displayed Side view ot SWI ON OFF states Test result OK No 5 Emulator monitor command input wait state 5 Error message is displayed Figure 3 26 Power On Procedures for RS 232C Interface Refer to section 3 6 1 Emulator Monitor Initiation for details on operations after emulator power on and section 3 8 E8000 System Program Initiation for details on emulator system initiation Rev 0 1 08 00 page 77 of 450 RENESAS 3 6 Emulator Monitor Commands 3 6 1 Emulator Monitor Initiation The emulator supports the four monitor commands listed in table 3 8 These commands initiate the E8000 system program manage flash memory set an IP address for LAN interface and execute the diagnostic program After turned on the emulator displays the following monitor initiation message and waits for an emulator monitor command input Display Message E8000 MONITOR HS8000ESTO2SR Vm n Copyright C Hitachi Ltd 1995 Licensed Material of Hitachi Ltd TESTING RAM 0123 START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S FIL T _ Table 3 8 Emulator Monitor Commands Command Function S E8000 system program initiation F Flash memory management tool initiation L
304. otection SG Standard emulation memory in emulator with access inhibition W Wirite protection to memory G Access inhibition to memory Description e Specification Standard emulation memory allocation 1 Data can be allocated to the CSO space in 256 kbyte units Write prohibited SW and access prohibited SG are also possible The start address is rounded down to 0 or a multiple of H 40000 and the end address is rounded up to a multiple of H 40000 minus one Areas with an 1 Mbyte boundary including the allocated standard memory are allocated in units of 256 kbytes only 0 H FFFFF S RET Standard emulation memory allocation 2 Allocates standard emulation memory to areas CSO to CS3 in 1 Mbyte units The emulation memory can be write protected and access inhibited by specifying SW and SG as the memory attribute The start address is rounded down to 0 or a multiple of H 100000 and the end address is rounded up to a multiple of H 100000 minus one MAP 400000 H 4FFFFF S RET Rev 0 1 08 00 page 296 of 450 RENESAS After allocation the size of the unused 1 Mbyte or 256 kbyte units standard emulation memory is displayed REMAINING EMULATION MEMORY LB xxxxKB SB0 3zyyyyK B SB4 7 zzzzKB xxxx Unused size of standard emulation memory LBO to LB11 block 1 Mbyte units yyyy Unused size of standard emulation memory 5 0 to SB3 block 256 kbyte units zzzz Unused size of standard emulation me
305. ous DRAM LBD13 16 Mbytes H 4D000000 H 4DFFFFFF 16 Mbytes H CD000000 H CDFFFFFF LBD14 16 Mbytes H 4E000000 H 4EFFFFFF 16 Mbytes H CE000000 H CEFFFFFF LBD15 16 Mbytes H AF000000 H 4FFFFFFF 16 Mbytes H CF000000 H CFFFFFFF RENESAS Rev 0 1 08 00 page 199 of 450 3 3 Low Power consumption Mode Sleep Software Standby and Hardware Standby For reduced power consumption the SH7060 has sleep software standby and hardware standby modes 3 3 1 Hardware Standby Mode The hardware standby mode is switched by low level signal input to the HSTBY pin However since the HSTBY signal from the user system is not input to the SH7060 in the emulator the emulator does not support this mode 3 3 2 Sleep and Software Standby Modes The sleep and software standby modes are switched using the SLEEP instruction These modes can be cleared with either the normal clearing function or with the break condition satisfaction including BREAK or CTRL C key input and the program breaks Trace information is not acquired in these modes Notes 1 When restarting after a break the user program will restart at the instruction following the SLEEP instruction 2 During sleep mode if the user accesses or modifies the internal RAM in parallel mode the sleep mode is cleared and the user program execution continues from the instruction following the SLEEP instruction Rev 0 1 08 00 page 200 of 450 RENESAS 3 4 Interrupts During emulation the
306. ove settings 6 Enter Y RET to save the settings Rev 0 1 08 00 page 104 of 450 Display Message START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T F RET FM FM gt LH RET NO HOST NAME IP ADDRESS NO HOST 01 02 03 04 05 06 07 08 09 E8000 IP ADDRESS 128 1 1 1 PLEASE SELECT NO 1 9 L E Q X _ PLEASE SELECT NO 1 9 L E Q X 1 RET 01 HOST NAME HOST A HITACHI RET 01 IP ADDRESS 128 1 1 1 128 1 1 10 RET PLEASE SELECT NO 1 9 L E Q X _ PLEASE SELECT NO 1 9 L E Q X E RET LAN CONFIGURATION FILE WRITE OK Y N CONFIGURATION FILE WRITE OK Y N Y RET FM RENESAS 7 Enter RET to terminate the flash FM gt Q RET memory management tool and enter the monitor command input wait START 28000 S START E8000 state F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T _ 8 Enter S RET to re initiate the S F L T 8 RET emulator The emulator is re initiated and waits for an emulation command SH7060 E8000 HS7060EDD81SF Vm n Copyright C Hitachi Ltd 1998 Licensed Material of Hitachi Ltd CONFIGURATION FILE LOADING HARDWARE REGISTER READ WRITE CHECK FIRMWARE SYSTEM LOADING EMULATOR FIRMWARE TEST RESET BY E8000 CLOCK 7 5 2 ODE 11 MD5 0 3F REMAINING EMULATION MEMORY LB 4096KB
307. own in table 1 6 Table 1 6 Maximum Number of Measurable Subroutines Measurement Mode Maximum Number of Measurable Subroutines Time measurement mode 1 8 Time measurement mode 2 Access count to specified area 8 Time measurement mode 3 4 4 Number of nested subroutine calls 4 The measurement results are displayed in the following three ways e Numerical ratio of total execution time and specified subroutine execution time e Bar graph indicating the ratio of total execution time and specified subroutine execution time e Numerical value of specified subroutine execution time For details on the PERFORMANCE_ANALYSIS command refer to section 7 2 30 PERFORMANCE ANALYSIS Rev 0 1 08 00 page 168 of 450 RENESAS Time Measurement Mode 1 The execution time and count of the subroutine specified by the start address and end address e Execution count measurement This is counted up in the end address every time the start address of the specified subroutine is passed e Execution time measurement The measurement result does not include the execution time of the subroutine called by the specified subroutine between the start address and end address gee Start address m ime is measured End address Figure 1 26 Time Measurement Mode 1 Rev 0 1 08 00 page 169 of 450 RENESAS Time Measurement Mode 2 execution time and count of the subroutine specified by the start address and end address
308. plays the current clock signal CLOCK RET CLOCK lt used clock gt lt used clock gt 7MHz E8000 internal CLOCK 7 5 MHz 15MHz E8000 internal CLOCK 15 MHz USER User system clock X TAL Crystal oscillator clock Rev 0 1 08 00 page 258 of 450 RENESAS CLOCK Note If U user system clock is specified and the following clock signal problem occurs the E8000 system program may terminate In this case 6 USER SYSTEM NOT READY is displayed The E8000 system program must be quit with the QUIT command and restarted e User system clock signal is not being received even when U is specified and the user system clock is being used Vcc is supplied with no problem When operating with the FILL command in the break area if the user system clock signal is not received the user must cancel commands with CTRL C terminate the system program with the QUIT command and restart the E8000 system program Examples 1 To use the user system clock signal CL U RET RESET BY E8000 CLOCK USER 2 To use the emulator internal clock signal 15 MHz CL 15 RET RESET BY E8000 CLOCK 15 MHz 3 To display the current clock signal CL RET CLOCK 15 MHz Rev 0 1 08 00 page 259 of 450 RENESAS CONFIGURATION 7 2 12 CONFIGURATION Saves and restores configuration information CNF and displays a list Command Format e Saving CONFIGURATIONA lt
309. puter interface functions as listed in tables 1 2 and 1 3 respectively Table 1 2 Emulation Functions Reference Command Type Command Function Section Realtime GO Performs realtime emulation in the 7 2 21 emulation following cases The operating frequency is 60 MHz at max e Executes until a hardware or software break condition is satisfied or until the CTRL C or BREAK key is pressed e Cycle reset mode Inputs the RES signal to the SH7060 periodically This mode is effective to observe waveforms after reset e Parallel mode Displays trace data and modifies memory contents during emulation EXECUTION Specifies execution mode 7 2 19 MODE Rev 0 1 08 00 page 126 of 450 RENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Break condition BREAK Sets hardware break conditions 1 7 2 8 setting CONDITION 4 Normal break Execution is forcibly UBC stopped when the specified conditions are satisfied four points Address bus value or data bus value PC program counter value CPU DMA Read write condition Pass count specification for BREAK CONDITION UBCt1 only e Mask specification for address and data conditions Bit by bit specification is enabled for address PC or data conditions e Specification of the satisfaction sequence up to four points BREAK Sets hardware break conditions 2 7 2 7 CONDITION 4 Execution is forcibl
310. puters office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems medical equipment or systems for life support e g artificial life support devices or systems surgical implantations or healthcare intervention e g excision etc and any other applications or purposes that pose a direct threat to human life You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunc
311. r the E8000 system program must be installed in the emulator flash memory Load the E8000 system program to flash memory with the system program writing file or with the flash memory management tool using the emulator monitor commands Automatic System Program Load by Bidirectional Parallel Interface If the emulator is connected to the host computer via the bidirectional parallel interface and the E8000 system disk is inserted in drive A of the host computer the E8000 system program can be automatically loaded with the system program writing file SETUP CC in the following procedures It takes approximately one minute Operations 1 Initiate IPW in the E8000 system floppy disk 2 Power on the emulator For details on the power on procedures refer to section 3 5 2 Power On Procedures for RS 232C Interface 3 Emulator monitor command prompt 4 Enter lt A SETUP CC RET in the monitor command input wait state 5 After the system program writing file completes loading the system program the emulator re enters the monitor command input wait state 6 Installation is completed Rev 0 1 08 00 page 92 of 450 Display Message E8000 ART E8000 ASH EMORY 5 5 5 1 DIAGNOS L T S F L T lt A SETUP CC RET EST START E8000 S START E8000 F
312. r BREAK 1001010 RET to terminate the GO command immediately before executing the instruction at address H 1001010 Restart program execution from address H 1001000 This can be done in two Ways one is to first set the program counter to H 1001000 then enter the GO command to execute the program and the other is to enter the start address directly The GO command execution terminates immediately before the instruction at address H 1001010 is executed The data shown on the right is displayed BREAKPOINT shows that the GO command execution was terminated due to a software breakpoint Display Message BREAK 1001010 RET PC 1001000 RET GO RET or GO 1001000 RET PC 01001010 SR 000000F1 000000000000 111100 GBR 00000000 VBR 00000000 00000000 MACI 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 0000000 00000001 00000002 00000001 OFOFFFFC 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0100FFFC DSR 00000000 k amp k amp kk amp kkkkk k COOB A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 00S 000020US 800NS BREAKPOINT Rev 0 1 08 00 page 111 of 450 RENESAS 4 2 7 Executing a Single Step A single step can be executed using the single step function by the following procedures
313. r and clock status SH7060 Operating Status When executing the program with the GO command the emulator monitors the operating status When the status changes the operating status display is updated The update interval can be selected from no display 200 ms and 2 s with the MON option of the EXECUTION_MODE command With this function the user can observe the progress of the program The operating status display and its meaning are shown in table 1 8 For details refer to the description on operating status display in section 7 2 21 GO Table 1 8 Operating Status Display Display Meaning RUNNING The user program execution is initiated This message is displayed once when GO command execution is started or when parallel mode is canceled Note that this message will be deleted when PC xxxxxxxx is displayed PC XXXXXXXX During user program execution the program fetch address is displayed according to the time interval specified with the MON option in the EXECUTION_MODE command VCC DOWN User system Vcc power voltage is 2 6 V or less The MCU is not operating correctly Displayed only when the user clock is selected RESET The MCU has been reset RES signal is low WAIT A WAIT signal is low The address bus value is displayed Not displayed during refresh cycles TOUT A The address bus value is displayed The MCU stops for 1 28 ms or longer
314. race Condition Satisfaction When the trigger output is specified using the TRGB and TRGU options of the EXECUTION_MODE command a low level pulse is output from the trigger output probe at bus cycles corresponding to the specified condition The trigger signal is output from the end of the corresponding bus cycle until the end of the next bus cycle If the conditions are satisfied in consecutive bus cycles the trigger output remains low Hardware Break Condition Satisfaction During emulation a low level pulse is output from the trigger output pin at the end of the bus cycle during which the hardware break condition is satisfied The trigger signal is output from the end of the corresponding bus cycle until the end of the next bus cycle If the conditions are satisfied in consecutive bus cycles the trigger output remains low Note No pulse is output from the trigger output probe when a software break condition is satisfied In addition a low level pulse output timing and pulse width differ depending on each condition CLK Address TRIG when the break controller condition is satisfied TRIG when the hardware break condition or trace condition 3 1 bus cycle is satisfied Three states External bus clock 60 MHz Figure 1 29 Pulse Output Timing Rev 0 1 08 00 page 173 of 450 RENESAS 1 9 SH7060 Control and Status Check The emulator is capable of switching the clock signal supplied to the SH7060 outputting strobe signa
315. re configuration information MODE C RET E8000 MODE MD5 0 00 2 RET CONFIGURATION STORE OK Y N Y RET START E8000 S START E8000 MEMORY TOOL LAN PARAMETER TART DIAGNOSTIC TEST S F L T _ 1 tn 2 To display the SH7060 operating mode in the emulator MODE RET MODE 02 MD5 0 3F Rev 0 1 08 00 page 308 of 450 RENESAS 7 2 28 MOVE MV Transfers memory contents Command Format Movedata MOVEA cstart address gt A lt end address gt A lt number of bytes A lt destination address gt RET lt start address gt Start address of source area lt end address gt End address of source area lt number of bytes gt The number of bytes to be transferred lt destination address gt Start address of destination Description e Move data Transfers the contents of the memory area specified with lt start address gt and lt end address gt or lt number of bytes gt to an address range starting with lt destination address gt Verifies the transfer If a verification error occurs FAILED xxxxxxxx WRITE yy y READ zz z 18 displayed Address of error Write data hexadecimal and ASCII characters zz z Read data hexadecimal and ASCII characters If areas other than the internal memory areas or areas CSO to CS5 are included in the desti
316. rectly passed g System g defect System defect System defect Correct data Correct protocol and transfer between baud rate for transfer emulator and between emulator host computer and host computer Host system Use correct connected and protocol and set up baud rate correctly Connect it correctly Figure 5 1 Troubleshooting PAD cont Rev 0 1 08 00 page 216 of 450 RENESAS Section 6 Command Input and Display 6 1 Command Syntax 6 1 1 Command Input Format The emulator command format is as follows lt command gt A lt parameter gt lt option gt RET A Space RET RET key Note that each command can be specified in abbreviated form to reduce keyboard operations 6 1 2 Help Function All emulator commands can be displayed by entering the HELP command Any command input format can be displayed by specifying the command name as a parameter of the HELP command To display all emulator commands HELP RET lt All commands are displayed in their full names and abbreviations gt e To display a command input format HELPA lt command name gt RET lt A command input format is displayed gt In this example an abbreviation of the command name can be entered as lt command name gt Rev 0 1 08 00 page 217 of 450 RENESAS 6 1 3 Word Definition Constants or file names can be entered as command parameters or options Spaces A or commas can be
317. ress is not executed After the GO command is executed the contents at the specified address will be replaced with a break instruction and the user program will be executed When the user program execution stops the break instruction will be replaced again with the contents at the specified address Therefore the contents at the specified address can be accessed immediately after the user program execution using the DISASSEMBLE command or the DUMP command However note that a break instruction will be read if the memory contents at the break address are accessed in the parallel mode No software break must be specified immediately after a delayed branch instruction at a slot instruction If specified a slot invalid instruction interrupt will occur at the branch instruction execution and a break will not occur Rev 0 1 08 00 page 150 of 450 RENESAS The software break be performed in the following two ways e Normal break e Sequential break Normal Break A break occurs before executing the breakpoint instruction specified with the BREAK command At this time the following can be specified e Number of break points 255 points max Number of times the break condition is satisfied A break occurs after executing the breakpoint instruction a specified number of times The maximum number to specify is 65 535 H FFFF User program Program flow gt Instruction A break occurs before the instr
318. ring execution time measurement by the PERFORMANCE_ANALYSIS command Delete the PERFORMANCE_ANALYSIS command setting and change the minimum unit Table 10 2 Host I O Error Codes Error Code Error Name Description and Solution D1 Parity error The parity bit specified with the DIP switch must match the host computer specifications D2 Overrun error The emulator control method is not recognized by the host computer D3 Framing error The baud rate and stop bit specified with the DIP switch must match the host computer specifications D4 Load module format The load module format of the transferred file is incorrect error Check the file contents DC Timeout error Check the connection between the emulator and host computer Also check the operation status of the host computer Rev 0 1 08 00 page 424 of 450 RENESAS The E8000 system program outputs LAN I O error messages in the format below Table 10 3 lists the error messages with brief descriptions LAN I O ERROR E0xx socket library error nn lt error message gt xx Process in which error occurred see table 10 4 nn Error code lt error message gt Refer to table 10 3 If an error message other than that listed in table 10 3 is displayed refer to the description for the host computer error messages Table 10 3 LAN I O Error Messages Error No Error Message Description 01 not listen The socket cannot be
319. rminated this command setting is validated and trace information acquisition starts In this case conditions that have been satisfied are all cleared Old trace information is also cleared At this time 81 TRACE CONDITION RESET is displayed Display Displays specified conditions as follows In addition to condition numbers character strings that were input for specifying conditions will be displayed as they were input If no trace condition is specified a blank is displayed TRACE CONDITION RET 1 A 1000 2000 R 2 5 5000 53FF ST TCA3 A 3000 4000 R 4 A 6000 7000 R 5 6 TCA7 TCA8 e Cancellation Cancels conditions specified with the TRACE_CONDITION_A command TRACE CONDITION A RET Notes 1 When conditions have already been set with the BREAK_CONDITION_A B command the same command number cannot be set For example when a condition has been set with the BREAK CONDITION 1 command the condition cannot be set with the TRACE CONDITION A1 command If necessary cancel conditions set with the above commands before setting the break conditions When conditions have already been set with the BREAK CONDITION or PERFORMANCE ANALYSIS command the same command number cannot be set For example when a condition has been set with the BREAK CONDITION or PERFORMANCE ANALYSIS command the condition cannot be set with the TRACE CONDITION command If necessary cancel
320. roduct KEEP the user s manual handy for future reference Do not attempt to use the emulator product until you fully understand its mechanism DEFINITION OF SIGNAL WORDS A This is the safety alert symbol It is used to alert you to potential personal injury hazards Obey all safety messages that follow this symbol to avoid possible injury or death DANGER DANGER indicates an imminently hazardous situation which if not avoided will result in death or serious injury A WARNING WARNING indicates a potentially hazardous situation which if not avoided could result in death or serious injury A CAUTION CAUTION indicates a potentially hazardous situation which if not avoided may result in minor or moderate injury CAUTION CAUTION used without the safety alert symbol indicates a potentially hazardous situation which if not avoided may result in property damage NOTE emphasizes essential information Rev 0 1 08 00 page IV of VIII RENESAS A WARNING Observe the precautions listed below Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator product or will result in PERSONAL INJURY The USER PROGRAM will be LOST Do not repair or remodel the emulator product by yourself for electric shock prevention and quality assurance Always switch OFF the E8000 emulator and user system before connecting or disconnecting any CABLES or PARTS Always before connecting
321. rver to connect the host computer to the emulator Before the FTP server is initiated the host name and IP address of the host computer must be stored in the emulator flash memory The following describes how to specify the host name and IP address When the F command flash memory management tool initiation is entered while the emulator waits for an emulator monitor command the emulator displays prompt FM gt and waits for a flash memory management tool command refer to table 3 9 START E8000 S START E8000 F FLASH MEMORY TOOL L SET LAN PARAMETER T START DIAGNOSTIC TEST S F L T F RET FM gt Next enter the LH command and the following message is displayed FM gt LH RET NO lt HOSTNAME gt lt IPADDRESS gt HOSTNAME IP ADDRESS gt 01 XXX XXX XXX XXX 02 XXXXXX XXX XXX XXX XXX 03 XXXXXX XXX XXX XXX XXX 04 XXXXXX XXX XXX XXX XXX 05 XXXXXX XXX XXX XXX XXX 06 XXXXXX XXX XXX XXX XXX 07 XXXXXX XXX XXX XXX XXX 08 XXXXXX XXX XXX XXX XXX 09 XXXXXX XXX XXX XXX XXX E8000 IP ADDRESS xxx XXX XXX XXX PLEASE SELECT NO 1 9 L E Q X Rev 0 1 08 00 page 74 of 450 RENESAS Up to nine pairs of host names and IP addresses can be specified Input a number from 1 to 9 The emulator prompts the host name Enter a name with up to 15 characters After that the emulator prompts the IP address PLEASE SELECT NO 1 9 L E Q X 1 RET 01 HOST NAME xxxxxx name of host computer RET 01 IP ADDRESS xxx xxx xx
322. ry contents from addresses H 1002000 to H 100200F in parallel mode Enter MEMORY 1001019 FD RET to modify the memory contents of address H 1001019 to H FD in parallel mode To exit from parallel mode enter END RET To terminate program execution enter the BREAK key Display Message GO 1001000 RET Moves to parallel mode DUMP 1002000 100200F RET Dump display MEMORY 1001019 FD RET END RET PC 22 BREAK PC 01001016 SR 000000F1 000000000000 IIII00 T GBR 00000000 VBR 00000000 00000000 MACI 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000000 00000059 00000090 00000059 0100FFD4 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 O100FFFC DSR 00000000 KAK KAk k k k k k k k k k k kkk k k kk k AOG 00 A0 00000000 0 00000000 X0 00000000 0 00000000 A1G 00 A1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 01M 39S 174372US 800NS KEY XXXXXXXX XXXXXXXX Rev 0 1 08 00 page 119 of 450 RENESAS 6 Enter DISASSEMBLE 1001000 DISASSEMBLE 1001000 100101F RET 100101F RET to confirm that the program has been changed by memory modification in parallel mode ADDR CODE NEMONIC OPERAND 01001000 OV OA RO 01001002 E101
323. s 1 byte units E Even address 1 byte units Default 1 byte units N No verification Description Display modification If data is omitted the emulator displays memory contents at the specified address and enters input wait state of the modification data The user can then enter data and modify memory contents this process can then be repeated for the next address If option N is not specified the data to be modified is read and verified Memory contents are displayed and modified data is input in the following format Notes 1 The internal I O areas are not always verified 2 When no verification is specified and the contents in the reserved area are modified a verify error occurs because the value which has read the modified data is undefined Rev 0 1 08 00 page 303 of 450 RENESAS MEMORY lt address gt RET XXXXXXXX 2 lt data gt lt option gt RET Address of data to be modified yyyyyyyy Memory contents displayed in modification units lt data gt New data Data length is considered to be the same as that of the data displayed on the screen If only the RET key is pressed data is not modified and the next address is displayed lt option gt The unit of display or modification can be changed or the address can be incremented or decremented When lt data gt is specified lt option gt is processed after the data is modified When
324. s specified with the BREAK or BREAK_SEQUENCE command and hardware break conditions specified with the BREAK_CONDITION_A B C or BREAK CONDITION UBC command are invalid during STEP OVER command execution Interrupts are not accepted during STEP OVER command execution unless the I option is specified If a break occurs during subroutine execution the address and instruction mnemonics of the instruction calling the subroutine are displayed Rev 0 1 08 00 page 342 of 450 RENESAS STEP OVER Table 7 22 Causes of STEP OVER Command Termination Message Termination Cause BREAK KEY The CTRL C keys were pressed for forcible termination ILLEGAL INSTRUCTION A break instruction H 0000 was executed ONE STEP END Single step execution was completed RESET BY E8000 The emulator forcibly terminates program execution with the RESET signal because an error occurs in the user system SUBROUTINE END The called subroutine has finished execution Notes 1 When a delayed branch instruction is executed with the STEP OVER command execution stops at the instruction immediately following a delayed branch instruction Therefore two instruction mnemonics are displayed 2 Donotuse this command when program execution may not return from a subroutine called by a BSR JSR BSRF or TRAPA instruction Example To execute the program one step at a time starting from the address given by the current PC and without
325. s the specified count and the pass count as shown on the right The pass count is cleared when the GO command is entered again Rev 0 1 08 00 page 116 of 450 Display Message BREAK 1001012 5 RET GO 1001000 RET 01001012 SR 000000F0 000000000000 IIII00 GBR 00000000 VBR 00000000 00000000 MACL 00000000 PR 00000000 RS 00000000 RE 00000000 MOD 00000000 RO 7 00000005 00000008 00000000 00000008 0100FFE8 00000000 00000000 00000000 R8 15 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0100 DSR 00000000 A0G 00 0 00000000 0 00000000 0 00000000 0 00000000 A1G 00 A1 00000000 1 00000000 1 00000000 1 00000000 RUN TIME D 0000H 00M 00S 000126US 400NS BREAKPOINT BREAK RET lt ADDR gt lt CNT gt lt PASS gt 01001012 0005 0005 RENESAS 4 3 2 Conditional Trace The acquisition of trace information during program execution can be limited by the following procedures Operations Display Message Enter BREAK RET to BREAK RET 3 4 cancel the breakpoint set in the example of section 4 3 1 Break with Pass Count Condition Enter CONDITION Al A 1001010 1001014 R RET TRACE CONDITION 1 1001010 1001014 R RET to get trace information only while the program counter is between addresses H 1001010 and H 1001014 Enter GO 1001000 RET to GO 1001000 RET start exe
326. s H 1FO000000 H 1 FFFFFFF 16 Mbytes H 9F000000 H 9FFFFFFF Rev 0 1 08 00 page 194 of 450 RENESAS Table 3 3 Memory Blocks Extended Mode without ROM cont Register EMRD Bit Capacity Address Space Type Memory Type LBDO 16 Mbytes H 40000000 H 40FFFFFF CS4 DRAM 16 Mbytes H C0000000 H COFFFFFF synchronous DRAM LBD1 16 Mbytes H 41000000 H 41FFFFFF 16 Mbytes H C1000000 H C1FFFFFF LBD2 16 Mbytes H 42000000 H 42FFFFFF 16 Mbytes H C2000000 H C2FFFFFF LBD3 16 Mbytes H 43000000 H 43FFFFFF 16 Mbytes H C3000000 H C3FFFFFF LBD4 16 Mbytes H 44000000 H 44FFFFFF CS5 DRAM 16 Mbytes H C4000000 H C4FFFFFF synchronous DRAM LBD5 16 Mbytes H 45000000 H 45FFFFFF 16 Mbytes H C5000000 H C5FFFFFF LBD6 16 Mbytes H 46000000 H 46FFFFFF 16 Mbytes H C6000000 H C6FFFFFF LBD7 16 Mbytes H 47000000 H 47FFFFFF 16 Mbytes H C7000000 H C7FFFFFF LBD8 16 Mbytes H 48000000 H 48FFFFFF CS10 DRAM 16 Mbytes H C8000000 H C8FFFFFF synchronous DRAM LBD9 16 Mbytes H 49000000 H 49FFFFFF 16 Mbytes H C9000000 H C9FFFFFF LBD10 16 Mbytes H 4A000000 H 4AFFFFFF 16 Mbytes H CA000000 H CAFFFFFF LBD11 16 Mbytes H 4B000000 H 4BFFFFFF 16 Mbytes H CB000000 H CBFFFFFF LBD12 16 Mbytes H 4C000000 H ACFFFFFF CS11 DRAM 16 Mbytes H CC000000 H CCFFFFFF synchronous DRAM LBD13 16 Mbytes H 4D000000 H 4DFFFFFF 16 Mbytes H CD000000 H CDFFFFFF LBD14 16 Mbytes H 4E000000 H 4EFFFFFFF 16
327. s and displays the SH7060 operating Unusable mode MOVE Transfers memory contents Unusable MOVE TO RAM Moves ROM contents to standard emulation Unusable memory PERFORMANCE _ Specifies cancels initializes and displays Unusable ANALYSIS performance analysis data QUIT Terminates E8000 system program Unusable RADIX Specifies and displays radix for numeric input Usable REGISTER Displays register contents Unusable RESET Resets SH7060 Unusable RESULT Displays execution results Unusable STATUS Displays emulator execution status Usable STEP Performs single step execution Unusable STEP INFORMATION Specifies and displays information during Unusable single step execution STEP OVER Performs single step execution except for Unusable subroutines TRACE Displays trace buffer contents Usable TRACE CONDITION _ Specifies displays and cancels trace Usable acquisition conditions TRACE_DISPLAY_ Specifies and displays trace information Usable MODE display mode TRACE_MODE Specifies and displays trace information Unusable acquisition mode TRACE_SEARCH Searches for and displays trace information Usable Rev 0 1 08 00 page 222 of 450 RENESAS 7 2 Emulation Commands This section provides details of emulation commands in the format shown in figure 7 1 Command Name No Command Abbr Function Command Format Function 1 Command input format Function 2 Command input format parameter 1
328. sed during testing for the device control board the test is aborted f The RES signal is input to the MCU and the specified clock type is displayed Note f is not executed if an error has occurred in step c d or e g The MCU operating mode on the emulator and the status of user system mode selection pins h MCU pins are being checked For details refer to section 7 2 10 CHECK Note h is not executed if an error has occurred in step c d or e 1 The remaining emulation memory size that can be assigned j The emulator system program is initiated and the command input wait state is entered Rev 0 1 08 00 page 213 of 450 RENESAS Emulator System Failure If an invalid exception occurs during emulator monitor or emulator system program execution the system shuts down No key input from the key board will be received but the following message is displayed lt exception gt E8000 SYSTEM DOWN If an error occurs re execute using another system disk If an error still occurs inform a Hitachi sales agency of the error 5 2 Troubleshooting Procedure This section provides a troubleshooting Problem Analysis Diagram PAD see figure 5 1 to reduce the time taken by troubleshooting As you work through the diagram Follow the instructions that request operator assistance or intervention Note that system defect means that the emulator station is malfunctioning Execut
329. ser system interface HS7065ECH81H For SH7065 QFP 176 cable for QFP 176 PC interface board HS6000EICO01H PCI bus supported in the SH7060 E8000 Hitachi Debugging Interface option environment HS6000EIP01H PCMCIA bus supported in the SH7060 E8000 Hitachi Debugging Interface option environment HS6000EII01H ISA bus supported in the SH7060 E8000 Hitachi Debugging Interface option environment LAN adapter HS6000ELNO01H TCP IP communications protocol 10BASE T 100BASE Tx Can be used only under the HDI interface environment Rev 0 1 08 00 page 10 of 450 RENESAS Section 2 Components 2 1 Emulator Hardware Components The emulator consists of an E8000 station an SH7060 device control board an SH7060 EV chip board and a user system interface cable as shown in figure 2 1 The emulator station includes a serial interface cable RS 232C and parallel interface cable conforms to 1284 and is for the ECP mode for the host computer interface By installing a LAN board option or a LAN adapter the emulator can be connected to a workstation via the LAN interface For details on the PC interface board option ISA bus PCI bus or PCMCIA bus specifications and the LAN adapter refer to the description notes on each product Rev 0 1 08 00 page 11 of 450 RENESAS LAN board option Device control board HS7060EDD81H 4 gt LAN adapter Bidirectional parallel interface cable
330. specifications in the E8000 station when the C option is specified FMS gt SN subnet mask value C RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM e Display Displays the subnet mask value FM gt SN RET SUB NET MASK xxx xxx xxx xxx H xx H xx H xx H xx Examples 1 To define 255 255 255 0 as the subnet mask value and save the setting specifications in the E8000 station FM gt SN 255 255 255 0 C RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM Rev 0 1 08 00 page 87 of 450 RENESAS SN 2 To display the subnet mask value FM gt SN RET SUB NET MASK 255 255 255 0 H FF H FF H FF H 00 FM Rev 0 1 08 00 page 88 of 450 RENESAS 3 6 4 L L Sets the emulator IP address Command Format e Setting L RET Description e Setting Sets the emulator IP address Example To set the IP address of the E8000 station to 128 1 1 1 START E8000 S START E8000 F FLASH MEMORY TOOL AN PARAMETER ART DIAGNOSTIC TEST S F L T L RET E8000 IP ADDRESS 0 0 0 0 128 1 1 1 RET nun man 11 4 RENESAS Rev 0 1 08 00 page 89 of 450 3 65 T T Initiates the diagnostic program Command Format e Initiation T RET Description e Initiation Initiates the diagnostic program Example To initiate the emulator diagnostic program START E8000 S START E8000 F
331. stem disk to a folder The directory containing the copied folder will become the current directory Double clicking the IPW icon initiates interface software IPW and displays the IPW window shown in figure 3 20 File F Setting S EMULATOR INTERFACE HS8000EIWOTSF V1 1 Copyright C Hitachi Ltd 1996 Licensed Material of Hitachi Ltd Figure 3 20 IPW Window Note Microsoft and Windows are registered trademarks of Microsoft Corporation Rev 0 1 08 00 page 63 of 450 RENESAS 3 4 2 Interface Software Settings The procedures for operating interface software IPW are shown in the following Figure 3 21 shows the File menu and Setting menu locations in the interface software IPW display HS8000EIWOTSF V1 1 Copyri Sereen hi Ltd 1996 Licensed Material of Hitachi Ltd File F Figure 3 21 File Menu and Setting Menu Rev 0 1 08 00 page 64 of 450 RENESAS 1 Clicking COMM in the Setting menu displays the Communication Setting box figure 3 22 The Communication Setting box can also be displayed by pressing Alt S keys and then the C key Set the communications conditions to be the same as those of the DIP switches on the E8000 station rear panel Communication Setting Baud rate B Serial Port P 1200 2400 lt 4800 1 M C 19200 c 38400 B bits 1 bit Data bit D Stop bit S None X ON X OFF Parity P e contr
332. ster EMRB Bit Capacity Address Space Type Memory Type LBBO CSO Normal space burst ROM LBB1 16 Mbytes H 01000000 H 01FFFFFF multiplexed I O space 16 Mbytes H 81000000 H 81FFFFFF LBB2 16 Mbytes H 02000000 H O2FFFFFF 16 Mbytes H 82000000 H 82FFFFFF LBB3 16 Mbytes H 03000000 H O3FFFFFF 16 Mbytes H 83000000 H 83FFFFFF LBB4 16 Mbytes H 04000000 H 04FFFFFF CS1 Normal space 16 Mbytes H 84000000 H 84FFFFFF burst ROM LBB5 16 Mbytes H 05000000 H 05FFFFFF multiplexed 1 space 16 Mbytes H 85000000 H 85FFFFFF LBB6 16 Mbytes H 06000000 H 06FFFFFF 16 Mbytes H 86000000 H 86FFFFFF LBB7 16 Mbytes H 07000000 H 07FFFFFF 16 Mbytes H 87000000 H 87FFFFFF LBB8 16 Mbytes H 08000000 H 08FFFFFF CS2 Normal space 16 Mbytes H 88000000 H 88FFFFFF burst ROM LBB9 16 Mbytes H 09000000 H 09FFFFFF multiplexed I O space 16 Mbytes H 89000000 H 89FFFFFF LBB10 16 Mbytes H 0A000000 H OAFFFFFF 16 Mbytes H 8A000000 H 8AFFFFFF LBB11 16 Mbytes H 0B000000 H OBFFFFFF 16 Mbytes H 8B000000 H 8BFFFFFF LBB12 16 Mbytes H 0C000000 H OCFFFFFF 53 Normal space 16 Mbytes H 8C000000 H 8CFFFFFF burst ROM LBB13 16 Mbytes H 0D000000 H ODFFFFFF multiplexed 1 space 16 Mbytes H 8D000000 H 8DFFFFFF LBB14 16 Mbytes H 0E000000 H OEFFFFFF 16 Mbytes H 8E000000 H 8EFFFFFF LBB15 16 Mbytes H OF000000 H OFFFFFFF 16 Mbytes H 8F000000 H 8FFFFFFF RENESAS Rev 0 1 08 00 page 193 of 450
333. storage trace memory 128 kcycles e Command execution during emulation for example Trace data display Emulation memory display and modification e Measurement of subroutine execution time and count for evaluating the execution efficiency of user programs e 4 Mbyte standard emulation memory for use as a substitute user system memory e An optional LAN board for interfacing with workstations enabling high speed downloading 1 Mbyte min of user programs The LAN board contains Ethernet 10 5 Cheapernet 10BASE2 interfaces e An optional LAN adapter for connecting to the emulator through 10BASE T or 100BASE Tx interface enabling the SH7060 E8000 Hitachi Debugging Interface option can be loaded into the PC to enable Graphic display operations in a multi window environment Source level debugging e SH7060 Integration Manager option can be loaded into the workstation to enable Graphic display operations in a multi window environment Source level debugging Graphic display of trace information e An optional PC board for interfacing with a PC enabling high speed downloading 1 Mbyte min of user programs 5 7060 E8000 Hitachi Debugging Interface option can be loaded into the PC to enable Graphical display operations in a multi window environment Source level debugging Rev 0 1 08 00 page 5 of 450 RENESAS 1 2 Warnings CAUTION READ the following warnings before using
334. system Check of the I O signals The emulator checks the connection with the user system at system initiation By this check abnormalities such as short circuits of a user system interface signal can be detected The signals to be checked are as follows RES BREQ WAIT IRQO to IRQ7 and NMI The CHECK command can check the same signals that are checked at system initiation For details refer to section 7 2 10 CHECK Emulator Execution Status Display The emulator can display execution status information listed in table 1 7 To display the execution status use the STATUS command For details refer to section 7 2 36 STATUS Rev 0 1 08 00 page 174 of 450 RENESAS Table 1 7 Execution Status Display Display Command Description MODE xx SH7060 operating mode RADIX xx Radix type BREAK xx Number of breakpoints specified with the BREAK command HOST xx Host computer interface condition CLOCK xx Type of clock 7 5 MHz 15 MHz USER or XTAL EML_MEM S xx Remaining standard emulation memory STEP_INFO REG a e Register information displayed by the STEP command b e Address range displayed by the STEP command SP e Display size for stack contents Rev 0 1 08 00 page 175 of 450 RENESAS 1 10 Emulation Monitoring Function The SH7060 emulator monitors the emulation status such as memory accesses or user program execution Two kinds of status are monitored 5 7060 operating status e User system powe
335. t CLOSE RET bye command success FTP gt OPEN HOST1 RET Username USER1 RET Password RET login command success FTP gt Rev 0 1 08 00 page 412 of 450 RENESAS PWD 9 3 14 PWD PWD Displays the current directory name of the host computer connected via the FTP interface Command Format e Display PWD RET Description e Display Displays the current directory name of the host computer connected via the FTP interface Example To display the current directory name of the host computer connected via the FTP interface FTP gt PWD RET usr e8000 gt Rev 0 1 08 00 page 413 of 450 RENESAS ROUTER 9 3 15 ROUTER RTR Displays the remote network routing information Command Format Display ROUTER RET Description e Display Displays the routing information defined with the emulator monitor flash memory management tool command RTR Note Routing information can be defined with the emulator monitor flash memory management tool command RTR Example To display the defined routing information RTR RET No IP ADDRESS NET ID No IP ADDRESS NET ID 01 128 1 1 80 168 1 1 0 02 128 1 1 50 160 1 1 0 Rev 0 1 08 00 page 414 of 450 RENESAS STA 9 3 16 STA STA Displays the file type to be transferred Command Format e Display STA RET Description e Display Displays in the following format the file type binary or ASCII to be
336. t number of bytes gt according to the inequalities given below Default is 256 bytes as size End address lt start address gt lt specified value Number of bytes lt start address gt gt specified value lt display unit gt Size of display unit B 1 byte units W 2 byte units L 4 byte units Default 1 byte units Description Display When B W or L is specified as display unit displays a memory dump of the specified area as follows ADDRESS DATA ASCII CODE XXXXXXXX CN b c a Address b Memory contents c Memory contents displayed as ASCII codes If there is no applicable ASCII code a period is displayed instead Rev 0 1 08 00 page 271 of 450 RENESAS DUMP Note When the reserved area dump is displayed the display contents are undefined Examples 1 To display memory dump from addresses H O to H 2F D 0 2F RET lt ADDRESS gt lt D A T A gt lt ASCII CODE gt 00000000 20 48 20 49 20 54 2041 20 43 20 48 20 49 2020 HITACHI 00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00000020 20 20 20 20 20 20 20 20 20 20 20 45 38 30 30 30 8000 2 To display H 20 bytes of memory dump from address 80 in 4 byte units D FB80 20 L RET ADDRESS lt T A gt lt 5 CODE gt 0000FB80 00000000 00000001 00000002 00000003 Lele 0000FB90 00000000 00000001 00000002 000
337. t state When the RET key is pressed the displayed command is executed Note Subcommands cannot be displayed by the HISTORY command Example HISTORY RET 1 MAP 2 MAP 0 FFFFFF U 3 F 0 1000 FF 4 B 300 5 1 A 104 6 HISTORY HISTORY 5 RET BCA1 A 104_ Enters command input wait state Rev 0 1 08 00 page 294 of 450 RENESAS ID 7 2 24 ID ID Displays version number of E8000 system program Command Format e Display ID RET Description e Display Displays the version and revision numbers of the SH7060 E8000 system program Example To display the version and revision numbers of the SH7060 E8000 system program ID RET SH7060 E8000 HS7060EDD81SF Vm n Copyright C Hitachi Ltd 1998 Licensed Material of Hitachi Ltd Rev 0 1 08 00 page 295 of 450 RENESAS 7 2 25 MAP MP Specifies and displays memory attribute Command Format e Specification MAPA cstart address A end address memory attribute RET Display MAP A start address A end address gt RET start address Start address of memory area whose attribute is to be specified or displayed end address End address of memory area whose attribute is to be specified or displayed memory attribute Memory type U Memory in the user system cancels emulation memory usage 5 Standard emulation memory in emulator SW Standard emulation memory in emulator with write pr
338. take place In this case 78 EMULATOR BUSY is displayed Re enter the command If the termination interval is short the emulator may not enter parallel mode or commands cannot be executed in parallel mode Examples 1 To set pass points at addresses H 4000 H 4100 H 4200 and H 4300 in that order and a reset point at address H 2000 BS 4000 4100 4200 4300 RET BS 2000 R RET Rev 0 1 08 00 page 254 of 450 RENESAS BREAK_SEQUENCE 2 To display the specified pass points and reset point BS RET PASS POINT NO1 00004000 0000 PASS POINT NO2 00004100 0000 PASS POINT NO3 00004200 0000 PASS POINT NO4 00004300 0000 PASS POINT NOS 00004400 0000 PASS POINT NO6 00004500 0000 PASS POINT NO7 00004600 0000 RESET POINT 00002000 0000 3 To cancel the reset point BS R RET 4 To cancel the pass points and reset point BS RET BS R RET Rev 0 1 08 00 page 255 of 450 RENESAS 7 2 10 Command Format Test CHECK RET Description e Test Tests SH7060 pins Tests the status of the SH7060 pins shown in table 7 10 Table 7 10 SH7060 Pin Test Pin Name Error Status RES RESET signal is fixed low NMI NMI signal is fixed low WAIT WAIT signal is fixed low BREQ BREQ signal is fixed low IRQ0 IRQ0 signal is fixed low IRQ1 IRQ1 signal is fixed low IRQ2 IR
339. tart address range gt A lt end address range I3 RET Subroutine execution time measurement mode 3 PERFORMANCE ANALYSIS 1 3 5 7 A subroutine name A lt start address A end address gt AC lt accessed area address range gt A lt access type RET Area access count measurement mode PERFORMANCE ANALYSISA 1 3 5 7 A subroutine name A lt start address A end address gt SC lt called subroutine address range gt RET Subroutine call count measurement mode e Cancellation PERFORMANCE_ANALYSIS 1 2 3 4 5 6 7 8 A RET Initialization PERFORMANCE ANALYSISA I RET Display PERFORMANCE ANALYSIS A A V RET n Subroutine number subroutine name Name of the subroutine whose execution performance is to be measured start address gt Subroutine entry address end address Subroutine exit address Rev 0 1 08 00 page 312 of 450 RENESAS lt timeout value gt lt specified count gt lt start address range gt lt end address range gt lt accessed area address range gt lt access type gt lt called subroutine address range gt PERFORMANCE_ANALYSIS Timeout value of execution time measurement Can be set for only the PERFORMANCE_ANALYSIS1 command Display format xxx yy zz nnnnnn xxx Hour yy Minute zz Second nnnnnn Microsecond Specifiable range 0 to 999 01059 22 01059 nnnnnn 0 to 999999 Execution count limit Can be set for only the PERFO
340. tation rear panel Figure 3 2 Connecting the Device Control Board Rev 0 1 08 00 page 30 of 450 RENESAS 3 2 2 Connecting EV Chip Board At shipment the EV chip board is packed separately from the E8000 station Use the following procedure to connect the EV chip board to the E8000 station or to disconnect them when moving the emulator A WARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator or will result in PERSONAL INJURY The USER PROGRAM will be LOST 1 Check that the emulator power switch is turned off Ensure that the power lamp on the left side of the E8000 station s front panel is not lit 2 Remove the AC power cable of the E8000 station from the outlet if the cable is connected to the outlet Rev 0 1 08 00 page 31 of 450 RENESAS A WARNING When connecting the cable ensure that the upper or lower side of the cable does not lift off the connector Alternately tighten the screws on both sides of the cable while gradually pushing the cable toward the connector Failure to do so will result in a FIRE HAZARD damage the user system and emulator and will result in PERSONAL INJURY The USER PROGRAM will be LOST E8000 E8000 Station Station w 3 Connect the trace cables into the station to EV chip board interface connectors CN1 CN2 CN3 and CN4
341. ter the BREAK CONDITION 2 condition is satisfied the user program stops when the BREAK CONDITION UBCI condition is satisfied The cause of termination displays BREAK CONDITION SB Time interval measurement mode 2 The total execution time from the point when the BREAK CONDITION UBC2 condition is satisfied until the BREAK CONDITION UBCI condition is satisfied is measured Even if these break conditions are satisfied the program does not stop and the execution time between BREAK CONDITION 2 1 condition satisfaction is added to the previous measured time Time interval measurement mode 3 This measures the total execution time from BREAK CONDITION UBC 2 to BREAK CONDITION and from BREAK CONDITION to BREAK CONDITION UBC3 Even if the conditions BREAK CONDITION 2 or BREAK CONDITION UBC34 are satisfied the time from satisfaction of condition BREAK CONDITION UBC 2 to satisfaction of condition BREAK CONDITION UBC or condition BREAK CONDITION to satisfaction of condition BREAK CONDITION UBC3 is calculated without stopping program execution so total execution time can be measured Sequential break mode 1 Realtime emulation stops only when break conditions set with the BREAK CONDITION 2 command are satisfied in the sequence of the BREAK _ CONDITION UBC2 condition followed by the BREAK CONDITION UBCI condition Sequential break mode 2 When BREAK CONDITION UBC sequential
342. tered after a command parameters of two commands prior to the entered command are displayed This key input is useful for executing commands with the same parameters again Example D 1000 1010 RET Execution of another command D RET 1000 1010 Displays the parameters specified in the previous DUMP command execution and enters command input wait state Moves the cursor one position backwards Moves the cursor to the first position of the word the character following the space Deletes a character at the cursor position Deletes the contents of the entire line Moves the cursor one position forwards Inserts a space at the cursor Moves the cursor to the 10 s multiple 1 th column RENESAS Section 7 Emulation Commands 7 1 Overview The emulator provides a wide range of functions such as break trace and performance analysis Table 7 1 lists the emulation commands that enable these functions Table 7 1 Emulation Commands Usable Unusable Command Function in Parallel Mode register Modifies and displays register contents Unusable ABORT Terminates emulation in parallel mode Usable ALIAS Sets displays and cancels aliases Usable ASSEMBLE Assembles program one line each Unusable BACKGROUND Sets and displays user interrupts in command Unusable INTERRUPT input wait state BREAK Sets displays and cancels software Only display function is breakpoints available BREAK CO
343. th this command Subroutine Trace Acquires trace information such as instructions and operands in the range subroutine specified by lt start address gt and lt end address gt However note that if the specified subroutine calls another subroutine trace information on the called subroutine is not acquired Range Trace Acquires trace information during bus cycles in which the specified condition is satisfied Subroutine Range Trace Accesses instructions and operands in the subroutine specified by lt start address gt and lt end address gt and acquires trace information during bus cycles in which the specified condition is satisfied Trace Stop Stops trace information acquisition when the specified condition is satisfied and enters command input wait state in parallel mode Though realtime emulation continues trace information acquisition is not possible in parallel mode If a trace stop condition is satisfied TRACE STOP is displayed Rev 0 1 08 00 page 353 of 450 RENESAS TRACE_CONDITION_A B C Table 7 23 Specifiable Conditions in Each Trace Mode Command Subroutine Subroutine Range No Trace Range Trace Trace Trace Stop TCA1 2 TCA4 5 6 7 8 1 TCB2 TCB3 TCB4 TCB5 TCB6 TCB7 TCB8 2 TCC3 TCC4 5 TCC6
344. the beginning of the sentence Rev 0 1 08 00 page 230 of 450 RENESAS ASSEMBLE The subcommands listed in table 7 2 can be used with the ASSEMBLE command Table 7 2 Subcommands for Line Assembly Subcommand lt assembly language statement gt Description Assembles the input line statement into machine code and writes it to the displayed address address 1 gt A lt address 2 gt Disassembles instructions from lt address 1 gt to lt address 2 gt and displays them If lt address 2 gt is omitted the first 16 instructions from lt address 1 gt are displayed If only a slash is input the contents from the ASSEMBLE command start address to the current address 1 are disassembled RET only Increments the address odd address 1 even address 2 and re enters subcommand input wait state Decrements the address odd address 1 even address 2 and re enters subcommand input wait state Terminates the ASSEMBLE command Even if an odd address is specified machine codes are written to memory In that case the following warning message is displayed 82 0DD ADDRESS Lane assembly with this command can be performed only in areas CSO to CS5 or the internal memory areas Example To perform line assembly from address H 1000 A 1000 RET 00001000 DATA W 00001000 MOV RO R1 00001002 ADD R1 R2 00001004 JMP R3 00001006 RET 0000
345. the emulator product Incorrect operation will damage the user system and the emulator product The USER PROGRAM will be LOST 1 Check all components with the component list after unpacking the emulator 2 Never place heavy objects on the casing 3 Observe the following conditions in the area where the emulator is to be used Make sure that the internal cooling fans on the sides of the E8000 station must be at least 20 cm 8 away from walls or other equipment Keep out of direct sunlight or heat Refer to section 1 3 Environmental Conditions Use in an environment with constant temperature and humidity Protect the emulator from dust Avoid subjecting the emulator to excessive vibration Refer to section 1 3 Environmental Conditions 4 Protect the emulator from excessive impacts and stresses 5 Before using the emulator s power supply check its specifications such as power output voltage and frequency For details of the power supply refer to section 1 3 Environmental Conditions 6 When moving the emulator take care not to vibrate or otherwise damage it 7 After connecting the cable check that it is connected correctly For details refer to section 3 Preparation before Use 8 Supply power to the emulator and connected parts after connecting all cables Cables must not be connected or removed while the power is on 9 For details on differences between the SH7060 and the emulator refer to sect
346. tion 1 Function 2 Description of function 2 Notes Examples Command Name Full command name Abbr Abbreviated command name Function Command function Command Format Command input format for each function Description Function and usage in detail Notes Warnings and restrictions for using the command If additional information is not required this item is omitted Examples Command usage examples Figure 8 1 Description Format of Host Computer Related Command Rev 0 1 08 00 page 374 of 450 RENESAS Symbols used in the command format have following meanings Parameters enclosed by can be omitted a b One of the parameters enclosed by and separated by that is either a or b must be specified lt gt Contents shown in lt gt are to be specified or displayed The entry specified just before this symbol can be repeated A Indicates a space Used only for command format description RET Pressing the RET key Although italic and bold characters are used throughout this manual to indicate input it is not used in the command format parts of these descriptions Rev 0 1 08 00 page 375 of 450 RENESAS INTFC_LOAD 8 21 INTFC_LOAD IL Loads program from host computer Serial interface Command Format e Load INTFC_LOAD A lt offset gt lt load module type gt lt file name gt RET lt offset gt Value to be added to the load module address
347. tions gt RET lt start address gt Start address of disassembly lt end address gt End address of disassembly lt number of instructions gt The number of instructions to be disassembled Description Display Disassembles the specified memory contents and displays addresses machine codes mnemonics and operands in the following format As many lines as necessary are used for the display ADDR CODE MNEMONIC OPERAND address _ lt machine code lt mnemonic gt lt operand gt If lt end address gt or lt number of instructions gt is omitted 16 instructions are disassembled and displayed If there is no applicable instruction DATA W xxxx is displayed If lt start address gt is an odd address DATA B xx is displayed Rev 0 1 08 00 page 268 of 450 RENESAS DISASSEMBLE Immediately after executing this command except when it is forcibly terminated by the CTRL C keys or BREAK key or by an error pressing the RET key will disassemble and display the next 16 lines of data Disassemble can be performed only in areas CSO to CS5 or the internal memory areas Examples 1 To disassemble and display six instructions starting from address H 1000 DA 1000 86 RET ADDR CODE MNEMONIC OPERAND 00001000 000 MOV 00 0 00001002 2100 MOV B RO R1 00001004 2201 MOV RO R2 00001006 430B JSR R3 00001008 0009 NOP 0000100A 3400 CMP EQ RO R4 Rev 0 1
348. tions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or
349. tisfied is displayed This option is usually necessary except for displaying trace information during delays when a delay count condition is specified by the BREAK CONDITION or TRACE CONDITION B command BP Bus cycle pointers specified as pointer values Default is the instruction pointer display information Information to be displayed B Displays bus cycle information and instruction mnemonic information N Displays bus cycle information Default Displays instruction mnemonic information Description Display Displays trace information acquired during user program execution Trace information is displayed in instruction mnemonics or in bus cycle units according to the specified option a If option specification is omitted displays instruction mnemonic information in instruction units TRACE RET b If the B option is specified displays bus cycle information and instruction mnemonic information in bus cycle units TRACE B RET Rev 0 1 08 00 page 345 of 450 RENESAS TRACE c Ifthe N option is specified displays bus cycle information in bus cycle units TRACE N RET The display range can be specified with pointers in bus cycle units bus cycle pointer or instruction units instruction pointer The pointer value is specified as a relative value from the point where a delay start condition is satisfied see the following note Trace information acquired before the delay start condition is s
350. tor is connected to the user system by using the user system interface cable HS7065ECH8 1H Table 1 User System Interface Cable and User Interfaces User System Interface Cable User Interface HS7065ECH81H QFP 176 pin NQPACK176SD Note The NQPACK176SD is manufactured by Tokyo Eletech Corporation Rev 0 1 08 00 page 443 of 450 RENESAS C 1 1 Connection Using the HS7065ECH81H AWARNING Always switch OFF the emulator and user system before connecting or disconnecting any CABLES Failure to do so will result in a FIRE HAZARD and will damage the user system or emulator or result in PERSONAL INJURY Also the USER PROGRAM will be LOST Notes 1 For more details on the HS7065ECHS1H refer to the user s manual supplied with the EV chip board 2 This EV chip board can only be used in combination with the specified QFP socket NQPACK176SD Install the QFP176 pin socket NQPACK176SD manufactured by Tokyo Eletech Corporation on the user system to connect the emulator Since the pin arrangement is the same as that of the SH7060 actual chip refer to the hardware manual Figure C 1 shows the connection of the HS7065ECH81H figure C 2 shows the size restrictions for the installed components of the HS7065ECH8 1H and figure C 3 shows the recommended mount pad dimensions of the user system IC socket Rev 0 1 08 00 page 444 of 450 RENESAS Flat cable connector number Screws Connector number Connector number of cable
351. tory name is omitted the current directory contents are displayed Note that the directory name must be specified according to the connected host computer format Example To display the contents of the host computer current directory FTP gt LS abc s XYZ gt Rev 0 1 08 00 page 410 of 450 RENESAS OPEN 9 3 13 OPEN OPEN Connects the host computer to the FTP interface Command Format e FTP interface connection OPEN lt host name gt RET lt host name gt Name of the host computer to be connected via the FTP interface The host computer name must be already defined with the flash memory management tool Description e FTP interface connection Connects the emulator to the specified host computer via the FTP interface This command can also be used to change the host computer connected to the emulator To change the host computer first disconnect the current host computer using the CLOSE command and then connect the new host computer using this command FTP gt OPEN lt host name gt RET Username a RET Password b RET login command success FTP gt a Enter user name b Enter password Note A password must be specified before a host computer can be connected via the FTP interface Rev 0 1 08 00 page 411 of 450 RENESAS OPEN Example To disconnect the emulator from the current host computer and connect it to the new host computer HOST1 FTP g
352. tput a low level pulse as an oscilloscope trigger signal For details refer to section 1 8 Trigger Output User System Interface Circuits The circuits that interface the SH7060 in the emulator to the user system include buffers and resistors as described below When connecting the emulator to a user system adjust the user system hardware compensating for FANIN FANOUT and propagation delays When the MCU is used with the emulator the AC timing of the MCU is different from the original AC timing The values are shown in table 4 1 Note The values with the emulator connected in table 4 1 are measurements for reference but are not guaranteed values Table 4 1 Bus Timing Item MCU Specifications ns Values with Emulator Connected ns tAD 25 max 9 8 tBSD 25 max 11 7 tCSD 25 max 11 4 tWSD 25 max 10 1 tRSD 25 max 9 6 tWDD 25 max 9 8 tRDS 25 min 30 6 Adjust the hardware by taking the above into account The basic bus cycle two states is shown in figure 4 1 The user system interface circuits connected to the user system are shown in figure 4 2 Rev 0 1 08 00 page 205 of 450 RENESAS 25100 D31 to 0 D31 to 0 IXXBSD1 tXXBSD2 m 4 tDACKD1 tDACKD1 E Figure 4 1 Basic Bus Cycle Rev 0 1 08 00 page 206 of 450 RENESAS 5 7060 User system PAO to 1
353. transferred by the LAN LOAD LAN SAVE or LAN VERIFY command FIP gt STA RET type mode is BINARY Binary FIP gt STA RET type mode is ASCII ASCII Example To display the file type to be transferred FTP gt STA RET type mode is BINARY gt Rev 0 1 08 00 page 415 of 450 RENESAS SUBNET 9 3 17 SUBNET SN Displays the subnet mask value Command Format e Display SUBNET RET Description e Display Displays the subnet mask value defined with the emulator monitor flash memory management tool command SN SUBNET RET SUBNET MASK xxx xxx xxx xxx a b a Subnet mask value in decimal b Subnet mask value in hexadecimal Note The subnet mask value can be defined with the emulator monitor flash memory management tool command SN Example To display the defined subnet mask value SN RET SUBNET MASK 255 255 255 128 H FF H FF H FF H 80 Rev 0 1 08 00 page 416 of 450 RENESAS LOGOUT 9 3 18 LOGOUT LO Disconnects from the TELNET Command Format TELNET disconnection LOGOUT RET Description e TELNET disconnection Disconnects the emulator from the TELNET This command is valid only when the emulator is connected to the host computer via the TELNET interface Example To disconnect the emulator from the TELNET interface LO RET Rev 0 1 08 00 page 417 of 450 RENESAS Rev 0 1 08 00 page 418 of 450 RENE
354. ts for a flash memory management tool command Enter SL RET to load the system program Enter 2 RET to select WS as the host computer type since the LAN interface is used Enter the host computer name In this example hostname is entered Enter the user name In this example username is entered Enter the password In this example password is entered Enter the directory containing the system file In this example RET is entered to select the current directory of the host computer Display Message START S STAR E8000 E8000 F FLASH L SET T START EMORY DIAGNOS S F L T _ S F L T FM gt FM gt SL RET SELECT LOAD No PARAME F RET 1 PC or 2 WS IC TEST 2 RET INPUT SYSTEM LOADING HOST NAME hostname RET INPUT USER NAME INPUT PASS WORD username RET password RET INPUT SYSTEM DIR ECTORY RENESAS RET Rev 0 1 08 00 page 97 of 450 Operations Display Message 9 Enter Y RET to allow system LOAD E8000 SYSTEM FILE OK Y N program E8000 SYS to be loaded RET in the emulator flash memory NAMES NS COMPLETED Then enter system program file name E8000 SYS 10 E
355. uction at address H 1000 is executed i 2 Figure 1 13 Normal Break Software Break Note When the satisfaction count is specified in normal break emulator firmware performs processing every time the program passes the break condition address result the program will not operate in realtime When the program passes the break condition address the emulator executes the instruction at the address for one step then returns to program execution At this time the BREAK_CONDITION_UBC4 becomes invalid because the BREAK_CONDITION_UBC4 is used to perform the step execution of the break address Rev 0 1 08 00 page 151 of 450 RENESAS Sequential Break sequential break occurs seven pass points max when certain conditions satisfied in a specified order A reset point can be specified in addition to these pass points If the reset point is passed all sequential break conditions up to that point become invalid and the emulator rechecks from the first break condition Figure 1 14 illustrates the usual sequential break and figure 1 15 describes a sequential break when a reset point is specified Break condition The break condition is satisfied when instructions at addresses H 1000 and H 2000 have been User program executed in sequence flow 1000 2000 1000 Break condition 1 No break occurs 2000 Break condition 2 The break condition is satisfied when instructions at addresses H 1000 an
356. umber is entered and the emulator prompts them PLEASE SELECT NO 1 9 L E Q X lt definition number gt RET 01 HOSTNAME xxxxxx lt host name gt RET 01 IP ADDRESS xxx xxx xxx xxx lt IP address gt RET Display Entering L RET displays the list of the defined host computer Initiation Entering E RET saves the new specifications in the emulator flash memory and initiates the LAN board Entering Q RET saves the new specifications in the emulator flash memory without initializing the LAN board and terminates LH command execution Entering X RET terminates LH command execution without saving the new specifications Rev 0 1 08 00 page 82 of 450 RENESAS LH To define the host name of the host computer as host and its IP address as 128 1 1 1 FM gt LH RET PLEASE SELECT NO 1 9 L E Q X 1 RET 01 HOST host RET 01 IP ADDRESS xxx xxx xxx xxx 128 1 1 1 RET PLEASE SELECT NO 1 9 L E Q X L RET NO lt HOST NAME gt lt IP ADDRESS gt NO lt HOST NAME gt lt IP ADDRESS gt 01 host 128 42 121 02 03 04 05 06 07 08 09 8000 ADDRESS PLEASE SELECT NO 1 9 L E Q X E RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM RENESAS Rev 0 1 08 00 page 83 of 450 Q Q Terminates the flash memory manageme
357. units yyyy Unused size of standard emulation memory SBO to SB3 block 256 kbyte units 2222 Unused size of standard emulation memory 5 4 to SB7 block 256 kbyte units When no address is specified the memory attributes of all memory areas are displayed in the format shown above Rev 0 1 08 00 page 300 of 450 RENESAS Notes 1 If there is not enough standard emulation memory to satisfy the specification the memory attribute is specified only for the memory area available 2 Standard emulation memory cannot be allocated to areas other than areas CSO to CS5 3 memory attribute cannot be allocated to a range which includes a reserved area Inthe single chip mode the standard emulation memory cannot be allocated Examples 1 To allocate standard emulation memory to the address range from 1000000 to H 103FFFF MP 1000000 103FFFF S RET REMAINING EMULATION MEMORY LB 3072KB SB0 3 0768KB 2 To allocate standard emulation memory to the address range from H 10400000 to 107 with write protection MP 10400000 107FFFFF SW RET REMAINING EMULATION MEMORY 3072 5 0 7 0512 Rev 0 1 08 00 page 301 of 450 RENESAS 3 display the memory address ranges and attributes of allocated standard emulation memory the internal memory address ranges and the internal I O address range MP RET 00000000 0003FFFF S 00400000 00
358. urement mode Subroutine execution time measurement mode 1 I2 Subroutine execution time measurement mode 2 I3 Subroutine execution time measurement mode 3 AC Area access count measurement mode SC Subroutine call count measurement mode d Execution time ratio as a percentage e Execution time f Area access count in area access count measurement mode or subroutine call count in subroutine call count measurement mode g Subroutine maximum execution time only for the PERFORMANCE ANALYSIS 1 2 3 4 command in subroutine execution time measurement mode 2 12 h Subroutine minimum execution time only for the PERFORMANCE ANALYSIS 1 2 3 4 command in subroutine execution time measurement mode 2 12 Rev 0 1 08 00 page 319 of 450 RENESAS PERFORMANCE ANALYSIS i Subroutine average execution time only for the PERFORMANCE ANALYSIS 1 2 3 4 command j Total run time displayed as H hour M minutes S second US microsecond and NS nanosecond Notes 1 According to the TIME option of the EXECUTION MODE command the maximum measurable time is 488 124 or 6 hours where the minimum measurement time is 1 6 us 406 ns or 20 ns respectively 2 When conditions have already been set with the BREAK CONDITION C or TRACE CONDITION C command the same command number cannot be set For example when a condition has been set with the BREAK CONDITION C1 or TRACE CONDITION command the c
359. urned off to the right Run interface software IPW EXE on the host computer connected to the emulator via the RS 232C interface Turn on the power switch at the E8000 station rear panel 4 The emulator waits for an emulator monitor command Specify the emulator IP address The optional LAN board supports the TCP IP protocol When the host computer is connected to the emulator via the LAN interface the IP address internet address of the emulator must be specified with emulator monitor command L Press L and then the RET key The set IP address is displayed Make sure the IP address is correct The 32 bit IP address which is generally expressed in hexadecimal is displayed in four bytes in decimal For example when the IP address has been specified as H 80010101 H represents hexadecimal the emulator will display the IP address as follows and wait for a new IP address input IP ADDRESS 128 1 1 1 _ Enter new IP address to change the displayed IP address When changing the IP address with emulator monitor command L restart the emulator The host name and IP address of the emulator must be specified in the network database for the host computer Normally the network management tool of the host computer is used For details refer to the host computer user s manual Define the subnet mask value when using the LAN board HS7000ELNO2H When the F command flash memory management tool initiation is entered while the
360. use TAS S Hi E8009 Figure C 4 Examples of Securing the Emulator Station 2 Make sure the power supply is off Before connecting the EV chip board to the user system check that the emulator and the user system are turned off 2 Connect the Uvcc to the user system power The emulator monitors the Uvcc pin pin 100 on UCN3 for HS7060EBK81H to determine whether the user system is turned on or off Accordingly after connecting the user system to the emulator be sure to supply power to the Uvcc pin Otherwise the emulator assumes that the user system is not connected Rev 0 1 08 00 page 447 of 450 RENESAS Rev 0 1 08 00 page 448 of 450 RENESAS Appendix D Memory The SH7060 has two memory map modes internal ROM enabled mode and internal ROM disabled mode Tables D 1 and D 2 show the corresponding memory maps The peripheral module registers are allocated from H FFFFE000 to H FFFFFFFF regardless of memory map mode Table D 1 Address Map Internal ROM Disabled Mode Address Type of Space of Memory Size Bus Width H 00000000 H OSFFFFFF 50 space Normal space 64 Mbytes 8 16 32 bits H 04000000 H 07FFFFFF CS1 space Normal space 64 Mbytes 8 16 32 bits H 08000000 H OBFFFFFF CS2 space burst ROM 64 Mbytes 8 16 32 bits H 0C000000 H OFFFFFFF CS3 space multiplexed 1 64 Mbytes 8 16 32 bits Space H 10000000 H 3FFFFFFF Reserved Reserved H 40000000 H 43FFFFFF
361. user can interrupt the SH7060 If an interrupt occurs while the emulator is waiting for command input whether the interrupt is enabled or disabled can be selected When Interrupts Are Not Processed Generally interrupts are not processed in command input wait state However if an edge sensitive internal or external interrupt occurs while the emulator is waiting for command input the emulator latches the interrupt and executes the interrupt processing routine when the GO command is entered When Interrupts Are Processed Interrupts can be processed in command input wait state by using the BACKGROUND_INTERRUPT command A loop program is executed in the background in command input wait state and when an interrupt occurs the processing for the interrupt starts For details refer to section 7 2 5 BACKGROUND_INTERRUPT Notes 1 The loop program specified by the BACKGROUND_INTERRUPT command must be stored in the internal RAM area 2 In interrupt processing hardware break software break and access to the write protected area or guarded area are detected and a break occurs 3 Information on interrupt processing cannot be traced 3 5 Control Input Signals RES BREQ The SH7060 control input signals are RES and BREQ The RES signal is valid only when emulation has been started with the GO command The BREQ signal is valid during execution with either the MEMORY command GO command STEP command or STEP_OVER command Therefore while the e
362. val of termination is too short the PC is not displayed the emulator does not enter parallel mode or commands may not be executed in parallel mode When the contents of a breakpoint set by the BREAK command have been modified by the user program during emulation that breakpoint will be cancelled at execution stop Examples 1 To reset the SH7060 and start emulation from the reset vector PC address G RESET RET PC 00001130 2 To start emulation from address H 1000 and stop emulation just before address H 2020 is executed G 1000 2020 RET Rev 0 1 08 00 page 289 of 450 RENESAS GO 3 To start emulation from the current PC address and modify memory contents in parallel mode G RET PC 00010204 FEFO RET OOOOFEFO FE RET OOOOFEF1 FF RET END RET PC 00011456 Rev 0 1 08 00 page 290 of 450 RENESAS 7 2 22 HELP HE Displays all commands and command format Command Format e Display HELP RET All commands are displayed HELP A lt command gt RET Command format is displayed Description e Display Displays all emulator command names and abbreviations Rev 0 1 08 00 page 291 of 450 RENESAS
363. with the TRACE_CONDITION_A B command the same command number cannot be set For example when a condition has been set with the TRACE CONDITION A1 command the condition cannot be set with the BREAK CONDITION A1 command If necessary cancel conditions set with the above commands before setting the break conditions When conditions have already been set with the TRACE CONDITION C or PERFORMANCE ANALYSIS command the same command number cannot be set For example when a condition has been set with the TRACE CONDITION or PERFORMANCE ANALYSIS command the condition cannot be set with the BREAK CONDITION command If necessary cancel conditions set with the above commands before setting the break conditions Rev 0 1 08 00 page 245 of 450 RENESAS BREAK_CONDITION_A B C Examples 1 To generate a break when byte data 10 is accessed at address H F000000 BCA1 A F000000 D 10 RET 2 To generate a break when data is written to address H 1000000 BCA2 A 1000000 W DAT RET 3 To generate a break when reading data in address H 2000000 1 2000000 R RET 4 To display the specified conditions BCA RET 1 A F000000 D 10 BCA2 A 1000000 W DAT BCA3 BCA4 BCA5 6 BCA7 BCA8 5 To cancel the specified conditions 1 BCB1 RET Rev 0 1 08 00 page 246 of 450 RENESAS BREAK_CONDITION_UBC 7 2 5 BREAK_CONDITION_UBC Specifies displays a
364. x xxx IP address of host computer RET After the IP address has been specified the emulator will prompt for another selection number When connecting more than one host computer continue specifying the host names and IP addresses To confirm the specifications enter L RET as follows PLEASE SELECT NO 1 9 L E Q X L RET NO lt HOSTNAME gt lt IPADDRESS gt HOSTNAME IP ADDRESS gt 01 XXXXXX XXX XXX XXX XXX 02 XXXXXX XXX XXX XXX XXX 03 XXXXXX XXX XXX XXX XXX 04 XXXXXX XXX XXX XXX XXX 05 XXXXXX XXX XXX XXX XXX 06 XXXXXX XXX XXX XXX XXX 07 XXXXXX XXX XXX XXX XXX 08 XXXXXX XXX XXX XXX XXX 09 XXXXXX XXX XXX XXX XXX E8000 IP ADDRESS PLEASE SELECT NO 1 9 L E Q X To terminate input enter E Q or X followed by RET Entering E RET saves the new specifications in the emulator flash memory initiates the LAN board and terminates LH command execution PLEASE SELECT NO 1 9 L E Q X E RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM gt Entering Q RET saves the new specifications in the emulator flash memory without initializing the LAN board and terminates LH command execution PLEASE SELECT NO 1 9 L E Q X RET LAN CONFIGURATION FILE WRITE OK Y N Y RET FM gt Entering X RET terminates LH command execution without saving the new specifications PLEASE SELECT NO 1 9 L E Q X X RET FM gt Rev 0 1 08 00 page 75 of 450 RENESAS When the
365. y Count nene 147 Break with Satisfaction Count 148 Break with PC Value Specification 149 Break with Sequential Specification essere 151 Normal Break Software Break essere enne 152 Sequential Break cce retoque Ip aaa 153 Sequential Break Reset Point Specification sese 154 External Probe Signal 156 Free Trace Execution State aaa eter tete tre prr e EU Pe teh EESE 158 Subroutine Trace Execution State n nene 159 Trace Acquisition Condition State 160 Trace Stop Condition Specification State sessssseseeeeeeee 161 Subroutine Display iir rre ia be oss Eb eter 164 Normal Mode Time Measurement Range esee 165 Time Interval Measurement Mode l sese 166 Time Interval Measurement Mode 2 sese 167 Time Interval Measurement 3 168 Time Measurement Mode 1 nennen nennen rennen 170 Time Measurement 2 171 Time Measurement 3 172 Pulse Output M 175 Assembly Function teorie 180 Basic BUS Cycle rer rete rr ete Ema
366. y an address within the RAM area and enable user interrupts select option E again e Specify the address of the loop program for accepting user interrupts within an area that is not used by the user program The loop program requires a 4 byte area e When the address of the loop program for accepting user interrupts is specified the memory contents before this specification are not stored Therefore the contents of the loop program address is a BRA instruction even after user interrupts are disabled or after the loop program address is changed Rev 0 1 08 00 page 234 of 450 RENESAS BACKGROUND_INTERRUPT When one of the causes of termination listed in table 7 3 occurs during interrupt processing in command input wait state the interrupt processing stops there If an emulation command is executed in this state the following message is displayed after the emulation command execution In this case either change the interrupt processing program and enable user interrupts or disable user interrupts 66 STOPPED THE BACKGROUND INTERRUPT Do not use this command when using a system such as an OS that does not return from the user interrupt processing to the routine where the interrupt has occurred If used execution does not return to the loop program for accepting user interrupts even after the user interrupt processing has terminated Do not generate a reset exception when user interrupts are enabled If generated the
367. y of EV chip board User cable edge 3 socket EV chip board Figure 3 5 User System Interface Cable Connector Rev 0 1 08 00 page 36 of 450 RENESAS A WARNING Always switch OFF the user system and the emulator product before the USER SYSTEM INTERFACE CABLE is connected to or removed from any part Before connecting make sure that pin 1 on both sides are correctly aligned Failure to do so will result in a FIRE HAZARD and will damage the user system and the emulator product or will result in PERSONAL INJURY The USER PROGRAM will be LOST 3 2 4 Connecting the External Probe CAUTION Check the external probe direction and connect the external probe to the emulator station correctly Incorrect connection will damage the probe or connector Connect an external probe to the external probe connector on the device control board through the external probe insertion opening of the emulator station s rear panel This enables external signal tracing and break detection of the multiemulator Figures 3 6 and 3 7 respectively show the external probe insertion opening and the external probe connector Rev 0 1 08 00 page 37 of 450 RENESAS DCONT CONT TaTivdvd Pa e o g 2 External probe insertion opening Figure 3 6 External Probe Insertion Opening Rev 0 1 08 00 page 38 of 450 RENESAS Probe No Signal Remarks 1 1 Pr
368. y stopped when the A B C specified conditions are satisfied a maximum of 24 points Address bus value or data bus value Access type Read write condition Delay count 1 channel Pass count specification 8 channels External probe value System control signals NOT condition Rev 0 1 08 00 page 127 of 450 RENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Break condition BREAK External probe trigger signal 7 2 7 setting cont CONDITION _ Output when either B channel 8 A B C cont channels or the break controller 4 channels of SH7060 is matched BREAK Sets software break conditions 7 2 6 e Sets up to 255 breakpoints e Sets pass count Trace data TRACE Displays execution instruction mnemonic 7 2 40 acquisition and Displays the following data for each bus display Rev 0 1 08 00 page 128 of 450 cycle Address bus value or data bus value Access area and status Instruction mnemonic SH7060 control signals External probe value Time stamp 20 ns 1 6 us 52 us RENESAS Table 1 2 Emulation Functions cont Reference Command Type Command Function Section Trace data TRACE _ Sets displays and cancels trace 7 2 41 acquisition and CONDITION condition display cont e Traces data only when a condition is satisfied a maximum of 24 points Address bus value NOT condition Read write cond
369. y the user in parallel mode The parallel mode continues even after the command execution is terminated The END command terminates the parallel mode and returns the emulator to normal mode displays the current PC At this time the emulator restarts trace information acquisition e pressing the space key The emulator continues trace information acquisition however while the emulator executes the TRACE CONDITION or TRACE SEARCH command it acquires no trace information n parallel mode the emulator returns to normal mode after one command execution and displays the current PC At this time if trace information acquisition has stopped the emulator restarts acquisition Commands usable in parallel mode are listed in table 7 1 Rev 0 1 08 00 page 139 of 450 RENESAS Notes 1 When memory standard emulation memory or internal I O is accessed with the MEMORY command DUMP command or DISASSEMBLE command in parallel mode there are some restrictions with respect to user program execution Standard emulation memory When accessing standard emulation memory in parallel mode the user program temporarily halts This pause lasts for about 546 ps during user system clock operation Therefore realtime emulation cannot be performed Internal ROM RAM and When accessing internal ROM RAM or I O the user program temporarily halts This pause lasts for about 546 ps during user system clock operat
370. ytes H 8E000000 H 8EFFFFFF LBB15 16 Mbytes H OF000000 H OFFFFFFF 16 Mbytes H 8F000000 H 8FFFFFFF RENESAS Rev 0 1 08 00 page 197 of 450 Table 3 4 Memory Blocks Extended Mode with ROM cont Register Bit Capacity Address Space Type Memory Type EMRC LBCO 16 Mbytes H 10000000 H 1 OFFFFFF CS8 Normal space 16 Mbytes H 90000000 H 90FFFFFF burst ROM LBC1 16 Mbytes H 11000000 H 11FFFFFF multiplexed I O space 16 Mbytes H 91000000 H 91 FFFFFF LBC2 16 Mbytes H 12000000 H 1 2FFFFFF 16 Mbytes H 92000000 H 92FFFFFF LBC3 16 Mbytes H 13000000 H 13FFFFFF 16 Mbytes H 93000000 H 93FFFFFF LBC4 16 Mbytes H 14000000 H 1 4FFFFFF 59 Normal space 16 Mbytes H 94000000 H 94FFFFFF burst ROM LBC5 16 Mbytes H 15000000 H 15FFFFFF multiplexed I O space 16 Mbytes H 95000000 H 95FFFFFF LBC6 16 Mbytes H 16000000 H 1 6FFFFFF 16 Mbytes H 96000000 H 96FFFFFF LBC7 16 Mbytes H 17000000 H 1 7FFFFFF 16 Mbytes H 97000000 H 97FFFFFF LBC8 16 Mbytes H 18000000 H 1 8FFFFFF CS6 Normal space 16 Mbytes H 98000000 H 98FFFFFF peripheral device space LBC9 16 Mbytes H 19000000 H 1 9FFFFFF 16 Mbytes H 99000000 H 99FFFFFF LBC10 16 Mbytes H 1A000000 H 1 AFFFFFF 16 Mbytes H 9A000000 H 9AFFFFFF LBC11 16 Mbytes H 1B000000 H 1 BFFFFFF 16 Mbytes H 9B000000 H 9BFFFFFF LBC12 16 Mbytes H 1C000000 HMCFFFFFF CS7 Normal space 16 Mbytes H 9C000000 H 9CFFFFFF peripheral device space LBC13 16 Mbytes

SH7060 E8000 Emulator HS7060EDD81H User`s Manual

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