Corrections to Descriptions for the Flash Memory in the RX110
Contents
1. When setting the FPMCR register to 92h Write A5h to the PROTR register E gt Write 92h to the FPMCR register register Write 6Dh to the FPMCR register Write 92h to the FPMCR register Wait for tDIS When setting the FPMCR register to 12h Write 12h to Write A5h to the PROTR register FPMCR register Write 12h to the FPMCR register Write EDh to the FPMCR register Write 12h to the FPMCR register When setting the FPMCR register to 08h Write A5h to the PROTR register ea aad Write 08h to the FPMCR register register Write F7h to the FPMCR register Write 08h to the FPMCR register Wait for tMS Write AAOOh to FENTRY register End in ROM read mode Note 1 tDIS ROM mode transition wait time 1 Refer to the Electrical Characteristics chapter tMS ROM mode transition wait time 2 Refer to the Electrical Characteristics chapter Figure 31 6 Procedure for Transition to ROM Read Mode stENESAS Page 13 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction Start in ROM P E mode FPR register A5h Set 92h in the FPMCR register FPMCR register 92h FPMCR register 6Dh FPMCR register 92h y Wait for tois FPR register A5h Set 12h in the FPMCR register FPMCR register 12h FPMCR register EDh FPMCR register 12h A FPR register A5h Set 08h in the FPMCR register FPMCR register 08h FPMCR register F7h FPMCR register 08h2. Wait for tDIS OPCCR OPCM 2 0 bits 000b High speed operating mode SSR P 9 Middle speed operating mode When setting the FPMCR register to 92h When setting the FPMCR register to D2h P Write A5h to the PROTR register z Write A5h to the PROTR register Write 92h to Write 92h to the FPMCR register Write D2h to Write D2h to the FPMCR register FPMCR register Write 6Dh to the FPMCR register FPMCR register Write 2Dh to the FPMCR register Write 92h to the FPMCR register Write D2h to the FPMCR register v When setting the FPMCR register to 82h v When setting the FPMCR register to C2h Write A5h to the PROTR register Write A5h to the PROTR register Ee al Write 82h to the FPMCR register ae Write C2h to the FPMCR register register Write 7Dh to the FPMCR register register Write 3Dh to the FPMCR register Write 82h to the FPMCR register Write C2h to the FPMCR register 4 y Wait for tMS y em in ROM P E mode Note 1 tDIS ROM mode transition wait time 1 Refer to the Electrical Characteristics chapter tMS ROM mode transition wait time 2 Refer to the Electrical Characteristics chapter Note 2 Rewriting during low speed operation is not possible Figure 31 5 Procedure for Transition to ROM P E Mode stENESAS Page 11 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction Startin ROM read mode FENTRYR register
3. 31 29 Self Programming Overview Refer to the user s manual of Code Flash Libraries for comprehensive information about flash self programming 2tENESAS Page 25 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction The MCU supports rewriting the flash memory by the user program The ROM can be rewritten by preparing a routine to rewrite the flash memory flash rewrite routine in the user program On chip RAM Flash rewrite routine Erase program Flash information Note 1 The ROM cannot be rewritten by executing the flash rewrite routine on the ROM Figure 31 29 Self Programming Overview e Page 906 of 966 Descriptions in 1 and 2 of 31 11 Usage Notes are corrected as follows Before correction 1 Erase Suspended Area Data in areas where an erase operation is suspended is undefined To avoid malfunctions caused by reading undefined data do not execute commands and read data in the area where an erase operation is suspended 2 Suspension by Erase Suspend Commands When suspending an erase operation by the erase suspend command complete the operation by a resume command After correction 1 Access the Block Where Erase Operation Is Forcibly Stopped When forcibly stopping an erase operation data in the block where the erase operation is aborted is undefined To avoid malfunctions caused by reading undefined data do not execute instructions or read data in the block whe
4. AA01h Set ROM P E mode Set 12h in the FPMCR register Wait for tos OPCCR OPCM 2 0 bits 000b FPR register A5h FPMCR register 12h FPMCR register EDh FPMCR register 12h Yes High speed operating mode Set 92h in the FPMCR register Set 82h in the FPMCR register FPR register A5h FPMCR register 92h FPMCR register 6Dh FPMCR register 92h FPR register A5h FPMCR register 82h FPMCR register 7Dh FPMCR register 82h Middle speed operating mode Set D2h in the FPMCR register Set C2h in the FPMCR register FPR register A5h FPMCR register D2h FPMCR register 2Dh FPMCR register D2h FPR register A5h FPMCR register C2h FPMCR register 3Dh FPMCR register C2h Wait for tus Set the FCLK frequency in the FISR PCKA 4 0 bits End in ROM P E mode Note 1 tos ROM mode transition wait time 1 Refer to the Electrical Characteristics chapter tus ROM mode transition wait time 2 Refer to the Electrical Characteristics chapter Note 2 The ROM cannot be rewritten in low speed operating mode Figure 31 5 Procedure for Transition from ROM Read Mode to ROM P E Mode stENESAS Page 12 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 865 of 966 Figure 31 6 in 2 Switching to ROM Read Mode of 31 6 3 Software Command Usage is corrected as follows Before correction Start in ROM P E mode
5. SCI1 for dedicated flash memory P16 RXD1 Output er programmer communication 1 stENESAS Page 16 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 880 of 966 Response in 31 9 3 Boot Mode Status Inquiry is corrected as follows Before correction Command Size 1 byte Total bytes of Status and Error the value is always 2 Status 1 byte MCU status see Table 31 10 Error 1 byte Information about the error occurred in the MCU see Table 31 11 After correction Command Size 1 byte Total bytes of State and Error the value is always 2 State 1 byte MCU state see Table 31 10 Error 1 byte Information about the error occurred in the MCU see Table 31 11 SUM 1 byte Value that is calculated so the sum of response data is 00h e Page 881 of 966 Table 31 12 in 31 9 4 Inquiry Commands is corrected as follows Before correction Table 31 12 Inquiry Commands Command Description Supported device inquiry Inquiry for the device code and series name User area information inquiry Inquiry for the number of user areas and the start and end addresses of the user area Inquiry for the start and end addresses of the user areas the block size and the number of blocks Block information inquiry After correction Table 31 12 Inquiry Commands Command Description Supported device inquiry Inquiry for the device code and series name Data area availability inquiry Inq
6. The following description is added to the BCERR flag in 31 3 18 Flash Status Register 0 FSTATRO The value read from this flag is undefined when setting the FCR STOP bit to 1 processing is forcibly stopped during blank check e Page 855 of 966 The following description in setting conditions for the ILGLERR flag in 31 3 18 Flash Status Register 0 FSTATRO is deleted The ROM is set to P E mode and a software command is executed stENESAS Page 4 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 856 of 966 Description for the FRDY flag in 31 3 19 Flash Status Register 1 FSTATR1 is corrected as follows Before correction This flag is used to confirm whether a software command is executed This flag is set to 1 when processing of the executed software command is completed and 0 when the FCR OPST bit is set to 0 After correction This flag is used to confirm whether a software command is executed This flag becomes 1 when processing of the executed software command or the forced stop processing is completed and this flag becomes 0 when setting the FCR OPST bit to 0 e Page 857 of 966 Descriptions in 31 3 20 Flash Error Address Monitor Register H FEAMH are corrected as follows Before correction This register stores the flash memory address where the error has occurred if an error occurs during execution of a software command program block erase or verify If a blank check error occur
7. omitted Set bit 15 to bit 0 of the address in this register omitted After correction omitted Set bit 15 to bit 0 of the flash memory address for programming erasure in this register omitted 2ENESAS Page 3 of 26 RENESAS TECHNICAL UPDATE e Page 852 of 966 TN RX A113A E Description in 31 3 13 Flash Processing End Address Register L FEARL is corrected as follows Before correction omitted Set bit 15 to bit 0 of the flash memory address in this register omitted After correction omitted Set bit 15 to bit 0 of the flash memory address for programming erasure in this register omitted e Page 854 of 966 Descriptions for the reserved bits in 31 3 18 Flash Status Register 0 FSTATRO are corrected as follows Before correction bit symbol Bit Name Description omitted Date Dec 1 2014 b2 Reserved This bit is read as 0 omitted b7 b6 Reserved These bits are read as 0 After correction bit symbol Bit Name Description omitted b2 Reserved The read value is undefined omitted Reserved e Page 854 of 966 The following description for the PRGERR flag in 31 3 18 Flash Status Register 0 FSTATRO is deleted The read value is undefined The value read from this flag is undefined when the FCR STOP bit is set to 1 processing is forcibly stopped during erasure e Page 854 855 of 966
8. register AA01 h FPMCR register lt 08h FPMCR register lt 82h C2h ROM P E mode Note 1 See the corresponding flowchart for details on the procedure Figure 31 4 Mode Transitions of the Flash Memory 31 6 1 1 Read Mode Read mode is for high speed reading of the ROM Reading from a ROM address for reading can be accomplished in one ICLK clock 1 ROM Read Mode In this mode the ROM is in read mode The sequencer enters this mode from P E mode when setting the FPMCR register to 08h and setting the FENTRYR FENTRYO bit to 0 31 6 1 2 P E Modes The P E mode is for programming and erasure of the ROM 1 ROM P E Mode In this mode the ROM is in P E mode The sequencer enters this mode when setting the FENTRYR FENTRY0 bit to 1 and setting the FPMCR register 82h or C2h stENESAS Page 10 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 864 of 966 Figure 31 5 in 1 Switching to ROM P E Mode of 31 6 3 Software Command Usage is corrected as follows Before correction San in ROM read mode SOPCCR SOPCM bit 0 Set ROM P E mode Write to FENTRYR register When setting the FENTRYR FENTRYO bit to 1 Write AA01h When setting the FPMCR register to 12h Write 12h to Write ASh to the PROTR register FPMCR register Write 12h to the FPMCR register Write EDh to the FPMCR register Write 12h to the FPMCR register Low speed operating mode End in ROM read mode y
9. Date Dec 1 2014 RENESAS TECHNICAL UPDATE 1753 Shimonumabe Nakahara ku Kawasaki shi Kanagawa 211 8668 Japan Renesas Electronics Corporation Product MPU amp MCU Document TN RX A113A E Category No Corrections to Descriptions for the Flash Memory in Information the RX110 Group User s Manual Category Title Technical Notification RX110 Group User s Manual Hardware Rev 1 00 RO1UH0421EJ0100 Specification Changes to the RX110 Group TN RX A112A E Applicable Reference Product He R Document This document describes corrections to 31 Flash Memory in RX110 Group User s Manual Hardware Rev 1 00 Page 840 of 966 The Software commands column and On board programming column in Table 31 1 Flash Memory Specifications are corrected and Note 2 is deleted as follows Before correction Table 31 1 Flash Memory Specifications Item Description Memory space e User area Up to 128 Kbytes Software commands e The following commands can be executed in boot mode or during self programming blank check block erase program read set access window e Checksum can be also executed in boot mode Suspend resume can be also executed during self programming On board programming omitted Self programming in single chip mode The user area is rewritable using the self programming library 2 omitted Note 1 omitted Note 2 The library used for self programming is provided Refer to sectio
10. ICAL UPDATE TN RX A113A E Date Dec 1 2014 e Page 862 of 966 Description in 31 6 1 Sequencer Modes and Figure 31 4 are changed as follows Before correction The sequence has three modes Transitions between modes are caused by writing to the FENTRYR register or issuing commands Figure 31 4 is a diagram of mode transitions of the flash memory Read mode ROM read mode FENTRYR register AAOOh FENTRYR register AAO1h ROM P E mode Figure 31 4 Mode Transitions of the Flash Memory 31 6 1 1 Read Mode Read mode is for high speed reading of the ROM Reading from a ROM address for reading can be accomplished in one ICLK clock There is one read mode ROM read mode 1 ROM Read Mode This mode is for reading the ROM The sequencer enters this mode when the FENTRYR FENTRY0 bit is set to 0 with the FENTRYR FENTRYD bit set to 0 31 6 1 2 ROM P E Modes There is one P E mode ROM P E mode 1 ROM P E Mode The ROM P E mode is for programming and erasure of the ROM The sequencer enters this mode when the FENTRYR FENTRYD bit is set to 0 with the FENTRYR FENTRY0 bit set to 1 2tENESAS Page 9 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction The sequencer has 2 modes Transitions between modes are caused by writing to the FENTRYR register and setting the FPMCR register Figure 31 4 is a diagram of mode transitions of the flash memory ROM read mode FRNTRYR register AAOOh FRNTRYR
11. L vo Yy FENTRYR register AAOOh FENTRYR register 0000h End in ROM read mode Note 1 tos ROM mode transition wait time 1 Refer to the Electrical Characteristics chapter tus ROM mode transition wait time 2 Refer to the Electrical Characteristics chapter Figure 31 6 Procedure for Transition from ROM P E Mode to ROM Read Mode stENESAS Page 14 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E e Page 862 to 870 of 966 The structure of sections in 31 6 Programming and Erasure are changed as follows Before correction 31 6 31 6 1 31 6 1 1 31 6 1 2 31 6 2 31 6 3 After correction 31 6 31 6 1 31 6 1 1 31 6 1 2 31 6 2 31 6 2 1 31 6 2 2 31 6 3 31 6 4 31 6 4 1 31 6 4 2 31 6 4 3 31 6 4 4 31 6 4 5 31 6 4 6 Programming and Erasure Sequencer Modes Read Mode ROM P E Mode Software Commands Software Command Usage Switching to ROM P E Mode Switching to ROM Read Mode Programming and Erasure Procedures Start Up Area Information Program Access Window Information Program Consecutive Read Programming and Erasure Sequencer Modes Read Mode P E Mode Mode Transitions Transition from Read Mode to P E Mode Transition from P E Mode to Read Mode Software Commands Software Command Usage Program Block Erase Blank Check Start Up Area Information Program Access Window Information Program Unique ID Read Forced Stop of Software Commands stENESAS Date Dec 1 2014 Page 15
12. a value other than AAh and data is written to the FENTRYR register e AAOOh is written to the FENTRYR register Data is written to the FENTRYR register while the FENTRYR register is a value other than 0000h After correction e AAOOh is written to the FENTRYR register Page 848 of 966 Descriptions for block erase in 31 3 8 Flash Control Register FCR are corrected as follows Before correction e Erase a block of the flash memory Set the start address of the target erasure block in the FSARH and FSARL registers and set the end address of the target erasure block in the FEARH and FEARL registers If a setting other than the above is made erasure may not be executed correctly After correction Erase a specified block in the flash memory Set the beginning address of the block to be erased in registers FSARH and FSARL and the last address in registers FEARH and FEARL Ifa value other than the above is set erasure may not be executed correctly 2tENESAS Page 2 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 849 850 of 966 Descriptions for the access window information program in 31 3 9 Flash Extra Area Control Register FEXCR are corrected as follows Before correction This command is used to set the access window used for area protection Set the access window in block units Set bit 19 to bit 10 of the access window start address in the FWBH register set bit 19 to bit 10 of the ac
13. addresses of the flash memory After correction This register is used to check the address where the error has occurred if an error occurs during processing of a software command This register stores bit 15 to bit 0 of the address where the error has occurred for the program command or blank check command or it stores bit 15 to bit 0 of the beginning address of the area where the error has occurred for the block erase command Since this register value becomes undefined if setting the FRESETR FRESET bit to 1 read the value before error processing When the software command is normally completed this register stores bit 15 to bit 0 of the last address at execution of the command When executing a software command for the ROM or the unique ID read command low order 2 bits become 00b Refer to Figure 35 1 and Figure 35 2 for details on the addresses of the flash memory 2ENESAS Page 5 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 858 of 966 Note 1 in 31 3 23 Flash Access Window Start Address Monitor Register FAWSMR is corrected as follows Before correction Note 1 The value of the blank product is 1 It is set to the same value set in bit 9 to bit O in the FWBH register after the access window information program command is executed After correction Note 1 The value of the blank product is 1 It is set to the same value set in bit 9 to bit O in the FWBL register after the access window informat
14. ceives a response 06h the MCU waits for 1 bit period at the bit rate for sending the operating frequency select command and then set the bit rate of the programmer to the changed value After that the MCU sends communication confirmation data 06h at the changed bit rate When the MCU receives the command successfully the programmer sends a response 06h of the communication confirmation data Programmer 10h device select command 46h ACK 3Fh operating frequency select command 06h ACK Wait 1 bit period Set the new bit rate 06h check 06h ACK Figure 31 21 Procedure to Select the Device and Change the Bit Rate 2ENESAS Page 22 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 900 of 966 The procedure in 31 9 10 6 Erase Ready Operation and Change is corrected as follows Before correction Erase the user area in the MCU 1 Send the erase preparation command 48h to place the MCU in the erase wait state The MCU enters the erase wait state and sends a response 06h 2 Send a block erase command 59h to erase blocks in the MCU When blocks are erased successfully the MCU sends a response 06h When the MCU fails to receive the MCU sends an error response D9h Send block erase commands repeatedly until a block erase command has been sent for the total number of blocks The total number of blocks is the sum of the user area blocks and data area blo
15. cess window end address 1 and execute this command If the start address and end address are set to the same value all areas can be accessed Do not set the start address to a value larger than the value of the end address After correction This command is used to set the access window used for area protection Set the access window in block units Specify the access window start address which is the beginning address of the access window in the FWBL register specify the access window end address which is the next address of the last address of the access window in the FWBH register and issue this command Set bit 19 to bit 10 of the address for programming erasure in each register If the same value is set as the start address and end address all areas can be accessed Do not set the start address to a value larger than the value of the end address e Pages 850 851 of 966 Descriptions in 31 3 10 Flash Processing Start Address Register H FSARH and 31 3 12 Flash Processing End Address Register H FEARH are corrected as follows Before correction omitted Set bit 19 to bit 16 of the flash memory address in this register omitted After correction omitted Set bit 19 to bit 16 of the flash memory address for programming erasure in this register omitted e Page 851 of 966 Description in 31 3 11 Flash Processing Start Address Register L FSARL is corrected as follows Before correction
16. cks that are obtained in advance using the block information inquiry command If the operation ends before all the block erase commands are sent a command error may occur even when a correct command is sent in the program erase state 3 In order to place the MCU in the program erase state send a block erase command for end of erase 59h 04h FFh FFh FFh FFh A7h The MCU enters the program erase state and sends a response 06h Programmer 48h erase preparation command 06h ACK 59h block erase command 06h ACK D9h XXh error code 59h block erase command for end of erase 06h ACK Figure 31 24 Procedure to Send Commands in Erase Ready Operation 2ENESAS Page 23 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction Erase the user area in the MCU 1 Send the erase preparation command 48h to place the MCU in the erase wait state The MCU enters the erase wait state and sends a response 06h 2 Send a block erase command 59h to erase blocks in the MCU When blocks are erased successfully the MCU sends a response 06h When the MCU fails to receive the MCU sends an error response D9h Send block erase commands repeatedly until a block erase command has been sent for the total number of blocks The total number of blocks is the number of the user area blocks that are obtained in advance using the block information inquiry command If the operation ends before al
17. e programmer to the changed value After that the MCU sends communication confirmation data 06h at the changed bit rate When the MCU receives the command successfully the MCU sends a response 06h of the communication confirmation data Programmer 3Fh operating frequency select command OO 06h ACK Wait for 1 bit period Set the new bit rate O6h check IMMM 06h ACK Figure 31 21 Procedure to Select the Device and Change the Bit Rate 2ENESAS Page 21 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction 1 Send the device select command 10h to select the device to connect with the programmer and the endian of data that is programmed When the program data is little endian select the same device code as that for little endian in the response to the support device inquiry command When the program data is big endian select the same device code as that for big endian in the response to the support device inquiry command When the device is selected successfully the MCU sends a response 46h When the MCU fails to receive the MCU sends an error response 90h 2 Send the operating frequency select command 3Fh to change the bit rate for communication When the bit rate is set successfully the MCU sends a response 06h When the bit rate cannot be changed or when the MCU fails to receive the MCU sends an error response BFh 3 When the MCU re
18. f programming area protection is enabled only during self programming in single chip mode Figure 31 3 shows the Area Protection Overview Address Rewrite by Rewrite in boot mode self programming FFFE 0000h Block 127 Block 126 Disabled FFFF E3FFh FFFF E400h Block 6 end block Access window Block 5 Enabled Enabled Block 4 FFFF EFFFh start block FFFF F000h Block 3 Block 2 Disabled Block 1 Block 0 FFFF FFFFh Figure 31 3 Area Protection Overview stENESAS Page 7 of 26 RENESAS TECHNICAL UPDATE After correction TN RX A113A E Date Dec 1 2014 Specify the start address and end address to set the access window While the access window can be set in boot mode or by self programming area protection is enabled only during self programming in single chip mode Figure 31 3 shows the Area Protection Overview Address for reading FFFE 0000h Block 127 Block 126 FFFF E400h Block 6 Access window Block 5 Block 4 FFFF EFFFh Address for programming erasure Rewrite by Rewrite in boot mode self programming 6_0000h Disabled 7_E3FFh 7_E400h hS Access window start address Enabled Access window end address Enabled 7_EFFFh FFFF F000h Block 3 Block 2 Block 1 Block 0 FFFF FFFFh Area Protection Overview Set Blocks 4 to 6 as the Access Window Figure 31 3 2tENESAS 7_F000h Disabled 7_FFFFh Page 8 of 26 RENESAS TECHN
19. ion program command is executed e Page 859 of 966 Note 1 in 31 3 24 Flash Access Window End Address Monitor Register FAWEMR is corrected as follows Before correction Note 1 The value of the blank product is 1 It is set to the same value set in bit 9 to bit O in the FWBL register after the access window information program command is executed After correction Note 1 The value of the blank product is 1 It is set to the same value set in bit 9 to bit O in the FWBH register after the access window information program command is executed e Page 860 of 966 2 of Figure 31 2 in 31 4 Start Up Program Protection is corrected as follows Before correction 2 After the alternate area is successfully rewritten the default area and the alternate area are switched using the self programming library After that the program in the alternate area starts after a reset After correction 2 After the alternate area is successfully rewritten the default area and the alternate area are switched using the start up area information program command After that the program in the alternate area starts after a reset 2ENESAS Page 6 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 861 of 966 Description in 31 5 Area Protection and Figure 31 3 are changed as follows Before correction Select the start block and end block to set the access window While the access window can be set in boot mode or by sel
20. l the block erase commands are sent a command error may occur even when a correct command is sent in the program erase state 3 Send a block erase command for end of erase 59h 04h FFh FFh FFh FFh A7h The MCU sends a response 06h 4 To confirm whether erase ready operation has ended send a boot mode status inquiry command 4Fh The MCU sends a response to the boot mode status inquiry command when erase ready operation has ended If erase ready operation has not ended the MCU sends an error response 80h 4Fh If the programmer receives an error response restart the MCU in boot mode and start again from section 31 9 10 1 Bit Rate Automatic Adjustment Procedure Programmer 48h erase preparation command 06h ACK 59h block erase command Repeat until all blocks are erased 06h ACK 59h block erase command for end of erase 06h ACK 4Fh boot mode status inquiry command Response to the boot mode status inquiry command 80h 4Fh error response Figure 31 24 Procedure to Send Commands in Erase Ready Operation 2ENESAS Page 24 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 904 of 966 The procedure in 31 9 10 10 Set the Access Window in the User Area is corrected as follows Before correction Set the access window to avoid unintentionally rewriting the user area by the self programming library 1 Send the access window program command 74h to set the access windo
21. mand Response to the user area information inquiry command 26h block information inquiry command Response to the block information inquiry command Figure 31 20 Procedure to Send Inquiry Commands 2tENESAS Page 20 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 897 of 966 The procedure in 31 9 10 3 Procedure to Select the Device and Change the Bit Rate is corrected as follows Before correction 1 Send the device select command 10h to select the device to connect with the programmer and the endian of data that is programmed When the program data is little endian select the same device code as that for little endian in the response to the support device inquiry command When the program data is big endian select the same device code as that for big endian in the response to the support device inquiry command When the device is selected successfully the MCU sends a response 06h When the MCU fails to receive the MCU sends an error response 90h 2 Send the operating frequency select command 3Fh to change the bit rate for communication When the bit rate is set successfully the MCU sends a response 06h When the bit rate cannot be changed or when the MCU fails to receive the MCU sends an error response BFh 3 When the MCU receives a response 06h the MCU waits for 1 bit period at the bit rate for sending the operating frequency select command and then set the bit rate of th
22. n 31 10 Rewriting by Self Programming for details on the self programming library After correction Table 31 1 Flash Memory Specifications Item Description Memory space User area Up to 128 Kbytes e Extra area Stores the start up area information access window information and unique ID Software commands The following commands are implemented program blank check block erase unique ID read e The following commands are implemented for programming the extra area start up area information program access window information program On board programming omitted Self programming in single chip mode e The user area is rewritable using the flash rewrite routine in the user program omitted Note 1 omitted 2014 Renesas Electronics Corporation All rights reserved z ENESAS Page 1 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 e Page 842 of 966 Description in 31 3 1 Flash P E Mode Entry Register FENTRYR is corrected as follows Before correction To rewrite the ROM either the FENTRYD or FENTRYO bit must be set to 1 to place the ROM in P E mode After correction To rewrite the ROM the FENTRY0 bit must be set to 1 to place the ROM in P E mode e Page 842 of 966 Descriptions of clearing conditions for the FENTRY0 bit in 31 3 1 Flash P E Mode Entry Register FENTRYR are corrected as follows Before correction e Data is written by byte access The FEKEY 7 0 bits are set to
23. of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 The following descriptions and flowchart are added to 31 6 4 6 Forced Stop of Software Commands 31 6 4 6 Forced Stop of Software Commands Perform the procedure shown in Figure 31 xx to forcibly stop the blank check command or block erase command When the command processing is forcibly stopped registers FEAMH and FEAML store the address at the time of the forced stop For blank check the stopped processing can be continued by copying the FEAMH and FEAML register values to registers FSARH and FSARL Command is being executed FCR STOP bit FSTATR1 FRDY flag 1 Hi Ye s FCR register 00h FSTATR1 FRDY flag 0 Figure 31 xx Procedure for Forced Stop of Software Commands e Page 871 of 966 Table 31 5 in 31 7 Boot Mode is corrected as follows Before correction Table 31 5 I O Pins Used in Boot Mode Pin Name I O Mode Description Receive data through SCI1 for dedicated flash memory P15 RXD1 Input SCI A programmer communication 1 Transmit data through SCI1 for dedicated flash memory programmer communication 1 P16 RXD1 Output After correction Table 31 5 I O Pins Used in Boot Mode Pin Name 1 0 Mode Description MD Input Boot mode Select operating mode refer to section 3 Operating Modes Receive data through SCI1 for dedicated flash memory P15 RXD1 Input Boot mode SCI be sages programmer communication 1 Transmit data through
24. pport device inquiry command 25h user area information inquiry command Response to the user area information inquiry command 26h block information inquiry command Response to the block information inquiry command Figure 31 20 Procedure to Send Inquiry Commands 2tENESAS Page 19 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 After correction Send inquiry commands and receive the information necessary to send setting commands program erase commands and read check commands 1 Send a support device inquiry command 20h to check which device to connect The MCU returns the device code and series name 2 Send a data area availability inquiry command 2Ah to check the availability of data area and area protection The MCU returns the availability of data area and area protection 3 Send a user area information inquiry command 25h to check the start and end addresses of the user area The MCU returns the start and end addresses of the user area 4 Send a block information inquiry command 26h to check the block configuration The MCU returns the start address the size of one block and the number of blocks for the user area Programmer 20h support device inquiry command Response to the support device inquiry command 2Ah data area availability inquiry command Response to the data area availability inquiry command 25h user area information inquiry com
25. re an erase operation is forcibly stopped 2 Processing After Forced Stop of Erase Operation After forcibly stopping an erase operation issue the block erase command to the same block again stENESAS Page 26 of 26
26. s when a blank check command is executed this register stores the flash memory address where programming has been executed omitted After correction This register is used to check the address where the error has occurred if an error occurs during processing of a software command This register stores bit 19 to bit 16 of the address where the error has occurred for the program command or blank check command or it stores bit 19 to bit 16 of the beginning address of the area where the error has occurred for the block erase command Since this register value becomes undefined if setting the FRESETR FRESET bit to 1 read the value before error processing omitted Page 857 of 966 Descriptions in 31 3 21 Flash Error Address Monitor Register L FEAML are corrected as follows Before correction This register is used to confirm the address where the error has occurred if an error occurs during processing of a software command This register stores bit 15 to bit 0 of the flash memory address where the error has occurred or bit 15 to bit 0 of the start address in the flash memory area where the error has occurred When the software command terminates normally this register stores bit 15 to bit 0 of the end address at execution of the command To set the ROM area set bit 1 and bit 0 to 00b When a software command for the ROM is executed lower order 2 bits are set to 00b Refer to Figure 35 1 and Figure 35 2 for details on the
27. sponse Page 895 of 966 Figure 31 18 in 31 9 10 1 Bit Rate Automatic Adjustment Procedure is corrected as follows Before correction START STOP BIT DO D1 D2 D3 D4 D5 D6 D7 BIT j p Measure 9 bits of low width data 00h a Be Figure 31 18 Data Format for Bit Rate Automatic Adjustment After correction At least 1 ms between commands l Transmission to the MCU see note 1 Reception from the MCU Note 1 Maximum 30 times Figure 31 18 Transmit Receive Data for Bit Rate Automatic Adjustment stENESAS Page 18 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 Page 896 of 966 The procedure in 31 9 10 2 Procedure to Receive the MCU Information is corrected as follows Before correction Send inquiry commands and receive the information necessary to send setting commands program erase commands and read check commands 1 Send a support device inquiry command 20h to check which device to connect The MCU returns the device code and series name 2 Send a user area information inquiry command 25h to check the start and end addresses of the user area The MCU returns the start and end addresses of the user area 3 Send a block information inquiry command 26h to check the block configuration The MCU returns the start address the size of one block and the number of blocks for the user area Programmer 20h support device inquiry command Response to the su
28. uiry for the availability of the data area User area information inquiry Inquiry for the number of user areas and the start and end addresses of the user area Inquiry for the start and end addresses of the user areas the block size and the number of Block information inquiry blocks stENESAS Page 17 of 26 RENESAS TECHNICAL UPDATE TN RX A113A E Date Dec 1 2014 e Page 884 of 966 The section number of 31 9 6 Operating Frequency Select is corrected to 31 9 5 2 Accordingly the subsequent section numbers are corrected as follows Before correction 31 9 6 Operating Frequency Select 31 9 6 1 Program Erase Status Transition 31 9 7 ID Code Authentication Command After correction 31 9 5 2 Operating Frequency Select 31 9 5 3 Program Erase State Transition 31 9 6 ID Code Authentication Command Page 889 of 966 Description in 31 9 8 3 Erase Preparation is corrected as follows Before correction When the host sends this command the MCU recognizes that an instruction to prepare for the erase command is issued from the host enters the erase wait state where only the block erase command to the user area or data area can be accepted and sends a response After correction When the host sends this command the MCU recognizes that an instruction to prepare for the erase command is issued from the host enters the erase wait state where only the block erase command to the user area can be accepted and sends a re
29. w or clear the access window settings When setting the access window set 00h in the access window set the start address of the area that can be programmed by the self programming library in the access window start address LH and access window start address HL and set the end address of the area that can be programmed by the self programming library in the access window end address LH and access window end address HL omitted After correction Set the access window to avoid unintentionally rewriting the user area during self programming 1 Send the access window program command 74h to set the access window or clear the access window settings When setting the access window set 00h in the access window field and set the start address and the end address of the area that can be programmed during self programming in the access window start address and the access window end address respectively omitted e Page 905 of 966 Descriptions in 31 10 1 Overview of 31 10 Rewriting by Self Programming and Figure 31 29 are corrected as follows Before correction The MCU supports rewriting the flash memory by the user program Using the self programming library provided from Renesas Electronics the ROM can be rewritten RAM ROM Rewrite program for the user area Code flash library Execute flash functions Erase program Flash information Note 1 The ROM cannot be rewritten by executing the rewrite program on the ROM Figure
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