Home

CPC503 User Manual

image

Contents

1. Detailed Description CPC503 Table 3 3 PMC Connectors XS10 P11 XS11 P13 XS12 P12 and XS13 P14 Pinouts Pis TCK P2_1 12V P31 NC P4_1 PMC_I O Pi 2 12V P2 2 TRST P3_2 GND P4_2 PMC_I O P1 3 GND P2 3 TMS P3 3 GND P4 3 PMC_I O P14 INTD P2_4 TDO P3_4 C_BE7 P4_4 PMC_I O PAGS INTE P25 TDI P3_5 C_BE6 P4_5 PMC_I O P1 6 INTF P2 6 GND P3 6 C_BE5 P4_6 PMC_I O Bue NC P2_7 GND P3_7 C_BE4 P4_7 PMC_I O P18 VCC P2 8 NC P3 8 GND P4 8 PMC_I O Pi 9 INTG P29 NC P3 9 VIO P4 9 PMC_I O PA 10 NC P2 10 NC P3 10 PAR64 P4_10 PMC_I O P1311 GND Peti PULL_UP P3 11 AD63 P4 11 PMC_I O P112 NC P2 12 3 3V P3 12 AD62 P4 12 PMC_I O DINI PCICLK P2 13 PCIRST P3_13 AD61 P4_13 PMC_I O P1 14 GND P2 14 PULL DOWN P3 14 GND P4 14 PMC_I O Sat GND P2_15 3 3V P3_15 GND P4_15 PMC_I O P1 16 GNT P2_16 PULL_DOWN P3_16 AD60 P4_16 PMC_I O PAZ REQ P2_17 PME P3_17 AD59 P4 17 PMC_I O P1 18 VCC P2 18 GND P3 18 AD58 P4 18 PMC_I O P1_19 VIO P2 19 AD30 P3 19 AD57 P4 19 PMC_I O P1_20 AD31 P2_20 AD29 P3_20 GND P4_20 PMC_I O EIS AD28 P2_21 GND P3_21 VIO P4 21 PMC_I O P1 22 AD27 P2 22 AD26 P3 22 AD56 P4 22 PMC_I O P1 23 AD25 P2 23 AD24 P3 23 AD55 P4 23 PMC_I O P1 24 GND P2 24 3 3V P3_24 AD54 P4_24 PMC_I O P1 25 GND P2 25 IDSEL AD19 P3 25 AD53 P4 25 PMC_I O P1 26 C_BE3 P2_26 AD23 P3_26 GND P4_26 PMC_I O P1 27 AD22 P2 27 3 3V P3 27
2. SSD Controller SM2242 SD Interface NAND 4GB DisplayPort_B VGA CPCI J4 p 1 EM I 1 IMVP 7 VR FE i i gi l I I l I Chi i l Soldered I 8E DDR3 SDRAM ou e MES l 2GB Core i7 l D I l 2 generation l Si lt de ECC CPU l o Soldered 2C 4C BGA SA DDR3 SDRAM age en l i 2GB I l e I l I I I l l l l I 1 l l l I a 8 amp l o o I si sz 8 3 i ap 8 RC 11 r22 4 6CHlulll l l emee m MAN r 1 4 ne p n I n1 I Quad E I Gigabit Ethernet l a l i82580 Si z L SI E 5 51 i 3 gi I g 4 p 91 PCI E PCI X HotSwap Bridge PI7C9x130 Buffers r l I l I e l I LVDS DisplayPort D HDAUDIO PCH QM67 SMBUS DisplayPort C USB 0 3 Hardware pECIsI2C reci Monitor LM87 Translator See m r l SPI 1 8 HDD XMC Connectorj__ __ I Connector l P15 l i SEI PCLE PCI X i I CK505 BIOS Bridge Pox d PMS connector m P l 64 Mbit G4 BUG Mhz U l PI7C9x130 H 1 E E 4 l tJ o XMC Connector L T P16 LPC lamenm mm 4 g E i FPGA 5VS V3 3S SE l XC3S250 4 A l Ay gt Power l Switches J Edjector SE 4
3. ME 43 3 5 Local SMBus Devices ceo gode se see nesese penal so Ee RE Dr PETS EET HER ake RMA 43 ci Cl m 43 3 7 IPAJCCI Mm 43 4 rie rupe 44 4 1 Safety E IEN TEE A4 4 2 CPC508 Installation PDrocedure nnne nenne nennt rennen en ren enne rennen 45 4 3 Module Removal Procedure eeeeeseieeseeeeeeseeeeeenetn nnne nnne nnn erret nennen i nter enti teneret nre rnnt nnn 46 4 4 CPC503 Peripheral Devices Installation esseesseseseeeeeeeeenennneennnenneen nennen nene 46 4 4 1 USB Devices Installation enne eene enne nennen nennen nnns 47 4 4 2 Connection of devices to Rear I O module nene 47 4 4 3 Battery Fieplacerrierit ioco trece norte on ies n nie ERU co kb ka e a ADA kk 47 5 jets E an 48 5 1 Resetting BIOS Setup parameters using XP2 Iumper nennen 48 6 CPC503 module troubleshooting eeieeeeeeeeeeeee sisse seen n nenne nain nn annan naanannnannanasanananannnn 49 7 Power CONSUMPtION 50 8 Environmental exposure c 51 8 1 BR et ue EE 51 8 2 CPC503 operating conditions and MTBF ccescceeeceeeeeeeeeeeeeneeeeeeeeeaeeeeaeeeeaeeseaeeseeeeeaeeseeeeeeeeeeeeeeeeeee 51 9 Useful Abbreviations Acronyms and Short Cuts
4. MOV DX 310H OV AL 44H OUT DX AL OV DX 311H OV AL O1H OUT DX AL OV DX 312h OV AL 32h OUT DX AL e Reading the data byte from FRAM at the address 101h OV DX 310H OV AL O1H OUT DX AL MOV DX 311H MOV AL 10H OUT DX AL MOV DX 312h IN AL DX e Reading the packet of three data bytes from FRAM starting from the address 208h MOV DX 310H MOV AL 08H OUT DX AL OV DX 311H MOV AL 20H OUT Dx AL MOV DX 313h OV AL O18 OUT DX AL switching packet mode on MOV DX 312h IN AL DX reading the data byte at the address 208h PE AL DX reading the data byte at the address 209h IN AL DX reading the data byte at the address 20Ah MOV DX 313h MOV AL 00H OUT DX AL switching packet mode off CPC503 User Manual 42 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 4 3 FRAM The FRAM memory microchip with sequential access on SPI bus is installed on the module This non volatile memory is used for storage of BIOS settings and user parameters Access to the microchip is provided through SPI controller registers see subsection 3 4 1 Microchip size 32 KB last kilobyte is reserved for storage of service data and BIOS Setup parameters not available for user 3 5 Local SMBus Devices The CPC503 incorporates a System Management Bus to access several system moni
5. BT interface Block Transfer interface Block transfer interface for communication between control software and BMC CMC Common Mezzanine Card cPCI CompactPCl Industrial automation systems standard CRT display Cathode Ray Tube Display DAC Digital Analog Converter DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory DMA Direct Memory Access DVMT Dynamic Video Memory Technology ECC Error Correction Code Data error correction technology used in memory modules ECP EPP Extended Capabilities Port Enhanced Parallel Port Parallel port specifications EEPROM Electrically Erasable Programmable Read Only Memory EHCI Enhanced Host Controller Interface Universal Serial Bus specification EIDE Enhanced Integrated Drive Electronics Mass storage devices interface EOS Electrical Overstress ESD Electrostatically Sensitive Device Electrostatic Discharge FDD Floppy Disk Drive FWH Firmware Hub Nonvolatile memory chip part of Intel chipset used for main and reserve BIOS copies in CPC503 GMCH Graphics and Memory Controller Hub CPC503 User Manual 2012 Fastwel 53 Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel LE CPC503 HDD Hard disk drive cw Inter Integrated Circuit Two thread serial protocol used in SMB and IPMI IPMB Intelligent Plattorm Management Bus IPMI Intelligent Plattorm Management Interface KCS inte
6. c sccccssccesseeeeseeeeeeneesseseseeeeneeeesseeeeseaeseseeenseeeneas 53 10 AMI Aptio BIOS Setup CPC503 02 E 55 10 1 BIOS Setup start iiec rese e EU dE NEEN dE Het A Eae ad ad e ped dee whence us doc eR base ic ai np a pes 55 10 2 Elem 55 10 3 AQVANCCGS e DAY CA pk a 56 10 4 ENN S L fe nU eebe dee ee teg 69 10 5 EE 79 10 6 EIU EEUU 84 10 7 DAVE Gr EXC I ba Do kise men a e e a E da etann 85 List of tables Table 2 1 System Informaltioni EE 14 Table 3 1 Designation of XMC XS8 P15 Connector Pins on CPC503 Module Plate 00iirrrrevilreeeeerroeoorrretararasssnossaaone 22 Table 3 2 Designation of XMC XS9 P16 Connector Pins on CPC503 Module Plate 00iirrrrrvilrreeerrroeoorrrerararasasansnaaann 22 Table 3 3 PMC Connectors XS10 P11 XS11 P13 XS12 P12 and XS13 P14 Pinouts senes 24 Table 3 4 SATA Connector XP PINOUN EE 25 Table 3 5 USB Connectors Le 26 Table 3 6 Pinouts of Gigabit Ethernet Connectors iain tiene ditio accedi et cosa dici eos dative ae oaa co e aad pw kin 26 Table 3 7 DVI ConnectorXS5 Pino l 5 rtp br erri edis ri RU rer e erar ir ve vas ee eser se 27 Table 3 8 DisplayPort Connector XSG PINOUL kisaw k sote kwa cic ht neben nent nte a Cen Slo bna een oi e pk SA ea EN Re SAN nena EY 28 Table 3 9 CPC503
7. ED LU Select Screen 2 ti Select Icem 2 Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defaults Active Processor Cores A11 F4 Save amp Exit Limit CPUID Maximum Disabied ESC Exit Execute Disable Bit Enabled Intel Virtualization Technology Disabled Hardware Prefetcher Enabled 0 p H oo oun Hyper threading Enabled Disabled Enabled CPC503 User Manual 61 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Fastwel LE CPC503 Short cuts Active Processor Cores AII 1 Disabled Enabled Limit CPUID Maximum Enabled Disabled Execute Disable Bit Enabled Disabled Intel virtualization technology Enabled Disabled Disabled Enabled Hardware Prefetcher Enabled Disabled 10 3 5 SATA configuration SATA configuration configuration of SATA controllers and discs Fig 10 7 Screen of SATA configuration menu tab y COMA PuTTY Advanced Enable or disable SATA Device SATA Mode Selection AHCI SATA Test Mode Disabled Aggressive LPM Support Enabled SATA Controller Speed Default 5 Empty Unxnown Enabled External SATA SATA Device Type Serial ATA Port 1 Software Preserve Port 1 External SATA SATA Device Type Serial ATA Port 2 Software Preserve Port 2 External Serial ATA Software Port 3 External Serial ATA SATA Controller s Enabled Disabled Disabled Hard Disk Driver Empty Unknown Enabl
8. NC NC DRQ 1 12 GND GND HDA DOCK RST GND GND SERIRQ 13 MDI 3 2 MDI 3 2 HDA BIT CLK NC NC PCIRST 14 GND GND HDA SYNC GND GND A20 GATE 15 MDI 3 3 MDI 3 3 HDA SDOUT NC NC LPC CLK 16 GND GND HDA RST GND GND RC IN 17 USB4 USB4 HDA_SDINO NC NC SIO_CLK 18 GND GND HDA_SDIN1 GND GND SUSCLK 19 USB5 USB5 HDA_SPKR NC NC LPCBOOT CPC503 User Manual 22 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 2 1 2 PMC Interface PMC expansion modules are inserted into XS10 P11 XS11 P13 XS12 P12 and XS13 P14 connectors Figure 3 2 PMC XS10 P11 XS11 P13 XS12 P12 and XS13 P14 Connectors 64 bit PCI bus lines are routed to PMC connectors User defined input output signals are supported they are also routed to the CompactPCI J5 connector PMC interface complies with the IEEEP1386 1 specification which defines PCI electric interface for the boards of CMC Common Mezzanine Cards form factor CPC503 allows operation of PCI bus with PMC 3 3 V In order to reduce consumption currents PMC modules support can be disabled in BIOS Setup Note PMC input output signal are sent to the CompactPCI J5 connector which pins designation is described below in this chapter PMC connector pinouts follow on next page CPC503 User Manual 23 2012 Fastwel Ver 001a E Fastwel Le
9. menu tab Fig 10 2 Screen of the Advanced menu tab x COMA PuTTY Advanced PCI Subsystem Settings Configure Gigabit Ethernet ACPI Settings device parameters CPU Configuration Onboard Device SATA Configuration Thermal Configuration USB Configuration Super IO Configuration Serial Port Console Redirection CPU PPM Configuration Y www vy Intel R 82580 Gigabit Network Connection 00 08 B3 00 Intel R 82580 Gigabit Network Connection 00 08 B3 00 m Select Screen Intel R 82580 Gigabit Network Connection 00 08 B3 00 11 Select Item Intel R 82574L Gigabit Network Connection 00 08 B3 00 Enter Select Intel R 82574L Gigabit Network Connection 00 08 B3 00 Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit Intel R 82580 82574L Gigabit Network Informaation on network controllers Connection Then you can open menus described in the below sections CPC503 User Manual 56 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 10 3 1 Onboard Device Configuration The screen of this submenu is shown below Onboard Device Configuration Enable or Disable Onboard Gigabit 4 port LAN Onboard Gigabit LAN1 Direction PICMG 2 16 Onboard Gigabit LAN2 Direction PICMG 2 16 Onboard RIO Gigabit LAN O Enabled Onboard RIO Gigabit LAN i Enabled Autostart Mode Enabled PCI Cloc
10. 230 The maximum temperature at which there is no reduction of CPU operating frequency During measurements the module was installed in the CPCI 6U Schroff chassis with deflector 8 2 CPC503 operating conditions and MTBF The product keeps its operability upon the following climatic and mechanical actions CPC503 User Manual 51 2012 Fastwel Ver 001a E Environmental exposure Fastwel Lee CPC503 Table 8 3 Environmental exposure Change of temperatures at relative m 40 C 0 Ng p i e temperature GOST 28209 89 humidity up to 80 without moisture High IEC 68 2 14 84 d ti a condensation temperature 85 C 70 range He mam 10 500 Sinusoidal vibration range Hz eant SSES l Peak T 28213 89 IEC n Multiple shocks acceleration g GOST 28215 89 IEC shocks For commercial design version The CPC503 module s mean time between failures MTBF is not less than 60 000 hours CPC503 User Manual 52 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel LE CPC503 9 Useful Abbreviations Acronyms and Short cuts ACPI Advanced Configuration and Power Interface AGP Accelerated Graphics Port AGTL Advanced Gunning Transceiver Logic PSB Processor Side Bus signal exchange specification AHA Accelerated Hub Architecture GMCH and ICH communication bus specification BIOS Basic Input Output System BMC Baseboard Management Controller
11. Select Change Opt General Help Previous Values Optimized Defaults Save amp Exic ESC Exit EIST Enabled Disabled Enabled ko 10 4 Chipset Chipset configuring system logic components CPC503 User Manual 69 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Le CPC503 Fig 10 14 Screen of the Chipset menu tab i COMA PuTTY Ati Chipset b System Agent SA Configuration 10 4 1 System Agent SA configuration PCH Parameters Select Screen tj Select Item Enter Select Change Opt F1 General Help Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit System Agent SA configuration memory and graphics subsystem confoguration CPC503 User Manual 70 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 Fig 10 15 Screen of the System Agent SA configuration menu tab Check to enable VI d function on MCH Enable NB CRID Disabied gt Graphics Configuration gt NB PCIe Configuration b Memory Configuration Select Screen ti Select Item Enter Select Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit System Agent Bridge Name IvyBridge m VT d Capability Supported VT d Enabled Disabled Enabled Enable NB CRID Disabled Enabled Disabled 10 4 1 1 Graphics Confi
12. 7 0 Base 1 R W 00h FRAM address value 14 8 Base 2 R W 00h SPI data value 7 0 Base 3 R W 00h SPI Control Status register 7 busy status 6 last 1K fram lock status 5 Reserved 4 Reserved 3 Reserved 2 Reserved 1 Reserved 0 BURST mode Base 4 R W 00h Reserved Base 5 R W 00h RIO GPIO Direction 7 6 Reserved 5 0 GPIO Direction 0 input 1 output Base 6 R W 00h RIO GPIO DATA 7 6 Reserved 5 0 GPIO DATA Base 7 R W 00h User LEDs control 7 2 Reserved 2 RIO LED On oFF 1 GREEN LED On Off 0 RED LED On off The controller automatically generates the sequence of access to FRAM memory on SPI bus address from BASE 0 BASE 1 registers read write mode and data BASE 2 register The last kilobyte out of 32 KB is reserved for storage of BIOS Setup parameters lt 0 gt bit in the control register Base 3 includes the mode of automatic address increase when reading writing the data register Base 2 Upon completion of packets exchange it should be reset CPC503 User Manual 2012 Fastwel 41 Ver 001a E Detailed Description Fastwel Lee CPC503 3 4 2 SPI device programming Operations with FRAM are conducted in the I O area at the following addresses 310h 313h e Writing the data byte 82h in FRAM at the address 144h
13. 8 GT s routed to P15 XMC connector supporting up to x8 devices PCI E 2 0 up to 5 GT s routed to CPCI J3 P3 connector supporting up to x4 devices XMC compatible with ANSI VITA 42 3 specification SMBUS conforms to 2 0 specification Speed up to 100 Kbit s E FLASH BIOS 64 Mbit SPI Flash WB NAND FLASH disc integrated 4 channel NAND controller up to 100 MB s connected to SATA4 interface NAND soldered 4 GB CPC503 01 8 GB CPC503 02 B SATA interface one channel is available at P16 XMC connector one channel is used for connection of 1 8 HDD in the scope of delivery is not included two channels are available via RIO module SPI interface support of FRAM frequency up to 25 MHz W Four LAN 10 100 1000 Mbit ports on PCI E x4 Gen2 two ports switchable between P16 XMC connector and RIO module two ports available at the front panel PICMG 2 16 support Server network adapter W USB ports support of USB 1 1 12 Mbit s USB 2 0 480 Mbit s connection of up to 4 devices via front panel interfaces 2x interfaces are routed to P16 XMC connector 2x USB 3 0 interfaces are routed to P16 XMC for CPC503 02 6x interfaces are routed to RIO module m FRAM memory 32 KB 1 KB for BIOS Setup parameters storage and 31 KB for storage of user data realized on SPI bus W Real time clock power supply from CR2032 battery 3 V W Audio support HD Audio interface is availab
14. DVMT total Gfx Mem 128M 256M MAX Maximum available RAM capacity used by video subsystem driver CPC503 User Manual 72 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel EECH CPC503 Gfx Low Power Mode Enabled Disabled Reducing graphics kernel heat Enabled dissipation due to the loss of efficiency LCD control configuration of LVDS displays Fig 10 17 Screen of the LCD control menu tab gi COM4 PuTTY Chipset LCD Control Select the Video Device which will be activated during POST This has no effect if external LCD Panel Type VBIOS Default SDVO LFP Panel Type VBIOS Default Panel Scaling Auto selection will appesr based on Active LFP No LVDS your selection Panel Color Depth 18 Bit VGA modes will be supported only on primary display Select Screen ta Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit Primary IGFX boot display VBIOS VBIOS Default Default CRT EFP LFP EFP3 EF 2 LFP2 LCD Panel Type 640x480 800x600 1 024x768 VBIOS Default 1280x1024 1400x1050 1600x1200 1366x768 1680x1050 1920x1200 1440x900 1920x1080 2048x1536 SDVO LFP Panel Type VBIOS Default Active LFP No LVDS Int LVDS SDVO LVDS eDP No LVDS Port A eDP Port D TEN pon 10 4 1 2 NB PCle Configuration NB PCle configuration PCI Express bus configuration CPC503 User Manual 7
15. GND P4 27 PMC_I O P1 28 AD21 P2_28 AD20 P3_28 AD52 P4_28 PMC_I O IESSE AD19 P2 29 AD18 P3 29 AD51 P4 29 PMC_I O P1_30 VCC P2_30 GND P3_30 AD50 P4 30 PMC_I O P1_31 VIO P2 31 AD16 P3 31 AD49 P4 31 PMC_I O P1_32 AD17 P2_32 C_BE2 P3_32 GND P4_32 PMC_I O P1_33 FRAME P2_33 GND P3_33 GND P4_33 PMC_I O P1 34 GND P2 34 IDSELB AD20 P3 34 AD48 P4 34 PMC_I O P1 35 GND P2 35 TRDY P3_35 AD47 P4_35 PMC_I O P1 36 IRDY P2_36 3 3V P3 36 AD46 P4 36 PMC_I O Pi_ 37 DEVSEL P2_37 GND P3_37 AD45 P4 37 PMC_I O P1_38 VCC P2_38 STOP P3_38 GND P4_38 PMC_I O P1539 GND P2_39 PERR P3_39 VIO P4 39 PMC_I O P1_40 LOCK P2_40 GND P3_40 AD44 P4_40 PMC_I O P1 41 SCL P2_41 3 3V P3 41 AD43 P4 41 PMC_I O P1 42 SDA P2 42 SERR P3_42 AD42 P4_42 PMC_I O P1 43 PAR P2 43 C_BE1 P3 43 AD41 P4 43 PMC_I O P1 44 GND P2 44 GND P3 44 GND P4 44 PMC_I O P1 45 VIO P2 45 AD14 P3 45 GND P4 45 PMC_I O P1 46 AD15 P2 46 AD13 P3 46 AD40 P4_46 PMC_I O P1_47 AD12 P2_47 M66EN P3_47 AD39 P4_47 PMC_I O P1 48 AD11 P2 48 AD10 P3 48 AD38 P4 48 PMC_I O P1 49 AD9 P2 49 AD8 P3 49 AD37 P4 49 PMC_I O P1_50 VCC P2_50 3 3V P3_50 GND P4_50 PMC_I O P1 51 GND P2 51 AD7 P3_51 GND P4_51 PMC_I O Pi 52 C BEO P2 52 NC P3 52 AD36 P4 52 PMC_I O P1_53 AD6 P2_53 3 3V P3_53 AD35 P4_53 PMC_I O P1 54 AD5 P2 54 NC P3 54 AD34 P4 54 PMC_I O P1_55 AD4 P2_55 NC P3_55 AD33 P4_55 PMC_I O P1_56 GND P2_56 GND P3_56 GND P4_56 PMC_I O Pi 57 VIO P2_57 NC P3_57 VIO P4 57 PMC_I O P1 58 AD3 P2_58 EREADY P3_58 AD32 P4_58 PMC_I O P155
16. PMC XMC Interface 21 39 24 1 Adler 21 3 2 1 2 IPMGInterface iret Dept CECR dine cy ek an aka yn 23 3 2 2 Rn ne 25 3 2 3 Connectors on CPC503 Front Panel 25 3 2 3 1 ET 25 3 2 3 2 Gigabit EtNEMO einer ol pk rade edt ea steer SEO 26 3233 EE DEE 27 3 2 3 4 DisplayPort iid ee ee ee 28 3 2 4 LED Indicators on CPC503 Front Panel 28 3 2 5 CompactPCI lun EE 29 3 2 5 1 Operation in the System Slot System Master 29 3 2 5 2 Operation in the Peripheral Slot Slave Mode 30 3 2 5 8 Packet Switching Backplane PICMG 216 30 3 2 54 Handle SwItCh eci fe trier Ieri eerte tne f ou Tee ote paka ep kn 30 3 2 5 5 Power supply mode LED GV ENEE 30 CPC503 User Manual 1 2012 Fastwel Ver 001a E Fastwel Lee CPC503 3 2 6 GomipaciP Ol elle 31 3 2 6 1 CompactPCI Connector Color Coding seeeeeneenenennns 32 3 2 6 2 CompactPCI Connectors XS17 and XS16 binouts 33 3 2 6 8 CompactPCl Input Output Connectors XP9 X815 and XS14 J3 J5 and Designation of Their Pins eem ener nnne 35 EPI eC 38 3 3 1 Watchdoq Bn R 38 I O Registers of the WDT Controller ssesssesseeeeeneeneenenennneen nennen nennen 39 294 X SPlGontolerZEEDSs RER oiii rt eege d ses 41 3 4 1 SPI Controller Registers Description 41 3 4 2 SPI device programming 42 3 4 3 dull
17. back of the system chassis CPC503 User Manual 13 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 2 6 System Information Table 2 1 System Information Operation in the system slot CPC503 module is designed for use as the system master It can support as the System Master up to seven peripheral boards via the 64 bit 33 66 MHz bus It may however be operated in a peripheral slot In this case CPC503 is connected to PCI bus via the nontransparent bridge Operation in the system When installed in the system peripheral slot CPC503 module is peripheral slot connected to PCI bus via the nontransparent bridge CPC503 receives power from the backplane and can be operated with Rear I O and in the packets switching mode if the system supports this mode supporting up to two Gigabit Ethernet channels Operating systems CPC503 can work in the following operating systems Linux 2 6 QNX 6 5 0 Windows 7 Windows embedded standard 7 2 7 CPC503 Diagrams The diagrams in this section give visual information about the CPC503 module design its appearance connectors and components layout The diagrams may not reflect insignificant differences between the CPC503 versions v CPC503 User Manual 14 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 2 7 1 Block Diagram Figure 2 2 CPC503 Block Diagram
18. for repair charges at current standard labor and materials rates Warranty period for Fastwel products is 36 months since the date of purchase The warranty set forth above does not extend to and shall not apply to 1 Products including software which have been repaired or altered by other than Fastwel personnel unless Buyer has properly altered or repaired the products in accordance with procedures previously approved in writing by Fastwel 2 Products which have been subject to power supply reversal misuse neglect accident or improper installation Returning a product for repair 1 Apply to Fastwel company or to any of the Fastwel s official representatives for the Product Return Authorization 2 Attach a failure inspection report with a product to be returned in the form accepted by customer with a description of the failure circumstances and symptoms 3 Carefully package the product in the antistatic bag in which the product had been supplied Failure to package in antistatic material will VOID all warranties Then package the product in a safe container for shipping 4 The customer pays for shipping the product to Fastwel or to an official Fastwel representative or dealer CPC503 User Manual 7 2012 Fastwel Ver 001a E Introduction CPC503 1 Introduction 1 1 System Overview The CompactPCI CPCI processor module described in this Manual supports the PCI architecture It gives a possibility to work
19. inserted into the backplane up to the stop The module is inserted into the peripheral slot and RESET signal is active on PCI bus Make sure of the operability of the module inserted into the system slot The module fails to start SYS LED flashes green quickly 78 Hz 1 BIOS is absent or corrupted 2 The module is out of order Refer to service center The module fails to start SYS LED flashes slowly 1 Hz the module emits acoustic signals 1 BIOS execution failed before starting the OS INT19H 2 BIOS is corrupted 1 Reset the BIOS Setup parameters using XP2 jumper 2 Refer to service center CPC503 User Manual 49 2012 Fastwel Ver 001a E Power consumption Fastwel Lee CPC503 7 Power consumption The modules power supply should be carried out from the external direct current source with the following characteristics Table 7 1 Supply voltage 5 V 3 3 V 12 V 12 V from CPCI bus 5 4 75 5 25 12 11 4 12 6 12 12 6 11 4 3 3 3 15 3 46 The modules consumption current without regard to supply of external circuits does not exceed the values specified in the table below Table 7 2 Modules consumption current CPC503 172C1 5 4 6 0 1 CPC503 172C2 2 4 8 0 1 CPC503 I74C2 1 4 13 0 1 CPC503 User Manual 50 2012 Fastwel Ver 001a E Environmental exposure Fastwel Lee CPC503 8 Environment
20. owned by Fastwel Co Ltd Moscow Russian Federation CompactPCl is a trademark of the PCI industrial Computers Manufacturers Group Ethernet is a registered trademark of Xerox Corporation IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers Inc Intel is a trademark of Intel Corporation Pentium M and Celeron M are trademarks of Intel Corporation Microsoft is a trademark of the Microsoft corporation In addition this document may include names company logos and trademarks which are registered trademarks and therefore are property of their respective owners Fastwel welcomes suggestions remarks and proposals regarding the form and the content of this Manual CPC503 User Manual 3 2012 Fastwel Ver 001a E Fastwel Lee CPC503 Notation Conventions Warning ESD Sensitive Device This symbol draws your attention to the information related to electro static sensitivity of your product and its components To keep product safety and operability it is necessary to handle it with care and follow the ESD safety directions Warning This sign marks warnings about hot surfaces The surface of the heatsink and some components can get very hot during operation Take due care when handling avoid touching hot surfaces Caution Electric Shock This symbol warns about danger of electrical shock gt 60 V when touching products or parts of them Failure to observe the indicated precautions and direc
21. the product Initial Inspection Although the product is carefully packaged it is still possible that shipping damages may occur Careful inspection of the shipping carton can reveal evidence of damage or rough handling Should you notice that the package is damaged please notify the shipping service and the manufacturer as soon as possible Retain the damaged packing material for inspection After unpacking the product you should inspect it for visible damage that could have occurred during shipping or unpacking If damage is observed usually in the form of bent component leads or loose socketed components contact Fastwel s official distributor from which you have purchased the product for additional instructions Depending on the severity of the damage the product may even need to be returned to the factory for repair DO NOT apply power to the product if it has visible damage Doing so may cause further possibly irreparable damage as well as result in a fire or electric shock hazard If the product contains socketed components they should be inspected to make sure they are seated fully in their sockets CPC503 User Manual 6 2012 Fastwel Ver 001a E Fastwel EE CPC503 Handling In performing all necessary installation and application operations please follow only the instructions supplied by the present manual In order to keep Fastwel s warranty you must not change or modify this product in any way other than specifi
22. 3 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 Fig 10 18 Screen of the NB PCle Configuration menu tab y COMA PuTTY NB PCIe Configuration Configure PEGO BO D1 FO PEGO Not Present Geni Gen3 PEG x4 Gen2 Auto x4 Genl PEG2 Gen X Auto Detect Non Compliance Device Disabled De emphasis Control 3 5 dB Select Screen ti Select Item Select Change Opt General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit D PEGO PCle operation mode EE PEG1 2 PCle operation mode x4 Gen2 1 PEGO 1 2 Gen X Auto Gen1 Gen2 Possibility to manually specify th speed of communication with PCIE device Detect Non Compliance Device The Enabled setting makes it Disabled possible to solve problems using non standard devices De emphasis Control 3 5 dB 6 dB Possibility to select amplification coefficient for reducing BER Bit Error Rate 10 4 1 3 Memory Configuration Memory configuration Information and memory settings CPC503 User Manual 74 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Le CPC503 Fig 10 19 Screen of the Memory Configuration manu tab if COMA PuTTY Enable or disable DDR Ecc Support Minimum delay time CAS to RAS Row Precharge ti i Active to Precharge rRASmin 28 Select Screen XMP Profile 1 L up e ti Select Item XMP Profile 2 Not Su
23. 9 AD2 P2259 GND P3 59 NC P4 59 PMC UO P1 60 AD1 P2 60 RSTOUT P3_60 NC P4_60 PMC_I O Pi Gi ADO P2_61 ACK64 P3_61 NC P4_61 PMC_I O P1 62 VCC P2 62 3 3V P3_62 GND P4_62 PMC_I O P1_63 GND P2_63 GND P3_63 GND P4_63 PMC_I O P1 64 REQ64 P2_64 NC P3_64 NC P4_64 PMC_I O CPC503 User Manual 2012 Fastwel Ver 001a E 24 Detailed Description Fastwel Lee CPC503 3 2 2 SATA Interface XP7 connector located on the top side of CPC503 module plate see Figure CPC503 Module Layout Top Side allows connecting the 1 8 drive with SATA interface to CPC503 module It is possible to install a 5 mm high drive together with PMC MMC expansion module Table 3 4 SATA Connector XP7 Pinout XP7 Pin Sina S1 GND S2 TX S3 TX S4 GND S5 RX S6 RX S7 GND P1 3 3V P2 3 3V P3 GND P4 GND P5 5V P6 5V P7 NC P8 NC P9 NC 3 2 3 Connectors on CPC503 Front Panel 3 2 3 1 USB CPC503 contains 12 USB 2 0 ports four of which are located on the front panel see Figure CPC503 Module Dimensions CPC503 4HP Front Panel and Figure CPC503 8HP Front Panel All ports support high speed full speed and low speed operation Hi speed USB 2 0 supports data transfer rate of up to 480 Mb s One USB device may be connected to each port To connect more than eight USB devices use an external hub The USB power supply is protected by a self resettable 500 mA fuse Figure 3 3 USB Connectors on CPC503 F
24. 9 XS15 XS14 Fees DVI I USB3 USB2 USB1 USBO Eth2 Eth1 x d IS elle RERO KT d Bo 9 2 i ki A a ge gu The appearance may vary for different versions of the module Figure 2 6 CPC503 8HP Front Panel Displayport DVI I USB3 USB2 USB1 USBO Eth2 Eth1 I sy AS elis Pde tT ey yy pel ty fe io fel fy fe die elf fe ns IT ll EME Te OVH SA GP Wi 42 CPC503 User Manual 18 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 Detailed Description 3 1 Functional Nodes Operation Features W Intel Core i7 2nd generation processor 64 bit Intel microprocessor is designed according to the 32 nm technology It represents a highly integrated solution combining 2 4 processor cores as well as the SDRAM DDRS two channel controller with ECC memory support and graphics adapter with 3D 2D acceleration Microprocessor is oriented on the embedded systems market and is made in BGA chassis PCH QM67 chipset The highly integrated interfaces controller includes the standard IBM PC AT platform peripherals USB SATA SPI LPC SMBUS Audio DisplayPort VGA DVI m Random access memory The module may have up to 4 Gb of DDR3 1333 memory with ECC two channel No memory expansion module installation is applicable m B
25. CI Pre Boot Driver support xHCI Mode Smart Auto HS Port 1 Switchable Enabled HS Port 2 Switchable Enabled HS Port 3 Switchable Enabled HS Port 4 Switchable Enabled xHCI Streams Enabled EHCI1 nabled EHCI2 Enabled Select Screen USB Ports Per Port Disabie Control Disabled ti Select Item Enter Select Change Opt General Help Previous Values Optimized Defaults Save amp Exit ESC Exit XHCI Pre Boot Driver Support of USB 3 0 at BIOS level Enabled USB 3 0 operating mode in BIOS Disabled all the ports are in USB 2 0 mode Enabled All the ports are in USB 3 0 mode operating system driver support is required Auto USB 2 0 mode at the BIOS nd stage then USB 3 0 if there is support from operating system driver Smart Auto USB 2 0 mode at cold start If operating system has USB 3 0 support the ports will remain to be in the USB 3 0 mode after reboot Individual switching of the ports Enabled HS Port 1 2 3 4 Switchable from USB 3 0 to USB 2 0 modes Additional buffering support for Enabled xHCl Streams high speed USB 3 0 storage devices CPC503 User Manual 78 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel XE CPC503 EHCI1 Enabled Disabled Possibility to switch off EHCI1 Enabled controller EHCI2 Enabled Disabled Possibility to switch off EHCI2 Enabled controller USB Ports Per Port Disable Control Possibility to indiv
26. CPC503 3 2 6 CompactPCI Connectors Figure 3 8 CompactPCI connectors J1 J5 in accordance with the CompactPCI specification 22 eg Ob The complete set of CompactPCI connectors consists of five connectors AATA from J1 to J5 Their functional are as follows EEENE XS14 EAEI p KEREN W J1 and J2 64 bit CompactPCI interface including PCI bus J5 Kevin i a GER signals arrangement of access to the bus synchronization 42444 and power BERE m X J3has Rear I O and PICMG 2 16 interface functionality J4 and J5 ensure additional functions of Rear I O interface N Da Li Ei EI H KERE The CPC503 module is designed in accordance with CompactPCI bus 4 4 architecture The CompactPCI standard is electrically identical to the XS15 ED PCI local bus however these systems are improved to allow their use 44 raa in harsh industrial environment with increased number of expansion Kkkkk connectors 1 i LI LI x XP9 SSES J3 rarer ES S D LI XS16 i J2 ake N a gt m n LI XS17 J1 DC CC Note EE E Pinrows rh Fand Z 1 EPEPE are EDCBA GND pins F Z CPC503 User Manual 31 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 2 6 1 CompactPCI Connector Color Coding Guide lugs on CompactPCI connectors serve to ensure a correct mating of connectors A proper mating is guaranteed also by the use of
27. D_SDIN2 HDA_RST GND 21 HDA_SDOUT HDA_SDIN3 GND GND GND GND 22 HDA_BIT_CLK HDA SYNC GND GPIOO GPIOS GND 23 RIO LED RSTIN 5V GPIO1 GPIO4 GND 24 GND GND 3 3V GPIO2 GPIO5 GND 25 NC LAN1_DISABLE LAN2 DISABLE NC NC GND CPC503 User Manual 36 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Table 3 15 J5 Connector XS14 Pinout XS14 LESE NENNEN CEU EST UNE UNE NEN SU 1 LPC ADO GND 3 3V GND 5V_IN GND 2 LPC_AD1 GND 3 3V GND 5V_IN GND 3 LPC_AD2 GND 5V GND 5V_IN GND 4 LPC_AD3 GND 5V GND 5V_IN GND 5 LPC_FRAME GND SUSCLK GND 5V_IN GND 6 DRQO GND SIOCLK GND 5V_IN GND 7 DRQ1 GND A20GATE GND 5V_IN GND 8 SERIRQ GND LPCCLK GND 5V_IN GND 9 PCIRST GND RCIN GND 5V_IN GND 10 VI O PMC 1063 PMC 1062 PMC 1061 PMC 1060 GND 11 PMC 1059 PMC 1058 PMC 1057 PMC 1056 PMC 1055 GND 12 PMC 1054 PMC 1053 PMC 1052 PMC 1051 PMC 1050 GND 13 PMC 1049 PMC 1048 PMC 1047 PMC 1046 PMC 1045 GND 14 PMC 1044 PMC 1043 PMC 1042 PMC 1041 PMC 1040 GND 15 PMC 1039 PMC 1038 PMC 1037 PMC 1036 PMC 1035 GND 16 PMC 1034 PMC 1033 PMC 1032 PMC 1031 PMC 1030 GND 17 PMC 1029 PMC 1028 PMC 1027 PMC 1026 PMC 1025 GND 18 PMC 1024 PMC 1023 PMC 1022 PMC 1021 PMC 1020 GND 19 PMC 1019 PMC 1018 PMC 1017 PMC 1016 PMC 1015 GND 20 PMC 1014 PMC 1013 PMC 1012 PMC 1011 PMC 1010 GND 21 PMC 109 PMC 108 PMC 107 PMC 106 PMC 105 GND 22 PMC 104 PMC 103 PMC 102 P
28. Fastwel T CPC503 6U CompactPCl Processor Module User Manual Rev 001b E June 2014 The product described in this manual is compliant with all related CE standards Product Title CPC503 Document name CPC503 User Manual Manual version 001b E Ref docs CPC503 UM v0 02 R IMES 421459 503 RE Copyright 2014 Fastwel Co Ltd All rights reserved Revision Record 001 Initial version CPC503 June 2012 001a Changes in the delivery checklist CPC503 December 2012 001b Description of key parameters and BIOS for CPC503 02 has CPC503 June 2014 been addded Contact Information Fastwel Co Ltd Fastwel Corporation US Address 108 Profsoyuznaya st 55 Washington St 310 e Sook NY 11201 Tel 7 495 232 1681 1 718 554 3686 Fax 7 495 232 1654 1 718 797 0600 Toll free 1 877 787 8443 1 877 RURUGGED E mail info fastwel com Web http www fastwel com Fastwel Lee CPC503 Table of Contents List of TablesTable of Contents 2 2 eiectus eden tar Ren eet cu nena dee Leo cete ERR and ia ka den di pa e HER KRAN ea ties 1 EISEOT TAB OS es ete v t RE 1 kISTIOT elle 3 Notation Conventions tite ee e Ap RA k nn de pa aa G RARA en e n pk an sia non an PRA ak pa anyone 4 General Safety PreCautions kA 5 Unpacking Inspection and Handling 6 Three Year Warranty EE 7 1 Ui ee UL e EE 8 1 1 Ee 8 1 2 General D
29. GND 10 GND AD 21 GND 3 3V AD 20 AD 19 GND 9 GND C BE 3 SHRT_GND AD 23 LNG_GND AD 22 GND 8 GND AD 26 GND VIO AD 25 AD 24 GND 7 GND AD 30 AD 29 AD 28 LNG_GND AD 27 GND 6 GND REQO GND LNG_3 3V CLKO AD 31 GND 5 GND BRSVP1A5 BRSVP1B5 RST LNG_GND GNTO GND 4 GND IPMB_PWR HEALTHY LNG_VIO INTP INTS GND 3 GND INTA INTB INTC LNG_5V INTD GND 2 GND TCK 5V TMS TDO TDI GND 1 GND 5V 12V TRST 12V 5V GND CPC503 User Manual 33 2012 Fastwel Ver 001a E Detailed Description Fastwel LE CPC503 Table 3 12 64 bit CompactPCI Bus Connector J2 X916 System Slot Pinout XS16 22 GND GA4 GA3 GA2 GA1 GAO GND 21 GND CLK6 GND RSV RSV RSV GND 20 GND CLK5 GND RSV GND RSV GND 19 GND GND GND RSV RSV RSV GND 18 GND BRSVP2A18 BRSVP2B18 BRSVP2C18 GND BRSVP2E18 GND 17 GND BRSVP2A17 GND PRST REQ6 GNT6 GND 16 GND BRSVP2A16 BRSVP2B16 DEG GND BRSVP2E16 GND 15 GND BRSVP2A15 GND FAL REQ5 GNT5 GND 14 GND AD 35 AD 34 AD 33 GND AD 32 GND 13 GND AD 38 GND VIO AD 37 AD 36 GND 12 GND AD 42 AD 41 AD 40 GND AD 39 GND 11 GND AD 45 GND VIO AD 44 AD 43 GND 10 GND AD 49 AD 48 AD 47 GND AD 46 GND 9 GND AD 52 GND VIO AD 51 AD 50 GND 8 GND AD 56 AD 55 AD 54 GND AD 53 GND 7 GND AD 59 GND VIO AD 58 AD 57 GND 6 GND ADI 63 AD 62 AD 61 GND ADI 60 GND 5 GND C BE 5 GND VIO C BE 4 PAR64 GND 4 GND VIO B
30. IOS SPI bus based 64 Mbit Flash microchip or two 32 Mbit chips is used for BIOS RTC CMOS The real time clock is embedded into PCH When the supply is off the clock operability is ensured by a lithium battery installed on board BIOS Setup settings are saved in FRAM FRAM Non volatile 32 KB memory can be used for storage of user data and for BIOS SETUP parameters 1 Kb for BIOS Setup parameters storage 31 Kb for storage of user data Realized on SPI bus W NAND Flash 4 GB SSD is implemented on board on SATA interface integrated 4 channel NAND controller up to 100 MB s connected to SATA4 interface E Ethernet CPC503 module contains 4 integrated Gigabit Ethernet interfaces Two of them are switched between P16 XMC connector or backplane PICMG 2 16 The switching is performed in BIOS Setup menu Two controllers are routed to the front panel The interfaces are implemented on Intel i82580 the high speed server controller Note If the Gigabit Ethernet channel output is configured for the backplane PICMG 2 16 the Gigabit Ethernet interfaces on P16 XMC corresponding to this channel will be disabled CPC503 User Manual 19 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 mH USB 2 0 The module has 12 USB 2 0 channels 4 channels are routed to USB type A interfaces on the front panel 2 channels are routed to XMC and 4 to RIO module m SATA Four interfaces for connection
31. MC 101 PMC 100 GND CPC503 User Manual 37 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 3 Timers CPC503 is equipped with the following timers H RTC Real Time Clock PCH includes the battery powered real time clock H Watchdog Timer 3 3 1 Watchdog Timer Programmable the watchdog timer is realized in FPGA and an LPC bus device WDT is enabled and IRQ is selected in BIOS Setup WDT consists of the counter register Timer Current Value Register decremented with 32 768 KHz frequency and initial value register Timer Initial Value Register It is possible to set the timeout period from 0 to 512 seconds with increments of 30 52 us by changing the value in this register On zeroing the counter either an interrupt is generated or the Reset of the module occurs on double zeroing By default WDT is inactive The equation below can be used to calculate the timeout Twp in us as a function of the decimal value in the WD register Kwo Two us Kwo 10 2 For example decimal value 1 of Kwp 000001h corresponds to the timeout of 30 52 us and Kwp 16777215 FFFFFFh 512 seconds WDT is reset in different ways 1 Write any value to the counter register Timer Current Value Register 2 Write any value to 80h port the mode is enabled in BIOS Setup and is active only if access cycles to the port 80h are translated to LPC bus After the first expiry of the time
32. Module SYS LED Giate EE 29 CPC503 User Manual 2 2012 Fastwel Ver 001a E Fastwel Lee CPC503 Table 3 10 Table 3 11 Table 3 12 Table 3 13 Table 3 14 Table 3 15 Table 3 16 Table 3 17 Table 6 1 Table 7 1 Table 7 2 Table 8 1 Table 8 2 Table 8 3 List of Figures Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 2 6 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 3 5 Figure 3 6 Figure 3 7 Figure 3 8 Figure 10 1 Figure 10 2 Figure 10 3 Figure 10 4 Figure 10 5 Figure 10 6 Figure 10 7 Figure 10 8 Figure 10 9 Figure 10 10 Figure 10 11 Figure 10 12 Figure 10 13 Figure 10 14 Figure 10 15 Figure 10 16 Figure 10 17 Figure 10 18 Figure 10 19 Figure 10 20 Figure 10 21 Figure 10 22 Figure 10 23 Figure 10 24 Figure 10 25 Figure 10 26 Figure 10 27 CompactPCI Connector Coding Colors nennen nennen eterne nnne nnns 32 CompactPCI Bus Connector J1 XS17 System Slot Pinout nene 33 64 bit CompactPCI Bus Connector J2 XS16 System Slot Pinout esee 34 J3 Connector XPO PIROUL edis cere cerea erede eka ek Sb espe baec a ak aAa RR EE Esa adana na ed EAE Ree paka J4 Connector X815 Pinout Ges P ER m ius J5 Connector Pearson M ee Weer SMBus D6Vices tri ci Eee ab ka LO REESE ka kaa kan NECK ke eka e R K CES ka a EFE DTE Mee ex EIS ENEE an AS Ek pea CPC503 malfunctions reasons and ways of their elminaton e Su
33. OC10_11 USB8 USB8 GND 11 USB11 USB11 GND USB9 USB9 GND 12 USB7 USB7 GND USB10 USB10 GND 13 USB6 USB6 GND USB OC 6 7 USB OC 8 9 GND 14 NC NC PCIERST NC NC GND 15 ETH2 1 ETH2 1 GND ETH2 3 ETH2 3 GND 16 ETH2 O ETH2_0 GND ETH2 2 ETH2 2 GND 17 ETH1 1 ETH1 1 GND ETH1 3 ETH1 3 GND 18 ETH1_0 ETH1_0 GND ETH1 2 ETH1 2 GND 19 NC NC WAKE NC NC GND CPC503 User Manual 35 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Table 3 14 J4 Connector X915 Pinout XS15 pm 8 fs e se 1 GND GND DP HPD GND GND GND 2 DP_LANE3 DP_LANE3 GND eDP TXO eDP_TX0 GND 3 DP_LANE2 DP_LANE2 GND eDP TX1 eDP_TX1 GND 4 DP_LANE1 DP_LANE1 GND eDP_TX2 eDP_TX2 GND 5 DP LANEO DP LANEO GND eDP TX3 eDP_TX3 GND 6 DP_AUX DP_AUX GND eDP_AUX eDP_AUX GND 7 DP_CTRL_CLK DP_CTRL_DAT GND GND GND GND 8 GND GND eDP_HPD LVDSB_CLK LVDSB_CLK GND 9 LVDSA_CLK LVDSA_CLK GND LVDSB_DO LVDSB_D0 GND 10 LVDSA Do LVDSA DO GND LVDSB D1 LVDSB Di GND 11 LVDSA D1 LVDSA_D1 GND LVDSB_D2 LVDSB_D2 GND 12 GND 13 GND 14 GND 15 LVDSA_D2 LVDSA_D2 GND LVDSB_D3 LVDSB_D3 GND 16 LVDSA_D3 LVDSA_D3 GND GND GND GND 17 GND GND BKLT_CTRL CTRL_CLK CTRL_DAT GND 18 BKLT_EN VDD_EN GND GND GND GND 19 LVDS DDC CLK LVDS DDC DAT GND HAD_SDIN1 HDA_SPKR GND 20 GND GND SDINO HA
34. RSVP2B4 C BE 7 GND C BE 6 GND 3 GND CLK4 GND GNT3 REQ4 GNT4 GND 2 GND CLK2 CLK3 SYSEN GNT2 REQ3 GND 1 GND CLK1 GND REQ1 GNT1 REQ2 GND CPC503 User Manual 34 2012 Fastwel Ver 001a E Fastwel Lee Detailed Description CPC503 3 2 6 3 CompactPCI Input Output Connectors XP9 XS15 and XS14 J3 J5 and Designation of Their Pins On CPC503 a part of I O signals is transmitted via XP9 XS15 and XS14 connectors The module plate provides additional possibilities for connection of peripheral I O devices in special purpose compact systems Special backplane is required for the use of Rear I O module CPC503 module and its XP9 XS15 and XS14 connectors are compatible with all standard 6U CompactPCI backplanes with UO support via corresponding connectors in the system slot Designation of the XP9 J3 connector pinouts complies with the PICMG 2 16 standard Table 3 13 J3 Connector XP9 Pinout XP9 Ca e DUNS SS INS S CEST US 1 GND GND 45V GND GND GND 2 SATAO RX SATAO RX GND SATA1 RX SATA1 RX GND 3 SATAO TX SATAO TX GND SATA1 TX SATA1_TX GND 4 GND GND 5V GND GND GND 5 PCIE RX5 PCIE_RX5 GND PCIE RX6 PCIE RX6 GND 6 PCIE TX5 PCIE TX5 GND PCIE TX6 PCIE TX6 GND 7 PCIE_RX7 PCIE_RX7 GND PCIE_RX8 PCIE_RX8 GND 8 PCIE_TX7 PCIE_TX7 GND PCIE_TX8 PCIE_TX8 GND 9 PCIE_CLK PCIE_CLK GND GND GND GND 10 GND GND USB_
35. Restore User Defaults Restore user settings for all the options Restore User Defaults Restore User Defaults Yes No Select Yes for restoring user settings while operation continues 10 7 6 Boot Over ride This menu entry displays all possible load options from the Boot Option List User can choose a device for loading directly from BIOS SETUP CPC503 User Manual 88 2012 Fastwel Ver 001a E
36. Tag Enabled Disabled Disabled No snoop Enabled Disabled Enabled Maximum Read Request Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4096 Bytes Maximum Payload Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4096 Bytes 10 3 3 ACPI Settings The ACPI settings submenu makes it possible to perform settings for ACPI compatible operating systems Fig 10 5 Screen of ACPI settings menu tab Advanced ACPI Settings Enables or Disables System ability to Hibernate 05 S4 Sleep State This option may be not effective with some OS Select Screen Select Item Select Change Opt General Help F2 Previous Values F3 Optimized Defauits F4 Save amp Exit ESC Exit Enable Hibernation Enabled Disabled Enabled CPC503 User Manual 60 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel T CPC503 10 3 4 CPU Configuration Fig 10 6 Screen of CPU Configuration menu tab gi COMA PuTTY CPU Configuration Enabled for Windows XP and Linux OS optimized for Intel R Core TM 17 3555LE CPU 8 2 50GHz Hyper Threading Technology CPU Signature 30689 and Disabled for other OS OS Microcode Patch 17 not optimized for Max CPU Speed Hyper Ihreading Technology Min CPU Speed When Disabled only one thread per enabled core is enabied MG bit um Ou D Dn mm oo op CO Dm o 9 UN Supported Supported M pi m Ft mi 0
37. User Manual 26 2012 Fastwel Ver 001a E Detailed Description Fastwel Ley CPC503 Act green This LED monitors network activity The LED lights up when network packets are sent or received through the RJ45 port When this LED is not lit it means that the computer is not sending or receiving network data 3 2 3 3 DVI I DVI I interface on CPC503 front panel see Figure CPC503 Module Dimensions CPC503 4HP Front Panel and Figure CPC503 8HP Front Panel s designed for connection of VGA analog monitor 2048x1536 75 Hz or DVI D digital monitor 1920x1200 60 Hz Figure 3 5 DVI I Connector on CPC503 Front Panel DVI I DDDODOOD V LZ Cl Be BB O Table 3 7 DVI Connector XS5 Pinout XS5 DVI 1 DATA2 2 DATA2 3 GND 4 NC 5 NC 6 DDC_CLK 7 DDC_DAT 8 VSYNC 9 DATA1 10 DATA1 11 GND 12 NC 13 NC 14 5V 15 GND 16 HP_DETECT 17 DATAO 18 DATAO 19 GND 20 NC 21 NC 22 GND 23 CLOCK 24 CLOCK 25 RED 26 GREEN 27 BLUE 28 HSYNC 29 GND CPC503 User Manual 27 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 2 3 4 DisplayPort DisplayPort interface on CPC503 front panel see Figure CPC503 Module Dimensions CPC503 4HP Front Panel and Figure CPC503 8HP Front Panel is designed for connection of digital monitors with the 2 560x1 600 60Hz resolution Th
38. User s password is set then this is a power on password and must be entered to boot or enter Setup In Setup the User will have Administrator rights The password length must be in the following range Minimum len Maximum length Select Screen ti Select Item Enter Select User Password Change Opt General Help Previous Values Secure Boot menu Optimized Defaults Save amp Exic ESC Exit P2 16GB8 SATA Fl P4 FFD SATA CPC503 User Manual 84 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 This option enables setting User password for BIOS Administrator This option enables setting Administrator password for BIOS Password Minimum Length Minimum number of symbols Bp Maximum Length Maximum number of symbols 20 Mechanism of protection against the unsigned boot loader for UEFI BIOS HDD Security Enables to set the password for accessing to storage devices Configuration 10 7 Save amp Exit Tab of BIOS Setup exit parameters Screen of this menu tab is shown below Fig 7 27 Screeen of the Save amp Exit menu tab d COM4 PuTTY Exit system setup after saving Discard Changes and Exit the changes Save Changes and Reset Discard Changes and Reser Save Options Save Changes Discard Changes Restore Defaults Save as User Defauits Restore User Defaults Boot Override Select Screen P2 16GB8 SATA Flash Drive ta Select Item Ent
39. Ver 001a E Installation Fastwel Ley CPC503 4 3 Module Removal Procedure To remove the module perform the following 1 Unlock both handles on the front panel The lower handle herewith affects the microswitch To do this only a slight move of the handle is required see subsection 3 2 5 4 Handle switch Note The blue SYS light emitting diode should start flashing shortly This means that the system has recognized the start of the switch off operation and informs the operator that the module is waiting for the system programs closure 2 The SYS light emitting diode must be on steadily After that one may proceed with further removal of the module 3 Switch the power off Disconnect of interfacing cables from the module 5 Make sure that the safety requirements specified in chapter 4 1 are complied with Pay special attention to the warning concerning the heatsink temperature Attention Perform the following operations with care in order not to damage CPC503 or other system modules 6 Unscrew the front panel retaining screws Attention While handling the module be careful since the cooling heatsink may be very hot Do not touch the heatsink when replacing the module 7 Using the front panel handles pull out the module out of the backplane slot and carefully remove it from the system 4 4 CPC503 Peripheral Devices Installation A lot of different peripheral devices can be connected to CPC503 Their i
40. al exposure 8 1 Temperature mode If CPC503 operates in normal operating conditions with sufficient air circulation the processor operates at its maximum capacity If the environmental parameters are not optimal high ambient temperature and no air circulation the system continues working due to SpeedStep but with reduced processor capacity Emergency shutdown actuates only in case of critical conditions given substantial overheat of the processor allowing to avoid damaging thereof CPU frequency as a function of the temperature is provided in the table below Table 8 1 CPU frequency as a function of the temperature for CPC503 01 CPC503 01 70 1 7 CFM 1500 1 5Ghz 2C 4HP 85 300 CPC503 01 65 2200 2 2Ghz 2C 4HP 70 1700 85 230 CPC503 01 55 2 2 CFM 2100 2 1Ghz 4C 8HP 70 1600 85 230 The maximum temperature at which there is no reduction of CPU operating frequency During measurements the module was installed in the CPCI 6U Schroff chassis with deflector Note The results provided were received upon running the artificial tests ensuring the CPU maximum heat development TDP Table 8 2 CPU frequency as a function of the temperature for CPC503 02 CPC503 02 70 1700 1 7 GHz 2C 4HP 485 230 CPC503 02 55 2500 2 5 GHz 2C 4HP 70 800 85 230 CPC503 02 65 2100 2 1 GHz 4C 8HP 470 1100 85
41. ange Opt Fi General Help F2 Previous Values F3 Optimized Defauits F4 Save amp Exit ESC Exit USB Configuration USB configuration E PCH Azalia Configuration Audio codec configuration ES SB CRID Disabled Enabled Possibility to change the Disabled southbridge identifier for compatability with obsolete software High Precision Event Timer Configuration HPET configuration S A CPC503 User Manual 76 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel TEN CPC503 High Precision Timer Enabled Disabled Possibility to switch off the HPET Enabled timer integrated into the chipset 10 4 2 1 PCH Azalia Configuration d COMA PuTTY PCH Azalia Configuration Control Detection of the Azalia device Disabled Azalia will be unconditionally disabled Enabled Azalia will be unconditionally Enabled Auto Azalia will be enabled if present disabled otherwise Select Screen ti Select Item Enter Select Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit Azalia Auto Enabled Disabled Possibility to switch off the audio codec 10 4 2 2 USB Configuration USB configuration CPC503 User Manual 77 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 Fig 10 21 Screen of the USB Configuration menu tab y COMA PuTTY USB Configuration Enable or disable XE
42. cally approved by Fastwel or described in this manual Technical characteristics of the systems in which this product is installed such as operating temperature ranges and power supply parameters should conform to the requirements stated by this document Retain all the original packaging you will need it to pack the product for shipping in warranty cases or for safe storage Please pack the product for transportation in the way it was packed by the supplier When handling the product please remember that the module its components and connectors require delicate care Always keep in mind the ESD sensitivity of the product Three Year Warranty Fastwel Co Ltd Fastwel warrants that its standard hardware products will be free from defects in materials and workmanship under normal use and service for the currently established warranty period Fastwel s only responsibility under this warranty is at its option to replace or repair any defective component part of such products free of charge Fastwel neither assumes nor authorizes any other liability in connection with the sale installation or use of its products Fastwel shall have no liability for direct or consequential damages of any kind arising out of sale delay in delivery installation or use of its products If a product should fail through Fastwel s fault during the warranty period it will be repaired free of charge For out of warranty repairs the customer will be invoiced
43. char set VI100 Extends VI100 to support color Bits per second 225200 function keys etc VI UIFS Data Bits 8 Uses UIF8 encoding to map Parity None Unicode chars onto 1 or more Stop Bits 1 bytes Flow Control None Recorder Mode Disabled Resolution 100x31 Enabled Legacy OS Redirection Resolution 80x24 Select Screen ti Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit Bits per second 9600 19200 38400 57600 115200 Termainal type VT 100 VT 100 VT UTF8 ANSI ANSE ss Pala Uis Parity None Even Odd Mark Space Stop bits 1 2 Flow Control None Hardware RTS CTS Recorder Mode Disabled Enabled Disabled Resolution 100x31 Disabled Enabled Enabled Legacy OS Redirection Resolution 80 x 24 80x24 80x25 Serial Port for Out of Band Disabled Management Windows Emergency Management Services EMS Disabled Enabled CPC503 User Manual 68 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 10 3 10 CPU PPM Configuration The CPU PPM Configuration setting the Processor Power Management modes Fig 10 13 Screen of the CPU PPM Configuration menu tab i COMA PuTTY CPU PPM Configuration Enable Disable Intel SpeedStep Turbo Mode Disabled CPU C3 Report Enabled CPU C6 report Enabled CPU C7 report Enabled Select Screen 11 Select Item Enter
44. color coded keys for 3 3V and 5V operation Color coded keys prevent accidental installation of a 5V module into a 3 3V slot CompactPCl backplane connectors keying depends always on the signaling VIO level CPC503 is a universal module with 3 3V or 5V signalling voltage level Table 3 10 CompactPCI Connector Coding Colors 3 3 V Cadmium Yellow 5V Brilliant Blue Universal module 5V and 3 3V None CompactPCI connector pinouts appear on the following pages CPC503 User Manual 32 2012 Fastwel Ver 001a E Detailed Description Fastwel Le CPC503 3 2 6 2 CompactPCI Connectors XS17 and XS16 Pinouts CPC503 is equipped with two 2x2 mm pitch female CompactPCI bus connectors XS17 and XS16 Table 3 11 CompactPCI Bus Connector J1 XS17 System Slot Pinout X917 25 GND 5V REQ64 ENUM 3 3V 5V GND 24 GND AD 1 5V LNG_VIO AD 0 ACK64 GND 23 GND 3 3V ADI 4 AD 3 LNG_5V AD 2 GND 22 GND AD 7 GND LNG_3 3V AD 6 ADI5 GND 21 GND 3 3V AD 9 AD 8 M66EN C BE 0O GND 20 GND AD 12 GND VIO AD 11 AD 10 GND 19 GND 3 3V AD 15 AD 14 LNG_GND AD 13 GND 18 GND SERR GND 3 3V PAR C BE 1 GND 17 GND 3 3V IPMB_SCL IPMB_SDA LNG_GND PERR GND 16 GND DEVSEL GND VIO STOP LOCK GND 15 GND 3 3V FRAME IRDY SHRT_GND TRDY GND 14 GND GND 13 GND GND 12 GND GND 11 GND AD 18 AD 17 AD 16 LNG_GND C BE 2
45. e CPC503 User Manual 66 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel dE CPC503 Device mode STD Printer Mode SPP Mode EPP STD Printer Mode 1 9 and SPP Mode EPP 1 7 and SPP Mode ECP Mode ECP and EPP 1 9 Mode ECP and EPP 1 7 Mode 10 3 9 Serial port console redirection Serial port console redirection menu is available when the RIO587 board is installed Fig 10 11 Screen of the Serial port console redirection menu tab Advanced A Console Redirection Enable or Console Redirection Settings COMI Console Redirection Disabled Console Redirection COM2 Console Redirection Disabied Console Redirection COMS3 Console Redirection Disabled Console Redirection Select Screen tj Select Item Enter Select Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit COM4 Console Redirection Disabled Console Redirection COMS Console Redirection Disabled Redirection i M 1 Console Redirection Enabled Disabled Enabled HN MEE CPC503 User Manual 67 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel dE CPC503 10 3 9 1 Console Redirection Settings Fig 10 12 Screen of the Console Redirection Settings menu tab sz COM6 PuTTY Advanced COMO Emulation ANSI Extended Console Redirection Settings ASCII char set VI100 ASCII
46. e interface also allows connecting DVI D monitors via the passive adapter Figure 3 6 DisplayPort Connector DisplayPort cc A Jj Table 3 8 DisplayPort Connector XS6 Pinout XS6 DP pm Sem 1 LANEO 2 GND B LANEO 4 LANE1 5 GND 6 LANE1 7 LANE2 8 GND 9 LANE2 10 LANE3 11 GND 12 LANE3 13 AUX EN 14 CONFIG2 15 AUX 16 GND 17 AUX 18 HP_DETECT 19 GND 20 3 3V 3 2 4 LED Indicators on CPC503 Front Panel The following light emitting diodes are located on CPC503 front panel Figure CPC503 Module Dimensions CPC503 4HP Front Panel and Figure CPC503 8HP Front Panel Diagnostic indicator SYS two color green blue allows distinguishing 4 module states power off power on BIOS startup BIOS closure OS startup Drives SA activity indicator informs of SATA drives activity CPC503 User Manual 28 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Program controlled GP LED is intended for user defined purposes two color red green See subsection 3 4 SPI Controller LEDs GPIO Overheat indicator OVH Figure 3 7 LED Indicators on CPC503 Front Panel 1212120 SYS OVH SA GP Table 3 9 CPC503 Module SYS LED State seen Joe Off Power to the module is not supplied Light blue The module is powered up the PCI bus is disabled the processor stopped Blinking blue Module in the process
47. ecification 2 16 When installed in a backplane which supports packet switching CPC503 can communicate via both of its Gigabit Ethernet ports with other peripherals or with the system master board which also supports this mode The CPC503 module operational consistency allows using it in all industrial applications The components of CPC503 are carefully selected according to the criteria of applicability in embedded systems and long term availability on the market This makes this module an ideal device based on which the systems with long life cycle can be built CPC503 is compatible with Windows 7 QNX 6 5 0 and Linux 2 6 operating systems CPC503 User Manual 8 2012 Fastwel Ver 001a E Product General Information Fastwel LE CPC503 2 Product General Information 2 1 CPC503 Key Parameters CPC503 is a 6U CompactPCI processor module built on the basis of Intel Core i7 2nd generation specifically designed for application in highly integrated platforms for industrial purposes CPC503 key parameters For CPC503 01 H Intel Core i7 2nd generation processor 2 4 Cores Core i7 2715QE Cache 6 MB 4 C 2 1 GHz SV 45 W Core i7 3555LE 4 MB 2C 2 5 GHz LV 25 W Core i7 2610UE Cache 4 Mbyte 2 C 1 5 GHz ULV 17 W For CPC503 02 Core i7 3612QE 6 MB 4C 2 1 GHz SV 35 W Core i7 2655LE Cache 4 Mbyte 2 C 2 2 GHz LV 25 W Core i7 3517UE 4 MB 2C 1 7 GHz ULV 17 W m PCH QM67 chipset Highly integrated interface controll
48. ed Disabled Hard Disk Driver Empty Unknown Enabled Disabled Unknown Enabled Disabled FFD SATA Enabled LE gt Select Screen ti Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit CPC503 User Manual 62 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel T CPC503 SATA Mode Selection IDE AHCI AHCI SATA Test Mode Enabled Disabled Disabled Aggressive LPM Support Enabled Disabled Enabled Software Preserve Port 0 1 2 3 Enabled Disabled Enabled External SATA Enabled Disabled Disabled SATA Device Type Hard Disk Driver Solid Hard Disk Driver State Drive 10 3 6 Thermal Configuration Fig 10 8 Screen of the Thermal Configuration menu tab Advanced Platform Thermal Configuration This value controls the temperature of the ACPI Critical Trip Point the Passive Trip Point point in which the OS will Passive CHL Value shut the system off Passive TCZ Value 5 NOTE 100C is the Pian Of Passive TSP Value 10 Record POR for all Intel mobile processors PCH Thermal Device Enabled PCH Temp Read Enabled CPU Energy Read Enabled CPU Temp Read Enabled Select Screen Select Item Select Change Opt General Help Previous Values Optimized Defaults Save amp Exit ESC Exit CPC503 User Manual 63 2012 Fa
49. edure for removal operations is provided in other chapters To install the module into the system follow the below procedure 1 Keep to the safety requirements specified in chapter 4 1 A 2 Information on installation of peripheral devices and I O devices is provided in the next section of Chapter 4 4 Attention Perform the following operations with care in order not to damage CPC503 or other system modules 3 Toinstall CPC503 perform the following Attention Failure to comply with the following instruction may damage the module or result in incorrect system operation 1 Make sure no power is connected to the system Attention While carrying out the following operation do not apply force for insertion of CPC503 into the backplane slot To install it use the handles on the front panel 2 Carefully insert the module into the chosen slot moving it along the guide ways until it touches the backplane connectors 3 Using both handles on the front panel insert CPC503 into the backplane slot The module is engaged completely when the handles are locked 4 Fix the module with the two front panel retaining screws 5 Connect all required external interfacing cables to the module 6 Make sure that the module and all connected cables are properly fixed 4 CPC503 is now ready for operation For further instructions refer to software devices and system manuals CPC503 User Manual 45 2012 Fastwel
50. egacy USB support Enabled Disabled Auto Enabled USB Devices 1 Keyboard 1 Mouse 2 Hubs E USB 3 0 Support Enabled XHCI Hand off Disabled Enabled Enabled EHCI Hand off Disabled Enabled Disabled USB Mass Storage Driver Support Enabled USB hardware delays and time outs USB transfer time out 1 sec 5 sec 10 sec 20 sec Device reset time out 10 sec 20 sec 30 sec 40 sec os E 10 3 8 Super IO Configuration Serial port IO Configuration menu is available when the RIO587 board is installed CPC503 User Manual 65 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel T CPC503 Fig 10 10 Screen of the Super IO Configuration menu tab Advanced Super IO Configuration Set Parameters of Serial Port O COMA Super IO Chip Serial Port 1 Seriai Port 2 Configuration Serial Port 3 Configuration 4 5 t Configuration Serial Port Configuration Serial Port Configuration Parallel Port Configuration Select Screen ti Select Item Enter Select Change Opt General Help Previous Values Optimized Defaults Save amp Exic ESC Exit Super IO Chip SMSC SCH3116 Serial Port 0 1 2 3 4 5 Configuration DENN Parallel Port Configuration Serial port XX configuration Serial port Enabled Disabled Enabled TM NENNEN Device mode Standard IrDA Mode ASK IR Mode Standard Parallel port configuration Parellel port Enabled Disabled Enabled y
51. eneration Disabled SERR Generation Disabied b PCI Express Settings Select Screen tfi Select Item Select Change Opt General Help Previous Values Optimized Defauits Save amp Exit ESC Exit CPC503 User Manual 58 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Le CPC503 PCI Bus Driver Version V 2 05 02 PCI 64bit Resources Handling Above 4G Decoding Disabled PCI Common Settings PCI Latency Timer 32 PCI Bus Clocks 32 PCI Bus Clocks 64 PCI Bus Clocks 96 PCI Bus Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bus Clocks VGA Palette Snoop Enabled Disabled Disabled PERR Generation Enabled Disabled Disabled SERR generation Enabled Disabled Disabled H PCI Express Device Register settings This submenu makes it possible to perform settigns for PCI Express i COMA PuTTY Advanced PCI Express Device Register Settings Enables or Disables PCI Express Device Relaxed Extended Tag Disabled Ordering No Snoop Enabled Maximum Payload Auto Maximum Read Request Auto Select Screen ti Select Item Enter Select Change Opt General Help Previous Values Optimized Defaults Save amp Exit ESC Exic CPC503 User Manual 59 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Le CPC503 Relaxed Ordering Disabled Extended
52. er Select Launch EFI Shell from filesystem device Change Opt F1 General Help F2 Previous Values F3 Optimized Defauits F4 Save amp Exit ESC Exit CPC503 User Manual 85 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel dE CPC503 10 7 1 Save Changes and Exit When you ve made changes to the system select this option for saving the configuration and exiting the Aptio TSE so the configuration could be used further The following window will appear after selecting Save Configuration and Exit option Save amp Exit Setup Save configuration and exit Select Yes to save changes and exit AptioTM TSE 10 7 2 Discard Changes and Exit Select this option to exit AptioTM TSE without saving the changes The following window will appear after selection of the Discard Changes and Exit option Exit Without Saving Quit without saving Select Yes to discard changes and exit AptioTM TSE 10 7 3 Save Changes and Reset When you ve made changes to the system select this option for saving configuration and system reboot in order to use the other parameter configuration in the future The following window will appear after selection of the Save Changes and Reset option Save reset Save configuration and reset Select Yes to save changes and reboot CPC503 User Manual 86 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Shor
53. er including standard peripherals of IBM PC AT platform m Random access memory W For CPC503 01 DDR3 SDRAM 1333 MHz with ECC up to 4 GB soldered dual channel m For CPC503 02 DDR3L SDRAM 1600 MHz with ECC up to 8 GB soldered dual channel W Video output DVI I interface is routed to the front panel VGA 2048x1536 75 Hz or DVI D 920x1200 60 Hz DVI D interface is routed to RIO module through DisplayPort eDP embedded DisplayPort interface resolution up to 2560x1600 60 Hz is routed to the front panel DisplayPort interface resolution up to 2560x1600 60 Hz is routed to RIO module to the XS10 interface for connection of mezzanine expansion module Simultaneous operation of two interfaces is possible for CPC503 01 Simultaneous operation of three interfaces is possible for CPC503 02 PCI bus routed to Compact PCI J1 J2 connectors 64 bit 66 MHz realized on the PI7C9X130 PCI E gt PCI X bridge non system slot operation Non Transparent Bridge mode B LPC bus routed to P16 XMC connector routed to RIO module PCI E bus for CPC503 01 PCI E 2 0 support up to 5 GT s routed to P15 XMC connector supporting up to x8 devices routed to CPCI J3 connector supporting up to x4 devices CPC503 User Manual 9 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 XMC conforms to ANSI VITA 42 3 specification PCI E bus for CPC503 02 PCI E 3 0 up to
54. erformance from 0 C up to 70 C Tolerance to single shocks vibration 30g 2g m Module dimensions 266 11 mm x 212 5 mm x 21 mm with R1 heat sink 266 1 mm x 212 5 mm x 42 mm with R2 heat sink Maximum weight With R1 heat sink no more than 0 700 kg with R2 heat sink no more than 0 960 kg m Mean time between failures MTBF not less than 60 000 hours CPC503 conforms to the fillowing PICMG VITA specifications PICMG 2 0 Compact PCI r3 0 PICMG 2 3 PMC I O r 1 0 PICMG 2 16 Packet Switching Backplane r 10 ANSI VITA 39 PCI X on PMC ANSI VITA 42 0 XMC ANSI VITA 42 3 XMC PCI Express Protocol Standard CPC503 User Manual 11 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 2 2 CPC503 Versions At the present time the module is offered in flexible configuration Other configuration options are available upon request The customer can choose necessary configuration options using the following template Figure 2 1 CPC503 Versions CPC503 Configuration CPC503 02 3i72C1 7 RAM4G Ri C Options Device Type CPC503 6U CompactPCI Intel Core i7 SBC Processor Processor i72C1 7 Core i7 3517UE 2C 1 7 GHz 17 W ULV i72C2 5 Core i7 3555LE 2C 2 5 GHz 25 W LV i 4C2 1 Core i7 3612QE 4C 2 1 GHz 35 W SV Soldered Memory RAM4G 4GB RAM8G 8GB Temperature Range Industrial Range 40 85 C C Commercial Range 0 70 C Options Protective Coatin
55. escription of the Module 0 00 cee eeceeeeeeeceeeeeeeeeeaeeeaeeteaeeesaeeseaeeeaeeseaeeseaeeseaeeenaeeseaeeseaeeseaeeseaeenias 8 2 Product General IMformation ccssecceseceeeteeeseeeeeeeeeeeeeeeseeesesaaeenseeeeeeesesaaesaseeeenseeeeeneaeseagseneeeenseaeeeaees 9 2 1 CGPG503 Key Parameters esrin erit uersu ac etx lestie ce ri Een d a An Ra LAA Ge Saa 9 2 2 GPOS03 VOASIONS c le an See eek 12 23 CPG503 Package Contents ai netter robes EE SEU TE ERE SE ERU ten Eege pp a AY pa 13 2 4 GPC503 Packaging Informalion 5 2 inea cioe nece init t doo EHE oe desde Ee san rat 13 2 5 Possibilities of the System Expansion sesssssssssesesseeeneeneneenenen nennen nennen nene nn nennen 13 2 5 1 EMGGMC un c 13 2 5 2 Rear I O RIO587 Expansion Module nennen nennen neret 13 P SEE CH B ted EMO RETE 14 2 7 GPO503 RI Lee EE 14 2 7 1 Block Diagram EE 15 2 7 2 Module App ataNC seed neonan Taari RIS RARE AERE RR Rob RA RSS ER en RENE osi saka 16 2 7 3 Module Layout E 17 2 7 4 Module DImaernsloris eene an tH PORE RR toS EHRENRRU NERA EHE ao n A DIR EREERRE ER AS 18 3 Detailed DeSCriptiON m 19 3 1 Functional Nodes Operation Features 19 3 2 Module Interfaces cere iri e opea ee ree ER p ROSE pf ee RA RE RA al ak RAP ARENIS AERE pe RAS kadna 21 3 2 1
56. g Example CPC503 01 i72C1 5 RAM4G R1 C options 6U CompactPCI processor module Core i7 2610UE CPU Cache 4 MB 2 C 1 5 GHz ULV 17 W 4 GB soldered DDR3 SDRAM Low profile heatsink 4HP Commercial operating temperature range 0 C to 70 C Other options Protective coating Linux 2 6 Delivery checklist 1 CPC503 Module 2 Fastening elements for installing HDD Fixing device 1 pcs DIN7985 M2 screw 5x6 2 pcs DIN6798A washer 2 5 2 pcs 3 Package CPC503 User Manual 12 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 2 3 CPC503 Package Contents CPC503 package includes CPC503 module Hard drive mounting kit 1 Gasket 1 pce 2 Chuck 1 pce 3 M2 5 screw 2 pcs 4 M2 5 Washer 2 pcs 2 4 CPC503 Packaging Information CPC503 module is supplied in a box with 350x260x70 mm dimensions 2 5 Possibilities of the System Expansion Number of interfaces routed from CPC503 module can be expanded by means of installation of XMC PMC expansion module connection of RIO587 module 2 5 1 PMC XMC Modules CPC503 module PMC XMC interface supports XMC PMC expansion modules allowing easily and pliably adapting CPC503 to the requirements of various applications see subsection 3 2 1 PMC XMC 2 5 2 Rear I O RIO587 Expansion Module RIO587 module expands CPC503 input output functionality and capabilities when mounted at the
57. guration Graphics configuration Graphics subsystem configuration CPC503 User Manual 71 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Le CPC503 Fig 10 16 Screen of the Graphics Configuration menu tab sl ojx Graphics Configuration Select which of IGFX PEG PCI IGFX VBIOS V on 215 Graphics device should be IGf x Frequency 350 MH Primary Display Or select 5G for Switchable Gfx Internal Graphics Auto GTT Size 2M8 Aperture Size 256M5 DVMT Pre Allocated 64M DVMI Total Gfx Mem 256M Gfx Low Power Mode Enabled gt LCD Control Select Screen Select Item General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit Primary Display Auto IGFX PEG PCI SG Selection of the main graphics card in the system IGFX integrated into CPU PEG PCI external graphics devices with PCI or PCI Express buses Internal Graphics Auto Disabled Enabled Possibility to switch off the CPU integrated graphics card Auto the graphics card is switched off only when the display is connected GTT Size 1MB 2MB Window size within RAM for direct access by graphics card Aperture Size 128MB 256MB 512MB RAM capacity backed up for video memory DVMT Pre Allocated Minimum backup RAM capacity OMB 32MB 64MB 96MB 128MB required for video subsystem 160MB 192MB 224MB 256MB 288MB operation 320MB 352MB 384MB 416MB 448MB 480MB 512MB
58. idually switch off Disabled Disabled Enabled USB ports 10 5 Boot Tab for configuring module boot devices Screen of this menu tab is shown on the Figure below Fig 10 22 Screen of the Boot menu tab d COMA PuTTY Boot Configuration Number of seconds to wait for setup activation key Bootup NumLock State 65535 OXFFFF means indefinite waiting Quiet Boot Disabled Fast Boot Disabied Boot Option Priorities Boot Option 1 P2 16GB SATA Flash Hard Drive BSS Priorities CSM16 Parameters CSM parameters Select Screen Select Item General Help Previous Values Optimized Defaults Save amp Exit ESC Exit 10 5 1 Boot Configuration This menu tab enables to set separate system features at the time of booting CPC503 User Manual 79 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel TE CPC503 10 5 1 1 Setup Prompt Timeout Boot Configuration vedi Boot Enabled ast Boot Disabled 123456 Set the number of seconds for activation waiting time Value 65535 OXFFFF means that the waiting period is indefinite 10 5 1 2 Bootup NumLock State Setting this value enables to change the Number Lock settings upon booting An optimal default adjustment for this value is On This option disables the Number Lock automatic keyboard mode Press Number Lock key button located in the upper left corner of keyboard digital panel in order to use ke
59. k Slave 33 MHz Onboard NAND disk Enabled Backplane Bridge Enabled PMC Bridge Enabled External WatchDog Disabled Ejector Switch Function PWR Button Reset Select Screen ti Select Item Enter Select Change Opt General Help Previous Values Optimized Defaults Save 6 Exit ESC Exit Onboard Gigabit 4 port LAN Enabled Enabled Disabled Onboard Gigabit LAN1 Direction PICMG PICMG 2 16 2 16 XMC Onboard Gigabit LAN2 Direction PICMG PICMG 2 16 2 16 XMC Onboard RIO Gigabit LAN 0 Enabled Enabled Disabled Onboard RIO Gigabit LAN 1 Enabled Enabled Disabled CPC503 User Manual 57 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 Autostart Mode Enabled Disabled Enabled BN uu RN Onboard NAND disk Enabled Disabled Enabled Backplane Bridge Enabled Disabled Enabled PMC Bridge Enabled Disabled Enabled External WatchDog Enabled Disabled Disabled Ejector Switch Function PWR Button Reset PWR Button Reset PWR Button Disabled 10 3 2 PCI Subsystem settings The PCI Subsystem settings submenu enables to set PCI and PCIE bus Fig 10 4 Screen of PCI Subsystem settings menu tab Enables or Disables 64bit capable Devices to be Decoded in Above 4G Address Space 64bit Resources Handling Only if System Supports 64 bit PCI Decoding PCI Common Settings PCI Latency Timer 32 PCI Bus Clocks VGA Palette Snoop Disabled PERR G
60. le at P16 XMC connector and RIO module m Watchdog timer Integrated programmable watchdog timer B Hardware monitor realized via PECI SMBUS interfaces three power voltages monitoring CPC503 User Manual 10 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 CPU temperature monitoring PCB temperature monitoring m XMC PMC expansion modules support one XMC PMC expansion module can be installed PCI X 64 bit 133 MHz bus is routed to P11 P14 PMC connectors ANSI VITA 39 PCI X on PMC PMC I O P14 are routed to RIO modules PICMG 2 0 PCI E x8 Gen2 bus is routed to P15 XMC connector ANSI VITA 42 3 XMC PCI Express Protocol Standard PCI E bus x8 Gen3 routed to P15 XMC connector ANSI VITA 42 3 XMC PCI Express Protocol Standard for CPC503 02 additional interfaces 1xSATA 2xUSB LPC HD Audio 2xEthernet are routed to P16 XMC connector For CPC503 02 2x USB 3 0 Indication two color light emitting diode of the module startup diagnostic green power supply mode indicator blue LED indicator of SATA drives activity overheat indicator program controlled red green user LED Software compatibility with OS a Linux 2 6 QNX 6 5 0 Windows 7 Windows embedded standard 7 Supply voltage Supply voltage 5 V 3 3 V 12 V 12 V from CPCI bus Operating temperature industrial performance from 40 C up to 85 C commercial p
61. manufacturers due to thermal stress related failure mechanisms These mechanisms are common to all silicon devices they can reduce the MTBF of the product by increasing the failure probability Prolonged operation at the lower limits of the temperature ranges has no limitations Caution Electric Shock Before installing this product into a system and before installing other devices on it always ensure that your mains power is switched off Always disconnect external power supply cables during all handling and maintenance operations with this module to avoid serious danger of electrical shock CPC503 User Manual 5 2012 Fastwel Ver 001a E Fastwel Lee CPC503 Unpacking Inspection and Handling Please read the manual carefully before unpacking the module or mounting the device into your system Keep in mind the following ESD Sensitive Device A Electronic modules and their components are sensitive to static electricity Even a non perceptible by human being static discharge can be sufficient to destroy or degrade a component s operation Therefore all handling operations and inspections of this product must be performed with due care in order to keep product integrity and operability a Preferably unpack or pack this product only at EOS ESD safe workplaces Otherwise it is important to be electrically discharged before touching the product This can be done by touching a metal part of your system case with your hand
62. n CPC503 User Manual 83 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 Support of UEFI graphics cards Legacy only UEFI or Legacy Launch Video OpROM policy Initialization of the ODROM Legacy OpROM Other Pel device BOM palay installed boards UEFI or Legacy seet 10 6 Security This tab allows setting the module s protective functions 10 6 1 Password setting Two password protection levels Security settings allow Administrator and User passwords IF both of the passwords are used Administrator password should be entered first The system should be configured in such a way that all the users could enter password each time the system is booted or when the Setup procedure is performed using Administrator or User passwords Administrator and User passwords allow two levels of password protection If you selected the Password submenu you ll be asked to set the password containing from 3 to 20 characters Type the password from keyboard Password will not be displayed during entering Confirm the password below If you forget your password you ll have to reset all the BIOS settings 10 6 2 Security Setup Fig 7 26 Screen of the Security menu tab Security Password Description Set Administrator Password If ONLY the Administrator s password is set then this only limits access to Setup and is only asked for when entering Setup If ONLY the
63. nstallation methods may differ significantly The following sections provide only the general installation guidelines and not the detailed algorithms CPC503 User Manual 46 2012 Fastwel Ver 001a E Installation Fastwel Ley CPC503 4 4 1 USB Devices Installation CPC503 supports the use of any computer Plug amp Play peripheral USB devices e g keyboard mouse printers etc Note All USB devices can be connected and disconnected while the power of such devices and the main system is on 4 4 2 Connection of devices to Rear I O module In order to make COM1 6 and Ethernet ports operating properly on Rear I O module they should be set up to be used via Rear I O module using the BIOS Setup program For details on installation of devices operating via Rear I O module refer to the documents of these devices 4 4 3 Battery Replacement The lithium battery must be replaced with Panasonic BR2032 or a battery with similar characteristics The expected life of a 190 mAh battery in case of operation for 8 hours a day at 30 C is about 5 years However this typical value may vary because battery life depends on the operating temperature and the shutdown time of the system in which the battery is installed Note It is recommended to replace the battery after approximately 4 years to be sure it is operational Replacing the battery make sure the polarity is correct up Dispose of used batteries according to the local
64. of disconnection Blinks green 8Hz The processor is running on the execution of the BIOS Blinks green 1Hz The processor executes the POST Light green The POST is completed you are booting the OS SYS LED indicates of CPC503 module malfunctions to user see subsection 6 CPC503 module troubleshooting 3 2 5 CompactPCI Interface CPC503 has a flexible configurable CompactPCI interface If the module plate is installed in the system slot the PCIE PCI bridge operates in the PCI bus master mode and if the module plate is installed in the peripheral slot the bridge operates in the nontransparent mode If the support of the CompactPCI bus exchange is not required for the purpose of reduction of consumption currents the bridge can be disabled in BIOS Setup 3 2 5 1 Operation in the System Slot System Master Being installed in the system slot CPC503 can exchange information with all other CompactPCI modules via the 64 bit Pericom PI7C9X130 PCIE PCI bridge operating at 3366 Mhz The module supports operation with maximum seven CompactPCI devices via the passive backplane for 33 MHz in the BUS Master mode 6 devices can work The module supports 3 3 V and 5 V PCI bus levels The module fully conforms to PCI Local Bus Specification Rev 3 0 CPC503 User Manual 29 2012 Fastwel Ver 001a E Detailed Description Fastwel Le CPC503 3 2 5 2 Operation in the Peripheral Slot Slave Mode In the peripheral slot the bridge opera
65. of drives one interface is routed to P16 XMC connector One interface is routed to a socket for connection of 1 8 HDD Two interfaces are routed to RIO module m DVI I The port is designed for connection of VGA analog monitor 2048x1536 75 Hz or DVI D digital monitor 1920x1200 60 Hz It is located on the front panel W DisplayPort Interfaces are designed for connection of digital monitors with 2 560x1 600 60 Hz resolution One interface is routed to the front panel two interfaces to RIO module m PCI E PCI E Gen2 bus is routed to P15 XMC connector according to ANSI VITA 42 3 standard The interface allows connecting XMC expansion modules with x1 x2 x4 x8 links set up to 5 GT s m PCI PCI bus is implemented on the Pericom PI7C9X130 bridge microchip connected to PCI E x4 bus The following operating modes are supported PCI 32bit 33Mhz PCI 64bit 66Mhz Operations can be carried out both in the system and in the peripheral slots m SPI Interface is implemented in FPGA on LPC bus FRAM microchip is supported located on board Maximum clock speed 25 MHz Audio Support can be realized via RIO or XMC module B Indication LED indicators of startup overheat drives activity user defined indicators are routed to the front panel Diagnostic indicator SYS two color green blue allows distinguishing 4 module states power off power on BIOS startup BIOS closure OS startup see subsection 3 2 4 Drives SA acti
66. or tool It is particularly important to observe anti static precautions when setting jumpers or replacing components E If the product contains batteries for RTC or memory back up ensure that the module is not placed on conductive surfaces including anti static mats or sponges This can cause short circuit and result in damage to the battery and other components a Store this product in its protective packaging while it is not used for operational purposes Unpacking The product is carefully packed in an antistatic bag and in a carton box to protect it against possible damage and harmful influence during shipping Unpack the product indoors only at a temperature not less than 15 C and relative humidity not more than 70 Please note that if the product was exposed to the temperatures below 0 C for a long time it is necessary to keep it at normal conditions for at least 24 hours before unpacking Do not keep the product close to a heat source Following ESD precautions carefully take the product out of the shipping carton box Proper handling of the product is critical to ensure correct operation and long term reliability When unpacking the product and whenever handling it thereafter be sure to hold the module preferably by the front panel card edges or ejector handles Avoid touching the components and connectors Retain all original packaging at least until the warranty period is over You may need it for shipments or for storage of
67. ot option The boot option marked as 1 will have the top priority the next will be second third etc 10 5 3 Hard Drive BBS Priorities Fig 10 23 Screen of the Hard Drive BBS Priorities menu tab i COM6 PuTTY Sets the system boot order Boot Option 2 PO CFast 100 Select Screen ty Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defaults F4 Save amp Exit ESC Exit This entry contains a list of devices to determine computer boot priority Boot Option 1 has the top priority CPC503 User Manual 81 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 10 5 4 CSM16 Parameters 5 This entry is used for setting additional boot parameters Fig 10 24 Screen of the CSM16 Parameters menu tab CSM16 Parameters UPON REQUEST GA20 can be disabled using BIOS services CSMi6 Module Version 07 70 ALWAYS do not allow disabling GA20 this option is useful when any RT code is Option ROM Messages Force BIOS executed above 1MB INTi9 Trap Response Immediate Select Screen Select Item Select Change Opt General Heip Previous Values Optimized Defaults Save amp Exit ESC Exit GateA20 Active A20 gate control Upon Request Option ROM Messages Output of OPROM BIOS data Force BIOS INT19 Trap Response Control of the trapped INT19 10 5 4 1 Option ROM Messages While using this paramete
68. out the TMF flag is set after the second timeout expiry STF flag WDT is controlled via I O registers 1 Stop countdown 2 Write the timeout value to Timer Initial Value Register 3 Initialize the WDT register by any of the reset methods i e by writing any value to Timer Current Value Register This leads to wring the initial value from Timer Initial Value Register to Timer Current Value Register 4 Start decrementing the counter and if necessary enable auto reset of the module 5 Then with a period less than timeout perform regular strobing of the WDT In case WDT was not srobed TMF flag is set after first timeout expiry and an interrupt occurs After the second timeout expiry STF flag is set and the second interrupt is issued or the module will be Reset if this is enabled CPC503 User Manual 38 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 UO Registers of the WDT Controller Timer Current Value Register 23 0 Base 0h Bit Name Description 7 0 Timer_Current_Value 7 0 Mere Bits 7 0 of the current counter value Base 1h Bit Name Description 7 0 Timer Current Value 15 8 ni i er vurrent Bits 15 8 of the current counter value Base 2h Bit Name Description 7 0 Timer Current Value 23 16 io ka Bits 23 16 of the current counter value Timer Initial Value Register 23 0 Base 3h Bi
69. pply voltage 5 V 3 3 V 12 V 12 V from CPCI bus Modules consumption current seen CPU frequency as a function of the temperature CPC503 01 CPU frequency as a function of the temperature CPC503 02 Environmental exposSUre corii edito cil tates Ead e eden ceres Uso sidan po a piwo ana bb de E oes dde Seba weak edem CPC503 Bleck Diagram RT CPC503 Module Appearance with R1 Heatsink essere rese saaossaoosasooesossosoosanosouonn GPC503 Modul Layout Top RT EE CPC503 Module Dimensions CPC503 4HP Front Panel S m Ge w CPC503 8HP Front Panel iiti c dian chi cane y per e etie eR n a Ferre n EC Le etc ER epo Ee eere reads XMG XS8 P15 and XS9 P46 Cofiriectors nice i einer cecidi me dovete deeg PMC XS10 P11 XS11 P13 X812 P12 and XS13 P14 Connectors sesssssseesieerierirererierirerierinrrrerrser USB Connectors on CPC503 Front Panel RJ45 Gigabit Ethernet Connectors DVI I Connector on CPC503 Front Panel DisplayPort Connector te Di iis a d LED Indicators on CPC503 Front Panel CompactPCI connectors J1 J5 in accordance with the CompactPCI specification Screen of the Main menu tab Sereeniof the Advanced menu tab reri rete erbe ka entera e e n ga LK Rn DELE ERR RR FR CERA ERR Screen of the Onboard Device Configuration
70. pporte Enter Select Change Opt General Help Max TOLUD F2 Previous Values Memory Remap Enabled F3 Optimized Defaults F4 Save amp Exic ESC Exit NN Total Memory Total memory 6144 MB DDR3 DIMM 0 1 2 3 Location of the installed memory CAS Latency tCL Delay in cycles between CAS signal generation and data reading start Minimum delay time Minimum delay time CAS to RAS tRCDmin Time of delay between CAS and RAS signals Row Precharge tRPmin 1 Number of cycles for the repeated RAS signal generation Active to Precharge tRASmin 2 Number of cycle of opening and closing of the same storage bank XMP Profile 72 3 Not supported Not Supported CPC503 User Manual 75 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Ley CPC503 ECC support Enabled Disabled ECC mode activation Enabled Max TOLUD Possibility to choose the upper Dynamic Dynamic 1GB 1 25GB 1 5GB RAM limit 1 75GB 2GB 2 25GB 2 5GB 2 75GB 3GB 3 25GB Memory Remap Enabled Disabled Has to be activated if 4 GB RAM or Enabled more is installed 10 4 2 PCH IO Configuration PCH IO configuration Southbridge configuration Fig 10 20 Screen of the PCH IO Configuration menu tab USB Configuration settings gt PCH Azalia Configuration SB CRID Disabled High Precision Event Timer Configuration High Precision Timer Enabled Select Screen Select Item Select Ch
71. r the Option ROM messages are displayed Force BIOS Set this parameter value to allow the system displaying the Optional ROM messages Keep Current Set this parameter value to disable system display of the Optional ROM parameters CPC503 User Manual 82 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 10 5 4 2 INT19 Trap Responce The INT19 Trap Response control of the Int 19h vector trap process Gemeen Immediately run the trapped int 19h Postponed Run the trapped int 19h during legacy booting 10 5 5 CSM parameters 6 This submenu enables to set additional boot parameters Fig 10 25 Screen of the CSM parameters menu tab gi COMA PuTTY Launch CSM Enabled This option controls what devices system can boot to Launch PXE OpROM policy Do not launch Launch Storage OpROM policy Legacy oniy Launch Video OpROM policy Legacy only Other PCI device ROM priority Legacy OpROM Select Screen Select Item Select Change Opt General Help Previous Values Optimized Defaults Save 6 Exit ESC Exit Launch CSM Activation of Legacy BIOS Enabled compatibility Boot option filter Support of booting from UEFI Legacy only storage devices Activation of booting via network Do not launch Launch PXE OpROM policy UEFI or Legacy Hp NN Booting from PCI storage devices Legacy only Launch Storage OpROM policy UEFI or Legacy ka
72. regulations j Important CPC503 User Manual 47 2012 Fastwel Ver 001a E Configuration Fastwel Lee CPC503 5 Configuration 5 1 Resetting BIOS Setup parameters using XP2 jumper The module XP2 jumper see Figure CPC503 Module Layout Top Side is intended for resetting BIOS Setup parameters to factory defaults if the system fails to start e g due to errors in the BIOS setup or because of incorrect password To reset the BIOS parameters perform the following 1 Switch the system power off 2 Install XP2 jumper 3 Wait for 5 seconds 4 Remove XP2 jumper CPC503 User Manual 48 2012 Fastwel Ver 001a E Fastwel Lee CPC503 module troubleshooting CPC503 6 CPC503 module troubleshooting Before addressing to the service center please read the information on troubleshooting since the problem may be connected not with the device breakage Table 6 1 CPC503 malfunctions reasons and ways of their elimination The module fails to start SYS LED is off No supply voltage 5V 3 3V 12V Check supply voltage on the backplane The module is not completely inserted into the backplane Make sure that the module is inserted into the backplane up to the stop The module fails to start SYS LED is blue Ejector handle is not fixed or the button in the ejector handle is pressed Check the ejector handle The module is not completely inserted into the backplane Make sure that the module is
73. rface Keyboard Controller Style interface Interface for communication between control software and BMC similar to a keyboard controller interface LPC Low Pin Count External devices communication interface LVDS Low Voltage Differential Signal Digital monitors communication specification MDI Media Dependent Interface Interface with connection type automatical detection NAND Flash Not And electronic logic gate Flash memory specification PC Personal Computer PICMG PCI Industrial Computer Manufacturers Group PIO Programmed Input Output EIDE Directly processor controlled data exchange PLCC Plastic Leaded Chip Carrier PM Peripheral Management Controller PMC PCI Peripheral Component Interconnect Mezzanine Card POST Power On Self Test PWM output Pulse Width Modulation Cooling fan control technique RAMDAC Random Access Memory Digital to Analog Converter Rear I O Board Rear Input Output Board Auxiliary interface board which is connected to the cPCI backplane rear connectors RTC Real Time Clock SMB System Management Bus SODIMM Small Outline Dual In Line Memory Module SSD Solid State Disk TTL Transistor Transistor Logic UART Universal Asynchronous Receiver Transmitter UHCI Universal Host Controller Interface USB Host Controller Interface UTP Unshielded Twisted Pair USB Universal Serial Bus CPC503 User Manual 2012 Fastwel 54 Ver 001a E Usef
74. ringement of these rules Warning When handling or operating the module special attention should be paid to the heatsink because it can get very hot during operation Do not touch the heatsink when installing or removing the module Moreover the module should not be placed on any surface or in any kind of package until the module and its heatsink have cooled down to ambient temperature Caution Switch off the system power before installing the module in a free slot Disregarding this requirement could be harmful for your life or health and can damage the module or entire system ESD Sensitive Equipment This product comprises electrostatically sensitive components Please follow the ESD safety instructions to ensure module s operability and reliability gt gt b Bi Use grounding equipment if working at an anti static workbench Otherwise discharge yourself and the tools in use before touching the sensitive equipment W Try to avoid touching contacts leads and components m When carrying out operations at the a workplace with anti static protection do not omit the opportunity to use it Extra caution should be taken in cold and dry weather CPC503 User Manual 44 2012 Fastwel Ver 001a E Installation Fastwel Ley CPC503 4 2 CPC503 Installation Procedure To install CPC503 in a system follow the instructions below The following procedure is related to installation of CPC503 into the system The proc
75. ront Panel 1234 LIS CPC503 User Manual 25 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Table 3 5 USB Connectors Pinouts 1 VCC VCC signal 2 UVO Differential USB 3 UVO Differential USB 4 GND GND signal 3 2 3 2 Gigabit Ethernet The CPC503 board includes two 10Base T 100Base TX 1000Base T Ethernet ports based on i82580 Gigabit Ethernet controller see Figure CPC503 Module Dimensions CPC503 4HP Front Panel and Figure CPC503 8HP Front Panel The interfaces provide auto detection and switching between 10Base T 100Base TX and 1000Base T operation modes Figure 3 4 RJ45 Gigabit Ethernet Connectors Act Link Using BIOS setup program or user program each of the two Ethernet channels can be independently disabled for releasing the system resources Table 3 6 Pinouts of Gigabit Ethernet Connectors 1 O TX O TX UO BI DA 2 O TX O TX UO BI DA 3 l RX l RX UO BI DB 4 UO BI DC 5 e O BI DC 6 l RX l RX UO BI DB 7 UO BI DD 8 UO BI DD Integrated Ethernet LEDs Line green This LED indicates network connection The LED lights up when the line is connected CPC503
76. sssessssssesessese ensem rhn seen se se enne terrere nn rene screeniof the Sec rity menu tab e ose ege cate come EE AER canis kl a AE A e E a RELE e e Screeen of the Save amp Exit menu Tab wake k s aiiai Sal cone exeun e AAA X cea RES ote emake EEN DEE DUREE All information in this document is provided for reference only with no warranty of its suitability for any specific purpose This information has been thoroughly checked and is believed to be entirely reliable and consistent with the product that it describes However Fastwel accepts no responsibility for inaccuracies omissions or their consequences as well as liability arising from the use or application of any product or example described in this document Fastwel Co Ltd reserves the right to change modify and improve this document or the products described in it at Fastwel s discretion without further notice Software described in this document is provided on an as is basis without warranty Fastwel assumes no liability for consequential or incidental damages originated by the use of this software This document contains information which is property of Fastwel Co Ltd It is not allowed to reproduce it or transmit by any means to translate the document or to convert it to any electronic form in full or in parts without antecedent written approval of Fastwel Co Ltd or one of its officially authorized agents Fastwel and Fastwel logo are trademarks
77. stwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel LE CPC503 Critical Trip Point POR 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive Trip Point Disabled 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive TC1 Value Passive TC2 Value Passive TSP Value PCH Thermal Device Enabled Disabled POR Enabled PCH Temp Read Enabled Disabled Enabled CPU Energy Read Enabled Disabled Enabled CPU Temp Read Enabled Disabled Enabled 10 3 7 USB Configuration Fig 10 9 d COM4 PuTTY USB Configuration USB Devices 1 Keyboard 1 Mouse 2 Hubs USB3 0 Support XHCI Hand off EHCI Hand off USB Mass Storage Driver Support USB hardware delays and time outs USB transfer time out Device reset time out Device power up delay Enabled Enabled Screen of the USB Configuration menu tab Disabled Enabled 20 sec 20 sec Auto Enables Legacy USB support AUTO option disables legacy support if no USB devices are connected DISABLE option will keep USB devices available oniy for EFI applications Select Screen ti Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defauits F4 Save amp Exit ESC Exit CPC503 User Manual 64 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 L
78. submenu sss meme eee Screen of PCI Subsystem settings menu tab Screen of ACPI settings menw tab aiiud ERENNERT Drs EEA ORE Td E caine E Gua RP A geit Screen of CPU Configuration Menu tab we kek resonet eee eeh Gives lade sede ue dens kk EENS eeh en Kain Screen of SATA configuration menu Tab Screen of the Thermal Configuration menu Tab Screen of the USB Configuration menu ab Screen of the Super IO Configuration menu Tab Screen of the Serial port console redirection menu Lab Screen of the Console Redirection Settings menu ab Screen of the CPU PPM Configuration menu Tab screen of the Chipset menu tab ciii oie EENS EN SEENEN GEESS Screen of the System Agent SA configuration menu Tab Screen of the Graphics Configuration menu Tab Screen of the LCD control menu tab ice cente ence tonc mme iex A PUn alt on YER EUREN YE FR e tinea Screen of the NB PCIe Configuration menu tab cece cece e eee e eee eee m emen eerie hehe rennen Screen of the Memory Configuration manu Tab Screen of the PCH IO Configuration menu Tab Screen of the USB Configuration menu ab Screen of the Boot menu tab eater en eno pened can Recent A Fal es KR A ees FARA RO qnia FUE A ei Screen of the Hard Drive BBS Priorities menu Tab Screen of the CSM16 Parameters menu ab Screen of the CSM parameters menu tab ssssssssssssss
79. t Name Description 7 0 Timer Initial Value 7 0 udin l met Ina valer Bits 7 0 of the initial counter value Base 4h Bit Name Description 7 0 Timer Initial Value 15 8 mieten Sa i Bits 15 8 of the initial counter value Base 5h Bit Name Description 7 0 Timer Initial Value 23 16 Miis c Bits 23 16 of the initial counter value CPC503 User Manual 39 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Status Register Base 6h Bit Name Description 7 3 Reserved 2 STF Write read Second timeout flag Is set 1 provided TMF 1 An interrupt is generated on this flag If the module Reset is enabled RSTE 1 Reset occurs Cleared by writing 1 into this bit 1 Reserved 0 TMF Write read First timeout flag Is set to 1 on zeroing the counter An interrupt is generated on this flag Cleared by writing 1 into this bit or by writing to 80h port if enabled Control Register Base 7h Bit Name Description 7 2 Reserved Write read Countdown SEI 1 Enabled 0 Disabled 0 RSTE Write read Reset on timeout 1 Reset enabled 0 Reset disabled CPC503 User Manual 40 2012 Fastwel Ver 001a E Detailed Description Fastwel LE CPC503 3 4 SPI Controller LEDs GPIO 3 4 1 SPI Controller Registers Description Table 3 16 SPI controller registers Base 0 R W 00h FRAM address value
80. t cuts Fastwel T CPC503 10 7 4 Discard Changes and Reset Choose this option for reset without saving the changes made during configuration process The following window will appear after selection of the Discard Changes and Reset option Reset Without Saving Reset without saving 10 7 5 Save Options Options for saving discarding changes made are described below 10 7 5 1 Save Changes When you ve made changes to the system select this option for saving changes while operation continues For separate options it is required to reboot the system to enable using the new parameter configuration Save Setup Values Save configuration Select Yes for saving changes while operation continues 10 7 5 2 Discard Changes Select this option to discard the changes made Load Previous Values Load Previous Values Select Yes for loading the previous values while operation continues CPC503 User Manual 87 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel dE CPC503 10 7 5 3 Restore Defaults Restoring default settings for all the options Load Optimized Defaults Load Optimized Defaults Select Yes to restore the default settings 10 7 5 4 Save as User Defaults Save the changed values as user default settings save Values as User Defaults Save configuration Select Yes in order to save the changes made while operation continues 10 7 5 5
81. t page CPC503 User Manual 21 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 Table 3 1 Designation of XMC XS8 P15 Connector Pins on CPC503 Module Plate P15 TEES Ee EIE 1 RX0 RXO 3 3V RX1 RX1 5V 2 GND GND TRST GND GND PCIRST 3 RX2 RX2 3 3V RX3 RX3 45V 4 GND GND TCK GND GND RSTO 5 RX4 RX4 3 3V RX5 RX5 5V 6 GND GND TMS GND GND 12V 7 RX6 RX6 3 3V RX7 RX7 45V 8 GND GND TDI GND GND 12V 9 NC NC NC NC NC 45V 10 GND GND NC GND GND GAO 11 TXO TXO GA1 TX1 TX1 5V 12 GND GND GND GND GND PRSNT 13 TX2 TX2 3 3V_SBY TX3 TX3 5V 14 GND GND GA2 GND GND MSDA 15 TX4 TX4 NC TX5 TX5 5V 16 GND GND MVMRO GND GND MSCL 17 TX6 TX6 NC TX7 TX7 NC 18 GND GND NC GND GND NC 19 CLKO CLKO NC WAKE ROOT NC Table 3 2 Designation of XMC XS9 P16 Connector Pins on CPC503 Module Plate P16 ISP EE EE EE 1 MDI 4 0 MDI 4 0 LED 2 0 NC NC 45V 2 GND GND LED 2 1 GND GND 45V 3 MDI 4 1 MDI 4 1 LED 2 2 NC NC 3 3V 4 GND GND LED 2 3 GND GND 3 3V 5 MDI 4 2 MDI 4 2 LED 3 0 SATA3 RX SATA3 RX LPC ADO 6 GND GND LED 3 1 GND GND LPC AD1 7 MDI 4 3 MDI 4 3 LED 3 2 SATA3 TX SATA3 TX LPC AD2 8 GND GND LED 3 3 GND GND LPC ADS3 9 MDI 3 0 MDI 3 0 ACT LED NC NC LPC FRAME 10 GND GND USB OC45 GND GND DRQ 0 11 MDI 3 1 MDI 3 1 HDA DOCK EN
82. tes in the nontransparent mode herewith providing a possibility of data exchange via PCI bus 3 2 5 3 Packet Switching Backplane PICMG 2 16 Two Gigabit Ethernet ports are available on the CPC503 XP9 J3 connector in accordance with the PICMG specification for CompactPCI module backplanes with packets switching CompactPCI Packet Switching Backplane Specification PICMG 2 16 version 1 0 These two nodes Gigabit Ethernet 1 and 2 are connected in the chassis via the CompactPCI packets switching backplane to the A and B Fabric slots respectively These PICMG 2 16 features can be used both in the system and in the peripheral slots If the backplane 2 16 is not used Ethernet can be switched to XMC P16 connector 3 2 5 4 Handle switch The microswitch is located in the lower handle of CPC503 front panel It is routed to XP1 connector on the board Opening the handle leads to actuation of the module switch off procedure Short term pressing on the microswitch leads to the module reset The switch operation mode can be changed in BIOS Setup 3 2 5 5 Power supply mode LED SYS Located on the CPC503 front panel the blue SYS LED is intended for indication of the module power supply mode It is used for information that the shutdown process is completed and the module plate is ready to be removed from the slot see Table CPC503 Module SYS LED State CPC503 User Manual 30 2012 Fastwel Ver 001a E Detailed Description Fastwel Le
83. tions may expose your life to danger and may lead to damage to your product Warning Information marked by this symbol is essential for human and equipment safety Read this information attentively be watchful Note This symbol and title marks important information to be read attentively for your own benefit 2 gt gt ES CPC503 User Manual 4 2012 Fastwel Ver 001a E Fastwel Lee CPC503 General Safety Precautions This product was developed for fault free operation Its design provides conformance to all related safety requirements However the life of this product can be seriously shortened by improper handling and incorrect operation That is why it is necessary to follow general safety and operational instructions below A A A Warning All operations on this device must be carried out by sufficiently skilled personnel only Warning When handling this product special care must be taken not to hit the heatsink if installed against another rigid object Also be careful not to drop the product since this may cause damage to the heatsink CPU or other sensitive components as well Please keep in mind that any physical damage to this product is not covered under warranty Note This product is guaranteed to operate within the published temperature ranges and relevant conditions However prolonged operation near the maximum temperature is not recommended by Fastwel or by electronic chip
84. toring and control devices via a two wire DC bus interface The following table presents functions and addresses of onboard SMBus devices Table 3 17 SMBus Devices 1 04CH Memory temperature sensor 2 OA4H 2 SPD Memory module 3 OAOH 1 SPD Memory module 4 OC4H PCI E Bridge PMC 5 0C2H PCI E Bridge Compact PCI 6 02AH PECI SMBUS Bridge 7 02EH LM87 Hardware monitor 3 6 Battery The CPC503 utilizes a 3 0 V lithium battery for the RTC and CMOS memory backup Use Renata Panasonic BR2032 or compatible Batteryless operation is possible with no RTC function 3 7 NAND Flash The high capacity NAND drive 4 GB is installed on the module The drive is connected to SATA interface The drive can be disconnected using the BIOS Setup parameters CPC503 User Manual 43 2012 Fastwel Ver 001a E Installation Fastwel Ley CPC503 4 Installation The CPC503 is easy to install However it is necessary to follow the procedures and safety regulations below to install the module correctly without damage to the hardware or harm to personnel The installation of the peripheral drivers is described in the accompanying information files For details on installation of an operating system please refer to the relevant software documentation 4 1 Safety Regulations The following safety regulations must be observed when installing or operating the CPC503 Fastwel assumes no responsibility for any damage resulting from inf
85. ul Abbreviations Acronyms and Short cuts Fastwel TEN CPC503 10 AM Aptio BIOS Setup CPC503 02 10 1 BIOS Setup start For more information on BIOS Setup start see Section 6 1 10 2 Main This BIOS Setup screen is the main screen upon entering In this tab s menu it is possible to set system clok and date and switch between menu entries in order to adjust module s settings as well as display information related to BIOS Fig 10 1 Screen of the Main menu tab 1f COMA PuTTY BIOS Information BIOS Vendor Core Version Compliancy Project Version Build Date and Time FPGA Version Processor Information Name IvyBridge Brand String Intel R Core TM Frequency Processor ID Stepping Number of Processors Microcode Revision Select Screen fi Select Item Enter Select Change Opt Fi General Help F2 Previous Values F3 Optimized Defauits F4 Save amp Exit ESC Exit ore s 4Thread s Ort oO I2 1000 MHz N yo m o Orn pa M wo oe u Oo b EA sf wo 2 c D to n PCH Information Name PantherPoint Hen fw hy C LX Uu D D E a 0 o o xe i N m e D ene a rr Note Time is set in 24 h format CPC503 User Manual 55 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 10 3 Advanced This tab enables to perform additional module s settings The Figure below shows screen of the Advanced
86. vity indicator informs of SATA drives activity Program controlled GP LED is intended for user defined purposes two color red green Overheat indicator OVH m Watchdog Hardware reset timer is implemented in FGPA on LPC bus W Power reset and monitoring Microprocessor reset signal is generated from the following sources from supervisor at power up from Reset button located in Ejector Switch handle from watchdog timer from PCI bus Reset signal in Slave mode Switches jumpers X2 switch is implemented on board resetting BIOS Setup to defaults CPC503 User Manual 20 2012 Fastwel Ver 001a E Detailed Description Fastwel Lee CPC503 3 2 Module Interfaces 3 2 1 PMC XMC Interface On the top side of CPC503 module plate there are connectors for PMC XMC expansion modules see Figure CPC503 Module Layout Top Side CPC503 supports one XMC PMC expansion module 64 bit 133MHz PCI X bus is routed to P11 P14 PMC connectors ANSI VITA 39 PCI X on PMC PMC I O P14 is routed to RIO module PICMG 2 0 PCI E x8 Gen2 bus is routed to P15 XMC connector ANSI VITA 42 3 XMC PCI Express Protocol Standard Additional interfaces 1xSATA 2xUSB LPC HD Audio 2xEthernet are routed to P16 XMC connector 3 2 1 1 XMC Interface For XMC expansion module CPC503 plate has XS8 P15 and XS9 P16 connectors on board Figure 3 1 XMC XS8 P15 and XS9 P16 Connectors XMC connector pinouts follow on nex
87. with a wide range of equipment To get the details about the CompactPCI standard please refer to PCI and CompactPCI specifications The Internet site of the PCI Industrial Computer Manufacturers Group PICMG provides information related to these standards http www picmg org 1 2 General Description of the Module CPC503 is a processor module based on the latest Intel Core i7 2nd generation processor 2 4 Cores Low power consumption is one of the Core i7 2nd generation 2 4 Cores advantages when at the same time it can operate at frequencies from 1 5 to 2 GHz CPC503 utilizes the PCH QM67 chipset including the standard peripherals of the IBM PC AT platform It gives the module great possibilities when operating with graphics via VGA Displayport DVI or LVDS interfaces Four Gigabit Ethernet ports are used for networking Also CPC503 is equipped with the following set of interfaces 12 USB 2 0 ports 4 SATA ports Audio interface and standard J1 J5 CompactPCI connectors at the rear edge of the board for connection to CompactPCI bus The module supports XMC PMC expansion modules and RIO modules The module may have on board up to 4 Gb of DDR3 SDRAM memory with ECC operating at 1333 MHz CPC503 supports one 64 bit 66 MHz CompactPCI interface The module interacts with the CompactPCI bus via the integrated PCI E PCI bridge One of the features of the CPC503 module is its support of the PICMG CompactPCI Packet Switching Backplane Sp
88. xLED vs 0 CPC503 User Manual 15 2012 Fastwel Ver 001a E Product General Information Fastwel Ley CPC503 2 7 2 Module Appearance Figure 2 3 CPC503 Module Appearance with R1 Heatsink The appearance may vary for different versions of the module This photo shows CPC503 with R1 heatsink installed 4HP CPC503 User Manual 16 2012 Fastwel Ver 001a E Fastwel LE Product General Information CPC503 2 7 3 Module Layout Figure 2 4 CPC503 Module Layout Top Side Ae 5 2959 o resetting BIOS XP7 1 8 HDD XMC PMC XS17 CPCI J1 battery XS16 CPCI J2 XS8 P15 XS9 P16 o E XS11 P13 oXS10 P11 XS13 P14 XS12 P12 DOONAN AON NNN OOD XP9 CPCI J3 XS15 CPCI J4 XS14 CPCI J5 The layout may slightly differ for various versions of the module CPC503 User Manual 2012 Fastwel 17 Ver 001a E Product General Information Fastwel Ley CPC503 2 7 4 Module Dimensions Figure 2 5 CPC503 Module Dimensions CPC503 4HP Front Panel A O O O Oo 6 o o o o XS5 Mo NT or 2882 To on Js uus L e i E IS sch tee ell DDUIDDDDIODDDUID DD ii 25 T P z5 XS17 XS16 XP
89. yboard s set of numeric characters Number Lock LED starts flashing when the Number Lock key button is pressed This parameter automatically enables the Number Lock mode on the keyboard during system boot process This makes possible a direct use of the digital panel located in the right side of the keyboard The Number Lock on the keyboard will be activated This parameter value is a default value 10 5 1 3 Quiet Boot Setting this value makes it possible to change the nature of screen messages during the boot process An optimal and default parameter is Disabled Disabled Select this parameter value for system to generate POST messages Enabled Select this parameter value for the system to generate OEM logo messages This parameter value is a default value 10 5 1 4 Fast Boot 4 Activation of this mode enables to speed up the BIOS boot process by skipping initialization of a part of the hardware An optimal and default parameter is Disabled Disabled Select this parameter value in order to switch off the Fast Boot mode Enabled Select this parameter value to speed up the BIOS boot process by skipping initialization of a part of the hardware CPC503 User Manual 80 2012 Fastwel Ver 001a E Useful Abbreviations Acronyms and Short cuts Fastwel Lee CPC503 10 5 2 Boot Option Priorities This submenu entry shows the priorities of boot options User can change priorities by selecting a separate bo

Download Pdf Manuals

image

Related Search

Related Contents

Samsung NX30 (18-55 mm) Kasutusjuhend  Cadillac Amplified OnStar Interface 2003-2006    取扱説明書 保証書付  Nokia 3650 - File Delivery Service    

Copyright © All rights reserved.
Failed to retrieve file