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DNR-1553-553 Product Manual - United Electronic Industries

1. 5 1 5 5 1 BIT 4 2 3 TIMES COMMAND WORD SYNC TERMINAL ADDRESS T R SUBADDRESS MODE WORD COUNT MODE CODE PAR DATA WORD SYNC STATUS WORD SYNC 1 5 2 Command Word 1 5 3 Data Word ADDRESS RESERVED PAR OF RESPONDING TERMINAL L service RED NS k li INSTRUMENTATION ACCEPTANCE MESSAGE ERROR SUBSYSTEM FLAG BUSY BROADCAST CMD RECEIVED Figure 1 4 1553 Word Formats A Command Word format uses the first 5 bits for the address of the Remote Terminal 0 to 31 The sixth bit is 0 for Receive and 1 for Transmit The next 5 bits indicate the subaddress mode code bits If this field is a 00000B or 11111B the command is a Mode Code Command All other bits direct the data to specific functions in the subsystem The next 5 bits define the Word Count or Mode Code to be performed If this field is 00000B or 1111B the field defines a mode code to be performed If it is not the field defines the number of data words to be transmitted or received depending on the T R bit A word count field of 00000B means 32 data words The last bit is word parity Only odd parity is used A data word contains the information being transferred in a message The first 3 bit times contain a data sync which is opposite to that used for a command or status word Data words can be transmitted by either a remote terminal transmit command or a
2. CHANNEL 0 1 i 1553 Remote terminal and Bus Monitor unit 23 qi 25 T Encoder A E EF re 2 MN with FIFO Validation memory m IRQ Set amp timin generatio s 2 gt BM RX n E Pg EE 2048x32 FIFO Broadcas ewig B lg 1553 a t Eo Encoder B RX TX 222p gj g Per RT 55 2 i with FIFO amp sz Mode mes e s r control status timing control lp FIFO and 2 2 E Zen memory based misc 2 5 206 register pool S is 5 Bac i 1553 2525 mz Lk s ei Decoder A 2 MK Ww 00 34 with timing E E E verification Bus Controller unit Sete 2 i i 8 gt 1553 Direct access to 256x9 Major 5 EB gt p Decoder B the low priority Frame m gb with timing TX FIFO Descriptors 2 E 2 5 verification Transceiver Bus Controller Fa i and bus enoine le inor Frame SIM li j Descriptors 5V gt 5V Soup ne or 3 3V o control DC DC DCDC 16Mbytes External memory management units controls access to control 1 8Mx16bit the memory from two 1553 channels RT BM BC and with PSRAM disable burst urun i memory Figure 3 1 DNx 1553 553 Logic Block Diagram Vers 1 6 File 1553 Chapter 3 fm Tel 508 921 4600 Date May 2010 www ueidaq com DNx 1553 553 Interface Module Chapter 3 38 Programming vvith the Lovv Level API As shovvn in Figure 3 1 each channel has
3. 14 Chapter 2 Programming with the High Level API 15 2 1 Bus Controller Memory Model 25 Chapter 3 Programming with the Low Level API 36 3 1 DNx 1553 553 Logic Block enne 37 Appendix A Accessories hh hh hh hn 84 DI d E EET 85 Zs Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File DNx MIL 1553LOF fm Chapter 1 1 1 Organization of this manual O Copyright 2010 United Electronic Industries Inc DNx 1553 553 Interface Module Chapter 1 ntroduction Introduction This document outlines the feature set and describes the operation of the DNx 1553 553 Communication Interface boards The DNA version is designed for use with a PowerDNA Cube data acquisition system The DNR version is designed for use with a DNR 12 RACKtangle or DNR 6 HalfRACK rack mounted systems Both versions handle 1553 messaging over a dual redundant MIL 1553 bus Please ensure that you have the PowerDNA Software Suite installed before attempting to run examples The DNx 1553 553 User Manual is organized as follows Introduction This chapter provides an overview of the document content the device archi tecture connectivity and logic of the layer It also includes connector pinout notes and specifications Programming with the High Le
4. United Electronic wy Industries The High Performance Alternative DNA DNR 1553 553 MIL STD 1553 Communications Interface User Manual Dual channel MIL STD 1553 Communications Interface for the PowerDNA Cube and RACKtangle Chassis May 2010 Edition PN Man DNA 1553 0510 Version 1 6 Copyright 1998 2010 United Electronic Industries Inc All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without prior written permis sion Information furnished in this manual is believed to be accurate and reliable However no responsibility is assumed for its use or for any infringement of patents or other rights of third parties that may result from its use All product names listed are trademarks or trade names of their respective companies See the UEl website for complete terms and conditions of sale http www ueidaq com company terms aspx Contacting United Electronic Industries Mailing Address 27 Renmar Ave Walpole MA 02081 U S A For a list of our distributors and partners in the US and around the world please see http www ueidaq com partners Support Telephone 508 921 4600 Fax 508 668 2350 Also see the FAQs and online Live Help feature on our web site Internet Support Support support ueidag com Web Site www ueidaq com FTP Site
5. Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 2x fm Chapter 3 3 1 Low Level DqAdv Functions Z Copyright 2010 United Electronic Industries Inc DNx 1553 553 Interface Module Chapter 3 37 Programming vvith the Lovv Level API Programming vvith the Lovv Level API The DqAdv functions of the low level API which are included in this chapter offer direct access to PowerDNA DaqB1O8 protocol and allow you to access device registers directly For additional information please refer to the API Reference Manual document under Start Programs UEI PowerDNA Documentation for all pre defined types error codes and functions you can use with this layer NOTE High level UEI Framework support for this layer is not available in the current release of this product The DNx 1553 553 Interface Module Layer is designed to support MIL STD 1553A and MIL STD 1553B interfaces Two dual redundant independent channels are available The layer can support up to 32 remote terminals RTs one Bus Monitor BM and one Bus Controller BC The layer has two independent channels each channel incorporates all that is needed to communicate with a dual redundant 1553 bus Bus coupling transformer direct is software selectable
6. This bit is typically not used in modern system designs and is discouraged by Notice 2 of the standard A 1 in Bit 17 is used as an indicator of existence of a fault in a subsystem A 1 in Bit 18 indicates that the remote terminal has received a mode code and has accepted control of the bus After setting this bit the remote terminal becomes the bus controller A 1 in Bit 19 the Terminal Flag indicates to the bus controller that a fault exists in the remote terminal hardware A Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 Introduction 1 6 5 Remote Any device that is not a Bus Controller or a Bus Monitor is by definition a Terminal RT Remote Terminal A Remote Terminal can be used as an interface between the bus es and a subsystem or as a connector between this bus and another 1553 bus A subsystem is the sender or user of the information transferred on the bus A remote terminal contains all the components needed to transfer the data from the sender source to the destination user 1 6 6 Bus Controller The Bus Controller BC manages the flow of data on the buses Only one bus BC controller can be active at a given time A bus controller may be one of three types 1 Word Controller 2 Message Controller or 3 Frame Controller A Word controller which handles one word
7. y y 7 1 5 4 Status VV OMG EUM 8 1 6 5 Remote Terminal RT e aa E 9 1 6 6 Bus Controller BC 000000 n 9 1 6 7 Bus Monitor MT RI HH 9 1 6 8 Monitor Terminal with RT Address MT RT 9 1 7 DNx 1553 553 Architecture ee tees 10 1 7 1 Functional Description cece eee 10 1 8 Specifications Bar Hate a eas Bande INE ara aa aaa 11 1 9 Ae 12 1 10 Wiring amp Connectors eae 13 1 11 Jumper Settings for Module Position 8 00 14 Chapter 2 Programming with the High Level API 15 2 1 Creating a SeSSION ia xxu ee had Pea ERE XA Eae CoRR EIU FOE SO Rae dos 15 2 2 Create MIL 1553 Ports eh 15 2 3 Configure Timing skr ik s aya ada pees v b be piu eR IEEE 16 24 Creating a Reader Object and Writer Object for each Port 17 2 5 Starting the 5 580 2 ATS ENEA hn 19 2 6 Reading Writing Data from to a Device ee 19 2 6 1 Reading Bus 20 2 6 2 Programming BusWriter Mode 22 2 6 3 Programming and Working with a Bus Controller 23 2 6 4 Programming and Working wit
8. 1553 553 Connectors Interface Module x x x x x x x GND CH 2 1056 x BUSB2 N 1054 BUSB2 P 1053 x x B x x GND CH 2 048 x x 2 x x x 5 x GND CH 2 1040 x GND CH 2 1038 z A BUSA2 N 1036 BUSAZ P 1035 xx HARPER GND CH 1 1026 BUSB1 N 1022 BUSB1 P 1021 B GND CH 1 1018 xxxx x x 2 x g x x x o x GND CH 1 108 x x x BUSA1 N 104 BUSA1 P 103 A xx GND CH 1 100 Figure 1 7 Pinout Diagram for DNX MIL 1553 Layer A Tel 508 921 4600 www ueidaq com Nes TE United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter1 14 Introduction 1 11 Jumper Figure 1 8 shows the physical layout of baseboard of the DNx 1553 553 Settings for Interface Module highlighted to show the 16 pin jumper block for setting the Module module position within the PowerDNA Cube Position NOTE Layer position jumpers are not provided with the DNR versions of the DNx 1553 553 The physical position of the layer within the DNR RACKtangle enclosure is determined automatically by the system See Figure 1 9 for placement of jumpers for various layer positions ina Cube i Note The removal of a daughter card is required for this layer to gain access to the jumper header Figure 1 8 Jumper Block on Base Board for DNA MIL 1553 Layer Position 1 11 0 1 Jumper A diagram of the jumper block is shown i
9. always zeroes for the flags 29 0 TIME LSB 30 LSBs of the timestamp tag Flag word format in BM data Bit Name Description 31 30 ZERO Upper two bits are always zeroes for the flags 29 RES29 Reserved for future use 24 RES24 Reserved for future use 23 OVRE 1 if decoder data overrun was detected 22 PE 1 if parity error was detected 21 DBE 1 if error detected during data bits reception 20 SBE 1 if error detected during SYNC bit reception 19 ZCE 1 if invalid combination is detected positive line lt gt Inegative line 150nS after zero crossing 18 SET 1 if edge edge timing is invalid for the SYNC bit 17 DET 1 if edge edge timing is invalid for the data bit 16 TOUT 1 if timeout is detected while waiting for the edge on positive and negative input lines 15 1 TIME MSB 15 MSBs of the 45 bit timestamp tag currently bits15 3 are reserved and bits 2 1 contain upper two bits of the timestamp 0 BUSID 1553 bus ID 172A 0 SetTxBus tUeiMIL1553PortActiveBus portBus can be used to select which bus to listen on A or B or both By default a bus controller listens to communication on both buses Z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 Qy DU Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 23 Programming with the High Level API 2 6 2 Programming In Bus Monitor mode a user can send arbitrary data packets on the
10. bus using BusWriter the BusWriter mechanism Mode To use BusWriter an appropriate frame needs to be created first CUeiMIL1553TxFifoFrame outFrm new CUeiMIL1553TxFifoFrame Then the frame needs to be filled with appropriate information outFrm gt CopyData messageSize data outFrm gt SetCommand startRt startSa messageSize UeiMIL1553CmdBCRT writer gt Write 1 outFrm amp numFramesWritten The following command codes are defined UeiMIL1553CmdBCRT Remote terminal to receive data from bus controller UeiMIL1553CmdRTBC Remote terminal to transmit data to bus controller UeiMIL1553CmdRTRT One remote terminal to transmit data to another remote terminal UeiMIL1553CmdModeTxNoData Tx Status word UeiMIL1553CmdModeTxWithData Remote terminal to transmit data and or status word to bus controller UeiMIL1553CmdModeRxWithData Remote terminal to receive data for mode command from bus controller UeiMIL1553CmdBCRTBroadcast Remote terminal to receive broadcast data from bus controller UeiMIL1553CmdRTRTBroadcast One remote terminal to broadcast data to other remote terminals UeiMIL1553CmdModeTxNoDataBroadcast Mode command without data remote terminals should not reply UeiMIL1553CmdModeRxWithDataBroadcast Mode command with data remote terminals should receive data There are two overloaded methods of SetCommand SetCommand int Rt_ int Sa_ int WordCount_ tUeiMIL1553Command
11. frame zero to it and rely on the automatic allocation of BCCBs In case a user wants to take BCCB allocation into its own hands another member function can be called AddMajorEntry minorId entryMU BCCBSegment where minorld is a minor frame assigned entryMJ are flags but BCCBSegment is an upper 4 bits of a 12 bit BCCB index Now we need to program minor frame entries two of them in our case minor gt AddMinorEntry UeiMIL1553MnEnable minor gt AddMinorEntry UeiMIL1553MnEnable writer gt Write 1 minor amp numFramesWritten And BCCBs that correspond to that entry fdata 0 gt SetCommand UeiMIL1553CmdBCRT Rt Sa WordCount fdata 0 gt SetCommandBus UeiMIL15530pModeBusBoth fdata 0 gt SetCommandDelay 100 fdata 0 gt SetRetryOptions 3 RetryType fdata101 5CopyRxData WordCount datal6 writer gt Write 1 fdatal01 amp numFramesWritten fdata 1 gt SetCommand UeiMIL1553CmdRTBC Rt Sa WordCount fdata 1 gt SetCommandBus UeiMIL15530pModeBusBoth fdata 1 gt SetCommandDelay 100 Delay in us fdata 1 gt SetRetryOptions 3 RetryType writer gt Write 1 fdatal11 amp numFramesWritten When you program a BCCB you can select various retry options see Reference Manual for further details tUeiMIL1553BCRetryType RetryType tUeiMIL1553BCRetryType UeiMIL1553BCR RNR UeiMIL1553BCR ESR UeiMIL1553BCR RE At this time the BC controller is fully programmed and ready for
12. lqesip eq Aew 1o duse lqe JO dIJOSap v pue n n pesseooud si AyjUS ix u pue paJouBi si Joyduosep 14 SIU JI 40 duos p ejqeu3 N3 8400 6 00 Ordgdgv Lrsagav Jejunoo si sie r eouenbes PUBWILUOD EGG 34 JO uonnoexe Injsseoons es s 110 10 ue yoolq 828 ul peyioeds e oqe si seujeJ jo s qulnu i sydwaye AyjaJ Jo jequinu sjunoo jejunoo 40413 ONNE YIM paynoexe sem Aqua JI p 14 snjejs yya ouo jsee je sem u JI p 14 SNIS qa smeis YIM pepuodsei 10110 UI SEM JEU LY EGG JI L 114 SNIS HH v sng 0 pesseooud sem Aue euin jse pesn sem yeu snq sejeorpur 11 snyejs qo peigesip aq IIM 31 uay pue eouo pejnoexe aq ill Ayjua Jas JI Bey eouo ejnoex3 10 s 10 duos p 0z 110 ji Agua juano ejqeue p N3 Ni GASM ousdav raav zuaav esdav yadav ssaav 9uaav ZLASY o 1 e Eo b b k kB 5 L Zr a duejseum smejs 1H des 1992 s ql Og wo snjejs 10413 rosaa Joydiiosap ewe JOUW 0 9seq 10 yoolq euo 8LX9GZ g xgzi x91 g xgsz AJOWSW ul s lqe 10 d iosep s lqe 10 duosep SyOO q 0140 OG JOUIN awed 1oleyy Figure 2 1 Bus Controller Memory Model 1 6 Vers File 1553 Chapter 2x fm www ueidaq com May 2010 Tel 508 921 4600 Date United Elec
13. operation To Switch the bus controller into operating mode we need to use UeiMIL1553BCControlFrame bcControl gt SetEnableContinous MajorClock MinorClock The Major clock should be selected in such a way as to allow all minor frames to be performed within a single major clock 1 o MajorClock MinorClock 10 0 writers 0 Write 1 bcControl amp numFramesWritten You need to make sure that all commands programmed in the major and minor frames can be executed before the next major or minor clock If a command is not completely executed at the time of the next clock it is cancelled and either a major or the next minor frame is executed z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 29 Programming with the High Level API There are several ways a bus controller can be clocked The normal way is to clock it continuously with major and minor clocks selected Note that the minor frame clock is reset every time a major frame clock occurs Thus the first minor clock happens simultaneously with the major clock and the first major frame entry is executed For debugging instead of running a bus controller continuously a user can debug a bus controller in a step by step fashion by performing major and minor steps A major step is performed by writing a control frame which is
14. set to beControl gt SetOneMajorStep When this control frame is written the bus controller makes one major frame step and executes the first major frame entry To execute the next entry i e execute the next minor frame use SetOneMajorStep You can always see the status of execution i e bits in the minor frame by reading CUeiMIL1553BCSchedFrame with properly set minor frame number index block and the number of entries added to match the number of requested entries You can request information about what major and minor entries are currently executed by reading CUeiMIL1553BCStatusFrame Once the bus controller is up and running you can read the BCCB status and write BCCB data into it at any time normally done in the cycle Change and retrieve BC data each iteration Store data for BC Receive command for i 0 i WordCount i datal6 i ulnt16 0x1000 c i fdata101 5CopyRxData WordCount datal6 writer gt Write 1 fdatal01 amp numFramesWritten Read data stored in BC Transmit command reader gt Read 1 fstatus 1 amp numFramesRead std cout lt lt BC lt lt fstatus 1 gt GetBcDataStr WordCount lt lt std endl This particular example updates data in a BCCB data frame in a cycle and reads and prints out the contents of the BCCB status frame There are multiple helper methods associated with both BCCB data and status classes Please see UeiDaq Reference Manual for furt
15. to 32 16 bit data words The selected terminal then sends a single 16 bit Status Word back to the Bus Controller immediately followed by 1 to 32 data words Broadcast Data The Bus Controller BC sends one command word with a Terminal Address of 31 which signifies a broadcast type of command followed by 1 to 32 data words All terminals accept the data but do not send a response This function is used for system updates such as time of day etc Mode Code The Bus Controller sends one command word with a subaddress of either 0 or 31 signifying a Mode Code command type Depending on which command is sent the command may or may not be followed by a single word The Remote Terminal responds with a Status Response word which may or may not be followed by a single data word e RT to RT Transfer The Bus Controller sends a Receive Data command followed by a Transmit Data command to a specific terminal The terminal sends a Status Word followed by 1 to 32 data words to a specified receiving terminal The receiving terminal the sends its Status Word indicating that it received the transmitted data 1 5 Word Formats The 1553 standard defines three word types Command Data Status Each word type has a specific format within a common structure All words are 20 bits in length and the first three bits are a synchronization field which enables the decoding clock to re sync at the beginning of each new word The next 16 bits contain th
16. with the High Level API lt Status0 gt is a combination of last command upper 16 bits and status lower 16 bits word of the last command Note that this information is on per RT basis and if another SA of the same RT received or sent a command the previous command status information will be overwritten lt Status1 gt is the last SYNC upper 16 bit and transmitter shutdown lower 16 bit data words if those commands were received In a default mode all 32 RTs and all 32 SAs are functional once you start operations Often this mode is not a desirable mode of operation because only a certain subset of RT SA needs to be in operation especially when the application involves simulation of a part of an aircraft network To limit the scope of simulated RTs you need to set up filtering CUeiMIL1553FilterEntry filterFrm new CUeiMIL1553FilterEntry Filter entries are accumulated in the Framework when the procedure of setting RT filtering looks as follows pPort0 gt ClearFilterEntries for up to 360 entries filterFrm gt Set UeiMIL1553FilterByRt Rt filterFrm gt EnableCommands TRUE TRUE TRUE pPort0 gt AddFilterEntry filterFrm pPort0 gt EnableFilter TRUE Filtering can be accomplished by the following criteria UeiMIL1553FilterByRt Filter only by RT numbers all SAs of any length are enabled UeiMIL1553FilterByRtSa Each RT SA combination should be declared UeiMIL1553FilterByRtSaSize E
17. BCCB reports about data status compare failure Status Validation A MIL 1553 553 bus controller is able to perform operations on data received from an RT status word or both status words for an RT RT command and accept or reject a reply from an RT depending on the received status To enable this option you need to call CUeiMIL1553BCCBDataFrame EnableStatusCompare int number unsigned short and_sts unsigned short or_sts unsigned short value int enable where number is either O for main status or 1 for the second RT RT command status Regardless of which status this is the following logic operations will be performed on them lt received status amp and sts or sts value If the result of this operation is TRUE the status passed validation Using and sts you can mask out irrelevant status bits and using or sts you can set up bits in the received command to be able to pass validation for say different replies See bits UeiMil1553 BCB ERRSTS0 S1F and UeiMill553 BCB ERRSTSO S2F in tUeiMIL1553 BCB ERRSTSO for information about a status compare failure Multi Rate Programming The MIL 1553 standard calls for the ability to run different frames at different frame rates The MIL 1553 553 layer provides two ways to support multiple rate programming The first way is known as a Link Bit which allows execution of two or more major frame entries upon a single minor frame clock Let s assume th
18. CUeiMIL1553RTDataFrame pFrame new CUeiMIL1553RTDataFrame writer gt Write numFramestoWrite pFrame amp numFramesWritten reader gt Read numFramestoRead pFrame amp numFramesRead Note that the first read or write from a 1553 channel configures all operations and starts the layer 2 6 4 Reading Bus Bus Monitor is the simplest function to use Monitor To do so first create a new bus monitor frame CUeiMIL1553BMFrame bmFrm new CUeiMIL1553BMFrame Then read bus monitor data from that accumulated in the 1553 bus monitor buffer it can accumulate up to 1024 32 bit data words z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 21 Programming with the High Level API readers 1 gt Read 1 bmFrm amp numFramesRead You can either work with the frame members directly or use helper methods to display data as strings if numFramesRead std cout lt lt bmFrm gt GetBmDataStr lt lt std endl Raw bus monitor data is represented as follows First 32 bit word bit 31 parity error on the bus if any bit 30 set to 1 for command or status bits 29 thru 16 time in 15 15ns interval since previous command or status bits 15 thru 0 command or status as received from the bus If there is data following the command it is represented in the following format bit 31 p
19. DLE tag 0xC0000000 which indicates that the 1553 bus that was driving the BM went into the idle state The idle tag is used internally in the firmware to separate messages and is not exposed in the datastream into CUeiMIL1553BMFrame e Note that when BMALL bit is cleared normal operation the BM follows messages from bus A or B but only one bus at the time If for any reason in violation of the 1553 protocol any device sends data on both buses only the transmission from one bus will be logged data from the other bus will be processed upon the first bus going into the idle state in the case in which more than one word was received prior to switching to the second bus the data from the second bus will be corrupted z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 Programming with the High Level API BM data structure Command Status Data format in BM data Bit Name Description 31 PARITY One in this bit indicates parity error 30 WORD_TYPE Word type 1 command status Ozdata 29 16 GAP1553 Gap interval on 1553 bus measured in 66MHz clocks 248 2uS max Ox3FFF indicates that gap counter has expired 15 0 DATA1553 1553 data from to the decoders Timestamp LSB part word format in BM data Bit Name Description 31 30 ZERO Upper two bits are
20. Frame class write or read RT send and transmit data areas This class is used to construct and manipulate CUeiMIL1553RTStatusFrame to simplify its use It can be used only with CUeiMIL1553Reader read class CUeiMIL1553RTStatusFrame public tUeiMIL1553RTStatusFrame e CUeiMIL1553RTControlFrame class run time control of RT This class is used to construct and manipulate CUeiMIL1553RTControlFrame to simplify its use t can be used only with CUeiMIL1553Writer write class CUeiMIL1553RTControlFrame public tUeiMIL1553RTControlFrame e CUeiMIL1553FilterEntry Class run time control of RT This class is used to construct and manipulate CUeiMIL1553FilterEntryto simplify its use It can be used only with CUeiMIL1553Writer write class CUeiMIL1553FilterEntry public tUeiMIL1553FilterEntry CUeiMIL1553RTParametersFrame Class specify RT parameters during initialization This class is used to construct and manipulate CUeiMIL1553RTParametersFrame to simplify its use lt can be used only with CUeiMIL1553Writer write class CUeiMIL1553RTParametersFrame public tUeiMIL1553RTParametersFrame eX Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 20 Programming with the High Level API CUeiMIL1553TxFifoFrame class write data to BusWriter This class is used to const
21. Full or selective monitoring by RT address Monitored parameter In addition to bus data BM mode time tags data and capture Word Message Error status and RT response time Operating Temp tested 40 C to 85 C Operating Humidity 0 95 non condensing MTBF 275 000 hours Vibration IEC 60068 2 6 5 g 10 500 Hz sinusoidal IEC 60068 2 64 5 g rms 10 500 Hz broad band random Shock IEC 60068 2 27 50 g 3 ms half sine 18 shocks 6 orientations 30 g 11 ms half sine 18 shocks 6 orientations Altitude 0 70 000 feet 0 21 336 m Figure 1 6 DNx 1553 553 Specifications Z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm 1 9 Software DNx 1553 553 Interface Module Chapter 11 12 ntroduction Refer to Chapters 2 and 3 for information on hovv to program the DNx 1553 553 nterface Module UEIDAQ Framework is a programming facility that allows you to connect transparently to a cube or RACKtangle and then configure the DNx 1553 553 module to communicate with other 1553 devices Attach to the 1553 bus es and then send and or receive 1553 packets O Copyright 2010 United Electronic Industries Inc Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 11 13 ntroduction 1 10 Wiring amp Figure 1 7 illustrates the pinout of the DB 62 connector on the DNx
22. Isolation Trans 9 o o o o former former m a Data Bus A Data Bus B Isolation Trans former former o m N m N e 1553 Transceiver Isolation Trans former former Channel 2 Figure 1 5 Block Diagram of the DNx 1553 553 Interface Module 1 7 4 Functional As shown in Figure 1 5 the module has two independent 1553 channels each Description connected to a dual redundant data bus via coupling isolation transformers or isolation transformers only and each with an independent dedicated transceiver The coupling transformers and the transformer taps can be selected by opto isolated relays under program control Note that different transformer ratios are used for direct or transformer coupling Each channel can function independently as a Bus Controller Remote Terminal or Bus Monitor as determined by the software subject to the restrictions of the applicable MIL standard Z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 ndusines Ine Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 11 Introduction When the channel is operating as a transmitter messages are sent from the host through the DNx 1553 553 module to the selected Data Bus The address contained in the message itself determines the destination of the message The transceiver transmitter accepts Manchester encoded biphase data and converts it to differentia
23. L RX WCMAX LSB 1L 5 0 32 1 31 1 31 define SL553 MEMVAL RX WCMIN MSB 1L 4 Minimum word count for the RX define SL553 MEMVAL RX WCMIN LSB 1L 0 0 32 1 31 1 31 2 7 Stopping the Session 2 8 Destroying the Session Setting validation entries directly is an advanced operation It is described in more detail in the PowerDNA API Reference Manual You can stop the session by calling the session object s method stop Stop the session mySession Stop Note that if you don t explicitly stop the session it will be automatically stopped when the session object is destroyed or when it goes out of scope In C if you created the session object on the stack it will automatically free its resources when it goes out of scope As an alternative you can force it to free its resources by calling the method CleanUp as shown below Clean up session mySession CleanUp If you dynamically created the session object you need to destroy it to free all resources Destroy session delete pMySession In C you need to call UeiDaqCloseSession to free all resources UeiDaqCloseSession mySession With NET managed languages the garbage collector will take care of freeing resources once the session object is not referenced anymore You can also force the session to release its resources by calling the Dispose method Z Copyright 2010 United Electronic Industries Inc
24. L1553BCSchedFrame major new CUeiMIL1553BCSchedFrame UeiMIL1553BCFrameMajor CUeiMIL1553BCSchedFrame minor new CUeiMIL1553BCSchedFrame UeiMIL1553BCFrameMinor CUeiMIL1553BCCBDataFrame fdata new CUeiMIL1553BCCBDataFrame 121 CUeiMIL1553BCCBStatusFrame fstatus new CUeiMIL1553BCCBStatusFrame 2 The type of scheduler frame is assigned at the moment of creation by using a constructor with initialization Let s assume that we are going to have one minor frame with two entries in it and then construct BCCBs for both data and status fdata 0 new CUeiMIL1553BCCBDataFrame 0 0 0 first and fdata 1 new CUeiMIL1553BCCBDataFrame 0 1 0 second minor frame entries fstatus 0 new CUeiMIL1553BCCBStatusFrame 0 0 0 ditto status fstatus 1 new CUeiMIL1553BCCBStatusFrame 0 1 0 We will also need a BC control frame to start stop and perform debug operations with the bus controller tUeiMIL1553BCControlFrame bcControl new tUeiMIL1553BCControlFrame The next step is to program a major frame entry major AddMajorEntry 0 UeiMIL1553MjEnable writer Write 1 major amp numFramesWritten z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 28 Programming with the High Level API In this case we enable the first entry in the major frame We assign minor
25. Type Command_ and SetCommand int Rt_ int Sa_ int Rt2_ int Sa2_ int WordCount_ tUeiMIL1553CommandType Command_ The second SetCommand method is used to send RT RT type commands Another useful method is SetDelay int Delay which inserts a delay in microseconds before execution of the command SetDelay can be used to create a certain communication pattern on the bus without needing to use a bus controller SetTxBus tUeiMIL1553PortActiveBus portBus can be used to select which bus to use A or B z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 24 Programming with the High Level API 2 6 3 Programming The Bus Controller is by far the most complicated functional element on a and Working MIL 1553 553 layer with a Bus The DNx 1553 553 layer supports full implementation of the BC all 1553 Controller transfer types are supported major and minor frame timing is fully programmable and the BC also implements recovery of failed transactions and auto status requests for the RTs that are in the dead state A Bus Controller uses the following memory model note that terms descriptor and entry are used interchangeably and both refer to the single record in the major or minor frame tables 1 One major frame is defined A major frame may contain up to 256 entries
26. ach RT SA combination and size of Rx Tx Min Max data should be declared You cannot mix and match criteria The Framework takes first entry filtering criteria and applies it to all consecutive entries programmed Next you need to fill the Tx data area of the RT with data outFrm gt CopyData WordCount datal6 writer gt Write 1 outFrm amp numFramesWritten Once data is written to an RT Tx data area the RT becomes active if it was explicitly selected in the filter or filter wasn t set at all To read data from an RT Rx data area you read reader gt Read 1 inFrm amp numFramesRead std cout lt lt RT lt lt inFrm gt GetFrameStr lt lt Data lt lt inFrm gt GetDataStr lt lt std endl Please refer to the description of CUeiMIL1553RTFrame for more detailed information and helpful member functions z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 36 Programming with the High Level API Controlling an RT controller CUeiMIL1553RTControlFrame allows multiple control options You need to use writer to write this frame to change RT behavior on the fly The best bet is to use helper functions that will help to fill the frame with proper values First you need to create a control frame CUeiMIL1553RTControlFrame ctrlFrame new CUeiMIL1553RTControlFr
27. ame This frame could be used for various purposes such as 1 Enable disable RTs crtlFrame gt SetRt Rt select Rt to enable disable ctrlFrame gt SetEnable TRUE or FALSE to disable this RT writer gt Write numWrite ctrlFrame amp numWritten The Framework will combine enable disable flags from each frame in the Write operation and write it to the RT controller in one block 2 Enable disable RTs by mask crtlFrame gt SetRt Rt select Rt to enable disable ctrlFrame oSetEnableMask Rt mask set bit to 1 for each Rt to enable writer gt Write 1 ctrlFrame amp numWritten You need to write only one frame to enable disable each RT because all RTs are represented as a bitmask 3 Set block for each RT ctrlFrame gt SelectBlock Rt Block Block is or 1 writer gt Write numWrite ctrlFrame amp numWritten The Framework will combine enable disable flags from each frame in the Write operation and write it to the RT controller in one block 4 Set validation entry directly ctrlFrame gt SetValidEntry Rt Sa validationEntry writer gt Write numWrite ctrlFrame amp numWritten Validation entries are defined in powerdna h as follows define SL553_MEMVAL LB EN 1L lt lt 30 1 to loopback this Rx to Tx define SL553 MEMVAL ERRI 1L lt lt 29 1 inject error into the traffic for this RT SA Code is in bits 0 9 define SL553 MEMVAL MD TX_DW 1L lt lt 28 1 when mode da
28. and CUeiMIL1553RTFrame inFrm inFrm new CUeiMIL1553RTFrame Rt Sa Block messageSize Output data frame i e data for a Tx command CUeiMIL1553RTFrame outFrm outFrm new CUeiMIL1553RTFrame Rt Sa Block messageSize In this particular example Rt and Sa are an RT and SA of interest Block is the part of the RT data which is data that is going to be written to and messageSize should be equal to Word Count of the expected bus controller command for this RT The next optional step is to create status request and control frames as well as a filter entry CUeiMIL1553RTStatusFrame rqFrm new CUeiMIL1553RTStatusFrame Rt where Rt is a A status frame allows you to read reader gt Read numFrames statusFrame amp numFramesRead status of the particular RT Let s look at the structure of the status frame tUeiMIL1553RTStatusFrame A few members contain important information about the current status of RT lt DataReady gt has bits set for SAs that received data lt DataSent gt has bits set for SAs that transmit data of course upon appropriate BC command lt ChStatus gt represents the current status of the port bus To decode this bitfield a user needs to use tUeiMIL1553 CH STS structure a Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 35 Programming
29. arity error on the bus if any bit 30 set to 0 for data word bits 29 thru 16 time in 15 15ns interval since previous command or status bits 15 thru 0 data as received from the bus If timestamps are enabled using the CUeiMIL1553Port EnableTimestamping method timestamps are enabled by default the last two words contain a 32 bit absolute timestamp of the message in 10us resolution timestamps are reset when the session starts and the various flags defining the current bus status and which bus A or B the command was received on See PowerDNA API Reference Manual for further detail A Bus Monitor works as follows Each time a command status word is decoded on the 1553 A B bus it is validated against an RT filter If the RT address is not included in the monitoring all command status and consequential data are ignored If the RT address is included into the monitoring the timestamp is stored into the internal register and the command status with gap timeout counter is stored into the FIFO After that each received data word is stored into the FIFO until the next command status word is received and the process repeats itself Once a data gap interval is detected OR another control status word is received the following optional information is stored into the BM FIFO e Timestamp word 30 LSBs of the timestamp optional e Flags status word status information and extra bits of the timestamp if enabled Bus I
30. at a time is seldom used today because of the processing burden it places on the subsystem A Message Controller handles one message at a time interacting with the computer only when a message is complete or when a fault occurs A Frame Controller can process multiple message in a defined sequence interrupting the computer only when the message stream is complete or after an error is detected 1 6 7 Bus Monitor A Bus Monitor is not able to transmit messages on the bus its function is to MT monitor and record messages being transmitted on the bus without disrupting other devices A bus monitor can be set up to record selected subsets of the messages on the bus It can also be set up as a backup bus controller ready to take over whenever needed 1 6 8 Monitor When a monitor with RT address MT RT receives a command addressed to its Terminal with terminal address it responds as a remote terminal For all other commands it RT Address responds as a monitor The remote terminal functions may be used to modify the MT RT operation of a specific monitor Z O Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 11 10 ntroduction 1 7 DNx 1553 553 Figure 1 5 is a block diagram of the architecture of the DNx 1553 553 interface Architecture module solation Trans former former 1553 Transceiver
31. at we have created three types of frames one set of RTs needs to be updated at 8Hz another set of RTs needs to be updated at 4Hz and the slowest RT needs to be updated at 1Hz Let s consider the following major frame major clock set to 1Hz and minor clock set to 8Hz as shown in Table 2 2 on page 32 z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter21 32 Programming vvith the High Level API Table 2 2 Multi Rate Programming Major Entry Minor Frame Effective Upon Clock Index Type Flags Update Rate Tick 0 0 Enable 8Hz Major 1 1 Enable Link 4Hz 2 2 Enable Link 1Hz 3 0 Enable 8Hz Minor 4 0 Enable 8Hz Minor 5 1 Enable Link 4Hz 6 0 Enable 8Hz Minor 7 0 Enable 8Hz Minor 8 1 Enable Link 4Hz 9 0 Enable 8Hz Minor 10 0 Enable 8Hz Minor 11 1 Enable Link 4Hz 12 0 Enable 8Hz Minor Major frame entries 0 1 and 2 are executed upon a major clock tick entries 3 and 4 5 and 6 etc are executed upon a minor clock tick There is no delay in execution between pairs of entries larger than those required to execute the corresponding minor frame The second way of doing the same thing is to create three minor frame types Type 2 contains data for update rates 8Hz 4Hz and 1Hz Type 1 contains entries for rates 8Hz and 4Hz and Type 0 contains minor e
32. bus controller receive command The remote terminal is the reference point The next 16 bits may be used however the designer wishes The only standard requirement is that the most significant bit must be transmitted first Z Copyright 2010 United Electronic Industries Inc Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 Introduction The last bit is an odd parity bit 1 5 4 Status Word A remote terminal responds to a valid message by transmitting a status word The status word tells the bus controller whether or not a message was received properly and what the state of the terminal is The status word is cleared after receiving a a valid command word After the status word is cleared the bits are set again if the conditions that set the bits initially still exist If an error is detected in the data the Message Error bit is set and transmission of the status word is suppressed Transmission of the status word is also suppressed whenever a broadcast message is received The first 5 bits of the status word bits 4 8 are the Terminal Address The remote terminal sets these bits to the address to which it has been programmed The bus controller examines these bits to ensure that the responding terminal is the one to which the command word was addressed The next bit 9 is the Message Error bit which is set by the terminal on detection of an
33. dual 1553 decoders that are capable of decoding independent streams of 1553 Manchester vvords and passing them to upper level subsystems Decoders can detect various timing errors on the bus and also keep track of the gap interval betvveen messages as vvell as data parity errors and type of received data vvords command status or data When data is stored into the 1024 32 bit word FIFO BM mode it is stored from both A and B buses and each control status word may be optionally time stamped In RT mode the 1553 protocol is parsed and processed by the RT state machine which inherently supports up to 32 RTs simulated by the single channel Each RT may be individually enabled and each sub address may be also individually configured for RX TX or both with maximum and minimum numbers of allowable data words per subsystem Mode commands may be enabled and disabled as well Also each sub address and each mode command have a flag that controls interrupt generation upon receiving a corresponding RX TX or mode command Switching between A and B redundant buses takes place automatically upon receiving a command on the bus and the host may receive an interrupt once it happens The Manchester encoder allows data output on A and or B buses However it always accepts data from the same source i e it is impossible to send different data to A and B buses at the same time The encoder has a two 256x32 word FIFO that accepts 1553 data in a format that includ
34. e within 2 Figure 1 2 shows one of the two buses Each transceiver is also connected in the same way to the second redundant bus Note that although a 1553 system may also have additional redundant buses the DNx 1553 553 interface module is designed for systems with two buses only Direct Coupled Transformer Coupled 5 Termination Data Bus z 20 foot maximum stub length Transceiver AAAA YYYVY gt Isolation Resistors Coupling Transformer 1 foot maximum stub Isolation ngin Resistors AAAA CY Y X Y Transceiver 0 0 mn Isolation Transformer Figure 1 2 Terminal Connection Types One Bus Shown Although multi stub couplers may be used in place of individual couplers according to the standard this does not apply when the DNx MIL 1553 board is used because the DNx 1553 553 interface module is designed with software selectable direct or transformer coupling and has termination resistors built in The data bus therefore can be connected directly to the I O connector of the interface module 4 O Copyright 2010 United Electronic Industries Inc Tel 508 921 4600 Date May 2010 www ueidaq com Vers 1 6 File 1553 Chapter 1 fm 1 4 Bus Protocol Copyright 2010 United Electronic Industries Inc DNx 1553 553 Interface Module 5 Chapter 1 Introduction All 1553
35. e information in a format that varies with the word type The last bit in the word is a parity bit which is based on odd parity for a single word All bit encoding is based on bi phase Manchester Il format which provides a self clocking waveform The signal is symmetrical about zero and is therefore compatible with transformer coupling In Manchester coding signal transitions occur only at the center of a bit time A logic 0 is defined as a transition from negative to positive level a logic 1 is the reverse Note that the voltage levels on the bus are not the information signal all information is contained in the timing and direction of the zero crossings of the signal on the bus A Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 Introduction The terminal hardware provides the encoding and decoding of the various word types The encoder also calculates parity For received messages the decoder signals the logic what sync type a word is and whether or not parity is valid For transmitted messages input to the encoder defines what sync type to place at the beginning of a word The encoder calculates parity automatically for each word The formats for each word type are illustrated in Figure 1 4 51617 8 9 10 11 12 13 14 15116 17 18 19 20
36. en a coupled network is not available This mode is normally not recommended The normal coupling is VeiMIL1553CouplingTransformer The UeiMIL1553CouplingLocalStub coupling option requires a local stub to be populated on the 1553 board this is an extra cost option Direct coupling is used sometimes a in laboratory environment but is extremely rare probably in cases in which there is no network and an RT is connected directly to the board using two wires Note that you will need to create one reader and one writer per port to access port data in any mode of operation A user can select which bus on which to transmit data using the CUeiMIL1553Port SetRxBus method Note that for transmission of messages either bus A or bus B should be selected default is bus A CUeiMIL1553Port SetRxBus selects which bus to listen to Table 2 1 on page 17 describes the bus settings that are allowed for various modes of operation z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module 17 Chapter 2 Programming with the High Level API Table 2 1 Selection of Transmit Bus BM BW RT BC Settings Listen Rx Transmit Tx Listen Rx Transmit Tx Listen Rx Transmit Tx Rx A A only A only A only Rx B B only B only B only A and B A and B A and B Both normal n
37. en retries will cause bus controller to retry that command forever The following retry types are defined typedef enum tUeiMIL1553BCRetryType UeiMIL1553BCR_IRT 1L lt lt 14 Retry on incorrect RT in status UeiMIL1553BCR_RUS 1L lt lt 13 Retry on unexpected status reception UeiMIL1553BCR_RUD 1L lt lt 12 Retry on unexpected data reception UeiMIL1553BCR_RWB 1L lt lt 11 Retry on wrong bus response UeiMIL1553BCR_RIS 1L lt lt 10 Retry on illegal bits set in status UeiMIL1553BCR_RBB 1L lt lt 9 Retry on busy bit in status UeiMIL1553BCR_RTE 1L lt lt 8 Retry on bus timing error late reply UeiMIL1553BCR_RWC 1L lt lt 7 Retry on word count number of data words received 1L lt lt 6 Re enable command transmission on successful status reply 1L lt lt 5 Retry on no response UeiMIL1553BCR_RE UeiMIL1553BCR_RNR UeiMIL1553BCR_ERE 1L lt lt 4 Enable re transmit on alternative bus each retry UeiMIL1553BCR ESR 1L lt lt 3 Enable periodic status request command vhen retry tUeiMIL1553BCRetryType While most retry types are self explanatory some of them require explanation Ifthe UeiMIL1553BCR ESR bit is set the bus controller will continue to retry this command with the status request command even if all retry attempts have expired If at one moment the destination RT replies with the status you can receive this notification in a BC stat
38. erence Manual Figure 2 1 is a graphical representation of the Bus Controller Memory Model The notes listed below the figure contain explanatory information Copyright 2010 Tel 508 921 4600 www ueidag com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 26 th the High Level API ing wi Programm neduioo eui 0 iM eq jsnui syq XASH Luejsibe1 S4499 1404 29919 Woy uexel S 4VMQQV 14 9909 10 21 JO 0 9 pue 8 1 S4q 8008 JO sseJppe x pul 0 JHAAY Pue 8 1 LYAAY 490 9 y 104 eM 104 Op euj amp Jj soulu Burpeeoaud y o Jojduosep xur1 MNIT 61 0 ql eure jou JN 992uo0 sea je pojnoaxe se Ayjua JI p Yq smes aa yoojo eureJj Jofew yx u uodn dYMS s lenl l PY8ZXO PW1LZX0 dMSOJ 1404 29919 01 IUM y owed Jofew y jo BuruuiBeq y je lqe 10 duos p owed sofew y ur eouenbes eu eBueuo snoeueynuurs smoje 1senbeJ GYMS 3s nb l qv Ms uodn il ejqesip p lqEsip ji Aus ejqeu3 dVMS OYIN Io8 LYOd SS 1S uonnoexe eureJj oulul y jo uogejduioo uodn OYI enss od s Bess ul olpoL dE pell wes souu v 10 pasn eq e pejgesip Ajjeorewoyne aq IM 31 uay pue e2uo aq IlIM ue Jas i Beli eouo in xzi 10 sJo duosep awed JOUIW Jo pue BW JOUILU v JO episul ejep o JepJo ui p
39. error or an invalid message Whenever this bit is set none of the data received in the message is used When an error is detected the remote terminal must suppress transmission of the status word The Instrumentation bit 10 differentiates a command word form a status word both have the same sync pattern The instrumentation bit in a status word is always set to 0 When used the instrumentation bit in a command word is always set to 1 SInce this bit is the most significant bit of the subaddress field using it as an instrumentation bit reduces the number of available subaddresses from 30 to 15 Because of this limitation most systems today use techniques other than the instrumentation bit to differentiate between command and status words The Service Request bit 11 enables a terminal to inform the bus controller that it needs to be serviced A 1 in this bit indicates that service is needed It is typically used when the bus controller is polling the terminals Bits 12 14 are reserved for future use and must be set to 0 Any other value is an error A 1 in Bit 15 indicates that the terminal received a valid broadcast command Whenever a terminal receives a valid broadcast command the terminal sets this bit to 1 and suppresses transmission of its status word A 1 in Bit 16 busy bit tells the Bus Controller that the terminal cannot act on a command to move data between the terminal and subsystem
40. es bus inactivity gap time delay word type and parity information These FIFOs are called high and low priority FIFOs and are used for both RT and BC modes Currently a BC only has access to the low priority FIFO Data is outputted from the FIFOs as a complete message and a low priority FIFO waits until all messages from the high priority FIFOs are gone A dedicated memory controller interfaces with 16Mbytes of fast burst PSRAM It keeps up with data requests from both channels for the TX data and accepts RX messages and status information as well Once a message is received or transmitted for the particular subsystem special flags are set and once new data is placed in the TX buffer or data is read from the RX buffer those flags are cleared DNA may write or read data in blocks as large as 1024 16 bit data words at atime A read or write is executed as an atomic transaction i e no data change allowed during a read or write to from the DNA bus This document describes the initial function set for BM and RT modes of operation For detailed descriptions of the low level functions you can use with DNx 1553 553 boards refer to the PowerDNA API Reference Manual which is available for download at www ueidaq com A Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 3 fm DNx 1553 553 Interface Module Appendix A Accessories DNA CBL COM 1 ft lon
41. for the minor frames 2 A user can define up to sixteen different minor frames i e minor frame types Each type allows you to perform one of two sets of up to 128 trans actions on the bus only one block of 128 elements is active at a time a second may be updated from the host allowing double buffering support 3 Major and minor frame descriptors are stored in the on board FPGA mem ory They contain control bits that are set by the host and status bits that represent important status information about execution of the particular descriptor They are set by the BC 4 For each of the descriptors in every minor frame there is a dedicated 128 16 bit word area in the external memory called a Bus Controller Control Block BCCB that contains flags that define the type of the transfer retry behavior and other parameters The area also contains validation data and status information for the transactions performed plus RT gt RT BC data as well 5 Up to 16 minor frame types 256 minor frame entries 4096 unique BCCBs may be defined per channel and used on a single DNx 1553 553 layer occupying 1048576 16 bit memory words These BCCBs can be addressed statically when the Framework automatically assigns a BCCB for each minor entry using the following formula lt minor_frame_type 256 gt lt minor_frame_entry_number gt or they may be assigned by the user For data coherency support two double buffering techniques are defined for maj
42. ftp ftp ueidaq com Product Disclaimer WARNING DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES INC AS CRITICAL COMPO NENTS IN LIFE SUPPORT DEVICES OR SYSTEMS Products sold by United Electronic Industries Inc are not authorized for use as critical components in life support devices or systems A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Any attempt to purchase any United Electronic Industries Inc product for that purpose is null and void and United Electronic Industries Inc accepts no liability whatsoever in contract tort or otherwise whether or not resulting from our or our employees negligence or failure to detect an improper purchase NOTE Specifications in this document are subject to change without notice Check with UEI for current status Chapter 1 Introduction ee 1 1 1 Organization of this manual eee 1 1 2 The MIL 1553 Interface Boards 22 3 1 3 What is MIL STD 1553 E Eaa hrs 3 1 3 1 Physical Layer n 4 1 4 Bus Protocol u RR ann g lm xd d z ka da o ee xb Rr dS 5 1 5 Word Formats 0060000000 6 1 5 2 Command VVord ll l ks li s lll 7 1 5 3 Data
43. g round shielded cable with 37 pin male and four 9 pin male D sub connectors Z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Appx fm DNx 1553 553 Interface Module Index Symbols M SWAP Cycle in a Major Frame 23 MIL STD 1553 3 A Minor Frame Double Buffering 24 Minor Frame Type 0 32 Minor Frame Type 1 32 Minor Frame Type 2 32 Accessories 39 Architecture 10 B Mode Code 6 BM data structure 21 Monitor Terminal with RT Address MT RT 9 Broadcast Data Transaction 6 Multi Rate Programming 30 Bus Controller BC 9 P Bus Controller Memory Model 25 Photo 3 Bus Controller Programming Example 26 Bus Monitor MT 9 Bus Protocol 5 Physical Layer 4 Pinout Diagram 13 Programming and Working with a Bus Controller 23 C Programming and Working with Remote Terminal Command Word 7 22 Command Status Data format in BM data 21 Programming BusWriter Mode Configure Timing 16 R Controlling an RT 35 Reading Bus Monitor 20 Conventions 2 Reading Writing Data from to a Device 19 Create MIL 1553 Ports 15 Receive Data Transaction 6 Creating a Session 15 Remote Terminal RT 9 Creating Reader Object and Writer Objects for each RT to RT Transfer 6 Port 17 S D Software 12 Data Validation 29 Specifications 11 Data VVord 7 l Starting the Session 19 Destroying the Session 36 Status Validation 30 DNA CBL COM 39 Status Word 8 DqAdv553SetMode 38 Stopping t
44. h Remote Terminals 32 2 7 Stopping the Session 0000000000 2222 36 2 8 Destroying the Session en 36 Chapter 3 Programming vvith the Lovv Level API 37 3 1 Low Level DqAdv Functions llle es 37 Appendix A Accessories nnn 39 1000104660 5 57 40 Zs Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 es nenne Industries Ine Date May 2010 File DNx MIL 1553TOC fm Table of Contents Table of Figures Chapter 1 Introduction Inn 1 1 1 Photo of DNR 1553 553 Interface 1 3 1 2 Terminal Connection Types One Bus 5 555 2 4 1 3 Typical MIL STD 1553 BUS 1 oed ee lo eet bo uentis idea cen dn 5 1 4 1553 Word F fmafs c iic maydan c ist ad cc sir ate potiri ce sedet 7 1 5 Block Diagram of the DNx 1553 553 Interface Module 10 1 6 DNx 1553 553 Specifications irrenda a a aaa aa a anaa 11 1 7 Pinout Diagram for DNX MIL 1553 Layer sss eene 13 1 8 Jumper Block on Base Board for DNA MIL 1553 Layer Position 14 1 9 Diagram of DNA MIL 1553 Layer Position Jumper Settings
45. he Session 36 F Support ii Features 3 Support email 7 Flag word format in BM data 21 support ueidaq com H Frequently Asked Questions 2 Support FTP Site Functional Description 10 ftp ftp ueidaq com ii H Support Web Site High Level API 15 www ueidaq com ii J T Jumper Settings 14 Terminal Connection Types 4 L Timestamp LSB part word format in BM data 21 Layer Position Jumper Settings 14 Transmit Data Transaction 6 Low Level API 37 Low Level DqAdv Functions 37 Word Formats 6 Copyright 2010 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File DNx MIL 1553IX fm
46. her details To stop or pause a bus controller operation write a BC control frame set to bcControl SetDisable Some fields in the BCCB status are bitfields For example cerrsts05 and lt errsts1 gt are bitfields reporting on the error status if any that occurred while processing a BCCB Look up UeiMIL1553 BCB ERRSTSO and tUeiMIL1553 BCB ERRSTSI in the Reference Manual for definitions of the error reporting statuses A Bus Controller is equipped with a set of features that allows it to simplify communication with RTs For example for each BCCB i e for each command you can set up the following options z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 30 Programming with the High Level API e fdata 0 gt SetCommandDelay 100 where 100 delay in uS This option allows you to set up a delay to be performed before executing a particular command The maximum delay length calculated in microseconds is set to 20000us 20ms This feature is used to create a peculiar pattern of BC commands on the bus e fdata 0 gt SetRetryOptions 3 RetryType where 3 is the number of retries This option allows you to set up the number and type of retries ifan RT fails to answer the BC command Zero retries does not cause the bus controller to repeat a failed command at all while sev
47. ilian applications in avionics aircraft and spacecraft data handling A 1553 system typically uses a dual redundant balanced line physical layer with a differential network interface with time division multiplexing half duplex command response data communication protocol with up to 31 remote terminal devices It was first used in the F 16 fighter aircraft and is now widely used by all branches of the U S military and NATO VA Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm 1 3 1 Physical Layer Bus A Termination 2 DNx 1553 553 Interface Module Chapter 1 Introduction The current standard MIL STD 1553B was introduced in 1978 the goal of which was to define explicitly how each option should function so that compatibility among manufacturers could be guaranteed A single 1553 bus consists of a shielded twisted wire pair with 70 85 ohm impedance at 1 MHz If a coaxial connector is used the center pin is used for the high Manchester bi phase signal All transmitter and receiver devices connect to the bus either through coupling transformers or directly through stub connectors and isolation transformers as shown in Figure 1 2 Stubs can be a maximum of 1 foot in length for direct coupling or a maximum of 20 feet for transformer coupling To limit reflections the data bus must be terminated by resistors equal to the cable characteristic impedanc
48. l voltages that are passed to the bus through the isolation and coupling transformers or through an isolation transformer circuit only if direct coupling is selected When the channel is operating as a receiver the process described above is reversed 1 8 Specifi cations Technical Specifications Number channels ports 2 Independent Channel configuration Dual redundant interfaces Specification compliance MIL STD 1553a or MIL STD 1553b including notices 1 amp 2 Configuration Bus Controller BC Remote Terminal RT or Bus Monitor BM Either channel may be set as BC RT or BM Interface Transformer or direct coupling software selectable Isolation 350 Vrms Power Consumption 5W not including load Configuration Independent Ports Communication support BC to RT RT to BC RT to RT Messaging protocols Standard Mode Codes Broadcast messages Message timing Scheduled or asynchronous with two levels of priority Programmability Major minor frame timing intermessage gap times time out and late response BC retries Error handling Automatic error detection and recovery Modes Single or multiple RT emulator up to 31 different RTs RT RT xfers with simulated RTs may be implemented with user software RT BM joint mode Allows the unit to act as an RT while logging data as an BM Error handling Automatic error detection and insertion Monitor modes
49. messages on the bus contain one or more 16 bit words classified as command data or status word types Each word is preceded by a 3 us sync pulse and is followed by an odd parity bit Note that since the sync pulse 1 5 us low followed by 1 5 us high cannot occur in a Manchester code it is therefore unique The words in a message are transmitted with no gap between words but a 4 us gap is inserted between successive messages All devices must start transmitting a response to a command within 4 to 12 us If they do not start transmitting within 14 us they are considered to have not received the command message A typical system is illustrated in Figure 1 3 Bus Controller Remote Remote Remote Bus Terminal Terminal Terminal Monitor Figure 1 3 Typical MIL STD 1553 Bus All communication on the bus is controlled by the master bus controller BC A Remote Terminal RT can receive or transmit only in response to a command from the bus controller The sequence of words in the message from the controller to a terminal for transfer of data is master command terminal gt terminal status master gt master data termiinal gt master command terminal gt terminal where the notation is lt source gt lt word_type gt destination gt The message to initiate terminal to terminal communication is master cmmand terminal_1 gt terminal_1 status master gt master command termiinal_2 gt terminal_2 status master gt master c
50. minal or subaddress can be used RT31 is reserved as a broadcast terminal which sends and receives broadcast commands i e in the MIL 1553 standard all terminals should receive a command if the source of the command is RT31 In our implementation a broadcast command is always received by RT31 due to the fact that all RTs are under programmer control SAO and SA31 are also reserved for use with the special types of commands mode commands which are designed to provide control operations rather than simply to exchange data Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 34 Programming with the High Level API Programming an RT starts from creating a port CUeiMIL1553Port pPort0 session CreateMIL1553Port pdna 192 168 100 2 dev0 milbO UeiMIL1553CouplingTransformer UeiMIL1553OpModeRemoteTerminal Next create a reader and a writer CUeiMIL1553Reader reader new CUeiMIL1553Reader session GetDataStream session GetChannel 0 gt GetIndex CUeiMIL1553Writer writer new CUeiMIL1553Writer session GetDataStream session GetChannel 0 gt GetIndex By calling constructors with initialization reader and writer objects are now connected to the proper data stream and MIL 1553 553 channel Now you need to create frames that are going to be used to read and write RT data Input data frame i e data from an Rx comm
51. n Figure 1 9 To set the layer position Settings jumpers place jumpers as shown in Figure 1 9 NOTE Since all layers are assembled in Cubes before shipment to a customer you should never have to change a jumper setting unless you change a layer from one position to another in the field Layer s Position as marked on the Faceplate 1 04 2 3 1 0 4 5 6 9 10 oo oo Eu oo EM oo 11 12 o o ga oo oo cn 13 14 ox o ol oo oo 15 16 an 9 o o oj ox ox All I O Layers are sequentially enumerated from top to the bottom of the Cube Open Closed Figure 1 9 Diagram of DNA MIL 1553 Layer Position Jumper Settings ZA 9 Copyright 2010 Tel 508 921 4600 www ueidag com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 2 15 Programming with the High Level API Chapter 2 Programming with the High Level API This section describes how to program a DNx 1553 553 layer using the UeiDaq Framework High Level API UeiDaq Framework is object oriented and its objects can be manipulated in the same manner in various development environments such as Visual C Visual Basic LABView or DASYLab UeiDaq Framework is bundled with examples for supported programming languages They are located under the UEl Programs group in Start gt gt Programs gt gt UEI gt gt Framework gt gt Examples The following s
52. ntries for 8Hz only Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm 2 6 4 Programming and VVorking with Remote Terminals Copyright 2010 United Electronic Industries Inc DNx 1553 553 Interface Module 33 Chapter 2 Programming with the High Level API For example for Minor Frame Type 2 Entry Data for BCCB Index Effective BCCB 0 RT1 8Hz Segment 0 Index 0 0 1 RT2 4Hz Segment 0 Index 1 1 2 RT3 1Hz Segment 0 Index 2 2 Minor Frame Type 1 Entry Data for BCCB Index Effective BCCB 0 RT1 8Hz Segment 0 Index 0 0 1 RT2 4Hz Segment 0 Index 1 1 Minor Frame Type 0 Entry Data for BCCB Index Effective BCCB 0 RT1 8Hz Segment 0 Index 0 0 Now we can fill major frame as follows Major Entry Minor Frame Effective Upon Clock Index Type Flags Update Tick 0 2 Enable RTs 1 2 3 Major 1 0 Enable RTs 1 Minor 2 1 Enable RTs 1 2 Minor 3 0 RTs 1 Minor 4 1 RTs 1 2 Minor 5 0 RTs 1 Minor 6 1 RTs 1 2 Minor 7 0 RTs 1 Minor As you can see the content of the major frame entries is different Due to the BCCB assignments the data for each RT is stored retrieved exactly into from the same location A MIL 1553 553 board can support up to 32 remote terminals with 32 subaddresses each Not all remote ter
53. ommand terminal_1 gt terminal_1 data terinal_2 gt master command terminal_2 gt terminal_2 status master The sequences shown above ensure the terminal is functioning and ready to receive data the status request at the end of a transfer confirms that the data was received and accepted This sequence is the basis for the high reliability of a 1553 data transfer Note however that the sequences described do not illustrate the actions that are taken under fault conditions which are more complex than those shown in the example Note that a remote terminal cannot initiate a data transfer by itself It can only request a data transfer in response to a poll by the master controller Priority of such requests is determined solely by the frequency of polling designed into the system If a terminal does not respond to a poll this indicates existence of a system fault Five types of transactions can occur between a Bus Controller BC and Remote Terminals RT as follows Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 Introduction Receive Data The Bus Controller BC sends one 16 bit command word to an addressed terminal followed by 1 to 32 16 bit data words The selected terminal then sends a single 16 bit Status Word back to the Bus Controller Transmit Data The Bus Controller BC sends one 16 bit command word to an addressed terminal followed by 1
54. or frame processing called a SWAP cycle and minor frame double buffering They complement each other SWAP Cycle in a Major Frame e Any of the major frame descriptors may be marked with a SWAP flag UeiMIL1553MjSwapEnabled Marking the entry does not affect its current operation SWAP cycle is initiated by writing CUeiMIL1552ControlFrame with the proper command set e An actual SWAP cycle takes place at the beginning of the next major frame cycle takes an extra 16uS During the SWAP cycle all entries in the major frame descriptor table that are marked for SWAP have the current value of the Enable bit inverted i e currently enabled entries will be disabled and currently disabled entries enabled Entries where a SWAP flag was cleared stay unaffected This allows replacing of all minor frames at the same time The SWAP operation could be performed as follows z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 25 Programming with the High Level API CUeiMIL1553BCControlFrame bccontrol new CUeiMIL1553BCControlFrame bccontrol gt SwapMjEntries writer gt Write 1 bccontrol amp numFramesWritten Minor Frame Double Buffering Each minor frame is split into two blocks the first uses descriptors 0 127 and second uses descript
55. ormal normal Tx A A only A only A only Tx B B only B only B only Tx Both prohibited A or B reply Aor B on the bus on first use A which and then B command upon bus was error if error received recovery is enabled 2 3 Configure On MIL 1553 ports messages are represented in a tUeiMIL1553 Frame Timing structures Note that the same approach is used for all modes of operation Bus monitor bus controller and remote terminal timing depend on the frame type specified session ConfigureTimingForMessagingIlO 1 session GetTiming gt SetTimeout 1000 Asynchronous operations with MIL 1553 553 layers are currently not implemented If a user needs to operate RT or BM asynchronously the best way is to use it in a separate thread 2 4 Creating a Before a user can communicate with the layer reader and for everything except Reader Object a BM writer objects need to be created for each port as shown below and Writer Obiect for each Port CUeiMIL1553Reader readers new CUeiMIL1553Reader session GetDataStream session GetChannel ch gt GetIndex CUeiMIL1553Writer writers ch new CUeiMIL1553Writer session GetDataStream session GetChannel ch gt GetIndex By doing this you are creating MIL 1553 553 specific Reader and Writer classes and connecting them to the appropriate data stream and channel The default behavior of reader and writer objects is to block until the specified number of frames is ready to be t
56. ors 128 255 Only one sub frame is actively used by the BC and as a result only half of the BCCBs are accessed by the BC engine This allows the host to change the other half without worrying about overriding the same data that is currently being processed by the BC A Sub frame is selected by the value that is written to the port 16 LSBs define which part of the minor frame is selected a 0 in the corresponding position indicates that descriptors 0 127 should be used a 1 indicates 128 255 Note that an actual change takes place for all minor frames at the end of the major frame cycle after all descriptors are processed in order to set the initial value to this register and initiate a SWAP cycle for the BC The current and pending sub frame for each minor frame are accessible in the same register The following code demonstrates how to select block 1 entries 128 255 for minor frames 2 and 3 CUeiMIL1553BCControlFrame bccontrol new CUeiMIL1553BCControlFrame minor blocks 1L lt lt 2 1L lt lt 3 becontrol gt SelectMnBlock minor blocks writer gt Write 1 bccontrol amp numFramesWritten Double buffering of the minor frames allows safe replacement of the data associated with each entry of the minor frame descriptor table A bus controller also provides a lot of information for a failed 1553 transaction that may be used for proper recovery see a detailed description of the BCCB in the UeiDaq Framework Ref
57. quest and manipulate BC control block status data as well as the status and data the RT replied with This class is used to construct and manipulate CUeiMIL1553BCCBStatusFrame to simplify its use It can be used only with CUeiMIL1553Reader read class CUeiMIL1553BCCBStatusFrame public tUeiMIL1553BCCBStatusFrame O Copyright 2010 United Electronic Industries Inc Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 19 Programming with the High Level API CUeiMIL1553RTFrame class write or read RT send and transmit data areas This class is used to construct and manipulate a CUeiMIL1553RTFrame to simplify its use It can be used with both CUeiMIL1553Reader read and CUeiMIL1553Writer write class CUeiMIL1553RTFrame public tUeiMIL1553RTFrame CUeiMIL1553BMFrame class read BM messages separated by idle state of the bus This class is used to construct and manipulate a CUeiMIL1553BMFrame to simplify its use It can be used only with CUeiMIL1553Reader read class CUeiMIL1553BMFrame public tUeiMIL1553BMFrame CUeiMIL1553BMCmdFrame class read BM messages separated by 1553 protocol commands This class is used to construct and manipulate CUeiMIL1553BMCmdFrame to simplify its use It can be used only with CUeiMIL1553Reader read class CUeiMIL1553BMCmdFrame public tUeiMIL1553BMCmdFrame CUeiMIL1553RTStatus
58. ransferred You can also configure those objects to work asynchronously The method used to program readers and writers asynchronously is very dependent on the programming language You can find more information on how to do this in the Reference manual for each development environment Z Copyright 2010 Tel 508 921 4600 www ueidag com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 18 Programming with the High Level API CUeiMIL1553Reader and CUeiMIL1553Writer are polymorphic There are multiple overloaded implementations of these functions that can accept different types of frames The type of frame dictates the data passed and the operation to be performed The following types of frames are defined e CUeiMIL1553BCSchedFrame class program major and minor BC frames This class is used to construct and manipulate tUeiMIL1553BCSchedFrame to simplify its use It can be used with both CUeiMIL1553Reader read and CUeiMIL1553Writer write class CUeiMIL1553BCSchedFrame public tUeiMIL1553BCSchedFrame CUeiMIL1553BCCBDataFrame class assemble and store data into a BC control block This class is used to construct and manipulate CUeiMIL1553BCCBDataFrame to simplify its use It can be used only with CUeiMIL1553Writer write class CUeiMIL1553BCCBDataFrame public tUeiMIL1553BCCBDataFrame CUeiMIL1553BCCBStatusFrame Class re
59. ruct and manipulate CUeiMIL1553TxFifoFrame to simplify its use t can be used only with CUeiMIL1553Nriter vrite class CUeiMIL1553TxFifoFrame public tUeiMIL1553TxFifoFrame CUeiMIL1553BCStatusFrame class receive BC status information This class is used to construct and manipulate CUeiMIL1553BCStatusFrame to simplify its use It can be used only with CUeiMIL1553Writer read class CUeiMIL1553BCStatusFrame public tUeiMIL1553BCStatusFrame CUeiMIL1553BCControlFrame class control BC execution process This class is used to construct and manipulate CUeiMIL1553BCStatusFrame to simplify its use It can be used only with CUeiMIL1553Writer write class CUeiMIL1553BCControlFrame public tUeiMIL1553BCControlFrame Frame type UeiMIL1553FrameTypeBusMon is used to receive data from the bus monitor Each command and status word on the bus is stored in a separate frame Call the session object s method ConfigureTimingForMessagingIO to perform message communication provided that the device allows it 2 5 Starting the You can start the session by calling the session object s method Start Session Start the session mySession Start Note that if you don t explicitly start the session it will be automatically started the first time you try to transfer data using a reader or writer object 2 6 Reading To write or read data to from a MIL 1553 553 board do the following Writing Data from to a Device
60. ta word is expected and T R N bit set to 1 define SL553 MEMVAL MD RX DW 1L lt lt 27 1 when mode data word is expected and T R N bit set to 0 define SL553 MEMVAL MD IRQ EN 1L lt lt 26 Issue IRQ when corresponding mode command received define SL553 MEMVAL MD TX EN 1L lt lt 25 Enable corresponding mode command with T R_N bit set to 1 define SL553 MEMVAL MD RX EN 1L lt lt 24 Enable corresponding mode command with T R_N bit set to 0 define SL553 MEMVAL TX IRQ EN 1L lt lt 23 Enable TX IRQ on the selected subaddress ay Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 37 Programming with the High Level API define SL553 MEMVAL RX IRQ EN 1L lt lt 22 Enable RX IRQ on the selected subaddress define SL553_MEMVAL TX_EN 1L lt lt 21 Enable TX on the selected subaddress define SL553_MEMVAL RX_EN 1L lt lt 20 Enable RX on the selected subaddress define SL553 MEMVAL TX WCMAX MSB 1L 19 Maximum word count for the TX define SL553 MEMVAL TX WCMAX LSB 1L lt lt 15 0 32 1 31 1 31 define SL553 MEMVAL TX WCMIN MSB 1L 14 Minimum word count for the TX define SL553 MEMVAL TX WCMIN LSB 1L lt lt 10 0 32 1 31 1 31 define SL553 MEMVAL RX WCMAX MSB 1L 9 Maximum word count for the RX define SL553 MEMVA
61. tly answered questions application notes and support visit us online at http Awww ueidaq com faq N O Copyright 2010 United Electronic Industries Inc Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 3 Introduction 1 2 The MIL 1553 The DNx 1553 553 interface boards have the following features Interface 2 independent channels ports r Boards Dual redundant bus interfaces Each channel is independently software configurable as a Bus Controller BC a Remote Terminal RT a Bus Monitor MT or combination Remote Terminal Monitor RT MT e Transformer coupled Bus Interface standard Direct coupling software selectable Supports 1553A and 1553B protocols Notice 1 and or 2 Multiple RT simulation up to 31 RTs Completely independent bit rate settings for every port e 350 Vrms isolation between 1553 bus other I O ports and chassis Selective Message Monitoring in MT mode based on RT address or Mode Code DNR 1553 553 Shown DNA version is functionally identical with different bus connector and different front panel Figure 1 1 Photo of DNR 1553 553 Interface Module 1 3 Whatis MIL STD 1553 is a military standard that defines mechanical electrical and MIL STD operating characteristics of a serial data communication bus for the U S 1553 Department of Defense lt is now commonly used for both military and civ
62. tronic Industries Inc Copyright 2010 DNx 1553 553 Interface Module Chapter 2 27 Programming with the High Level API Notes for Figure 2 1 1 The minor frame CB status bit is also used by the BC state machine and should only be changed if for some reason a BC should start transmitting on a different bus 2 The RR bit is set by the BC if an RT that was in an error state replied with valid status This bit along with ERR and ERRC bits should then be cleared to return the RT to normal operation 3 An ERR bit if set must be cleared from the DNA side 4 An bit is self cleared if the number of retries is less than that allowed in the BCCB and the transaction on the 1553 bus completed vvithout error Othervvise the DNA side should clear this counter 5 A BC state machine operates vvithout checking descriptor tables for coher ency It is recommended that you use the SWAP feature to update entries i e keep two mirror copies of the major frame sequences and update the currently inactive one This limits the number of unique minor frames by 8 or 15 if only one minor frame is updated at a time 6 ADDR bits allow each minor frame to access any of the available BCCB descriptors Bus Controller Programming Example First we need to allocate different frames to use with bus controller We will need three types of frames for BC BCCB Data BCCD Status and BCCB Scheduler one minor and one major CUeiMI
63. ubsections focus on the C API but the concept is the same regardless of the programming language used Please refer to the UeiDaq Framework User Manual for more information on using other programming languages 2 1 Creating a The Session obiect controls all operations on your PovverDNA device Session Therefore the first task is to create a session obiect CUeiSession session 2 2 Create MIL MIL 1553 ports are configured using the session object s method 1553 Ports CreateMIL1553Port as follows port 0 bus controller CUeiMIL1553Port pPort0 session CreateMIL1553Port pdna 192 168 100 2 dev0 milbO UeiMIL1553CouplingTransformer UeiMIL1553OpModeBusController port 1 remote terminal CUeiMIL1553Port pPortl session CreateMIL1553Port pdna 192 168 100 2 d3ev0 milbl1 UeiMIL1553CouplingTransformer UeiMIL15530pModeRemoteTerminal Each created port can be used in one of three modes but there can be only one Bus Controller port e UeiMIL15530pModeBusMonitor a Bus Monitor port allows you to receive ongoing activity on the bus using a CUeiMIL1553Reader object In this mode of operation the CUeiMIL1553Writer object also allows you to send unscheduled continuous data on the bus In UeiMIL15530pModeBusMonitor a user can monitor a bus and send messages using BusWriter Bus monitor is enabled in all configurations including RT and BC z Copyright 2010 Tel 508 921 4600 ww
64. us frame If however flag UeiMIL1553BCR_RE is also set the bus controller will switch back to the normal mode i e sending a command to the RT that replied with the normal status after the hiccup Ifthe UeiMIL1553BCR ERE flag is set the BC will try the alternate bus after encountering one or another bus error accordingly with retry types selected Data Validation A MIL 1553 553 bus controller is able to perform status and data validation and accept reject data based on the data or status received z Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 21 31 Programming with the High Level API CUeiMIL1553BCCBDataFrame EnableDataCompare int enable enables or disables the comparing of data received i e Tx command with the data programmed in the BCCB data table In this case you can program the minimum and maximum straight binary acceptable values The reply data received from the RT will be compared word by word to the minimum and maximum values programmed and will be rejected with an error bit set if it fails Use CUeiMIL1553BCCBDataFrame CopyTminData int Size unsigned short data and CUeiMIL1553BCCBDataFrame CopyTmaxData int Size unsigned short data to fill the frame with the proper data words Bit UeiMil1553 BCB ERRSTSO DCF in tUeiMIL1553 BCB ERRSTSO belonging to the relevant
65. vel API This chapter describes the use of the UeiDaq Framework High Level API for programming the board It includes information such as how to create a ses sion configure the session for 1553 bus communication and interpret results Programming with the Low Level API This chapter describes the use of low level API commands for configuring and using the DNx 1553 553 series boards Appendix A Accessories This appendix provides a list of accessories available for DNx 1553 553 board s ndex This is an alphabetical listing of the topics covered in this manual Tel 508 921 4600 www ueidaq com Vers 1 6 Date May 2010 File 1553 Chapter 1 fm DNx 1553 553 Interface Module Chapter 1 ntroduction Document Conventions To help you get the most out of this manual and our producis please note that vve use the follovving conventions Tips are designed to highlight quick ways to get the job done or to reveal good ideas you might not discover on your ovvn NOTE Notes alert you to important information CAUTION Caution advises you of precautions to take to avoid injury data loss and damage to your boards or a system crash Text formatted in bold typeface generally represents text that should be entered verbatim For instance it can represent a command as in the following example You can instruct users how to run setup using a command such as setup exe Frequently Asked Questions For frequen
66. w ueidaq com Vers 1 6 United Electronic Industries Inc Date May 2010 File 1553 Chapter 2x fm DNx 1553 553 Interface Module Chapter 2 16 Programming with the High Level API e UeiMIL15530pModeRemoteTerminal An RT port allows you to program remote terminals and to send receive data from the remote terminal data memory In VeiMIL15530pModeRemoteTerminal up to 32 RTs including the 31st broadcast RT and 30 SAs per each RT SAO and SA31 are reserved for mode commands e UeiMIL15530pModeBusController A Bus Controller port allows you to program a bus controller scheduler and to send and receive data from and to bus controller data memory In UeiMIL15530pModeBusController mode a user can program bus controller operation Note that BusWriter does not work in RT or BC mode and that Bus Monitor works in all modes Bus Controller and Remote Terminal mode cannot be used on the same port simultaneously but can be used on the same layer on different ports of an aircraft simulation MIL 1553 network Each port created can be used in one of four coupling modes e UeiMIL1553CouplingDisconnected port is completely disconnected from the bus e UeiMIL1553CouplingTransformer normal mode of operation e UeiMIL1553CouplingLocalStub isolation coupler of the layer which requires a special version of the hardware e UeiMIL1553CouplingDirect direct connection without isolation transformer Sometimes used in laboratories wh

DNR-1553-553 Product Manual - United Electronic Industries

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