Application Note 78K0 8-Bit Single-Chip
Contents
1. Read this application note in the order of the CONTENTS The mark lt R gt shows major revised points The revised points can be easily searched by copying an lt R gt in the PDF file and specifying it in the Find what field To learn more about the 78KO Fx2 Kx2 Lx2 s hardware functions See the user s manual for each 78KO product series Data significance Higher digits on the left and lower digits on the right Active low representation xxx overscore over pin or signal name Note Footnote for item marked with Note in the text Caution Information requiring particular attention Remark Supplementary information Numeral representation BInary XXXX OF XXXXB Decimal XXXX Hexadecimal xxxxH Application Note U18876EE1VOANOO 5 Table of Contents CHAPTER1 RELATED DEVICES iii lear kaa ae sesa add eaea a poke te aaa kok ents aaa an te ke kk apa yo so an aA kanpe ken ann pi re kapa 8 CHAPTER 2 4OVERVIEVV iii siek r bone eh a Sei tak n ben son kk n e ek kk e acta n ka ko ko fon n kk van ko sena ina 9 2 1 Power On Clear POC Functional DeSCriptON 2 h0 h 0 lllLiitirrraaeetttanrratrantasaaanannnonsasesannannonnnanannn 9 2 2 Low Voltage Detector LVI Functional Descripton 2 ccccceceseeeceeeeeeeeeeeeeneeeeeeeeseeeeneeeeeeeeeeeeaes 10 CHAPTER OPERATION 5 20c cccesevesseccenceccesesecesccecaecincdeasuecnnecetece aaseeceatcalsachaassace2. Seoul Branch Seoul Korea Tel 002 528 0303 Fax 02 528 4411 NEC Electronics Singapore Pte Ltd Singapore Tel 65 6253 8311 Fax 65 6250 3583 NEC Electronics Taiwan Ltd Taipei Taiwan Tel 02 2719 2377 Fax 02 2719 5951 Application Note U18876EE1VOANOO Target Readers Purpose Organization Introduction This application note is intended for users who understand the basic functions the 78KO Fx2 Kx2 Lx2 family products and who will use those products to design application systems The purpose of this application note is to help the user to understand the functionality and the benefit of the Power On Clear POC and the Low Voltage Detector LVI These features are implemented in all microcontrollers of the 78KO Fx2 Kx2 and Lx2 Subseries The handling and usage shown in this document are for reference only The correct operation is not guaranteed if these samples are implemented as they are described here The user has to adapt the usage and handling of both functions to the application specific needs This application note consists of the following main sections e Functionality of the POC e Functionality of the LVI e Software example how to use the LVI How to Read this Application Note Conventions It is assumed that the reader of this application note has a general knowledge in the fields of electrical engineering logic circuits and microcontrollers e To gain a general understanding of functions
3. intention of this application note is to give the user some basic ideas for the operation of the Low Voltage Detector LVI The Low Voltage Detector LVI can also be used to confirm if the supply voltage for the microcontroller has reached a certain level The confirmation for the correct voltage might be necessary to be executed before an external oscillator is switched on or before an A D conversion is started or before an EEPROM emulation can be executed A software example to confirm if the supply voltage has reached the specified level is given in the Chapter 3 2 10 Application Note U18876EE1VOANOO CHAPTER 3 OPERATION 3 1 Function of Power On Clear POC The Power On Clear POC release voltage is fixed for all products to 1 59V 150mV On the other hand the real supply voltage range for a correct CPU operation is starting at 1 8V VDD 1 8V to 5 5V Therefore to make sure that the supply voltage will reach at least 1 8V or more the rise time of the supply voltage must fulfil a certain requirement In other words the rise time of the supply voltage VDD must be at least 0 5V ms or faster In case the supply voltage will rise up slower then 0 5V ms there is a possibility to keep the CPU in a kind of a wait mode until the supply voltage reaches a level of 2 7V The user can select by a corresponding setting of a flash Option Byte on which voltage level the CPU should start operation In any case the CPU will start operation
4. product before using it in a particular application Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems and medical equipment for life support etc The quality grade of NEC Electronics products is Standard unless otherwise expressly specified in NEC Electronics data sheets or data books etc If customers wish to use NEC Electronics products in applications not intended by NEC Electronics they must contact an NEC Electronics sales representative in advance to determine NEC Electronics willingness to support a given application Note 1 NEC Electronics as used in this statement means NEC Electronics Corporation and also includes its majority owned subsidiaries 2 NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above M8E 02 11 1 Application Note U18876EE1VOANO00 3 Regional Information Some information contained in this document may vary from country to
5. A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices 4 STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediately after the power source is turned ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the reset signal is received A reset operation must be executed immediately after power on for devices with reset functions 5 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that res
6. Application Note U18876EE1VOANO00 List of Figures Figure 2 1 Exmple for an external RESET circuit ccceeeceeeeeeeee eens ee eeeeeeeneneneneeeeneeeeenes 9 Figure 2 2 Example for an external LVI input Circuit cc cece eee e eee ee eee eee eee eee eeeeee 10 Application Note U18876EE1VOANOO CHAPTER 1 RELATED DEVICES All devices listed below are incorporating the same Power On Clear POC and the same Low Voltage Detector LVI function Consequently this application note can be used as a reference example for all devices from this list Device List 78KO KB2 uPD78F050x uPD78F0503D 78KO KC2 UPD78F051x uPD78F0513D uPD78F0515D 78K0 KD2 UPD78F052x uPD78F0527D 78K0 KE2 UPD78F053x uPD78F0537D 78KO KFZ2 UPD78F054x uPD78F0547D 78KO FC2 UPD78F0881 uPD78F0882 uUPD78F0883 78KO FC2 UPD78F0884 uPD78F0885 uUPD78F0886 78KO FEZ2 uPD78F0887 uPD78F0888 uPD78F0889 uPD78F0890 78KO FF2 UPD78F0891x uPD78F08892 pPD78F0893 78KO LE2 UPD78F036x uPD78F0363D 78KO LFZ2 UPD78F037x uPD78F0376D 78KO LFZ2 UPD78F038x uPD78F0386D 78KO LG2 UPD78F039x uPD78F0397D 8 Application Note U18876EE1VOANOO CHAPTER 2 OVERVIEW 2 1 Power On Clear POC Functional Descripton All devices in the products families listed before incorporate a Power On Clear POC function This function generates a proper internal RESET signal while the supply voltage VDD for the microcontroller is switched on This internal R
7. ESET signal generation will eliminate the need for a complex external RESET circuitry Although a proper internal RESET signal will be generated by the POC function an external pull up resistor must be always connected to the RESET input pin of a microcontroller Otherwise the microcontroller will not operate in the specified condition The external RESET input has still the priority to generate an internal RESET signal if a low level is applied to the RESET input pin Needless to say the external RESET input has Schmitt Trigger behaviour A typical example for an external pull up resistor is given here Figure 2 1 Exmple for an external RESET circuit VDD O 78K0 Kx2 78K0 Fx2 78K0 Lx2 L Recommended values for R1 and C1 R1 100K 10K C1 1nF 10nF The purpose of capacitor C1 is to eliminate some spikes maybe generated by EMI which could cause some unexpected internal RESET s Depending on the supply voltage rise time if the rise time is slow or fast there are two configurations possible for the POC function In order to adapt the correct Power On Reset function to each and every rise time of the VDD an Option Byte must be set during the virgin flash programming There are two possible examples given in Chapter 3 1 Application Note U18876EE1VOANO0OO 9 2 2 Low Voltage Detector LVI Functional Descripton All devices in the products families listed before incorporate a Low Voltage Detector LVI which all
8. NEC Application Note 78K0 8 Bit Single Chip Microcontrollers The Usage of POC and LVI 78KO Kx2 Series 78KO Fx2 Series 78KO Lx2 Series Document No U18876EE1VOANOO Date Published July 2007 NEC Electronics Corporation July 2007 Printed in Germany 1 Application Note U18876EE1VOANOO NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between VIL MAX and VIH MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between VIL MAX and VIH MIN 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal input level may be generated due to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin All handling related to unused pins must be judged separately for each device and according to related specifications governing the device 3 PRECAUTION AGAINST ESD
9. aedettazeanzezseeccedeedess 11 3 1 Function of Power On Clear POC 2 ecceceeeeeeeeeee cece ee eeeeeeeeeeee ee ee ea anae eases ea eaanaeeeseee sees eaaeeeeeeeeneeaeees 11 3 1 1 Short Software Example to Setup the Option Byte 0 ccccecececeeeceecee cece ee eeeeeeaeeeeeeeeeeeeeueeeeeeeeeeee 12 3 2 Function of Low Voltage Detector LVI 2 2 cccceeceeceeeeeeeeeeeee cece eee eeaeeeeeee ee eeeaaeae seen ses neaeaeeeeeseeeeeeeeees 13 32221 LVIMIPe ISLC rsrs nra feat ke Mou beh sande kon Tansee Seton bend ave etn seen a e e aiaa ee 13 3 2 2 KMISTOQOISTON 48e pov tht oak esate Gales cage ic poukoi eh sp bio Genes SR ede ete heen A eed pede 13 CHAPTER 4 SOFTWARE FUNCTIONS c cceceeeceeeeeeeeeceeeeeseesceaeeeseeeeeseeeeeaeeeseeeseseessceneeseeeens 14 4 1 Software Example for the Low Voltage Detector LVI 2 cccceseesseeeceeeeeeeeeeeeeeeeeseseneenaeeeeeeeseeeeeaeee 14 4 2 Description Software Example c cccccscscscscscssnscceeceeeeeeeeeeeaeaeanaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeanaeenenenees 14 4 3 LVI Software Example Source Code ccccccccccecccececececeseeeeeeeseseseaeaeseseseseseseaeaeaeseaeaeaeseaeseaeseaeaenens 15 CHAPTER 5 VALID SPECIFICATION a enb n koni kipa de kip nati anan ccc atts ae aaaea raaa e Eapana raaa aa aneneen Eana 18 CHAPTER6 REVISON HISTORY 0 ccccceceeeeeeeeeceeeeneeneeeaneeceeeeasnneseaeeeseeeeaaeaesneeeeseeesaaeeeaseeeeseeeens 19 6
10. aused by the LVI e supply to wait request flag Enable Timer operation Timer Request flag S register initialization must be skipped voltage VDD Low speed oscillator for LVI operation stabilization refer to UM is working correct 15 Now we 16 while LVIF 1 Wait for VDD to become 4 24V or more For VDD lt 4 24V the Low voltage detection flag LVIF is 1 no operation LVIIF 0 AMPH 1 EXCLK 0 OSCSEL 1 MOC 0x00 while OSTC lt Oxl1F no operation OSTS 0x05 XSEL 1 MCMO 1 while MCS 1 no operation Clear the LVI Interrupt request flag will start the external 20MHz resonator For fx gt IOMHZ gt AMPH 1 For fx lt 1LOMHz gt AMPH 0 Don t use external active clock Enable external Resonator crystal or ceramic at X1 X2 Allow external clock to operate Wait for main clock to become stable 3 27ms 20MHz Select an oscillator stabilization time after a STOP mode release Switch the peripheral clock to external clock Switch CPU clock to external clock Wait for the real switch from internal clock 8MHz to the external system clock Application Note U18876EE1VOANO00 PCC Ox00 Use high speed clock direct clock for the CPU clo
11. ck For VDD gt 4V the CPU can use fxm as CPU clock here 20MHz RCM 0x01 Now the internal high speed Osc 8MHz could be stopped to reduce the total current consumption End of LVI ExtClock Init Application Note U18876EE1VOANOO 17 CHAPTER 5 VALID SPECIFICATION ltem Date published Document Title po Jul 2007 or later U17328E 78KO KB2 User s Manual 1 2 Feb 2007 or later 3 May 2006 or later 4 May 2006 or later 5 May 2006 or later 6 7 8 9 1 Mar 2007 or later Mar 2007 or later Mar 2007 or later Jul 2006 or later U17336E 78KO KC2 User s Manual U17312E 78KO KD2 User s Manual U17260E 78KO KE2 User s Manual U17397E 78KO KF2 User s Manual U17555E 78KO FC2 User s Manual U17554E 78KO FE2 User s Manual U17553E 78KO FF2 User s Manual U17734E 78KO LE2 User s Manual Application Note U18876EE1VOAN00 CHAPTER 6 REVISON HISTORY Application Note U18876EE1VOANOO 19
12. country Before using any NEG product in your application please contact the NEC office in your country to obtain a list of authorized representatives and distributors They will verify Device availability Ordering information Product release schedule Availability of related technical literature Development environment specifications for example specifications for third party tools and components host computers power plugs AC supply voltages and so forth Network requirements In addition trademarks registered trademarks export restrictions and other legal issues may also vary from country to country NEC Electronics America Inc Santa Clara California Tel 408 588 6000 800 366 9782 Fax 408 588 6130 800 729 9288 NEC Electronics Europe GmbH Duesseldorf Germany Tel 0211 65 030 Fax 0211 65 03 1327 Sucursal en Espa a Madrid Spain Tel 091 504 27 87 Fax 091 504 28 60 Succursale Fran aise V lizy Villacoublay France Te 01 30 67 58 00 Fax 01 30 67 58 99 Filiale Italiana Milano Italy Tel 02 66 75 41 Fax 02 66 75 42 99 Branch The Netherlands Eindhoven The Netherlands Tel 040 244 58 45 Fax 040 244 45 80 Branch Sweden Taeby Sweden Tel 08 63 80 820 Fax 08 63 80 388 United Kingdom Branch Milton Keynes UK Tel 01908 691 133 Fax 01908 670 290 NEC Electronics Hong Kong Ltd Hong Kong Tel 2886 9318 Fax 2886 9022 9044 NEC Electronics Hong Kong Ltd
13. input 1 21V typ LVIF 0 gt Will indicate the supply voltage VDD or the input voltage to EXLVI gt detection voltage LVIF 1 gt Will indicate the supply voltage VDD or the input voltage to EXLVI lt detection voltage 3 2 2 LVIS register The specific threshold voltage can be selected by the LVI Register The minimum threshold voltage is 1 93V and the maximum threshold voltage is 4 24V In between these levels there are 14 other threshold voltage levels selectable For more details please refer to the corresponding User s Manual Caution Any write access to the LVIS or LVIM Register must be done when the Low Voltage Detection function is disabled by LVION 0 Application Note U18876EE1VOANO0OO 13 CHAPTER 4 SOFTWARE FUNCTIONS 4 1 Software Example for the Low Voltage Detector LVI The enclosed software example shows a possible solution to confirm by the LVI function that the power supply of the microcontroller has reached its specified voltage range before the external oscillator i e ZOMHZ is switched on by the user 4 2 Description Software Example The below given software example will execute the following steps Check for the RESET source was it a RESET by the LVI or was it any other RESET source Initialize the LVIS and the LVIM register in case of any other RESET Start up the external oscillator i e 20MHz when VDD gt 4 0V Wait for the external oscillator to become stable Switch per
14. ipheral and CPU clock to the external oscillator clock Switch of the internal high speed oscillator BMHz to save some current 14 Application Note U18876EE1VOANOO 4 3 General Conditions 1 After any kind of RESET release 2 The Option Byte for the POC mode selection 0x0081 is 0x00 or Ox01 II After Power On Reset the CPU operation will be released when VDD gt 1 8V II After Power On Reset the CPU operation will be released when VDD gt 2 7V POCMODE POCMODE 0 1 void LVI_ExtClock_Init void Here the CPU will operate with the internal High Speed oscillator 1 i Pe no operation LVIMK 1 if LVION LVISEL LVIS LVION TMHMD1 0x70 CMP 01 0x05 TMIFHI Oy TMHE 1 7 A While TMIFH1 TMHE1 0 TMIFH1 0 LVI Software Example Source Code Disable the LVI Check if LVION In this case Detect the level of th tion voltage of VDD gt 4 24V tection function Select a detect Enable the volt Tan set period for gt 10us Clear TMI FH Wait for gt 10us to secure that the LVI Stop Timer the 2 Interrupt 1 FE yes LVI gt 240kHz internal tage det Clear th Application Note U18876EE1VOANO0OO M and LVI it was a 8MHz RES ET c
15. k sessessss sss sss SSS SSS SS SSS 5S SSS S525 S5SS55255e555255552552255522 kk lor ee eee SSS 5 5 2 2 2 pragma constseg OPTBYTE root const unsigned char optbyte 2 Ox6E 0x01 WDT Window size 100 WDT State Stopped WDT Interval time fosc 2 17 Internal low speed oscillator 240kHz can be stopped by software POCMODE 0x01 The CPU will be released at 2 7V POCMODE 0x00 The POC will release the CPU at gt 1 8V pragma constseg default 12 Application Note U18876EE1VOANO0OO 3 2 Function of Low Voltage Detector LVI The Low Voltage Detector LVI can either generate an internal interrupt or it can alternatively generate an internal RESET signal The user can select between two sources which one should trigger the LVI function Aninternal programmable threshold voltage selected by the LVIS Register An external threshold voltage selected by the EXLVI P120 input In this case the threshold voltage is fixed to 1 21V 100mV 3 2 1 LVIM register The selection between interrupt or internal RESET generation is performed by the LVIMD flag of the LVIM register If LVIMD 0 the interrupt generation is selected if LVIMD 1 internal RESET generation is selected Further flags of the LVIM register are LVION 0 gt disable LVI operation LVION 1 gt enable LVI operation LVISEL 0 gt detects level of VDD LVISEL 1 gt detects level of EXLVI
16. ows the device to detect if the supply voltage falls below a certain threshold When the supply voltage is crossing the dedicated in advanced programmed threshold voltage in falling direction either an internal interrupt LVI Interrupt or an internal RESET signal can be generated automatically Up to 16 different threshold voltage levels are possible to select i e 4 24V down to 1 93V For details please refer to the corresponding device User s Manual Beside the programmable internal threshold voltages the devices also support an external input with a fixed threshold voltage 1 21V typ The external LVI input EXLVI P120 can be used to detect a voltage fail prior to the power supply of the microcontroller VDD will disappear Due to the fact the power supply for the microcontroller VDD is usually buffered by an external capacitor C1 gt 10uF the voltage will decrease more slow then Vga The LVI interrupt will be generated when the input voltage V2 to EXLVI is below 1 21V i e Vgat Will fail In this case the microcontroller can still operate because the microcontroller is buffered by the voltage supplied by the capacitor C1 An example for possible application circuit is given here Figure 2 2 Example for an external LVI input circuit Voltage regulator Veatt O 78KO Kx2 78KO Fx2 78KO Lx2 EXLVI P120 Normal operation V2 Vea X R2 R1 R2 gt 1 31V LVI execution V2 Vea X R2 R1 R2 lt 1 11V The main
17. ts of NEC Electronics or others Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of a customer s equipment shall be done under the full responsibility of the customer NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information While NEC Electronics endeavors to enhance the quality reliability and safety of NEC Electronics products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features NEC Electronics products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to NEC Electronics products developed based on a customer designated quality assurance program for a specific application The recommended applications of an NEC Electronics product depend on its quality grade as indicated below Customers must check the quality grade of each NEC Electronics
18. ults from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device 2 Application Note U18876EE1VOAN00 Disclaimer The information in this document is current as of July 2007 The information is subject to change without notice For actual design in refer to the latest publications of NEC Electronics data sheets or data books etc for the most up to date specifications of NEC Electronics products Not all products and or types are available in every country Please check with an NEC Electronics sales representative for availability and additional information No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property righ
19. using the internal 8MHz oscillator The relevant option byte is located on a fixed ROM address at 0x0081 Please refer to the corresponding device User s Manual Chapter Option Byte Condition 1 The supply voltage in the user application will rise up with 0 5V ms or faster i e 1V ms 2V ms In this case the option byte called POCMODE can be set to gt 00h Address 0x0081 0x00 In this case the CPU will start operation at gt 1 8V because there is in any case an internal wait time approx 3 2ms typ where the internal voltage regulator REGC becomes stable after the RESET was released by the POC Condition 2 The supply voltage in the user application will rise up with less then 0 5V ms or slower i e 0 4V ms 0 3V ms 0 2V ms In this case the option byte called POCMODE must be set to gt 01h Address 0x0081 0x01 In this case the CPU will not start operation before the supply voltage reaches 2 7V or more Remark After the CPU has started operation at 2 7V or more the LVI can be used to program a threshold voltage even less then 2 7V down to 1 93V to enter a defined state i e LVI Interrupt generation or LVI RESET generation in case the supply voltage false down Application Note U18876EE1VOANOO 11 3 1 1 Short Software Example to Setup the Option Byte Here is a software example how to define the Option Bytes for the Watchdog Timer and the POCMODE using the IAR Workbench t
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