Artisan Technology Group is your source for quality new and
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1. A rtisan Artisan Technology Group is your source for quality Technology Group new and certified used pre owned equipment FAST SHIPPING AND SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT DELIVERY Experienced engineers and technicians on staff Sell your excess underutilized and idle used equipment TENS OF THOUSANDS OF at our full service in house repair center We also offer credit for buy backs and trade ins IN STOCK ITEMS www artisantg com WeBuyEquipment EQUIPMENT DEMOS HUNDREDS OF Instra 4 REMOTE INSPECTION LOOKING FOR MORE INFORMATION MANUFACTURERS Remotely inspect equipment before purchasing with Visit us on the web at www artisantg com 7 for more our interactive website at www instraview com 7 information on price quotations drivers technical LEASING MONTHLY specifications manuals and documentation RENTALS ITAR CERTIFIED CEP aed Contact us 888 88 SOURCE sales artisantg com www artisantg com COREL S PIO 1149 1 E PIO 1149 1 E Parallel Port Boundary Scan Controller User s Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com COREL S PIO 1149 1 E PIO 1149 1 E Parallel Port Boundary Scan Controller User s Manual PIO 1149 1 E User s Manual Copyr 2002 2003 Corelis Inc 12607 Hiddencreek Way Cerritos CA 90703 2146 Tel 562 926 6727 Fax 562 404 6196 Artisan Technology Group Quality Instrumentat2. 3 1 Connecting to the IET C2 RR P 3 2 Designing MIENTO I RRR 3 3 Target Board Boundary Scan TAP Connector eere eee eee eee eese eese tastes tn status statuae ta sens ta sesto sees suse tasas 3 3 CHAPTER 4 SOFTWARE DEVELOPMENT nnnnnnvvvnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn 4 1 Notes on MEI 4 1 Writing Applications for the PIO 1149 1 E Device seessesssesssenveenvennvessvennvssnensvennnsnevsnnnsnnsnnnennnenneenneensennennsennnesnneee 4 1 Example Test anri S 4 1 Enumerated Data Types seesveesevsseensesnevnneensenneenseennvsnnvsnnvennnsnnnnnnennennnennnennennseenensnensnnnsnnnsnnennnennnnnnennneensnnsennsennsesnneee 4 2 Before You Ber e 4 2 iv Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com CHAPTER 5 SCAN FUNCTION LIBRARIES eene nennen 5 1 Minute c dt 5 1 VAT IE SRI RETRO m 5 1 ferde 5 1 larde reset escaso tse eatis semen het E ILLNM IL USUAL LE 5 1 moye to any stasen shake rei 5 1 move 10 State eccceccccccccesessececececeesseeecececeesesseeeececeeseaae
3. New voltage selection unsigned char result Return Code result set tri output data Scan Function Libraries 5 19 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function test Description This function is a simple test of the application program s ability to execute library function calls It simply returns the unsigned character passed into the function Prototype unsigned char test unsigned char dummy Input Parameters dummy Any valid unsigned character value Return Values If the function returns the input parameter correctly the DLL is present and accessible If it returns anything else then the program is unable to access the DLL correctly Example Call unsigned char dummy Nalue to return if test dummy dummy return 0 error Scan Function Libraries 5 20 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function tms reset Description This function holds the TMS signal high for 5 TCKS to put the target s JTAG state machine into Test Logic Reset state Prototype unsigned char tms reset enum TAPS test bus Input Parameters test bus Which TAP to reset TAP1 TAP2 Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus TAP1 Which TAP to reset unsigned char result Return Co
4. PIO 1149 1 E device and into the target JT AG device s Data Register DR It stores the data from the target JTAG device s Data Register DR in a specified atray of the PIO 1149 1 E The first bit scanned out is the LSB of the output array s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Pause DR state scan to pause ir This function scans data from a specified array out of the PIO 1149 1 E device and into the target JTAG device s Instruction Register IR It stores the data from the target JTAG device s Instruction Register IR in a specified array of the PIO 1149 1 E The first bit scanned out is the LSB of the output atray s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Pause IR state set io This function sets the output levels of the selected Discrete I O pins set scan clk This function sets the TCK clock speed for JTAG operations Note that the TCK is only present during tms reset move to state move to any state and scan operations set tri This function sets the values applied to the selected tri state pins to control the operation of the Discrete I O and JTAG TAP pins set trst This function sets the target s TRST pin to the specified level set voltage This fu
5. Scan Function Libraries 5 13 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function scan to pause ir Description This function scans data from a specified array out of the PIO 1149 1 E device and into the target JT AG device s Instruction Register IR It stores the data from the target JTAG device s Instruction Register IR in a specified array of the PIO 1149 1 E The first bit scanned out is the LSB of the output atray s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Pause IR state Prototype unsigned char scan to pause ir enum TAPS test bus const unsigned short out data unsigned long bit length unsigned short in data Input Parameters test bus Which TAP to scan TAP1 TAP2 out_data Unsigned short pointer to an array of data words to be shifted out the PIO 1149 1 E device bit length Unsigned long 32 bits holds the number of bits to be shifted out the PIO 1149 1 E device in data Unsigned short pointer to an atray of data words to hold the data shifted into the PIO 1149 1 E device Return Values 0x00 Success OxFF Failure occurred during function call Example Call enum TAPS test bus Which TAP to Scan unsigned short out data 10 Holds data shifted out of card unsigned long bit length Number of bi
6. To install the PIO 1149 1 E on your computer perform the following steps e Make sure that the parallel port on your PC is configured to operate in ECP mode On most modern computers parallel ports can be configured to wotk in ECP mode in the system BIOS e Check in Window device manger that the parallel port is configured to operate in ECP mode Below is a picture of Windows XP device manger showing that parallel port printer port in the picture is configured to operate in ECP mode Device Manager File Action View Help gt 9 42 Computer sa Disk drives a Display adapters 4 DVD CD ROM drives Floppy disk controllers J Floppy disk drives 2 IDE ATA ATAPI controllers w Keyboards S Mice and other pointing devices E Monitors x Multifunction adapters B Network adapters PCMCIA adapters A Ports COM amp LPT E Communications Port COM1 E Communications Port COM2 4 ECP Printer Port LPT1 SB Processors 0 Sound video and game controllers i 9 System devices Universal Serial Bus controllers e Install one end of the host computer to PIO 1149 1 E parallel port cable into the PIO 1149 1 E device and the other end into the parallel port connector on the computer e Apply power to the PIO 1149 1 E device by attaching the provided power supply PIO 1149 1 E Installation 2 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88
7. of state enumerations which forms a valid state transition Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus TAP1 Which TAP to transition enum STATES final state STATE RTI Final transition state int path count number states in the path enum STATES transition path 7 STATE TLR current state STATE RTI STATE SDRS STATE CDR STATE EIDR STATE UDR final state states in the path tms reset test bus current state must be Test Logic Reset move to any state test bus final state 7 transition path Scan Function Libraries 5 8 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function move to state Description This function causes a transition of the target JTAG device s state machine to the desired final stable state Prototype unsigned char move to state enum TAPS test bus enum STATES final state Input Parameters test bus Which TAP to scan TAP1 TAP2 final state Enumeration that specifies the final JTAG state STATE TLR TEST LOGIC RESET STATE RTI RUN TEST IDLE STATE PDR PAUSE DR STATE PIR PAUSE IR STATE SDR SHIFT DR STATE SIR SHIFT IR Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus Which TAP to transition enum STATES final state Final transition state uns
8. requirements Before Y ou Begin Make sure you read the readme txt on the PIO 1149 1 E Software disk before you begin to find out about any last minute update information for the installation software and documentation Software Development 4 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Chapter 5 Scan Function Libraries Summary This section summarizes each function in the Scan Function Libraries SFL Detailed descriptions for each function follow the summary circulate dr This function flushes out data from the selected target s Data Register DR by scanning in the selected bit length number of zeros Then the function scans the flushed out data back into the target s Data Register In this way you can read the target s Data Register without modification get driver info This function returns a pointer to a string that indicates the version number of the scan function library and the revision of the firmware and hardware in the PIO 1149 1 E device hard reset This function performs a hatd reset of all internal functions of the PIO 1149 1 E device and causes a transition of the target TAPs into the Test Logic Reset state Call this function before any other scan function library function calls move to any state This function causes a transition of the target JTAG device s state machine to the desired final state using the user specified transition p
9. target interface cable for connection to a single target JTAG TAP Table 3 2 summarizes the Netlist for this cable 15 Pin JTAG Connector AMP part 747306 3 10 Pin Target Connector 3M part 3473 6610 sl d Oo ole Z Z d 9 8 S e Z J Q2 Q Z C N S Q Z J NC NC NC NC NC ME pm Table 3 2 Supplied JTAG Cable Netlist Hardware Description 3 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Designing a Target System The PIO 1149 1 E connects to a tatget system through a 10 pin IEEE 1149 1 JTAG Port connectot The following section will describe the pin out of this connector in detail Target Board Boundary Scan TAP Connector The Boundary Scan Test Access Port TAP is a well defined IEEE 1149 1 compatible electrical interface between boundary scan test equipment and the boundary scan compatible devices in the user s target board Boundary scan based test equipment such as the Corelis ScanPlus family of products utilize a single TAP to interface to the UUT This section explains how to implement a TAP connector that is compatible with most standard test equipment The boundary scan TAP contains 5 signals TCK TMS TDO TDI and optionally TRST It also contains ground signal s Corelis recommends the industry standard TAP connector shown in Figure 3 1 Note that each signal is terminated with a resistor to mini
10. Description This function scans data from a specified array out of the PIO 1149 1 E device and into the target JT AG device s Data Register DR It stores the data from the target JTAG device s Data Register DR in a specified atray of the PIO 1149 1 E The first bit scanned out is the LSB of the output array s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Pause DR state Prototype unsigned char scan to pause dr enum TAPS test bus const unsigned short out data unsigned long bit length unsigned short in data Input Parameters test bus Which TAP to scan TAP1 TAP2 out data Unsigned short pointer to an atray of data words to be shifted out the PIO 1149 1 E device bit length Unsigned long 32 bits holds the number of bits to be shifted out the PIO 1149 1 E device in data Unsigned short pointer to an atray of data words to hold the data shifted into the PIO 1149 1 E device Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus Which TAP to Scan unsigned short out data 10 Holds data shifted out of card unsigned long bit length Number of bits to be shifted unsigned short in data 10 Data to be shifted into card unsigned char result Return Code result scan to pause dr test bus out data bit length in data
11. SOURCE www artisantg com Self Test After you have installed the software run the Self Test on the PIO 1149 1 E Device To tun the Self Test select and run Vse f est test exe A small pop up should appear Click on Test to run the self test and the results should look like Figure 2 1 PI0 1149 1 Self Test LX IMPORTANT The JTAG cable must be disconnected from the target device prior to running the Self T est Test List Enable test Number of Loops Result IV PLL Communication Test a PASSED IV Voltage Regulator Test n PASSED V JTAG Self Test p PASSED IV Discrete 1 0 Test hp PASSED E Detected Device Type E B Exit Clear View Results Figure 2 1 PIO 1149 1 E Self Test Results ScanPlus Applications When used with ScanPlus Runner ScanPlus Debugger or ScanPlus Flash Programmer applications the PIO 1149 1 E can be used on the same parallel port as the security key dongle From the SETUP menu select CONTROLLER and then select the PIO 1149 1 E icon Refer to the relevant ScanPlus tool user s manual for further details If the ScanPlus program is unable to locate either the dongle or the PIO 1149 1 E then e Turn the PIO 1149 1 E power OFF e Disconnect the PIO 1149 1 E from the parallel port cable e Remove the dongle from the parallel port connector of your computer e Check the computer BIOS and verify that the parallel port is set to ECP mode e Connect the dongle to the
12. a hatd reset of all internal functions of the PIO 1149 1 E device and causes a transition of the target TAPs into the Test Logic Reset state Call this function before any other scan function library function calls The hatd reset function will tri state all discrete I O pins and enable all JTAG TAP pins set the JTAG TCK frequency to 1MHz set the voltage at the TAP pins and perform a TMS reset on JTAG TAPs 1 and 2 Prototype usigned char hard reset unsigned char Port unsigned char Voltage Input Parameters Port Windows 95 98 A Port value of one 1 will specify to use the port configured as LPT1 this Port usually has input output range 0x378 0x37F A Port value of two 2 will specify to use the port configured as LPT2 Windows NT 2K A Port value of one 1 will communicate with the PIO 1149 1 device through input output range 0x378 0x37F A Port value of two 2 wil communicate with the PIO 1149 1 through the input output range 0x278 0x27F The user must verify that the LPT1 port or LPT2 port is configured for the proper input output ranges listed above Voltage Output voltage applied to the JTAG TAP pins Return Values 0x00 Success OxFF Failure occurred during function cal Example Call if hard reset exit 1 Scan Function Libraries 5 6 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function move to any state Description This funct
13. acuta in boundaty scan test 6 GND mode 7 TMS Input to the UUT 1K pull up 8 GND 9 TCK Input to the UUT 1K pull up 10 GND Table 3 4 Signal Description and Termination Figute 3 2 shows typical schematics of the target TAP connector and the recommended termination resistors The 1K pull up resistors can connect to any Vcc supply with nominal voltage between 2 7V to 5 0V Recommended resistor values are 5 Voc Voc Voc Voc Target Board To all Boundary Scan Devices To TDI of 1st Device in the chain From TDO of last Device in chain To all Boundary Scan Devices To all Boundary Scan Devices TAP Connector Figure 3 2 TAP Connector Schematics Hardware Description 3 4 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Chapter 4 Software Development Notes on Usage When designing programs to interface with the PIO 1149 1 E you dynamically link to the 32 bit Windows DLL Writing Applications for the PIO 1149 1 E Device Before performing any testing operations the application must first call hard reset Port This will initialize the PIO 1149 1 E device for testing Example Test Code The PIO 1149 1 E Software Disk contains an example test program A Example Example cpp for the Corelis JTAG Demo Board a small boundary scan board that contains four 74BCT8374 boundaty scan devices The program first calls a test function to insure prope
14. ample Call unsigned char output data Nalue applied on tri state pins unsigned char result Return Code result set tri output data Scan Function Libraries 5 17 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function set trst Description This function sets the target s TRST pin to the specified level Prototype unsigned char set trst unsigned char output data Input Parameters The value applied to the Target s TRST pin Return Values 0x00 Success OxFF Failure occurred during function call Example Call unsigned char result Return Code Set TRST pin Low result set trst 0 Set TRST pin High result set trst 1 Scan Function Libraries 5 18 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function set voltage Description This function sets the output voltage for the Discrete I O and JTAG TAP pins Voltages can be set within the ranges of 1 25 volts to 3 30 volts An enumerated type is provided in the header file to simplify the selection value Prototype unsigned char set voltage unsigned char output data Input Parameters output data The desired output voltage to be applied to the Discrete I O and JTAG TAP pins Return Values 0x00 Success OxFF Failure occurred during function call Example Call unsigned char output data 3 40
15. and copy the files listed below Readme txt VLibrary PIOE_SFL h Headet File for PIO 1149 1 E Function Prototypes VLibrary PIOE_SFL lib Microsoft Compiled Import Library Library Win95_98 PIOE_SFL dll Microsoft Compiled DLL for Windows 95 98 VLibrary WinNT 2KMPIOE SFL dll Microsoft Compiled DLL for Windows NT 2000 Library Readme txt Description of SFL files Drivers Win95_98 PIO vxd Windows 95 98 Virtual Device Driver Drivers WinNT PIO_1149 sys Windows NT Kernel Mode Device Driver Drivers Win2K PIO_1149 sys Windows 2000 WDM Device Driver Drivers Win2K PIO_1149 inf Windows 2000 Device Information File Example Example cpp Example program to demonstrate how to use the PIO 1149 1 E s SFL Example Example exe Example program executable Example 74bct8374 bsd BSDL for the boundary scan components in the example Example Readme txt Directions on how to compile the Example program Self Test Test exe Self test application program PIO 1149 1 E Installation 2 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com PIO 1149 1 E Software Installation Run the Setup exe utility on the PIO 1149 1 distribution diskette Read the release notes that the utility installs with the software installation The release notes provide the latest updates available and also provide additional information concerning how to verify proper host configuration PIO 1149 1 E Device Installation
16. ath move to state This function causes a transition of the target JTAG device s state machine to the desired final stable state read io This function reads the logical values that are sensed from the Discrete I O pins scan dr This function scans data from a specified array out of the PIO 1149 1 E device and into the target JTAG device s Data Register DR It stores the data from the target JTAG device s Data Register DR in a specified atray of the PIO 1149 1 E The first bit scanned out is the LSB of the output array s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Run Test Idle state Scan Function Libraries 5 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com scan ir This function scans data from a specified array out of the PIO 1149 1 E device and into the target JT AG device s Instruction Register IR It stores the data from the target JTAG device s Instruction Register IR in a specified array of the PIO 1149 1 E The first bit scanned out is the LSB of the output atray s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Run Test Idle state scan to pause dr This function scans data from a specified array out of the
17. ations per IEEE Standard 1149 1 through software You can command target circuitry Built In Self Test BIST vetify PCB interconnects perform functional testing and debug without manual probing Furthermore you can access device internal functions that are not accessible to external probing through the JTAG interface to isolate faults within the device itself Figure 1 1 The Corelis PIO 1149 1 E Boundary Scan Controller Product Overview 1 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com What Is IEEE Standard 1149 1 The IEEE Standard 1149 1 test bus and boundary scan architecture allows you to control an IC and similarly a board or system via a standard four signal interface Each IEEE Standard 1149 1 compliant IC incorporates a feature known as boundary scan that allows you to control and observe each functional pin of the IC via the four wite interface You can load test debug or initialization patterns serially into the appropriate IC s via the IEEE Standard 1149 1 test bus This allows you to observe or control IC board or system functions with limited physical access The IEEE Standard 1149 1 test bus contains two main elements a Test Access Port TAP which interfaces internal IC logic with the external world via a four signal optionally five signal bus as shown in Figure 1 2 and a boundary scan architecture which defines standard boundary cells that drive and
18. de result tms reset test bus Scan Function Libraries 5 21 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function trst reset Description This function sets the TRST signal low for 1 millisecond then sets it back high Prototype unsigned char trst reset void Input Parameters NONE Return Values 0x00 Success OxFF Failure occurred during function call Example Call unsigned char result Return Code result trst reset Scan Function Libraries 5 22 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com A rtisan Artisan Technology Group is your source for quality Technology Group new and certified used pre owned equipment FAST SHIPPING AND SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT DELIVERY Experienced engineers and technicians on staff Sell your excess underutilized and idle used equipment TENS OF THOUSANDS OF at our full service in house repair center We also offer credit for buy backs and trade ins IN STOCK ITEMS www artisantg com WeBuyEquipment EQUIPMENT DEMOS HUNDREDS OF Instra 4 REMOTE INSPECTION LOOKING FOR MORE INFORMATION MANUFACTURERS Remotely inspect equipment before purchasing with Visit us on the web at www artisantg com 7 for more our interactive website at www instraview com 7 information on price quotations drivers technical LEASING MONTHLY
19. e environmental specifications for the product or improper site preparation or maintenance NO OTHER WARRANTY IS EXPRESSED OR IMPLIED CORELIS SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE EXCLUSIVE REMEDIES THE REMEDIES CONTAINED HEREIN ARE THE CUSTOMERS SOLE AND EXCLUSIVE REMEDIES CORELIS SHALL NOT BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY Product maintenance agreements and other customer assistance agreements are available for Corelis products For assistance contact your nearest Corelis Sales and Service Office RETURN POLICY No items returned to CORELIS for warranty setvice or any other reason shall be accepted unless first authorized by CORELIS either direct or through its authotized sales representatives All returned items must be shipped pre paid and clearly display a Returned Merchandise Authorization RMA number on the shipping carton Freight collect items will NOT be accepted Customers or authorized sales representatives must first contact CORELIS with notice of request for return of merchandise RMA s can only originate from CORELIS If authorization is granted an RMA number will be forwarded to the customer either directly or through its authorized sales representative Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www a
20. e output array s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Run Test Idle state Prototype unsigned char scan dr enum TAPS test bus unsigned short out data unsigned long bit length unsigned short in data Input Parameters test bus Which TAP to scan TAP1 TAP2 out data Unsigned short pointer to an atray of data words to be shifted out the PIO 1149 1 E device bit length Unsigned long 32 bits holds the number of bits to be shifted out the PIO 1149 1 E device in data Unsigned short pointer to an atray of data words to hold the data shifted into the PIO 1149 1 E device Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus Which TAP to Scan unsigned short out data 10 Data shifted out of card unsigned long bit length Number of bits to be shifted unsigned short in data 10 Data to be shifted into card unsigned char result Return Code result scan dr test bus out data bit length in data Scan Function Libraries 5 11 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function scan ir Description This function scans data from a specified array out of the PIO 1149 1 E device and into the target JT AG device s Instruction Register IR It sto
21. igned char result Return code result move to state test bus final state Scan Function Libraries 5 9 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function read io Description This function reads the logical values that ate sensed from the Discrete I O pins Prototype unsigned char read io unsigned char input data Input Parameters input data An unsigned character pointer to the value sensed from the Discrete I O pins The format of the returned value is Bit 0 Value sensed from PPO JTAG connector pin 3 Bit 1 Value sensed from PP1 JTAG connector pin 10 Bit 2 Value sensed from PP2 JTAG connector pin 2 Bit 3 Value sensed from PP3 JTAG connector pin 9 Return Values 0x00 Success OxFF Failure occutred during function call Example Call unsigned char input data Value sensed from Discrete I O pins unsigned char result Return Code result read io input data Scan Function Libraries 5 10 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function scan dr Description This function scans data from a specified array out of the PIO 1149 1 E device and into the target JT AG device s Data Register DR It stores the data from the target JTAG device s Data Register DR in a specified atray of the PIO 1149 1 E The first bit scanned out is the LSB of th
22. ion Guaranteed 888 88 SOURCE www artisantg com Preface PRINTING HISTORY New editions are complete revisions of the manual Update packages which are issued between editions contain additional and replacement pages to be merged into the manual by the customer The dates on the title page change only when a new edition is published software code may be printed before the date this indicates the version of the software product at the time the manual or update was issued Many product updates and fixes do not require manual changes and conversely manual corrections may be done without accompanying product changes Therefore do not expect a one to one correspondence between product updates and manual updates Edition 1 September 2001 Edition 2 December 2002 Edition 3 March 2003 GENERAL NOTICE Information contained in this document is subject to change without notice CORELIS shall not be liable for errors contained herein for incidental or consequential damages in connection with the furnishing performance or use of material contained in this manual This document contains proprietary information which is protected by copyright All rights reserved No part of this document may be reproduced or translated to other languages without the prior written consent of CORELIS CORELIS assumes no responsibility for the use of or reliability of its software on equipment that is not furnished by CORELIS Artisan Technology G
23. ion causes a transition of the target JTAG device s state machine to the desired final state using the user supplied transition path States in the transition path must form a valid state transition path and must start from the current state NOTES 1 Maximum number of states in the user specified path is 16 2 In order for following scan functions to work correctly the move to any state function or consecutive move to any state functions must end the TAP parked in one of the following stable state TEST LOGIC RESET RUN TEST IDLE PAUSE DR PAUSE IR 0000 Prototype unsigned char move to any state enum TAPS test bus enum STATES final state int path count enum STATES transition path Input Parameters test bus Which TAP to scan TAP1 TAP2 final state Enumeration that specifies the final JTAG state STATE TLR TEST LOGIC RESET STATE RTI RUN TEST IDLE STATE PDR PAUSE DR STATE PIR PAUSE IR STATE SDR SHIFT DR STATE SIR SHIFT IR STATE E1DR EXIT1 DR STATE ELIR EXITI IR STATE SDRS SELECT DR SCAN STATE SIRS SELECT IR SCAN STATE CDR CAPTURE DR STATE CIR CAPTURE IR STATE E2DR EXIT2 DR Scan Function Libraries 5 7 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com STATE E2IR EXIT2 IR STATE UDR UPDATE DR STATE UIR UPDATE IR path count Number of states in the following parametet transition path An array
24. lk select Enumerator that specifies which base clock oscillator to use 1 OMHZ 1 5MHZ 40 OMHZ Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum OSCILLATORS clk select Which clock oscillator to use unsigned char clk divider Used as clock divisor unsigned char result Return Code clk select 40MHZ Defined in PIO SFL h clk divider CLK DIV BY 2 Defined in PIO SFL h set scan clk clk select clk divider Scan Function Libraries 5 16 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function set tri Description This function sets the values applied to the selected tri state pins to control the operation of the Discrete I O and JTAG TAP pins Prototype unsigned char set tri unsigned char output data Input Parameters output data The value applied to the tri state pins 1 in a selected bit position will tri state the corresponding pin and a 0 in a bit position will enable the corresponding pin for output The format of the output data value is Bit 0 Tri State the PPO pin TAG connector pin 3 Bit 1 Tri State the PP1 pin TAG connector pin 10 Bit 2 Tri State the PP2 pin JTAG connector pin 2 Bit 3 Tri State the PP3 pin JTAG connector pin 9 Bit 4 Tri State the JTAG TAP pins JTAG connector pins 8 7 5 4 1 Return Values 0x00 Success OxFF Failure occutred during function call Ex
25. mize signal cross talk in the interface cable and maximize noise immunity The connector on the user s target should have the standard flat cable compatible pinout Figure 3 1 shows the top view of the target s 10 pin connector header 0 100 x 0 100 spacing TRST 1 I K 2 GND TI 3 R K 4 GND TO 5 IM K 6 GND IMS 7 R K 8 GND TCK 9 B K 10 GND Figure 3 1 Standard TAP connector top view Table 3 3 lists two 3M brand part numbers for the connector Both are 0 100 x 0 100 headers one with and one without latch ejector Equal connectors from other manufacturers are also acceptable Reference Description Manufacturer Part Number Target TAP Straight header 10 pin 4 wall with center 3M 30310 6002HB notch Latch Ejector Straight headet 10 pin 4 3M 3448 3040 wall with notch Table 3 3 Standard TAP Connectors Hardware Description 3 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com The following table shows the direction of the signals and terminating resistor values that Corelis recommends Pin Signal Direction Termination 1 TRST Input to the UUT 1K pull up or 1 5K pull down gt Note Some target 2 GND boards may require a pull down resistor on 3 TDI Input to the UUT 1K pull up ihe IES signal t 4 GND assure normal device i h 5 TDO Outputofthe UUT 33 ohm series a
26. nction sets the output voltage for the Discrete I O and JTAG TAP pins test This function is a simple test of the application program s ability to execute library function calls It returns the unsigned character passed into the function Scan Function Libraries 5 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com tms reset This function holds the TMS signal high for 5 TCKS to put the target s JTAG state machine into Test Logic Reset state trst reset This function sets the TRST signal low for 1 millisecond then sets it back high Scan Function Libraries 5 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Detailed Descriptions Function circulate dr Description This function flushes out data from the selected target s Data Register DR by scanning in the selected bit length number of zeros Then the function scans the flushed out data back into the target s Data Register In this way you can read the target s Data Register without modification Prototype unsigned char circulate dr enum TAPS test bus unsigned long bit length unsigned short in data Input Parameters test bus Which TAP to scan TAP1 TAP2 bit length Unsigned long 32 bits holds the number of bits to be shifted out the PIO 1149 1 E device in data Unsigned short integer pointer to an array of data words to h
27. nssnsnennenssrsnennenssnnnennenssrsnennessen 1 2 Figure 2 1 PIO 1149 1 E Self Test Results ernornevenvvrnvvrnvernnvevnvennvnnnnnnenvnevnnennannvavvnenvevvnvvevennvvsnssenvevnavnvenvnnvnsennee 2 3 Figure 3 1 Standard TAP connector top view eese eene trennen enne tnen trennen etre nenne 3 3 Figure 3 2 TAP ConnectorSchem tics iuit eodein ee sapien tre trip at s trepteplin veste teg eges 3 4 vi Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Table of Tables Table 3 1 JTAG Connector Pin Assignment EET 3 1 Table 3 2 Supplied JTAG Cable Netlist eese eene tnnt nren rene enne enne tree nnee trennen 3 2 Table 3 3 Standard TAP ConnectolS miii a eset ies epu pecu ste dep Epl t runner itane neo neben pie eden 3 3 Table 3 4 Signal Description and Termination eese eene teneret etre tnen trennen 3 4 vii Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Chapter 1 Product Overview Introduction The PIO 1149 1 E Parallel Port Controller provides the simplest possible solution to intetfacing a PC with any IEEE Standard 1149 1 compatible target The PIO 1149 1 E controls the operation of an IEEE Standard 1149 1 JTAG scan test path by generating the proper signals under software control to interface with the target devices With the PIO 1149 1 E you can control boundary scan oper
28. nvironment Temperature Relative Humidity Storage Environment Temperature 3 0 in X 4 0 in X 1 0 in WXLXH 15 pin D SUB receptacle AMP part no 747845 4 or equivalent 15 pin D SUB pin AMP part no 747306 3 or equivalent 500 mA maximum 0 C to 55 C 10 to 90 non condensing 40 C to 85 C Product Overview Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com 1 5 Chapter 2 PIO 1149 1 E Installation The PIO 1149 1 E product consists of the user s manual which you ate currently reading and the following other components e PIO 1149 1 E Boundary Scan Controller Device e PIO 1149 1 E Software Disk e Host computer to PIO 1149 1 E device cable e PIO 1149 1 E device to Target JTAG TAP cable e 5VDC Power Supply Ensure all materials listed are present and free from visible damage or defects before proceeding If anything appears to be missing or damaged contact Corelis at the number listed on the front cover immediately System Requirements The host PC requires Windows 95 98 NT 2000 Operating System The host PC or Laptop must have a parallel port interface that can operate in ECP mode you configure ECP mode through your BIOS interface Consult your PC documentation for directions on how to configure the port for ECP operation What s on the Disk The Setup exe program on the Installation disk will create the following directory structure
29. old the data shifted into the PIO 1149 1 E device Return Values 0x00 Success OxFF Failure occutred during function call Example Call enum TAPS test bus Which TAP to scan unsigned long bit length Number of bits to be shifted unsigned short in data 10 Array to hold data shifted to card unsigned char result Return code result circulate dr test bus bit length in data Scan Function Libraries 5 4 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function get driver info Description This function returns a pointer to a string that indicates the version number of the scan function library and the revision level of the firmware and hardware Prototype unsigned char get driver info char info string Input Parameters info string pointer to a sttine that indicates the version numbet of the E g P 8 scan function library and the revision level of the firmwate and hardwate Return Values 0x00 Success OxFF Failure occutred during function call Example Call char info string buffer to hold return data unsigned char result Return code result get driver info amp info string printf s WMn info string Scan Function Libraries 5 5 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function hard reset Description This function performs
30. parallel port connector e Connect the PIO 1149 1 E via the parallel port cable to the computer parallel port e Turn the PIO 1149 1 E power ON e Try the ScanPlus software again and see if the problem is fixed PIO 1149 1 E Installation 2 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Chapter 3 Connecting to the Target Connectors The 15 pin D SUB JTAG interface connector includes all the signals for the boundary scan TAP This connector is located on the front panel of the PIO 1149 1 E device Table 3 1 summarizes the pin out of the JTAG connector Pim SignaName iO Description s ome om fromme Lom oe eene eni OJ m framom Table 3 1 JTAG Connector Pin Assignment Note All other pins of the connector 11 15 are connected to ground GND Hardware Description 3 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Connecting to the Target The PIO 1149 1 E device can control the boundaty scan operations of two separate targets On the PIO 1149 1 E s JTAG interface connector each single ended test signal terminates with an adjacent ground connection Thus the mating ribbon cable presents a fixed impedance to signals leaving the PIO 1149 1 E device or the user s tatget Maintain this signal ground configuration when connecting to the target s The PIO 1149 1 E device ships with a 10 pin
31. r linkage to the DLL and then it performs a hard reset of the PIO 1149 1 E Controller Device After reset it performs the following test e Two of the components U3 and U4 are put into bypass mode e Boundary scan cells drive a walking ones pattern onto the outputs of U1 e Boundary scan cells receive the pattern on the inputs of U2 The Corelis JTAG Demo Board is available for purchase Please contact the Corelis sales department regarding the JTAG Demo Board Corelis part number AS01210001 A0 Software Development 4 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Enumerated Data Types To make it more intuitive to pass information to the card and to add a method of type checking we have converted four classes of parameters to enumerated types e TAP Selection When selecting a TAP use the enumeration TAP1 TAP2 as your selection parameter e JTAG State Machine You may choose any of the stable states STATE TLR STATE RTI STATE PDR STATE PIR STATE SDR STATE SIR A e JTAG TCK Frequency Selection The frequencies you may choose from range from 1 MHz to 40 MHz Note the character that must proceed the frequencies because of naming conventions in C C e Output Voltage Selection There are 42 possible choices within the range of 1 25 V to 3 30 V in increments of 0 05 V i e 1 25 2 05 2 10 wy e 3 25 3 30 You can supply additional entries to meet your
32. receive data at the IC pins IEEE Standard 1149 1 also defines both mandatory and optional opcodes and test features The test bus signals are Test Clock TCK Test Mode Select TMS Test Data In TDI Test Data Out TDO and the optional Test Logic Reset TRST The IEEE 1149 1 Test Access Port Interface TAP consists of four TMS required signals Test Mode Select TMS TCK Test Clock TCK TDI Test Data In TDI TDO Test Data Out TDO A fifth signal is defined as optional TRST Test Reset TRST Figure 1 2 Test Access Port TAP Features of the PIO 1149 1 E The Corelis PIO 1149 1 E is a sophisticated test controller that can test devices boatds or systems that comply with IEEE Standard 1149 1 The PIO 1149 1 E tester supports two independent boundary scan chains You can configure the four discrete I O pins through software as standard inputs outputs or open collector drivers to test or control non boundary scan areas of the unit under test UUT Software controlled voltage translating logic enables the PIO 1149 1 E to test low voltage systems A set of software drivers written in C ship with the PIO 1149 1 E device to allow you to create powerful test programs that are tailored to your needs Product Overview 1 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Programmable Clocks The PIO 1149 1 E TCK output to the IEEE Standard 1149 1 compatible targe
33. res the data from the target JTAG device s Instruction Register IR in a specified array of the PIO 1149 1 E The first bit scanned out is the LSB of the output atray s first member The first bit scanned in is stored in the LSB of the input array s first member Following the scan operation the device s JTAG state machine is in the Run Test Idle state Prototype unsigned char scan ir enum TAPS test bus unsigned short out data unsigned long bit length unsigned short in data Input Parameters test bus Which TAP to scan TAP1 TAP2 out data Unsigned short pointer to an atray of data words to be shifted out the PIO 1149 1 E device bit length Unsigned long 32 bits holds the number of bits to be shifted out the PIO 1149 1 E device in data Unsigned short pointer to an atray of data words to hold the data shifted into the PIO 1149 1 E device Return Values 0x00 Success OxFF Failure occurred during function call Example Call enum TAPS test bus Which TAP to Scan unsigned short out data 10 Data shifted out of card unsigned long bit length Number of bits to be shifted unsigned short in data 10 Data to be shifted into card unsigned char result Return Code result scan ir test bus out data bit length in data Scan Function Libraries 5 12 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function scan to pause dr
34. roup Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com PRODUCT WARRANTY This CORELIS product has a warranty against defects in material and workmanship for a period of 90 days from date of shipment During the warranty period CORELIS will at its option either repait or replace products that prove to be defective For warranty service or repair this product must be returned to a service facility designated by CORELIS Outside CORELIS service travel areas warranty service will be performed at the Buyer s facility only upon CORELIS prior agreement and Buyer shall pay CORELIS round trip travel expenses For products returned to CORELIS for warranty service the Buyer shall prepay shipping charges to CORELIS and CORELIS shall pay shipping charges to return the product to the Buyer However the Buyer shall pay all shipping charges duties and taxes for products returned to CORELIS from another country CORELIS warrants that its software and firmware designated by CORELIS for use with an instrument will execute its programming instructions when propetly installed on that instrument CORELIS does not warrant that the operation of the instrument software or firmware will be uninterrupted or error free The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer Buyer supplied software or interfacing unauthorized modification of misuse operation outside of th
35. rtisantg com Table Of Contents CHAPTER 1 PRODUCT OVERVIEW aci cin a 1 1 jUUnn j j j 1 1 What Is IEEE Standard 1149 1 esesevevsevevevennennennennenevenevnevnnennnnnennenneenennreneennsnnensennnnnennnnnennennnenennnennennsenennnennennnnneen 1 2 IT UICCEOR SUI SEPA o 1 2 Programmable ClOCKS PM 1 3 Adjustable AAN 1 3 Discrete Input Output PIDS iii ida di dida 1 3 Ne AA er RR HER tie tb eS Ett eee De Eb epe e ee ER eee E pee EE te pabtbess 1 3 Parallel Port Interface Pm 1 3 IU 0 DEP AVIUNTITOl C IO 1 3 CHAPTER 2 PIO 1149 1 E INSTALLATION iaeciue c ixckkwun iani dau cac dana a dd 2 1 System tetesriTar ree 2 1 What sion the Disk qr oraa so ia 2 1 PIO 1149 1 E Software Installation seseevoevennvevevnvennennennennenneenennvensenennnennennnnnennnnnvenennnenennnennennnnnennenneenevnnsnnennenneen 2 2 PIO 1149 1 E Device Installation eese esee eret entente enata tatus tns ta suse ta sonata sesto sees suse to osasi sesta sese suse te suae 2 2 Delf Eget 2 3 CHAPTER 3 CONNECTING TO THE TARGET eene 3 1 U
36. s IEEE 1149 1 Number of TAP Controllers 2 Maximum TCK frequency 40 MHz Maximum scanning data length 2 bits Parallel I O and JTAG TAP signal levels Voltage levels programmable from 1 25 to 3 40 V Increment step 0 05 V Product Overview 1 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Parallel I O and TAP Signals DC Characteristics MIN MAX UNIT Vin High Level Input Voltage Vec 2 7 3 6V 1 5 V Vy Low Level Input Voltage Vec 2 7 3 6V 0 8 V Ion High Level Output Current Vec 2 7V 12 mA Voc 3V 24 mA Io Low Level Output Current Vec 2 7V 12 mA V a 3V 24 mA Vou Tou 1004A Voc 1 65 3 6V V 0 2 V Ion 4mA Vec 1 65V 12 V Ion 8mA Vec 2 3V 1 7 V Lon 12mA Vec 2 7V 2 2 V Vec 3V 2 4 V Ion 24mA Vec 3V 2 2 V VoL Io 100MA Vec 1 65 3 6V 0 2 V I 4 mA Vec 1 65V 0 45 V I 8 mA Vec 2 3V 0 7 V Ip 12 mA Vec 2 7V 0 4 V Io 24 mA Vec 3V 0 55 V Notes 1 PIO 1149 1 E I O pins and TAP signal outputs are pulled up to the user programmable voltage level through 1K pull up resistors Product Overview 1 4 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Physical Unit Dimensions JTAG and I O Connector JTAG and I O Connector Mating Connector Power Requirements 5V Operating E
37. sesececsesaaesecececeeneaseseceeeceenesaesesecsscsesueseseeeesesesnsaeeeeeeeenes 5 1 read VOC ER 5 1 Sean NG ME R 5 1 SCAT ef seats NO 5 2 Sean 10 PET 5 2 Sean 5 2 Se O RE EE A EE ELEN n e E E Me 5 2 ef scan clk did 5 2 St rm 5 2 et 5 2 ST LO ETC O DE EE E E E 5 2 est av ee 5 2 TMS TESE aa serer 5 3 Test S 5 3 ISI COL RR H 5 4 A vicenacealerceasGhasy E E E EOE A EA O 5 4 pet diVer AN 5 5 dre 5 6 NA SET 5 7 movye_to_state eccceeccccccccssessececececsenssesecececeesesseaeccecsensaaececececsesaaeseeececseeaseeecececeesesaeseseeceecseaeaeseeeeseseneeaeeeeeeeenes 5 9 OA VOC ecto ces LE Q 5 10 SCAM NC ML 5 11 SET 5 12 Sean 10 P se 5 13 E A conuntesacesosceusces A E E 5 14 SG AOC EI 5 15 set San AKT 5 16 O EN NR Mee ee 5 17 Set snare RE 5 18 SEL Inu ee I adr 5 19 eV 5 20 A o o vans E 5 21 NO 5 22 V Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Table of Figures Figure 1 1 The Corelis PIO 1149 1 E Boundary Scan Controller eese 1 1 Figure 1 2 Test Access Port TAP J annnnnnnnnonnnnnnrnnennvnnnrnennnneernnennnnsvrnesnnrnssranennenseranenne
38. specifications manuals and documentation RENTALS ITAR CERTIFIED CEP aed Contact us 888 88 SOURCE sales artisantg com www artisantg com
39. t system is programmable under software control Allowable frequencies range from 1 MHz to 40 MHz Adjustable Voltage Interfaces The voltage level of the parallel I O and JTAG TAP interfaces is softwate programmable and you can set it to any voltage between 1 25 V and 3 40 V in increments of 0 05 V These interfaces are TTL compatible and 5 V tolerant Discrete Input Output Pins You can configure the four discrete I O pins through software as standard inputs outputs or open collector dtivers to test or control non boundary scan areas of the UUT Direct software control to drive sense and tri state each of the four pins provides this configurability The input and output ports can control and sense various functions in the target system that you cannot control or observe through boundary scan operations These ports are useful for testing of target systems that incorporate components that do not comply with IEEE Standard 1149 1 Self Test Capabilities The PIO 1149 1 E has a built in self test capability Internal loop back logic validates shift integrity for the JTAG TAP The unit can also read back programmable voltage levels as well as discrete I O pins Parallel Port Interface The PIO 1149 1 E is a full speed device compliant with IEEE 1284 ECP Mode Phase Refer to IEEE Standard Signaling Method for a Bi directional Parallel Peripheral Interface for Personal Computers Specification IEEE Std 1284 1994 PIO 1149 1 E Specification
40. ts to be shifted unsigned short in data 10 Data to be shifted into card unsigned char result Return Code result scan to pause ir test bus out data bit length in data Scan Function Libraries 5 14 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function set io Description This function sets the output levels of the selected Discrete I O pins Prototype unsigned char set io unsigned char output data Input Parameters output data The value driven onto the Discrete I O pins The format of the value is Bit 0 Value driven on PPO JTAG connector pin 3 Bit 1 Value driven on PP1 JTAG connector pin 10 Bit 2 Value driven on PP2 JTAG connector pin 2 Bit 3 Value driven on PP3 JTAG connector pin 9 Return Values 0x00 Success OxFF Failure occutred during function call Example Call unsigned char output data Nalue driven on Discrete I O pins unsigned char result Return Code result set io output data Scan Function Libraries 5 15 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com Function set scan clk Description This function sets the TCK clock speed for the JTAG TAP Note that the TCK 1s only present during tms reset move to state move to any state and scan operations Prototype unsigned char set scan clk enum FREQUENCEY freq Input Parameters c
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