LCD Module User Manual Vatronix Holdings Limited
Contents
1. LCD TG12864H 01A0_A01 Page 11 of 32 Vatronix Serial Interface PS L RS 0 Ohms RP open When the ST7565P is active serial data DB7 and serial clock DB6 inputs are enabled And not active the internal 8 bit shift register and the 3 bit counter are reset Serial data can be read on the rising edge of serial clock going into DB6 and processed as 8 bit parallel data on the eighth serial clock Serial data input is display data when AO RS is high and control data when AO RS is low Since the clock signal DB6 is easy to be affected by the external noise caused by the line length the operation check on the actual machine is recommended 7203 ner X X X oes X nez Aet X omo X per X LPL LLL gt Figure 3 Serial Interface Protocol Busy Flag For parallel interface only The Busy Flag indicates whether the is operating or not When 087 is H in read status operation this device is in busy status and will accept only read status instruction If the cycle time is correct the microprocessor needs not to check this flag before each instruction which improves the MPU performance DISPLAY DATA RAM DDRAM The Display Data RAM stores pixel data for the LCD It is 65 row by 132 column addressable array Each pixel can be selected when the page and column addresses are specified The 65 rows are divided into 8 pages of 8 lines and the 9th page with2. This is the read write control signal input terminal When R W H Read When R W L Write When connected to an 8080 MPU this is Read signal Low active 7 RD E H L When connected to a 6800 Series MPU This is the 6800 Series MPU enable clock input terminal Parallel mode Data bus DBO DB7 Serial mode 8 15 DBO DB7 DB6 Serial input clock SCLK DB7 Serial input data SID 16 3 0V Power supply for Logic 17 Vss OV Ground 18 Vour DC DC converter Connect a capacitor to ground 19 DC DC converter Connect a capacitor to CAP1 20 CAP1 __ DC DC converter Connect a capacitor to 1 21 CAP1 DC DC converter Connect a capacitor to CAP1 22 CAP2 __ DC DC converter Connect a capacitor to CAP2 23 CAP2 DC DC converter Connect a capacitor to CAP2 24 NC _ connection 25 V4 Voltage levels for LCD Connect a capacitor to ground 26 V3 Voltage levels for LCD Connect a capacitor to ground 27 V2 Voltage levels for LCD Connect a capacitor to ground 28 V1 Voltage levels for LCD Connect a capacitor to ground 29 VO Voltage levels for LCD Connect a capacitor to ground and a resistor to VR 30 VR ___ Output voltage regulator terminal Provides the voltage between Ground and through a resistive voltage divider 31 NC _ No connection C86 6800 Series MPU interface 086 H L 86 8080 MPU interface P S
3. 30 Operating Temperature Range Tow 125570 c Storage Temperature Range 40 80 Electrical Optical Characteristics 25 20 Col Wavelength Spectral line Operating Voltage v Forward oe A nm widthA A 15V mA LCD TG12864H 01A0 A01 Page 4 of 32 Vatronix 6 Optical Characteristics ITEM SYMBOL CONDITION MIN UNIT me oer _ View Angles WiContrast Ratio z Visual angle direction Brightness at non selected tate Selected state Non selectad state 8 T A Operating voltage for LCD driving time Nonselected Condition Selected Condition Nonselected Condition Brightness Decay Time fall time tf LCD TG12864H 01A0 A01 Page 5 of 32 Vatronix 7 Interface Description Pin No Symbol Level Description 1 NC _ connection 2 _ connection 3 CS select input pins ActiveLow 4 RST RES When RST is L initialization is executed Register select input pin 5 AO D RS Indicates that AO are display data L Indicates that AO are control data When connected to an 8080 MPU Write signal Low active When connected to a 6800 Series MPU 9
4. Parallel data input iis in P S L Serial data input 34 NC _ connection This terminal selects the resistors for the VO voltage level adjustment IRS Use the internal resistors 35 IRS H L IRS L Do not use the internal resistors The VO voltage level is regulated by an external resistive voltage divider attached to the VR terminal 36 NC No connection LCD TG12864H 01A0_A01 Page 6 of 32 Vatronix 8 Contour Drawing amp Block Diagram 69 10 0 20 1 00MAX AX 2 80 1 50 66 10 V A MI 4 16 60 77 A A rt x lt lt VIEW DIRECTION 5525 DOTS 128X64 Sago e H neva back tape udo 8 IC ST7565P C0 20 0 15 2 B 71 018 a 48 W 0 5 0 05 DOTS SIZE 10 1 xli 0 10x 0 05 P0 80X 36 1 28 00 33 00 0 15 I 35 004 0 30 mm COM31 DOTS 128X64 0 ST7565P LCD LAYOUT LCD TG12864H 01A0 A01 Page 7 of 32 Vatronix 9 Application circuit 9 1 Parallel mode 6800 Series MPU interface LCD NC NC ICS RST AQ IWR RD DBO DB2 DB3 DB4 5 6 DB DD 55 Vout C3 C1 Cit C2 za 3 C86 LIII 9 2 Serial MODE d 5858 l Aho a 13
5. 14 15 10 11 eo a fes ea oo 567 65 VCC LCD NC 13 5 4 14 9 RST 5 15 A0 7 10 7 1 RD DBO 71i 4 DB3 6 DBS 14 7 DB6 DB p 17 18 Vout in 19 c 0 4 on AT89C52 ATS89C52 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 LCD TG12864H 01A0 A01 Page 8 of 32 Vatronix 10 LCD Function Description The LCD built in Sitronix ST7565P ST7565P is a single chip driver amp controller LSI for graphic dot matrix liquid crystal display systems This chip can be connected directly to a microprocessor accepts serial or 8 bit parallel display data from the microprocessor stores the display data in an on chip display data RAM of 65 x 132 bits and generates a liquid crystal display drive signal independent of the microprocessor It provides a high flexible display section due to 1 to 1 correspondence between on chip display data RAM bits and LCD panel pixels It contains 65 common driver circuits and 132 segment driver circuits so that a single chip can drive a 65 x 132 dot display And the capacity of the display can be increased through the use of master slave multi chip structures These chip are able to minimize power consumpti
6. 4 00 2 00 0 00 Electronic volume level Figure 5 Electronic Volume Level In Case of Using External Resistors Ra and Rb INTRS z L When INTRS pin is L it is necessary to connect external regulator resistor Ra between VR and VSS and Rb between and VR Example For the following requirements 1 LCD driver voltage 10V 2 6 bit reference voltage register 1 0 0 0 0 0 3 Maximum current flowing Ra Rb 1uA From Eq 1 10 1 xVgv 3 From Eq 2 Vev 1 63 32 162 x 2 1 21 698 Eq 4 From requirement 3 10 Rb uA Eq 5 From equations Eq 3 4 and 5 1 69 MO Rb 8 31 MO The following table shows the range VO depending on the above requirements Table 2 Depending on Electronic Volume Level Electronic volume level 0 T 32 63 VO 7 57 me 10 00 T 12 43 LCD TG12864H 01A0 A01 Page 15 of 32 Vatronix 11 User instruction Definitions 11 1 Instruction table Command Code Command Function A0 RD AVR 07 06 05 04 03 02 01 DO 10101 1 1 0 LCDdisplay ON OFF 1 Display ON OFF 1 0 1 0 OFF 1 ON Sets the display RAM display start 2 Display start line set 1 0 0 Display start address iine 1 Sets the display RAM page 0 1 4 Column address set 0 1 0 0 0 1 Most significant Sets the most significant 4 bits of upper bit column address the display RA
7. a single line DBO only Data is read from or written to the 8 lines of each page directly through DBO to DB7 The microprocessor can read from and write to RAM through the buffer Since the LCD controller operates independently data can be written into RAM at the same time as data is being displayed without causing the LCD flicker Page Address Circuit The LCM incorporates 4 bit Page ddress register changed by only the Set Page instruction Page Address 8 DB3 is H but DB2 DB1 and DBO are L is a special RAM area for the icons and display data is only valid When Page Address is above 8 it is impossible to access to on chip RAM See in Display Data RAM Map Line Address Circuit This circuit assigns DDRAM a Line Address corresponding to the first line COMO of the display Therefore by setting line address repeatealy it is possible to realize the screen scrolling and page switching without changing the contents of on chip RAM as shown in Display Data RAM It incorporates 6 bit line address register changed by only the initial display line instruction and 6 bit counter circuit At the beginning of each LCD frame the contents of register are copied to the line counter which is increased by CL signal and generates the Line Address for transferring the 132 bit RAM data to the display data latch circuit However display data of icons are not scrolled because the MPU can not access Line Address of icons LCD IGIZOO
8. 50 0 0 Display start line 0 first Column address 0 Page address 0 Regulator resistor select register R2 R1 RO 1 0 0 Reference voltage set OFF Reference voltage control register SV5 SV4 SV3 SV2 SV1 SVO 1 0 0 0 0 0 While RST is L or Reset instruction is executed no instruction except read status could be accepted Reset status appears at 084 After 084 becomes L any instruction can be accepted RESETB must be connected to the reset pin of the MPU and initialize the MPU and this LSI at the same time The initialization by RESETB is essential before used LCD TG12864H 01A0 A01 Page 13 of 32 Vatronix POWER SUPPLY CIRCUITS The Power Supply circuits generate the voltage levels necessary to drive liquid crystal driver circuits with low power consumption and the fewest components There are voltage converter circuits voltage regulator circuits and voltage follower circuits They are valid only in master operation and controlled by power control instruction For details refers to Instruction Description Voltage Converter Circuits These circuits boost up the electric potential between VCI and VSS to 2 3 4 or 5 times toward positive side and boosted voltage is outputted from VOUT pin These LCM fixed to 4 times Voltage Regulator Circuits The function of the internal Voltage Regulator circuits is to determine liquid crystal operating voltage VO by adjusting resistors Ra and Rb wit
9. 7 DB6 DB5 DB4 DB3 DB2 DBO Lo Lo T x T x ISvsTsva svo sve svi Tsvo SV5 SV4 SV3 SV2 SV1 SVO Reference voltage VO Contrast parameter a 0 Minimum Low 1 o n 1 0 0 0 32 default Wo 62 1 1 1 1 1 63 Maximum High 19 Set Static Indicator State Consists of two bytes instruction The first byte instruction set Static Indicator mode enables the second byte instruction set Static Indicator register to be valid The first byte sets the Static Indicator ON OFF When it is ON the second byte updates the contents of Static Indicator register without issuing any other instruction and this Static Indicator state is released after setting the data of indicator register The 1st Instruction Set Static Indicator Mode ON OFF RS RW DB7 DB6 DB5 DB4 DB3 DB2 DBO 111 0 0 static indicator OFF 1 static indicator ON The 2nd Instruction Set Static Indicator Register RS RW DB7 086 DB5 DB4 DB3 DB2 DB DBO _0 0 5 5 51 50 Status static indicator output 0 0 OFF 0 1 ON about 1 second blinking 1 0 ON about 0 5 second blinking 1 1 ON always ON 20 NOP No Operation Instruction RS RW DB7 DBe 085 DB4 DB2 81 50 LCD TG12864
10. A4H UIAU AUI Iz OI 52 Vatronix Column Address Circuit Column Address circuit has an 8 bit preset counter that provides column address to the Display Data RAM When set Column Address MSB LSB instruction is issued 8 bit Y7 YO is updated And since this address is increased by 1 each a read or write data instruction microprocessor can access the display data continuously However the counter is not increased and locked if a non existing address above 84H It is unlocked if a column address is set again by set Column Address MSB LSB instruction And the Column Address counter is independent of page address register ADC select instruction makes it possible to invert the relationship between the Column Address and the segment outputs It is necessary to rewrite the display data on built in RAM after issuing ADC Select instruction RESET CIRCUIT Setting RST to L or Reset instruction can initialize internal function When RST becomes L following procedure is occurred Display ON OFF OFF Entire display ON OFF OFF normal ADC select OFF normal Reverse display ON OFF OFF normal Power control register VC VR VF 0 0 0 Serial interface internal register data clear LCD bias ratio 1 9 1 65 duty 1 8 1 55 duty 1 8 1 49duty 1 6 1 33 duty On chip oscillator OFF Power save release Read modify write OFF SHL select OFF normal Static indicator mode OFF Static indicator register 51
11. B7 1058 100 Data hold SID tDHS 100 CS setup time ICS 1258 150 CS hold time tcHs 150 Reset Input Timing RESETB Internal statis During reset Reset complete Figure 13 Reset Input Timing Symbot DD 2 4 to 3 6V 40 to 85 C NN mm ___ LCD TG12864H 01A0 A01 Page 26 of 32 Vatronix 13 Initializing flow chart Referential Instruction Setup Flow 1 User System Setup by Extemal Pins Start of Initialization Power ON Vss with Keeping the RESETB Pin L Waiting for Stabilizing the Power RESETE Pin User Application Setup by Internal Instructions ADC Select SHL Select LCD Bias Select On the Voltage Converter by Internal Instructions Power Control 1 VR 0 VF 0 Waiting 1 50 rising of VOUT Turn On the Voltage Regulator by Internal Instructions Power Control 1 VR 1 0 Waiting for 1ms Turn On the Voltage Follower by Internal Instructions Power Control 1 VR 1 VF 1 Set the LCD Operating Voltage by Internal Instructions Regulator Resistor Select Reference Voltage Register Set Waiting for Stabilizing the LCD Power Levels End Initialization Figure 14 Initializing with the Built in Power Supply Circuits interface mode LCD TG12864H 01A0 A01 Page 27 of 32 Vatronix Referential Instruct
12. H 01A0 A01 Page 22 of 32 Vatronix 21 Power Save Compound Instruction If the entire display ON OFF instruction is issued during the display OFF state ST7565P enters the Power Save status to reduce the power consumption to the static power consumption value According to the status of static indicator mode Power Save is entered to one mode of sleep and standby mode When Static Indicator mode is ON standby mode is issued When OFF sleep mode is issued Power Save mode is released by the entire display OFF instruction Static Indicator OFF Static Indicator ON Power Save Compound Instruction Display OFF Entire Display ON Sleep Mode Standby Mode Oscillator Circuit OFF Oscillator Circuit ON CD Power r Suppl Circuit OFF CD Power Su upply ecu QE es p SEG Outputs VSS d COM SE utputs V Consumption Current 2uA Consumption Current 1 QUA Power Save OFF Power Save OFF i Entire Display OFF Entire Display OFF Static Indicator ON 2 Bytes Command Release Sleep Mode Release Standby Mode Figure 9 Power Save Compound Instruction Sleep Mode This stops all operations in the LCD display system and as long as there are no access from the MPU the consumption current is reduced to a value near the static current The internal modes during sleep mode are as follows a The oscillator circuit and the LCD power supply circuit are halted VSS level b All liquid cryst
13. M column address Column address set 0 0 0 Least significant Sets the least significant 4 bits of lower bit column address the display RAM column address 5 Status read poc de al Status Reads status data 6 Display data write 3 9 Write data Writes to the display RAM Display data read Read data Reads from the display RAM Sets the display RAM address SEG output correspondence 0 normal 1 reverse Sets the LCD display normal 3 9 0 1 0 1 0 normal 1 reverse Display all points 1 Ts 0 0 display 1 all points ON 1 1 0 1 1 0 1 1 0 1 0 1 0 1 ON OFF 01000 the LCD drive voltage bias 0 1 9 bias 1 1 7 bias ST7565R Column address increment 1 10 0 000 1 At read 0 13 End 1 1 0 1 0 1 0 14 Reset 0 0 0 mode select 1 1 1 1 3 1 1 peareaiodtywis Select COM output scan direction 0 normal direction 1 reverse direction 0 Operating Select internal power supply mode operating mode 0 0 0 Resistor Select internal resistor ratio ratio Rb Ra mode 1 alala 3 2 gt U o ZA 3 U g 7 D o oO d E a S 3 m m X 8 3 o 7 m o 3 5 lt o D 2 5 5 17 Vo voltage regulator internal resistor ratio set 18 Electronic volume mode set Electronic volume ister set 19 Static indicator ON OFF Static
14. Vatronix LCD Module User Manual Customer MASS PRODUCTION CODE LCD TG12864H 01A0 DRAWING NO LCD TG12864H 01A0 A00 Approved By Customer Approved By Checked By Prepared By Vatronix Holdings Limited ADDI 4 F No 404 Blg Shangbu Industrial Zone Futian District Shenzhen China TEL 0086 755 83234801 83233058 FAX 0086 755 83225058 E mail sales Vatronix com Http www vatronix com LCD TG12864H 01A0_A01 Page 1 of 32 Vatronix Contents 1t Precautions In Use of LOMesssessseecsecee saecu sseecseae eee eene P3 2 General eoo eere see eee eee P3 Absolute Maximum Ratings P3 4 Electrical Characteristics P4 5 Backlight Information P4 6 Optical Character P5 DeScHDLOFiessseeeeeoceec esce P6 8 Contour Drawing amp Block P7 9 ADpIIGSHOF sn e P8 10 LCD Function Description P8 11 User instruction Definitions P16 11 1 Instruction table P16 11 2 Inst
15. al drive circuits are halted and the segment in common drive outputs output a VSS level Standby Mode The duty LCD display system operations are halted and only the static drive system for the indicator continues to operate providing the minimum required consumption current for the static drive The internal modes are in the following states during standby mode a The LCD power supply circuits are halted The oscillator circuit continues to operate b The duty drive system liquid crystal drive circuits are halted and the segment and common driver outputs a VSS level The static drive system does not operate When reset command is performed while in standby mode the system enters sleep mode LCD TG12864H 01A0 A01 Page 23 of 32 Vatronix 12 Timing Characteristics Read Write Characteristics 8080 series MPU For parallel interface only RS CS1B CS2 IRD WR Tm pem 10580 SERERE DBO to Write LN gt DBO to Read tPWL80 W IPWLB amp O R is specified in the overlapped period when CS1B is low CS2 is high and AWR RD is low Figure 10 Read Write Characteristics 8080 series MPU DD 2 4 to 3 6V 40 to 85 C Address hold time tAH80 System cycle tme ANR RD 300 ns Enable Pulse Read RD tewLeom 120 ns ____ Lowwidth Write tPwigow 60 ns Enable Pulse e TM EM o High
16. ble P S Interface Type CS1B Interface mode 6800 series MPU mode idi 8080 series MPU mode L Serial Default Status CS Serial mode Parallel interface P S H The 8 bit bi directional data bus is used in parallel interface and the type of MPU is selected by C68 as shown in following table Microprocessor Selection for Parallel Interface C86 CS1B RS E RW to 087 bow H CS 85 E RW DBO to 6800 series L CS 85 RDB DBO to 8080 series LCD TG12864H 01A0 A01 Page 10 of 32 Vatronix The type of data transfer is determined by signals at RS E RDB and RW as following Table Parallel Data Transfer Command 6800 series 8080 series Description AO RS E RDB RW WRB E RDB RW WRB H H H L H Display data read out H H L H L Display data write L H H L H Register status read L H L H L Writes to internal register instruction ics CUN _ X C C Co Command Write Data Write Status Read Data Read Figure 1 6800 Series MPU Interface protocol 5 86 m ICS RD Q4 4 A A A 1885 41 Command Write Data Write _ Status Read _ Data Read Figure 2 8080 Series MPU Interface Protocol 5 C86 L
17. blinking or others This mode is canceled by the reset Modify read instruction RS RW DB7 DBe 085 DB4 DB2 3 a oe 9E 13 Reset Modify Read This instruction cancels the Modify read mode and makes the column address return to its initial value just before the set Modify read instruction is started RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DBO pot ota 1 1 1 1 1 Set Page Address Set Column Address N Set Modify Read Dummy Read Reset Modify Read Return Column Address N Figure 8 Sequence for Cursor Display LCD TG12864H 01A0 A01 Page 20 of 32 Vatronix 14 Reset This instruction resets initial display line column address page address and common output status select to their initial status but dose not affect the contents of display data RAM This instruction cannot initialize the LCD power supply which is initialized by the RST pin RS RW DB7 DBe DB5 DB4 DB2 9 3 9 15 SHL Select Common Output Mode Select COM output scanning direction is selected by this instruction which determines the LCD driver output status Don t care RS RW 087 DBe DB5 DB4 DB2 L0 9 3 3 9 0 SHE J SHL 0 normal direction gt COM63 SHL 1 reverse direction 63 COMO 16 Power Control Selects one of eight power circuit functions by using 3 bit register A
18. ction 0 gt 5 6131 ADC 1 reverse direction SEG131 2SEGO 9 Reverse Display ON OFF Reverses the display status on LCD panel without rewriting the contents of the display data RAM RS RW DB7 DBe DB5 DB4 DB2 DB1 0 0 1 0 1 0 0 J 91 JREV REV RAM bit data 1 RAM bit data 0 O normal LCD pixel is illuminated LCD pixel is not illuminated O reverse LCD pixel is not illuminated LCD pixel is illuminated 10 Entire Display ON OFF Forces the whole LCD points to be turned on regardless of the contents of the display data RAM At this time the contents of the display data RAM are held This instruction has priority over the reverse display ON OFF instruction RS RW DB7 DBe DB5 084 DB3 DB2 081 1 EON EON 0 normal display EON 1 entire display ON LCD TG12864H 01A0 A01 Page 19 of 32 Vatronix 11 Select LCD Bias Selects LCD bias ratio of the voltage required for driving the LCD RS RW DB7 DBe DB5 DB4 DB2 39 19 37 98 oT 9 1 Bias 0 1 9 Duty 1 1 7 Duty 12 Set Modify Read This instruction stops the automatic increment of the column address by the read display data instruction but the column address is still increased by the write display data instruction And it reduces the load of microprocessor when the data of a specific area is repeatedly changed during cursor
19. emal Instructions Power Control 0 VR 0 VF 0 Waiting for gt 1ms Power OFF VDD 55 Figure 17 Power OFF LCD TG12864H 01A0 A01 Page 30 of 32 Vatronix 14 Display Data RAM Map 083 082 331 080 Address Output 0 9188181813819 8 daga EIE EIE ESSE d co m 080 180 081 083 08 082 083 082 mia 08 082 c3 Digg m COM amp 6 COM amp B COM amp B COMAN 088 087 COMAS LI 1j LIO 10 OQ 199 COMS Column ADC O 02 63 05 7 83 E Address ADG 7F os n4 02 o 00 When the initial display a a lina address LCD Output R g is 1C HEX LCD TG12864H 01A0 A01 Page 31 of 32 Vatronix 15 Revision records Version Ref pages Revision Items Date A00 All pages New release 2009 11 21 LCD TG12864H 01A0 A01 Page 32 of 32
20. hin the range of VO lt VOUT Because VOUT is the operating voltage of operational amplifier circuits it is necessary to be applied internally or externally For the Eq 1 we determine VO by Ra Rb and VEV The Ra and Rb are connected internally or externally by INTRS pin And VEV called the voltage of electronic volume is determined by Eq 2 where the parameter a is the value selected by instruction Set Reference Voltage Register within the range 0 to 63 VREF voltage at 25 C is shown in table 1 VO 1 Rb Eq 1 Vev 1 63 a 162 x VReF V Eq 2 Table 1 VREF Voltage at Ta 25 REF Temp coefficient VREF V H 0 05 2 1 L External input VEXT VOUT Rb VR Ra Vss GND Figure 4 Internal Voltage Regulator Circuit LCD TG12864H 01A0_A01 Page 14 of 32 Vatronix In Case of Using Internal Resistors Ra and Rb INTRS H When INTRS pin is H resistor Ra is connected internally between VR pin and VSS and Rb is connected between and VR We determine VO by two instructions Regulator Resistor Select and Set Reference Voltage The following figure shows VO voltage measured by adjusting internal regulator resistor ratio Rb Ra and 6 bit electronic volume registers for each temperature coefficient at Ta 25 16 00 110 12 00 1 10 00 611 VO 8 00 0 1 0 E 0 0 1 6 00 0 0 0
21. indicator ister set 00000 Set the Vo output voltage Electronic volume value electronic volume register 101 100 O OFF 1 ON 1 0 0 Setthe flashing mode select booster ratio 00 2x 3x 4x 01 5x 11 6x Display OFF and display all points ON compound command Command for non operation Command for IC test Do not use this command 20 Booster ratio set 21 Power saver 22 NOP 23 Test LCD TG12864H 01A0 A01 Page 16 of 32 Vatronix 11 2 Instruction Description 1 Display ON OFF Turns the Display ON or OFF RS RW DB7 086 DB5 DB4 DB3 DB2 DB 5 4 93 0 g 3 1 DON DON 1 display ON DON 0 display OFF 2 Initial Display Line Sets the line address of display RAM to determine the Initial Display Line The top row when SHL L COM63 when SHL of LCD panel RW 087 DB6 DB5 DB4 DB2 DBO o o To T Iss sra sro sre sri ST5 STA ST3 ST2 STI STO Line address 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 62 1 1 1 1 1 1 63 3 Set Page Address Sets the Page Address of display data RAM from the microprocessor into the Page Address register Any RAM data bit can be accessed when its Page Address and column address are specified Along with the column address the Page Address defines the address of the display RAM to write or read display data Changing the Page Address doesn t effect to the displa
22. ion Setup Flow 2 User System Setup by External pins Start of initialization Power On VDD VSS with keeping the RESETB 1 Waiting for stabilizing the power RESETB pin H Set Power Save User Application Setup by Internal Instructions ADC Select SHL Select LCD Bias Select Set the LCD Operating Voltage by Internal Instructions Regulator Resistor Select Reference Voltage Register Set Release Power Save Waiting for Stabilizing the LCD Power Levels End of Initialization Figure 15 Initializing without the Built in Power Supply Circuits LCD TG12864H 01A0 A01 Page 28 of 32 Vatronix Referential Instruction Setup Flow 3 End of Initialization Display Data RAM Addressing by Instruction Initial Display Line Set Page Address Set Column Address Write Initial Display data Turn Display ON by Instruction Display ON OFF DON 1 End of Data Display Figure 16 Data Displaying LCD TG12864H 01A0_A01 Page 29 of 32 Vatronix e Referential Instruction Setup Flow 4 Optional Status Turn Display OFF by Instruction Display ON OFF DON 0 Tum Off the Voltage Regulator by Internal Instructions Power Control 1 VR 0 VF 1 4 Waiting for gt 50ms Turn Off the Voltage Follower by Internal Instructions Power Control 1 VR 0 0 i Waiting for 1ms Turn Off the Voltage Converter by Int
23. n external power supply and part of internal power supply functions can be used simultaneously RS RW DB7 DBe 085 DB4 DB2 1 ve ve v VC VR VF Page address 0 Internal voltage converter circuit is OFF 1 Internal voltage converter circuit is ON 0 Internal voltage regulator circuit is OFF 1 Internal voltage regulator circuit is ON 0 Internal voltage follower circuit is OFF 1 Internal voltage follower circuit is ON 17 Regulator Resistor Select Selects resistance ratio of the internal resistor used in the internal voltage regulator See voltage regulator section in power supply circuit Refer to the following table RS RW DB7 DB6 085 DB4 DB3 DB2 DBO 1 Ro R2 RO 1 Rb Ra ratio 0 0 0 3 0 0 0 1 3 5 0 1 0 4 0 0 1 1 4 5 1 0 0 5 0 default 1 0 1 2 9 1 1 0 6 0 1 1 1 6 4 LCD TG12864H 01A0 A01 Page 21 of 32 Vatronix 18 Reference Voltage Select Consists of 2 byte instruction The 1st instruction sets reference voltage mode the 2 one updates the contents of reference voltage register After second instruction reference voltage mode is released The 1 Instruction Set Reference Voltage Select Mode RS RW DB7 DB5 DB4 DB2 DB1 1 0 0 0 0 0 20 ft s 2 Instruction Set Reference Voltage Register RW 08
24. on because it performs display data RAM read write operation with no external operation clock In addition because it contains power supply circuits necessary to drive liquid crystal which is a display clock oscillator circuit high performance voltage converter circuit high accuracy voltage regulator circuit low power consumption voltage divider resistors and OP Amp for liquid crystal driver power voltage it is possible to make the lowest power consumption display system with the fewest components for high performance portable systems On chip Display Data RAM Capacity 65 x 132 8 580 bits RAM bit data 1 a dot of display is illuminated RAM bit data 0 a dot of display is not illuminated Various Function Set Display ON OFF set initial display line set page address set column address read status write read display data select segment driver output reverse display ON OFF entire display ON OFF select LCD bias set reset modify read select common driver output control display power circuit select internal regulator resistor ratio for VO voltage regulation electronic volume set static indicator state H W and S W reset available Static drive circuit equipped internally for indicators with 4 flashing modes LCD TG12864H 01A0 A01 Page 9 of 32 Vatronix Built in Analog Circuit On chip oscillator circuit for display clock external clock can also be used High performance voltage converter with b
25. ooster ratios of x2 x3 x4 and x5 where the step up reference voltage can be used externally High accuracy voltage regulator temperature coefficient 0 05 or external input Electronic contrast control function 64 steps Vref 2 1V 3 VO voltage adjustment voltage High performance voltage follower V1 to V4 voltage divider resistors and OP Amp for increasing drive capacity Operating Voltage Range Supply voltage VDD 2 4 to 3 6 V LCD driving voltage VLCD VO VSS 4 5 to 13 0 V Low Power Consumption Operating power 400uA typical Condition VDD x 4 boosting VCl 1 VDD VO 11V internal power supply ON display OFF and normal mode is selected Standby power 30uA maximum During power save standby mode Microprocessor interface High speed 8 bit parallel interface with 6800 series or 8080 series Serial interface only write operation available Chip Select Input There are CS1 pins for chip selection The LCM can interface with an MPU only when CS is L When these pins are set to any other combination RS E RDB RW_WRB inputs are disabled and DBO to DB7 are to be high impedance And in case of serial interface the internal shift register and the counter are reset Parallel Serial Interface LCM used ST7565P has three types of interface with an MPU which are one serial and two parallel interfaces The interface type is determined by P S pin as shown in following ta
26. ruction description P17 12 Timing Characteristics P24 13 Initializing flow chart P27 14 Display Data RAM Map P31 15 Revision records P32 LCD TG12864H 01A0 A01 Page 2 of 32 Vatronix 1 Precautions in Use of LCD Module 1 Avoid applying excessive shocks to the module or making any alterations or modifications to it 2 Don t make extra holes on the printed circuit board modify its shape or change the components of LCD Module Don t disassemble the LCM Don t operate it above the absolute maximum rating Don t drop bend or twist LCM Soldering only to the I O terminals Storage please storage in anti static electricity container and clean environment 2 General Specification 3 Absolute Maximum Ratings Operating Temperature Storage Temperature Input Voltage Supply Voltage For Logic Supply Voltage For LCD LCD TG12864H 01A0 A01 Page 3 of 32 Vatronix 4 Electrical Characteristics ITEM SYMBOL CONDITION vem gt Supply Volt For LCD Ta 25 C Output High Volt 5 Backlight Information Absolute Maximum ratings 2520 ET Reverse Current 20 Absolute maximum forward
27. tion SEG131 gt SEG0 1 normal direction SEGO gt SEG131 ON OFF Indicates display ON OFF status 0 display ON 1 display OFF Indicates the initialization is in progress by RST signal 0 chip is active 1 chip is being reset 6 Write Display Data 8 bit data of display data from the microprocessor can be written to the RAM location specified by the column address and page address The column address is increased by 1 automatically so that the microprocessor can continuously write data to the addressed page RS RW DB7 DBe DB5 DB4 DB3 DB2 DB1 DBO Write data 7 Read Display Data RS RW DB7 0 6 DB5 DB4 DB3 DB2 DBO RST LCD TG12864H 01A0 A01 Page 18 of 32 Vatronix Set Page Address Set Column Address Data Write Set Page Address Set Column Address Dummy Data Read Column Column 1 Column Column 1 Data Write Continue 2 Data Read i NO Column Column 1 Optional Status Data Read Continue Optional Status Figure 6 Sequence for Writing Display Data Figure7 Sequence for Reading Display Data 8 ADC Select Segment Driver Direction Select Changes the relationship between RAM column address and segment driver The direction of segment driver output pins can be reversed by software This makes IC layout flexible in LCD module assembly RS RW DB7 DBe DB5 DB4 DB1 1 1 1 1 1 JADC ADC 0 normal dire
28. width mm Data setup time 10580 40 Data hold tDH80 15 I access time I disable time 140 LCD TG12864H 01A0 A01 Page 24 of 32 Vatronix Read Write Characteristics 6800 series Microprocessor For parallel interface only Sw CC KS 52 DBO to 087 Write LX I ACCES 0068 DBO to 087 Read C tPWHe amp W and tPWH68R is specified the overlapped period when CS is low CS2 is high and E is high Figure 11 Read Write Characteristics 6800 series Microprocessor io EET Ta 40 to 85 C Address hold time tAH68 System eyele ime E p oj Enable Pulse ME High Width write gt nmm E m Data setup NM 40 Data hold time tDH68 15 BB i time i ut disable time ACCES 140 _ LCD TG12864H 01A0 A01 Page 25 of 32 Vatronix Serial Interface Characteristics tess CS2 i aaan asii TASS RS ______ D DB6 SCLK 09 sows Y TLS twHs 1555 inus DB7 SID Figure 12 Serial Interface Characteristics DD 2 4 to 3 3V 40 to 85 L am sea Wex Unt __ Serial clock cycle DB6 tcYs 250 SCLK high pulse width SCLK tWHS 100 SCLK low pulse width WLS 100 Address setup time tASS 150 Address hold time tAHS 150 Data setup time D
29. y status RS RW DB7 DBe 085 DB4 DB2 DBO 0j 0 1 0 1 1 P3j P2 Pt Po P3 P2 P1 PO Page address 0 0 0 0 0 0 0 0 1 1 0 1 1 1 7 1 0 0 0 8 4 Set Column Address Sets the Column Address of display RAM from the microprocessor into the Column Address register Along with the Column Address the Column Address defines the address of the display RAM to write or read display data When the microprocessor reads or writes display data to or from display RAM Column Addresses are automatically increased Address MSB RW 087 DB6 DB5 DB4 DB2 DBO 0 LCD TG12864H 01A0 A01 Page 17 of 32 Vatronix Set Column Address LSB RS RW 087 DB6 DB5 DB4 DB3 DB2 Yt YO Y7 Y6 Y5 Y4 Y3 Y2 Y1 YO Column ddress 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 130 1 0 0 0 0 0 1 1 131 5 Read Status For parallel interface only Indicates the internal status of the LCM RS RW 087 086 DB5 084 DB3 DB2 DB DBO 0 1 BUSY ADC ON OFF RST Flag Description The device is busy when internal operation or reset Any instruction is rejected until BUSY BUSY goes Low 0 chip is active 1 chip is being busy Indicates the relationship between RAM column address and segment driver ADG 0 reverse direc
Download Pdf Manuals
Related Search