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USB5841 User`s Manual

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1. DIOO CLK2M DIO1 OUT2 DIO2 CLK2 DIO3 GATE2 DIO4 OUTI DIOS CLK1 Ni DIO6 GATEI a DIO7 OUTO DIO8 CLKO DIO9 GATEO DIO10 INT DIO11 DGND DIO12 DIO47 DIO13 DIO46 DIO14 DIO45 DIO15 DIO44 DGND DIO43 DIO16 DIO42 DIO17 DIO41 DIO18 DIO40 ane DIO19 DIO39 dvi DIO20 DIO38 DIO21 DIO37 DIO22 DIO36 DIO23 DIO35 DIO24 DIO34 DIO25 DIO33 DIO26 DIO32 DIO27 DIO28 DIO29 CN5 DIO30 DIO31 DGND Pin definition about CN1 CN3 CN4 and CNS USB5841 Data Acquisition DIOO DI047_ Input Output Pin definition about CN2 Timer Counter CLK2M On board 2MHz clock oscillator pulse output Output cycle 0 5 microseconds CLKO CLK2 Clock pulse input pins GATEO GATE2 OUTO OUT DGND Digital ground when use counter timer we best choose it as reference ground Interrupt signal input USB5841 Data Acquisition Chapter 4 Connection Ways for Each Signal 4 1 Digital Input Connection switch device switch device DGND 4 2 Digital Output Connection boo switch signal DOI DO2 i o Y D047 l switch device switch device DGND GATE CLK a T li OUT DGND 9 USB5841 Data Acquisition Chapter 5 Methods of Using Timer Counter 5 1 The working mode MODE 0 Interrupt on terminal count Mode 0 is typically used for event counting After
2. FFY EA INI YF UF RF FFF TY a ANF Da Ka da 19 2 USB5841 Data Acquisition Chapter I Overview USB5841 can be widely used in count timing frequency measurement frequency occurrence digital control especially in the count frequency measurement fields can be flexible and convenient combination to meet the different needs of a variety of users The channel 0 provide positive reverse output you can easily control the GATE of the other channels in order to facilitate frequency measurement applications Unpacking Checklist Check the shipping carton for any damage If the shipping carton and contents are damaged notify the local dealer or sales for a replacement Retain the shipping carton and packing material for inspection by the dealer Check for the following items in the package If there are any missing items contact your local dealer or sales gt USB5841 Data Acquisition Board gt ART Disk a user s manual pdf b drive c catalog gt Warranty Card FEATURES Digital Input Output Channel No 48 channel each 8 channels can be configured to DI or DO gt Electric Standard TTL compatible gt Digital Input High Voltage 2 0V Low Voltage 0 8V gt Digital Output High Voltage 4 45V Low Voltage 0 5V Power on output low level Counter 32 bit resolution Channel No 3 channel subtracting counters Counting Mode 6 counting mode software configurable Electrical Standard TTL level Clock Source CLKn 1
3. loaded on the next CLK pulse BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 15 USB5841 Data Acquisition This allows the sequence to be retriggered by software OUT strobe low N 1 CLK pulses after the new count of N is written CW 18 LSB 3 0 a a o FF FF FF 2 1 O FF FE FD CW 18 LSB 3 OUT l o of of o o o FF IN N N N A AF CW 18 LSB 3 LSB 2 LlLl ee Oe GATE OUT D N N N N 3 a 1 Figure 5 5 Mode 4 MODE 5 Hardware triggered strobe OUT will initially be high Counting is triggered by a rising edge of GATE When the initial count has expired OUT will go low for one CLK pulse and then go high again After writing the Control Word and initial count the counter will not be loaded until the CLK pulse after a trigger This CLK pulse does not decrement the count so for an initial count of N OUT does not strobe low until N 1 pulse after a trigger A trigger results in the Counter being loaded with the initial count on the next CLK pulse The counting sequence is retriggerable OUT will not strobe low for N 1 CLK pulses after any trigger GATE has no effect on OUT BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 16 USB5841 Data Acquisition If a new count is written during counting the current counting sequence will not be affected If a trigger occurs after the new count is written but before the current cou
4. pulse OUT goes low N CLK pulses after the trigger Thus the GATE input can be used to synchronize the Counter After writing a Control Word and initial count the Counter will be loaded on the next CLK pulse OUT goes low N CLK Pulses after the initial count is written This allows the Counter to be synchronized by software also Writing a new count while counting does not affect the current counting sequence If a trigger is received after writing a new count but before the end of the current period the Counter will be loaded with the new count on the next CLK pulse and counting will continue from the new count Otherwise the new count will be loaded at the end of the current counting cycle In mode2 a COUNT of 1 I illegal CW 14 L5B 3 SOS GATE OUT slelitalelsla w ufu ln pM N NN 3 CWsi4 LSB 3 GATE CWa 14 LSB 4 LSB amp GATE OUT LJ o oO Oo pes oO FY oO IR KO A odessa dele des Figure 5 3 Mode 2 Note A GATE transition should not occur one clock prior to terminal count BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 13 USB5841 Data Acquisition MODE 3 Square wave mode Mode 3 is typically used for Baud rate generation Mode 3 is similar to Mode 2 except for the duty cycle of OUT OUT will initially be high When half the initial count has expired OUT goes low for mainder of the count Mode 3 is periodic the sequence above is repeated in
5. that relevant to our boards and then carry out the process of section I all over again we can complete the new installation BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 19
6. the Control Word is written OUT is initially low and will remain low until the Counter reaches zero OUT then goes high and remains high until a new count or a new Mode O Control Word is written into the Counter GATE 1 enables counting GATE 0 disables counting GATE has no effect on OUT After the Control Word and initial count are written to a Counter the initial count will be loaded on the next CLK pulse This CLK pulse does not decrement the count so for an initial count of N OUT does not go high until N41 CLK pulses after the initial count is written If a new count is written to the Counter it will be loaded on the next CLK pulse and counting will continue from the new count If a two byte count is written the following happens 1 Writing the first byte disables counting OUT is set low immediately no clock pulse required 2 Writing the second byte allows the new count to be loaded on the next CLK pulse This allows the counting sequence to be synchronized by software Again OUT does not go high until N 1 CLK pulses after the new count of N is written If an initial count is written while GATE 0 it will still be loaded on the next CLK pulse When GATE goes high OUT will go high N CLK pulse later no CLK pulse is needed to load the Counter as this has already been done BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 10 USB5841 Data Acquisition CW 10 L5B d ml GATE ls rl S H ninja
7. Hz 10MHz Gate GATEn Rising high level and low level Counter Output OUTn high level low level VV VV Y V V Dimension 128mm L 95 5mm W 14mm H USB5841 Data Acquisition Chapter 2 Components Layout Diagram and a Brief Description 2 1 The Main Component Layout Diagram amp FECE USB5841 wo 6 jal allai Te LEN CNI CN2 i a 7 YHA WY n terete F De CN3 CN4 CNS a LED AN DIDI JPWI 2 2 The Function Description for the Main Component 2 2 1 Signal Input and Output Connectors CNI DIOO DIO13 digital signal input output connector CN2 DIO46 DIO7 digital signal input output interrupt signal and Timer Counter connector CN3 DIO14 DI026 digital signal input output connector CN4 DIO32 DIO45 digital signal input output connector CN5 DIO27 DIO31 digital signal input output and interrupt signal connector BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 4 USB5841 Data Acquisition 2 2 2 Jumper JPW 1 load USB controller program 1 2 shorted default 2 2 3 Physical ID of DIP Switch DIDI Set physical ID number When the PC is installed more than one USB5841 you can use the DIP switch to set a physical ID number for each board which makes it very convenient for users to distinguish and visit each board in the progress of the hardware configuration and software programming The following four byte numbers are expressed by the binary system When DIP s
8. USB5841 User s Manual g Beijing ART Technologv Development Co Ltd USB5841 Data Acquisition Contents CO SEF RE FREE FRYN Or 2 CREO E 3 Chapter 2 Components Layout Diagram and a Brief Description ss sssssesnnnnnnnnnnnnnnnnzzzznnnnnnzznnzzzznnananzznanzzzznannnnznzna 2 1 The Main Component Layout Did rai isti SA A b SOIT Rca 4 2 2 The Function Description for the Main Component rata rrrrrEnE nn nn nnnnnnnnnEEEEAAAAnEzAZAnnn nn nn nn nn 4 2 2 1 Signal Inp t and Output Connector a sie ira wa e i Y ta tk ae a i a ad 4 22077 100 L EEO IATA 5 2 2 Poy ea DOr DIP SW Ieren E A EO 5 ZIO AIA 6 CIRIACO Riina N 7 3 1 The Definition of Signal Input and Output Connectors a aa AAEKEEEn nn A An nn nn nn nin EEEEEEERAEAEEEEtA 7 Chapter 4 Connection Ways for Each Siona assassinii iu ein o ert EE E ra E Ena Ena en E Ea iiobis 9 4 1 Detiene orali E dined aae NN FA ana a aeiia 9 kD T OO CON COIN E E A NAF FF FFY AY YY FER HNN NAE 9 4 9 lime Conte f COE O ses ed 9 Chaprer 5 Methods Of Usine Tuner Count CT aus sus E CA WNA NS GAF CB OFYN CU CYSON NOD 10 LELLO RA 10 Chapter 6 Notes Calibration and Warranty POlicy iii 18 Clips 18 PALIO SARO RA aa 18 Products Rapid Installation and Self check aa AAAEEEE EEA EEA EEA AEAEAKAZEE KKM EENNNKKEEEEEEEEZZEZZZEEZA 19 Rapid IS Oi d a a A EOFN YNE O 19 CGIE RR 19 Belete W rono Insia lation ARY RYN
9. ct the appropriate board type on the pop up interface click the button driver installation or select CD ROM drive in Resource Explorer locate the product catalog and enter into the APP folder and implement Setup exe file After the installation pop up CD ROM shut off your computer insert the USB card If it is a USB product it can be directly inserted into the device When the system prompts that it finds a new hardware you do not specify a drive path the operating system can automatically look up it from the system directory and then you can complete the installation Self check At this moment there should be installation information of the installed device in the Device Manager when the device does not work you can check this item Open Start gt Programs gt ART Demonstration Monitoring and Control System gt Corresponding Board gt Advanced Testing Presentation System the program is a standard testing procedure Based on the specification of Pin definition connect the signal acquisition data and test whether AD is normal or not Connect the input pins to the corresponding output pins and use the testing procedure to test whether the switch is normal or not Delete Wrong Installation When you select the wrong drive or viruses lead to driver error you can carry out the following operations In Resource Explorer open CD ROM drive run Others gt SUPPORT gt USB bat procedures and delete the hardware information
10. definitely An initial count of N results in a square wave with a period of N CLK cycles GATE 1 enables counting GATE 0 disables counting If GATE goes low while OUT is low OUT is set high immediately no CLK pulse is required A trigger reloads the Counter with the initial count on the next CLK pulse Thus the GATE input can be used to synchronize the Counter After writing a Control Word and initial count the Counter will be loaded on the next CLK pulse This allows the Counter to be synchronized by software also Writing a new count while counting does not affect the current counting sequence If a trigger is received after writing a new count but before the end of the current half cycle of the square wave the Counter will be loaded with the new count on the next CLK pulse and counting will continue from the new count Otherwise the new counter will be loaded at the end of the current half cycle Mode 3 is implemented as follows Even counts OUT is initially high The initial count is loaded on one CLK pulse and then is decremented by two on succeeding CLK pulses When the count expires OUT changes value and the Counter is reloaded with the initial count The above process is repeated indefinitely Odd counts OUT is initially high The initial count minus one an even number is loaded on one CLK pulse and then is decremented by two on succeeding CLK pulses One CLK pulse after the count expires OUT goes low and the Counter is reload
11. ed with the initial count minus one Succeeding CLK pulses decrement the count by two When the count expires OUT goes high again and the Counter is reloaded with the initial count minus one The above process is repeated indefinitely So for odd counts OUT will be high for N 1 2 counts and low for N 1 2 counts BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 14 USB5841 Data Acquisition CW 16 LSB 4 CW 16 L5Bm5 IN n ao Cw 16 LSB 4 Inirleleizizisizlzlizisizisi i Figure 5 4 Mode 3 Note A GATE transition should not occur one clock prior to terminal count MODE 4 Software triggered strobe OUT will be initially high When the initial count expires OUT will go low for one CLK pulse and then go high again The counting sequence is triggered by writing the initial count GATE 1 enables counting GATE 0 disables counting GATE has no effect on OUT After writing a Control Word and initial count the Counter will be loaded on the next CLK pulse This CLK pulse does not decrement the count so for an initial count of N OUT does not strobe low until N 1 CLK pulses after the initial count is written If a new count is written during counting if will be loaded on the next CLK pulse and counting will continue from the new count If a two byte count is written the following happens 1 Writing the first byte has no effect on counting 2 Writing the second byte allows the new count to be
12. n aalala elte CW 10 L5B 3 LA LO OUT CW 10 L5B 3 LSB 7 i 0 o o FF IN N N N FI AT Et Figure 5 1 Mode O NOTE The following conventions apply to all mode timing diagrams 1 Counters are programmed for binary not BCD counting and for reading writing least significant byte LSB only 2 The counter is always selected CS always low 3 CW stands for Control Word CW 10 means a control word of 10 HEX is written to the counter 4 LSB stands for Least Significant Byte of count 5 Numbers below diagrams are count values The lower number is the least significant byte The upper number is the most significant byte Since the counter is programmed to read writer LSB only the most significant byte cannot be read N stands for an undefined count Vertical lines show transitions between count values USB5841 Data Acquisition MODE 1 Hardware retriggerable one shot OUT will be initially high OUT will go low on the CLK pulse following a trigger to begin the one shot pulse and will remain low until the Counter reaches zero OUT will then go high and remain high until the CLK pulse after the next trigger After writing the Control Word and initial count the Counter is armed A trigger results in loading the Counter and setting OUT low on the next CLK pulse thus starting the one shot pulse An initial count of N will result in a one shot pulse N CLK cycles in duration The one shout is retrigge
13. n the day the product is shipped from ART s factory gt For products containing storage devices hard drives flash cards etc please back up your data before sending them for repair ART is not responsible for any loss of data gt Please ensure the use of properly licensed software with our systems ART does not condone the use of pirated software and will not service systems using such software ART will not be held legally responsible for products shipped with unlicensed software installed by the user 3 Our repair service is not covered by ART s guarantee in the following situations Damage caused by not following instructions in the User s Manual Damage caused by carelessness on the user s part during product transportation Damage caused by unsuitable storage environments i e high temperatures high humidity or volatile chemicals V Y V V Damage from improper repair by unauthorized ART technicians gt Products with altered and or damaged serial numbers are not entitled to our service 4 Customers are responsible for shipping costs to transport damaged products to our company or sales office 5 To ensure the speed and quality of product repair please download an RMA application form from our company website USB5841 Data Acquisition Products Rapid Installation and Self check Rapid Installation Product driven procedure is the operating system adaptive installation mode After inserting the disc you can sele
14. nt expires the Counter will be loaded with the new count on the next CLK pulse and counting will continue from there CW 1A L5B 3 GLK GATE OUT o 90 o FF NINININ OW 3 EA o CW 1A L5B 3 CLE GATE QUT CWmlA LSB 3 LSB 5 FLINT MM CLA GATE OUT n ufw wn w 9 o o o FE FE O 0 olrlrl 5 la Figure 5 6 Mode 5 USB5841 Data Acquisition Chapter 6 Notes Calibration and Warranty Policy 6 1 Notes In our products packing user can find a user manual a USB5841 module and a quality guarantee card Users must keep quality guarantee card carefully if the products have some problems and need repairing please send products together with quality guarantee card to ART we will provide good after sale service and solve the problem as quickly as we can When using USB5841 in order to prevent the IC chip from electrostatic harm please do not touch IC chip in the front panel of USB5841 module 6 2 Warrantv Policv Thank vou for choosing ART To understand vour rights and enjov all the after sales services we offer please read the following carefully 1 Before using ART s products please read the user manual and follow the instructions exactly When sending in damaged products for repair please attach an RMA application form which can be downloaded from www art control com 2 All ART products come with a limited two year warranty gt The warranty period starts o
15. rable hence OUT will remain low for N CLK pulses after any trigger The one shot pulse can be repeated without rewriting the same count into the counter GATE has no effect on OUT If a new count is written to the Counter during a one shot pulse the current one shot is not affected unless the counter is retriggered In that case the Counter is loaded with the new count and the one shot pulse continues until the new count expires CWsl L5B J OUT i oO O FF o cg in el eelelelileln aolol CWmil LSB 3 slofo o fo o o o nin nee 32eg CW 12 LSB 2 LSB mi CLK GATE DUT i O o O FF FF 0 O im lelinbnfebilelm e a a Figure 5 2 Mode 1 BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 12 USB5841 Data Acquisition MODE 2 Rate Generator This Mode functions like a divide by N counter It is typically used to generate a Real Time Clock interrupt OUT will initially be high When the initial count has decremented to 1 OUT goes low for on CLK pulse OUT then goes high again the Counter reloads the initial count and the process is repeated Mode 2 is periodic the same sequence is repeated indefinitely For an initial count of N the sequence repeats every N CLK cycles GATE 1 enables counting GATE 0 disables counting If GATE goes low during an output pulse OUT is set high immediately A trigger reloads the Counter with the initial count on the next CLK
16. witch points to ON that means 1 and when it points to the other side that means 0 As they are shown in the following diagrams byte ID3 is the high byte IDO is the low byte and the black part in the diagram represents the location of the switch Test software of the company often uses the logic ID management equipments and at this moment the physical ID DIP switch is invalid If you want to use more than one kind of the equipments in one and the same system at the same time please use the physical ID as much as possible ID3 ID2 IDI IDO 4 3 2 1 ON ON The above chart shows 1111 so it means that the physical ID is 15 ID3 D2 IDI IDO 4 3 2 1 ON ON The above chart shows 0111 so it means that the physical ID is 7 ID3 ID2 IDI IDO 4 3 2 1 ON ON The above chart shows 0101 so it means that the physical ID is 5 A USB5841 Data Acquisition on OFO OND ono B u ox on or foro c _ onto ont Jos ov __ 1 ON 1 ON 1 ON 1 OFF 0 Pov mo on loo 15 2 2 4 Indicator Status LED3 3V 3 3V power indicator on for normal USB5841 Data Acquisition Chapter 3 Signal Connectors 3 1 The Definition of Signal Input and Output Connectors Pin definition

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