LS7260 LS7262 - Anaheim Automation
Contents
1. BRAKE O1 o3 LS7262 LS7262 06 OVERCURRENT OVERCURRENT SENSE SENSE FIGURE 5 SEDI MOTOR CLOSED LOOP SPEED CONTROLLER POSITION SENSOR A closed loop system can be configured by differentiating one of the motor position sense inputs and integrating only the negative pulses to form a DC voltage that is applied to the inverting input of an op amp The non inverting input voltage is adjusted with a potentiometer until the resultant voltage at VTRIP causes the motor to run at desired speed The R2 C1 differentiator the R3 D1 negative pulse trans mitter and the R4 C2 integrator form a frequency to voltage converter An increase in motor speed above the desired speed causes VTRIP to increase which lowers the PWM and the resultant motor speed A decrease in speed lowers VTRIP and raises the PWM and the resultant motor speed For proper operation both R5 and R6 should be greater than R4 and R4 in turn should be greater than both R2 and R3 Also the R4 C2 time constant should be greater than the R2 C1 time constant C3 may be added across R6 for additional VTRIP smoothing LS7260 or LS7262 OSCILLATOR The information included herein is believed to be accurate and reliable However LSI Computer Systems Inc assumes no responsibilities for inaccuracies nor for2. Channel FET drivers For the LS7260 these Outputs provide drive to P Channel FET drivers if COMMON is held at Vss OUTPUTS 4 5 6 Pins 6 7 8 These open drain Outputs are enabled as in Table 2 and provide base current to NPN transistors or gate drive to N Channel FET drivers COMMON Pin 5 The COMMON may be connected to Vss when using a center tapped motor configuration or when using all NPN or N Channel drivers For the LS7260 the COMMON is tied to Vss Vss VDD Pins 11 18 Supply voltage positive and negative terminals VALUE 35 30 to 0 5 65 to 150 40 to 125 5 kQ Vss 1 5 Vss 0 Vss 4 0 V VSS 2 0 25 V Oscillator Frequency Range External Resistor Range Fosc Rosc 100 1000 kHz 1 RC kQ 22 NOTE Theoretical switching point of the OVERCURRENT SENSE input is one half of the power supply determined by an internal bias network in manufacturing Tolerances cause the switching point to vary plus or minus 0 25V After manufacture the switching point remains fixed within 10mV over time and temperature The input switching sensivity is a maximum of 50mV There is no hysteresis on the OVERCURRENT SENSE input TYPICAL CIRCUIT OPERATION The oscillator is used for motor speed control as explained under VTRIP Both upper and lower motor drive transistors are pulse width modulated see Fig 1 or 2 during speed control For the LS7262 the outputs turn on in pairs See Table 3
3. For example see dotted line Fig 2 Q8 and Q4 are on thus ena bling a path from the positive supply through the emitter base junction of Q101 Q8 Q4 R5 the base emitter junction of Q105 and the fractional ohm resistor to ground The current in the above described path is determined by the power supply voltage the voltage drops across the base emitter junctions of Q101 and Q105 1 4V for single transistor or 2 8V for Darling ton pairs the impedance of Q8 and Q4 and the value of R5 Table 1 provides the recommended value for R5 R4 and R6 are the same value TABLE 1 OUTPUT CURRENT LIMITING RESISTOR SELECTION TABLE POWER OUTPUT CURRENT SUPPLY Resistance kQ causes excessive power dissipation exceeds max current possible for this voltage TABLE 3 OUTPUT COMMUTATION SEQUENCE SELECT CS1 CS2 CS1 CS2 0 0 0 1 1 0 1 60 120 240 15283 293 S1S25S3 0 1 0 ELECTRICAL SEPARATION SENSE INPUTS See Figures 1 and 2 For the LS7260 Outputs 01 02 03 are the logical inversions of the corresponding Out 10 0 0 000 0 puts of the LS7262 101 111 1 0 0 1 1 1 0 1 1 0 1 0 1 0 0 1 0 0 0 1 1 1 CS1 CS2 CS1 CS2 300 S1 S2 S3 For the LS7260 See Fig 1 the external drivers also turn on in pairs Internal operation is somewhat different than the LS7262 For example external transistors Q101 and Q105 will turn on when internal transistor Q8 turns off and Q4 turns on enabling full powe
4. directions a motor control pulse width modulator circuit such as the SG1731 or UC1637 can be interfaced with the L 7260 or LS7262 The logical OR gate made up of the resistor diode net work permits the LS7260 or LS7262 to be enabled when either the forward or reverse input is high By applying the forward input directly to Pin 19 the motor can only operate in the forward direction when the forward input is high and only in the reverse direction when the reverse input is high Motor direction is determined by relative pulse widths of the forward and reverse inputs while ac celeration or deceleration is determined by variations of these widths TABLE 4 OUTPUT COMMUTATION SEQUENCE FOR FOUR PHASE OPERATION CS1 CS2 0 OUTPUTS ENABLED S1 S2 S3 0 0 1 1 0 0 1 4 For four phase commutation See Fig 4 the COMMUTA TION SELECT inputs must both be tied low The S1 input is driven from one motor position sensor while the S2 and S3 inputs are connected together and driven by the second position sensor The COMMON input must be 7260 012703 5 FWD REV 0 O4 O6 O1 03 FWD REV 1 01 03 04 06 connected to Vss The sensors have an electrical separa tion of 90 Figure 4A indicates the use of Bipolar Tran sistors Figure 4B indicates the use of FETs In both cases the LS7262 is used FIGURE 4 FOUR PHASE OUTPUT DRIVER CIRCUITRY FIGURESA MOTOR SUPPLY FIGURE 4B COMMON COMMON BRAKE INPUT
5. LSI CS 0300 LS7260 LS7262 e j LSI Computer Systems Inc 1235 Walt Whitman Road Melville NV 11747 631 271 0400 FAX 631 271 0405 29 sy A3800 BRUSHLESS DC MOTOR COMMUTATOR CONTROLLER FEATURES Direct drive of P Channel and N Channel FETs LS7260 Direct drive of PNP and NPN transistors LS7262 Six outputs drive power switching bridge directly Open or closed loop motor speed control 5V to 28V operation Vss VDD Externally selectable input to output code for 60 120 240 or 300 electrical sensor spacing Three or four phase operation Analog Speed control Direction control Output Enable control Positive Static Braking Overcurrent Sensing LS7260 LS7262 DIP LS7260 S LS7262 S SOIC LS7260 TS LS7262 TS TSSOP See Connection Diag DESCRIPTION The LS7260 LS7262 are MOS integrated circuits de signed to generate the signals necessary to control a three phase or four phase brushless DC motor They are the basic building blocks of a brushless DC motor controller The circuits respond to changes at the SENSE inputs originating at the motor position sensors to provide electronic commutation of the motor wind ings Pulse Width Modulation of outputs for motor speed control is accomplished through either the ENABLE in put or through the Analog input V TRIP in conjunction with the OSCILLATOR input Overcurrent circuitry is provided to protect the windings associated drivers and power s
6. Vss VDD Any Input Voltage to Vss Vin Storage Temperature TSTG Operating Temperature TA DC ELECTRICAL CHARACTERISTICS All Voltages Referenced to VDD TA 25 C unless otherwise specified MIN SYMBOL Supply Voltage Vss Supply Current Outputs not loaded IDD Input Specifications BRAKE ENABLE CS1 CS2 RIN 1 S2 S3 FWD REV Voltage Logic 1 VIH Logic 0 VIL OVERCURRENT SENSE See Note Threshold Voltage VTH 7260 072503 2 Vss 2 0 25 The sawtooth waveform at the OSC input typically varies from 0 4Vss to Vss 2V The purpose of the VTRIP input in conjunction with the OSCILLATOR is to provide variable speed adjustment for the motor by means of PWM for Vss greater than 7V Below Vss 7V the IC may only be used as a commutator See Note Note Below Vss 7V the OSC sawtooth amplitude is too small to allow proper operation of the PWM circuitry OSCILLATOR Pin 14 An R and C connected to this input see Figure 6 provide the timing components for a sawtooth OSCILLATOR The signal generated is used in conjunction with VTRIP to pro vide PWM for variable speed applications and to reset the overcurrent condition OUTPUTS 1 2 3 Pins 2 3 4 For the LS7262 these open drain Outputs are enabled as shown in Table 2 and provide base current to PNP tran sistors or gate drive to P Channel FET drivers when COM MON is floating If COMMON is held at Vss these Outputs can provide drive to NPN transistors or N
7. any infringements of patent rights of others which may result from its use 7260 012703 6 cst 1 f gt COMMUTATION SEQUENCE CS2 20 SELECT LOGIC 8 V 1 INPUT DECODER FWD REV 19 gt s1 15 sl S2 16 3 17 i 2 BRAKE 9 V gt o LO POSITIVE V Ea t ENABLE 10 EDGE R Q DETECTOR ud cs OVERCURRENT 42 A HY SENSE POSITIVE EDGE DETECTOR A V TRIP 13 EM od 0 001pF tt i SAWTOOTH OSCILLATOR a NOTE With indicated components x rg oscillator frequency is approximately 30kHz OUTPUT ENCODER COMMON 5 2 6 gt ourpur PI DRIVERS 4 6 _ 7 I J 8 V 4 H1 Vss GND MB VDD FIGURE 6 LS7260 AND LS7262 BLOCK DIAGRAM 01 02 03 04 05 06 7260 101705 7
8. e pins are left open FORWARD REVERSE Pin 19 This input is used to select the proper sequence of Outputs for the desired direction of rotation for the Motor See Table 3 An internal pull up resistor holds the input high when left open SENSE INPUTS Pins 15 16 17 These inputs provide control of the output commutation sequence as shown in Table 3 51 S2 S3 originate in the posi tion sensors of the motor and must sequence in cycle code or der Hall Switch pull up resistors are provided at Pins 15 16 and 17 The positive supply of the Hall devices should be common to the chip Vss BRAKE Pin 9 For the LS7262 a high level at this input unconditionally turns Off Outputs 1 2 and 3 and turns On Outputs 4 5 and 6 See Fig 2 For the LS7260 a high level at this input turns On Out puts 1 2 and 3 and Outputs 4 5 and 6 See Fig 1 In both cases transistors Q101 Q102 and Q103 cut off and transistors Q104 Q105 and Q106 turn on shorting the windings together The BRAKE has priority over all other inputs BRAKE Pin 9 Cont d An internal pull down resistor holds the input low when left open Center tapped motor configuration requires a power supply disconnect transistor controlled by the BRAKE signal See Figure 2A ENABLE Pin 10 A high level at this input permits the output to sequence as in Table 3 while a low disables all external output drivers An internal pull up resistor holds the input high when left
9. ing it to VDD and the OSC input to Vss See description under VTRIP 7260 012703 3 Output Encoder TO OVERCURRENT ADJUSTMENT Fractional Ohm Resistor FIGURE 1 LS7260 THREE PHASE OUTPUT DRIVER CIRCUITRY R3 Output Encoder Q106 R9 TO OVERCURRENT ADJUSTMENT Fractional Ohm Resistor FIGURE 2 LS7262 THREE PHASE OUTPUT DRIVER CIRCUITRY 7260 012703 4 FIGURE 2A O5 LS7262 COMMON O6 SINGLE ENDED DRIVER CIRCUIT This configuration requires only one base current limiting resistor connected from the COMMON pin to Vss MOTOR SUPPLY F R FORWARD REVERSE LS7260 or LS7262 ENABLE Inputs from SG1731 or UC1637 FIGURE 3 PRECISION CONTROL BRUSHLESS DC MOTOR DRIVE For controlled acceleration and deceleration of motors in the forward or reverse
10. open Positive edges at this input will reset the overcurrent flip flop OVERCURRENT SENSE Pin 12 This input provides the user a way of protecting the motor winding drivers and power supply from an overload condi tion The user provides a fractional ohm resistor between the negative supply and the common emitters of the NPN drivers or common sources of N Channel FET drivers This point is connected to one end of a potentiometer e g 100k ohms the other end of which is connected to the positive supply The wiper pickoff is adjusted so that all outputs are disabled for currents greater than the limit The action of the input is to disable all external output drivers When BRAKE exists OVERCURRENT SENSE will be overridden The overcurrent circuitry latches the overcurrent condition The latch may be reset by the positive edge of either the saw tooth OSCILLATOR or the ENABLE input When using the ENABLE input as a chopped input the OSC input should be held at Vss When the ENABLE input is held high the OSC must be used to reset the overcurrent latch VTRIP Pin 13 This input is used in conjunction with the sawtooth OSC in put When the voltage level applied to VTRIP is more neg ative than the waveform at the OSC input the Outputs will be enabled as shown in Table 3 When VTRIP is more pos itive than the sawtooth OSCILLATOR waveform the external output drivers are disabled MAXIMUM RATINGS PARAMETER SYMBOL DC Supply Voltage
11. r supply drive on Q101 and Q105 Since Pin 5 is tied to Vss the gate of P channel Driver Q101 is brought to ground by R1 and the Gate of N Channel driver Q105 is brought to Vss by Q4 Other external output pairs turn on similarly and the com mutation sequence is identical to that of the LS7262 Table 3 Table 2 indicates the minimum value of R1 R2 R3 R4 R5 R6 needed as a function of output drive voltage for Fig 1 TABLE 2 For Power Supply 5V 28V R1 k ohms Output Voltage SEQUENCE FOR THREE PHASE OPERATION FWD REV 1 FWD REV 0 1 OUTPUTS DRIVERS ENABLED A B C O2 O4 Off O2 O6 Off 2 O1 O6 Off O1 O5 4 O3 O5 Off 03 O4 E OUTPUTS DRIVERS ENABLED A B C 01 05 Off 03 05 Off 03 O4 Off O2 04 i Off O2 O6 Of O1 O6 Of Off ALL DISABLED ALL DISABLED ALL DISABLED 1 0 1 ALL DISABLED 0 The OVERCURRENT input BRAKE low enables external output drivers in normal sequence when more negative than Vss 2 and disables all external output drivers when more positive than Vss 2 The OVERCURRENT is sensed continuously and sets a flip flop which is reset by the rising edge of the ENABLE input or the sawtooth OSCILLATOR See description under OVERCURRENT SENSE The VTRIP Input BRAKE low enables the outputs in normal sequence when more negative than the OSC input and disables all outputs when more positive than the OSC input The VTRIP input may be disabled by connect
12. upply The overcurrent circuitry causes the ex ternal output drivers to switch off immediately upon sensing the overcurrent condition and on again only when the overcurrent condition disappears and the pos itive edge of either the ENABLE input or the sawtooth OSCILLATOR occurs This limits the overcurrent sense cycling to the chopping rate of the ENABLE input or the sawtooth OSCILLATOR A positive braking feature is provided to effect rapid de celeration While the LS7262 is designed for driving NPN and PNP transistors See Fig 2 the LS7260 is designed to drive both NMOS and PMOS Power FETs and develops a full 12V drive for both the N Channel and P Channel devices See Fig 1 when using a 12V power supply 7260 101705 1 October 2005 CONNECTION DIAGRAM TOP VIEW CS1 CS2 OUT 1 FWD REV OUT 2 vob V OUT 3 S3 COMMON S2 OUT 4 S1 OUT 5 OSCILLATOR OUT 6 V TRIP BRAKE OVERCURRENT SEN ENABLE Vss V INPUT OUTPUT DESCRIPTION COMMUTATION SELECTS Pins 1 20 These inputs are used to select the proper sequence of outputs based on the electrical separation of the motor position sensors See Table 3 Note that in all cases the external output drivers are disabled for invalid SENSE input codes Internal pull down resistors are provided at Pins 1 and 20 causing a logic zero when thes
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