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Computer-Based Instruments NI 5401 User Manual

1. eeees EN 55011 Class A at 10m FCC Part 15A above 1 GHz Electrical immunity Evaluated to EN 61326 1 1997 A1 1998 Table 1 3 Note For full EMC and EMI compliance you must operate this device with shielded cabling See the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product click Declaration of Conformity at ni com hardref nsf This website lists the DoCs by product family Select the appropriate product family followed by your product and a link to the DoC in Adobe Acrobat format appears Click the Acrobat icon to download or read the DoC National Instruments Corporation A 5 NI 5401 User Manual Optional Accessories Cabling National Instruments offers a variety of products to use with your NI 5401 including probes cables and other accessories e Shielded and unshielded I O connector blocks SCB 68 TBX 68 CB 68 e 16 MB memory module optional e RTSI bus cables For more specific information about these products refer to your National Instruments catalogue or web site or call the office nearest you The following list gives recommended part numbers for cables that you can use with your NI 5401 device Table B 1 National Instruments Optional Cable Accessories Product Cable Name Part Number Cable Description AT and PCI 5401 SMB 110 763405 01 50 Q SMB male to BNC
2. f2 AT2 f4 AT4 NI 5401 User Manual Figure 2 6 Continuous Trigger Mode 2 6 ni com Chapter 2 Function Generator Operation Stepped Trigger Mode After a start trigger is received the waveform defined by the first stage is generated Then the device waits for the next trigger signal On the next trigger the waveform described by the second stage is generated and so on Once the staging list is exhausted the waveform generation returns to the first stage and continues in a cyclic fashion Figure 2 7 illustrates a stepped trigger mode of operation Switching from stage to stage is phase continuous In this mode the time instruction is not used The trigger paces the waveform generation from one frequency to the other Start Trigger Start Trigger Start Trigger Start Trigger Start Trigger MP Uf Cuv lt gt Dd pi H f2 3 End of All d Figure 2 7 Stepped Trigger Mode Analog Output Analog waveforms are generated as follows 1 The 12 bit digital waveform data is fed to a high speed DAC 2 Alowpass filter filters the DAC output 3 This filtered signal is amplified before it goes to a 10 dB attenuator 3 Note The DAC output can be fine tuned for gain and offset Since the offset is adjusted before the main attenuators and amplifier it is referred to as pre attenuation offset This fine tuning of gain and offset is performed by separate DACs 4 The output from the 10 dB
3. a digital device that stores digital data based on a control signal the calibration DAC used to change the voltage levels to another device linking different buffers stored in the waveform memory repeating the same buffer in the waveform memory This method of waveform generation decreases memory requirements a circuit used to smooth the waveform output and removed unwanted high frequency contents form the signal NI 5401 User Manual Glossary master slave MB noise 0 output enable relay P passband PCI PCLK peak to peak NI 5401 User Manual meters 1 Mega the standard metric prefix for 1 million or 10 when used with units of measure such as volts and hertz 2 mega the prefix for 1 048 576 or 220 when used with B to quantify data or computer memory locking the NI 5401 clock in frequency to an external phase locking reference clock source megabytes of memory an undesirable electrical signal Noise comes from external sources such as the AC power line motors generators transformers fluorescent lights soldering irons CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive a relay switch at the output of the NI 5401 that can enable the waveform generation at any time or that can connect the output to ground the range of frequencies which a devi
4. including documentation is included with NI FGEN and is also available online at ni com support calibrat Contact National Instruments for more information National Instruments Corporation 2 15 NI 5401 User Manual Specifications Analog Output Voltage Output This appendix lists the specifications for the NI 5401 These specifications are typical at 25 C unless otherwise stated The operating temperature range is 0 to 50 C Number of channels 1 Resolution uice ettet 12 bits Maximum update rate 40 MHz DDS accumulator sss 32 bits Frequency range Sine NE 16 MHz max SYNC TTL iet 16 MHz max Square aea ves 1 MHz max Ramp 1 MHz max Triangle ees 1 MHz max Frequency resolution 9 31 mHz R n 888 ere erae EE IR UR 5 V into a 50 Q load 10 V into a high impedance load PN CCULACY Sas cose eer e eee FEE etre E 0 1 dB Output attenuation esee 0 to 73 dB Resolution eene 0 001 dB steps National Instruments Corporation A 1 NI 5401 User Manual Appendix A Specifications Pre attenuation offset Range aonn 2 5 V into 50 Q ACCULACY aderat 5 mV Output coupling eeeeeene DC Output impedance sss 50 Q or 75 Q software selectable Load impedance sss 50 Q or greater Output enable see
5. 50 pin cable connector 1 7 SYNC connector 1 4 to 1 5 features 1 1 PLL architecture figures 2 11 to 2 12 power up and reset conditions 1 16 safety information 1 2 software options 1 9 to 1 11 NI Developer Zone D 1 NI FGEN instrument driver 1 10 0 operational mode specifications A 3 optional accessories B 1 to B 2 output attenuation 2 9 to 2 10 P Pattern Out connector 1 6 pin assignments figure 1 6 signal descriptions table 1 7 ni com phase locked loop PLL Ref connector 1 5 phase locked loops and board synchronization 2 11 to 2 12 pin assignments figure Pattern Out connector 1 6 SHC50 68 50 pin cable connector 1 8 PLL Ref connector 1 5 power up and reset conditions 1 16 R reset conditions 1 16 RTSI trigger specifications A 3 RTSI PXI trigger lines 2 13 to 2 15 S safety information 1 2 safety specifications A 4 SHC50 68 50 pin cable connector 1 7 pin assignments figure 1 8 signals 1 7 signal connections See I O connectors sine spectral purity A 2 single trigger mode 2 5 to 2 6 soft front panels See sources soft front panel software options 1 9 to 1 11 ComponentWorks 1 11 interactive sources soft front panel 1 9 LabVIEW 1 10 LabWindows CVI 1 11 NI FGEN instrument driver 1 10 sources soft front panel 1 9 Waveform Editor 1 9 sources soft front panel See also Waveform Editor DDS output mode figure 1 12 General Settings dialog box figure 1 13 gen
6. FIFO permits faster update rates because the waveform data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device digital or analog circuits that change the frequency characteristics of a waveform change from one frequency to another the smallest frequency change that can be generated by a NI 5401 change the frequency of a waveform in a controlled manner the factor by which a signal is amplified sometimes expressed in decibels graphical user interface the physical components of a computer system such as the circuit boards plug in boards chassis enclosures peripherals cables and so on high impedance hertz the number of cycles or repetitions per second G 4 ni com I O IFIFO instruction FIFO K kS Kword L latch level DAC linking looping lowpass filter National Instruments Corporation G 5 Glossary input output the transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces instruction FIFO the FIFO that stores the waveform generation staging list kilo the standard metric prefix for 1 000 or 10 used with units of measure such as volts hertz and meters kilo the prefix for 1 024 or 2 used with B in quantifying data or computer memory 1 000 samples 1 024 words of memory
7. On the NI 5401 the maximum frequency of a sine wave you can generate reliably is limited to 16 MHz Other waveforms such as square or triangular waves are limited to 1 MHz National Instruments Corporation C 1 NI 5401 User Manual Appendix C Frequency Resolution and Lookup Memory You can also synthesize arbitrary waveforms using DDS Generating arbitrary waveforms this way will be very limited you are restricted to a single buffer and this buffer should be exactly equal to the size of the lookup memory 16 384 samples To update every sample of an arbitrary waveform in lookup memory at the maximum clock rate of 40 MHz the software writes an FCW value of 20 D where N is the size of the accumulator and L is the number of address bits of lookup memory L 14 bits Thus the FCW value for the NI 5401 equals 262 144 Since FCW QN E F Fa 20D E 2N so you would write a frequency value of 202 19 x 40 x 106 232 which equals 2 441 kHz If you want to update every sample in lookup memory at an integral subdivision D of the maximum clock rate then you want an FCW value of 20N L P D Tn other words for an effective update rate of every sample at half the maximum clock rate write a frequency value of 202 M2 D x 40 x 109 232 which equals 1 221 kHz NI 5401 User Manual C 2 ni com Technical Support Resources Web Support National Instruments Web support is your first stop for help in solving instal
8. User Manual You use triggering to start and step through a waveform generation The trigger sources and modes of operation are explained in the following sections Trigger sources are software selectable By default the software produces the trigger sources You can also use an external trigger from a pin on the digital I O connector the RTSI trigger lines on the RTSI bus or the TTL trigger lines on the PXI trigger bus on the backplane Figure 2 4 shows the trigger sources for the NI 5401 2 4 ni com Chapter 2 Function Generator Operation de RTSI PXI Trigger 2 Lines lt 0 6 gt 7 77 y LT oc RTSI PXI Trigger External Trigger Start Trigger Software Trigger Trigger Select Figure 2 4 Waveform Generation Trigger Sources If you need to automatically trigger the waveform generation use software to generate the triggers A rising TTL edge is required for external triggering For more information on triggering over RTSI lines see the RTSI PXI Trigger Lines section later in this chapter Modes of Operation The NI 5401 has three triggering modes single continuous and stepped described in the following sections Single Trigger Mode The waveform you define in the staging list is generated only once by going through the entire staging list Only one trigger is required to start the waveform generation In single trigger mode after the NI 5401 recei
9. e Output attenuation levels from 0 to 73 dB e Phase locked loop PLL synchronization to external clocks e Sampling rate of 40 MS s e Digital and analog filter e 32 bit direct digital synthesis DDS for standard function generation e External trigger input e Real Time System Integration RTSI and PXI triggers All NI 5401 devices follow industry standard Plug and Play specifications on both buses and offer seamless integration with compliant systems Detailed specifications for the NI 5401 are in Appendix A Specifications National Instruments Corporation 1 1 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 Safety Information A AN Warning To meet EMC EMI cooling and safety compliance requirements the NI 5401 device must be installed in a chassis with the covers and chassis filler panels properly installed Cautions Do not operate the device in an explosive atmosphere or where there may be flammable gases or fumes Do not operate damaged equipment The safety protection features built into this device can become impaired if the device becomes damaged in any way If the device is damaged turn the device off and do not use it until service trained personnel can check its safety If necessary return the device to National Instruments for service and repair to ensure that its safety is not compromised Do not operate this equipment in a manner that contradicts the information specified in thi
10. very fine frequency resolution function generation You can generate sine waves of up to 16 MHz with the NI 5401 Waveform generation always loops back to the beginning of the lookup memory after passing through the end of the lookup memory National Instruments Corporation 2 3 NI 5401 User Manual Chapter 2 Function Generator Operation The NI 5401 uses a lookup waveform memory for storing the waveform buffer and FIFO memory for storing the staging list which contains multiple frequency list information This FIFO is referred to as an instruction FIFO Each stage is made up of two instructions the frequency which specifies the frequency of the waveform to be generated and the time which specifies the time for which the frequency is to be generated ER Note You cannot specify the number of iterations for a waveform to be generated Frequency Hopping and Sweeping You can define a staging list for performing frequency hops and sweeps The entire staging list uses the same buffer loaded into the lookup memory All stages differ in the frequency to be generated B Note The minimum time that a frequency should be generated is 3 us Therefore the maximum hop rate from frequency to frequency is 333 kHz Triggering The maximum number of stages that can be stored in the instruction FIFO for DDS mode is 512 For more information on the waveform generation process refer to your software documentation Trigger Sources NI 5401
11. 0 V B Note You can change the output impedance at any time during waveform generation When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 ms Output Enable You can switch off the waveform generation at the output connector by controlling the output enable relay as shown in Figure 2 8 When the output enable relay is off the output signal level goes to ground level 3 Note Even though the output enable relay is in the off position the waveform generation process continues internally on the NI 5401 You can use this feature to disconnect and connect different devices to the NI 5401 on the fly hy Note You can change the output enable state at any time during waveform generation When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 ms NI 5401 User Manual 2 10 ni com Chapter 2 Function Generator Operation Phase Locked Loops and Board Synchronization Figure 2 11 illustrates the block diagram for the NI 5401 for PCI PLL circuit Figure 2 12 illustrates the block diagram for the NI 5401 for PXI PLL circuit The PLL consists of a voltage controlled crystal oscillator VCXO with a tuning range of 100 ppm This VCXO generates the main clock of 80 MHz The PLL can lock to a reference clock source from the external connector from an RTSI Osc line on the RTSI bus NI 5401 for PCD or fr
12. 2 9 to 2 10 output enable 2 10 output impedance 2 10 SYNC output and duty cycle 2 9 block diagram 2 1 calibration 2 15 direct digital synthesis DDS 2 3 to 2 4 NI 5401 User Manual Index frequency hopping and sweeping 2 4 phase locked loops and board synchronization 2 11 to 2 12 RTSI PXI trigger lines 2 13 to 2 15 triggering 2 4 to 2 7 continuous trigger mode 2 6 single trigger mode 2 5 to 2 6 stepped trigger mode 2 7 trigger sources 2 4 to 2 5 waveform generation 2 2 to 2 3 l impedance output 2 10 instruction FIFO 2 4 interactive sources soft front panel See sources soft front panel internal clock specifications A 4 T O connectors 1 3 to 1 8 ARB connector 1 4 T O connectors on front panel figure 1 3 NI 5401 I O connectors figure 1 3 Pattern Out connector 1 6 pin assignments figure 1 6 signal descriptions table 1 7 PLL Ref connector 1 5 SHC50 68 50 pin cable connector 1 7 pin assignments figure 1 8 signals 1 7 SYNC connector 1 4 to 1 5 L LabVIEW software 1 10 LabWindows CVI software 1 11 lookup memory description 2 3 frequency resolution and lookup memory C 1 to C 2 waveform memory 2 4 NI 5401 User Manual l 2 mechanical specifications A 4 NI 5401 See also function generator operation block diagram 2 1 components 2 2 connecting signals 1 3 to 1 8 ARB connector 1 4 I O connectors figure 1 3 Pattern Out connector 1 6 PLL Ref connector 1 5 SHC50 68
13. 8 screw terminals for easily connecting to 68 pin DAQ devices Table B 3 Third Party Vendor Optional Cable Accessories Product Vendor Part Number Cable Type NI 5401 ITT Pomona Electronics BNC C xx BNC male to BNC male 50 cable 2249 E xx BNC male to BNC male 75 Q cable 5319 BNC female to RCA phono plug adapter 4119 50 BNC 50 Q feed through terminator adapter 3283 BNC female female adapter NI 5401 User Manual B 2 ni com Frequency Resolution and Lookup Memory For DDS based waveform generation you must first load one cycle of the desired waveform into the lookup memory The size of the DDS lookup memory is 16 384 samples Each sample is 16 bits wide hy Note One cycle of the waveform buffer loaded into the memory should be exactly equal to the size of the DDS lookup memory F update clock for the accumulator For the NI 5401 F 40 MHz F desired frequency of the output signal N accumulator size in bits For the NI 5401 N 32 FCW frequency control word to be loaded into the accumulator to generate F The frequency control word is calculated using the formula FCW 2N F F The frequency resolution is then given by frequency resolution F 2N 40 x 10 23 9 31322 mHz For example if you need to generate a frequency of 10 MHz then the FCW is 232 10E6 40E6 which equals 1 073 741 824 If you need to generate a frequency of 1 Hz then the FCW is 232 1 40E6 which equals 107 3 Note
14. ARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Compliance FCC Canada Radio Frequency Interference Compliance Determining
15. Computer Based Instruments NI 5401 User Manual PXI PCI Arbitrary Function Generator Wy NATIONAL May 2001 Edition gt INSTRUMENTS Part Number 322419B 01 Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 794 0100 Worldwide Offices Australia 03 9879 5166 Austria 0662 45 79 90 0 Belgium 02 757 00 20 Brazil 011 284 5011 Canada Calgary 403 274 9391 Canada Ottawa 613 233 5949 Canada Qu bec 514 694 8521 Canada Toronto 905 785 0085 China Shanghai 021 6555 7838 China ShenZhen 0755 3904939 Denmark 45 76 26 00 Finland 09 725 725 11 France 01 48 14 24 24 Germany 089 741 31 30 Greece 30 1 42 96 427 Hong Kong 2645 3186 India 91805275406 Israel 03 6120092 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Malaysia 603 9596711 Mexico 5 280 7625 Netherlands 0348 433466 New Zealand 09 914 0488 Norway 32 27 73 00 Poland 0 22 528 94 06 Portugal 351 1 726 9011 Singapore 2265886 Spain 91 640 0085 Sweden 08 587 895 00 Switzerland 056 200 51 51 Taiwan 02 2528 7227 United Kingdom 01635 523545 For further support information see the Technical Support Resources appendix To comment on the documentation send e mail to techpubs ni com Copyright 1999 2001 National Instruments Corporation All rights reserved Important Information Warranty The NI 5401 is warranted agai
16. Digital Filter Enable Div2 lq 80 MHz Oscillator Figure 2 2 Waveform Data Path Block Diagram NI 5401 User Manual 2 2 ni com Chapter 2 Function Generator Operation On the NI 5401 the high speed DAC is always updated at 80 MHz but the update clock for memory is 40 MHz Direct Digital Synthesis DDS Direct digital synthesis DDS is a technique for deriving under digital control an analog frequency source from a single reference clock frequency This technique produces high frequency accuracy and resolution temperature stability wideband tuning and rapid and phase continuous frequency switching The NI 5401 uses a 32 bit high speed accumulator with a lookup memory and a 12 bit DAC for DDS based waveform generation Figure 2 3 shows the building blocks for DDS based waveform generation Frequency DDS 14 ree Data Out 16 MEE ad Time Sequencer A Frequency i 16 Bit ane Counter 1 Div le 80 MHz Oscillator Instruction FIFO Figure 2 3 DDS Building Blocks The lookup memory is dedicated to the DDS You can store one cycle of a repetitive waveform a sine triangular square or arbitrary wave in the lookup memory Then you can change the frequency of that waveform by sending just one instruction You can use DDS mode for
17. FCC Class The Federal Communications Commission FCC has rules to protect wireless communications from interference The FCC places digital electronics into two classes These classes are known as Class A for use in industrial commercial locations only or Class B for use in residential or commercial locations Depending on where it is operated this product could be subject to restrictions in the FCC rules In Canada the Department of Communications DOC of Industry Canada regulates wireless interference in much the same way Digital electronics emit weak signals during normal operation that can affect radio television or other wireless products By examining the product you purchased you can determine the FCC Class and therefore which of the two FCC DOC Warnings apply in the following sections Some products may not be labeled at all for FCC if so the reader should then assume these are Class A devices FCC Class A products only display a simple warning statement of one paragraph in length regarding interference and undesired operation Most of our products are FCC Class A The FCC rules have restrictions regarding the locations where FCC Class A products can be operated FCC Class B products display either a FCC ID code starting with the letters EXN Trade Name Model Number or the FCC Class B compliance mark that appears as shown here on the right FE Tested to Comply with FCC Standards Consult the FCC web site http www fcc
18. ND RFU DGND 42 mN ci 49 48 47 46 45 44 19 43 18 2 2 m m m nm nm N OO O O PP oa 41 16 40 39 38 37 36 35 34 co 2 i 2iziziziziz o 2 m o n2 o o m jco 2jo o J io EXT TRIG NC NC NC NC NC NC RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU Figure 1 4 NI 5401 50 Pin Digital Connector Pin Assignments 1 6 ni com Chapter 1 Generating Functions with the NI 5401 Signal Descriptions Table 1 1 shows the pin names and signal descriptions used on the NI 5401 digital output connector Table 1 1 Digital Connector Signal Descriptions Signal Name Type Description DGND Digital ground EXT TRIG Input External trigger The external trigger input signal isa TTL level signal that you can use to start or step through a waveform generation For more information on trigger sources and trigger mode see Chapter 2 Function Generator Operation NC Not connected RFU Reserved for future use Do not connect signals to this pin SHC50 68 50 Pin Cable Connector You can use an optional SHC50 68 50 pin to 68 pin cable for external trigger input The cable connects to the digital connector on the NI 5401 Figure 1 5 shows the 68 pin connector pin assignments on the SHC50 68 cable ER Note The SHC50 68 connector uses the same signa
19. and a DAC a method of waveform generation that uses built in DDS functionality to generate very high frequency resolution standard waveforms digital ground signal See word software that controls a specific hardware device the ratio of the largest signal level a circuit can handle to the smallest signal level it can handle usually taken to be the noise level normally expressed in dB electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed a voltage pulse from an external source that triggers an event such as A D conversion external trigger input signal NI 5401 User Manual Glossary FIFO filters frequency hop frequency resolution frequency sweep G gain GUI H hardware HiZ NI 5401 User Manual first in first out memory buffer the first data stored is the first data sent to the acceptor FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be retrieved or output For example an analog input FIFO stores the results of A D conversions until the data can be retrieved into system memory a process that requires the servicing of interrupts and often the programming of the DMA controller This process can take several milliseconds in some cases During this time data accumulates in the FIFO for future retrieval With a larger FIFO longer latencies can be tolerated In the case of analog output a
20. attenuator then goes to the main amplifier which can provide up to 5 V levels into 50 Q An output relay can switch between ground level and the main amplifier Refer to the Output Enable section in this chapter for additional information about this relay 5 The output of this relay goes to a series of passive attenuators National Instruments Corporation 2 7 NI 5401 User Manual Chapter 2 Function Generator Operation 6 The output of the attenuators goes through a selectable output impedance of 50 or 75 Q to the I O connector Figure 2 8 shows the essential block diagram of analog waveform generation Lowpass 10 dB Attenuators Filter Attenuator 63 dB in 1 dB steps Output o 28S Main Amp Dar SS 50 0 75 Q Selector Comparator SYNC 500 Level I gt e DAC Figure 2 8 Analog Output and SYNC Out Block Diagram Figure 2 9 shows the timing relationships of the trigger input and waveform output T4 is the pulse width on the trigger signal Taz is the time delay from trigger to output on Arb output Refer to Appendix A Specifications for more information on these timing parameters Trigger Input Signal Slope Positive TTL PRE Waveform Output lt id 5 Vy into 50 Q Figure 2 9 Waveform and Trigger Timings 3 Note You can switch off the analog lowpass filter at any time during waveform ge
21. be terere aod 2 7 SYNC Output and Duty Cycles siisii a 2 9 Output Attenuation sc cei creer Ee SER ERR Ee edad ee end 2 9 Output Impedance 2 eame e e ipe teret 2 10 Output Enable ed Retrieve whe es dq eis 2 10 Phase Locked Loops and Board Synchronization eee 2 11 Analog Filter COrtection tei a tp etn en No HO UY ERR denis 2 12 RTSUPXI Trigger Lanes te iode o dio tec ai E HR tes 2 13 Calibr tion o i qc ea d E eres ast Pee e e E Rei ioo e round 2 15 Appendix A Specifications Appendix B Optional Accessories Appendix C Frequency Resolution and Lookup Memory Appendix D Technical Support Resources Glossary Index NI 5401 User Manual viii ni com Generating Functions with the NI 5401 The NI 5401 User Manual describes the features functions and operation of the NI 5401 arbitrary function generator This device performs comparably to standalone instruments while providing the flexibility of computer based operation About Your NI 5401 Thank you for buying an NI 5401 arbitrary function generator The NI 5401 family consists of two different devices e NI 5401 for PCI e NI 5401 for PXI Your NI 5401 device has the following features e One 12 bit resolution output channel e Up to 16 MHz sine and transistor transistor logic TTL waveform output e Upto 1 MHz square triangle ramp up and ramp down DC and noise e Software selectable output impedances of 50 Q and 75 Q
22. ce can properly propagate or measure Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 Mbytes s digital pattern clock output a measure of signal amplitude the difference between the highest and lowest excursions of the signal G 6 ni com pipeline PLL PLL Ref Plug and Play devices ppm pre attenuation offset protocol PXI R resolution RTSI bus S sampling rate National Instruments Corporation G 7 Glossary a high performance processor structure in which the completion of an instruction is broken into its elements so that several elements can be processed simultaneously from different instructions phase locked loop a circuit that synthesizes a signal whose frequency is exactly proportional to the frequency of a reference signal a PLL input that accepts an external reference clock signal and phase locks to it the NI 5401 internal clock devices that do not require dip switches or jumpers to configure resources on the devices also called switchless devices parts per million an offset provided to the signal before it reaches the attenuators the exact sequence of bits characters and control codes used to transfer data between computers and peripherals through a communications c
23. ces Soft Front Panel operates on your PC it provides additional processing storage and display capabilities The Sources Soft Front Panel loads and saves waveform data in a form that popular spreadsheet programs and word processors can use You can print the waveforms and the settings of the Sources Soft Front Panel to a printer connected to the PC Single Waveform Output from DDS Memory The Sources Soft Front Panel transforms your PC into a fully featured function generator by using the DDS capabilities of your NI 5401 In this operation mode you can generate a variety of waveforms including seven standard waveforms sine square triangle rising ramp falling ramp dc voltage level and random noise pattern Using the Sources Soft Front Panel you load waveforms from a file and generate them repeatedly You can generate these waveforms with a resolution of approximately 10 mHz Waveform Editor You use the Waveform Editor to create sketch and edit complex waveforms that the Sources Soft Front Panel player can then generate A library of standard waveforms for creating complex waveforms is included and you can also write equations to create arbitrary waveforms and view the waveforms in a time or frequency domain National Instruments Corporation 1 9 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 NI FGEN Instrument Driver To create your application you need an industry standard software driver such a
24. d the time for which that frequency has to be generated a buffer that contains linking and looping information for multiple waveforms also known as a sequence list or waveform sequence a mode of waveform generation used when you want a trigger to advance the waveforms specified by the stages in the staging list TTL version of the sine waveform output signal generated by the NI 5401 any event that causes or starts some form of data capture transistor transistor logic the rate at which a DAC is updated G 8 ni com V V VCXO VHDSCSI W waveform waveform buffer waveform linking and looping waveform memory waveform segment waveform sequence waveform staging word National Instruments Corporation G 9 Glossary volts voltage controlled crystal oscillator very high density SCSI multiple voltage readings taken at a specific sampling rate the collection of 16 bit data samples stored in the waveform memory that represent a desired waveform Also known as a waveform segment See linking looping physical data storage on the NI 5401 for storing the waveform data samples See waveform buffer See staging list See linking looping The standard number of bits that a processor or memory manipulates at one time Microprocessors typically use 8 16 or 32 bit words NI 5401 User Manual Index A analog filter correction 2 12 analog output 2 7 to 2 10 analog output and SYNC out block d
25. e NI 5401 specific information to other boards that have RTSI connectors Figure 2 14 shows the RTSI trigger lines and routing of NI 5401 for PCI signals to the RTSI switch SYNC e y Start Trigger JJ BIER RTSI 2 RTSI RTSI 3 3 RTSI Trigger 4 3j Switch RTSI 4 T a Board Clock ELI x RTSI 6 Master Slave RTSI Osc 4 RTSI Clock Figure 2 14 RTSI Trigger Lines and Routing for the NI 5401 for PCI National Instruments Corporation 2 13 NI 5401 User Manual Chapter 2 Function Generator Operation Figure 2 15 shows the PXI trigger lines and routing of NI 5401 for PXI signals to the RTSI switch x SYNC Start Trigger RTSI RTSI Trigger Switch PXI Bus BOARD_SYNC PXI STAR PXI 10MHz Osc lt ay Figure 2 15 PXI Trigger Lines 10 MHz Backplane Oscillator and Routing for the NI 5401 for PXI The NI 5401 can receive a hardware trigger from another board as an RTSI trigger signal on any of the RTSI PXI trigger lines You can also route signals as follows e Route the Start Trigger signal generated on the NI 5401 to other boards through any of the RTSI PXI bus trigger lines e Route the SYNC output generated on the NI 5401 to other boards through any of the RTSI PXI bus trigger lines You can use this signal to give other boards an accurate and fine frequency resolution clock NI 5401 for PCI F
26. erating standard functions 1 12 to 1 14 National Instruments Corporation I 3 Index overview 1 9 single waveform output from DDS memory 1 9 Update Clock Settings dialog box figure 1 13 Waveform Import dialogs figure 1 14 specifications A 1 to A 5 analog output A 1 bus interface A 3 electromagnetic compatibility A 5 external clock reference input A 4 filter characteristics A 2 internal clock A 4 mechanical A 4 operational modes A 3 safety A 4 sine spectral purity A 2 SYNC out A 4 timing I O A 3 triggers A 3 voltage output A 1 to A 2 waveform A 3 staging list 2 4 stepped trigger mode 2 7 SYNC connector 1 4 to 1 5 SYNC output description 2 9 duty cycle 2 9 specifications A 4 system integration by National Instruments D 1 T technical support resources D 1 to D 2 time in direct digital synthesis 2 4 timing I O specifications A 3 trigger specifications digital trigger A 3 RTSI A 3 NI 5401 User Manual Index triggering 2 4 to 2 7 continuous trigger mode 2 6 single trigger mode 2 5 to 2 6 stepped trigger mode 2 7 trigger sources 2 4 to 2 5 V voltage output specifications A 1 to A 2 W Waveform Editor creating custom waveforms 1 15 description 1 9 NI 5401 User Manual waveform generation See also function generator operation analog waveforms 2 7 to 2 10 data path block diagram figure 2 2 overview 2 2 to 2 3 using sources soft front panel gen
27. erating standard functions 1 12 to 1 14 single waveform output from DDS memory 1 9 using Waveform Editor 1 15 waveform memory lookup 2 4 waveform specifications A 3 Web support from National Instruments D 1 Worldwide technical support D 2 ni com
28. f at least 1 Vy y J Caution Do not increase the voltage level of the clock signal at the PLL reference input connector by more than the specified limit 5 Vy y 3 Note If two or more NI 5401 devices are locked to each other using the same reference clock they are frequency locked but the phase relationship is indeterminate Analog Filter Correction NI 5401 User Manual The NI 5401 can correct for slight deviations in the flatness of the frequency characteristic of the analog lowpass filter in its passband as shown in Figure 2 13 Curve A shows a typical lowpass filter curve The response of the filter is stored in an onboard EEPROM in 1 MHz increments up to 16 MHz Curve C is the correction applied to the frequency response The resulting Curve B is a flat response over the entire passband If you want to generate a sine wave at a particular frequency with filter correction applied you have to specify that frequency through your software 2 12 ni com Chapter 2 Function Generator Operation Gain dB Frequency MHz A Typical Analog Filter Characteristics B Corrected Filter Characteristics C Correction Applied Figure 2 13 Analog Filter Correction hy Note You can change the filter frequency correction at any time during waveform generation RTSI PXI Trigger Lines The NI 5401 for PCI contains seven trigger lines and one RTSI clock line available over the RTSI bus to send and receiv
29. file contains more than 16 384 samples specify a subset of the waveform pattern Delimiter m Select Subset Column J 2 Start Line J 5 T No Samples IV Maximum dynamic range of DAC Select File Saving Format Select Channel Bits Sample 16 bit J d C Left Select Subset Endian Little J r Select Subset is ap ro x Start o oo amp sec DE End 0 743 amp Channel Eng 15364 1 y Sec File Info File Info Number of Samples 44749 Number of Samples 500000 Bits per Sample 8 IV Maximum dynamic range of DAC Finish Cancel Finish Cancel Finish Cancel NI 5401 User Manual Figure 1 9 Waveform Import Dialogs Click Finish to download the waveform to onboard memory and return to the screen shown in Figure 1 6 Click User Specified Waveform to use your downloaded pattern source for the waveform Click Run to begin generating the waveform 1 14 ni com Waveform Editor Chapter 1 Generating Functions with the NI 5401 You can use the Waveform Editor shown in Figure 1 10 to create a custom waveform To launch the Waveform Editor select Start Programs National Instruments FGEN Waveform Editor You can select waveforms from the function library write equations or draw them manually Each segment can have more than one wa
30. g text applies only to a specific product a specific operating system or a specific software version This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash This icon denotes a warning which advises you of precautions to take to avoid being electrically shocked Bold text denotes items that you must select or click on in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Text in this font denotes text or characters that you should enter from the keyboard This font is also used for the proper names of functions variables and filenames and extensions Contents Chapter 1 Generating Functions with the NI 5401 About Your ND9S40T ie tete retro nee eee teeth 1 1 Safety Information s t eH ee RR ev edite ae he ested 1 2 Connecting SIgnals ie ttt D ER egeta Deed rS 1 3 ARB Conect eroi E n rete e ERN dead Re He AM iene 1 4 N ev exeun 1 4 PLE Ref ConrictOrt nete reete erp ene EUR eR E Pe e Ree tens ER 1 5 Pattern Out Connector PCI Only eese 1 6 Connector Pin Assignments eseseeseeeeeeeeeenen emen 1 6 Signal Descriptions aec ette tee tct e tee 1 7 SHC50 68 50 Pin Cable Connector eene 1 7 Sof
31. gov for more information FCC DOC Warnings This equipment generates and uses radio frequency energy and if not installed and used in strict accordance with the instructions in this manual and the CE Mark Declaration of Conformity may cause interference to radio and television reception Classification requirements are the same for the Federal Communications Commission FCC and the Canadian Department of Communications DOC FOR HOME OR OFFICE USE Changes or modifications not expressly approved by National Instruments could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Canadian Department of Communications This Class A digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulation
32. gy ComponentWorks controls are easy to configure using property sheets and are easy to control with your programs using high level properties and methods ComponentWorks features instrumentation based graphical user interface GUI tools including graphs meters gauges knobs dials and switches E Note Use the NI FGEN instrument driver to program and control your NI 5401 using ComponentWorks National Instruments Corporation 1 11 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 Using the Sources Soft Front Panel to Generate Waveforms You use the Sources Soft Front Panel to interactively control your NI 5401 just as you would a desktop function generator Generating Standard Functions If you need to generate standard waveforms such as a sine square ramp or DC signal you can use the Sources Soft Front Panel in the operation mode as shown in Figure 1 6 Launch the front panel from the task menu You use this front panel to control the frequency amplitude offset and type of waveform generated For the NI5401 the maximum sine frequency you can generate is 16 MHz The maximum amplitude is 5 V into a 50 Q load National Instruments Sources File Edit Utility Window Help NATIONAL HI 5401 for PCI Frequency zl INSTRUMENTS 16 000 MHz Trigger Auto Mode Function Generator Source immediately x 16 000 MHz Type Continuous Variable value Unit ACTIVE WAVEFORM Freq
33. hanged from its previous setting e Output impedance remains unchanged from its previous setting When you reset the board using NI FGEN or any other application software your NI 5401 is in the same state as shown at power up previously listed with the following differences e Output attenuation is set to 0 dB e The analog filter is enabled Output impedance is set to 50 Q e The PLL reference source is set to internal tuning e The SYNC duty cycle is set to 50 1 16 ni com Function Generator Operation This chapter describes how to use your NI 5401 Figure 2 1 shows the NI 5401 block diagram RTSI PXI Trigger Bus lt gt y A Data Path v Interface Bus RH A DDS lt Instruction reali FIFOs p Memory 4 Y y Digital IFIFO RTSI Filter Control Control x XH Clck Waveform DDS Attenuators 3 i o Controls Sequencer Control 2 DAC aner Filter Trigger Analog A A d Controls Control Control l Y SYNC eve gt Crossing Detector PLL and lt c Clocking T PXI PCI Channel National Instruments Corporation Figure 2 1 NI 5401 Block Diagram 2 1 NI 5401 User Manual Chapter 2 Function Generator Operation The NI 5401 has several main compo
34. hannel such as the GPIB bus PCI eXtensions for Instrumentation the smallest signal increment that can be detected by a measurement system Resolution can be expressed in bits in proportions or in percent of full scale For example a system has 12 bit resolution one part in 4 096 resolution and 0 0244 percent of full scale Real Time System Integration bus the National Instruments timing bus that connects DAQ boards directly by means of connectors on top of the boards for precise synchronization of functions seconds samples the rate in samples per second S s at which each sample in the waveform buffer is updated NI 5401 User Manual Glossary SCSI sequence list shift keying single trigger mode SMB S s stage staging list stepped trigger mode SYNC T trigger TTL U update rate NI 5401 User Manual Small Computer System Interface bus See staging list frequency shift keying FSK when the arbitrary waveform generator goes through the staging list only once Sub Miniature Type B connector that features a snap coupling for fast connection samples per second used to express the rate at which a DAQ board samples an analog signal in Arb mode specifies the buffer to be generated the number of loops on that buffer the marker position for that buffer and the sample count for the buffer for DDS mode specifies the frequency to be generated of the waveform in the lookup memory an
35. he same development tools and language capabilities of a standard language such as C including looping and case structures configuration management tools and compiled performance 3 Note Use the NI FGEN instrument driver to program and control your NI 5401 using LabVIEW NI 5401 User Manual 1 10 ni com Chapter 1 Generating Functions with the NI 5401 LabWindows CVI LabWindows CVI is an interactive ANSI C programming environment designed for automated test applications LabWindows CVI has an interactive drag and drop editor for building your user interface and a complete ANSI C development environment for building your test program logic The LabWindows CVI environment has a wide collection of automatic code generation tools and utilities that accelerate your development process without sacrificing any of the power and flexibility of a language such as C In addition the LabWindows CVI run time libraries are compatible with standard C C compilers including Visual C and Borland C under Windows 3 Note Use the NI FGEN instrument driver to program and control your NI 5401 using LabWindows CVI ComponentWorks ComponentWorks is a collection of 32 bit ActiveX controls for building virtual instrumentation systems ComponentWorks gives you the power and flexibility of standard development tools such as Microsoft Visual Basic or Visual C with the instrumentation expertise of National Instruments Based on ActiveX technolo
36. iagram 2 8 output attenuation 2 9 to 2 10 output enable 2 10 output impedance 2 10 specifications A 1 SYNC output and duty cycle 2 9 waveform and trigger timings figure 2 8 ARB connector 1 4 attenuation of output 2 9 to 2 10 block diagram for NI 5401 2 1 bus interface specifications A 3 C cables optional B 1 to B 2 calibration 2 15 clocks external clock reference input A 4 internal clock A 4 ComponentWorks software 1 11 connectors See I O connectors continuous trigger mode 2 6 conventions used in manual vi customer education D 1 D DDS See direct digital synthesis DDS DGND signal table 1 7 digital connector signal descriptions table 1 7 National Instruments Corporation digital trigger specifications A 3 direct digital synthesis DDS building blocks for DDS figure 2 3 description 2 3 to 2 4 frequency hopping and sweeping 2 4 frequency resolution and lookup memory C 1 to C 2 single waveform output from DDS memory 1 9 duty cycle of SYNC output 2 9 E electromagnetic compatibility specifications A 5 external clock reference input A 4 EXT TRIG signal table 1 7 F filters analog filter correction 2 12 characteristics A 2 frequency direct digital synthesis 2 4 frequency hops and sweeps 2 4 frequency resolution and lookup memory C 1 to C 2 function generator operation analog filter correction 2 12 to 2 13 analog output 2 7 to 2 10 output attenuation
37. lation configuration and application problems and questions Online problem solving and diagnostic resources include frequently asked questions knowledge bases product specific troubleshooting wizards manuals drivers software updates and more Web support is available through the Technical Support section of ni com NI Developer Zone The NI Developer Zone at ni com zone is the essential resource for building measurement and automation systems At the NI Developer Zone you can easily access the latest example programs system configurators tutorials technical news as well as a community of developers ready to share their own techniques Customer Education National Instruments provides a number of alternatives to satisfy your training needs from self paced tutorials videos and interactive CDs to instructor led hands on courses at locations around the world Visit the Customer Education section of ni com for online course schedules syllabi training centers and class registration System Integration If you have time constraints limited in house technical resources or other dilemmas you may prefer to employ consulting or system integration services You can rely on the expertise available through our worldwide network of Alliance Program members To find out more about our Alliance system integration solutions visit the System Integration section of ni com National Instruments Corporation D 1 NI 5401 U
38. ls as the NI 5401 digital output connector shown in Table 1 1 National Instruments Corporation 1 7 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU NC NC NC NC NC NC NC NC NC EXT_TRIG DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND RFU DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND Figure 1 5 SHC50 68 68 Pin Connector Pin Assignments 1 8 ni com Chapter 1 Generating Functions with the NI 5401 Software Options for Your NI 5401 This section describes the NI FGEN driver software and development tools that you can use to create application software for your NI 5401 Software Included with Your NI 5401 Your NI 5401 kit includes an interactive Sources soft front panel to help you get up and running quickly with your waveform generator In addition the NI FGEN instrument driver is also included which you can use with a wide variety of development tools to build applications for your NI 5401 These software tools are discussed in the following sections Interactive Sources Soft Front Panel Similar to standalone instruments the Sources Soft Front Panel acquires controls analyzes and presents data However since the Sour
39. male 1 m coaxial cable SMB 300 763388 01 50 Q SMB male to alligator clip 1 m cable SHC50 68 0 5m 184748 0R5 Sheilded 50 pin male VHDSCSI to 68 pin female SCSI 1 m cable also available in 0 5 m and 2 m lengths SHC50 68 1 m 184748 01 SHC50 68 2 m 184748 02 RTSI Bus Cables Ribbon cables for connecting timing and synchronization signals among Measurement Vision Motion and CAN 2 boards 7116249 02 devices 3 boards 776249 03 4 boards 716249 04 5 boards 716249 05 Extended RTSI 711562 05 National Instruments Corporation B 1 NI 5401 User Manual Appendix B Optional Accessories Table B 1 National Instruments Optional Cable Accessories Continued Product Cable Name Part Number Cable Description PXI 5401 SMB 110 763405 01 50 Q SMB male to BNC male 1 m coaxial cable SMB 300 763388 01 50 Q SMB male to alligator clip 1 m cable Table B 2 National Instruments Connector Blocks Product Part Number Description SCB 68 716844 01 Shielded I O connector block for connection to cables with 68 pin connectors CA 1000 711664 01 Shielded enclosure for signal conditioning TBX 68 777141 01 I O Connector Block with DIN Rail Mounting CB 68LP 777145 01 Low cost accessory with 68 screw terminals for easily connecting to 68 pin DAQ devices CB 68LPR 777145 02 Low cost accessory with 6
40. ment without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts a
41. nd power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation Trademarks ComponentWorks CVI LabVIEW National Instruments NI ni com PXI and RTSI are trademarks of National Instruments Corporation Product and company names mentioned herein are trademarks or trade names of their respective companies WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDW
42. nents e A PXI or PCI bus interface that handles Plug and Play protocols for assigning resources to the device and providing drivers for the data and address bus that are local to the device e A waveform sequencer that performs multiple functions such as arbitrating the data buses and controlling the triggers filters attenuators clocks PLL RTSI switch instruction FIFO and DDS e The data from the memory is fed to a digital to analog converter DAC through a half band interpolating digital filter The output from the DAC goes through the filter to the amplifiers attenuators and finally the I O connector Generating Waveforms The NI 5401 generates waveforms using DDS which is used for generating standard waveforms that are repetitive in nature such as sine TTL square and triangular waveforms DDS mode limits you to one buffer and the buffer size must be exactly equal to 16 384 samples Figure 2 2 shows a block diagram of the data path for waveform generation The data for waveform generation comes from DDS lookup memory This data is interpolated by a half band digital filter and then fed to a high speed DAC The data has a pipeline delay of 26 update clocks through this digital filter Although the digital filter can be disabled through software there will still be a 26 update clock delay Filter MUX 12 Bits 12 DAC DAC Register Digital Filter DDS Lookup Memory
43. neration When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 ms NI 5401 User Manual 2 8 ni com Chapter 2 Function Generator Operation SYNC Output and Duty Cycle The SYNC output is a TTL version of the sine waveform generated at the output The signal from the pre amplifier is sent to a comparator where it is compared against a level set by the level DAC The output of this comparator is sent to the SYNC connector through a hysteresis buffer and a 50 Q series resistor to reverse terminate reflected pulses You can use the SYNC output as a very high frequency resolution software programmable clock source for many applications You also can vary the duty cycle of SYNC output on the fly by changing the output of the level DAC The SYNC output might not carry meaning for other types of generated waveforms ER Note You can change the duty cycle of the SYNC output at any time during waveform generation Output Attenuation Figure 2 10 shows the NI 5401 output attenuator chain The output attenuators are made of resistor networks and may be switched in any combination The maximum attenuation possible on the NI 5401 is 73 dB PL PL PL PLP J NR SA M ee Figure 2 10 Output Attenuation Chain By attenuating the output signal you keep the dynamic range of the DAC that is you do not lo
44. nst defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this docu
45. om a 10 MHz Osc line on the PXI backplane bus for NI 5401 for PXI The PLL can also be tuned internally using a calibration DAC CalDAC National Instruments accurately performs this tuning during manufacturing Refer to the RTSI PXI Trigger Lines section later in this manual for additional information on using the RTSI and 10 MHz Osc lines The reference and VCXO clock are compared by a phase comparator running at 1 MHz The loop filters the error signal and sends it to the control pin of the VCXO to complete the loop Board Clock Master RTSI RTSI Osc Master Slave gt Switch gt RTSI Clock Slave 20 MHz Source e 1 Loop Phase x Filter Comp o o z og E ES 4 DAC KH ES PLL Ref 1 Vok pk min 80 MHZ A Diva 20 MHZ Board Clock VCXO Figure 2 11 PLL Architecture for the NI 5401 for PCI National Instruments Corporation 2 11 NI 5401 User Manual Chapter 2 Function Generator Operation e 10 MHz Osc x a Source Loop Phase x Filter Comp O O z oh Ed AL FE pac 5 9 PLL Ref 1 Vok pk min 80 MHz gt Divs 10 MHz VCXO Figure 2 12 PLL Architecture for the NI 5401 for PXI You can frequency lock to an external reference clock source of 1 MHz and from 5 20 MHz in 1 MHz increments The PLL can lock to a signal level o
46. or frequency locking to other boards as a master the NI 5401 sends an onboard 20 MHz signal to the RTSI Osc line as a board clock signal For locking to other devices as a slave the NI 5401 receives the RTSI Osc line as an RTSI clock signal NI 5401 User Manual 2 14 ni com Chapter 2 Function Generator Operation NI5401 for PXI For frequency locking to other boards the NI 5401 for PXI receives the PXI backplane 10 MHz Osc as a reference clock signal All the NI 5401s for PXI use this common signal as the reference clock for frequency locking AA Note Refer to your software documentation for selecting and routing signals to the RTSI PXI trigger bus Calibration Calibration is the process of minimizing measurement errors by making small circuit adjustments On the NI 5401 NI FGEN automatically makes these adjustments by retrieving predetermined constants from the onboard EEPROM calculating correction values and writing those values to the CalDACs National Instruments calibrates all NI 5401 devices to the levels indicated in Appendix A Specifications Factory calibration involves procedures such as nulling the offset and gain errors However since offset and gain errors may drift with time and temperature you may need to recalibrate your device The NI 54XX Calibration Toolkit provides functionality which allows you to perform a full recalibration of your device and allows the device to perform a self calibration The toolkit
47. or labeled ARB on the PCI version and ARB OUT on the PXI version Sree NATIONAL ON STRUMENTS 5401 Arbitrary Function Generator Y LOCK ACCESS LA OUT EXT TRIG ARB O PLL REF Ye PN SYNC OUT 1nO NYALLWd PXI PCI Figure 1 1 NI 5401 1 0 Connectors National Instruments Corporation 1 8 NI 5401 User Manual Chapter 1 ARB Connector 3 SYNC Connector NI 5401 User Manual Generating Functions with the NI 5401 The ARB PCI or ARB OUT PXI connector provides the waveform output The maximum output levels on this connector depend on the type of load termination If the output of your NI 5401 terminates into a 50 Q load the output levels are 5 V as shown in Figure 1 2 If the output of your NI 5401 terminates into a high impedance load HiZ the output levels are 10 V If the output terminates into any other load the levels are as follows R out CR ERG x10 V where Vout iS the maximum output voltage level Rz is the load impedance in ohms and Ro is the output impedance on the NI 5401 By default Rg 50 Q but you can use your software to set it to 75 Q NI 5401 NI 5401 Sg DO l Sos 2i WW H a lt o oH Ou I Na Hn o lt High Impedance Load Figure 1 2 Output Levels and Load Termination Using a 50 2 Output Impedance Note Software sets the voltage outpu
48. ory required to store one byte of data a type of coaxial signal connector temporary storage for acquired or generated data the group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected Examples of PC buses are the AT bus also known as the ISA bus and the PCI bus Celsius calibration DAC hardware component that controls timing for reading from or writing to groups complementary metal oxide semiconductor repeats a staging list until waveform generation is stopped a circuit that counts external pulses or clock pulses timing the manner in which a signal is connected from one location to another digital to analog converter an electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20 logo V1 V2 for signals in volts G 2 ni com dBc DC DC coupled DDS DDS mode DGND digital word driver dynamic range E EEPROM external trigger EXT_TRIG National Instruments Corporation G 3 Glossary decibel referred to carrier level direct current allowing the transmission of both AC and DC signals direct digital synthesis a digital technique of frequency generation using a numerically controlled oscillator NCO a dedicated lookup memory
49. s Cet appareil num rique de la classe A respecte toutes les exigences du R glement sur le mat riel brouilleur du Canada Class B Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Canadian Department of Communications This Class B digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulations Cet appareil num rique de la classe B respecte toutes les exigences du R glemen
50. s 4e ime Software switchable Protection tet ieee tees Short circuit protected Sine Spectral Purity Harmonic products and spurs Up to 1 MEZz e Up to 16 MBz e Phase Oise 4x ceret eed Filter Characteristics 60 dBc 35 dBc 105 dBc Hz at 10 kHz from carrier Digital TEV PC iecit at het ion tse Half band interpolating Selection enitn Software switchable enable or disable Tapsssinooeieex egest eet 67 Filter coefficients Fixed 20 bit Data interpolating frequency 80 MS s Pipeline signal delay 26 sampling periods Analog TyDesazancesser ei ERES 7th order L C lowpass filter Passband ripple 2 dB 1 With less than 10 dB of attenuation signal maximum plus offset before attenuation must not exceed 5 V into 50 Q NI 5401 User Manual A 2 ni com Waveform Specifications Timing 1 0 Update clock ee Frequency locking Triggers External reference sources Reference clock frequencies Frequency locking range Digital Trigger Compatibility eee R spons mrenani RA Pulse width Tgi ssssss Trigger to waveform output delay T5 sess RTSI Tigger m s etre Clock Imes itte etes Bus Interface Operational Modes National Instrumen
51. s document Misuse of this equipment could result in a shock hazard Do not substitute parts or modify equipment Because of the danger of introducing additional hazards do not install unauthorized parts or modify the device Return the device to National Instruments for service and repair to ensure that its safety features are not compromised You must insulate all of your signal connections to the highest voltage with which the NI 5401 can come in contact Connections including power signals to ground and vice versa that exceed any of the maximum signal ratings on the NI 5401 device can create a shock or fire hazard or can damage any or all of the boards connected to the host computer and the NI 5401 device National Instruments is not liable for any damages or injuries resulting from incorrect signal connections Clean the module and accessories by brushing off light dust with a soft non metallic brush Remove other contaminants with a stiff non metallic brush The unit must be completely dry and free from contaminants before returning it to service The terminal block must be used with a UL listed NI 5401 NI 5401 User Manual 1 2 ni com Chapter 1 Generating Functions with the NI 5401 Connecting Signals Figure 1 1 shows the front panels for the NI 5401 PXI and PCI buses The front panel contains three types of connectors BNC SMB and 50 pin very high density SCSI VHDSCSI The main waveform is generated through the connect
52. s NI FGEN to control your instrument The NI FGEN driver includes a set of standard functions for configuring creating starting and stopping waveform generation The instrument driver reduces your program development time and simplifies instrument control by eliminating the need to learn a complex programming protocol for your instrument NI FGEN is in a standard instrument driver format that works with LabVIEW LabWindows CVI and conventional programming languages such as C C and Visual Basic Refer to the NI FGEN readme txt file for more details on the NI FGEN instrument driver This file can be launched from the Start Programs National Instruments FGEN menu B Note An NI FGEN Instrument Driver Quick Reference Guide is included in your NI 5401 kit This reference guide helps you program your NI 5401 Additional National Instruments Development Tools The following sections describe several additional tools that you can use to develop complex applications for your NI 5401 The NI FGEN instrument driver exposes the Application Programming Interfaces APIs to these development environments LabVIEW LabVIEW is a graphical programming language for building instrumentation systems With LabVIEW you quickly create front panel user interfaces giving you interactive control of your software system To specify the functionality you assemble block diagrams a natural design notation for engineers and scientists LabVIEW has all of t
53. se any bits from the digital representation of the signal because the attenuation is done after the DAC and not before it attenuation in decibels 20 log o V Vj where V desired voltage level for the output signal Vi z input voltage level iyi Note For the NI 5401 V 5 V for a terminated load and 10 V for an unterminated load National Instruments Corporation 2 9 NI 5401 User Manual Chapter 2 Function Generator Operation NI FGEN calculates the value of the output attenuation chain which you can control by changing the peak to peak amplitude parameter 0 dB attenuation corresponds to an amplitude of 10 Vy The maximum attenuation of 73 dB corresponds to an amplitude of 2 24 mV y y Any amplitude less then this is coerced to this value hy Note You can change the output attenuation at any time during waveform generation When you change this setting the bouncing of electromechanical relays on the NI 5401 distorts the output signal for about 10 ms Output Impedance As shown in Figure 2 10 before the signal reaches the output connector you can select an output impedance of 50 Q or 75 Q If the load impedance is 50 Q and all the attenuators are off an output attenuation of 0 dB the output levels are 5 V Most applications use a load impedance of 50 Q but applications such as video device testers require 75 2 If the load is a very high input impedance load 1 MQ you will see output levels up to 1
54. ser Manual Appendix D Technical Support Resources Worldwide Support National Instruments has offices located around the world to help address your support needs You can access our branch office Web sites from the Worldwide Offices section of ni com Branch office Web sites provide up to date contact information support phone numbers e mail addresses and current events If you have searched the technical support resources on our Web site and still cannot find the answers you need contact your local office or National Instruments corporate Phone numbers for our worldwide offices are listed at the front of this manual NI 5401 User Manual D 2 ni com Glossary Prefix Meaning Value u micro 10 6 m milli 10 3 k kilo 103 M mega 106 Numbers Symbols percent positive of or plus negative of or minus plus or minus per y degree Q ohm 5 V 5 V output signal A A amperes amplification method of scaling the signal level to a higher level ARB normal waveform output signal attenuation decreasing the amplitude of a signal National Instruments Corporation G 1 NI 5401 User Manual Glossary BNC buffer bus CalDAC clock CMOS continuous trigger mode counter coupling D DAC dB NI 5401 User Manual bit one binary digit either 0 or 1 byte eight related bits of data an eight bit binary number Also used to denote the amount of mem
55. t see Chapter 2 Function Generator Operation PLL Ref Connector The PLL Ref connector is a phase locked loop PLL input connector that can accept a reference clock from an external source and frequency lock the NI 5401 internal clock to this external clock The reference clock should not deviate more than 100 ppm from its nominal frequency The minimum amplitude levels of 1 V are required on this clock You can lock reference clock frequencies of 1 MHz and 5 20 MHz in MHz steps hy Note You can frequency lock the NI 5401 for PCI to other NI devices over the RTSI bus using the 20 MHz RTSI clock signal You can frequency lock the NI 5401 for PXI to other NI devices using the 10 MHz backplane clock If no external reference clock is available the NI 5401 automatically tunes the internal clock to the highest accuracy possible For more information on PLL operation refer to Chapter 2 Function Generator Operation National Instruments Corporation 1 5 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 Pattern Out Connector PCI Only This connector is used on the NI 5401 for PCI to supply the external trigger NI 5401 User Manual input to the board Connector Pin Assignments Figure 1 4 shows the NI 5401 50 pin digital connector Refer to Table 1 1 for a description of the signals DGND NC DGND NC DGND NC DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DGND RFU DG
56. t levels based on a 50 Q load termination For more information on waveform generation and analog output operation refer to Chapter 2 Function Generator Operation For specifications on the waveform output signal see Appendix A Specifications The SYNC PXI or SYNC OUT PXI connector provides a TTL version of the sine waveform being generated at the output You can think of the SYNC output as a very high frequency resolution software programmable clock source for many applications You can also dynamically vary the 1 4 ni com Chapter 1 Generating Functions with the NI 5401 duty cycle of the SYNC output between 20 and 80 by software control as shown in Figure 1 3 t is the time period of the sine wave being generated and t is the pulse width of the SYNC output The duty cycle is ty tp x 100 wom APU SYNC Output Pita ie 50 Duty Cycle SYNC Output 3396 Duty Cycle Figure 1 3 SYNC Output and Duty Cycle For your NI 5401 for PCI you can route the SYNC output to the RTSI lines over the RTSI bus For your NI 5401 for PXI you can route the SYNC output to the TTL trigger lines over the TTL trigger bus The SYNC output is derived from a comparator connected to the analog waveform and provides a meaningful waveform only when you are generating a sine wave on the ARB output For more information on SYNC outpu
57. t sur le mat riel brouilleur du Canada Compliance to EU Directives Readers in the European Union EU must refer to the Manufacturer s Declaration of Conformity DoC for information pertaining to the CE Mark compliance scheme The Manufacturer includes a DoC for most every hardware product except for those bought for OEMs if also available from an original manufacturer that also markets in the EU or where compliance is not required as for electrically benign apparatus or cables To obtain the DoC for this product click Declaration of Conformity at ni com hardref nsf This website lists the DoCs by product family Select the appropriate product family followed by your product and a link to the DoC appears in Adobe Acrobat format Click the Acrobat icon to download or read the DoC Certain exemptions may apply in the USA see FCC Rules 15 103 Exempted devices and 15 105 c Also available in sections of CFR 47 The CE Mark Declaration of Conformity will contain important supplementary information and instructions for the user or installer Conventions bold italic monospace The following conventions are used in this manual The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box The symbol indicates that the followin
58. ts Corporation A 3 Appendix A Specifications 16 384 16 bit samples 16 384 samples exact 512 links Internal 40 MHz only Input connector RTSI clock line or internal 1 MHz 5 20 MHz in 1 MHz steps 100 ppm TTL Rising edge 20 ns min 28 sample clocks 150 ns max Slave Single continuous stepped NI 5401 User Manual Appendix A Specifications SYNC Out EVE cette ose toes Ha eee ee TTL Duty cycle eee Rene 20 to 80 software controllable External Clock Reference Input Internal Clock Mechanical Safety NI 5401 User Manual Frequency ioniene ioneina 1 MHz or 5 20 MHz in 1 MHz steps Amplitude neinn 1 Vycp S level lt 5 V pk pk Erequeney inrer 40 MHz Initial accuracy eee 5 ppm Temperature stability 0 to 5 C 25 ppm Aging 1 yep ett ttd 5 ppm Connectors ARB output eese SMB BNC SYNC output eee SMB BNC PLL reference input SMB External trigger in PCL ctt e 50 pin digital PXLE iuuseeestt uns teg SMB DIZe iudei cr irte 1 slot Power requirements eese 5V 3 5 A max 12 V 125 mA Designed in accordance with IEC 61010 1 EN 61010 1 UL 3111 1 and CAN CSA C22 2 No 1010 1 for electrical measuring and test equipment A 4 ni com Appendix A Specifications Electromagnetic Compatibility EMC EMIL ie CE C Tick and FCC Part 15 Class A Compliant Electrical emissions
59. tware Options for Your NI 5401 sssessssesseseseeeeereeenee nene nemen 1 9 Software Included with Your NI 5401 esee 1 9 Interactive Sources Soft Front Panel esee 1 9 NI FGEN Instrument Driver eese 1 10 Additional National Instruments Development Tools 1 10 LabVIEW aeta ertet eb d d e EHE 1 10 L bWindOoWS C VL cte eset tne sete eerte dene tees 1 11 Component Works ete rate RR tette 1 11 Using the Sources Soft Front Panel to Generate Waveforms esee 1 12 Generating Standard Functions esessseeseeeeeeeeenen eene 1 12 Wavetorm EGItOE ee neret dere eee e ots E erae lors eee eina tg 1 15 Power Up and Reset Conditions essere eee eee 1 16 Chapter 2 Function Generator Operation Generating WAvVetorms eerte eq ter Per bees 2 2 Direct Digital Synthesis DDS serierne sierran aaan eene eere 2 3 Frequency Hopping and Sweeping eee sess 2 4 T ggermp z irse cse aeta Oh wanda o tree ea RR te eeu e eee eee 2 4 Trigger SourceS ote tena EC e eet beeen 2 4 Medes of Operations 2 doe etate dente i e re Gees been en 2 5 Single Trisger MOde eer anri tr ee eee 2 5 Continuous Trigger Mode sese 2 6 Stepped Trigger Mode syon ERR 2 7 National Instruments Corporation Vii NI 5401 User Manual Contents Analog Output ss ie 3 Rr debeo cease ice e nad er e
60. uency 16 000 MHz 4 Bine pattern Xl gt m WA ampitude 1000 v af Poel Erie M T m o a e T Figure 1 6 Sources Soft Front Panel in DDS Output Mode NI 5401 User Manual 1 12 ni com Chapter 1 Generating Functions with the NI 5401 To control additional instrument parameters select Edit Device Configuration to bring up the dialog box shown in Figures 1 7 and 1 8 DAG 3 0 NI 5401 for PCI M Figure 1 7 Sources Soft Front Panel Output Settings Dialog Box DAQ 3 0 NI 5401 for PCI ha Figure 1 8 Sources Soft Front Panel Update Clock Settings Dialog Box National Instruments Corporation 1 13 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 You can also load a custom waveform pattern This waveform should be a text binary or sound file and should contain exactly 16 384 samples If the defined waveform does not contain exactly 16 384 samples the Sources Soft Front Panel either adds the necessary number of 0 values or allows you to choose a subset of the waveform or file Follow these steps to load a custom waveform 1 Select File Load Waveform or press the button next to the Active Waveform String display Choose the file which contains the waveform pattern to import The supported file formats are sound wav text txt and binary bin Depending on the file you choose one of the screens in Figure 1 9 is displayed If the waveform on
61. veform component in it and you can perform a variety of math functions on each component FZ Waveform Editor mi File Edit Window Help Ja vp QF E Plot Style View Waveform x X Axis Time v Units MHz ps 10 0 8 0 6 0 40 2 0 0 0 2 0 4 0 6 0 8 0 10 0 0 0 2 0 4 0 6 0 8 0 10 0 12 0 14 0 16 0 18 0 20 0 ES EN Index gt Sin xx 2 Dus Log Sweep New Segment New Component Function al Library Expression C Sketch Function Library Sinx e Amplitude 50000 2j Offset 0 0000 2 Freq MHz 0 8000 Figure 1 10 Waveform Editor Soft Front Panel You can save the waveforms in the following formats e Text txt e Binary bin Binary waveforms are the preferred format for the NI 5401 This format is the fastest to calculate and download and creates the smallest size file National Instruments Corporation 1 15 NI 5401 User Manual Chapter 1 Generating Functions with the NI 5401 Power Up and Reset Conditions NI 5401 User Manual When you power up your computer the NI 5401 is in the following state e The output is disabled and set to 0 V e The trigger mode is set to continuous e The trigger source is set to automatic the software provides the triggers e The digital filter is enabled e Output attenuation remains unchanged from its previous setting e The analog filter remains unc
62. ves a trigger the waveform generation starts at the first stage and continues through the last stage The last stage is generated repeatedly until you stop the waveform generation Figure 2 5 illustrates a single trigger mode of operation National Instruments Corporation 2 5 NI 5401 User Manual Chapter 2 Function Generator Operation Start Trigger t f1 AT1 End of All Stages a Last Stage Generated f4 Continuously Until Stopped f2 AT2 f3 AT3 Figure 2 5 Single Trigger Mode For example assume that one cycle of a sine wave is stored in the DDS lookup memory For stage 1 f1 specifies the sine frequency to be generated for time AT1 f2 and AT2 for stage 2 and so on If there are four stages in the staging list f4 will be generated continuously until the waveform generation is stopped Continuous Trigger Mode The waveform you define in the staging list is generated infinitely by continually cycling through the staging list After a trigger is received the waveform generation starts at the first stage continues through the last stage and loops back to the start of the first stage continuing until you stop the waveform generation Only one trigger is required to start the waveform generation Figure 2 6 illustrates a continuous trigger mode of operation Start Trigger End of All Stages Repeat i a Until Stopped f1 AT1 i gt gt f2 AT2 f3 AT3 f1 AT

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