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M5249C3 User`s Manual - Freescale Semiconductor

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7. Jumper Setting Function 2 3 BDM connector J2 I O or Pad voltage 1 8V JP11 1 2 BDM connector J2 Core voltage 3 3V 2 3 BDM connector J2 Core voltage 1 8V JP12 1 2 Flash EEPROM 06 boot into dBUG ROM monitor at power on reset POR 2 3 Flash EEPROM U6 boot into Flash ignoring first 256K sector at POR JP13 1 2 Audio DAC AK4360VF U1 left audio channel load JP14 1 2 Audio DAC AK4360VF U1 right audio channel load JP15 1 2 Routes CS1 from U2 MCF5249 to PAL U5 and hence to Ethernet controller 04 Removed this isolates CS1 signal for use with the expansion connectors J4 amp J5 1 11 Using The BDM Port The MCF5249 microprocessor has a built in debug module referred to as BDM background debug module In order to use BDM simply connect the 26 pin debug connector on the board J2 to the P amp E BDM wiggler cable provided in the kit No special setting is needed Refer to the ColdFire User s Manual BDM Section for additional instructions NOTE BDM functionality and use is supported via third party developer software tools Details may be found on CD ROM included in this kit M5249C3 User s Manual Rev 1 1 10 Freescale Semiconductor Chapter 2 Using the Monitor Debug Firmware The M5249C3 single board computer has a resident firmware package that provides a self contained programming and operating environment The firmware named dBUG provides the user with monitor debug in
8. 555 5 d lay E 0 2 Bel ea ie SIE 5 2 5 av Q Drew 18 5 Yos oN A 5 Pui H ae ing ENSE De s 5 3 8 288 B gt D 5 d d 2 8 8 We 9 Zy 2 5 a 5 Fi 8 Eo Ee y SL oT r Fe Figure 1 4 Jumper Locations 1 9 System Power up and Initial Operation When all of the cables are connected to the board power may be applied The dBUG ROM Monitor initialises the board and then displays a power up message on the terminal which includes the amount of memory present on the board Hard Reset DRAM Size 8M M5249C3 User s Manual Rev 1 1 8 Freescale Semiconductor M5249C3 Board Copyright 1995 2002 Motorola Inc All Rights Reserved ColdFire MCF5249 EVS Firmware v2e la xx Build XXX on XXX XX 20XX XX XX xX Enter help for help dBUG gt The board is now ready for operation under the control of the debugger as described in Chapter 2 Using the Monitor Debug Firmware If you do not get the above response perform the following checks 1 Make sure that the power supply is properly configured for polarity voltage level and current capability 1A and is connected to the board 2 Check that the terminal and board are set for the same character format and baud 3 Press the RESET button to insure that the board has been i
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14. H EA Id Devos Oft du iwdSreivivas p Rud pisi 55 2 88 88 88 88 mem 2 g PUER E BE ge 85 be pE HEISE usu eg m 88 65 68 68 68 56 58 68 88 88 58 EE RR EB B FE ERE PE FE EP p I E F r I Pfr I zn 9 si Ils e Y t t sae Tora ante sheet anole z i Hrs CR 8 tk Tum _ sg cep Mira ie ES Sonny rn T4 4 i rf nd iad wet ssl wT esl el wet sl T as aT ma ma cte Schematics M5249C3 User s Manual Rev 1 C4 Schematics uononpoud pue adfjojoid oq slulod 159 eseu L Speel punol6 edoos jo se 0 82d JO TE gd 8 241 90214 ALON 2002 20 Aepsanu p VL 1591 uod Wag JeqwunN ezig 91180199 Jequinu preog 6yzsOW GOW UOISIAIG Jolonpuoolues 4 9u Jo ueeJosyis edl uo julod 159 doee uMOUs leqel eu esn 5 ed ojoud uo payejndod UO 4 SIUIOd 1591 310 841 490719 2019 gt xog 9 1 SdL 0199135
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17. Qty Reference Part Function 44 2 P3 P4 McMurdo SDEX9SNT 5232 ports 9 way thru hole 45 13 RP1 RP2 RP5 RP6 Philips ARC241 4K7 4x 4 7K ohm SMT resistor packs RP7 RP8 RP9 RP41 RP43 RP44 RP45 46 1 RP10 Philips ARC241 75R 4x 75 ohm SMT resistor pack 47 4 RP11 RP12 RP13 RP42 Philips ARC241 10K 4x 10K ohm SMT resistor packs 48 27 RP14 RP15 RP16 RP17 RP18 Philips ARC241 47R 4x 47 ohm SMT resistor packs RP19 RP20 RP21 RP22 RP23 RP24 RP25 RP26 RP27 RP28 RP29 RP30 RP31 RP32 RP33 RP34 RP35 RP36 RP37 RP38 RP39 RP40 49 2 R1 R2 SMT 10 ohm 0805 resistors 50 4 R85 R88 R96 R121 SMT 1K ohm 0805 resistors 51 2 R86 R87 SMT 49 9 ohm 196 0805 resistors 52 4 R89 R90 R91 R92 SMT 24 9 ohm 1 0805 resistors 53 1 R93 SMT 11K ohm 196 0805 resistor 54 1 R94 SMT 10K ohm 0805 resistor 55 4 R95 R103 R122 R123 SMT 4 7K ohm 0805 resistors 56 4 R97 R102 R104 R105 SMT 270 ohm 0805 resistors 57 1 R98 SMT 120 ohm 0805 resistor 58 1 R99 SMT 3K ohm 0805 resistor 59 1 R100 SMT 56 ohm 0805 resistor 60 1 R101 SMT 1M ohm 0805 resistor 61 1 R106 SMT 560 ohm 0805 resistor 62 11 R107 R108 R109 R110 R111 SMT 470 ohm 0805 resistors R112 R113 R114 R115 R116 R117 63 1 R118 SMT 22 ohm 0805 resistor 64 2 R119 R120 SMT 18 ohm 0805 resistors 65 1 51 C amp K KS11R23CQD Red reset switch 66 1 52 C amp K KS11R22CQD Black abort Int switch 67 8 TP1 TP2 TP3 TP4 TP5 TP6 TP7 T Keystone Electrical SMT Test points only TP7 amp TP8 P8 Compo
18. The MCF5249 processor has the capability to support both an IEEE JTAG compatible port and a BDM debug port These ports are multiplexed and can be used with third party tools to allow the user to download code to the board The board is configured to boot up in the normal BDM mode of operation The BDM signals are available at port J2 The processor also has the logic to generate up to four 4 chip selects CSO to CS3 and support for 2 banks of SDRAM included on the evaluation board as 8 Mbytes in total configured as 4Mx16 The SDRAM CSI signal is used to provide selection and control of this bank of SDRAM 3 1 2 Reset Logic The reset logic provides system initialisation Reset occurs during power on or via assertion of the signal RESET which causes the MCF5249 to reset Reset is also triggered by the reset switch S1 which resets the entire processor system A hard reset and voltage sense controller U9 is used to produce an active low power on RESET signal The reset switch 51 is fed into U9 which generates the signal which is fed to the MCF5249 reset RESET M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 1 Hardware Description and Reconfiguration The RESET signal is an open collector signal and so can be wire OR ed with other reset signals from additional peripherals dBUG configures the MCF5249 microprocessor internal resources during initialization The instruction cache is invalidated and disabled The Vec
19. 2 11 2896 MHz 1 85232 A drivers A i Addr 1 DB 9 Data 7 24 1 31 16 Debug 26 pin debug connector Module P 9 gt SDRAM P i6bit3 3V QSPI Expansion Connector 1 Expansion Connector 2 51 Flash E R 16 bit 3 3v SMSC LAN91C111 Y 2MB 25MHz 10 100 Mb sec Oscillator RJ45 Connector Figure 1 1 M5249C3 Block Diagram 1 2 System Memory One on board Flash ROM 106 is used in the system The Am29LV160DB XX device contains 16Mbits of non volatile storage 1 MByte x 16 giving a total of 2M Bytes of Flash memory The lower 256 KBytes are used to store the M5249C3 dBUG debugger monitor firmware The MCF5249 processor has 96K Bytes of internal SRAM organized as 1 bank of 64Kbytes and 1 bank of 32K Bytes The SRAM can be used for either data or instruction space M5249C3 User s Manual Rev 1 Freescale Semiconductor M5249C3 Board There is one SDRAM U7 device on the PCB The system ships with 1 4M x 16 of SDRAM totalling 8MBytes of volatile memory The internal cache of the MCF5249 is non blocking The instruction cache is 8 KBytes with 16 byte line size The ROM Monitor currently does not utilize the cache but programs downloaded with the ROM Monitor can initialise and use the cache
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21. _ Somoro eo sommern m ow s sceos so M5249C3 User s Manual Rev 1 RTS1 GPO31 3 10 Freescale Semiconductor Hardware Description and Reconfiguration Table 3 3 5 Connector pin assignment continued LIE E s ser So _ ar a aa oeo fea wm s se 3 3 2 Debug Connector J2 The 5249 processor has a Background Debug Mode BDM port which supports Real Time Trace Support and Real Time Debug The signals which are neccessary for debug are available at connector J2 Figure 3 1 shows the J2 Connector pin assignment M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 11 Hardware Description and Reconfiguration Developer Reserved GND GND RESET or Pad Voltage GND PST2 PSTO DDATA2 DDATAO Freescale Reserved GND Core Voltage 11 13 P 15 Seay Fe 19 Fel 0008 gt 25 10 12 14 16 18 20 22 24 26 5249 User s Manual Rev 1 BKPT DSCLK Developer Reserved DSI DSO PST3 PST1 DDATA3 DDATA1 GND Freescale Reserved PSTCLK TA Figure 3 1 The J2 Connector pin assignment Freescale Semiconductor Appendix Configuring dBUG Network Downloads The dBUG module has the ability to perform downloads over an Ethernet network using the Trivial File Transfer Protocol
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23. Minimum System Configuration 1 8 The following sections describe all the steps needed to prepare the board for operation Please read the following sections carefully before using the board When you are preparing the board for the first time be sure to check that all jumpers are in the default locations Default jumper markings are documented on the master jumper table and printed on the underside of the board see Table 1 2 After the board is Installation and Setup M5249C3 User s Manual Rev 1 1 4 Freescale Semiconductor M5249C3 Board functional in its default mode the Ethernet interface may be used by following the instructions provided in Appendix A Configuring dBUG for Network Downloads 1 8 1 Unpacking Unpack the computer board from its shipping box Save the box for storing or reshipping Refer to the following list and verify that all the items are present You should have received e M5249C3 Single Board Computer e M5249C3 User s Manual this document One RS232 communication cable One BDM Background Debug Mode wiggler cable MCF5249UM ColdFire Integrated Microprocessor User Manual ColdFire Programmers Reference Manual e A selection of Third Party Developer Tools and Literature NOTE Avoid touching the MOS devices Static discharge can and will damage these devices Once you have verified that all the items are present remove the board from its protective jacket and anti static
24. TFTP NOTE this requires a TFTP server to be running on the host attached to the board Prior to using this feature several parameters are required for network downloads to occur The information that is required and the steps for configuring dBUG are described below A 1 Required Network Parameters For performing network downloads dBUG needs 6 parameters 4 are network related and 2 are download related The parameters are listed below with the dBUG designation following in parenthesis All computers connected to an Ethernet network running the IP protocol need 3 network specific parameters These parameters are Internet Protocol IP address for the computer client IP IP address of the Gateway for non local traffic gateway IP and Network netmask for flagging traffic as local or non local netmask In addition the dBUG network download command requires the following three parameters IP address of the TFTP server server IP Name of the file to download filename Type of the file to download filetype of S record COFF ELF or Image Your local system administrator can assign a unique IP address for the board and also provide you the IP addresses of the gateway netmask and TFTP server Fill out the lines below with this information Client IP gt IP address of the board Server IP s IP address of the server Gateway gt IP address of the gateway Netmask Network netmas
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26. for a transfer acknowledgment TA either from within Auto acknowledge AA mode or from the externally addressed device before it can complete the bus cycle TA is used to indicate the completion of the bus cycle It also allows devices with different access times to communicate with the processor properly i e asynchronously like the Ethernet controller U4 The MCF5249 processor as part of the chip select logic has a built in mechanism to generate TA for all external devices which do not have the capability to generate this signal For example the Flash ROM cannot generate a TA signal The chip select logic is programmed by the dBUG ROM Monitor to generate TA internally after a pre programmed number of wait states In order to support future expansion of the M5249C3 board the TA input of the processor is also connected to the Processor Expansion Bus J5 pin 66 This allows any expansion boards to assert this line to provide a TA signal to the processor On the expansion boards this signal should be generated through an open collector buffer with no pull up resistor a pull up resistor is included on this board All TA signals from expansion boards should be connected to this line 3 111 Wait State Generator The Flash ROM and SDRAM on the board may require some adjustments to the cycle time of the processor to make them compatible with the processor s external bus speed To extend the CPU bus cycles for the slower devices the chip select l
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28. module refers to the module name where the register is located and register refers to the specific register to modify The data parameter specifies the new value to be written into the register The registers are organized according to the module to which they belong The available modules on the MCF xxx are CS DMAO DMAI DMA2 DMA3 DRAMC PP MBUS SIM TIMERI TIMER2 UARTO and UARTI Refer to the MCF5407 user s manual for more information on these modules and the registers they contain Example To modify the TMR register of the first Timer module to the value 0x0021 the command is irm timerl tmr 0021 M5249C3 User s Manual Rev 1 2 20 Freescale Semiconductor Using the Monitor Debug Firmware HELP Help Usage HELP lt command gt The HELP command displays a brief syntax of the commands available within dBUG In addition the address of where user code may start is given If command 15 provided then a brief listing of the syntax of the specified command is displayed Examples To obtain a listing of all the commands available within dBUG the command is help To obtain help on the breakpoint command the command is help br M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 21 Using the Monitor Debug Firmware LR Loop Read Usage LR lt width gt addr The LR command continually reads the data at addr until a key is pressed The optional lt width gt specifies the size of the data to be read
29. 1 3 Serial Communication Channels The MCF5249 processor has 2 built in UARTs and UART1 with independent baud rate generators The signals of both channels pass through external Driver Receivers to make the channels RS 232 compatible An RS 232 serial cable with DB9 connectors is included with the board The signals of both channels are available on the 120 pin expansion connector 75 UARTO channel is the TERMINAL channel used by dBUG for communication with an external terminal PC The TERMINAL baud rate defaults to 19200 1 4 Parallel I O Ports The MCF5249 offers 47 lines of general purpose I O of which 11 are dedicated inputs and 10 are dedicated outputs Eight of the GPIO lines are also available as edge sensitive interrupt inputs 1 5 Programmable Timer Counter The MCF5249 has two built in general purpose timers counters and a software watchdog timer All timers are available to the user The signals for each timer are available on the 120 pin expansion connector J5 1 6 Ethernet Controller The M5249C3 PCB has an Ethernet controller SMSC LAN91C111 U4 operating at 10M bits sec or 100Mbits sec The dBUG ROM monitor is programmed to allow a user to download files over a network to memory in different formats The compiler formats currently supported are S Record COFF ELF or Image raw binary Refer to Appenix A for details on how to configure the board for network download 1 7 System Configuration The
30. 39 Chapter 3 Hardware Description and Reconfiguration The Frocessor and EF m 3 1 SF CR cc n R 3 1 Co 2r 3 1 a 3 2 Book Title Rev X Freescale Semiconductor v 3 2 3 3 1 2 A3 ARM 3 2 as IMET 3 2 3 3 2 S2 qu SRAM MB OMNE 3 3 3 1 8 The MCF5249 Registers and Memory Map tr MM DUM 3 3 el BP Vector Mapping SEU MM 3 4 o Ee 3 5 on 3 5 LU DR 3 5 ILDO PETROV anisina 3 5 3 1 14 JPIS Jumper and the User s Program Lu coacto 3 6 ED 3 0 MCFAN c NP CN 3 6 Sls SPEM cessat b MR UU MER bM ru 3 6 2 3 7 Ded Ribes Gon iab en rbd dH eC A Ml P bs TAPER EAM MORE 3 7 Qs Audo oisi d dd OR M i ED ee NNNM EE 3 8 choc EMO odo o o ce m DV NEIN 3 8 3 2 7 Analog to Digital Converter ADC Module pp 3 8 3 28 Flash Memory Cony IDE Interface Module 3 9 Connectors and Expansion BUS ins paws ipto riae Pec 3 9 33 1 Expansion Connectors Jp and 3 9 oe The Debug Connector J2 RR 3 11 Appe
31. 7 0 all of which are multiplexed with other functions The interrupt controller is capable of providing up to 32 interrupt sources These sources are External interrupt signals INT 7 0 e Software watchdog timer module Two general purpose timer modules UART module C module e Audio interface modules DMA module QSPI module external interrupt inputs are edge sensitive The active level is programmable An interrupt request must be held valid until an IACK cycle starts to guarantee correct processing Each interrupt input can have it s priority programmed by setting the xIPL 2 0 bits in the Interrupt Control Registers NOTE No interrupt sources should have the same level and priority as another Programming two interrupt sources with the same level and priority can result in undefined operation The M5249C3 hardware uses INT7 to support the ABORT function using the ABORT switch S2 This switch is used to force an interrupt level 7 priority 3 if the user s program execution should be aborted without issuing a RESET refer to Chapter 2 Using the Monitor Debug Firmware for more information on ABORT Since the ABORT switch is not capable of generating a vector in response to a level seven interrupt acknowledge from the processor the dBUG programs this interrupt request for autovector mode Refer to MCF5249 User s Manual for more information about the interrupt controller 3 1 7 Internal SRAM The M
32. Internal access 1 cycle 3000 0000 3007 FFFF CS1 External Ethernet controller 8 7 7 7 8000 0000 BFFF_FFFF MBAR2 Module Base Address Reg 2 Refer to MCF5249UM SIM section FFEO 0000 FFFF_FFFF CSO 2M Flash ROM 8 7 7 7 All of the unused area of the memory map is available to the user 3 1 9 Reset Vector Mapping After reset the processor attempts to read the initial stack pointer and program counter values from locations 00000000 amp 00000004 the first eight bytes of memory space This requires the board to have a non volatile memory device in this range with the correct information stored in it In some systems however it is preferred to have RAM starting at address 00000000 The MCF5249 processor chip select zero CS0 responds to any accesses after reset until the CSMRO is written Since CSO the global chip select is connected to the Flash ROM U6 the Flash ROM initially appears at address 00000000 which provides the initial stack pointer and program counter the first eight bytes of the Flash ROM The M5249C3 User s Manual Rev 1 3 4 Freescale Semiconductor Hardware Description Reconfiguration initialisation routine then programs the chip select logic locates the Flash ROM to start at SFFE00000 and configures the rest of the internal and external peripherals 3 1 10 TA Generation The processor starts a bus cycle by asserting CSx with the other control signals The processor then waits
33. command 1s set baud 19200 NOTE See the SHOW command for a display containing the correct formatting of these options M5249C3 User s Manual Rev 1 2 30 Freescale Semiconductor Using the Monitor Debug Firmware SHOW Show Configurations Usage SHOW lt option gt The SHOW command displays the settings of the user configurable options within dBUG When no option is provided SHOW displays all options and values Examples To display all options and settings the command is show To display the current baud rate of the board the command is show baud Here is an example of the output from a show command dBUG show base 16 baud 19200 server 192 0 0 1 client 192 002 gateway 0 0 0 0 netmask 255 255 255 0 filename test srec filetype S Record mac 00 CF 52 49 C3 01 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 31 Using the Monitor Debug Firmware STEP Step Over Usage STEP The STEP command can be used to step over a subroutine call rather than tracing every instruction in the subroutine The ST command sets a temporary breakpoint one instruction beyond the current program counter and then executes the target code The STEP command can be used to step over BSR and JSR instructions The STEP command will work for other instructions as well but note that 1f the STEP command is used with an instruction that will not return i e BRA then the temporary breakpoint
34. command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To display memory at address 0x00400000 the command is md 400000 To display memory in the data section defined by the symbols data start and data end the command is md data start To display a range of bytes from 0x00040000 to 0x00050000 the command is md b 40000 50000 To display a range of 32 bit values starting at 0x00040000 and ending at 0x00050000 1 40000 50000 5249 3 User s Manual Rev 1 2 24 Freescale Semiconductor Using the Monitor Debug Firmware MM Memory Modify Usage MM lt width gt addr lt data gt The MM command modifies memory at the address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Width specifies the size of the data that is modified If no lt width gt is specified the default of word sized data is used The value for data may be a symbol name or a number converted according to the user defined radix normally hexadecimal value for data is provided then the MM command immediately sets the contents of addr to data If no value for data is provided then the MM command enters into a loop The loop obtains a value for data sets the contents of the current address to data increments th
35. function called the TRAP 15 handler This function can be called by the user program to utilize various routines within the dBUG to perform a special task and to return control to the dBUG This section describes the TRAP 15 handler and how it is used There four TRAP 15 functions These are OUT CHAR IN CHAR CHAR PRESENT and EXIT TO dBUG 2 5 1 OUT CHAR This function function code 0x0013 sends a character which is in lower 8 bits of D1 to terminal Assembly example assume dl contains the character move l 50013 d0 Selects the function TRAP 15 The character in dl is sent to terminal C example void board out char int ch your compiler produces LINK UNLK pair for this routine then use the following code which takes this into account 1 LINK a6 0 produced by compiler asm move 18 a6 d1 put ch into dl asm move l140x0013 d0 select the function asm 15 make the call UNLK produced by C compiler else If C compiler does not produce a LINK UNLK pair the use the following code f asm move l4 sp d1 put ch into dl asm move 140x0013 d0 select the function asm trap 15 make the call fendif 2 5 2 IN CHAR This function function code 0x0010 returns an input character from terminal to the caller The returned character is in D1 Assembly example move l
36. select 27 3 JP8 9 JP15 Harwin M22 2010205 2 way jumpers 1 8V uP power 3 3V uP power amp CS1 for expansion connector not E net 28 3 JP10 JP11 JP12 Harwin M22 2010305 3 way jumpers voltage select Core voltage select amp dBUG or user code select for Flash 29 2 JP13 JP14 Harwin M22 2010205 2 way jumpers audio output load impedance select 30 1 M1 Schurter 4832 2320 3 5mm Stereo jack socket SW 31 1 02 2x13 0 1 pitch connector Shrouded BDM header 32 1 3 Amphenol RHJS 5381 RJ45 connector integrated LEDS 33 2 0405 177983 5 120 way SMT receptacle expansion connectors 34 1 16 1x10 0 1 pitch connector QSPI connector not fitted 35 1 J7 Molex 71565 connector not fitted 36 1 8 2x20 0 1 pitch connector IDE connector 37 2 149 10 Marushin Electric Schurter RCA Phono Audio jack socket MR551L 38 1 411 PC disk drive power conn Alternate EVB power connector 39 1 412 1 8 0 1 pitch SIL conn 1 GAL programming connector 40 2 1112 Siemens B82111 B C24 DC DC Power supply inductors 41 1 L3 Murata BLM31AJ601SN1L Ferrite bead inductor 42 1 P1 Switchcraft RAPC712 2 1mm barrel power connector 43 1 P2 Augat 25V 02 2 way bare wire power connector M5249C3 User s Manual Rev 1 Freescale Semiconductor Evaluation Board Table D 1 M5249C3 Bill of Materials continued
37. user defined radix normally hexadecimal The optional value lt inc gt can be used to increment or decrement the data value during the fill This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To fill a memory block starting at 0x00020000 and ending at 0x00040000 with the value 0x1234 the command is bf 20000 40000 1234 To fill a block of memory starting at 0x00020000 and ending at 0x0004000 with a byte value of OxAB the command is bf b 20000 40000 AB To zero out the BSS section of the target code defined by the symbols bss start and bss end the command is bf bss start bss end 0 To fill a block of memory starting at 0x00020000 and ending at 0x00040000 with data that increments by 2 for each width the command is bf 20000 40000 0 2 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 9 Using the Monitor Debug Firmware BM Block Move Usage BM begin end dest The BM command moves a contiguous block of memory starting at address begin and stopping at address end to the new address dest The BM command copies memory as a series of bytes and does not alter the original block The values for addresses begin end and dest may be absolute addresses specified as hexadecimal values or symbol names If the destination a
38. 2 and 3 the board boots from the second half of the Flash OxFFF00000 Procedure 1 Compile and link as though the code was to be placed at the base of the flash but setup so that it will download to the SDRAM starting at address 0 0000 The user should refer to their compiler documentation for this since it will depend upon the compiler used 2 Setup the jumper JP12 for Normal operation pinl connected to pin 2 3 Download to SDRAM If using serial or ethernet start the ROM Monitor first If using BDM via a wiggler cable download first then start ROM Monitor by pointing the program counter PC to 0x7FE00400 and run 4 In the ROM Monitor execute the upuser command 5 Move jumper JP12 to pin 2 connected to pin 3 and push the reset button S1 User code should now be running from reset POR 3 2 Serial Communication Channels The M5249C3 offers two serial communications channels They are discussed in this section 3 2 1 MCF5249 UARTs The 5249 device has two built in UARTS each with its own software programmable baud rate generators One channel is the ROM Monitor to Terminal output and the other is available to the user The ROM Monitor programs the interrupt level for UARTO to Level 3 priority 2 and autovector mode of operation The interrupt level for UARTI is programmed to Level 3 priority 1 and autovector mode of operation The signals from these channels are available on expansion connector J5 The sign
39. 49US case 11 2896MHz quartz crystal M5249C3 User s Manual Rev 1 Freescale Semiconductor
40. 50010 d0 Select the function trap 15 Make the call the input character is in dl C example int board in char void asm move 1 0x0010 d0 select the function M5249C3 User s Manual Rev 1 2 38 Freescale Semiconductor Using the Monitor Debug Firmware asm trap 15 make the call asm move ld1 d0 put the character in 2 5 3 CHAR PRESENT This function function code 0x0014 checks if an input character is present to receive A value of zero is returned in DO when no character is present A non zero value in DO means a character is present Assembly example move l 50014 40 Select the function 15 Make the call 40 contains the response yes no C example int board char present void asm move 1 0x0014 d0 select the function asm 15 make the call 2 5 4 EXIT TO dBUG This function function code 0x0000 transfers the control back to the dBUG by terminating the user code The register context are preserved Assembly example move l 50000 0 Select the function trap 15 Make the call exit to dBUG C example void board exit to dbug void asm move 1 0x0000 d0 select the function asm trap 15 exit and transfer to dBUG M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 39 Using the Monitor Debug Firmware M5249C3 User s Manual Rev 1 2 40 Freescale Semiconduc
41. 5249C3 User s Manual Rev 1 2 26 Freescale Semiconductor Using the Monitor Debug Firmware RD Register Display Usage RD lt reg gt The RD command displays the register set of the target If no argument for reg is provided then all registers are displayed Otherwise the value for reg is displayed dBUG preserves the registers by storing a copy of the register set in a buffer The RD command displays register values from the register buffer Examples To display all the registers and their values the command is rd To display only the program counter rd pc Here is an example of the output from this command PC 00000000 SR 2000 t Sm 000 xnzvc An 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000 Dn 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 27 Using the Monitor Debug Firmware RM Register Modify Usage RM reg data The RM command modifies the contents of the register reg to data The value for reg is the name of the register and the value for data may be a symbol name or it is converted according to the user defined radix normally hexadecimal dBUG preserves the registers by storing a copy of the register set in a buffer The RM command updates the copy of the register in the buffer The actual value will not be written to the register until target code is executed Examples To chang
42. 8 050999105 vas 205 ond BAIDOS DOS ros DIOS ealdgrooS 259 5 250 5 7709900091 0 StGld9 inynos 270999109 909IEYIVQS 959601905 270499175 5 258 Wivas 8049 19 600 158 1v LVOS 6040 18 11909 20 1 05 Ovivas 790401005 0vivas 0ld913dS 1040 35 zpeus BlOld9 NS 4 150991943318 QdoraMs Ziode eanasng 19099 19 3318 910Id9 AQHOIal old9 WOIG3al 1 099 8z0ld9 INLL 8149 9149 Gia 6109 23 61099143 eudplo 5904914978 5949 4915 6 290149 4545 2509 4545 180199 39 1508 908 92049 OvLvas SzOdori vvas 61099143 5049 30 30 0S9 050 FRNY osa osa 8lOld9 dOBdl isa isa LE Laya nosa 10194 19154 tjv1vaa 0119945 2158 elsa 1 SO SPODU pion OHT 89d9 ON g E SadoreNnaa 8d9 eNng3 5 28 1089 zNn83 18d5yaInaa 28 8 A 39d9 INng3 2 zrid9 miv1vas nd9rmv 1vas 2882002 8 LEDRA 9 05 1 99 0 05 zeman 1eus ivivas i708 109108 woanas _ 3MOS ISOTYHOS Svoos Sv os Jsat 30 09 ser aeq
43. 9 C60 C61 C64 C65 C66 C67 C130 8 1 C39 47pF 50V COG SMT Capacitors 9 7 C41 C54 C55 C56 C57 C62 C63 10nF 25V X7R SMT Capacitors 10 2 C92 C93 22pF 50V COG SMT Capacitors 11 1 C96 Rubycon 35V 1000uF Thru hole Capacitor 12 4 C116 C118 C119 C120 4 7uF 16V X7R SMT Capacitors 13 2 C117 C123 2 2nF 50V X7R SMT Capacitors 14 5 D1 D2 D6 D7 D8 MBRS340T3 SMT Schottky Power Diodes 15 2 D3 D4 MRA4003T3 SMT Power Diodes 16 3 D5 D9 D10 Liteon LTL 94PURK TA Red SMT LEDs 17 3 D11 D12 D22 Liteon LTL 94PGK TA Green SMT LEDs 18 9 1013 014 015 016 017 018 019 Liteon LTL 24PURK TA Red SMT LEDs D20 D21 M5249C3 User s Manual Rev 1 Freescale Semiconductor Evaluation Board Table D 1 M5249C3 Bill of Materials continued Qty Reference Part Function 19 1 Multicomp 15 Fuse 20 1 JP1 Harwin M22 2010305 3 way jumper de emphasis select low no high yes 21 1 JP2 Harwin M22 2010305 3 way jumper high pass correction low no high yes 22 1 JP3 Harwin M22 2010305 3 way jumper clock sample freq low 25615 high 38415 23 1 JP4 Harwin M22 2010305 3 way jumper audio bit stream low 16 bit LSB justified high 125 16 18 20 bit 24 1 JP5 Harwin M22 2010205 2 way jumper I2C SDAO pull up 25 1 JP6 Harwin M22 2010205 2 way jumper I C SCLO pull up 26 1 JP7 Harwin M22 2010305 3 way jumper BDM JTAG
44. BCLK PI 2 Bus clock input to the 22V10 from 5249 RESET PI 3 RESET Input from MCF5249 ICST PI 4 CS1 Chip Select 1 input from MCF5249 RW PIN 57 Read not Write input from MCF5249 ITA IN PIN 6 TA Transfer Ack input from expansion connector OE PIN 7 OE Output Enable input from MCF5249 ISRDY PI 9 SRDY Synchronous Ready input from LAN91C111 INTRO PIN 10 Interrupt 0 input from LAN91C111 ARDY PI iT ARDY Asynchronous ready input from LAN91C111 Outputs ANRDYREG PI 17 ISTYPE reg Registered ARDY M5249C3 User s Manual Rev 1 Freescale Semiconductor B 1 PAL Equations I 18 ISTYPE reg Delayed registered ARDY IWR PIN 195 WR Write Output to LAN91C111 IRD PIN 20 RD Read Output to LAN91C111 IRDYRTN PIN 21 RDYRTN Ready Return Output to LAN91C111 IADS PIN 23 ADS Address Data Strobe Output to LAN91C111 WR PIN 24 Write not Read Output to LAN91C111 RESET OUT PIN 2 RESET Output to LAN91C111 PIN 26 Interrupt Request 6 Output ITA PIN 27 Output to the MCF5249 Ck k KCk KCKCKCKCKCKCKCk KCk KC CK Ck KCk Kk ck ck ck ckck Equations Section ko kk heck kk koc ek KEEN equations Invert interrupt from Ethernet controller to GPIO6 IRQ6 IRQ6 INTRO Generate inverted R W WR R Generate Read and Write to controller for asynchronous
45. CF5249 processor has 96 KBtyes of internal memory which may be programmed as data instruction memory This memory is mapped to 0x20000000 and configured as data space but is not used by the dBUG monitor except during system initialisation After system initialisation is complete the internal memory is available to the user The memory is relocatable to any 32 K Byte boundary 3 1 8 The MCF5249 Registers and Memory Map The memory and I O resources of the M5249C3 hardware are divided into two groups 5249 internal and external resources the I O registers are memory mapped The 5249 processor has built in logic and up to four chip select pins CS 3 0 which are used to enable external memory and I O devices In addition there are SDRAS and SDCAS lines available for controlling SDRAMs There are registers to specify the address range type of access and the method of TA generation for each chip select These registers are programmed by the dBUG monitor to map the external memory and I O devices M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 3 Hardware Description Reconfiguration The M5249C3 uses the following signals to select external peripherals CS0 to enable the Flash ROM refer to Section 3 1 13 Flash ROM SDRAS SDCAS and SDRAM CSI to enable the SDRAM refer to Section 3 1 12 SDRAM CSI for the Ethernet controller The chip select mechanism of the MCF5249 processor a
46. ER lt bytes gt The UPUSER command places user code and data into space allocated for the user in Flash The optional parameter bytes specifies the number of bytes to copy into the user portion of Flash If the bytes parameter is omitted then this command writes to the entire user space There are seven sectors of 256K each available as user space Users access this memory starting at address OXFFEA40000 Examples To program all 7 sectors of user Flash the command is upuser To program only 1000 bytes into user Flash the command is upuser 1000 M5249C3 User s Manual Rev 1 2 36 Freescale Semiconductor Using the Monitor Debug Firmware VERSION Display dBUG Version Usage VERSION The VERSION command displays the version information for dBUG The dBUG version build number and build date are all given The version number is separated by a decimal for example v 2b 1c 1a In this example v 2b 1c 1 VA dBUG minor revision revision revision The version date is the day and time at which the entire dBUG monitor was compiled built Examples To display the version of the dBUG monitor the command is version M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 37 Using the Monitor Debug Firmware 2 5 TRAP 15 Functions An additional utility within the dBUG firmware is a
47. IEC958 C U and V sub channels Frequency measurement block precise measurement of the incoming sample frequency All the Audio signals are brought out to expansion connectors J4 amp 15 For further details please refer to the MCF5249 User s manual 3 2 6 1 Module The MCF5249 processor s 122 module includes the following features e Compatibility with the bus standard e Multimaster operation e Software programmable for one of 64 different clock frequencies Software selectable acknowledge bit e Interrupt driven byte by byte data transfer e Arbitration lost interrupt with auto mode switching from master to slave Calling address identification interrupt e Start and stop signal generation and detection Repeated start signal generation Acknowledge bit generation and detection Bus busy detection 3 2 7 Analog to Digital Converter ADC Module The MCF5249 processor s ADC module includes the following features e Sigma Delta based ADC with 12 bit resolution M5249C3 User s Manual Rev 1 3 8 Freescale Semiconductor Hardware Description and Reconfiguration e Four multiplexed inputs EBUIN3 ADINO GPI38 EBUIN4 GPI39 RXD2_ADIN2_GPI28 and CTS2 ADIN3 GPI31 The digital portion of the ADC is on chip an analog comparator must be sourced externally e Single output TOUT ADOUT 5 provides the reference voltage which requires an external comparator resistor capacitor circuit e Softw
48. If no lt width gt is specified the command defaults to reading word sized data Example To continually read the longword data from address 0x20000 the command is lg 20000 M5249C3 User s Manual Rev 1 2 22 Freescale Semiconductor Using the Monitor Debug Firmware LW Loop Write Usage LW lt width gt addr data The LW command continually writes data to addr The optional width specifies the size of the access to memory The default access size is a word Examples To continually write the longword data 0x12345678 to address 0x20000 the command is lw 1 20000 12345678 Note that the following command writes 0x78 into memory lw b 20000 12345678 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 23 Using the Monitor Debug Firmware MD Memory Display Usage MD lt width gt lt begin gt lt end gt The MD command displays a contiguous block of memory starting at address begin and stopping at address end The values for addresses begin and end may be absolute addresses specified as hexadecimal values or symbol names Width modifies the size of the data that is displayed If no lt width gt is specified the default of word sized data is used Memory display starts at the address begin If no beginning address is provided the MD command uses the last address that was displayed If no ending address is provided then MD will display memory up to an address that is 128 beyond the starting address This
49. M5249C3 Reference Board User s Manual Document Number M5249C3UM Rev 1 07 2006 5 freescale semiconductor How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan Q freescale com Asia Pacific Freescale Semiconductor Hong Kong Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 26668334 support asia 9 freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There
50. M5249C3 board requires the following items for minimum system configuration e The M5249C3 board provided e Power supply 7V to 14V DC with minimum of 1 0 Amp RS232C compatible terminal or a PC with terminal emulation software RS232 Communication cable provided Refer to Section 2 2 2 System Initialization for initial system setup Figure 1 2 displays the minimum system configuration M5249C3 User s Manual Rev 1 Freescale Semiconductor 1 3 M5249C3 Board 4 dBUG gt 7 0 to 14VDC Input Power RS 232 Term inal Or PC INN Poss
51. The value for data may be a symbol name or an absolute value If an absolute value passed into the DC command is prefixed by then data is interpreted as a hexadecimal value Otherwise data is interpreted as a decimal value All values are treated as 32 bit quantities Examples To display the decimal and binary equivalent of 0x1234 the command is de 0x1234 To display the hexadecimal and binary equivalent of 1234 the command is de 1234 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 13 Using the Monitor Debug Firmware DI Disassemble Usage DI lt addr gt The DI command disassembles target code pointed to by addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Wherever possible the disassembler will use information from the symbol table to produce a more meaningful disassembly This is especially useful for branch target addresses and subroutine calls The DI command attempts to track the address of the last disassembled opcode If no address is provided to the DI command then the DI command uses the address of the last opcode that was disassembled The DI command is repeatable Examples To disassemble code that starts at 0x00040000 the command is di 40000 To disassemble code of the C function main the command is di main M5249C3 User s Manual Rev 1 2 14 Freescale Semiconductor Using the Monitor Debug Firmware DL Download C
52. absolute address specified as a hexadecimal value or a symbol name When the GT command is executed all breakpoints are inserted into the target code and the context is switched to the target program Control is only regained when the target code encounters a breakpoint illegal instruction or other exception which causes control to be handed back to dBUG Examples To execute code up to the C function bench the command is gt bench M5249C3 User s Manual Rev 1 2 18 Freescale Semiconductor Using the Monitor Debug Firmware IRD Internal Register Display Usage IRD lt module register gt This command displays the internal registers of different modules inside the MCF5xxx In the command line module refers to the module name where the register is located and register refers to the specific register to display The registers are organized according to the module to which they belong The available modules on the MCF xxx are CS DMA1 DMA2 DMA3 DRAMC MBUS SIM TIMERI TIMER2 UARTO and UARTI Refer to the MCF5407 user s manual for more information on these modules and the registers they contain Example ird sim rsr M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 19 Using the Monitor Debug Firmware IRM Internal Register Modify Usage IRM module register data This command modifies the contents of the internal registers of different modules inside the MCF5xxx In the command line
53. access RD CS1 amp WR CS1 amp Generate inverted reset RESET OUT end M5249C3 User s Manual Rev 1 B 2 Freescale Semiconductor Appendix Schematics M5249C3 User s Manual Rev 1 Freescale Semiconductor C 1 o p r mag ZZ e e 9 ES dS cel ues Siaoeuuoo uoguedg 91190139 peog 62540 22049597450 1204972597450 220 49 6507450 12085 250 1850 LOSNA JoquooopW JolonpuooueS ejeosea 4 70491597450 6209910807450 szoid9 1n0d 1850 0850 0705 19450 0195 ssodorivas 18d9 1810 1509971519 080d9 0514 0 0512 ad9100XH 4204901 05 gold9 pyod1 imdS av1vas 090995 616945 20 49 150 1450 620149 050 1450 1450 N ldSO ovos 820d9 L0XL 220d D 00XL 09d910SLO Lad9 0GXH puaa 5099 Vie 9049 19 10 150 30 wy 5202 20808 n880nR 8588 855 38559 85 855 255 ZH ZH 8388 3 055 xol 501 2828 5059522000086 9995500292693 6049 1001 seodorunoL 550522 099 0100 049 01n01 55250 ze0d9 nonea Zeodo zinones 9 049 11nong3 92049 erOd9 9L10 270499119 66049 1119 SE Odo DX SEOJDINLIX 159 iso vos 0049 Por 13934 13939 0040119
54. als of UARTO and UARTI are also passed through the RS 232 driver receivers U13 amp U14 and are available on DB 9 connectors P3 and P4 Refer to the MCF5249 User s Manual for programming the UART s and their register maps 3 2 2 QSPI Module The QSPI Queued Serial Peripheral Interface module provides a serial peripheral interface with queued transfer capability It will support up to 16 stacked transfers at one time minimising CPU intervention between transfers Transfer RAMs in the QSPI are indirectly accessible using address and data registers Functionality is very similar but not identical to the QSPI portion of the QSM Queued Serial Module implemented in the MC68332 processor Programmable queue to support up to 16 transfers without user intervention Supports transfer sizes of 8 to 16 bits in 1 bit increments M5249C3 User s Manual Rev 1 3 6 Freescale Semiconductor Hardware Description and Reconfiguration Four peripheral chip select lines for control of up to 15 devices Baud rates from 274 5 Kbps to 17 5 Mbps at 140MHz Programmable delays before and after transfers Programmable clock phase and polarity Supports wrap around mode for continuous transfers Please see the MCF5249 Users Manual for more detail The QSPI signals from the MCF5249 device are brought out to expansion connector J4 Some of these signals are multiplexed with other functions 3 2 3 General Purpose I O Pins The MCF5249
55. are ASM Assembler Usage ASM lt lt addr gt stmt gt The ASM command is a primitive assembler The lt stmt gt is assembled and the resulting code placed at lt addr gt This command has an interactive and non interactive mode of operation The value for address lt addr gt may be an absolute address specified as a hexadecimal value or a symbol name The value for stmt must be valid assembler mnemonics for the CPU For the interactive mode the user enters the command and the optional lt addr gt If the address is not specified then the last address is used The memory contents at the address are disassembled and the user prompted for the new assembly If valid the new assembly is placed into memory and the address incremented accordingly If the assembly is not valid then memory is not modified and an error message produced In either case memory is disassembled and the process repeats The user may press the lt Enter gt or lt Return gt key to accept the current memory contents and skip to the next instruction or a enter period to quit the interactive mode In the non interactive mode the user specifies the address and the assembly statement on the command line The statement is the assembled and if valid placed into memory otherwise an error message is produced Examples To place a NOP instruction at address 0x00010000 the command is asm 10000 nop To interactively assembly memory at address 0x00400000 the c
56. are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Fre
57. are interrupt provided when the ADC measurement is complete 3 2 8 Flash Memory Card IDE Interface Module The MCF5249 processor s Flash Memory Card IDE module includes the following features TBA 3 3 Connectors and Expansion Bus There are 2 expansion connectors on the M5249C3 14 and J5 which are used to connect the board to external I O devices and or expansion boards 3 3 1 Expansion Connectors J4 and J5 Table 3 2 shows pin assignments for the J4 connector Table 3 2 J4 Connector Pin Assignment as eee a se se _ _ u m 77 SDUDQM SCLKOUT GPIO15 79 SDRAS EF GPIO19 GND GND EH SDATAO SDIO1 GPIO54 85 SDWE 86 SDATA_BS2 RSTO 91 SDATA1_BS1 GPIO9 M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 9 Hardware Description and Reconfiguration Table 3 2 J4 Connector Pin Assignment continued SDATA3 GPIO56 94 QSPI CSO GPIO29 45V 96 QSPI CS1 GPIO24 GND 98 GND SDRAM_CS2 QSPI_DOUT GPIO26 GPIO5 QSPI_CS2 GPIO21 GPIO6 QSPI_CS3 GPIO22 GND GND GND GND 5V 5V 5V 5V GND GND GND GND Table 3 3 shows the pin assignments of the 15 connector Table 3 3 5 Connector pin assignment NL E we pe mem se wwe amem w wo fef mur 1 EA WEE ENIM IE EA seee oe e p Ka EA EA EA EX EX EX RXDO GPI27
58. ase 8 and decimal base 10 client This is the network Internet Protocol IP address of the board For network communications the client IP is required to be set to a unique value usually assigned by your local network administrator server This is the network IP address of the machine which contains files accessible via TFTP Your local network administrator will have this information and can assist in properly configuring a TFTP server if one does not exist gateway This is the network IP address of the gateway for your local subnetwork If the client IP address and server IP address are not on the same subnetwork then this option must be properly set Your local network administrator will have this information netmask This is the network address mask to determine if use of a gateway is required This field must be properly set Your local network administrator will have this information filename This is the default filename to be used for network download if no name is provided to the DN command filetype This is the default file type to be used for network download if no type is provided to the DN command Valid values are srecord coff and elf mac This is the ethernet Media Access Control MAC address a k a hardware address for the evaluation board This should be set to a unique value and the most significant nibble should always be even Examples To set the baud rate of the board to be 19200 the
59. ate of the registers to shadow registers in the monitor for display to the user The user will be returned to the ROM monitor prompt after exception handling 2 2 2 3 Software Reset Command dBUG does have a command that causes the dBUG to restart as if a hardware reset was invoked The command is RESET 2 3 Command Line Usage The user interface to dBUG 15 the command line A number of features have been implemented to achieve an easy and intuitive command line interface dBUG assumes that an 80x24 ASCII character dumb terminal is used to connect to the debugger For serial communications dBUG requires eight data bits no parity and one stop bit 8N1 The baud rate default is 19200 bps a speed commonly available from workstations personal computers and dedicated terminals The command line prompt is dBUG gt M5249C3 User s Manual Rev 1 2 4 Freescale Semiconductor Using the Monitor Debug Firmware Any dBUG command may be entered from this prompt dBUG does not allow command lines to exceed 80 characters Wherever possible dBUG displays data in 80 columns or less dBUG echoes each character as it is typed eliminating the need for any local echo on the terminal side The lt Backspace gt and lt Delete gt keys are recognized as rub out keys for correcting typographical mistakes Command lines may be recalled using the lt Control gt U lt Control gt D and lt Control gt R key sequences lt Control gt U and l
60. bag Check the board for any visible damage Ensure that there are no broken damaged or missing parts If you have not received all the items listed above or they are damaged please contact Rapid PCB immediately for contact details please see the front of this manual 1 8 2 Preparing the Board for Use The board as shipped is ready to be connected to a terminal and power supply without any need for modification Figure 1 4 shows the position of the jumpers and connectors 1 8 3 Providing Power to the Board The board accepts three means of power supply connection either P1 P2 or J11 Connector P1 is a 2 1mm power jack P2 a lever actuated connector and J11 is a PC disk drive type power connector The board accepts 7V to 14V DC at 1 0 Amp via either of the connectors Table 1 1 Power Supply Connections on P2 Contact Number Voltage 1 7V to 14V DC 2 Ground 1 8 4 Selecting Terminal Baud Rate The serial channel UARTO of the MCF5240 is used for serial communication and has a built in timer This timer is used by the dBUG ROM monitor to generate the baud rate used to communicate with a serial M5249C3 User s Manual Rev 1 Freescale Semiconductor 1 5 M5249C3 Board terminal A number of baud rates can be programmed On power up or manual RESET the dBUG ROM monitor firmware configures the channel for 19200 baud Once the dBUG ROM monitor is running a SET command may be issued to select any baud rate
61. ddress overlaps the block defined by begin and end an error message is produced and the command exits Examples To copy a block of memory starting at 0x00040000 and ending at 0x00080000 to the location 0x00200000 the command is bm 40000 80000 200000 To copy the target code s data section defined by the symbols data start and data end to 0x00200000 the command is bm data start data end 200000 NOTE Refer to upuser command for copying code data into Flash memory M5249C3 User s Manual Rev 1 2 10 Freescale Semiconductor Using the Monitor Debug Firmware BR Breakpoints Usage BR addr lt gt lt c count gt lt t trigger gt The BR command inserts or removes breakpoints at address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Count and trigger are numbers converted according to the user defined radix normally hexadecimal If no argument is provided to the BR command a listing of all defined breakpoints is displayed The r option to the BR command removes a breakpoint defined at address addr If no address is specified in conjunction with the r option then all breakpoints are removed Each time a breakpoint is encountered during the execution of target code its count value is incremented by one By default the initial count value for a breakpoint is zero but the c option allows setting the initial count for the breakpoint Each time a break
62. de M5249C3 User s Manual Rev 1 2 2 Freescale Semiconductor Using the Monitor Debug Firmware Initialize Command Line Input From Terminal Execute Command Function A Yes Does Command Line Cause User Program Execution Jump To User Program And Begin Execution Figure 2 1 Flow Diagram of dBUG Operational Mode 2 2 2 System Initialization The act of powering up the board will initialize the system The processor is reset and dBUG is invoked dBUG performs the following configurations of internal resources during the initialization The instruction cache is invalidated and disabled The Vector Base Register VBR points to the Flash However a copy of the exception table is made at address 00000000 in SDRAM To take over an exception vector the user places the address of the exception handler in the appropriate vector in the vector table located at 0x00000000 and then points the VBR to 0x00000000 The Software Watchdog Timer is disabled and internal timers are placed in a stop condition Interrupt controller registers initialized with unique interrupt level priority pairs Please refer to the dBUG source files on the ColdFire website http www freescale com coldfire for the complete initialization code sequence After initialization the terminal will display Hard Reset DRAM Size 8M M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 3 Using the Monitor Debug Firmwa
63. default of word sized data is used The values for addresses begin and end may be absolute addresses specified as hexadecimal values or symbol names The value for data may be a symbol name or a number converted according to the user defined radix normally hexadecimal This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To search for the 16 bit value 0x1234 in the memory block starting at 0x00040000 and ending at 0x00080000 bs 40000 80000 1234 This reads the 16 bit word located at 0x00040000 and compares it against the 16 bit value 0x1234 If no match is found then the address is incremented to 0x00040002 and the next 16 bit value is read and compared To search for the 32 bit value OXABCD in the memory block starting at 0x00040000 and ending at 0x00080000 bs 1 40000 80000 ABCD This reads the 32 bit word located at 0x00040000 and compares it against the 32 bit value 0x0000ABCD If no match is found then the address is incremented to 0x00040004 and the next 32 bit value is read and compared M5249C3 User s Manual Rev 1 2 12 Freescale Semiconductor Using the Monitor Debug Firmware DC Data Conversion Usage DC data The DC command displays the hexadecimal or decimal value data in hexadecimal binary and decimal notation
64. e address according to the data size and repeats The loop terminates when an invalid entry for the data value is entered i e a period This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To set the byte at location 0x00010000 to be OxFF the command is mm b 10000 FF To interactively modify memory beginning at 0x00010000 the command is mm 10000 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 25 Using the Monitor Debug Firmware MMAP Usage Memory Map Display This command displays the memory map information for the M5249C3 evaluation board The information displayed includes the type of memory the start and end address of the memory and the port size of the memory The display also includes information on how the Chip selects are used on the board Here is an example of the output from this command Type Start SDRAM 0x00000000 Vector Table 0x00000000 USER SPAC 0x00020000 BAR 0x10000000 Internal SRAM 0x20000000 External SRAM 0x30000000 Flash OxFFE00000 Chip Selects CSO Flash CSL Ethernet controller C92 not in use CS3 not in use End Port Size 00 32 bit 0x000003FF 32 bit Ox003FFFFF 32 bit 0x100003FF 32 bit 0x20000FFF 32 bit 0x3007FFFF 32 bit OxFFFFFFFF 16 bit M
65. e register DO on MC68000 and ColdFire to contain the value 0x1234 the command is rm DO 1234 M5249C3 User s Manual Rev 1 2 28 Freescale Semiconductor Using the Monitor Debug Firmware RESET Reset the Board and dBUG Usage RESET The RESET command resets the board and dBUG to their initial power on states The RESET command executes the same sequence of code that occurs at power on If the RESET command fails to reset the board adequately cycle the power or press the reset button Examples To reset the board and clear the dBUG data structures the command is reset 5249 User s Manual Rev 1 Freescale Semiconductor 2 29 Using the Monitor Debug Firmware SET Usage Set Configurations SET lt option value gt The SET command allows the setting of user configurable options within dBUG With no arguments SET displays the options and values available The SHOW command displays the settings in the appropriate format The standard set of options is listed below baud This is the baud rate for the first serial port on the board All communications between dBUG and the user occur using either 9600 or 19200 bps eight data bits no parity and one stop bit SN1 with no flow control base This is the default radix for use in converting a number from its ASCII text representation to the internal quantity used by dBUG The default is hexadecimal base 16 and other choices are binary base 2 octal b
66. eescale Semiconductor iii M5249C3 User s Manual Rev 1 Freescale Semiconductor l4 1 2 1 3 1 4 LS 1 6 Li 1 8 L9 1 10 1 11 2 1 2 2 2 3 2 4 p EX Chapter 1 M5249C3 Board 1 1 Systemi TIES irks 1 2 Seral domat 1 3 Parae LEO POE een eter gt went ar H 1 3 Programmable Timer Ro lo eee ee 1 3 Ethernet Controller 1 3 B _ __ 1 3 1 4 1 5 8 2 Preparing fhe Board for USE 1 5 1 8 3 Providing Power to the Board 1 5 ioe eleme Terminal Baud ae 1 5 185 The Terminal Character Formiat NND 1 6 1 36 Connccime the ER 1 6 1 8 7 Using a Personal Computer asa Terminal co ction eens 1 6 System Power up and Initial Operation 1 8 1 9 1 10 Chapter 2 Using the Monitor Debug Firmware a qt A 2 1 EGR 2 2 ARM o 2 2 2 2 3 2 4 2 5 2 38 SO OUT esa a ee ee eee 2 38 252 EE El s c 2 38 203 CHAR PRESENT MAP dabit 2 39 04 ENIT TO UBL cassius doen IDEM NM M M DG M 2
67. er via the SYPCR register SWE bit 3 1 6 Interrupt Sources The ColdFire family of processors can receive seven levels of interrupt priorities When the processor receives an interrupt which has a higher priority than the current interrupt mask in the status register it will perform an interrupt acknowledge cycle at the end of the current instruction cycle This interrupt acknowledge cycle indicates to the source of the interrupt that the request is being acknowledged and the device should provide the proper vector number to indicate where the service routine for this interrupt level is located If the source of interrupt is not capable of providing a vector its interrupt should be set up as an autovector interrupt which directs the processor to a predefined entry in the exception table refer to the MCF5249 User s Manual The processor goes to an exception routine via the exception table This table is stored in the Flash EEPROM The address of the table location is stored in the VBR dBUG ROM monitor writes a copy of the exception table into the RAM starting at 00000000 To set an exception vector the user places the address ofthe exception handler in the appropriate vector in the vector table located at 00000000 and then points the VBR to 00000000 M5249C3 User s Manual Rev 1 3 2 Freescale Semiconductor Hardware Description Reconfiguration The 5249 microprocessor has eight external interrupt request lines INT
68. escale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part gt 2 freescale semiconductor Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2006 All rights reserved M5249C3UM Rev 1 07 2006 WARNING This board generates uses and can radiate radio frequency energy and if not installed properly may cause interference to radio communications As temporarily permitted by regulation it has not been tested for compliance with the limits for class a computing devices pursuant to Subpart J of Part 15 of FCC rules which are designed to provide reasonable protection against such interference Operation of this product in a residential area is likely to cause interference in which case the user at his her own expense will be required to correct the interference M5249C3 User s Manual Rev 1 Fr
69. fset gt Download Serial DN dn lt gt e lt gt s o offset gt gt filename Download Network GO go lt addr gt Execute GT gt addr Execute To HELP help command Help M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 5 Using the Monitor Debug Firmware Table 2 1 dBUG Command Summary continued Mnemonic Syntax Description ASM asm lt lt addr gt stmt gt Assemble BC be addr1 addr2 length Block Compare BF bf lt width gt begin end data lt inc gt Block Fill IRD ird lt module register gt Internal Register Display IRM irm module register data Internal Register Modify LR Ir lt width gt addr Loop Read LW Iw lt width gt addr data Loop Write MD md lt width gt lt begin gt lt end gt Memory Display MM mm lt width gt addr lt data gt Memory Modify MMAP mmap Memory Map Display RD rd lt reg gt Register Display RM rm reg data Register Modify RESET reset Reset SD sd Stack Dump SET set lt option value gt Set Configurations SHOW show lt option gt Show Configurations STEP step Step Over SYMBOL symbol lt symb gt lt a symb value lt r symb gt Cllls gt Symbol Management TRACE trace lt num gt Trace Into UPDBUG updbug Update dBUG UPUSER upuser lt bytes gt Update User Flash VERSION version Show Version M5249C3 User s Manual Rev 1 Freescale Semiconductor Using the Monitor Debug Firmw
70. he CPU clock The interface between the MCF5249 and the SMSC LAN91C111 is therefore asynchronous The Fast Ethernet controller FEC incorporates the following features Fullintegration and compliance with the IEEE 802 3 802 3u 100Base TX 10Base T physical layer standards Dual speed 10 100Mbps e 8Kbytes of internal Rx amp Tx FIFO buffers Burst transfers are supported Single 25MHz operation for both the MAC amp PHY e On chip wave shaping e On chip adaptive equaliser Baseline wander correction M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 7 Hardware Description Reconfiguration For more details see the LAN91C111 Users manual at http www smsc com The on board ROM MONITOR is programmed to allow a user to download files from a network to memory in different formats The current compiler formats supported are S Record COFF ELF or Image 3 2 5 Audio Module The MCF5249 processor s audio module includes the following features e Support for reception and transmission of digital audio over serial interfaces IIS EIAJ and digital interface IEC958 4x IIS EIAJ interfaces e 2x IEC958 receivers 4x multiplexed inputs e 1x JEC958 transmitter two outputs one with professional subcoding one with consumer subcoding e Allows direct transmission of received audio to an audio transmitter without CPU intervention JEC958 receivers and transmitter support main audio plus handling of
71. he directory used by the TFTP server A default filename for network downloads is maintained by dBUG To change the default filename use the command set filename filename When using the Ethernet network for download either S record COFF ELF or Image files may be downloaded A default filetype for network downloads is maintained by dBUG as well To change the default filetype use the command set filetype srecord coff elf image Continuing with the above example the compiler produces an executable COFF file a out This file is copied to the tftp boot directory on the server with the command rcp a out santafe tftp boot a out Change the default filename and filetype with the commands set filename a out set filetype coff Finally perform the network download with the dn command The network download process uses the configured IP addresses and the default filename and filetype for initiating a TFTP download from the TFTP server A 3 Troubleshooting Network Problems Most problems related to network downloads are a direct result of improper configuration Verify that all IP addresses configured into dBUG are correct This is accomplished via the show command Using an IP address already assigned to another machine will cause dBUG network download to fail and probably other severe network problems Make certain the client IP address is unique for the board Check for proper insertion or connectio
72. isplay the symbol table the command is symbol l 5249 User s Manual Rev 1 Freescale Semiconductor 2 33 Using the Monitor Debug Firmware TRACE Trace Into Usage TRACE lt num gt The TRACE command allows single instruction execution If num is provided then num instructions are executed before control is handed back to dBUG The value for num is a decimal number The TRACE command sets bits in the processors supervisor registers to achieve single instruction execution and the target code executed Control returns to dBUG after a single instruction execution of the target code This command is repeatable Examples To trace one instruction at the program counter the command is To trace 20 instructions from the program counter the command is er 20 M5249C3 User s Manual Rev 1 2 34 Freescale Semiconductor Using the Monitor Debug Firmware UPDBUG Update dBUG Usage updbug The updbug command is used to update the dBUG image in Flash When updates to the M5249C3 dBUG are available the updated image is downloaded to address 0x00020000 The new image is placed into Flash using the UPDBUG command The user is prompted for verification before performing the operation Use this command with extreme caution as any error can render dBUG useless M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 35 Using the Monitor Debug Firmware UPUSER Update User Flash Usage UPUS
73. k 2 Configuring dBUG Network Parameters Once the network parameters have been obtained the dBUG Rom Monitor must be configured The following commands are used to configure the network parameters set client lt client IP gt set server lt server IP gt set gateway lt gateway IP gt set netmask lt netmask gt set mac lt addr gt M5249C3 User s Manual Rev 1 Freescale Semiconductor A 1 Configuring dBUG for Network Downloads For example the TFTP server is named santafe and has IP address 123 45 67 1 The board is assigned the IP address of 123 45 68 15 The gateway IP address is 123 45 68 250 and the netmask is 255 255 255 0 The MAC address is chosen arbitrarily and is unique The commands to dBUG are set client 123 45 68 15 set server 123 45 67 1 set gateway 123 45 68 250 set netmask 255 255 255 0 set mac 00 CF 52 49 C3 01 The last step is to inform dBUG of the name and type of the file to download Prior to giving the name of the file keep in mind the following Most if not all TFTP servers will only permit access to files starting at a particular sub directory This is a security feature which prevents reading of arbitrary files by unknown persons For example SunOS uses the directory tftp boot as the default TFTP directory When specifying a filename to a SunOS TFTP server all filenames are relative to boot Asa result you normally will be required to copy the file to download into t
74. llows the memory mapping to be defined for the required memory space User Supervisor Program Data spaces All of the MCF5249 internal registers configuration registers parallel I O port registers UART registers and system control registers are mapped by the MBAR register at any 1 KByte boundary The MBARI register is mapped to 0x1000 0000 and MBAR2 mapped to 0x8000 0000 by the dBUG monitor For a complete map of these registers refer to the MCF5249 User s Manual The M5249C3 board has 8 MBytes of SDRAM installed Refer to Section 3 1 12 SDRAM for a discussion of the SDRAM on the board The dBUG ROM monitor is programmed in one AMD Am29LV160DB 90 Flash ROM which occupies 2 MBytes of the address space The first 256 K Bytes i e the first sector are used by ROM Monitor and the remainder is left for the user Refer to Section 3 1 13 Flash ROM Table 3 1 shows the M5249C3 memory map Table 3 1 M5249C3 Memory Map Address Range Signal and Device Memory Access Time 0000 0000 0002 0000 SDRAM space for dBug ROM monitor use Refer to manufacturer spec 0002 0000 007F FFFF SDRAM space Refer to manufacturer spec 1000 0000 1000 System Integration Module SIM registers Internal access 1000 0000 1000 0054 MBAR Module Base Addres Reg Refer to MCF5249UM SIM section 2000 0000 2000 FFFF SRAM1 Internal access 1 cycle 2001 0000 2001 7FFF
75. ly of processors It is a 32 bit processor with a 24 bit address bus and 16 lines of data The processor has eight 32 bit data registers eight 32 bit address registers a 32 bit program counter and a 16 bit status register The MCF5249 processor has a System Integration Module referred to as the SIM This module incorporates many of the functions needed for system design These include programmable chip select logic system protection logic general purpose I O and interrupt controller logic The chip select logic can select to four memory banks and peripherals in addition to two banks of DRAMs The chip select logic also allows the insertion of a programmable number of wait states to allow slower memory or memory mapped peripherals to be used refer to MCF5249 User s Manual for detailed information about the chip selects Two of the four chip selects are used to access devices in the system One chip select CSO is used to access the Flash ROM and the other CS1 is used to access the Ethernet controller U4 on the schematics The DRAM controller is used to control one SDRAM device providing 8MB of SDRAM memory configured as 4MBx16 words All other functions of the SIM are available to the user Figure 1 1 shows the M5249C3 block diagram M5249C3 User s Manual Rev 1 Freescale Semiconductor 1 1 M5249C3 Board 1 DB 9 1 5232 ColdFire 5249 lt drivers 25 OSC
76. may never be encountered and dBUG may never regain control Examples To pass over a subroutine call the command is step M5249C3 User s Manual Rev 1 2 32 Freescale Semiconductor Using the Monitor Debug Firmware SYMBOL Symbol Name Management Usage S YMBOL lt symb gt lt symb value lt r symb gt lt c l s gt The SYMBOL command adds or removes symbol names from the symbol table If only a symbol name is provided to the SYMBOL command then the symbol table is searched for a match on the symbol name and its information displayed The a option adds a symbol name and its value into the symbol table The r option removes a symbol name from the table The c option clears the entire symbol table the 1 option lists the contents of the symbol table and the s option displays usage information for the symbol table Symbol names contained in the symbol table are truncated to 31 characters Any symbol table lookups either by the SYMBOL command or by the disassembler will only use the first 31 characters Symbol names are case sensitive Symbols can also be added to the symbol table via in line assembly labels and ethernet downloads of ELF formatted files Examples To define the symbol main to have the value 0x00040000 the command is symbol a main 40000 To remove the symbol junk from the table the command is symbol r junk To see how full the symbol table is the command is symbol sS To d
77. me of the file must be specified to the DN command The c option indicates COFF download the e option indicates an ELF download the 1 option indicates an Image download and the s indicates an S record download The o option works only in conjunction with the s option to indicate an optional offset for S record download The filename is passed directly to the TFTP server and therefore must be a valid filename on the server If neither of the c e i s or filename options are specified then a default filename and filetype will be used Default filename and filetype parameters are manipulated using the SET and SHOW commands The DN command checks the destination download address for validity If the destination is an address outside the defined user space then an error message is displayed and downloading aborted For ELF and COFF files which contain symbolic debug information the symbol tables are extracted from the file during download and used by dBUG Only global symbols are kept in dBUG The dBUG symbol table is not cleared prior to downloading so it is the user s responsibility to clear the symbol table as necessary prior to downloading If an entry point address is specified in the S record COFF or ELF file the program counter is set accordingly Examples To download an S record file with the name srec out the command is dn s srec out To download COFF file with the name the command is dn c c
78. n ofthe network cable Is the status LED lit indicating that network traffic is present M5249C3 User s Manual Rev 1 A 2 Freescale Semiconductor Configuring dBUG for Network Downloads Check for proper configuration and operation of the TFTP server Most Unix workstations can execute a command named tftp which can be used to connect to the TFTP server as well Is the default TFTP root directory present and readable If ICMP_ DESTINATION UNREACHABLE or similar ICMP message appears then a serious error has occurred Reset the board and wait one minute for the TFTP server to time out and terminate any open connections Verify that the IP addresses for the server and gateway are correct Also verify that a TFTP server is running on the server M5249C3 User s Manual Rev 1 Freescale Semiconductor A 3 Configuring dBUG for Network Downloads M5249C3 User s Manual Rev 1 A 4 Freescale Semiconductor Appendix PAL Equations The PAL equations listed below provide simple logic equations for the memory mapped interface to the Ethernet controller U4 sheet 5 of the schematics The first equation inverts the interrupt signal from the LAN91C111 and generates an IRQ6 signal to the MCF5249 The next equation inverts the R W signal from the MCF5249 to create the W R signal required by the Ethernet controller The next two equations create the positive read RD and write WR control signals required by the LAN91C111 u
79. ndix A Configuring dBUG for Network Downloads Network Parameters aa ar cals dO on dM RD T A 1 Configuring dBUG Network ParameterS 1 Troubleshooting Network Problems RETI 2 PAL Equations Appendix C Schematics Appendix D Evaluation Board BOM Book Title Rev X vi Freescale Semiconductor Chapter 1 M5249C3 Board The M5249C3 is a versatile single board computer based on the MCF5249 ColdFire processor It may be used as a powerful microprocessor based controller in a variety of applications It serves as a complete microcomputer system for reference design development evaluation training and educational use The user need only connect an RS 232 compatible terminal or a personal computer with terminal emulation software and a power supply to have a fully functional system This board can be connected to external peripherals supplied by the user to expand memory and I O capabilities via the Expansion Bus connectors J4 amp J5 see schematic diagram Buffers may be required to compensate for bus loading if external peripherals are connected to the system 1 1 General Hardware Description The M5249C3 board provides SDRAM Flash ROM an Ethernet interface 10 100BaseT and RS 232 in addition to the built in I O functions of the MCF5249 device for programming and evaluating the attributes of the microprocessor The MCF5249 device is a member of the ColdFire fami
80. nents Cat No 5015 GND fitted for production 68 1 T1 Halo TG110 S050N5 Ethernet isolation transformer 69 1 U1 AK4360VF DAC and stereo amplifier 70 1 U2 Freescale XCF5249VF140 ColdFire V2 CPU 140MHz M5249C3 User s Manual Rev 1 Freescale Semiconductor Evaluation Board Table D 1 M5249C3 Bill of Materials continued Qty Reference Part Function 71 1 U3 Pletronics 25MHz oscillator for LAN91C111 72 1 04 SMSC LAN91C1 11 Ethernet controller 10 100BaseT 738 1 05 Lattice ispGAL22LV1 5LJ PAL22V10 3 3V in system programmable isp 74 1 06 AMD Am29LV160DB90EC 1Mx16 48pin TSSOP Flash EEPROM memory 75 1 U7 Samsung K48641633D G Synchronous DRAM 4Mx16 52PBGA 4x13 76 1 08 Linear Technology DC to DC regulator 5V to 1 8 LT1086CM 77 1 09 Maxim MAX6355LSUT T Reset controller and rail voltage sensor 5V 3 3V amp 1 8V 78 1 1910 National Semiconductor CMOS unbuffered inverter driving NC7SZU04 oscillator circuit 79 1 011 National Semiconductor DC to DC regulator 7V 14V to LM2596S 3 3 3 3V 80 1 1912 National Semiconductor DC to DC regulator 7v 14V to LM2596S 5 5V 81 2 U13 914 Maxim 225 3 3V 85232 transceivers 82 2 016 917 On Semiconductor 16bit wide bus transceivers MC74LCX16245DT 83 1 1918 TI TLC7733ID Abort switch debounce circuit 84 1 019 AKM AK5353VT Stereo audio ADC 125 85 1 HC
81. nitialized properly If you still are not receiving the proper response your board may have been damaged Contact Rapid PCB for further instructions please see the beginning of this manual for contact details 1 10 M5249C3 Jumper Setup Jumper settings are as follows NOTE is used to indicate that default setting Is used to indicate mandatory setting for proper operation Table 1 2 Jumper Settings Jumper Setting Function JP1 1 2 Audio DAC AK4360VF U1 De emphasis on 2 3 Audio DAC AK4360VF U1 De emphasis off JP2 1 2 Audio DAC AK4360VF U1 Boost high pass correction on 2 3 Audio DAC AK4360VF U1 Boost high pass correction off JP3 1 2 Audio DAC AK4360VF 1 Clock sample rate 38415 2 3 Audio DAC AK4360VF U1 Clock sample rate 256fs JP4 1 2 Audio DAC AK4360VF U1 Audio format 125 16 18 20 bit 2 3 Audio DAC AK4360VF U1 Audio format 16 bit LSB justified JP5 1 2 Not connected I2C channel 0 pull up SDAO MCF5249 U2 JP6 1 2 Not connected I2C channel 0 pull up SCLO MCF5249 U2 JP7 1 2 BDM mode selected at power on reset POR 2 3 JTAG mode selected at power on reset POR JP8 1 2 Current measurement for the CPU core 1 8V JP9 1 2 Current measurement for the CPU I O pads 3 3V JP10 1 2 BDM connector J2 I O or Pad voltage 3 3V M5249C3 User s Manual Rev 1 Freescale Semiconductor 1 9 M5249C3 Board Table 1 2 Jumper Settings continued
82. odo os1u 220 9 8049 7103 i 9 WeosuelL 22284 3dAL d AVM 6 anezo anzo 00 019 EC anro 79 1 zy NEL Le noz NO32u04 1 zo 5 Nity 20 LE 2 ee 687 T EE x 0 4 gt tlderelylvas ein Y MEER z g 5249 User s Manual Rev 1 Freescale Semiconductor C 12 Appendix Evaluation Board Table D 1 M5249C3 Bill of Materials Item Qty Reference Part Function 1 36 C3 C5 C7 C9 C15 C16 C17 C18 C 0 1uF 25V SMT Decoupling Capacitors 27 C28 C29 C30 C42 C44 C45 C46 C52 C53 C69 C70 C71 C72 C81 C82 C88 C91 C94 C 98 C102 C108 C112 C114 C124 C125 C126 C127 2 5 C4 C10 C86 C121 C122 10uF 16V Electrolytic Al SMT Capacitors 3 2 C6 C8 1uF 50V Electrolytic Al SMT Capacitors 4 5 C11 C12 C87 C90 C97 330uF 10V Tant AVX SMT Decoupling Capacitors TPSE337K10CLR 5 10 C13 C14 C99 C100 C103 C104 C 0 22uF 16 or 25V SMT Capacitors 105 C106 C109 C110 6 28 C19 C20 C21 C22 C31 C32 C33 C 1nF 50V COG SMT Decoupling Capacitors 34 C40 C43 C47 C48 C49 C50 C51 C73 C74 C75 C76 C83 C 84 C85 C95 C101 C107 C111 C11 3 C115 7 17 C23 C24 C25 C26 C35 C36 C37 C 470pF 50V COG SMT Decoupling Capacitors 38 C58 C5
83. off out To download a file using the default filetype with the name bench out the command is dn bench out To download a file using the default filename and filetype the command is dn M5249C3 User s Manual Rev 1 2 16 Freescale Semiconductor Using the Monitor Debug Firmware GO Execute Usage GO lt addr gt The GO command executes target code starting at address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name If no argument is provided the GO command begins executing instructions at the current program counter When the GO command is executed all user defined breakpoints are inserted into the target code and the context is switched to the target program Control is only regained when the target code encounters a breakpoint illegal instruction trap 15 exception or other exception which causes control to be handed back to dBUG The GO command is repeatable Examples To execute code at the current program counter the command is go To execute code at the C function main the command is go main To execute code at the address 0x00040000 the command is go 40000 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 17 Using the Monitor Debug Firmware GT Execute To Usage GT addr The GT command inserts a temporary breakpoint at addr and then executes target code starting at the current program counter The value for addr may be an
84. offers 64 bits of general purpose I O of which 11 are dedicated general purpose inputs and 10 are dedicated general purpose outputs Eight of the GPIO lines are also available as edge sensitive interrupt inputs The functions of all I O pins are individually programmable since they are multiplexed with other pin functions All general purpose I O pins unless dedicated as either only input or output can be individually selected as input or output pins After reset all software configurable multi function GPIO pins default to general purpose input pins At the same time all multifunction pins that are not shared with a GPIO pin default to high impedance Internal pullup resistors avoid unknown read values in order to reduce power consumption They remain active until the corresponding port direction registers are programmed Control registers are provided for each pin to select the function GPIO or peripheral pin assigned to each pin individually Pins can have from 1 to 4 functions including GPIO Please see the MCF5249 User s manual for more detail All of these signals are brought out to expansion connectors J4 amp J5 3 2 4 Ethernet Controller The MCF5249 device has an Ethernet controller SMSC LAN91C111 memory mapped into the address space using CS1 The Ethernet controller performs both the MAC amp PHY functions and allows 10BaseT or 100BaseT operation This controller is clocked from a standalone 25MHz oscillator independent of t
85. ogic of the MCF5249 processor can be programmed to generate an internal TA after a given number of wait states Refer to Table 3 1 for information about the address space of the memory and refer to the manufacturers specification for wait state requirements of the SDRAM and Flash ROM 3 1 12 SDRAM The M5249C3 has one 64 MBit device on the board in a 16 bit wide data bus configuration The MCF5249 processor supports one bank of SDRAM which on this board is represented by SDRAM device U7 These are connected to the MCF5249 to provide 4Mx16 of memory 3 1 13 Flash ROM There is one 2 MByte Flash ROM on the M5249C3 U6 The board is shipped with one AMD Am29LV160DB 2 MByte Flash ROM The first 256 Kbytes of the Flash contains the ROM Monitor firmware dBUG The remaining Flash memory is available to the user via use of jumper 12 The MCF5249 chip select logic can be programmed to generate the TA for CSO signal after a certain number of wait states i e auto acknowledge mode The dBUG monitor programs this parameter to be six wait states M5249C3 User s Manual Rev 1 Freescale Semiconductor 3 5 Hardware Description and Reconfiguration 3 1 14 JP12 Jumper and the User s Program Jumper 12 allows users to test code from boot POR without having to overwrite the ROM Monitor When the jumper is set between pins 1 and 2 the behavior of the system is normal dBUG boots and then runs from OxFFE00000 When the jumper is set between pins
86. ommand is asm 400000 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 7 Using the Monitor Debug Firmware BC Block Compare Usage BC addrl addr2 length The BC command compares two contiguous blocks of memory on a byte by byte basis The first block starts at address addrl and the second starts at address addr2 both of length bytes If the blocks are not identical the address of the first mismatch is displayed The value for addresses addr and addr2 may be an absolute address specified as a hexadecimal value or a symbol name The value for length may be a symbol name or a number converted according to the user defined radix hexadecimal by default Example To verify that the data starting at 0x20000 and ending at 0x30000 is identical to the data starting at 0x80000 the command is be 20000 80000 10000 M5249C3 User s Manual Rev 1 2 8 Freescale Semiconductor Using the Monitor Debug Firmware BF Block Fill Usage BF lt width gt begin end data lt inc gt The BF command fills a contiguous block of memory starting at address begin stopping at address end with the value data lt Width gt modifies the size of the data that is written If no lt width gt is specified the default of word sized data is used The value for addresses begin and end may be an absolute address specified as a hexadecimal value or a symbol name The value for data may be a symbol name or a number converted according to the
87. onsole Usage DL lt offset gt The DL command performs an S record download of data obtained from the console typically a serial port The value for offset is converted according to the user defined radix normally hexadecimal Please reference the ColdFire Microprocessor Family Programmer s Reference Manual for details on the S Record format If offset is provided then the destination address of each S record is adjusted by offset The DL command checks the destination download address for validity If the destination is an address outside the defined user space then an error message is displayed and downloading aborted If the S record file contains the entry point address then the program counter is set to reflect this address Examples To download an S record file through the serial port the command is dl To download an S record file through the serial port and add an offset to the destination address of 0x40 the command is dl 0x40 M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 15 Using the Monitor Debug Firmware DN Download Network Usage DN c lt gt lt gt lt s gt lt o offset gt lt gt The DN command downloads code from the network The DN command handle files which are either S record COFF ELF or Image formats The DN command uses Trivial File Transfer Protocol TFTP to transfer files from a network host In general the type of file to be downloaded and the na
88. point is encountered during the execution of target code the count value is compared against the trigger value If the count value is equal to or greater than the trigger value a breakpoint is encountered and control returned to dBUG By default the initial trigger value for a breakpoint is one but the t option allows setting the initial trigger for the breakpoint If no address is specified in conjunction with the c or t options then all breakpoints are initialized to the values specified by the c or t option Examples To set a breakpoint at the C function main symbol main see symbol command the command is br _ When the target code is executed and the processor reaches main control will be returned to dBUG To set a breakpoint at the C function bench and set its trigger value to 3 the command is br bench t 3 When the target code is executed the processor must attempt to execute the function bench a third time before returning control back to dBUG To remove all breakpoints the command is br r M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 11 Using the Monitor Debug Firmware BS Block Search Usage BS lt width gt begin end data The BS command searches a contiguous block of memory starting at address begin stopping at address end for the value data lt Width gt modifies the size of the data that is compared during the search If no lt width gt is specified the
89. r may not be re entered at the discretion ofthe user s program For the alternate case the command will be executed under control of the dBUG firmware and after command completion the system returns to command entry mode During command execution additional user input may be required depending on the command function For commands that accept an optional width to modify the memory access size the valid values e B 8 bit byte access W 16 bit word access e L 32 bit long access When no lt width gt option is provided the default width is W 16 bit The core ColdFire register set is maintained by dBUG These are listed below e A0 A7 e D0 D7 e PC SR All control registers on ColdFire are not readable by the supervisor programming model and thus not accessible via dBUG User code may change these registers but caution must be exercised as changes may render dBUG inoperable A reference to SP stack pointer actually refers to general purpose address register seven A7 2 2 Operational Procedure System power up and initial operation are described in detail in Chapter 1 M5249C3 Board This information is repeated here for convenience and to prevent possible damage 2 2 1 System Power up e Be sure the power supply is connected properly prior to power up Make sure the terminal is connected to TERMINAL P4 connector Turn power on to the board Figur 2 1 shows the dUBG operational mo
90. re Copyright 1995 2002 Motorola Inc All Rights Reserved ColdFire MCF5249 EVS Firmware v2e la la Build XXX on Enter help for help dBUG gt If you did not get this response check the setup refer to Section 1 9 System Power up and Initial Operation Other means can be used to re initialize the M5249C3 Computer Board firmware These means are discussed in the following paragraphs 2 2 2 1 Hard RESET Button Hard RESET S1 is the red button Depressing this button causes all processes to terminate resets the MCF5249 processor and board logic and restarts the dBUG firmware Pressing the RESET button would be the appropriate action if all else fails 2 2 2 2 ABORT Button ABORT S2 is the button located next to the RESET button The abort function causes an interrupt of the present processing a level 7 interrupt on MCF5249 and gives control to the dBUG firmware This action differs from RESET in that no processor register or memory contents are changed the processor and peripherals are not reset and dBUG is not restarted Also in response to depressing the ABORT button the contents of the MCF5249 core internal registers are displayed The abort function is most appropriate when software is being debugged The user can interrupt the processor without destroying the present state of the system This is accomplished by forcing a non maskable interrupt that will call a dBUG routine that will save the current st
91. s The board should then be connected as described in Section 1 8 6 Connecting the Terminal Once the connection to the PC is made power may be applied to the PC and the terminal emulation software can be run In terminal mode it is neccessary to select the baud rate and character format for the channel Most terminal emulation software packages provide a command known as Alt p press the p key while pressing the Alt key to choose the baud rate and character format The character format should be 8 bits no parity one stop bit See Section 1 8 5 The Terminal Character Format The baud rate should be set to 19200 Power can now be applied to the board Figure 1 3 Pin assignment for female Terminal connector Pin assignments are as follows 1 Data Carrier Detect Output shorted to pins 4 and 6 2 Receive Data Output from board receive refers to terminal side M5249C3 User s Manual Rev 1 1 6 Freescale Semiconductor a M5249C3 Board Transmit Data Input to board transmit refers to terminal side Data Terminal Ready Input shorted to pin 1 and 6 Signal Ground Data Set Ready Output shorted to pins 1 and 4 Request to Send Input Goo OY UM oix Clear to send Output 9 Not connected Figure 1 4 on the next page shows the jumper locations for the board M5249C3 User s Manual Rev 1 Freescale Semiconductor 1 7 M5249C3 Board
92. sing the R W and CSI signals from the MCF5249 Finally the reset logic of the LAN91C111 requires a positive logic RESET signal which is a simple inversion of RESET signal applied to the MCF5249 from either the BDM port reset switch S1 or power on reset POR Important Note the symbol at the start of some of the signal definitions comments out the signal Intially an asynchronous TA terminated interface was considered for the ethernet controller which is why these signals have been brought out to the PAL After initial debug of the board a simple asynchronous auto acknowledge interface with wait states set up in the chip select control register sufficed module EthernetIF title Ethernet Interface logic for the M5249C3 board March 2 2002 Revision 1 0 of the code EthernetIF device ispLSI22LV10 This abel file contains the code to interface the SMSC 10 100baseT Ethernet controller LAN91C111 NE to the MCF5249 ColdFire processor It was targeted to Lattice ispLSI 22LV10 PAL 2409 990E Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck kk kk Sk kk kk Sk kk kk Sk kk kk ko kc k X M Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck Ck kk kk Sk kk kk kk ko kc ko kc k X M Declaration Section Inputs
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94. supported by the ROM monitor Refer to Chapter 2 Using the Monitor Debug Firmware for the discussion of this command 1 8 5 The Terminal Character Format The character format of the communication channel is fixed at power up or RESET The default character format is 8 bits per character no parity and one stop bit with no flow control It is neccessary to ensure that the terminal or PC is set to this format 1 8 6 Connecting the Terminal The board is now ready to be connected to a PC terminal Use the RS232 serial cable to connect the PC terminal to the M5249C3 PCB The cable has a 9 pin female D sub terminal connector at one end and a 9 pin male D sub connector at the other end Connect the 9 pin male connector to connector P3 on the M5249C3 board Connect the 9 pin female connector to one of the available serial communication channels normally referred to as COMI 2 etc on the PC running terminal emulation software The connector on the PC terminal may be either male 25 pin or 9 pin It may be neccessary to obtain a 25pin to 9pin adapter to make this connection If an adapter is required refer to Figure 1 3 which shows the pin assignment for the 9 pin connector on the board 1 8 7 Using a Personal Computer as a Terminal A personal computer may be used as a terminal provided a terminal emulation software package is available Examples of this software are PROCOMM KERMIT QMODEM Windows 95 98 2000 Hyper Terminal or similar package
95. t Control gt D cycle up and down through previous command lines lt Control gt R recalls and executes the last command line In general dBUG is not case sensitive Commands may be entered either in uppercase or lowercase depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by using an abbreviated name For instance entering h is the same as entering help Thus it is not necessary to type the entire command name The commands DI GO MD STEP and TRACE are used repeatedly when debugging dBUG recognizes this and allows for repeated execution of these commands with minimal typing After a command is entered press the Return or lt Enter gt key to invoke the command again The command is executed as if no command line parameters were provided 2 4 Commands This section lists the commands that are available with all versions of dBUG Some board or CPU combinations may use additional commands not listed below Table 2 1 dBUG Command Summary Mnemonic Syntax Description ASM asm addr stmt Assemble BC bc addr1 addr2 length Block Compare BF bf width begin end data inc Block Fill BM bm begin end dest Block Move BR br addr lt gt c count gt lt t trigger Breakpoint BS bs width begin end data Block Search DC dc value Data Convert DI di lt addr gt Disassemble DL dl lt of
96. ta in 80 columns or less dBUG echoes each character as it is typed eliminating the need for any local echo on the terminal side In general dBUG 15 not case sensitive Commands may be entered either in upper or lower case depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by using an abbreviated name For instance entering h is the same as entering help Thus it is not necessary to type the entire command The commands DI GO MD STEP and TRACE are used repeatedly when debugging dBUG recognizes this and allows for repeated execution of these commands with minimal typing After a command is entered simply press lt RETURN gt or ENTER to invoke the command again The command is executed as if no command line parameters were provided M5249C3 User s Manual Rev 1 Freescale Semiconductor 2 1 Using the Monitor Debug Firmware An additional function called the TRAP 15 handler allows the user program to utilize various routines within dBUG The TRAP 15 handler is discussed at the end of this chapter The operational mode of dBUG is demonstrated in Figure 2 1 After the system initialization the board waits for a command line input from the user terminal When a proper command is entered the operation continues in one of the two basic modes If the command causes execution of the user program dBUG firmware may o
97. terface inline assembler and disassembly program download register and memory manipulation and I O control functions This chapter is a how to use description of the dBUG package including the user interface and command structure 2 1 What Is dBUG dBUG is a traditional ROM monitor debugger that offers a comfortable and intuitive command line interface that can be used to download and execute code It contains all the primary features needed in a debugger to create a useful debugging environment dBUG is a resident firmware package for the ColdFire family single board computers The firmware stored in one 1Mx16 Flash ROM device provides a self contained programming and operating environment dBUG interacts with the user through pre defined commands that are entered via the terminal These commands are defined in Section 2 4 Commands The user interface to dBUG 1s the command line A number of features have been implemented to achieve an easy and intuitive command line interface dBUG assumes that an 80x24 character dumb terminal is utilized to connect to the debugger For serial communications dBUG requires eight data bits no parity and one stop bit 8N1 with no flow control The default baud rate is 19200 but can be changed after the power up The command line prompt is dBUG gt dBUG command may be entered from this prompt dBUG does not allow command lines to exceed 80 characters Wherever possible dBUG displays da
98. tor Chapter 3 Hardware Description and Reconfiguration This chapter provides a functional description of the M5249C3 board hardware With the description given here and the schematic diagrams in Appendix C Schematics the user can gain a good understanding of the board s design In this manual an active low signal is indicated by a bar over the signal name 3 1 The Processor and Support Logic This part of the chapter discusses the CPU and general support logic on the M5249C3 board 3 1 1 Processor The microprocessor used on the M5249C3 is the highly integrated ColdFire MCF5249 32 bit processor The MCF5249 implements a ColdFire Version 2 core with 8 K Byte instruction cache two channels two timers 96 KBytes of SRAM a QSPI Queued Serial Peripheral Interface module an EC module 4x 125 modules an IDE module a Flash memory stick interface 64 parallel I O ports which are multiplexed with other signals and the system integration module SIM All of the core processor registers are 32 bits wide except for the Status Register SR which is 16 bits wide This processor communicates with external devices over a 16 bit wide data bus D 31 16 The chip can address 64 MBytes of memory space using a 25 bit wide address bus and internal chip select logic All the processor s signals are available through the expansion connectors J4 and J5 Refer to Section 3 3 1 Expansion Connectors J4 and J5 for their pin assignments
99. tor Base Register VBR contains an address which initially points to the Flash memory The contents of the exception table are written to address 00000000 in the SDRAM The Software Watchdog Timer is disabled the Bus Monitor is enabled and the internal timers are placed in a stop condition The interrupt controller registers are initialised with unique interrupt level priority pairs A memory map for the entire board can be seen in Table 3 1 3 1 3 HIZ Signal The assertion of the HIZ signal forces all output drivers to a high impedance state On the M5249C3 board the high impedance signal is pulled to 3 3V via a 4 7K pull up resistor ensuring that the output drivers will not be in a high impedance state during reset HIZ is also available to the user on connector J5 3 1 4 Clock Circuitry The M5249C3 board uses a 11 2896MHz crystal X1 on the schematics to provide the clock to the clock driver chip U10 The clock driver provides a buffered clock for the MCF5249 processor U2 In addition to the 11 2896MHz crystal there is also a 25MHz oscillator U3 which feeds the Ethernet chip 04 3 1 5 Watchdog Timer The duration of the Watchdog is selected by the SWT 1 0 bits in the System Protection and Control Register SYPCR SWT 1 0 11 gives a maximum timeout period of pen System frequency The dBUG monitor initialises these bits with the value Ox11 which provides the maximum time out period but dBUG does NOT enable the watchdog tim
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M5249C3 User`s Manual - Freescale Semiconductor

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