Home

X10QBi Platform

Contents

1. 9 o o o g EE o Tm ti o o o o Oo 22 o e o eo pp og Eo uU d i 3 P 2 e gogl bp ESE IS BES S S e SPER SHS Sa Eee Sy ier ee eie B ES DES LEDIA o satas 8 Ee EST IS D ES E ayes sbisriasliz E uw BOR Bu c 3 3 3 3 SATA4 el Io B is 2 2 euer istis B m m an m 5 g misi IS 8 t Jot SI IS Le S SAS eRe L SATAS B 5g E EXP 2 d EY x S ul ES x rSrA2 8 si 8 Xl LEDIO1 E B BS JBT1 ds ig KSATAO 5 9 E VRM 1210 E i E Jj E BI LEM eos E gs Ba Jg 3 Z BS ils E B 3 s B JPME2 er eo R f JPME1 prs i JPSERUP1 LE ad 3 B IMs LED28 a q LED235 3 Jeta AED2 4 E lo 1 i g Peif ii SUPE X10GBi el V BAR CODES die E 1 g A T IS D PORT80 O we H 2 j ceu 9 Wa So CPU 96 amp g a Kg Za 9 r CLO aoi F CLOSE tu g te iq J ie PEN ist J a ur 9y Gr ge 9 9 9 S x JXDP3 Bg JXDP2 Ea Zdr EJ PNVS o oO S FEJ NVA ZNV JPW4 JPWS JPW6 SPW N P009 Sg Onn 0000 G00 so EBXEH oER GU0Q JPW2 amp JPW1 JPW Note PCI E slots and CPU below for PCI E slot support o support auto switching Refer to the table PCI E Expansion Slots CPU su
2. Notes 1 For detailed information on memory support and updates please refer to the SMC Recommended Memory List posted on our website at http www supermicro com support resources mem cfm 2 1 35V DIMMs are not supported by the 3PDC configuration Intel E7 Series Processor RDIMM and LRDIMM Memory Configuration for Lockstep Mode 1 1 Type Ranks Maximum DIMM Speed GHz and Voltage V Validated by Slot per Channel SPC and DIMM Per Capacity Per Channel DPC DIMM amp 2 Slots Per Channel 3 Slots Per Channel Data 2GB 4GB Width 1DPC 2DPC 1DPC 2DPC 3DPC 1 35V 1 5V 1 35V 1 5V 1 35V 1 5V 1 35V 1 5V 1 5V RDIMM SRx8 4GB 8GB 1333 1600 1333 1600 1333 1333 1066 1333 1066 1600 1333 RDIMM DRx8 8GB 16GB 1333 1600 1333 1600 1333 1333 1066 1333 1066 1600 1333 RDIMM SRx4 16GB 32GB 1066 1066 1066 1066 1066 1066 N A N A N A 1333 1333 LRDIMM DRx4 16GB 32GB 1333 1600 1333 1600 1333 1600 1333 1600 1333 1600 1600 LRDIMM QRx4 32GB 64GB N A 1066 N A 1066 N A 1066 N A 1066 1066 RM Notes 1 For detailed information on memory support and updates please refer to the SMC Recommended Memory List posted on our website at http www supermicro com support resources mem cfm 2 1 35V DIMMs are not supported by the 3PDC configuration Note 1 For the memory modules to work properly please install DIMM mo
3. 5 pe S SEEN amp JM 2 31 SUPER Xx10GBi Platform User s Manual Universal Serial Bus USB On Type A USB USB 0 1 2 3 6 7 the Main Board USB4 USB5 Pin Definitions Fin Definitions USB 0 2 6 USB 1 3 7 Three Universal Serial Bus headers pins Definition Pin Definition Pin Definition provide six USB connections USB 5v 1 5V 1 5V 0 1 2 3 6 7 on the baseboard Ad 5 PO 2 PO 2 PO ditionally two Type A USB connectors mes 3 PO 3 PO USB4 USB5 are also located on Ground 4 Ground 4 Ground the board Cables are not included na 5 NC 5 Key NC No connection Refer to the tables on the right for pin definitions e o o o PE A USBO 1 ive FS o OO o o Opg B USB2 3 El el fe je ke 2 ATE gl jel fel fe LSA EISE AL HEH 2 EIEIEIE D USB4 lo oO hi 9 cm D g bl v ka sataa B el elella 3 SE EI ef lef ASHES E USB5 oy ie es m mu Phata E Eaa a satas g Ol SI g S 8 8 S o 8lle s ta A iwo ast ps amp 3 i E S xlix x LSATA2 E 3 g ig EI LEDIO1 Jen S 2 g JI2C1 Bo eg 2 E o d E HE 3 E uel ong an JPORRUP1 LED15 x SRI M
4. 4 44 MEC EC E AN E E EIE 4 48 48 Save amp Eito A a ee een 4 50 Appendix A BIOS Error Beep Codes A 1 BIOS Error Beep Codes esige i Grace edet ceci ese ee A 1 Appendix B Software Installation Instructions B 1 Installing Software Programs ssssssssssseseeeeeeee nennen B 1 B 2 Configuring SuperDoctor lll otio e cepe Petite feared B 2 Appendix C UEFI BIOS Recovery Instructions C 1 An Overview to the UEFI BIOS iren a Tee rbi ne p pt C 1 C 2 How to Recover the UEFI BIOS Image the Main BIOS Block C 1 C 3 How to Recover the Main BIOS Block Using a USB Attached Device C 1 Appendix D Dual Boot Block p Mee R D 1 D 2 Steps to Reboot the System by Using Jumper JBR1 sssuusss D 2 viii Chapter 1 Overview Chapter 1 Overview 1 1 Overview Checklist Congratulations on purchasing your computer system from an acknowledged leader in the industry Supermicro s systems are designed with the utmost attention to detail to provide you with the highest standards in quality and performance For more information regarding this product please visit our website at www supermicro com Note 1 The X10QBi A baseboard is intended to be used in conjunction with the AOM X10QBi A I O module and the X10QBi MEM1 memory card as an integrated server platform It is not to be used as a stand alone produc
5. cocoon 0000 TODOOOUD oogo0000 SUPER x10QBi Platform User s Manual BMC Enable On the I O Module Jumper JPB1 allows you to enable the BMC controller on the X10QBi A I O module for IPMI KVM support Refer to the table on the right for jumper settings VGA Enable On the I O Module Jumper JPG1 allows the user to enable VGA Ports 1 2 support on the I O mod ule The default setting is 1 2 to enable the connection Refer to the table on the right for jumper settings AVO OQBI A LAN CTRL o exor 3 LED28 JEDUID1 2 34 BMC Enable Jumper Settings Jumper Setting Definition Pins 1 2 BMC Enable Pins 2 3 Normal Default VGA Enable Jumper Settings Jumper Setting Definition 1 2 Enabled Default 2 3 Disabled A BMC Enable B VGA Enable oo oo oo 8 oo o BMC UOOUEU OOO00000 Chapter 2 Installation CMOS Clear JBT1 is used to clear the CMOS Instead of pins this jumper consists of contact pads to prevent the accidental clearing of the CMOS To clear the CMOS use a metal object such as a small screwdriver to touch both pads at the same time to short the connection Always remove the AC power cord from the system before clearing the CMOS F3 Note 1 For an ATX power supply you must completely shut down the sys l tem remove the AC power cord and then short JBT1 to clear the CMOS
6. Number of CPU e Number of IIO Link Speed Current QPI Link Frequency QPI Global MMIO Low Base Limit e QPI Global MMIO High Base Limit QPI PCI E Configuration Base Siz Size QPI Link Speed Mode Use this feature to select the data transfer speed for QPI Link connections The options are Fast and Slow Current QPI Link Frequency Use this feature to select the desired frequency for QPI Link connections The options are 6 4GB s 7 2GB s 8 0GB s Auto and Use Per LInk Setting Link LOp Enable Select Enable for Link LOp support The options are Enable Auto and Disable Link L1p Enable Select Enable for Link L1p support The options are Enable Auto and Disable 4 21 SUPER X10QBi Platform User s Manual MMIO P2P Disable Select No to prevent MMIO Memory Mapped 1 0 P2P PCI E device to PCI E device signals from crossing the CPU socket The options are No and Yes PPIN Opt in Select Yes to use the Protected Processor Inventory Number PPIN in the System The options are No and Yes Resource Auto Adjust Select Enable for the PCI resource requests for each CPU socket to be auto matically adjusted on the need base when the PCI resource allocator fails The options are Enable and Disable P QPI Per Socket Configuration P CPU 0 CPU 1 CPU 2 CPU 3 Bus Resource Allocation Ratio Use this feature to set the bus resource allocation ratio from 0 8 The default setting is 1 IO Resource Allo
7. 1 The X10QBi baseboard supports MEM 1 memory cards with two memory cards per CPU Please refer the table below a n 1 fy EERE ERM 2 Each X10QBi MEM1 memory card a U ol Gi gl o aji S supports up to 12 modules of DDR3 ol BRIR IR ERIE E LI zzz Ssh ECC RDIMM LRDIMM memory of SW i ST HE e up to 1600 MHz With eight cards installed on the baseboard the X10QBi supports up to 96 modules with a total size of 6TB supported Wrd 301s INS inum JoIS INS mme R E ee eee iE 3 When installing a DIMM module on a memory card be sure to press the module straight down into the slot until it is properly seated and the PRES ENT_LED is on Also be sure to always install the DIMM modules in the blue slots first starting with DIMMA1 DIMMB1 DIMMC1 DIMMD1 Installing Memory Cards to the Baseboard After populating DIMMs on the memory cards follow the table below to install the memory cards that are populated with DIMM modules on the baseboard CPUs and the Corresponding Memory Cards CPU Corresponding DIMM Modules No of card s for One 1 Memory Card for each CPU Installed Two 2 Memory Cards for each Each CPU on the baseboard CPU Installed on the baseboard CPU 1 SMI Slot P1M1 populate this slot first SMI Slot P1M1 SMI Slot P1M2 CPU 2 SMI Slot P2M1 populate this slot first SMI Slot P2M1 SMI Slot P2M2 CPU 3 SMI Sl
8. Note 2 Be sure to remove the onboard CMOS Battery before you short JBT1 to clear the CMOS Note 3 Clearing the CMOS will also clear any passwords Watch Dog Enable Disable Watch Dog Watch Dog JWD1 is a system monitor that can Jumper Settings reset the system when a software application Jumper Setting Definition hangs Close pins 1 2 to reset the system if an Pins 1 2 Reset default application hangs Close pins 2 3 to generate a Pins 2 3 NMI non maskable interrupt signal for the applica Open Disabled tion that hangs Refer to the table on the right for jumper settings Watch Dog must also be enabled in the BIOS A Clear CMOS A e ggo o o ogg e B Watch Dog Enable B zz E aid LOTS INS Wed 107S INS 8X 0 E 3 0d SLOTS zd 8X 0 33d 9101S endo ZNEd 107S INS 8X 0 319d 81075 PNdI 94X 0 E Hd 6107S ENdO 8X O E 310d OLLOTS pNdd 9 S o E E m x B HN LSATAS i LSATA2 a LEDION LSATAO 5 LEd LOTS IWS guPME2 JPMET JPSREJP LED15 J LED28y LED234e 1rd LOTS INS JM2 sprigp LED pct fi XE B ig LED PORT amp O vee F CLOSE tst_ y orents O 3 Ng
9. The options are S1 CPU Stop Clock and Suspend Disabled Lock Legacy Resources Select Enabled to lock resources of legacy devices The options are Disabled and Enabled gt Super IO Configuration Super IO Chip This item displays the Super IO chip used in the motherboard P Serial Port 0 Configuration Serial Port Select Enabled to enable a serial port specified by the user The options are En abled and Disabled Device Settings This item displays the settings of Serial Port 1 COM 4 37 SUPER X10QBi Platform User s Manual Change Settings This option specifies the base I O port address and the Interrupt Request address of Serial Port 1 COM Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port becomes unavailable The options are Auto O 3F8h IRQ 4 O 3F8h IRQ 3 4 5 6 7 10 11 12 IOz2F8h IRQ 3 4 5 6 7 10 11 12 IO 3E8h IRQ 3 4 5 6 7 10 11 12 IO 2E8h IRQ IRQ 3 4 5 6 7 10 11 12 Device Mode Use this feature to select the desired mode for a serial port specified The options are 24MHz 13 and 24MHz P Serial Port 1 Configuration Serial Port Select Enabled to enable a serial port specified by the user The options are En abled and Disabled Device Settings This item displays the settings of Serial Port 1 Change Settings This option specifies the base I O port address and the Interrup
10. Warning Do not upgrade the BIOS unless your system has a BIOS related issue Flashing the wrong BIOS may cause irreparable damage to the system In no event will Supermicro be liable for direct indirect special incidental or consequential damages arising from a BIOS update If you need to update the BIOS do not shut down or reset the system while the BIOS is updating to avoid possible boot failure C 1 An Overview to the UEFI BIOS The Unified Extensible Firmware Interface UEFI specification provides a software based interface between the operating system and the platform firmware in the pre boot environment The UEFI specification supports an architecture independent mechanism for add on card initialization to allow the UEFI OS loader which is stored in the add on card to boot up the system UEFI offers a clean hands off control to a computer system at bootup C 2 How to Recover the UEFI BIOS Image the Main BIOS Block A UEF BIOS flash chip consists of a recovery BIOS block comprised of two boot blocks and a main BIOS block a main BIOS image The boot block contains critical BIOS codes including memory detection and recovery codes for the user to flash a new BIOS image if the original main BIOS image is corrupted When the system power is on the boot block codes execute first Once that is completed the main BIOS code will continue with system initialization and bootup Note Follow the BIOS Recovery instructions below fo
11. 2 5 GT s GEN2 5 GT s and Auto Override Max Link Width This item allows the user to set the link speed for a selected PCI E port to over ride the maximum link width which was previously set by PCI Bifurcation The options are Auto x1 x2 x4 x8 and x16 PCI E Port DeEmphasis Use this item to select the De Emphasis control setting for a PCI E port specified by the user The options are 6 0 dB and 3 5 dB PCI E ASPM Support Select Enable to support the Active State Power Management ASPM level for a PCI E port specified by the user Select Disabled to disable ASPM support The options are Disable and L1 Only Fatal Err Error Over Select Enable to force the fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable Non Fatal Err Error Over Select Enable to force the non fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable Corr Correctable Err Error Over Select Enable to force the correctable error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable 4 14 Chapter 4 AMI BIOS LOs Support When this item is set to Disable IIO will never put its transmitter in the LOs state The options are Disable and Enable PM ACPI Support Select Enable to generate an HPGPE message on a PM ACPI event Select Disable to generate an
12. 8 pin PWR Req d D JPW4 8 pin PWR Req d E JPW5 8 pin PWR Req d E JPW6 8 pin PWR Req d G JPW7 8 pin PWR Req d H JSD1 SATA Device PWR Req d for SATA devices SUPER Xx10GBi Platform User s Manual Fan Headers The X10QBi system board has ten sys tem fan headers and ten CPU card fan headers All these are 4 pin fans and are backward compatible with the traditional 3 pin fan Fan speed control is available via IPMI interface for 4 pin fans only See the tables on the right for more information Chassis Intrusion A Chassis Intrusion header is located at JL1 on the system board Attach an appropriate cable from the chassis to be informed of possible chassis intrusion when the chassis is opened Fan Header Pin Definitions 1 2 3 4 Pin Definition 12V Tachometer PWR Modulation 4 pin fans only Chassis Intrusion Pin Definitions Pin Definition ji Intrusion Input 2 Ground Ea 9 g E aa ie 2 H elle ea Eg fa 1 elje KSATAS B s g Pa alpe alle 3 E a eg S EIS 1 alis EVE s El se SU z 1 EIAS 3 I E zm m z 1 m d e E Sc Ses ss E 8 eS p g rsa a E 8 1 E x saree Ps e BH j B LEDION E e d Ta 4 1 KSATAO EUM 2 Ez om IR T i 8 1 ivi gupuE2 gt iewes Te JPSBEJP LED15 1 Ba JMS J pj LED28 LEDa I
13. Blue LED Cathode Fan Fail FP UID connection on pins t 7 and 8 of JF1 to provide advanced UD LED eee warnings of chassis overheating or fan failure It also works as the front d M panel UID LED indicator The red LED State Definition takes precedence over the blue LED Off isst by default Refer to the table on the On Gieiheat right for pin definitions Flash Fan Fail ing Power Fail LED PWR Fail LED The Power Fail LED connection is NUES MEN located on pins 5 and 6 of JF1 Re fer to the table on the right for pin definitions Pin Definition 5 sav 6 PWR Supply Fail A Front UID LED Blue B OH Fail PWR Fail LED Red eo X to eal o C PWR Supply Fail empero d NMI x x FP PWRLED 3 3V i HDD LED 3 3V SUPER X10QBi mws SETE Fe NIC1 Link LED NIC1 Active LED MALGOOE ICE Mac cone NIC2 Link LED NIC2 Active LED Red OH Fan Fail WR FaiL Power Fail LED Blue Led Cathode UID C 3 3V ONIN P Ground Reset Reset Button Ground PWR gt Power Button SUPER X10GBi Platform User s Manual Reset Button Reset Button Pin Definitions JF1 The Reset Button connection is located on pins 3 and 4 of JF1 Attach it to a hardware reset switch on the computer case
14. Intel Intelligent Power Node Manager NM Available when the NMView tility is mstallediin the System coser coercere exces arena fer trem peer creen 1 18 Management Engine ME mre nes 1 18 Chapter 2 Installation Standardized Warning Statements sse 2 1 Static Sensitive Devices reete erret n there EEE EXER ERE RR E 2 4 Processor and Heatsink Installation cr terr rrr roy tere 2 5 Installing the E7 4800V2 Processor s on the Main Board 2 5 Installing a Passive CPU Heatsink seesesssseeeenseeeeennen 2 9 Removing the Heatsink orte pe op eto ap tete 2 10 I O Module and Memory Card Installation eessesess 2 11 Installing the AOM X10QBi A I O Module on the Mainboard 2 11 Installing the System Motherboard into the Chassis sssssss 2 15 Tools Needed Memory Support for the X10QBi Platform ssseeee 2 16 Installing Memory Cards on the Baseboard ssssssee 2 16 Installing Memory Cards to the Baseboard ssssssese 2 16 VO Module Connectors Ports cnn trn rre 2 18 Serial Ports COM1 On the I O Module COM2 On the Baseboard 2 19 Video Connectors On the I O Module Ethernet Ports On the IO Module cerent eene Unit Identifier Switch LEDs On the I O Module ssss 2 21 Fron
15. Question What are the various types of memory that my system mother board can support Answer The X10QBi supports Registered RDIMM Load Reduced LRDIMM ECC DDR3 of up to 1600 MHz memory It is strongly recommended that you do not mix memory modules of different types speeds and sizes Please follow all memory installation instructions given in the memory section in Chapter 2 Question How do update my BIOS It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system Updated BIOS files are located on our website at http www supermicro com Please check our BIOS warning message and the information on how to update your BIOS on our website Select your motherboard model and download the BIOS file to your computer Also check the current BIOS revision to make sure that it is newer than your BIOS before downloading You can choose from the zip file or the exe file If you choose the zip BIOS file please unzip the BIOS file onto a bootable USB device Run the batch file using the format AMI bat filename rom from your bootable USB device to flash the BIOS Then your system will automatically reboot Warning Do not shut down or reset the system while updating BIOS to prevent pos sible system boot failure f Note The SPI BIOS chip used in this system board cannot be removed Send your system board back to our RMA Department at Supermicro for repair For BIOS Recovery instructions
16. please refer to the AMI BIOS Recovery Instructions posted at http www supermicro com Question What s on the CD that came with my system motherboard Answer The supplied compact disc has drivers and programs that will greatly enhance your system performance We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for the Windows OS security and audio drivers 3 6 Chapter 3 Troubleshooting Question How do I handle the used battery Answer Please handle used batteries carefully Do not damage the battery in any way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly 3 5 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and the package should be mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete For faster service you can also request
17. reinstalling the CPU and the heatsink Loosen screws in the sequence as shown Screw 1 Mounting Holes 2 4 Chapter 2 Installation 1 0 Module and Memory Card Installation Installing the AOM X10QBi A I O Module on the Mainboard Note After you ve installed the CPUs and heatsinks on the baseboard turned on be sure to install the AOM X10QBi A I O module card on the SIO slot as shown on the figure below before you power on the system Without the I O module being installed on the motherboard your system cannot be AOM X10QBi A I O Module T Q9 LAN CTRL BMC oia ua DUDI E E E I O Port Locations and Definitions A JVGA1 VGA Video Connector 1 B JLAN2 LAN Port2 C JLAN1 LAN Port1 D JLAN3 BMC IPMI LAN Jumpers E UID Unit Identifier Switch amp UID LED Blue Unit Identified F JVGA2 VGA Video Connector 2 G JCOM1 COM Connection 1 1 JPL1 LAN Enable Disable Default Pins 1 2 Enabled 2 JPB1 BMC Enable Disable Default Pins 1 2 Enabled 3 JPG1 VGA Enable Disable Default Pins 1 2 Enabled 2 11 SUPER X10GBi Platform User s Manual Installing DIMM Modules on the X10QBi Memory Card CAUTION Exerc
18. slots for eight X10QBi MEM1 memory cards with MEM Card two memory cards per CPU SMI Slots P1M1 P1M2 for CPU1 SMI Slots P2M1 P2M2 for CPU2 SMI Slots P3M1 P3M2 for CPUS and SMI Slots P4M1 P4M2 for CPU4 2 Each X10QBi MEM1 memory card supports up to 12 modules of DDR3 ECC RDIMM LRDIMM memory with speeds of up to 1600 MHz With eight cards installed the X10QBi platform supports up to 96 memory modules with the total memory size of 6TB supported e RDIMM 16GB 32GB and 64GB LRDIMM Chipset Intel Intel 602J PCH Expansion e Four 4 PCI E 3 0 x16 Slot2 Slot4 Slot9 Slot11 Slots See e Seven 7 PCI E 3 0 x8 Slot1 Slot3 Slot5 Slot6 Slot7 Page 1 8 Slot8 Slot10 I O Module One 1 SIO Slot for AOM X10QBi A module Slot Graphics e ASP2400 BMC Video Controller Matrox G200eW Network One Intel Gigabit Ethernet Dual Channel Controller for LAN 1 LAN 2 ports One IPMI LAN 2 0 port supported by the BMC I O Devices SATA Connections SATA Six 6 SATA Ports l SATAO 5 e RAID Windows RAID 0 1 5 10 Integrated IPMI 2 0 e IPMI 2 0 supported by the ASP2400 BMC Serial COM Port SUPERO X100GBi F Platform User s Manual One 1 Fast UART 16550 Connection on the AOM X10QBi A I O module for backpanel support One Front Accessible Serial Header located on the X10QBi system board Baseboard Controller ASP2400 Peripheral USB Devices Devices Three 3 U
19. x 17 0 W 482 60mm x 431 80 mm X10QBi system motherboard Notes 1 For IPMI configuration Instructions please refer to the Embedded IPMI Configuration User s Guide available http www supermicro com sup port manuals 2 For PCI E expansion slots to work properly please refer to the instruc tions listed on page 1 8 SUPERO X100QBi F Platform User s Manual X10QBi System Block Diagram duod SMIZCHOS ZGT QPI 9 6 GT s Connector aes lt gt Power suas SMl2 CH0 3 2GTIS j suzsa Connector CEE m Power Ssuccraazarg MET emerat Sw cHS32GT TGT mecs crue sapoe Gaei eset c 96 n Saco SMI2 CH0 3 2GTIS za s gue CAE ee cu Ssua craa26rk zR METURTET Gem fend PCIE G3x32 LANEs e PCIE G3x24 8 x Y USB gt PCIE xt gt LPC gt gt zm n PI 9 6 GT s QPI 9 6 GT s R A Pu E M 9 6 GT s E System Block Diagram Note This is a general block diagram and may not exactly represent the 4 features on your system motherboard See the System Platform Features pages for the actual specifications of the system 1 14 Chapter 1 Overview 1 2 Processor PCH Platform Overview Built upon the functionality and capability of the Intel E7 series processor s and the 602J PCH the X10QBi system provides support for quad processor based HPC
20. 8 Chapter 4 AMI BIOS performance Select Disabled to disable power saving settings The options are Disabled Energy Efficient and Custom If the option is set to Custom the following items will display gt CPU P State Control Available when Power Technology is set to Custom EIST P states EIST Enhanced Intel SpeedStep Technology allows the system to automatically adjust processor voltage and core frequency to reduce power consumption and heat dissipation The options are Disabled and Enabled Turbo Mode Select Enabled to use the Turbo Mode to boost system performance The options are Enabled and Disabled P state Coordination This feature is used to change the P state Power Performance State coordi nation type P state is also known as SpeedStep for Intel processors Select HW ALL to change the P state coordination type for hardware components only Select SW ALL to change the P state coordination type for all software installed in the system Select SW ANY to change the P state coordination type for a soft ware program in the system The options are HW All SW ALL and SW ANY gt CPU C State Control Available when Power Technology is set to Custom C2C3TT C2 to C3 Transaction Timer This feature is used to set the transaction timer from C2 to C3 Enter 0 for Auto which will allow the BIOS to configure the transaction timer automatically The Default setting is 0 Auto Package C State limit Use
21. Cluster Database server platforms With the Intel QuickPath interconnect QPI controller built in the E7 series proces Sor offers a point to point system interconnect interface greatly enhancing system performance by utilizing serial link interconnections which allows for increased bandwidth and scalability The 602J PCH provides an Interface between the QPI based processor and PCI Express components Each processor supports full width bidirectional intercon nects at the speeds of 6 4 GT s 7 2 GT s and 8 0 GT s Each QPI link consists of 20 pairs of unidirectional differential lanes for data transmission in addition to a differential forwarding clock The x16 PCI Express Gen 3 connections can also be configured as x8 x4 and x2 links to comply with the PCI E Base Specifica tion Rev 2 0 These PCI E Gen 3 lanes support peer to peer read and write transactions The 602J PCH also offers a wide range of ESI Intel I OAT Gen 3 Intel VT d and RAS Reliability Availability and Serviceability support The features supported include memory interface ECC x4 x8 Single Device Data Correction SDDC Flow through CRC Cyclic Redundancy Check parity protection out of band register access via the SMBus and memory mirroring for data integrity Main Features of the 602J PCH Chip Full connectivity with four Intel QuickPath Interconnects and up to ten cores in each socket with 24MB of shared last level L3 cache supported e CPU i
22. DHCP is selected the BIOS will search for a DHCP Dynamic Host Configuration Protocol server in the network that is at tached to and request the next available IP address for this computer The options 4 43 SUPER X10QBi Platform User s Manual are DHCP and Static The following items are assigned IP addresses automatically if DHCP is selected or can be configured manually if Static is selected Station IP Address This item displays the Station IP address for this computer This should be in decimal and in dotted quad form i e 192 168 10 253 Subnet Mask This item displays the sub network that this computer belongs to The value of each three digit number separated by dots should not exceed 255 Station MAC Address This item displays the Station MAC address for this computer Mac addresses are 6 two digit hexadecimal numbers Router IP Address This item displays the Router IP address for this computer This should be in decimal and in dotted quad form i e 192 168 10 253 Router MAC Address This item displays the Router MAC address for this computer 4 4 Security This menu allows the user to configure the following security settings for the system Administrator 4 44 Chapter 4 AMI BIOS Administrator Password Use this feature to set the administrator password which is required to enter the BIOS setup utility The length of the password should be from 3 characters to 20 characters long User P
23. Definitions The JOH1 header is used to connect Pin Definition an LED indicator to provide warnings 1 5vDC of chassis overheating or fan failure E 2 OH Acti This LED will blink when a fan failure _ occurs Refer to the table on right for OH Fan Fail LED OT Status pin definitions State Message Solid Overheat Blinking Fan Fail T SGPIO 1 2 Headers T SGPIO Pin Definitions Two SGPIO Serial Link General Pin Definition Pin Definition Purpose Input Output headers are 1 NC 2 NC located on the baseboard These n 3 Ground 4 Data headers support serial link interface for onboard SATA connections Refer 3 d S Ud to the table on the right for pin defini T Clock 8 NC tions o o o o o A Overheat LED o ORRO o o O EE zg B T SGPIO1 efie sn Fis 5 ensnsfis 21 ce we met SIE IBIE C T SGPIO2 rens esl P oe E de isle HSATA2 B E e le su amp LEDION gn S 2 x T Jig E S o 3 3 C KSATAO 3 eo m h z JVRM I2C E e3 8 E e iS A S s tpi EE JP5R JP1 LED15 ie 3 LED28y ana 101s ws mis l M Eje E N sew ED amp g sg 20 B sz ag ob E 3 Sey SZ 22 lean A p J
24. Non Fatal Err Error Over Select Enable to force the non fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable Corr Correctable Err Error Over Select Enable to force the correctable error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable LOs Support When this item is set to Disable IIO will never put its transmitter in the LOs state The options are Disable and Enable 4 17 SUPER X10QBi Platform User s Manual PM ACPI Support Select Enable to generate an HPGPE message on a PM ACPI event Select Disable to generate an MSI message The options are Disable and Enable Gen3 Generation 3 Eq Equalization Mode Use this item to set the Adaptive Equalization mode for PCI E Generation 3 devices The options are Auto Enable Phase 0 1 2 3 Disable Phase 0 1 2 3 Enable Phase 1 Only Enable Phase 0 1 Only and Advanced Gen3 Generation 3 Spec Specifics Mode Use this item to set the Specifics mode for PCI E Generation 3 devices The options are Auto 0 70 July 0 70 Sept and 071 Sept Gen3 Generation 3 Phase2 Mode Use this item to set the PCI E Generation 3 Phase 2 mode The options are Hardware Adaptive and Manual Gen3 Generation 3 DN TX Preset Use this item to set the Preset mode for PCI E Gen3 downstream transactions from the master device to a slave device The opti
25. PWRLED 3 3V HDD LED 3 3V NIC1 Link LED NIC1 Active LED NIC2 Link LED NIC2 Active LED Red OH Fan Fail Blue Led Cathode PWR FaiL UID Power Fail LED 3 3V Ground Reset Reset Button PWR Power Button Chapter 2 Installation Front Control Panel Pin Definitions NMI Button NMI Button The non maskable interrupt button PE RATNO EEN header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions Pin Definition 19 Control Ground Power LED Power LED Pin Definitions JF1 The Power LED connection is located on pins 15 and 16 of JF1 Refer to the table on the right for pin definitions Pin Definition 15 3 3V PWR LED A NMI a B PWR LED L IB R 20 19 B Groun alo NMI G 4 i r5 x olo x B FP PWRLED olo sv HDD LED olo sav TI NIC1 Link LED oO NIC1 Active LED NIC2 Link LED O NIC2 Active LED ed OH Fan Fail olo Blue Led Cathode PWR FaiL UID Power Fail LED 4 olo 3 3V d Ground Reset gt Reset Button Ground PWR gt Power Button SUPER X10GBi Platform User s Manual HDD LED The HDD LED connection is located on pins 13 and 14 of JF1 Attach a cable here to indicate HDD activity Refer to the tab
26. RAM L2 Cache RAM L3 Cache RAM Processor 0 Version Processor 1 Version Processor 2 Version Processor 3 Version Clock Spread Spectrum Select Enable to allow the BIOS to monitor and attempt to reduce the level of Electromagnetic Interference caused by the components whenever needed The options are Disable and Enable Hyper Threading Select Enable to support Intel s Hyper threading Technology to enhance CPU per formance The options are Enable and Disable Performance Watt Select Power Optimized to enable Intel amp Turbo Boost Technology support when the Power Performance State PO has lasted more than two seconds The options are Traditional and Power Optimized Clear MCA Available if supported by the OS amp the CPU Select Yes to enable Machine Check Architecture MCA support for CPU error logging This feature is used in conjunction with the items below Execute Disable Bit VMS Enable SMX and Lock Chipset for Virtualization media support The default setting is No Execute Disable Bit Available if supported by the OS amp the CPU Select Enable for Execute Disable Bit Technology support which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack This feature is used in conjunction with the items Cle
27. Refer to the table on the right for pin definitions Pin Definition 3 Reset Ground Power Button Power Button Pin Definitions JF1 The Power Button connection is located on pins 1 and 2 of JF1 Momentarily contacting both pins will power on off i Signal the system This button can also be con 2 Ground figured to function as a suspend button with a setting in BIOS see Chapter 5 To turn off the power when the system is set to suspend mode press the button for at least 4 seconds Refer to the table on the right for pin definitions Pin Definition A Reset Button o gf i B PWR Button mmm d e x X FP PWRLED 3 3V li HDD LED 3 3V SUPERO X 0QBi_ rows gt B Fe NIC1 Link LED NIC1 Active LED o hMc xelce Maccone NIC2 Active LED Blue Led Cathode UID NIC2 Link LED Red OH Fan Fail WR FaiL Power Fail LED 3 3V ONIN Aa A ya A N na a Ss A Ground Ground Chapter 2 Installation 2 8 Connecting Cables Power Connectors A 24 pin main power supply connector JPW 1 and six 8 pin power connectors JPW2 JPW7 are located on the X10DBi moth erboard These power connectors meet the SSI EPS 12V specification Be sure to connect these power connectors to your power supply to provide adequate power
28. an RMA autho rization online http www supermicro com This warranty only covers normal consumer use and does not cover any damage incurred in shipping or from any failure caused by alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 7 SUPER X100GBi Platform User s Manual Notes Chapter 4 AMI BIOS Chapter 4 BIOS Introduction This chapter describes the AMI BIOS setup utility for the X10QBi Platform It also provides the instructions on how to navigate the AMI BIOS setup utility screens The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated Starting BIOS Setup Utility To enter the AMI BIOS setup utility screens press the Del key while the system is booting up Note In most cases the Del key is used to invoke the AMI BIOS setup Screen There are a few cases when other keys are used such as F3 F4 etc Each main BIOS menu option is described in this manual The Main BIOS setup menu screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured Options in blue can be configured by the user The right frame displays the key legend Above the key legend is an area reserved for informational text When an option is selected in the left frame it is highlighted in white Often informational text will accomp
29. e JXDP1 ER Salm esa Sess wm Z 2 S Bos IM Rg ZNV4 SUPER x10GBi Platform User s Manual JIPMB1 FANIO za 8 ido mp mom ES GRI 1 SATA5 SATA4 KSATAS SATA2 LEDIO1 HSATAQ 3 PC Bus to PCI Exp Slots Use Jumpers JI C1 and JI C2 to connect the System Management Bus lC to the PCI E slots to improve system performance These two jumpers are to be set at the same time PC for PCI E slots Jumper Settings Jumper Setting Definition Closed Enabled Open Normal Default The default setting is Open for normal opera tion Refer to the table on the right for jumper settings TPM Support Enable JPT1 allows the user to enable TPM Trusted Platform Modules support which will enhance data integrity and system security Refer to the table on the right for jumper settings The default setting is enabled Note For more WPCM 450 IPMI supermicro com TPM Support Enable Jumper Settings Jumper Setting Definition 1 2 Enabled 2 3 Disabled information on IPMI configuration please refer to the BMC User s Guide posted on our website http www 8X 0 319d LOTS Indo a S gt Wed 107S INS 8X 0 E 3 0d LOIS ZNdI SIX OFT 10d CLOTS bdo Zid LOTS INS Wd 1078 IWS Ed rera E 8X 0 30d ELOTS cdo eoe C p ph guPuE2 JPMEI JPSREJP LED1S of SIX 0 19
30. include various adjustable delay circuits in both Read and Write paths on a per bit base for effective memory interface to maximize memory performance The options are Disable and Enable DDT Timing Mode Use this feature to set the DDT Distributed Debugging Tool Timing mode for the memory controller to enhance Graphical User Interface GUI support The options are Aggressive Timing and Conservative Timing MxB Rank Sharing Mapping Use this feature to select the address mapping setting for memory rank sharing to enhance extended multimedia platform performance he options are Maximum Performance and Maximum Margin DIMM Vref Voltage Reference Circuit This feature allows the user to decide how to configure the voltage reference point gate for a DDR3 memory module The options are Internal and External BIOS VMSE Reset If this feature is set to Enable BIOS settings pertaining to the Intel Scalable Memory Interconnect 2 Intel SMI 2 controller will be reset to improve system performance The options are Disable and Enable 4 23 SUPER X10QBi Platform User s Manual Phase Shedding Select Enabled to enable Static Phase Shedding support for DDR3 memory voltage regulators to improve memory performance The options are Auto Disabled and Enabled Multi Threaded MRC Memory Reference Code Select Enabled for the system to execute multi threaded memory codes to improve memory performance The options are Auto Disabled and Ena
31. security is compromised The options are Always Execute Always Deny Allow Execute Defer Execute Deny Execute and Query User Removable Media Select Deny Execute to prevent the BIOS from executing critical system commands issued by a removable device when system security is compromised The options are Always Execute Always Deny Allow Execute Defer Execute Deny Execute and Query User Fixed Media Select Deny Execute to prevent the BIOS from executing critical system commands issued by a fixed media device when system security is compromised The options are Always Execute Always Deny Allow Execute Defer Execute Deny Execute and Query User 4 47 SUPER X10QBi Platform User s Manual 4 5 Boot This submenu allows the user to configure the following boot settings for the system Boot Option 1 0 ST91000840NS Set Boot Priority This option prioritizes the order of bootable devices that the system to boot from Press ENTER on each entry from top to bottom to select devices Boot Order 1 Boot Order 2 Boot Order 3 Boot Order 4 Boot Order 5 Boot Order 6 Boot Order 7 Boot Order 8 Boot Order 9 4 48 Chapter 4 AMI BIOS gt CD DVD ROM Drive BBS Priorities Available when a device is installed in this drive Boot Order 1 gt Hard Disk Drive BBS Priorities Available when a device is installed in this drive Boot Order 1 P USB Hard Disk Drive BBS Priorit
32. sequence set in the Boot menu and boot the system with one of the listed devices instead This is a one time override BA XE Slot 0100 v2205 UEFI Built in EFI Shell P0 ST91000640NS 4 51 SUPER X10QBi Platform User s Manual Notes 4 52 Appendix A BIOS POST Error Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the bootup process The error messages normally appear on the screen Fatal errors will not allow the system to continue to bootup If a fatal error oc curs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list correspond to the number of beeps for the corresponding error A 1 BIOS Error Beep Codes BIOS Error Beep Codes Beep Code LED Error Message Description 1 beep Refresh Ready to boot 5 short beeps 1 long beep Memory error No memory detected in the system 5 beeps No Con In or No Con Con In USB or PS 2 keyboard PCI or Out devices Serial Console Redirection IPMI KVM or SOL Con Out Video Controller PCI or Serial Console Redirection IPMI SOL X9 IPMI Error Codes 1 Continuous Beep System OH System Overheat A 1 SUPER X10QBi Platform User
33. the differences be tween the remote latency ratio and the local latency ratio to further optimize sys tem performance for Linux Kernel 2 6 or later platforms The default setting is 21 Memory Interleaving Use this feature to set the DIMM memory interleaving mood The options are NUMA 1 way Node Interleave 2 way Node Interleave 4 way Interleave 8 Way Interleaving Inter socket and Auto Socket Interleave Below 4GB Select Enabled for the memory above the 4G Address space to be split between two sockets The options are Enable and Disable Channel Interleaving Use this feature to set the DIMM channel interleaving mood The options are Auto 1 Way Interleave 2 Way Interleave 3 Way Interleave and 4 Way Inter leave Rank Interleaving Use this feature to select a rank memory interleaving method The options are Auto 1 Way 2 Way 4 Way and 8 Way DRAM Maintenance Select Auto for the BIOS to automatically configure DRAM Refreshing and Patrol settings The options are Manual and Auto pTRR Pseudo Target Row Refresh Support Select Enabled for Pseudo TRR support which will allow the BIOS to assign an invalid address to a questionable memory module to prevent this memory module from being accessed by other components The options are Enabled and Disabled Injection Probability AMEI Asynchroous MCA Error Injection AMEI is a error handling mechanism that allows the BIOS to report the MCA errors to the CPU core or
34. this device in the APCI environment without shutting down the system The options are Disable Enable and Per Port MC Memory Controller BaseAddress Range When this feature is set to Auto system memory that resides within a certain BaseAddress range in the memory controller will be allocated for MultiCast testing The default setting is Auto MC Memory Controller Index Use this feature to set the memory tuning criteria for the memory controller The options are 12 and 20 MC Memory Controller NUM Number Group Use this feature to enter the group number of a memory controller The options are 1 8 32 and 64 4 11 SUPER X10QBi Platform User s Manual EV DFX Device Function On Hide Feature When this feature is set to Enable the EV DFX Lock Bits that are located on a processor will always remain clear during electric tuning The options are Dis able and Enable 1100 Configuration IOUO IIO PCIE Port 2 This item configures the PCI E port Bifuraction setting for a PCI E port specified by the user The options are x4x4x4x4 x4x4x8 x8x4x4 x8x8 x16 and Auto IOU1 IIO PCIE Port 3 This item configures the PCI E port Bifuraction setting for a PCI E port specified by the user The options are x4x4x4x4 x4x4x8 x8x4x4 x8x8 x16 and Auto PCI E Completion Timeout Select Enable for PCI E Completion Timeout support for electric tuning The options are Enable and Disable PCI E Completion Timeout Value Use
35. threshold settings please change the SDIII settings to be the same as those set in the BIOS SuperDoctor Ill Interface Display Screen l Health Information SuperDoctor III Remote Management ystern Info Health Info Perfor Health Information B 2 Appendix B Software Installation Instructions SuperDoctor Ill Interface Display Screen Ill Remote Control SuperDoctor III Remote Management yster Info Health Info Performance Remcke Control Remote Control Graceful power control cancelable Supero Doctor III allows a user to inform the OS to reboot or shut down the system within 30 seconds On the system console a pop up window will appear with a message telling the local user to save his working files Before the system reboots or shuts down it s allowed to cancel the action either locally or remotely Power control noncancelable Supero Doctor III allows a user to inform the OS to reboot or shut down the system right away The system will reboot or shut down without any warning messages It s not allowed to cancel the action Note SD III software and the user s manual can be downloaded from f our website at http www supermicro com products accessories soft ware SuperDoctorlll cfm For Linux we will recommend that you use SuperDoctor II SUPER X10QBi Platform User s Manual Notes Appendix C UEFI BIOS Recovery Appendix C UEFI BIOS Recovery Instructions
36. to your system Refer to the table on the right for pin definitions Warning To provide adequate power supply to the system be sure to connect the 24 pin ATX PWR JPW1 and six 8 pin PWR connectors JPW2 JPW7 to the power supply Failure to do so will void the manufacturer warranty on your power supply and motherboard saaal j E E ipiot ie SATAO DOM Power Connector A power connector for SATA DOM Disk On Module devices is located at JSD1 Con nect the appropriate cable here to provide power support for your SATA DOM devices W dlOSWS OU We Met JPSHEPI LED S e LED28 LEDRI JPTABR aLED P T mf i SUPER X10QBi mam SRRCOOE pe Trg LOTS INS S avid 107 WS ATX Power 24 pin Connector Pin Definitions Pin Definition Pin Definition is 3 3V 3 3V 14 12V 2 3 3V 15 COM 3 COM 16 PS_ON 4 5V 17 COM 5 COM 18 COM 6 5V 19 COM 7 COM 20 Res NC 8 PWR_OK 21 5V 9 5VSB 22 5V 10 12V 29 5V idi 12V 24 COM 12 3 3V 12V 8 pin PWR Con nector Pin Definitions Pins Definition 1 through 4 Ground 5 through 8 12V Required DOM PWR Pin Definitions Pin Definition 1 5V 2 Ground 3 Ground A JPW1 24 pin ATX PWR Req d B JPW2 8 pin PWR Req d C JPW3
37. user The options are Enabled and Disabled Hot Plug Available when AHCI or RAID is selected in the item above Configure SATA as Select Enabled to support Hot plugging for the selected SATA port which will al low the user to replace a device without shutting down the system The options are Enabled and Disabled Port Multiplier Available when AHCI or RAID is selected in the item above Configure SATA as Select Enabled to support port multiplier for the SATA port specified by the user The options are Enabled and Disabled Spin Up Device Available when AHCI or RAID is selected in the item above Configure SATA as Select Enabled to allow the PCH to start COMRESET initialization from 0 to 1 on an edge detect to the device The options are Enabled and Disabled SATA Device Type Use this feature to configure the SATA device type for the device installed on selected a SATA port for use of IDE mode RAID mode or AHCI mode The op tions are Solid State Device and Hard Disk Drive 4 34 Chapter 4 AMI BIOS P PCle PCI PnP Configuration PCI Latency Timer Use this feature to set the latency timer of each PCI device installed on a PCI bus Select 64 to set the PCI latency to 64 PCI clock cycles The options are 32 64 96 128 160 192 224 and 248 PCI Bus Clocks VGA Palette Snoop Select Enabled to support VGA palette register snooping which will allow the PCI cards that do not contain their own VGA color p
38. you want to proceed with BIOS recovery If you decide to proceed with BIOS recovery follow the proce dures below gt Proceed with flash update 5 When the screen as shown above displays using the arrow key select the item Proceed with flash update and press the lt Enter gt keys You will see the progress of BIOS recovery as shown in the screen below Note Do not interrupt the process of BIOS flashing until it is com pleted C 2 Appendix C UEFI BIOS Recovery 6 After the process of BIOS recovery is complete press any key to reboot the system 7 Using a different system extract the BIOS package into a bootable USB flash drive 8 When a DOS prompt appears enter AMI BAT BIOSname at the prompt f Note Do not interrupt this process until BIOS flashing is completed C 3 SUPER X10QBi Platform User s Manual 9 After the BIOS update is completed unplug the AC power cable from the power supply to clear the CMOS and then plug the AC power cable into the power supply and power on the system 10 Press Del continuously to enter the BIOS Setup utility 11 Press F3 to load the default settings 12 After loading the default settings press F4 to save the settings and exit the BIOS Setup utility C 4 Appendix D Dual Boot Block Appendix D Dual Boot Block D 1 Introduction This motherboard supports the Dual Boot Block feature which is the last ditch mechanism to
39. 1 LAN2 Option ROM This is to boot the computer using a network device The default setting for LAN1 Option ROM is Enabled and the default setting for LAN2 Option ROM is Disabled gt ME Management Engine Subsystem This feature displays the following ME Subsystem Configuration settings General ME Configuration Operational Firmware Version Recovery Firmware Version ME Firmware Features ME Firmware Status 1 ME Firmware Status 2 4 36 Chapter 4 AMI BIOS Current State Error Code P ACPI Settings Use this feature to configure Advanced Configuration and Power Interface ACPI power management settings for your system Enable ACPI Auto Configuration Select Enabled to allow BIOS to automatically configure ACPI settings The options are Enabled and Disabled Enable Hibernation Select Enabled to support system hibernation which will allow the system to enter the hibernation state OS S4 Sleep state This feature may not work well with some operating systems The options are Enabled and Disabled ACPI Sleep State Use this feature to select the ACPI State when the system is in sleep mode Select S1 CPU Stop Clock to erase all CPU caches and stop executing instructions Power to the CPU s and RAM is maintained but RAM is refreshed Select Sus pend Disabled to use power reduced mode Power will only be supplied to limited components such as RAMs to maintain the most critical functions of the system
40. 2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB and P9 0 0 3 5 dB Hide Port Select Yes to hide a selected PCI E port from the OS The options are No and Yes 4 15 SUPER X10QBi Platform User s Manual 1101 Configuration IIO2 Configuration IIO3 Configuration IOUO IIO PCIE Port 2 This item configures the PCI E port Bifuraction settings for a PCI E port specified by the user The options are x4x4x4x4 x4x4x8 x8x4x4 x8x8 x16 and Auto 10U1 IIO PCIE Port 3 This item configures the PCI E port Bifuraction settings for a PCI E port specified by the user The options are x4x4x4x4 x4x4x8 x8x4x4 x8x8 x16 and Auto PCI E Completion Timeout Select Enable to issue a time out command when PCI E electric tuning is completed The options are Enable and Disable PCI E Completion Timeout Value Use this item to set the PCI E Completion Time out value Enter a value between 260ms to 900ms No PCI E Port Active ECO This is a workaround setting when there is no active PCI E port detected The options are PCU Squelch exit ignore option and Reset the SQ FLOP by CSR optio P PCI Express Port 0 Port 1A Port 1B Port 2A Port 2B Port 2C Port 2D Port 3A Port 3B Port 3C Port 3D Use the items below to configure the PCI E settings for a PCI E port specified by the user The following items will display e PCI E Port Link Status e PCI E Port Link Max e PC
41. 2 6 Chapter 2 Installation 1 Use your thumb and the index finger to loosen the lever and open the load plate 2 Using your thumb and index finger hold the CPU on its edges Align the CPU keys which are semi circle cutouts against the socket keys 3 Once they are aligned carefully lower the CPU straight down into the socket Do not drop the CPU on the socket Do not move the CPU horizontally or vertically Do not rub the CPU against the surface or against any pins of the Socket to avoid damaging the CPU or the socket Warning You can only install the CPU inside the socket in one direction Make sure that it is properly inserted into the CPU socket before closing the load plate If it doesn t close properly do not force it as it may damage your CPU Instead open the load plate again to make sure that the CPU is aligned properly SUPER X10QBi Platform User s Manual 1 With the CPU inside the socket inspect the four corners of the CPU to make sure that the CPU is properly installed 2 Close the load plate with the CPU inside the socket Lock the lever labeled Close 1st first then lock the lever labeled Open 1st second Using your thumb gently push the load levers down to the lever locks Gently close Push down and lock the the load plate lever labeled Close 1st 3 4 Lever Lock Push down and i lock the lever QAN labeled Open gt 1st Lever Lock 2 8 Chapter 2 Installatio
42. Bi Memory Card Press both notches on the ends of each DIMM module to unlock it Once the DIMM module is loosened remove it from the memory slot 2 14 Chapter 2 Installation 2 5 Installing the System Motherboard into the Chassis Follow the instructions below to install the system motherboard into the chassis Tools Needed Philips Screwdriver Pan head 6 screws 19 pieces e Standoffs 19 pieces if needed uw 1 Install the I O shield into the chassis 2 Locate the mounting holes on the system system board and the matching mounting holes on the chassis iy Tn GBUPERO X10QBi mem fe BARCODE re s WACCODEIC MAC CODE 98 Aa 9 mm E gn SAO 2m oll 3 Place the system board into the chassis making sure that the mounting holes on the system board match the corresponding mounting holes on the chassis pia ma a 4 Install standoffs in the chassis as needed 5 Using the Phillips screwdriver insert a pan head 6 screw into a mounting hole on the system board and its matching mounting hole on the chassis Repeat this step for other mounting holes to secure the system board to the chassis SUPER x10GBi Platform User s Manual 2 6 Memory Support for the X10QBi Platform Installing Memory Cards on PRESENT LED the Baseboard
43. HARDWARE SOFTWARE OR DATA Any disputes arising between the manufacturer and the customer shall be governed by the laws of Santa Clara County in the State of California USA The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to
44. I E Port Link Speed PCI E Port Select Enable to enable the PCI E port specified by the user The options are Auto Enable and Disable 4 16 Chapter 4 AMI BIOS Hot Plug Capable Select Enable to enable hot plugging support for the PCI E port specified by the user to allow the user to replace the device installed on the port without shutting down the system The options are Disable and Enable PCI E Port Link Select Disable to disable the link that is not involved in training activities but its CFG is still active The options are Enable and Disable Link Speed Use this item to select the link speed for the PCI E port specified by the user The options are GEN1 2 5 GT s GEN2 5 GT s and Auto Override Max Link Width Use this item to set the link speed for a selected PCI E port to override the maximum link width that was set by PCI bifurcation The options are Auto x1 X2 x4 x8 and x16 PCI E Port DeEmphasis Use this item to select the De Emphasis control setting for a PCI E port specified by the user The options are 6 0 dB and 3 5 dB PCI E ASPM Support Select Enable to support the Active State Power Management ASPM level for a PCI E port specified by the user Select Disabled to disable ASPM support The options are Disable and L1 Only Fatal Err Error Over Select Enable to force the fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable
45. Lui Ia a a d lo wills il GSUPERG X10QBi meus E gt a BARCODE B B A O C D A MAC CODE 3 BH LED_PORT80 C I9 e Q IMAC CODE Be __cPut Fe Ce e aN can I m Lo om T Rose A Hi Oyen e 70 E Y p 2 Bi S usen Ob Br a ioe eae tes JEWA JPWS JPW6 JPWT o A Fan1 B Fan2 C Fan3 9 z D Fan4 3 x m 8X 0 2H2d 0L107S dO E Fan5 E Fan6 G Fan7 H Fan8 Fan9 J Fan 10 K Chassis Intrusion Wed LOTS INS e 2 28 Chapter 2 Installation Internal Buzzer The internal speaker located at SP1 can be used to provide audible indica tions for various beep codes See the table on the right for pin definitions Refer to the layout below for the loca tion of the internal buzzer Power LED Speaker On the JD1 header pins 1 3 are used for power LED indication and pins 4 7 are for the speaker See the tables on the right for pin definitions Please note that the speaker connector pins 4 7 are for use with an external speaker If you wish to use the onboard speaker close pins 6 7 with a cap Internal Buzzer Pin Definition Pin Definitions Pin 1 Pos Beep In Pin 2 Neg Alarm Speaker SP1 EN E BEEP IN POS ALARM SPK NEG PW
46. MSI message The options are Disable and Enable Gen3 Generation 3 Eq Equalization Mode Use this item to set PCI E Gen3 Adaptive Equalization mode The options are Auto Enable Phase 0 1 2 3 Disable Phase 0 1 2 3 Enable Phase 1 Only Enable Phase 0 1 Only and Advanced Gen3 Generation 3 Spec Specifics Mode Use this item to set the Specifics mode for PCI E Gen3 device The options are Auto 0 70 July 0 70 Sept and 071 Sept Gen3 Generation 3 Phase2 Mode Use this item to configure the Loop count setting for PCI E Gen3 Phase 2 The options are Hardware Adaptive and Manual Gen3 Generation 3 DN TX Preset Use this item to set the Preset mode for PCI E Gen3 downstream transactions from the master device to a slave device The options are Auto PO 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB and P9 0 0 3 5 dB Gen3 Generation 3 DN TX Preset Hint Use this item to set the Preset Hint mode for PCI E Gen3 downstream transac tions from the master device to a slave device The options are Auto PO 6 0 dB P1 7 0 dB P2 8 0 dB P3 9 0 dB P4 10 0 dB P5 11 0 dB and P6 12 0 dB Gen3 Generation 3 Up TX Preset Use this item to set the Preset mode for PCI E Gen3 upstream transactions from a slave device to the master device The options are Auto PO 6 0 0 0 dB P1 3 5 0 0 dB P
47. P Be og Chapter 2 Installation Power SMB PC Connector PWR SMB Pin Definitions The Power System Management Bus Pin Definition C connector JPI C1 is used to o oci monitor onboard power supply fan 3 t and system temperatures Refer to the id table on the right for pin definitions 3 PMBUS Alert 4 Ground 5 3 3V IPMB IPMB Header Pin Definitions A System Management Bus header for IPMI 2 0 is located at JIPMB1 Pin Definition 1 Data Connect the appropriate cable here 2 Ground to use the IPMB I C connection for 3 Clock your system 4 No Connection Note NC No Connection AlE ONY EFA e les zg ES 8X 0 319d 81075 PNdI ZNZd 107S IWS 8X 0 E 19d SLOTS ZNAI aid LOTS INS Wed 1078 IWS ZNEd 107S INS SIX 0E Fd CLOTS Indo e idera E 9 8X 0 30d ELOTS cdo 8X 0 10d 91015 endo 8X 0 2HOd 1075 endo 94X 0 E Hd 6107S ENdO aris siis als sls Q e UE Sox 1rd LOTS INS LEDIOI HSATAO LEd 1018 IS eoe E SIX 0 19d PLOTS ZNAI JPMET JPSREJP LED15 JM2 i m JTI m sLED2 l Jet as ua Ba ii SUPERO X10QBi 3 a Zid LOTS INS
48. R LED Connector Pin Definitions Pin Setting Definition Pin 1 Anode Pin2 Cathode Pin3 NA Speaker Connector Pin Settings Pin Setting Definition Pins 4 7 External Speaker Pins 6 7 Internal Speaker e E Q8 2 o A Internal Buzzer C m o OgpO oO CG O BE FAND zz 22 B PWR LED Speaker a o fo 8 9 o 55 omomono 8 e HS S S E BIBIBIB EI ellei pe pe JE 2 ATE gl jel elle ISATA SIBIBe oe a EI aN S 5 EIE SATA4 S HS ij li 3 Bib EIS isis fo Am E IB Em m E mis i Sasi E FF Dg Bi o6 sje s E ERE ee amp lle 2 KSATA2 B gt s B 2 sL s LEDIO1 29 n d g J2cig urs 8 g JI2C2B HAT 2 1 z NRM 12610 8 E B 9 8 8 m 1 n BS p 1 8 ONE 1 JPSBRJP1 LED15 CF mo N us pa LED28 be al lizis I o ll JPTIBB sLED2 n lle eoe a ii amp SUPER X 00Bi me g Im 1 feci S le p BARCODE pe o Is Fi O 9 E BB LED PORT80 ce 3 1 E BJ E o ou 8 o A us 1 SZ 9 1 OSE 1st V SP TO uv J q VA Weel wm Ovar ai alg 7 Xo f HIS ONY JLiBI IS 9 se E usB23 S ET T y E BP zz Bn on SUPER x10GBi Platform User s Manual Overheat LED Fan Fail Overheat LED Pin
49. SB Headers with six connections USB 0 1 USB 2 3 USB 6 7 Two 2 Type A internal connector USB 4 5 BIOS 16 MB AMI BIOS UEFI EEPROM Flash BIOS APM 1 2 PCI 2 3 ACPI 1 0 2 0 3 0 USB Keyboard Plug amp Play PnP and SMBIOS 2 5 Power One 1 24 pin ATX Main Power Supply Connector JPW1 Six 6 8 pin Power Connectors JPW2 JPW7 One 1 SATA DOM Power Connection JSD1 Note All of these power connections are required for adequate power supply for the components and the system ACPI ACPM Power Management Config Main switch override mechanism Power on mode for AC power recovery Intel Intelligent Power Node Manager Available when the NMView utility is installed in the system Manageability Engine PC Health CPU Monitoring Monitoring Onboard voltage monitors for CPU Vcore up to 4 CPU cores 3 3VDD 3 3VSB 12V 5V Memory Voltage and Battery Voltage CPU 7 Phase switching voltage regulator CPU System overheat LED and control CPU Thermal Trip support Thermal Monitor 2 TM2 support Fan Control Chapter 1 Overview Ten 10 4 pin system cooling fans with fan status monitoring with firmware Pulse Width Modulation fan speed control and low noise fan speed control System Man e PECI Platform Environment Configuration Interface agement 2 0 support e System resource alert via SuperDoctor III e SuperDoctor Ill Watch Dog NMI Chassis Intrusion Header and Detection Dimensions e 19 0 L
50. SUPERO SUPERO X10QBi Platform with X10QBi Baseboard AOM X10QBi A I O Module X10QBi MEM1 Memory Card USER S MANUAL Revision 1 0 The information in this user s manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document and makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our Website at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software and docu mentation is the property of Supermicro and or its licensors and is supplied only under a license Any use or reproduction of this product is not allowed except as expressly permitted by the terms of said license IN NO EVENT WILL SUPER MICRO COMPUTER INC BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPER MICRO COMPUTER INC SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH
51. able Disable Default Pins 1 2 Enabled 3 JPG1 VGA Enable Disable Default Pins 1 2 Enabled 2 18 Chapter 2 Installation Serial Ports COM On the I O Sora COMFoie Module COM2 On the Baseboard Pin Definitions A COM port COM1 is located on the Pin Definition Pin Definition AOM X10QBi A I O module Another 202 6 psr COM port header COM2 is located on bd i RTS the X10QBi baseboard to provide front PTD s cts accessible serial support See the table 4 DIR 9 RI on the right for pin definitions Jo C ity Qs Video Connectors On the I O Module Two Video VGA ports are located on the AOM X10QBi A I O module Refer to the baseboard layout below for the location A COM1 B COM2 C VGA1 D VGA2 AOM X10QBi A I O Module X10QBi A Baseboard BMC TOM V ponon SUPER X10QBi Platform User s Manual Ethernet Ports On the I O LAN Ports Module Pin Definition Two Ethernet ports LAN1 LAN2 are Definition located on the AOM X10QBi A jo P2V8SB_ 10 MED module In addition an IPMI dedi TPO B Aot LEN cated LAN is also located on the 9 o e tz FUERIS i 4 TD1 13 Link 100 LED Yel I O module to provide KVM support low 30358 for IPMI 2 0 All these ports accept F 5 TD1 14 Link 1000 LED RJ45 type cables Yellow 3V3SB No
52. able to force non fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable Corr Correctable Err Error Over Select Enable to force correctable error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable LOs Support When this item is set to Disable IIO will never put its transmitter in the LOs state The options are Disable and Enable P PCI Express Port 1A Port 1B Port 2A Port 2B Port 2C Port 2D Port 3A Port 3B Port 3C Port 3D Use the items below to configure the PCI E settings for a PCI E port specified by the user The following items will display e PCI E Port Link Status e PCI E Port Link Max PCI E Port Link Speed 4 13 SUPER X10QBi Platform User s Manual PCI E Port Select Enable to enable the PCI E port specified by the user The options are Auto Enable and Disable Hot Plug Capable Select Enable to enable hot plugging support for the PCI E port specified by the user which will allow the user to replace the device installed on the port without shutting down the system The options are Disable and Enable PCI E Port Link Select Disable to disable the link that is not involved in PCI training but its CFG space is still active The options are Enable and Disable Link Speed Use this item to select the PCI E link speed for the PCI E port specified by the user The options are GEN1
53. above 4G Address The options are Enabled and Disabled 4 35 SUPER X10QBi Platform User s Manual CPU1 Slot 1 PCI E 3 0 x8 OPROM CPU1 Slot 2 PCI E 3 0 x16 OPROM CPU2 Slot 3 PCI E 3 0 x8 OPROM CPU2 Slot 4 PCI E 3 0 x16 OPROM CPU2 Slot 5 PCI E 3 0 x8 OPROM CPUS Slot 6 PCI E 3 0 x8 OPROM CPUS Slot 7 PCI E 3 0 x8 OPROM CPUA Slot 8 PCI E 3 0 x8 OPROM CPU3 Slot 9 PCI E 3 0 x16 OPROM CPU4 Slot 10 PCI E 3 0 x8 OPROM CPU4 Slot 11 PCI E 3 0 x16 OPROM Select Enabled to enable Option ROM support to boot the computer using a device installed on the slot specified by the user The options are Enabled and Disabled Launch Video OPROM Policy This feature controls how the system executes UEFI Unified Extensible Firmware Interface and legacy storage OPROM Select Legacy Only to boot the system using a legacy device installed in a PCI slot The options are Do not launch UEFI Only Legacy Only Legacy first and UEFI first VGA Priority This feature allows the user to select the graphics adapter to be used as the primary boot device The options are Onboard and Offboard Onboard LAN OpROM Option ROM Select Select iSCSI to use the iSCSI Option ROM to boot the computer using a iSCSI network device Select PXE Preboot Execution Environment to use an PXE Option ROM to boot the computer using a PXE network device The options are iSCSI and PXE Load Onboard LAN1 Option ROM Load Onboard LAN2 Option ROM Select Enabled to enable the onboard LAN
54. alette to examine the video cards palette and mimic it for proper color display The options are Disabled and Enabled PERR Generation Select Enabled to allow a PCI device to generate a PERR number for a PCI Bus Signal Error Event The options are Enabled and Disabled SERR Generation Select Enabled to allow a PCI device to generate an SERR number for a PCI Bus Signal Error Event The options are Enabled and Disabled Maximum Payload Select Auto to allow the system BIOS to automatically set the maximum payload value for a PCI E device to enhance system performance The options are Auto 128 Bytes and 256 Bytes Maximum Read Request Select Auto to allow the system BIOS to automatically set the maximum Read Request size for a PCI E device to enhance system performance The options are Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes and 4096 Bytes ASPM Support This feature allows the user to set the Active State Power Management ASPM level for a PCI E device Select Force LOs to force all PCI E links to operate at LOs state Select Auto to allow the system BIOS to automatically set the ASPM level for the system Select Disabled to disable ASPM support The options are Disabled Force LOs and Auto Warning Enabling ASPM support may cause some PCI E devices to fail Above 4G Decoding Available if the system supports 64 bit PCI decoding Select Enabled to decode a PCI device that supports 64 bit in the space
55. amber or off to indicate TED Color Definition ff N tion or 10 Mby the speed of the connections Refer to the g No Connection or 10 Mbps 3 Green 100 Mbps tables on the right for more information i Amber 1 Gbps LAN 1 LAN 2 Activity LED Left LED State Color Status Definition Yellow Flashing Active IPMI Dedicated LAN LEDs On the I O Module In addition to LAN 1 LAN 2 an IPMI dedicat ed LAN is also located on the I O module IPMI LAN Link LED Left amp The amber LED on the right indicates activ Activity LED Right ity while the green LED on the left indicates Color State Definition the speed of the connection Refer to the Link Left Green Solid 100 Mbps tables on th right for more information Activity Right Amber Blinking Active A LAN1 2 LEDs B IPMI LAN LEDs G AOM X10QBI A 3 2 38 Chapter 2 Installation 2 11 Serial ATA Connections Serial ATA Serial ATA Ports Pin Definitions Six Serial ATA Ports I SATAO I SATA5 a va are located on the X10QBi baseboard 1x I SATAO 1 support SATA 3 0 I SATA2 5 support SATA 2 0 These ports support ed by the Intel PCH provide serial link ss signal connections which are faster than v the connections of Parallel ATA Refer to S RX_P the table on the right for pin definitions 4 Gr
56. anced recommended and O sensi tive gt Socket RAPL Running Average Power Limit Configuration Turbo Pwr Power Limit Lock Select Enable to set the power use limit for the machine when it is running in the turbo mode The options are Enable and Disable Long Pwr Power Limit Ovrd Override Select Enable to support long term power limit override If this feature is disabled BIOS will set the default value The options are Enable and Disable Short Pwr Power Limit En Enable Select Enable to support Short Duration Power Limit Power Limit 2 The options are Enable and Disable Chapter 4 AMI BIOS P Chipset Configuration P North Bridge This feature is used to configure Intel North Bridge settings P Integrated IO Configuration IIO Configuration Note For 1101 Configuration IIO2 Configuration IIO3 Configuration please refer to Page 4 16 PCle Train by BIOS Select Yes to resume the operation of a PCI E device when the device is trapped and put on halt by a wait for BIOS command The options are No and Yes PCle Hot Plug Select Enable to designate a PCI E device for hot plugging which will allow the user to replace this device without shutting down the system The options are Disable Enable Auto and Manual PCle APCI Hot Plug Select Enable to enable hot plugging support for a PCI E device in the APCI Advanced Power Configuration Interface environment which will allow the user to replace
57. any it gU The AMI BIOS has default informational messages built in The manufacturer retains the option to include omit or change any of these informational messages The AMI BIOS setup utility uses a key based navigation system called hot keys Most of the AMI BIOS setup utility hot keys can be used at any time during setup navigation These keys include F3 F4 Enter lt ESC gt arrow keys etc price 1 Options printed in Bold are default settings Note 2 lt F3 gt is used to load optimal default settings lt F4 gt is used to save the settings and exit the setup utility 4 1 SUPER X10QBi Platform User s Manual How To Change the Configuration Data The configuration data that determines the system parameters may be changed by entering the AMI BIOS setup utility This setup utility can be accessed by pressing Delete at the appropriate time during system boot Note For AMI UEFI BIOS Recovery please refer to the UEFI BIOS Recov ery User Guide posted http www supermicro com support manuals Starting the Setup Utility Normally the only visible Power On Self Test POST routine is the memory test As the memory is being tested press the Delete key to enter the main menu of the AMI BIOS setup utility From the main menu you can access the other setup screens An AMI BIOS identification string is displayed at the left bottom corner of the screen below the copyright message Warning Do
58. ar MCA VMX Enable SMX 4 6 Chapter 4 AMI BIOS and Lock Chipset for Virtualization media support The default setting is Enable Refer to Intel and Microsoft websites for more information VMX Select Enable for CPU related Virtualization support This feature is used in conjunc tion with the items Clear MCA Enable SMX and Lock Chipset for Virtualization media support The options are Enable and Disable Enable SMX Select Enable for Safer Mode Extensions SMX support to enhance data security in the processor This feature is used in conjunction with the items Clear MCA VMX and Lock Chipset for Virtualization media support The options are En able and Disable Lock Chipset Select Enable to lock chipset register tables and set the register tables to read only to prevent new data being written into the processor to ensure system security This feature is used in conjunction with the items Clear MCA VMX and Enable SMX for Virtualization media support The options are Enable and Disable BIST Selection Select Enable to configure Built In Self Test BIST settings which will allow the system to perform BIST testing on the processors at bootup The options are En able and Disable Hardware Prefetcher Available when supported by the CPU If set to Enable the hardware prefetcher will prefetch streams of data and instruc tions from the main memory to the L2 cache to improve CPU performa
59. assword Use this feature to set a user password which is required to log into the system and to enter the BIOS setup utility The length of the password should be from 3 characters to 20 characters long P Secure Boot Menu The following items will display System Mode Secure Boot Secure Boot Support Select Enable for Secure Boot support to ensure system security at bootup The options are Enabled and Disabled Secure Boot Mode This feature allows the user to select the desired Secure Boot mode for the system The options are Standard and Custom P Key Management Default Keys Provision Select Enable to install all manufacture defaults for the following system security settings The options are Disabled and Enabled P Enroll All Factory Default Keys This feature allows the user to install all factory security default keys in your system Platform Key PK P Delete PK Platform key Select Yes to confirm deletion of the Platform Key from the NVRAM Non Volatile RAM 4 45 SUPER X10QBi Platform User s Manual P Set New PK Platform Key Select Yes to load default factory platform keys to your system Select No to load the default settings from other sources Key Exchange Key Database KEK P Delete KEK Key Exchange Key Select Yes to confirm deletion of the KEK from the NVRAM Non Volatile RAM gt Set New KEK Key Exchange Key Select lt Yes gt to confirm that a new KEK will be set i
60. ation on the IPMI please refer to the IPMI User s Guide posted on our website Qhttp www supermicro com A UID Switch B Rear UID LED LED28 C Front UID LED AOM X10QBi A I O Module 20 19 Groun Oo Oo NMI x x 3 3V HDD LED 3 3V NIC1 Link LED NIC1 Active LED NIC2 Active LED Blue Led fedes UID 3 3V NIC2 Link LED ed OH Fan Fail ace i ia sre Power Fail LED Ground C Ground UN suc F FP PWRLED a Reset Reset Button PWR Power Button 2 21 SUPER x10GBi Platform User s Manual Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo cated on a control panel at the front of the chassis These connectors are designed specifically for use with Supermicro s server chassis See the figure below for descriptions of the various control panel buttons and LED indicators Refer to the following section for descriptions and pin definitions JF1 Header Pins o S 6 Oo a E pJ T ee o o SUPERO X e JN o E E OQBi mos BAR CODE FE MAC CODE C IMAC CODE B _ Groun NMI x x FP
61. bled Rank Multiplication Select Enabled to force the LRDIMM Load Reduced DIMM memory modules to operate at the Rank Multiplication mode for memory performance enhancement The options are Auto and Enabled LRDIMM Load Reduction DIMM Module Delay When this item is set to Disabled the MRC Memory Regulator Controller will not use SPD bytes 90 95 for module delay on LRDIMM memory The options are Disabled and Auto Memory Type Use this feature to select the memory type to be used in this system The options are RDIMMs only UDIMMs only and UDIMMs and RDIMMs Rank Margin Tool Select Enabled to activate the rank margin tool for DDR3 memory training memory tuning The options are Auto Disabled and Enabled RMT Rank Margin Tool Loop Count Use this item to set RMT Loop Counter The options are Auto Disabled and Enabled Skip MemTest Memory Test on Fast Boot Select Enabled to skip memory routine testing at bootup if this machine is set to Fast boot mode The options are Auto Disabled and Enabled Attempt Fast Boot Select Enabled to skip a portion of memory code testing to speed up system boot The options are Disabled and Enabled BDAT Select Enabled for BDAT Binary Data Advanced Technology support to increase System performance The options are Disabled and Enabled 4 24 Chapter 4 AMI BIOS Data Scrambling Select Enabled to enable data scrambling to enhance system performance and data integrity The opt
62. cation Ratio Use this feature to set the IO resource allocation ratio from 0 8 The default setting is 1 MMIOL Resource Allocation Ratio Use this feature to set the Memory Mapped IO resource allocation ratio from 0 8 The default setting is 1 IIO UniPhy Disable Select Yes to hide the entire UNIFY in L2 cache The options are No Yes and Yes w Memory Hot Add Memory Configuration This section displays the following Integrated Memory Controller IMC informa tion Promote Warnings Select Enable to treat memory warnings as memory errors or memory faults for system level debugging The options are Enable and Disable 4 22 Chapter 4 AMI BIOS DDR Speed Use this feature to force a DDR3 memory module to run at a frequency other than what is specified in the specification The options are Auto 800 1067 1333 1600 1867 and 2133 DDR Voltage Level Select Force to 1 50V to force all DDR3 memory modules to operate at 1 50V Select Force to 1 35V to force all DDR3 memory modules to operate at 1 35V The options are Auto Force to 1 50V and Force to 1 35V Advanced CIk Clock Training Select Enable for Advanced Clock Training support which will allow the memory command line to be synchronized with the clock line to enhance memory perfor mance The options are Enable and Disable Perbit Per bit Deskew Training Select Enable for Perbit Deskew Training support which will allow the memory controller to
63. d Enable gt I10 Generation Configuration The following information will display TXT DPR memory setting Use this item to set TXT DPR settings The options are 1M DPR 3M DPR 64M DPR 128M DPR and 255M DPR Unhide QPI PMU Counter Select Enable to use the PCI Express counters Select Disable to hide the PCI Express counters The options are Disable and 255M Enable 1I100 1101 1102 1103 110 IOAPCI Select Enable to support IIO IOAPIC I O Advanced Power Interface Configura tion The options are Enable and Disable gt Intel VT for Directed I O VT d Intel VT for Direct I O VT d Isoc Select Enable to enable Isochronous support to meet QoS Quality of Service requirements This feature is especially important for Intel Virtualization technol ogy The options are Enable and Disable 4 19 SUPER X10QBi Platform User s Manual VTd VT d Azalea VCp Optimization Select Enable to enable Intel Virtualization Technology VT d Direct I O support to optimize Azalea VCp performance The options are Disable and Enable Intel VT for Directed I O VT d Select Enable to enable Intel Virtualization Technology support for Direct I O VT d by reporting the I O device assignments to the VMM Virtual Machine Monitor through the DMAR ACPI Tables This feature offers fully protected I O resource sharing across Intel platforms providing greater reliability security and availability in networking and data sharing The options a
64. d PLOTS ZNAI JM2 i aLED2 A SMB to PCI E Slots B TPM Enabled NVI ER NV EA e ZNEd 107S IWS 8X 0 13d 9101S NdI 9 8X 0 33d 1075 endo 8X 0 E 319d 81075 NdD 94X 0 E Id 6107S ENdO 8X 0 E 3HOd OLLOTS pd 9X 0 E 3 19d LLLOTS tidO WPA LOTS INS Ed 1018 IS aLED1 cm 8 i OSUPERG X0OBi mes a Sw IBAR CODE Fe o zird LOTS INS 2 36 Management Engine ME Recovery Use Jumper JPME1 to select ME Firm ware Recovery mode which will limit resource allocation for essential system operation only in order to maintain nor mal power operation and management In the single operation mode an online upgrade will be available via Recovery mode Refer to the table on the right for jumper settings Manufacturer Mode Select Close pin 2 and pin 3 of Jumper JPME2 to bypass SPI flash security and force the system to operate in the Manufac turer mode allowing the user to flash the system firmware from a host server for system setting modifications Refer to the table on the right for jumper settings Chapter 2 Installation ME Recovery Jumper Settings Jumper Setting Definition 1 2 Normal Default 2 3 ME Recovery ME Mode Se
65. d for a serial port used in Console Redirec tion Make sure that the same speed is used in the host computer and the client computer A lower transmission speed may be required for long and busy lines The options are 9600 19200 57600 and 115200 bits per second Flow Control This feature allows the user to set the flow control for Console Redirection to prevent data loss caused by buffer overflow Send a Stop signal to stop send ing data when the receiving buffer is full Send a Start signal to start sending data when the receiving buffer is empty The options are None Hardware RTS CTS and Software Xon Xoff The setting for each these features is displayed Data Bits Parity Stop Bits 4 41 SUPER X10QBi Platform User s Manual gt Trusted Computing Available when a TPM device is detected by the BIOS Configuration Security Device Support Select Enabled on this item and enable the TPM jumper on the motherboard to enable onboard security devices to improve data integrity and network security The options are Enabled and Disabled TPM Trusted Platform Module State Select Enabled to enable TPM security settings to improve data integrity and network security The options are Disabled and Enabled Pending Operation Use this item to schedule an operation for the security device The options are None Enable Take Ownership Disable Take Ownership and TPM Clear Note The computer will reboot in order to execut
66. dicator Front Panel Control Header 4 pin External BMC I C Header for an IPMI Card Chassis Intrusion Overheat Fan Fail LED Power Supply SMBbus I C Header ATX 24 pin Power Connector 8 pin Power Connectors SATA DOM Device on Module Power Connector VGA Video Port1 Port2 G bit Ethernet Ports 1 2 JLAN1 JLAN2 BMC LAN IPMI Dedicated LAN JLAN3 Onboard Buzzer Internal Speaker Serial Link General Purpose I O Headers Front Panel Accessible USB Connections 1 9 SUPER X100QBi F Platform User s Manual USB4 USB5 Type A Front Panel USB Connectors 4 5 UID on the I O module UID Unit Identifier Switch SWUID1 SW1 VGA 1 2 Backpanel VGA Port Note For the PCI E slots to work properly follow the instructions listed on page 1 8 Warning To avoid damaging the power supply or the system and to provide adequate power to the components be sure to connect the 24 pin power connector and all 8 pin power connectors JPW2 JPWT7 to the power supply Failure to do so will void the manufacturer warranty Chapter 1 Overview System Platform Features System The X10QBi system motherboard supports up to four Motherboard Intel amp E7 series processors each processor supports two full width Intel QuickPath Interconnect QPI links X10QBi with support of up to 8 0 GT s Data Transfer Rate in each direction Memory 1 The X10QBi baseboard supports eight memory X10QBi
67. dled according to all national laws and regulations SU Bese TOW Me BERL 3 SAA OBERT SA TOWER MICHELS EZ HES ARP Sall RAF AEE ARTETA IRE EA EET e ee ASE cits HY PBS ae FS Es A BRE EA HET Warnung Die Entsorgung dieses Produkts sollte gem allen Bestimmungen und Gesetzen des Landes erfolgen jAdvertencia Al deshacerse por completo de este producto debe seguir todas las leyes y regla mentos nacionales Attention La mise au rebut ou le recyclage de ce produit sont g n ralement soumis a des lois et ou directives de respect de l environnement Renseignez vous aupr s de l organisme comp tent 57 pry gums AYIA pim nnn ARDT ng 3 n m x15 Dw DIO pI SUPER X10QBi Platform User s Manual Aida gll cil gl y adl lll graal ll g dave Jaleill cals giall Ia ja Gcilgill aliil aic A o ape ap stel ri a ug u ge uer sso quu Waarschuwing De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming met alle nationale wetten en reglementen 2 2 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To avoid damag ing your system it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removin
68. dules of the same type same speed and same operating frequency in the mother board Mixing of DIMMs of different types or different speeds is not allowed Note 2 For detailed information on memory support and updates please refer to the SMC Recommended Memory List on our website at http supermicro com support resources mem cfm 2 17 SUPER Xx10GBi Platform User s Manual 2 7 I O Module Connectors Ports The I O ports are color coded in conformance with the PC Industry Standards See the picture below for the colors and locations of the various I O ports Note Before you power on the system be sure to install the AOM X10QBi A I O module card into the SIO slot as shown in the figure Without the I O module being installed on the baseboard your system cannot be turned on AOM X10QBi A I O Module g o o BMC 3 20000007 E I O Port Locations and Definitions See the Connector Section A JVG1 VGA Video Connector 1 B JLAN2 LAN Port2 C JLAN1 LAN Port1 D JLAN3 BMC IPMI LAN E UID Unit Identifier Switch amp UID LED Blue Unit Identified F JVG2 VGA Video Connector 2 G JCOM1 COM Connection 1 Jumpers See the Jumper Section 1 JPL1 LAN Enable Disable Default Pins 1 2 Enabled 2 JPB1 BMC En
69. e e FEO e fp EE 22 ens ns 8 g I SE sA efs arate 5 S SHISiISHIS el fe 2 ps g HE le TE 2j fel fel fel ABE E E EAEE EIEIEIE sataa B SISTERE TRI z ge eli z s lel atia ebvslps 8 32i a cass ele s s mm SATA3 EIE E eg 8 amp llse 2l Di ps 2S Li Li 5 xh n MA E eg e aye LEDIO1 gt Jm S9 PA E 2 Ji2C1 1 eg 2 sg o El 3 8 a PME o 8 BupuEt mm o JPSIBJJPI LED15 F M2 T i LED28 sil P y eww E m LL arci g il es y i g UPER X10QBi rons g 3 mi FR CODE A E ER co Ponreo Mekce 3 E B17 amp 9 GN on 9 LI o s HO 4st E ll 9 9 JB B vss E UsB23 S c sj XOP JXDP3 Big JXDP2 JOH ge B B28 oon amp ge DP RE B5 BO E em omoi on 2 Is S Sooo 2 t E 9 oni eei EE o in Bog IPAE WE ET ER SUPER X100QBi F Platform User s Manual X10QBi MEM1 Memory Card X10QBi MEM1 Memory Card Image Always install DIMMs in the blue slots first in the order of DIMMA1 DIMMB1 DIMMC1 and DIMMD1 as marked above X10QBi MEM1 Memory Card Layout mt DIMM D1 TINT TDIMN D3 Notes 4 1 For proper memory installation on the memory card please always in stall DIMM modules in the blue slots first starting with DIMMA1 DIMMB1 DIMMC1 and DIMMD1 as marked above 2 When installing a DIMM module be sure to press the module straight down into the slot until it is properly seated and the PRESENT_LED as shown above is on 1 6 Chap
70. e refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components Before Power On 1 Make sure that there are no short circuits between the system board I O module memory card and chassis 2 Disconnect all ribbon wire cables from the system board I O module and memory cards including those for internet and USB connections 3 Remove all I O module and add on cards 4 Install the AOM X10QBi A I O module first making sure it is fully seated and connect the front panel connectors to the system board No Power 1 Make sure that no short circuits between the system board I O module memory cards and chassis 2 Make sure that the ATX power connectors are properly connected 3 Check that the 115V 230V switch on the power supply if available is properly set 4 Turn the power switch on and off to test the system if applicable 5 The battery on your system board may be old Check to verify that it still sup plies 3VDC If it does not replace it with a new one 3 1 SUPER Xx100GBi Platform User s Manual No Video 1 If the power is on but you have no video remove the I O module all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes System Boot Failure If th
71. e Connectors AOM X10QBi A I O Jumpers AOM X10QBi A I O Panel Jump Loca Description Default er tion JPL1 1 LAN Enabled Disabled Pins 1 2 Enabled JPB1 2 BMC Enabled Disabled Pins 1 2 Enabled JPG1 3 VGA Enabled Disabled Pins 1 2 Enabled AOM X10QBi A I O LED Indicator LED Loca Description State tion LED28 4 UID LED JEDUID1 Blue Unit Identified 1 4 Connectors Con Loca Description nector tion JCOM1 G COM Port JLAN1 C LAN Port1 JLAN2 B LAN Port2 JLAN3 D LAN Port3 JVG1 A VGA Port1 JVG2 F FP VGA Port2 SW1 E UID Unit Identi fied Switch Chapter 1 Overview Installing the AOM X10QBi A I O Module on the Baseboard Note Before you power on the system be sure to install the AOM X10QBi A I O module card on the SIO slot as shown in the figure below Without the I O module being installed on the motherboard your system cannot be turned on AOM X10QBi A I O Module UO AO OQBI A e cofsic oro cpm oo oo iF oo o o E I LAN CTRL E PM 10000000 00000000 o k LED28 JEDUID1 SIO Slot eo o 8 o
72. e following information when contacting Supermicro for technical support System board model and PCB revision number BIOS release date version This can be seen on the initial display when your System first boots up System configuration An example of a Technical Support form is on our website at http www su permicro com Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at support supermicro com Battery Removal and Installation Battery Removal To remove the onboard battery follow the steps below 1 Power off your system and unplug your power cable Locate the onboard battery as shown below Using a tool such as a pen or a small screwdriver push the battery lock out wards to unlock it Once unlocked the battery will pop out from the holder Remove the battery LITHIUM BATTERY LITHIUM BATTERY OR BATTERY HOLDER BATTERY HOLDER 3 5 SUPER X100GBi Platform User s Manual Proper Battery Disposal Warning Please handle used batteries carefully Do not damage the battery in any way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly 3 4 Frequently Asked Questions
73. e system does not display POST or does not respond after the power is turned on check the following 1 Check for any error beep from the speaker on the system board fthere is no error beep try to turn on the system without DIMM modules If there is still no error beep try to turn on the system again with only one proces sor in CPU Socket 1 If there is still no error beep replace the system board e fthere are error beeps clear the CMOS settings by unplugging the power cord and contracting both pads on the CMOS Clear Jumper JBT1 Refer to the jumper section in Chapter 2 2 Remove all components from the system board I O module and memory cards especially the DIMM modules Make sure that the system power is on and that memory error beeps are activated 3 Turn on the system with only one DIMM module If the system boots check for bad DIMM modules or slots by following the Memory Errors Troubleshoot ing procedure in this chapter Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose CMOS setup information 2 The battery on your system motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Chapter 3 Troubleshooting Memory Errors When a No Mem
74. e the pending commands and change the state of the security device Current Status Information This item displays the information regarding the current TPM status TPM Enable Status This item displays the status of TPM Support to indicate if TPM is currently enabled or disabled TPM Active Status This item displays the status of TPM Support to indicate if TPM is currently ac tive or deactivated TPM Owner Status This item displays the status of TPM Ownership FP iSCSI Configuration This item displays iSCSI configuration information iSCSI Initiator Name This item displays the name of the iSCSI Initiator which is a unique name used in the world The name must use IQN format The following actions can also be performed 4 42 Chapter 4 AMI BIOS P Add an Attempt P Delete Attempts gt Change Attempt Order 4 3 IPMI Select the IPMI Intelligent Plattorm Management Interface tab to access the fol lowing submenu items b BMC netuork con These items indicates your system IPMI firmware revision number and status PMI Firmware Revision PMI Status BMC Network Configuration LAN Channel 1 This feature allows the user to configure the settings for LAN1 Port Configuration Address Source This feature allows the user to select the source of the IP address for this computer If Static is selected you will need to know the IP address of this computer and enter it to the system manually in the field If
75. ection is disabled before booting 4 40 Chapter 4 AMI BIOS the OS When set to Always Enable legacy console redirection remains enabled when booting the OS The options are Always Enable and Bootloader Serial Port for Out of Band Management Windows Emergency Management Services EMS The submenu allows the user to configure Console Redirection settings to support Out of Band Serial Port management Console Redirection for EMS Select Enabled to use a COM Port selected by the user for Console Redirection The options are Enabled and Disabled Console Redirection Settings for EMS This feature allows the user to specify how the host computer will exchange data with the client computer which is the remote computer used by the user Out of Band Management Port The feature selects a serial port used by the Microsoft Windows Emergency Management Services EMS to communicate with a remote server The options are COM1 Console Redirection and COM2 SOL Console Redirection Terminal Type This feature allows the user to select the target terminal emulation type for Con sole Redirection Select VT100 to use the ASCII character set Select VT100 to add color and function key support Select ANSI to use the extended ASCII character set Select VT UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes The options are ANSI VT100 VT100 and VT UTF8 Bits Per Second This item sets the transmission spee
76. edures Identifying bad components by isolating them If necessary remove the com ponent in question from the chassis and test it in isolation to make sure that it works properly Replace a bad component with a good one Check and change one component at a time instead of changing several items at the same time This will help isolate and identify the problem To find out if a component is good swap it with a new one to see if the system works properly If so then the old component is bad You can also install the component in question in another system If the new system works the com ponent is good and the old system has problems Technical Support Procedures Before contacting Technical Support please take the following steps Also please note that as a system and motherboard manufacturer Supermicro also sells prod ucts through its channels so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problems with the specific system configuration that was sold to you 3 4 Chapter 3 Troubleshooting 3 3 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our website http www supermicro com before contacting Technical Support BIOS upgrades can be downloaded from our website http www supermicro com If you still cannot resolve the problem include th
77. en Sie die benutzten Batterien nach den Anweisungen des Herstellers 2 1 SUPER X10GBi Platform User s Manual Attention Danger d explosion si la pile n est pas remplac e correctement Ne la remplacer que par une pile de type semblable ou quivalent recommand e par le fabricant Jeter les piles usag es conform ment aux instructions du fabricant iAdvertencia Existe peligro de explosi n si la bater a se reemplaza de manera incorrecta Re emplazar la bater a exclusivamente con el mismo tipo o el equivalente recomen dado por el fabricante Desechar las bater as gastadas seg n las instrucciones del fabricante LTN rona v n rpn x T3 n55mm APA non YW pLa n0 nap axan L an ONINT 3103 77707 nx yon MINT yL v munmuvnn moon pIo dhli Ania j ii phar dy Ul Jaial Als lail Ge h clus i jaa cJlasual iriall AS pill ay Cie gh US Lala Le gl p gill adi Lai rilal AS SN ciuile G s ilorin Gl ed Cpe pal A MEA SUE A AA epo xurep AA ASAH 71S Mele oy xol JAY AZAA ARIE SSM SH MAE sexpsep gr AZA go ureb pst EE AEA FAAL Waarschuwing Er is ontploffingsgevaar indien de batterij verkeerd vervangen wordt Vervang de batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan bevolen wordt Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften afgevoerd te worden Chapter 2 Installation Product Disposal A Warning Ultimate disposal of this product should be han
78. erboard without a processor pre installed make sure that the plastic CPU socket cap is in place and that none of the socket pins are bent otherwise contact your retailer immediately Refer to the Supermicro website for updates on CPU support Installing the E7 4800V2 Processor s on the Main Board Note There are four CPU sockets located on the X10QBi baseboard Popu late the desired number of CPUs on the board start ing with CPU Socket 1 as shown in the figure on the right 1 There are two load levers on the E 7 4800V2 socket To open the socket cover first press and release the load lever labeled Open st on Load Lever labeled Open 1st 2 5 SUPER Xx10GBi Platform User s Manual 1 Press the second load lever labeled Close 1st to release the load plate that covers the CPU socket from its locking position 4 Press down on Load 2 Pull lever away from 2 the socket 2 With the lever labeled Close 1st fully retracted gently push down on the lever labelled Open 1st to open the load plate Lift the load plate to open it completely Gently push down to pop the load plate open 2 Note All graphics shown in this manual were based upon the latest PCB revision available at the time of publishing this manual The components installed in your system may or may not look exactly the same as the graphics shown in this manual
79. g the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the system motherboard and peripherals back into their antistatic bags when not in use Forgrounding purposes make sure that your system chassis provides excellent conductivity between the power supply the case the mounting fasteners and the system motherboard Use only the correct type of onboard CMOS battery as specified by the manu facturer To avoid possible explosion do not install the onboard battery upside down Unpacking The system board is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected 2 4 Chapter 2 Installation 2 3 Processor and Heatsink Installation Warning When handling the processor package avoid placing direct pressure on the label area 4 Notes e Always connect the power cord last and always remove it before adding removing or changing any hardware components Make sure that you install the processor into the CPU socket before you install the CPU heatsink e If you buy a CPU separately make sure that you use an Intel certified multi directional heatsink only Make sure to install the motherboard into the chassis before you install the CPU heatsink When receiving a moth
80. h VO Mod le 2 1 2 teretes 2 34 e ecuds ccc E 2 35 Watch Dog Enable Disable t reto eterne d 2 35 FC Bus to POI Exp Slots reni bri nt e aiana 2 36 TPM Support Enable 3 ndr hn eet e d 2 36 Management Engine ME Recovery ssssss 2 37 Manufacturer Mode SelecGt neret rero 2 37 2 10 Onboard LED IndicatOts s pot rarae aces esee canteens 2 38 LAN LEDS O the VO Module cnet terere tte 2 38 IPMI Dedicated LAN LEDs On the I O Module eeesse 2 38 2 11 Serial ATA Connections ro en reine ten e ees 2 39 Setial ATA POMS seisuni e paene Gn dO Rer dr vea Ri cbe sese 2 39 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures ern dpt e tete 3 1 3 2 Technical Support Procedures ssssssssssssseseee eene 3 4 3 3 Battery Removal and Installation ssessssssssseseeeeeeeeeenee 3 5 Battery RemloVval oct e per iid xu c E Ra aede deae 3 5 SUPERO X100QBi Platform User s Manual 3 4 Frequently Asked Questions in rrr eren tirer retine 3 6 Proper Battery Disposal ettet etat Seiten tede sien iS E E D pau aha 3 6 3 5 Returning Merchandise for Service essssssssseeeeeene 3 7 Chapter 4 BIOS 4 1 llyigorel fesTo REL EE 4 1 4 2 MaM Setups EE 4 2 4 3 Advanced Setup Configurations sse 4 4 4 3 MPMIG unii ttd a a a sei a 4 43 D WWE CUu e
81. icates the end of a serial data packet Select 1 Stop Bit for standard serial data communication Select 2 Stop Bits if slower devices are used The options are 1 and 2 Flow Control This feature allows the user to set the flow control for Console Redirection to prevent data loss caused by buffer overflow Send a Stop signal to stop send ing data when the receiving buffer is full Send a Start signal to start sending data when the receiving buffer is empty The options are None and Hardware RTS CTS VT UTF8 Combo Key Support Select Enabled to enable VT UTF8 Combination Key support for ANSI VT100 terminals The options are Enabled and Disabled Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server The options are Disabled and Enabled Resolution 100x31 Select Enabled for extended terminal resolution support The options are Dis abled and Enabled Legacy OS Redirection Resolution Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support The options are 80x24 and 80x25 Putty KeyPad This feature selects Function Keys and KeyPad settings for Putty which is a terminal emulator designed for the Windows OS The options are VT100 LINUX XTERMRS SCO ESCN and VT400 Redirection After BIOS Post Use this feature to enable or disable legacy console redirection after BIOS POST When set to Bootloader legacy console redir
82. ies Available when a device is installed in this drive Boot Order 1 gt Network Device BBS Priorities Boot Order 1 P UEFI Boot Drive BBS Priorities Boot Order 1 4 49 SUPER X10QBi Platform User s Manual 4 8 Save amp Exit This submenu allows the user to configure the Save and Exit settings for the system Save Changes Save Changes and Exit When completing the system configuration changes select this option to save the changes and exit from the BIOS setup utility When a dialog box appears asking you if you want to save configuration and exit select Yes to save the changes and exit from the BIOS setup utility Discard Changes and Exit Select this option to quit the BIOS setup without making any changes to the system configuration Select Discard Changes and Exit and press lt Enter gt When the dialog box appears asking you if you want to exit the BIOS setup without saving select Yes to quit BIOS without saving the changes Save Changes and Reset When completing the system configuration changes select this option to save the changes and reboot the computer so that the new system configuration settings can take effect Save Options Save Changes Select this option and press lt Enter gt to save all changes you ve made so far and return to the AMI BIOS utility When the dialog box appears asking you if you want 4 50 Chapter 4 AMI BIOS to save configuration select Yes t
83. ime out value for initialization of USB mass storage devices The options are 10 Sec 20 sec 30 Sec and 40 Sec seconds SATA Configuration When this submenu is selected the AMI BIOS automatically detects the presence of the SATA Devices and displays the following items SATA Controllers This item enables or disables the built in SATA controllers on the motherboard The options are Enabled and Disabled Configure SATA As Use this feature to configure the SATA mode for a devices installed in the SATA port specified by the user The options are IDE AHCI and RAID Software Feature Mask Configuration Low Power Device Detection Support Select Enabled for the low power device to be detected by the BIOS The options are Enabled and Disabled Aggressive LPM Support Select Enabled for the PCH chip to aggressively enter the Link Power state The options are Enabled and Disabled 4 33 SUPER X10QBi Platform User s Manual Alternate ID Available when RAID is selected in the item above Configure SATA as Select Enabled for the port specified by the user to report an alternate ID to the system The options are Enabled and Disabled SATA Port 0 SATA Port 1 SATA Port 2 SATA Port 3 SATA Port 4 SATA Port 5 This section allows the user to configure the following settings for the SATA port specified by the user Software Preserve Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Select Enabled to enable the port specified by the
84. ing when the hot sensor reaches the predefined threshold via automatic voltage control when the CPU is in idle states The options are Disabled and Enabled Memory Hot Output Thermal Throttling Select Enabled to provide thermal throttling warnings when the hot sensor reaches the predefine threshold via automatic voltage control when the CPU is in idle states The options are Disabled and Enabled MC DDT Mode This feature sets the DDT Distributed Debugging Tool mode for the memory controller The options are Auto 100 Ohms and 50 Ohms MRC Memory Reference Code Promote Warnings Select Enabled for the system to provide MRC warnings to improve memory performance The options are Enabled and Disabled Num Number of Sparing Transac Transaction Use this feature to set the number of memory sparing transactions that will allow data to be written from a failing component to another component to ensure data security The options are 4 4 27 SUPER X10QBi Platform User s Manual PSMI Support Select Enabled for Power Supply Management Interface PSMI support The options are Enabled and Disabled VMSE Clock Stop Select Enabled to de activate the clock driver for the Intel Scalable Memory Interconnect 2 Intel SMI 2 controller The options are Enabled and Disabled Safe MC Micro Code BGF Buffer Generation First in First Out PSV Select Enabled to use the Micro Code Safe mode to allow the onboard power control mechanism to s
85. ions are Disabled and Enabled Scrambling Speed Low Use this feature to set the data scrambling speed to low 32 bits Enter a value between 0 and 32 The default setting is 0 Scrambling Speed High Use this feature to set the data scrambling speed to high 32 bits Enter a value between 0 and 32 The default setting is 0 Enable ADR Select Enabled for ADR Automatic Diagnostic Repository support to enhance memory performance The options are Enabled and Disabled VMSE Lockstep Mode Select Enabled to support the VMSE Lockstep mode which will support Lock step mode for the Intel Scalable Memory Interconnect 2 Intel SMI 2 controller The options are 2 1 Mode NB Persistent Error Select Enable to allow the system to properly handle the persistent errors oc curred in the North Bridge The options are Enable and Disable SB Persistent Error Select Enable to allow the system to properly handle the persistent errors oc curred in the South Bridge The options are is Enable and Disable SB Error Threshold Use this feature to set the threshold for South Bridge errors When the number of South Bridge errors reaches beyond the threshold the system will automatically take corrective actions The default setting is 10 Link Failure Threshold Use this feature to set the link failure threshold When the number reaches beyond the threshold the system will automatically take corrective actions The default setting is 7 HA Hash Mode Earl
86. ire Kill Select Enabled for Double Device Data Correction DDDC Wire kill support which will disable the wire connection between two DRAM devices when they fail The options are Disable and Enable DDDC Wirekill Wire Kill Threshold Use this feature to set the DDDC Wirekill threshold When the memory errors reach the threshold wire connections between the failed DRAM modules will be disconnected The options are Disable and Enable Apply Memory RAS Reliability Availability Serviceability Policy Globally When this item is set to Enabled the configuration settings for memory sparing Mirroring DDDC Device Tagging will be applied to all nodes in the system The options are Disable and Enable 4 31 SUPER X10QBi Platform User s Manual Memory Mirroring Select Enable to enable memory mirroring support which will create a duplicate copy of the data stored in the memory to enhance data security The options are Disable and Enable gt South Bridge This feature is used to configure Intel South Bridge settings P USB Configuration The following USB items will display USB Module Version USB Devices Legacy USB Support Available when USB Functions is not Disabled Select Enabled to support legacy USB devices Select Auto to disable legacy sup port if USB devices are not present Select Disabled to have USB devices available for EFI Extensive Firmware Interface applications only The settings are Disabled Enab
87. irn 2 E rn ma E g mia n Eran Z Jio1 ef ae Ed 3j e e ORES e e eo n m ISATA3 8 Seg 5 Sg 5 elis e d f awo i p lt 3 amp o 8 oxbbx x LSATA2 B A 3 e E 2 LEDIO1 E Jg 9 deg 2 Ji2Cig z E E 9 Si 9 JI2C2 d KSATAO 3 2 M z JVRM I2C1 B 5 co B LU 3 e z o E e SS S c ai a E JPME2 E E 8 Eme BRS JPSERYP1 LED15 SER M2 ms ed 3 LED28y pi LED23 as I 3 x Ei JPTIEH sLED2 p supci fe E SLED o k Lg eg B i SUPER X 0QBi m gj Elo E e Rev 1 0 BAR CODE FE 2 ERE dus gt MAC CODE o HE ep Pone O C MOE CE 3 2 MAG CODE z ME B17 o CPU Ea ib cus 9 O c 9 ER A AD E i res i CLOSE tst D m c T FASES E N E T E ir 380 3 ij D L Y A OPEN tst J la L OPENS IM OPEN is rd Gr P SN UM DS 9 eo 9 o JXDP3 Big JXDP2 JOH je z r4 is Notes e See Chapter 2 for detailed information on jumpers I O ports and JF1 front panel connections e g indicates the location of Pin 1 Jumpers not indicated are for testing only e LED Indicators that are not documented are for testing only 1 3 SUPER X100QBi F Platform User s Manual AOM X10QBi A I O Module JEDUID1 AOM X10QBi A I O Module Jumpers Connectors LED Indicator LAN CTRL I O Module Jumpers LED Indicator AOM X10QBi A I O Module Image m o o jE o cw o o BMC 00000000 00000000 I O Modul
88. is feature to set the correctable error threshold for spare memory modules The default setting is 32767 Leaky Bucket Low Bit Use this feature to set the Low Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller The default setting is 40 Leaky Bucket High Bit Use this feature to set the High Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller The default setting is 41 Publish SRAT Static Resource Affinity Table Select Enable for the BIOS to report the ACPI SRAT table to the OS in order to enhance CPU and memory performance when the NUMA Non Uniformed Memory Access is optimized The options are Enable and Disable SRAT Memory Hot Plug If t his item is set to Disable memory hot plugging support will be disabled and hot plugging entries will be removed This feature is used for the OS that does not support memory hot plugging The options are Enable and Disable SRAT CPU Hot Plug If t his item is set to Disable CPU hot plugging support will be disabled and hot plugging entries will be removed This feature is used for the OS that does not support memory hot plugging The options are Enable and Disable 4 29 SUPER X10QBi Platform User s Manual SLIT System Locality Information Table One Hop Value Select Enable for the BIOS to build the SLIT table to show
89. ise extreme care when installing or removing DIMM modules to prevent any possible damage Check Supermicro s website for recommended memory modules 1 Install the desired number of DIMM modules on a memory card each card supports up to 12 DIMMs When installing memory be sure to always populate the blue slots first starting with DIMMA1 DIMMB1 DIMMC1 and DIMMD71 For best performance please use the memory modules of the same type and same speed in the same bank 2 Push the release tabs outwards on both ends of the DIMM slot to unlock it 3 Align the key of the DIMM module with the receptive point on the memory slot 4 Align the notches on both ends of the module with the receptive points on the ends of the slot Use two thumbs together to press module straight down into the slot until the module snaps into place and the PRESENT LED as shown above is on 5 Press the release tabs to the lock positions to lock the DIMM module into the slot Note Press the memory straight down into the slot until it is properly seated and the Present LED is on Be sure Notches to always populate the blue slots first starting with DIMMA1 DIMMB1 DIMMC1 and then DIMMD1 Release Tabs Chapter 2 Installation Installing Populated X10QBi Memory Cards on the Baseboard After the memory card is populated with the desired number of RDIMM LRDIMM modules it is ready to be installed on the baseboard Install one or two memo
90. l Asia Pacific Address Tel Fax Web Site Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A 1 408 503 8000 1 408 503 8008 marketing supermicro com General Information support supermicro com Technical Support www supermicro com Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands 31 0 73 6400390 31 0 73 6416525 sales supermicro nl General Information support supermicro nl Technical Support rma gsupermicro nl Customer Support Super Micro Computer Inc 3F No 150 Jian 1st Rd Zhonghe Dist New Taipei City 23511 Taiwan R O C 886 2 8226 3990 886 2 8226 3992 www supermicro com tw Technical Support Email Tel support supermicro com tw 886 2 8226 3990 SUPER X10QBi Platform User s Manual Table of Contents Preface Chapter 1 Overview 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 2 1 2 2 2 3 2 4 2 5 2 6 2 7 I M m 1 1 Processor PCH Platform Overview octo trente 1 15 Special Features crc rere tr oue axe see es Scie Nase de NR p eure 1 16 PG Health MOnItOFIFig aoro eerte iler entere ccs ec ttu petas 1 16 jl cg M ED 1 17 Power Supply Super lO eea exse recita ti Sauce s tidem sede tees molte f Advanced Power Management cccccscceeeeeeneeeeeeneeeeeseaaeeeeeenaeeeeeenaaeees 1 18
91. l The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU Once the ther mal sensor detects that the CPU temperature is too high it will automatically turn on the thermal fans to prevent the CPU from overheating The onboard chassis thermal circuitry can monitor the overall system temperature and alert the user when the chassis temperature is too high Note To avoid possible system overheating please be sure to provide adequate airflow to your system System Resource Alert This feature is available when the system is used with SuperDoctor IIl in Windows OS or with SuperDoctor II in Linux SuperDoctor is used to notify the user of 1 16 Chapter 1 Overview certain system events 1 5 ACPI Features ACPI stands for Advanced Configuration and Power Interface The ACPI specifica tion defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system including the hardware operating system and application software This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers In addition to enabling operating system directed power management ACPI also provides a generic system event mechanism for Plug and Play and a
92. ld by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro disclaims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale
93. le on the right for pin definitions NIC1 NIC2 LED Indicators The NIC Network Interface Control ler LED connection for GLAN port 1 is located on pins 11 and 12 of JF1 and the LED connection for GLAN Port 2 is on pins 9 and 10 Attach the NIC LED cables to display network activity Refer to the table on the right for pin definitions Eu Pole EDU SUPER X10QBi mee P A ERCE nict Link LED HDD LED Pin Definitions JF1 Pin Definition 13 3 3V Standby 14 HD Active GLAN1 2 LED Pin Definitions JF1 Pin Definition 9 NIC 2 Activity LED 10 NIC 2 Link LED 11 NIC 1 Activity LED 12 NIC 1 Link LED A HDD LED B NIC1 Link LED C NIC1 Activity LED D NIC2 Link LED E NIC2 Activity LED 20 419 Groun olo NMI x e x FP PWRLED G HDD LED Oo 3 3V o 3 3V NIC1 Active LEI 8 o o Nic2 Active ED Blue Led Cathode UID Qynic2 Link LED Red OH Fan Fail PWR FaiL Power Fail LED eje 3 3V ONIN OO 9 Oo Oo Ground O O E Reset Button Ground PWR gt Power Button Chapter 2 Installation Overheat OH Fan Fail PWR Fail OH Fan Fail PWR Fail UID LED UID LED Pin Definitions JF1 Pin Definition Connect an LED cable to the OH P A if Red
94. lect Jumper Settings Jumper Setting Definition 1 2 Normal Default 2 3 Manufacturer Mode 9 uu a S ed JIPMB1 IS BE oO id 9 gg 3 zz zz FONSOR omo amp 9 Q S omo PE EI gi E ETE Bras 315 me S BI EE aart ig 2 gl ers i gje LSATAS SIE g eal ELI EIE ing ELEN 2 IE JG s alle VO E a fii oO 27s H PES E S8 S gos satas B LEE x RS S x HSATA2 P3 e 2 LEDIOt Jen S 2 d TE l 0 S 9 g 5 KSATAO 5 p 3 om ES es z E 8 3 B12 S o ED 15 TES M2 fe JMS Li e LED23 8s T PTI Eo oP MEDI m i Lect f m Gi SUPER X10QBi mes a IBRRCDDE FE MAC CODE x J OPEN ist Gi NS E E leary JPN 8X O E 3HOd 0L107S vido eS 9 S o E E m x Zid LOTS INS 2 37 A ME Recovery B ME Mode Select SUPER Xx10GBi Platform User s Manual 2 10 Onboard LED Indicators LAN LEDs On the I O Module Activity E 1 1 LED Two LAN ports LAN 1 LAN 2 are located on the I O module of the system Each Eth Rear View Li 4E facing the rear side of the chassis ernet LAN port has two LEDs The yellow LAN 1 LAN 2 Link LED Right LED indicates activity while the other Link LED State LED may be green
95. led and Auto USB 3 0 Support Select Enabled for USB 3 0 support The options are Disabled and Enabled XHCI Hand Off This feature is a work around solution for operating systems that do not support XHCI Extensible Host Controller Interface hand off The XHCI ownership change should be claimed by the XHCI driver The settings are Enabled and Disabled EHCI Hand Off This item is for operating systems that do not support Enhanced Host Controller Interface EHCI hand off When this item is enabled EHCI ownership change will be claimed by the EHCI driver The settings are Enabled and Disabled USB Mass Storage Driver Support Select Enabled for USB mass storage device support The options are Disabled and Enabled 4 32 Chapter 4 AMI BIOS Port 60 64 Emulation Select Enabled for I O port 60h 64h emulation support which will provide complete USB keyboard legacy support for the operating system that does not support Legacy USB devices The options are Disabled and Enabled USB Hardware Delays and Time outs USB Transfer Time out Use this feature sets the USB Transfer Time out values for control bulk and inter rupt transfers The default setting is 20 sec seconds Device Reset Time out Select Auto for the BIOS to automatically configure the delay maximum time setting before a USB device properly reports itself to the system The options are Auto and Manual Device Power up Delay Use this feature sets the maximum t
96. level for memory reference codes which are used for memory multiple threads initialization The options are LO L1 and L2 Halt on Memory Fatal Error Select Enabled to put the system on hold when a memory fatal error occurs The options are Enabled and Disabled Promote MEM Memory Train Err Error Select Enabled to promote warnings when a memory training error occurs The options are Enabled and Disabled 4 26 Chapter 4 AMI BIOS Promote MEM Memory RAS Warnings Select Enabled to promote warnings pertaining to RAS Reliability Availability Serviceability issues The options are Enabled and Disabled Memory Test When this feature is set to Enabled memory tests will be performed in the sys tem The options are Enabled and Disabled JCK Jordon Creek per DIMM Parity Error Enable Select Enabled for the system to monitor and keep track of DIMM parity errors occurred on each DIMM module The options are Enabled and Disabled DRAM RAPL Running Average Power Limit Mode Use this feature to set the run time power limit mode for DRAM modules The options are Disabled VR Measured and Estimated Closed Loop Thermal Throttling Select Enabled to support Closed Loop Thermal Throttling which will improve reliability and reduces CPU power consumption via automatic voltage control while the CPU are in idle states The options are Disabled and Enabled Memory Hot Sense Thermal Throttling Select Enabled to activate thermal throttl
97. ll a power surge protector to help avoid problems caused by power surges 1 7 Super I O The Super I O provides functions that comply with the ACPI Advanced Configu ration and Power Interface which includes support of legacy and ACPI power 1 17 SUPER X100QBi F Platform User s Manual management through an SMI or SCI function pin It also features auto power management to reduce power consumption 1 8 Advanced Power Management The new advanced power management features supported by the motherboard includes the following Intel Intelligent Power Node Manager NM Available when the NMView utility is installed in the system The Intel Intelligent Power Node Manager IPNM provides your system with real time thermal control and power management for maximum energy efficiency Although IPNM Specification Version 1 5 20 is supported by the BMC Baseboard Management Controller your system must also have IPNM compatible Manage ment Engine ME firmware installed to use this feature Note Support for IPNM Specification Version 1 5 or Version 2 0 depends on the power supply used in the system Management Engine ME The Management Engine which is an ARC controller embedded in the PCH pro vides Server Platform Services SPS to your system The services provided by SPS are different from those provided by the ME on client platforms Chapter 2 Installation Chapter 2 Installation 2 1 Standardized Warning S
98. n Installing a Passive CPU Heatsink 1 Do not apply thermal grease to the heatsink or the CPU die the required amount has already been applied 2 Place the heatsink on top of the CPU so that the four mounting holes are aligned with those on the motherboard and the underlying heatsink bracket 3 Screw in two diagonal screws the 1 and 2 screws in the figure below until just snug To avoid possible damage to the CPU do not over tighten the screws 4 Finish the installation by fully tightening all four screws Install screws in the sequence as shown Screw 2 Screw 2 Screw 1 Mounting Holes Heatsink Bracket SUPER Xx10GBi Platform User s Manual Removing the Heatsink Warning We do not recommend that the CPU or heatsink be removed However if you do need to uninstall the heatsink please follow the instructions below to remove the heatsink to avoid damaging the CPU or CPU socket 1 Unscrew the heatsink screws from the motherboard in the sequence as shown in the figure below 2 Gently wiggle the heatsink to loosen it from the CPU Do not use excessive force 3 Once the CPU is loosened remove the CPU from the CPU socket 4 Clean the surface of the CPU and the heatsink removing any thermal grease Reapply the proper amount of fresh thermal grease on the surface before
99. n operating system independent interface for configuration control ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with Windows 2008 and newer operating systems 1 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation This is even more important for processors that have high CPU clock rates The X10QBi system motherboard includes a 24 pin ATX main system power con nector JWP1 six 8 pin power connectors JWP2 JPW7 and a SATA DOM power connector JWF1 Please connect these power connectors to the power supply to provide adequate power to the components and the system Warning To avoid damaging the power supply or the system be sure to connect the 24 pin ATX Main Power connector JPW1 six 8 pin power connectors JPW2 7 and the SATA DOM power connector JSD1 to the power supply Failure to do so will void the manufacturer warranties on both your power supply and the board It is strongly recommended that you use a high quality power supply that meets ATX Power Supply Specification 2 02 or above It must also be SSI compliant For more information please refer to the website at http www ssiforum org Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also insta
100. n the NVRAM Non Volatile RAM gt Append KEK Key Exchange Key Select lt Yes gt to load the new KEK from the manufacture defaults Select lt No gt to load the new KEK from other sources Authorized Signature Database DB gt Delete DB DataBase Select lt Yes gt to confirm deletion of a database from the NVRAM Non Volatile RAM P Set New DB DataBase Select lt Yes gt to confirm that a new database will be set in the NVRAM Non Volatile RAM gt Append DB DataBase Select lt Yes gt to load the new database from the manufacture defaults Select lt No gt to load the new database from other sources Forbidden Signature Database DBX gt Delete DBX Select Yes to confirm deletion of the DBX files from the Non Volatile RAM NVRAM P Set New DBX Select Yes to confirm that the new DBX files will be downloaded to the Non Volatile RAM NVRAM gt Append DBX DataBase Timer Select Yes to load the new DBX files from the manufacture defaults Select No to load the new DBX files from other sources 4 46 Chapter 4 AMI BIOS P image Execution Policy Internal FA Select Always Execute for the BIOS to always execute Image Execution Policy commands on each device path when system security is compromised The default setting is Always Execute Option ROM Select Deny Execute to prevent the BIOS from executing Option ROM commands to boot up a system from a network device when system
101. nce The options are Disable and Enable Adjacent Cache Line Prefetch Available when supported by the CPU Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised Select Disable for the CPU to prefetch both cache lines for 64 bytes The options are Disable and Enable Note Please reboot the system for changes on this setting to take effect Please refer to Intel s web site for detailed information DCU Data Cache Unit Streamer Prefetcher Available when supported by the CPU If set to Enable the DCU Streamer Prefetcher will prefetch data streams from the cache memory to the DCU Data Cache Unit to speed up data accessing and pro cessing for CPU performance enhancement The options are Disable and Enable 4 7 SUPER X10QBi Platform User s Manual DCU IP Prefetcher If this feature is set to Enable the IP prefetcher in the DCU Data Cache Unit will prefetch IP addresses to improve network connectivity and system performance The options are Enable and Disable DCU Mode Use this feature to set the data prefecting mode for the DCU Data Cache Unit The options are 32KB 8Way Without ECC and 16KB 4Way With ECC Direct Cache Access DCA Select Enable to use Intel DCA Direct Cache Access Technology to improve the efficiency of data transferring and accessing The options are Enable and Disable DCA Prefetch Delay A DCA Prefetcher is used with a TOE TCP IP Offload Engine adapter to prefe
102. not upgrade the BIOS unless your system has a BlOS related issue Flashing the wrong BIOS can cause irreparable damage to the system In no event shall the manufacturer be liable for direct indirect special incidental or consequential damage arising from a BIOS update If you have to update the BIOS do not shut down or reset the system while the BIOS is being updated to avoid possible boot failure 4 2 Main Setup When you first enter the AMI BIOS setup utility you will enter the Main setup screen You can always return to the Main setup screen by selecting the Main tab on the top of the screen The Main BIOS Setup screen is shown below System Date 4 2 Chapter 4 AMI BIOS The AMI BIOS Main menu displays the following information System Date System Time Use this option to change the system date and time using the arrow keys Enter new values through the keyboard and press Enter Press the Tab key to move between fields The date must be entered in Day MM DD YYYY format The time is entered in HH MM SS format Note The time is in the 24 hour format For example 5 30 P M appears as 17 30 00 Supermicro X10QBi Version This item displays the SMC version of the BIOS ROM used in this system Build Date This item displays the date that the BIOS setup utility was built Memory Information Total Memory This item displays the amount of memory that is available in the system 4 3 SUPER X10QBi Platf
103. ntegrated memory controller with support of DDR 3 1600 MHz RDIMM LRDIMM modules Virtualization Technology e 44 bit physical address and 48 bit virtual address supported SUPER X100QBi F Platform User s Manual 1 3 Special Features Recovery from AC Power Loss Basic I O System BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must press the power Switch to turn it back on or for the system to automatically return to a power on state See the Advanced BIOS Setup section to change this setting The default setting is Last State 1 4 PC Health Monitoring This section describes the PC health monitoring features of the board This platform has five onboard system hardware monitor chips that provide PC health monitoring An onboard voltage monitor will scan the onboard voltages continuously CPU vcore up to 4 CPU cores 3 3VSB P3V3 12V 5V memory voltage and battery voltage If a voltage becomes unstable a warning is given or an error message is sent to the screen The user can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Control PC health monitoring in the BIOS can check the RPM status of the cooling fans The onboard CPU and chassis fans are controlled by the IPMI interface Environmental Temperature Contro
104. o Flows j 2 10 ll ll e JPTAEB sLED2 lle vei H GSUPERG X 0QBi mw z Tm m es BARCODE rE a 3 THE LED Porto mc oce 3 mE BJ17 En TB AN cw 9 GN cp Ss 9 N cms A An cpus fa i 9o Ug 7 Ven da RE 9 re Ue s ea X9 e N Ure IU l lai set l OPEN ist MO enses s OPEN ist V KG O On O 4 O a vo eo 2 32 Chapter 2 Installation 2 9 Jumper Settings Explanation of Jumpers To modify the operation of the system board jumpers can be used to choose between op tional settings Jumpers create shorts between two pins to change the function of the connec tor Pin 1 is identified with a square solder pad on the printed circuit board See the system board layout pages for jumper locations Note On two pin jumpers Closed means the jumper is on and Open means the jumper is off the pins LAN Enable Disable On the I O Module JPL1 enables or disables the LAN Port1 LAN Port2 on the X10QBi A I O module Refer to the table on the right for jumper settings The default setting is Enabled O LAN CTRL BNC o ex E LED28 JEDUIDI 2 33 Connector 3 21 m Jumper Cap 39 2 1 Setting Pin 1 2 short LAN Enable Jumper Settings Jumper Setting Definition 1 2 Enabled default 2 3 Disabled A LAN Enable
105. o save the changes or select No to return to the BIOS without making changes Discard Changes Select this feature and press Enter to discard all the changes and return to the BIOS setup When the dialog box appears asking you if you want to load previ ous values select Yes to load the values previous saved or select No to keep the changes you ve made so far Restore Optimized Defaults Select this feature and press Enter to load the optimized default settings that help optimize system performance When the dialog box appears asking you if you want to load optimized defaults select Yes to load the optimized default settings or select No to abandon optimized defaults Save as User Defaults Select this feature and press Enter to save the current settings as the user s defaults When the dialog box appears asking you if you want to save values as user s defaults select Yes to save the current values as user s default settings or select No to keep the defaults previously saved as the user s defaults Restore User Defaults Select this feature and press Enter to load the user s defaults previously saved in the system When the dialog box appears asking you if you want to restore user s defaults select Yes to restore the user s defaults previously saved in the system or select No to abandon the user s defaults that were previously saved Boot Override This feature allows the user to override the Boot Option Priority
106. om a legacy device The options are Immediate and Postponed Power Configuration Watch Dog Function If enabled the Watch Dog timer will allow the system to automatically reboot when a non recoverable error that lasts for more than five minutes occurs The options are Enabled and Disabled Power Button Function If this feature is set to Instant Off the system will power off immediately as soon as the user presses the power button If this feature is set to 4 Seconds Override the system will power off when the user presses the power button for 4 seconds or longer The options are Instant Off and 4 Seconds Override Restore on AC Power Loss Use this item to set the power state after a power outage Select Stay Off for the System power to remain off after a power outage Select Power On to turn on the System power after a power outage Select Last State to allow the system to resume its last power state before a power outage The options are Power On Stay Off and Last State CPU Configuration This submenu displays the following CPU information as detected by the BIOS It also allows the user to configure CPU settings b Processor 0 Processor 1 Processor 2 Processor 3 This submenu displays the following information of the CPU installed in Socket 1 Socket 2 Socket 3 and Socket 4 Processor Socket Processor ID Processor Frequency 4 5 SUPER X10QBi Platform User s Manual Microcode Revision L1 Cache
107. om for processor and memory support updates This product is intended to be installed and serviced by professional technicians Manual Organization Chapter 1 describes the features specifications and performance of the X10QBi System and provides detailed information on the Intel 602J chipset Chapter 2 provides hardware installation instructions Read this chapter when in stalling the processor memory modules and other hardware components into the System If you encounter any problems see Chapter 3 which describes trouble shooting procedures for video memory and system setup stored in the CMOS Chapter 4 includes an introduction to BIOS and provides detailed information on CMOS setup configuration Appendix A provides a list of BIOS error beep codes Appendix B details software installation instructions Appendix C provides UEFI BIOS recovery instructions SUPER X10QBi Platform User s Manual Conventions Used in this Manual Pay special attention to the following symbols for proper system motherboard instal lation and to avoid damage done to the system or injury to yourself Warning Important information given to ensure proper system installation or to prevent damage to the components Note Additional information given to provide important information for correct system setup Preface Contacting Supermicro Headquarters Address Tel Fax Email Web Site Europe Address Tel Fax Emai
108. ompatibility list HDD support Check whether all hard disk drives HDDs work properly Replace the bad HDDs with good ones System cooling Check system cooling to make sure that all heatsink fans and CPU system fans etc work properly Check Hardware Monitoring settings in the BIOS to make sure that the CPU and system temperatures are within the 3 3 SUPER X100GBi Platform User s Manual 6 normal range Also check the front panel Overheat LED to make sure that the Overheat LED is not on Adequate power supply Make sure that the power supply provides adequate power to the system and that all power connectors are connected Please refer to our website for more information on the minimum power requirement Proper software support Make sure that the correct drivers are used B When the system becomes unstable before or during OS installation check the following 1 3 2 Source of installation Make sure that the devices used for installation are work ing properly including boot devices such as CD DVD discs CD DVD ROMs Cable connection Check to make sure that all cables are connected and work ing properly Using minimum configuration for troubleshooting Remove all unnecessary com ponents starting with add on cards first and use the minimum configuration with a CPU and a memory module installed to identify the trouble areas Refer to the steps listed in Section A above for proper troubleshooting proc
109. ons are Auto PO 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB and P9 0 0 3 5 dB Gen3 Generation 3 DN TX Preset Hint Use this item to set the Preset Hint mode for PCI E Gen3 downstream transac tions from the master device to a slave device The options are Auto PO 6 0 dB P1 7 0 dB P2 8 0 dB P3 9 0 dB PA 10 0 dB P5 11 0 dB and P6 12 0 dB Gen3 Generation 3 Up TX Preset Use this item to set the Preset mode for PCI E Gen3 upstream transactions from a slave device to the master device The options are Auto PO 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB and P9 0 0 3 5 dB Hide Port Select Yes to hide the PCI E port specified from the OS The options are No and Yes Chapter 4 AMI BIOS gt Integrated IO Configuration Enable I OAT Select Enable to enable Intel I OAT I O Acceleration Technology which signifi cantly reduces CPU overhead by leveraging CPU architectural improvements and freeing the system resource for other tasks The options are Enable and Disable No Snoop Select Enable to support no snoop mode for each CB device The options are Disable and Enable Disable TPH Select Enable to de activate TLP Processing Hint support The options are Dis able an
110. orm User s Manual 4 3 Advanced Setup Configurations Select the Advanced tab to access the following submenu items Setup Utility Copyright E 2013 American Meg Inc gt Boot Features Boot Configuration Quiet Boot Use this item to select bootup screen display between POST messages and the OEM logo Select Disabled to display the POST messages Select Enabled to display the OEM logo instead of the normal POST messages The options are Enabled and Disabled AddOn ROM Display Mode Use this item to set the display mode for the Option ROM Select Keep Current to use the current AddOn ROM Display setting Select Force BIOS to use the Op tion ROM display set by the system BIOS The options are Force BIOS and Keep Current Bootup Num Lock Use this item to set the power on state for the Numlock key The options are Off and On Wait For F1 If Error Select Enabled to force the system to wait until the F1 key is pressed when an error occurs The options are Disabled and Enabled Chapter 4 AMI BIOS Interrupt 19 Capture Interrupt 19 is the software interrupt that handles the boot disk function When this item is set to Immediate the BIOS ROM of the host adaptors will immediately capture Interrupt 19 at bootup and allow the drives that are attached to these host adaptors to function as bootable disks If this item is set to Postponed the BIOS ROM of the host adaptors will only capture Interrupt 19 during bootup fr
111. ory Beep Code is issued by the system check the following 1 Make sure that the memory modules are compatible with the system and that the DIMM modules are properly and fully installed For memory compatibility refer to the Memory Compatibility chart posted on our website at http www supermicro com Check if different speeds of DIMMs have been installed It is strongly recom mended that the same RAM speed of DIMMs are used in the system Make sure that you are using the correct type of DDR3 Registered or Load Reduced RDIMM LRDIMM ECC of up to 1600 MHz memory as recommended by the manufacturer Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results Make sure that all memory modules are fully seated in their slots Follow the instructions given in the Memory section in Chapter 2 Please follow the instructions given in the DIMM population tables listed in the Memory section in Chapter 2 to install your memory modules When the System Becomes Unstable A When the system becomes unstable during or after OS installation check the following 1 CPU BIOS support Check whether your CPU is supported and whether you have the latest BIOS installed Memory support Make sure that the memory modules are supported by test ing the modules using memtest86 or a similar utility Note Refer to the product page on our Website at http www supermicro com for the memory c
112. ot P3M1 populate this slot first SMI Slot P3M1 SMI Slot P3M2 CPU 4 SMI Slot P4M1 populate this slot first SMI Slot P4M1 SMI Slot P4M2 Note 1 For proper memory installation on the memory card please always populate the blue slots first starting with DIMMA1 DIMM B1 DIMMC1 and then DIMMD1 Note 2 To optimize system performance we recommend that the 4 CPU configuration be used in your system either with full loading of 96 memory modules installed or half loading with 48 modules installed Please also note that the 1 CPU configuration has not been validated by Supermicro 2 16 Chapter 2 Installation Populating RDIMM LRDIMM ECC Memory Modules Intel E7 Series Processor RDIMM and LRDIMM Memory Configuration for Performance Mode 2 1 Type Ranks Memory Speed GHz and Voltage V Validated by Slot per Channel SPC and DIMM Per Capacity Per Channel DPC DIMM Per DIMM amp Data 2 Slots Per Channel 3 Slots Per Channel Width 2GB aoe 1DPC 2DPC 1DPC 2DPC 3DPC 1 35V 1 5V 1 35V 1 5V 1 35V 1 5V 1 35V 1 5V 1 5V RDIMM SRx4 4GB 8GB 1333 1333 1333 1333 1333 1333 1066 1333 1066 1333 RDIMM DRx4 8GB 16GB 1333 1333 1333 1333 1333 1333 1066 1333 1066 1333 RDIMM QRx4 16GB 32GB 1066 1066 1066 1066 1066 1066 N A N A N A 1333 1333 LRDIMM QRx4 16GB 32GB 1333 1333 1333 1333 1333 1333 1333 1333 1333 LRDIMM 8Rx4 32GB 64GB N A 1066 N A 1066 N A 1066 N A 1066 1066 RM
113. ound z Note For more information on SATA HostRAID configuration please refer to the Intel SATA HostRAID User s Guide posted on our Website http www supermicro com A I SATAO B I SATA1 C I SATA2 D I SATA3 E I SATA4 F I SATAS 9 NVI ER NV EFA ey eo Zid LOTS INS Wed 107S INS 8X 0 E 3 0d SLOTS zd 8X 0 3d 91015 139 ZNEd 107S INS 9 8X 0 33d 1075 NdII 8X 0 E 319d 81075 rnd2 SATAS SIX OFT 10d LOTS dI 94X 0 E Id 6107S ENdO 8X 0 E 3HOd OLLOTS dO 91X 0 3 0d LLLOTS pNdo HSATA2 LEDION LSATAO 5 WPA LOTS INS 88 LEd LOTS INS 8 oc 8 ZU War JPMET JPSREJP LED15 J LED28y LED23 85 JeTB aoi H JM2 ena 1018 ws F Bose b L TAS wn J J JO i LOr NS je V y ES e AXDPI E sph az zB zz EXE fummum Fis de YF Coon S ssdnusecceed Boo B JPWI PM JPW HaT a B SUPER x10GBi Platform User s Manual Notes 2 40 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistanc
114. pports Slot PCI E 3 0 x8 and Slot2 PCI E 3 0 x16 CPU2 supports Slot3 PCI E 3 0 x8 Slot4 PCI E 3 0 x16 and Slot5 PCI E 3 0 x8 CPUS supports Slot6 PCI E 3 0 x8 Slot7 PCI E 3 0 x8 and Slot9 PCI E 3 0 x16 CPUA supports Slot8 PCI E 3 0 x8 Slot10 PCI E 3 0 x8 and Slot11 PCI E 3 0 x16 Chapter 1 Overview X10QBi Baseboard Quick Reference Jumper JBT1 JPC1 JPC2 JPB1 on the I O module JPG1 on the I O module JPME1 JPME2 JPL1 on the I O module JPT1 JWD1 ME Mode Recovery ME Mode Select GLAN1 GLAN2 Enable TPM Enabled Watch Dog X10QBi Jumpers Description Default Setting Clear CMOS See Chapter 3 SMB to PCI E Slots Pins 2 3 Disabled BMC Enabled Pins 1 2 Enabled VGA Enabled Pins 1 2 Enabled Pins 1 2 Normal Pins 1 2 Normal Pins 1 2 Enabled by con necting to the cable Pins 1 2 Enabled Pins 1 2 Reset X10QBi Baseboard Connectors Connectors 4 pin Fans BT2 COM1 on the I O module COM2 on the mainboard I SATA 0 5 JD1 JF1 JIPMB1 JL1 JOH1 JP C1 JPW1 JPW2 JPW7 JSD1 JVG1 2 on the I O mod ule LAN1 2 on the I O mod ule LANS on the I O module SP1 T SGPIO 1 2 USBO 1 USB2 3 USB6 7 Description 4 pin System Cooling Fan Headers FAN1 FAN10 Onboard Battery See Chpt 3 for Battery Disposal Serial COM Part 1 located on the AOM X10QBi A I O module Serial COM Port Header 2 Intel SATA Connectors 0 5 Speaker Power LED In
115. r BIOS recovery if the main BIOS boot crashes However if the BIOS boot block crashes you will need to follow the procedures in Appendix D C 3 How to Recover the Main BIOS Block Using a USB Attached Device This feature allows the user to recover a BIOS image using a USB attached device without additional utilities used A USB flash device such as a USB Flash Drive or a USB CD DVD ROM RW device can be used for this purpose However a USB hard disk drive cannot be used for BIOS recovery at this time C 1 SUPER X10QBi Platform User s Manual To perform a UEFI BIOS recovery using a USB attached device follow the instruc tions below 1 Using a different machine copy the Super ROM binary image file into the disc Root Directory of a USB device or writeable CD DVD Note If you cannot locate the Super ROM file in your driver disk visit our website at http www supermicro com to download the BIOS image into a USB flash device and rename it Super ROM for BIOS recovery use 2 Insert the USB device that contains the new BIOS image Super ROM into your USB drive and power on the system 3 While powering on the system keep pressing Ctrl and Home simultane ously on your keyboard until your hear two short beeps This may take from a few seconds to one minute 4 After locating the new BIOS binary image the system will enter the BIOS Recovery menu as shown below Note At this point you may decide if
116. re Enable and Disable Interrupt Remapping Select Enable to support Interrupt Remapping to enhance system performance The options are Enable and Disable Pass Through DMA Select Enable for the Non Iscoh VT d engine to pass through DMA Direct Memo ry Access to enhance system performance The options are Enable and Disable ATS Select Enable for the Non Iscoh VT d engine to pass through ATS to enhance System performance The options are Enable and Disable Super Pages Select Enable for VT d Super Pages support to improve system performance The options are Enable and Disable Coherence Support Select Enable for Non Iscoh VT d Engine Coherence support to improve system performance The options are Disable and Enable PCI Express Global Options Gen3 Generation 3 Phase3 Loop Count Use this feature to set the Loop Count value for PCI E Gen3 Phase3 operations The options are 1 4 16 and 256 Skip Halt On DMI Degradation Select Enable to avoid the system being put on hold during DMI width link deg radation The options are Disable and Enable 4 20 Chapter 4 AMI BIOS Power Down Unused Ports Select Enable to disable the PCI E ports that are not active The options are Disable Enable HSX Disable SLD WA Revision Select Auto for the BIOS to automatically update the SLD WA revision status The default setting is Auto QPI Quick Path Interconnect Configuration QPI Status The following information will display
117. recover the BIOS boot block This section provides an introduction to the feature BIOS Boot Block A BIOS boot block is the minimum BIOS loader required to enable necessary hardware components for the BIOS crisis recovery flash used to update the main BIOS block An on call BIOS boot block corruption may occur due to a software tool issue see the image below or an unexpected power outage during BIOS updates AMI Firmware Update Utility v3 64 68 Copyright C 2812 American Megatrends Inc All R Reading flash ME Bata Size checking ok FFS checksums ok Erasing Boot Block Up ating Boot Block ls 137 BIOS Boot Block Corruption Occurrence When a BIOS boot block is corrupted due to an unexpected power outage or a software tool malfunctioning during BIOS updates you can still reboot the system by closing pins 2 and 3 using a cap on Jumper JBR1 When JBR1 is set to pins 2 and 3 the system will boot from a backup boot block pre loaded in the BIOS by the manufacturer D 1 SUPER X10QBi Platform User s Manual D 2 Steps to Reboot the System by Using Jumper JBR1 1 Power down the system 2 Close pins 2 3 on Jumper JBR1 and power on the system 3 Follow the BIOS recovery SOP listed in the previous chapter Appendix C 4 After completing the steps above power down the system 5 Close pins 1 2 on Jumper JBR1 and power on the system D 2 Disclaimer Continued The products so
118. ry cards for each CPU installed on the baseboard starting with SMI Slot P1M1 The X10QBi baseboard supports up to four pro cessors Refer to the table below to install memory cards that are populated with DIMM modules to the X10QBi baseboard CPUs and the Corresponding Memory Cards CPU Corresponding DIMM Modules No of card s for One 1 Memory Card for each CPU Two 2 Memory Cards for each CPU Each CPU Installed populate this slot first Installed CPU 1 SMI Slot P1M1 SMI Slot P1M1 SMI Slot P1M2 CPU 2 SMI Slot P2M1 SMI Slot P2M1 SMI Slot P2M2 CPU 3 SMI Slot P3M1 SMI Slot P3M1 SMI Slot P3M2 CPU4 SMI Slot P4M1 SMI Slot PAM1 SMI Slot PAM2 deed aii H7 c a a Oo ZNAI 104 ZNZd 301S INS LNIG ZNdI 404 LWZd 301S INS OSUPERG MQQBi nee fer MRAR CODE FE Qo 0 luca ice d OS TNS 404 LWid 301S INS og e E Guucc peoppd r up Ec eege 2 13 SUPER X10QBi Platform User s Manual Removing the X10QBi Memory Card from the Baseboard Be sure to remove a memory card from the baseboard before you remove the RDIMM LRDIMM modules from the memory card To remove memory cards from the baseboard follow the reverse sequence of memory card installation as shown on the memory population table on the previous page Removing RDIMM LRDIMM Memory Modules from the X10Q
119. s Manual Notes Appendix B Software Installation Instructions Appendix B Software Installation Instructions B 1 Installing Software Programs After you have installed the operating system a screen as shown below will ap pear You are ready to install software programs and drivers that have not yet been installed To install these programs click the icons to the right of these items Note To install the Windows OS please refer to the instructions posted on our website at http www supermicro com support manuals S SUPERMICRO X10QBi Motherboard Drivers amp Tools Win7 x amp B Intel Chipset INF files SUPE RM I C Re Microsoft Net Framework Optional Drivers amp Tools ASPEED Graphics Driver PCH 602 Intel Graphics Media Accelerator Driver X10QBi Intel Rapid Storage Technology Enterprise Intel PRO Network Connections Drivers Trusted Platform Module Driver Optional SUPERMICRO Computer Inc SUPERMICRO SuperDoctor 5 Build driver diskettes and manuals Browse CD J Auto Start Up Next Time For more information please visit SUPERMICRO s web sie Driver Tool Installation Display Screen f Note 1 Click the icons showing a hand writing on the paper to view the readme files for each item Click on a computer icon to the right of an item to install this item from top to bottom one at a time After installing each item you must reboot the system before proceeding with the next item on
120. t Control Pane RT 2 22 Front Control Panel Pin Definitions irsana 2 23 NMI Button Power LED vi Table of Contents HDD EBD nier t e e REDE eR EE Tess euet gee ERR ae 2 24 NICT NIC2 VED IndiCators i netten ire tene eroe eode eds 2 24 Overheat OH Fan Fail PWR Fail UID LED em 2 25 Power Fail E ain seve cosets cus 2 25 Reset BUON D 2 26 Power BUMOI mE acces uecrnaers crremssneasran AAEE 2 26 2 6 Connecting Cables cie Heer S ue cene asain 2 27 xol deron P 2 27 DOM Power Connector o niet rrt retro cn rne er E Chr 2 27 Pani AaGens P PT 2 28 Chassis ritrilSIOni iiit rtt rete tpe eroe t e D iei d 2 28 internal BUZZER m aetue cape 2 29 Power LED SpCaker niens ernatu ANAA In iA kie ESTAGANT 2 29 Overheat LED F am Failon aa SE 2 30 T SGPIO 1 2 Headers tee cre t pen te eet 2 30 Power SMB I C Connector sssssssssssssseeeeeeeeneenenenes 2 31 IPM Bese CE M 2 31 Universal Serial Bus USB On the Main BoardQ ssss 2 32 2 9 Jumper Settings ont cereo et na ees 2 33 Explanation Of Jumper icoucce nente ot oe eer ove nte pp EEO EOE EEEE 2 33 LAN Enable Disable On the I O Module ssseeenees 2 33 BMC Enable On the I O Module eese 2 34 VGA Enable On t
121. t Request address of Serial Port 2 SOL Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port becomes unavailable The options are Auto O 2F8h IRQ 3 IO23F8h IRQ 3 4 5 6 7 10 11 12 l O 2F8h IRQ 3 4 5 6 7 10 11 12 IOZ3E8h IRQ 3 4 5 6 7 10 11 12 IOZ2bE8h IRQ IRQ 3 4 5 6 7 10 11 12 Device Mode Use this feature to select the desired mode for a serial port specified The options are 24MHz 13 and 24MHz Serial Port 2 Attribute Use this feature to select the attribute for this serial port The options are COM SOL Serial On LAN and COM 4 38 Chapter 4 AMI BIOS 9 COM1 Console Redirection COM 1 Console Redirection This submenu allows the user to configure the following Console Redirection set tings for this port Console Redirection Select Enabled for Console Redirection support The options are Enabled and Disabled COM2 SOL Console Redirection This submenu allows the user to configure the following Console Redirection set tings for the SOL Port specified by the user Console Redirection Select Enabled to use the SOL Port for Console Redirection The options are Enabled and Disabled P Console Redirection Settings This feature allows the user to specify how the host computer will exchange data with the client computer which is the remote computer used by the user Terminal Type This feature allo
122. t and will not be shipped independently in a retail box Note 2 For your system to work properly please follow the links below to download all necessary drivers utilities and the user s manual for your system Supermicro product manuals http www supermicro com support manuals Product drivers and utilities ftp ftp supermicro com If you have any questions please contact our support team at support supermicro com 1 1 SUPER X100QBi F Platform User s Manual X10QBi Baseboard Image Note All graphics shown in this manual were based upon the latest PCB revision available at the time of publishing this manual The components installed in your system may or may not look exactly the same as the graphics shown in this manual 1 2 X10QBi Baseboard Layout Chapter 1 Overview o o o 089 o eo S HE HE bg zz zz ferfi 8 g Fis EEIEIEE vou EC IE B Bc g 2 Coch ECE of ISE IS p IS o a S S SiiS ISi 81 Fle elie jg 2p 2 ES el lel lelle L SATA5 oe BS ESE ES g e 8 Sibi Si TopSite 5 a EZB IS d IS o oo gt io Sy isi teats tse 8 E E FSW Ie je RI iy 2 SEE efel iala E rn Brn
123. tatements The following statements are industry standard warnings provided to warn the user of situations which have the potential for bodily injury Should you have questions or experience difficulty contact Supermicro s Technical Support department for assis tance Only certified technicians should attempt to install or configure components Read this section in its entirety before installing or configuring components in the Supermicro chassis Battery Handling A Warning There is a danger of explosion if the battery is replaced incorrectly Replace the battery only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions DUDEN TEHRAN TELS TTD TUE T 9 Pr RUD fS TET S450 3 3 RTS MMS ot A DHEES 70 3 Tzu 1500 6 Ze EH FEO BS BR COR CHE 2I jUC FEW FB2U SE HUS S BE EK TA FD ESTE ra IDE HET HI TR TH ABI rt HRABE oT Pee ill ea RY UH ER H E e Fil SEHR ES ARE reali EARE EET RIT SC TH S B EA E Je EI RR ERAR Fas a BE SSE S REDE o Warnung Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr Ersetzen Sie die Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp Entsorg
124. tch data in order to shorten execution cycles and maximize data processing efficiency Prefetching data too frequently can saturate the cache directory and delay neces sary cache access This feature reduces or increases the frequency the system prefetches data The options are 8 16 32 40 48 56 64 72 80 88 96 104 112 120 Extended APIC Advanced Programmable Interrupt Controller Based on Intel s Hyper Threading architecture each logical processor thread is assigned 256 APIC IDs APIDs in 8 bit bandwidth When this feature is set to En able the APIC ID will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU performance The options are Disable and Enable AES NI Select Enable to use the Intel Advanced Encryption Standard AES New Instruc tions NI to ensure data security The options are Enable and Disable Down Stream PECI Platform Environment Control Interface Select Enable to allow the client server to interact with the host server directly to achieve better host client communication in the PECI platform which will result in power saving and energy use efficiency The options are Disable and Enable gt Advanced Power Management Configuration Advanced Power Management Configuration Power Technology Select Energy Efficient to support power saving mode Select Custom to cus tomize system power settings Select Max Performance to optimize system 4
125. ter 1 Overview Installing DIMM Modules on the Memory Card and Installing Memory Cards on the Baseboard 1 Install the desired number of DIMMs on a memory card each card supports up to 12 DIMMs Press the DIMM module straight down into the slot until it s properly seated and the PRESENT LED is on To install memory start with the blue slots first in the order of DIMMA1 DIMMB1 DIMMC1 and DIMMD1 Notches Press the DIMM module straight down into the slot until it s properly seated and the PRES ENT LED is on 2 After populating DIMMs on the memory cards follow the table below to Install one or two populated memory cards for each CPU installed on the base board The baseboard has eight slots to accommodate eight memory cards CPUs and the Corresponding Memory Cards CPU Corresponding DIMM Modules No of card s a CPU One 1 Memory Card Per CPU Two 2 Memory Cards Per CPU CPU 1 SMI Slot P1M1 Populate this slot first SMI Slot P1M1 SMI Slot P1M2 CPU 2 SMI Slot P2M1 Populate this slot first SMI Slot P2M1 SMI Slot P2M2 CPU 3 SMI Slot P3M1 Populate this slot first SMI Slot P3M1 SMI Slot P3M2 CPU 4 SMI Slot P4M1 Populate this slot first SMI Slot PAM1 SMI Slot PAM2 PRESENT LED R X0QB mum NEAR CODE Wicca ce duc CODE 1nd2 104 LWid 301S INS SUPER X100QBi F Platform User s Manual X10QBi Baseboard Layout
126. tes 1 Please refer to 9 TD2 15 Ground Section 2 11 for LAN LED 4 wipe iB Ground information 8 TD3 17 Ground 9 TD3 18 Ground 2 USB connections are NC No Connection located on the X10QBi base board A LAN1 AOM X10QBi A I O Module B LAN2 C IPMI LAN AOM X10QBi A LANCTRL Chapter 2 Installation Unit Identifier Switch LEDs On the I O Module UID Switch Pinf Definition A Unit Identifier UID switch on the AOM 1 Gand X10QBi A I O module and two LED indica 2 Ground tors are located on the baseboard The UID 3 EUN Switch is located next to the LAN ports on 4 c round the I O module The rear UID LED LED28 is located next to the UID switch The front UID LED LED28 panel UID LED is located at pins 7 8 of the Status Front Control Panel at JF1 Connect a cable to pins 7 8 on JF1 for front panel UID LED Pe On Windows OS Unit identi ea indication When you press the UID switch Biel Unit identned both rear UID LED and front panel UID LED indicators will be turned on Press the UID Switch again to turn off both LED indicators These UID indicators provide easy identifica tion of a system unit that may be in need of Service Color State OS Status Blue Blinking Note UID can also be triggered via the IPMI on the system moth erboard For more inform
127. the CPU before resuming normal operations This item is used to set the threshold of the AMEI events beyond which the BIOS will report the error events before resuming operations The options are 512 1024 1365 1638 1820 1928 2048 2731 3277 3641 4096 5461 6554 8192 10923 16384 32768 4 30 Chapter 4 AMI BIOS Demand Scrub Demand Scrubbing is a process that allows the CPU to correct correctable memory errors found on a memory module When the CPU or I O issues a demand read command and the read data from memory turns out to be a correctable error the error is corrected and sent to the requestor the original Source Memory is updated as well Select Enable to use Demand Scrubbing for ECC memory correction The options are Enable and Disable Device Tagging Select Enable to support device tagging The options are Disable and Enable Memory Power Management Select Enabled for memory power management support The options are Dis abled and Enabled Memory Rank Mask Select Enabled to support memory rank in the memory controller The options are Disabled and Enabled A7 Mode Select Enabled to support A7 Addressing Mode to improve memory perfor mance The options are Disable and Enable DDDC Support Select Enabled to enable Double Device Data Correction DDDC support for the error correction codes to correct memory errors caused by two failed DRAM devices The options are Disable and Enable DDDC Wirekill W
128. the State of California to cause birth defects and other reproductive harm Manual Revision 1 0 Release Date February 13 2014 Unless you request and receive written permission from Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2014 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface Preface This manual is written for system integrators IT professinals and knowledgeable PC users It provides information for the installation and use of the X10QBi platform About the X10QBi Platform The X10QBi Platform consists of the X10QBi baseboard the AOM X10QBi A I O module and the X10QBi MEM1 memory card The X10QBi baseboard supports up to four Intel E7 series processors that offer Intel QuickPath Interconnect QPI Technology with a transfer rate of up to 8 0 GT s It also supports up to 6TB DDR3 ECC RDIMM LRDIMM memory of 1600 MHz max in 96 memory modules on eight memory cards Combined with Intel Turbo Boost Technology and support of 60 CPU cores or with Hyper Threading 120 cores the X10QBi system offers substantially enhanced system performance for High Performance Cluster system platforms Please refer to our website at http www supermicro c
129. the list The bottom icon with a CD on it allows you to view the entire contents of the CD Note 2 When making a storage driver diskette by booting into a driver CD please set the SATA configuration to Compatible Mode and configure the SATA as an IDE in the BIOS Setup After making the driver diskette be sure to change the SATA settings back to your original settings B 1 SUPER X10QBi Platform User s Manual B 2 Configuring SuperDoctor IlI The SuperDoctor IIl program is a Web based management tool that supports re mote management capability It includes Remote and Local Management tools The local management is called the SD III Client The SuperDoctor III program included on the CD ROM that came with your system motherboard allows you to monitor the environment and operations of your system SuperDoctor III displays crucial system information such as CPU temperature system voltages and fan status Refer to the figure below for a display of the SuperDoctor III interface Note 1 The default user name and password are ADMIN i Note 2 In the Windows OS environment the SuperDoctor III settings take precedence over the BIOS settings When first installed SuperDoctor III adopts the temperature threshold settings previously set in the BIOS Any subsequent changes to these thresholds must be made within SuperDoc tor since the SD III settings override the BIOS settings For the Windows OS to adopt the BIOS temperature
130. this item to set the PCI E Completion Time out value for electric tuning Enter a value between 260ms to 900ms P PCI Express Port 0 DMI Note For PCI Express Port 1A Port 1B Port 2A Port 2B Port 2C Port 2D Port 3A Port 3B Port 3C Port 3D see the next section Use the items below to configure the PCI E settings for a PCI E port specified by the user The following items will display e PCI E Port Link Status e PCI E Port Link Max e PCI E Port Link Speed Link Speed Use this item to select the PCI E link speed for the PCI E port specified by the user The options are GEN1 2 5 GT s GEN2 5 GT s and Auto 4 12 Chapter 4 AMI BIOS Override Max Link Width Use this feature to set the link speed for a selected PCI E port to override the maximum link width which was previously set by PCI Bifurcation The options are Auto x1 x2 x4 x8 and x16 PCI E Port DeEmphasis Use this item to select the De Emphasis control setting for a PCI E port specified by the user The options are 6 0 dB and 3 5 dB PCI E ASPM Support Select Enable to support the Active State Power Management ASPM level for a PCI E port specified by the user Select Disabled to disable ASPM support The options are Disable and L1 Only Fatal Err Error Over Select Enable to force the fatal error propogation to the IIO core error logic for the port specified by the user The options are Disable and Enable Non Fatal Err Error Over Select En
131. this item to set the limit on the C State package register The options are C0 1 state C2 state C6 non Retention state and C6 Retention state CPU C3 Report Select Enable to allow the BIOS to report the CPU C3 State ACPI C2 to the operating system During the CPU C3 State the CPU clock generator is turned off The options are Enable and Disable 4 9 SUPER X10QBi Platform User s Manual CPU C6 Report Available when Power Technology is set to Custom Select Enable to allow the BIOS to report the CPU C6 state ACPI C3 to the operating system During the CPU C6 state power to all cache is turned off The options are Enable and Disable gt CPU T State Control ACPI Advanced Configuration Power Interface T States Select Enable to support CPU throttling by the operating system to reduce power consumption The options are Enable and Disable gt CPU Advanced PM Power Management Tuning gt Energy Perf Performance BIAS Energy Performance Bias Use this feature to select an appropriate fan setting to achieve maximum system performance with maximum cooling or maximum energy efficiency with maxi mum power saving The fan speeds are controlled by the firmware management via IPMI 2 0 The options are Performance Balanced Performance Balanced Power and Energy Power Workload Configuration Use this feature to set the power management setting optimized for the regular workload condition The options are Bal
132. upply power to the memory buffer on the on demand basis in an effort to save power consumption The options are Enabled and Disabled Memory Topology This item displays the status of each DIMM module as detected by the BIOS Node Channel e DIMM Frequency Memory RAS Reliability Availability Serviceability Configuration Use this submenu to configure the following Memory RAS settings Memory RAS Configuration Setup Socket 0 Branch 0 Socket 0 Branch1 Socket 1 Branch 0 Socket 1 Branch1 Socket 2 Branch 0 Socket 2 Branch1 Socket 3 Branch 0 Socket 3 Branch1 Select Enable to enable the memory module installed on the socket specified by the user The default setting is Enable and Disable Migration Spare Use this feature to set the bit mask of the riser card that is designated as a spare riser The default setting is 0 Current Memory Speed This item displays the current memory speed 4 28 Chapter 4 AMI BIOS Mirroring This item indicates if memory mirroring is supported by the motherboard Memory mirroring creates a duplicate copy of the data stored in the memory to enhance data security Sparing This item indicates if memory sparing is supported by the motherboard Memory sparing enhances system performance Memory Rank Sparing This item indicates if memory rank sparing is supported by the motherboard Memory rank sparing enhances system performance Spare Error Memory Correctable Thr Threshold Use th
133. ws the user to select the target terminal emulation type for Con sole Redirection Select VT100 to use the ASCII Character set Select VT100 to add color and function key support Select ANSI to use the Extended ASCII Char acter Set Select VT UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes The options are ANSI VT100 VT100 and VT UTF8 Bits Per second Use this feature to set the transmission speed for a serial port used in Console Redirection Make sure that the same speed is used in the host computer and the client computer A lower transmission speed may be required for long and busy lines The options are 9600 19200 38400 57600 and 115200 bits per second Data Bits Use this feature to set the data transmission size for Console Redirection The options are 7 Bits and 8 Bits Parity A parity bit can be sent along with regular data bits to detect data transmission errors Select Even if the parity bit is set to 0 and the number of 1 s in data bits 4 39 SUPER X10QBi Platform User s Manual is even Select Odd if the parity bit is set to 0 and the number of 1 s in data bits is odd Select None if you do not want to send a parity bit with your data bits in transmission Select Mark to add a mark as a parity bit to be sent along with the data bits Select Space to add a Space as a parity bit to be sent with your data bits The options are None Even Odd Mark and Space Stop Bits A stop bit ind
134. y Write Post Mode Select Enable to support memory hash method comparison mode when the System is running at the early stage of POST Power On Self Test The options are is Enable and Disable 4 25 SUPER X10QBi Platform User s Manual MC Channel Hash Mode Select Enabled to support the hash method comparison mode for the memory controller to improve memory performance The options are Enabled and Dis abled Unused Memory Channel Input Select Enabled to allow input from unused memory channels The options are Enabled and Disabled VMSE RMT Rank Margin Tool Select Enabled to enable RMT support for the Intel Scalable Memory Intercon nect 2 Intel SMI 2 controller to improve memory performance The options are Enabled and Disabled VMSE CPGC Converged Pattern Generation and Checking Pattern Length Use this feature to set the CPGC pattern length for the Intel Scalable Memory Interconnect 2 Intel SMI 2 controller for memory parity checking The default setting is 0 Command 2 Data Tuning Select Enabled to fine tune electrical command paths from the host system to the memory extension buffer MXB The options are Enabled and Disabled Jordon Creek Power Management Select Enabled to activate power management features embedded in the Jordon Creek chip for the Intel Scalable Memory Interconnect 2 Intel SMI 2 controller The options are Enabled and Disabled MRC Debug Level Use this feature to set the debugging

Download Pdf Manuals

Related Search

Related Contents

BIPAC-7100S / 7100  user manual  Samsung AR-EH00 User Manual  Notice Applimo convecteur Anti  Samsung SM320MXN-2  to CPD User Manual - myCPD  

Copyright © All rights reserved. Failed to retrieve file