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High Performance Model QCPU(Q Mode)User`s Manual(Function

1. F File name DEF File name ABC Standby program XO Execution of the CALLP100 PIO oo Xo sub routine program i 1 INCP DO Sub routine program ees RET END ee Read write of the Local devices used by local devices Local devices used by the file name ABC the file name DEF Operation at SM776 ON f File name DEF File name ABC Standby program no Execution of th P1004 H CALL P100 TOSGA O n9 eae Lee ee Xo sub routine program T i INCP DO Sub routine Read write of the i program 2 local devices ite Ae te See ee 4 i RET ioe END hs oa eee Local devices used by ete Local devices used by the file name ABC the file name DEF 2 Cautions e If SM776 is ON the local device data is read when the sub routine program is called and the local device data is saved after the execution of the RET instruction Accordingly scan time is elongated by the time as when a sub routine program is executed once with the setting of SM776 ON See Section 10 13 1 e ON OFF setting of SM776 is enabled in CPU modules Setting in file units is not enabled e If the ON OFF setting of SM776 is changed while a sequence program is executed the control is made according to the information after change For details on SM776 see Appendix 1 10 67 10 67 10 EXPLANTION OF DEVICE MELSEC Q f
2. elelololololololololololololololololololo elslololololololololololololololololololo elelololololololololololelolelolololololo elolololololololololololololololololololo p Setting method Device memory registration diversion Device memory for registration diversion No of points Start w Register to device memory Device memory diversir G Start End Cancel c Atthe PLC file tab screen in the PLC Parameter dialog box designate the name of the file where the device initial value data is to be stored PLC file screen Jevice Program file SFC 1 0 a File register Initial Device value Not used Notused Use the same file name as the program Use the same file name as the program Conesponding gt Corresponding memory a memory Use the following fie Use the folowing file Corresponding Conespondng memory mw File name File name Capacity Kpoints 1K 1018K points Comment file used in a command File for local device Notused Notused Use the same file name as the program C Use the following file Conesponding _Comtesponding memory a memory Use the following fil le Cortesponding File name memory File name Acknowledge XY assignment Multiple CPU setings Defaut Check End Cancel
3. below Read from PLC x Connecting interface COM1 lt gt CPU unit PLC Connection Station no Host PLC type 25H Target memory Program memon Y _Title_ File selection Device data Program Common Local Param Prog Cancel all selections Close 8 Program a 99 10 13 12 19 24 21405 MAINT 99 10 13 1219 26 2140F Related lewis MAIN2 99 10 13 12 19 28 2140t MAINS 99 10 13 12 19 32 2140F MAING 99 10 13 12 19 34 2140t MAINS 99 10 13 12 19 36 2140 MAING 99 10 13 12 19 40 2140 M uaino er a ae a Remote operation Clear PLC memory e Format PLC memory c Arrange PLC memory Retresh view near Create title Fiee Total free space oe y a File name b 1 The file name consists of the file name max 8 characters and the extension 3 characters A file name of any file written from the GX Developer into the High Performance model QCPU will be displaced in uppercase characters onscreen When naming a file by using a sequence program type a file name in uppercase characters An extension which corresponds to the file type designated when the file was written in the High Performance model QCPU by GX Developer is automatically appended to the file name 2 The following Windows reserved words cannot be used for a file name e COM1 to COM9 e LPT1 to LPT9 e AUX e CON e PRN e NUL e CLOCK Date amp time The date amp time when the file was written from GX Developer to the High Per
4. User s free area User s free area 2 Writing performed with the CPU No 2 END process Device memory 1 Writing performed with the CPU No 1 END process Device memory BO to B1F For use of the CPU No 1 4 Reading performed with the CPU No 1 END process BO to B1F For use of the CPU No 1 B20 to B3F For use of the CPU No 1 B20 to B3F For use of the CPU No 1 The processes performed during the CPU No 1 END process 1 The BO to B1F transmission device data for the CPU No 1 is transferred across to the host CPU shared memory automatic refresh area 4 The data in the CPU No 2 CPU shared memory automatic refresh area is transferred across to B20 to B3F in the host CPU The processes performed during the CPU No 2 END process 2 The B20 to B3F transmission device data for the CPU No 2 is transferred across to the host CPU shared memory automatic refresh area 3 The data in the CPU No 1 CPU shared memory automatic refresh area is transferred across to BO to B1F in the host CPU Executing automatic refresh Automatic refresh is executed when the CPU module is in RUN status STOP status or PAUSE status Automatic refresh cannot be performed when a stop error has been triggered in the CPU module If a stop error occurs on one module the other modules for which an error has not occurred will save the data prior to the stop error
5. Power supply module ne fo E 5 Q 5 O 32 points Q 5 O Q 5 G FO 110 130 150 170 Y180 Y1A0 Y1C0 10F 12F 14F 16F 17F Y19F Y1BF Y1DF 5 ASSIGNMENT OF I O NUMBERS MELSEC Q b I O assignment with GX Developer Designate the head I O number of slot No 3 to 200 and that of slot No 4 to 70 at the I O assignment tab screen of GX Developer Qn H Parameter x PLC name Puc system PLC file PLC RAS Device Program Boot file SFC 120 assignment r 120 Assignment Switch setting Detailed setting 200 is designated as the head I O number 70 is designated as the head O number When the head I O number Assigning the 1 0 address is not necessary as the CPU does it automatically is not designated the I O __ Leaving this setting blank will not cause an error to occur number following the 3rd slot Base setting will be assigned Base mode Auto Main oT i C Detail o F Pa Es Based 8 Slot Defaut 12 Slot Default EA oe 128i Defaut is Settings i be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel c I O number assignment after the I O assignment with GX Developer Q38B 0 1 2 3 4 5 6 7
6. Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address The applicable device of head device is B M Y D W RZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check em Cancel 2 Ensure that the No of CPU set for the multiple CPU system is the same as the number of CPUs actually mounted When an empty slot is secured for the purpose of mounting additional CPU modules in the future set PLC Empty at the I O assignment tab screen in the PLC Parameter dialog box For example when setting 4 as No of CPU in the Multiple CPU settings screen and securing one of them for future use set slot 3 to CPU Empty indicated with the B arrow Qn H Parameter PLC name PLC system PLC file PLC RAS Device Program Boot fle SFC 1 0 assignment r 1 0 Assignment p Switch setting Detailed setting Assigning the 1 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur r Base setting Base model name Power model name Extension cable Slots mi Auto xt Base r Base mode C Detail 8 Slot Default 12 Slot Default Settings should be set as same when Import M
7. High speed buffer transfer setting Default Check Cancel Note the following when executing a high speed interrupt program 1 The high speed interrupt program is only executed as interrupt enable Refer to Section 7 22 4 3 for the items that delay high speed interrupt s start from interrupt disable 2 Ifthe interrupt disable period continues longer than the set interrupt cycle interval high speed interrupt may be ignored High speed interrupt is ignored once when it occurs twice during interrupt disable 7 FUNCTION MELSEC Q 7 22 2 High speed I O refresh high speed buffer transfer High speed I O refresh is a function that updates I O signals between the I O and intelligent function modules and CPU module at interrupt cycle intervals High speed buffer transfer is a function that updates data between the intelligent function module buffer memories and CPU module devices at interrupt cycle intervals 1 To execute this function set High speed interrupt 149 fixed scan interval that was set in Section 7 22 1 and High speed I O regresh setting and High speed buffer transfer setting e High speed I O refresh setting High speed interrupt berserk peee ms D 2ms 1 0ms 149 fixed scan interval High speed 1 0 refresh setting r ssignment method C Points Start a Set the X Y refresh ranges Start End Type Points DEC StartfHEX _End HEX X input X input X inpu
8. Necessary setting Mo setting Aleadyset Clear Setting completion Cancel b Setup fields Password active Model name Model selection QJ71E71 QJ71C24 SetupiNotsetup O o i O FTP communication port TCP IP GX Developer communication Adds a check to the valid port TCP IP remote password port GX Developer communication port UDP IP HTTP port Refer to the following manuals for further details on the remote password function e Using Serial Communication Modules Q Corresponding Serial Communication Module Users Manual Application e Using Ethernet Modules Q Corresponding Ethernet Interface Module Users Manual Basic 7 FUNCTION MELSEC Q 7 20 Monitoring High Performance model QCPU System Status from GX Developer System Monitor 1 In Case of GX Developer Version 4 SW4D5C GPPW E or GX Developer Version 5 GSW5D5C GPPW E The System Monitor window provides the following information about the High Performance model QCPU connected to the personal computer e Base information e Installed status e Parameter status Overall information e Product information System Monitor a gt Base Information Overall Information d Base Name Main Base Number of Slot 8 Number of Base 1 Base Type Q Number of Installed Module 1 Number of Module b Installed status Pro
9. Stores the present path status of the data link Data link in forward loop Forward loop Data link in reverse loop Reverse loop station Forward loop Reverse loop App 51 APPENDICES MELSEC Q Special Register List Continue ACPU Special Conversion Special Register after Conversion Special Register for Modification Corresponding Details CPU Meaning Loopback in forward reverse loops 0 Forward loop during data link 1 Reverse loop during data link 2 Loopback implemented in forward reverse A directions D9204 D1204 Link status 3 Loopback implemented only in forward direction 4 Loopback implemented only inreverse direction SD1205 SD1210 SD1211 D9213 D1213 D9214 SD1214 D9215 D1215 D9205 D9206 SD1206 D9210 D9211 App 52 Station implementing loopback Station implementing loopback Number of retries Number of times loop selected Local station operation s Local statio operation s Local statio operation s Local statio operation s atus atus 5 Data link disabled Station that implemented forward loopback Station that implemented reverse loopback Stored as cumulative value Stored as cumulative value Stores conditions for up to numbers 1 to 16 Stores conditions for up to numbers 17 to 32 Stores conditions for up to numbers 33 to 48 Stores conditions for up to numbers
10. In the GX Developer online J When the device initial value is mode select the memory card designated write the device initial RAM and write the parameter value in the designated memory during data and created program the PLC file setting in the PLC parameter Use the CPU module s RESET L CLR switch toexecute a reset CPU module s BOOT If a boot file setting is not made or when LED switches ON writing parameters or programs onto the program memory the BOOT LED does not light up Pa End 12 8 12 8 13 OUTLINE OF MULTIPLE CPU SYSTEM MELSEC Q 13 OUTLINE OF MULTIPLE CPU SYSTEM 13 1 Features 1 Multi control a Since each system is not configured on one High Performance model QCPU but on the High Performance QCPU Motion CPU and PC CPU module according to the system the development efficiency and ease of maintenance of the system can be enhanced b Each CPU module in the multiple CPU system controls the I O module and intelligent function module of the base unit slot by slot 13 GX Developer groups the I O modules and intelligent function modules controlled by each CPU module in the multiple CPU system 2 Enables system configuration through load dispersion a By dispersing the high load processing performed on a single High Performance model QCPU between several High Performance model QCPUs it is possible to reduce the o
11. e Stores the software version of the internal system in ASCII code The data in the lower byte position is indefinite The software version is stored in the higher byte position For version A for example 41H is stored Note The software version of the initial system may differ from the version indicated by the version information printed on the rear of the case In the self loopback test of the serial communication module the serial communication module writes reads data automatically to make communication checks Higher byte Lower byte Stores the number of empty blocks in the communication request registration area to the remote terminal module connected to the MELSECNET MINI S3 master unit A2CCPU or A52GCPU APPENDICES ACPU Special Conversion MELSEC Q Special Register List Continued Special Register after Conversion SD1085 PS ee Number of Number of special D1090 special functions functions modules el modules over _ over SD1091 ea module to be D1094 SD251 replaced DIP switch SD1095 SD200 RSA information SD1100 SD1101 Special Register for Modification Meaning Register for setting time check value Default value 10s Head I O number of VO O module to be replaced DIP switch information Bit pattern in units of 16 points indicating the modules whose fuses have blown Fuse blown module Step transfer Timer setti
12. Main routine program FEND H Sub routine program RET H Interrupt program IRET JH enD H PO For details on the sequence instructions basic instructions and application instructions refer to the QCPU Q Mode QnACPU Programming Manual Common Instructions 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 2 Sequence program writing format Programming for sequence programs is enabled using either ladder mode or list mode a Ladder mode The ladder mode is based on the relay control sequence ladder Programming expressions are similar to the relay control sequence ladder e Relay symbolic language programming occurs in ladder block units A ladder block is the smallest unit of sequence program operation with the ladder beginning from the left bus and ending at the right bus Left bus a contact b contact Coil output Right bus Ladder blocks x XO to X5 _ Indicate inputs Y20 to Y24 Indicate outputs Fig 4 1 Ladder Block b List mode The list mode uses dedicated instructions instead of the contact symbols coil symbols etc used in the ladder mode Contact a contact b and coil instructions are as follows acontact LD AND OR e b contact LDI ANI ORI COM icin OUT 3 Program operation In sequence program the instructions are executed in order beginning from step 0 and endi
13. Program A 7 E 7 E A Common pointer Subroutine program P1000 call SUA SM400 MO 0 gt P1000 MOV K4x0 RO Always z z ON Mo MOV K4x20 RO Program B _ RET M10 P1000 call 0 CALLP P1000 b The use of sub routine call instructions with arguments simplifies the creation of sub routine programs which are called several times Argument designation Sub routine program Destination data MO m PO call sM400 mo S0urce data o H Hoar Po wo k4xo Ro Pot HH mov FDO FD2 ne Argument from FD2 eta Argument to FD1 MO gt Argument to FDO Mov FD1 FD2 Subroutine program designation Argument designation RET M10 _ PO call 100 CALLP PO W10 K4xX10 R10 H Ls Argument from FD2 Argument to FD1 gt Argument to FDO For details on the argument I O condition see Section 10 3 1 1 11 1 11 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM This section describes the system configuration of the High Performance model QCPU cautions on use of the system and configured equipment 2 1 System Configuration The outline of the equipment configuration configuration with peripheral devices and system configuration in the High Performance model QCPU system is described 2 below 1 Equipment configuration a When main base unit Q3__B is used Memory card 1 Hi
14. Allocation of QCPU input X and output Y possible Ca ee MELSECNET H Remote station CC Link Remote station When using High Performance model QCPU device input X and output Y in remote stations I O numbers that succeed the numbers used by the main base unit and extension base units O modules and intelligent function modules will be allocated For example if X YO to X Y3FF are being used by the main base unit and extension base units O modules and intelligent function modules then numbers above X Y400 can be used by the remote station However the I O numbers for remote stations should be set in consideration of additions to the main base unit and extension base units I O modules and intelligent function modules For example if 1024 points from X YO to X Y3FF are being used by the main base unit and extension base units and 256 points from X Y400 to X Y4FF are to be held back for use with future additions then the situation shown in the diagram below is to be observed 0 X Y I O numbers being used by the main base unit and extension base units Held back for future additions X Y500 For MELSECNET H remote I O station For CC Link remote station I O numbers that can be used by remote stations X Y1FFF If network parameter setting is not made in the CC Link system 2048 points in the range from X Y1000 to X Y17FF are assigned to the master loc
15. System area System area Reading performed with the CPU No 2 END process Automatic refresh area for writing in the CPU No 1 Automatic refresh area for writing in the CPU No 2 User s free area User s free area Writing performed with the CPU No 2 END process Device memor For use of the CPU No 1 For use of the CPU No 2 Writing performed with the CPU No 1 END process Device memor For use of the CPU No 1 For use of the CPU No 2 Reading performed with the CPU No 1 END process Exchanging data with multiple CPU instructions and instructions that use Intelligent function module device UO GO The CPUs on the multiple CPU system write data into the host CPU s CPU shared memory with the use of the S TO instruction FROM instruction The data written to the CPU shared memory of the host CPU with the S TO instruction is read by High Performance model QCPU of other CPUs with the use of the FROM instruction and UL GU Non linked device data also read directly when the command is executed CPU No 1 CPU No 2 CPU shared memory CPU shared memory Host CPU s operation Host CPU s operation information area information area Automatic refresh area for writing in the CPU No 1 Data written with the S TO instruction Read with FROM instruction or U Written with the S TO instruction Sequence program Sequence program S TO instruction FROM
16. d If the index registers are used for 32 bit instructions the data is stored in registers Zn and Zn 1 The lower 16 bits of data are stored in the index register No Zn designated in the sequence program and the upper 16 bits of data are stored in the designated index register No 1 For example if register Z2 is designated in the DMOV instruction the lower 16 bits are stored in Z2 and the upper 16 bits are stored at Z3 DMOV DO zH Processing object Z2 Z3 Z3 Z2 Upper 16 bits _Lower 16 bits me gt t gt For index modification using the index register refer to the following manual QCPU Q mode QnACPU Programming Manual Common instructions 10 40 10 40 10 EXPLANTION OF DEVICES MELSEC Q 10 6 1 Switching between scan execution type programs and low speed execution type programs When switching from a scan execution type programs or low speed execution type program to another program type the index register ZO to Z15 data is saved protected and reset 1 Index register processing at switching between scan execution type programs and low speed execution type programs a When switching from a scan execution type program to a low speed execution type program occurs the scan execution type program s index register data is saved and the low speed execution type program s index register data is restored b When switching from a low speed execution program to a scan
17. c File registers which consist of 16 bits per point read and write data in 16bit units b15 bO d Ifthe file registers are used for 32 bit instructions the data will be stored in registers Rn and Rn 1 The lower 16 bits of data are stored in the file register No Rn designated in the sequence program and the upper 16 bits of data are stored in the designated file register No 1 For example if file register R2 is designated in the DMOV instruction the lower 16 bits are stored in R2 and the upper 16 bits are stored in R3 DMOV DO a Two file registers can be used to store numeric data from 2147483648 to 2147483647 or from OH to FFFFFFFFH e The content of the file register is retained if power off or reset operation is performed It is not initialized if latch clear is conducted To initialize the file register contents perform data clear operation in a sequence program or using GX Developer Example To clear RO to R999 H c rmo ko Ro or e When using GX Developer select file register all clear in the PLC memory clear of the Online dialog box to clear the data Processing object R2 R3 R2 Upper 16 bits Lower 16 bits lt gt 10 44 10 44 10 EXPLANTION OF DEVICES MELSEC Q 10 7 1 File register capacity 1 Using the Standard RAM The standard RAM can store the following points of file registers QO02CPU 32k points QOD2HCPU QO6HCPU 64k points Q12HCPU Q25HCPU 128k po
18. instruction LRDP instruction for ACPU reception for local station ZNWR instruction LWTP instruction OFF Not completed indicates that the ZNRD instruction is complete at the ON End local station SM1204 SM1205 OFF Not completed indi ZNWR instruction is complete at the recep tion for local station M9206 SM1206 Host station link OFF Normal Depends on whether or not the link parameter setting of parameter error JON Abnormal the host is valid Depends on whether or not the link parameter setting of Link parameter OFF YES the master station in tier two matches that of the master check results ON NO station in tier three in a three tier system Valid for only the master station in a three tier system Sets master Depends on whether or not the B and W data controlled station B and W by higher link master station host station is sent to tran miesioh OFF Transmits to tier2 and lower link local stations tertiary stations M9208 SM1208 tier 3 e When SM1208 is OFF B and W of host station is range for lower ON Transmits to tier2 only sent to tertiary stations link master When SM1208 is ON B and W of host station is stations only not sent to tertiary stations Set to ON not to match B and W of the higher and lower Link parameter links check comimang ee Executing th check When SM1209 is ON the link parameters of the higher M9209 SM1209 for lower link funct
19. m Timer limit setting Low foo ms 1ms 1000ms Common pointer No P 400 speed High foo peed ms 0 1ms 100ms m RUN PAUSE contacts r System interrupt settings BUI es tea Interrupt counter start No C 0 768 PAUSE X 0 1 FFF Fixed scan interval After 0 495 Points occupied by empty slot 75 v Points Remote reset 128 ooo ms 0 5ms 1000ms All Bits 129 40 0 ms 0 5ms 1000ms Output mode at STOP to RUN Previous state 130 200 ms 0 5ms 1000ms High speed Recalculate output is 1 scan later 131 foo ms 0 5ms 1000ms CIEE SELEY rm Floating point arithmetic processing Vv Perform internal arithmetic operations N i in double precision J High speed execution rm Interrupt program Fixed scan program setting m Intelligent function module setting r Module synchronization Interrupt pointer setting IV Synchronize intelligent module s pulse up Settings should be set as same when APLC 7 3 3 using multiple CPU M Use special relay special register from SM SD1000 Multiple CPU settings Acknowledge XY assignment Default Check End Cancel 1 In the jump instruction jumping to common pointers in other programs is not allowed Common pointers should be used only with sub routine call instructions 10 56 10 EXPLANTION OF DEVICES MELSEC Q 10 10 Interrupt Pointers I 1 Definition a Inte
20. 2 2 2 2 2 2 2 2 5 gt 3 3 gt 3 3 gt Oo me ne ne ne ne ne ne ge e oO O l fo Q fe fo fo e E 3 E E E E E E gt S8 s 58 58 58 1 8 587 58 5 23 E 2 2 2 2 8 8 82 2 a T O O O O S 32 32 32 32 32 32 32 32 a points points points points points points points points X00 X20 X40 X200 c i ae a X1F X3F X5F X21F Y8F YAF YCF YEF Q68B 3 4 5 2 2 2 2 2 2 2 esledlesles os lals So 1 5o 5o0 50 fe fe fe BE SE SE SE elses gsigsjgsiss a 3 ae oo S S S 3 5 5 5 5 Sl S 5 o ayo oo 32 32 32 32 32 32 32 2a points points points points points points points points FO 110 130 150 170 Y180 Y1A0 Y1C0 10F 12F 14F 16F 17F Y19F Y1BF Y1DF 5 8 Checking the I O Numbers System monitor of GX Developer allows the check of the mounted modules of High Performance model QCPU and their I O numbers For system monitor refer to Section 7 20 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU 1 Files handled by High Performance model QCPU a The High Performance model QCPU parameters programs comment data etc are assigned file names and extension and are then stored in the following memories e Program memory e Standard ROM e Memory card When reading and writing this data fr
21. 5 Comparison of Clock Data To compare High Performance model QCPU s clock data with a sequence program use the DATERD instruction to read the clock data The year data is read out in 4 digits It can be compared as it is by using a compare instruction 7 FUNCTION MELSEC Q 7 6 Remote Operation The High Performance model QCPU provides the RUN STOP switches for switching between the STOP status and the RUN status The RESET L CLR switch also provides the Reset and Latch Clear functions The High Performance model QCPU can allow control of the High Performance model QCPU operation status by external operations GX Developer function intelligent function module and remote contact The following four options are available for remote operations e Remote RUN STOP e Remote PAUSE e Remote RESET e Remote LATCH CLEAR The serial communication module is used as the example to describe the intelligent function module 7 6 1 Remote RUN STOP 1 What is Remote RUN STOP a The remote RUN STOP performs RUN STOP of the High Performance model QCPU externally with the CPU module RUN STOP switch at RUN b Using remote RUN STOP for the following remote operations are useful 1 When the High Performance model QCPU is at a position out of reach 2 When performing RUN STOP of the control board High Performance model QCPU externally c Calculations during Remote RUN STOP The program calculation that performs remote RUN STOP is as f
22. 7 FUNCTION eS MELSEC Q Program example When reading the module service interval time of the intelligent function module of X Y160 Read start signal H160 SD550 Sets I O number 160 hexadecimal to SD550 SM551 Starts module service interval time read D551 D551 Stores module service interval time into D551 D552 To read the service interval time when access is made from GX Developer of the other station on the network set the I O number of the network module 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE 1 Description of intelligent function modules special function modules High Performance model QCPU allows the use of the Q Series compatible intelligent function modules and the AnS series compatible special function modules The intelligent function module special function module is a module that allows High Performance model QCPU to process analog values or high speed pulses which cannot be processed with I O modules For example an analog value is converted into a digital value with the analog digital conversion module one of the intelligent function modules before being used 2 Communication with intelligent function modules special function modules The intelligent function module special function module is equipped with memory buffer memory to store the data received from or outp
23. Standard ROM Memory card l Ship in Y Manufacturing Assembly Ship out y Y gt Program A Program B Program C Program D Programs A to D gt are executed in sequence x 2 c Example of programs split by function Split by function x1 Programs split by process can be further split by function lt High Performance model QCPU Program memory Initial processing Error processing Standard ROM Memory card gt Program A Main processing gt Program B Communication processing gt Program C r Program D N The execution sequence and execution gt conditions can be set to conform to programs Ato D x2 2 See Section 4 2 for details on the execution sequence and execution conditions 1 OVERVIEW MELSEC Q 1 3 Convenient Programming Devices and Instructions The QCPU features devices and instructions which facilitate program creation Some of them are described below 1 Flexible device designation a Word device bits can be designated to serve as contacts or coils In the case of High Performance model QCPU In the case of AnS a Bit designation of Xo DO5 worddevice N XO _ H oA ca H MOV Do K4M0 Switches b10 M5 of DO ON and H mo OFF 1 0 The 1 0 status of b5 of DO is used as ON OFF data MOV K4M0 DO Y
24. 1 When the END FEND instruction is executed within the set value of the watch dog timer in the sequence program and the High Performance model QCPU is operating correctly the watch dog timer does not time out 2 When the scan time of a sequence program is extended due to the High Performance model QCPU hardware error or execution of interrupt program fixed scan execution type program and END FEND instruction cannot be executed within the set watch dog timer value the watch dog timer times out 3 Precautions a b An error of 0 to 10 ms occurs in the measurement time of the watch dog timer Set the watch dog timer for a desired value by taking such an error into account The watch dog timer is reset with the WDT instruction in the sequence program If the watch dog timer expires while the FOR and NEXT instructions are repetitiously executed reset the watch dog time with the WDT instruction FOR K1000 Program for repetition processing Repetition MO 7 1000 times H C WDT WDT reset NEXT 7 FUNCTION MELSEC Q c The scan time value is not reset even if the watch dog timer is reset in the sequence program The scan time value is measured to the END instruction Internal processing time Sequence program Internal processing time _ __ Low speed execution type Low speed execution type program C program C Scan execution Scan execution Scan execution type 0 pro
25. 31st 10 a m 3110H b8 b7 to b12b11 to T T 1 L The minutes and seconds after the hour are stored as BCD code at SD212 as shown below to b12b11 to b8 b7 bo Example T T T T i i 35 min 48 sec 1 i 3548H Minute Stores the year two digits and the day of the week in SD213 in the BCD code format as shown below b15 to b12b11 to b8 b7 to b4 b3 ESN TT TT Example 1993 Friday 1905H QCPU Remote Day of week Sunday Higher digits of year 0 to 99 Monday Tuesday Wednesday Thursday Friday Saturday The day of the week is stored as BCD code at SD213 as shown below BIS Example Friday 0005H Day of week Sunday Always set 0 Monday Tuesday Wednesday Thursday Friday Saturday App 31 APPENDICES MELSEC Q Special Register List Continued Set by i Expl vnen Sa SD220 e LED display ASCII data 16 characters stored here b15 to b8 b7 to bo D221 D220 15th character from the right 16th character from the right D222 D221 13th character from the right 14th character from the right SD223 LED display Display indicator SD222 11th character from the right 12th character from the right S When iew S SD224 data data SD223 9th character from the right
26. 7 19 1 7 20 1 Chapter 9 Section 10 2 10 10 Section 11 3 Appendix 1 2 Addition Section 2 3 Section 4 1 3 4 2 5 Section 5 4 5 5 2 5 6 2 Section 6 6 6 6 2 6 7 Section 7 6 3 7 7 2 7 7 3 7 9 1 7 9 3 7 16 7 17 7 17 2 7 20 1 Section 10 10 Overall correction Apr pr 2002 SH NA 080038 D Addition of the high speed interrupt function Section 7 20 added to the serial No whose upper 5 digits are 04012 040125 2k 2k 2K 2K 3K gt gt x x ok and the description of the Q2MEM 2MBS SRAM card Overall correction Mar 2003 SH NA 080038 E Additon model Q32SB Q33SB Q35SB Q61SP Correction SAFETY PRECAUTIONS About Manuals Chapters 1 Section 1 2 1 3 Section 2 1 2 2 2 3 Chapters 3 Section 4 2 2 4 3 1 4 4 4 8 4 Section 5 6 1 5 8 Chapters 6 Section 6 1 6 2 6 3 6 5 6 7 6 8 6 9 1 6 9 2 6 9 3 Section 7 1 7 12 7 12 1 7 13 7 14 7 15 2 7 17 7 17 2 7 19 2 7 21 1 7 21 2 7 22 2 Chapters 9 Section 10 1 10 13 2 Section 11 2 Section 14 1 14 2 4 Section 15 2 Section 16 2 Section 17 2 Appendix 1 2 4 2 4 3 Jun 2001 SH NA 080038 C The explanation of the multiple PLC system added to the function version B of the QCPU was added to Chapters 13 to 19 General name for QCPU was changed to the High Performance model QCPU The Q52B and Q55B extension base units and PC CPU module were added Addition Section 6 9 4 Section 7 8
27. App 30 App 30 APPENDICES Number Name D208 LED display Meaning Priorities 9 to 10 lock SD210 Clock data Cloc data year month lock SD211 Clock data pee cele day hour Clock data D212 Clock data minute second lock D213 Clock data Clock datg day of week App 31 Priorities 1 to 4 Priorities 5 to 8 MELSEC Q Special Register List Continued Corresponding 7 ACPU Corresponding bo TT D9038 D3039 format change Set by Explanation P When set When error is generated the LED display flicker is made according to the error number setting priorities e The setting areas for priorities are as follows b15 tob12b11 to b8 b7 to b4 b3 to bO SD207 Priority 4 Priority3 Priority2 Priority 1 SD208 Priority8 1 Priority 7 1 Priority6 1 Priority 5 SD209 Priority 10 Priority 9 Default Value SD207 4321H SD208 8765H SD207 00A9H No display is made if 0 is set However even if 0 has been set information concerning CPU module operation stop including parameter settings errors will be indicated by the LEDs without conditions See Section 7 9 5 REMARK for the priority order The year last two digits and month are stored as BCD code at SD210 as shown below to vo Example July 1993 9307H D9025 Z D9026 Request D9027 S U D902 7 S U D902 i The day and hour are stored as BCD code at SD211 as shown vo Example
28. F 16 points as follows The module mounted in the base unit assigns the following e For the input module X is assigned at the beginning of the I O number e For the output module Y is assigned at the beginning of the I O number i the case of input as oe the case of output module X 0 o 0 x Lo 1 ol X 0 2 0 Y 0 3 Olly 0 4 0 Power CPU supply module saad 5 CO S 4 xX 0 Jo F IX 0 J1 Fix Of 2 FY LO 3L FAY of 4 F 16 input 16 input 16 input 16 output 16 output points points points points points 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 5 Concept of I O Number Assignment 5 5 1 I O numbers of main base unit and extension base unit High Performance model QCPU assigns I O numbers at power on or reset according to the following items As a result High Performance model QCPU can be controlled without performing I O assignment using GX Developer To assign I O numbers follow the items below 1 Number of slots of base units The numbers of slots of the main and extension base units are set according to the Base mode setting For Base mode see Section 5 3 a In Auto mode the number of slots is determined as the available number of modules mounted to each base unit For example 5 slots are assigned to a 5 slot base unit and 12 slots are assigned to a 12 slot base unit b In Detail mode the number of
29. For the instruction dedicated for intelligent function modules and the completion device refer to the manual of the intelligent function module being used 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 2 Request from Intelligent Function Module to High Performance model QCPU 8 2 1 Interrupt from the intelligent function module 1 Interrupt from the intelligent function module High Performance model QCPU executes an interrupt program 150 to 1255 by the interrupt request from the intelligent function module For example the serial communication module processes the data reception by an interrupt program when the following data communication functions are executed e Data reception during the communication with no handshaking protocol e Data reception during the communication with bi directional protocol Processing data reception with an interrupt program improves the data reception speed of High Performance model QCPU The objective serial communication module data transmission Serial communication module PLC CPU 2 Main program LH l Occurrence of oe ela Main program Y 1 Interrupt program execution 00 Setting an interrupt from the intelligent function module To execute an interrupt program by the interrupt of the intelligent function module it is necessary to designate the Intelligent function module setting Interrupt pointer se
30. SM1653 STOP contact STOP status e Turns on when in the STOP status s Each END SM1654 PAUSE contact PAUSE status Turns on when in the PAUSE status S Each END SM1655 STEP RUN contact STEP RUN status e Turns on when in the STEP RUN status S Each END 1 Stores other system CPU diagnostic information and system information 2 This shows the special relay SM _ L for the host system CPU 12 For redundant system tracking for Q4AR only Either the backup mode or the second mode is valid for SM1700 to SM1799 All is turned off for standalone system A Set by ACPU Applicable OFF Execution not possible ON Execution possible S status e Turns on when tracking is executed normally change SM1712 SM1713 SM1714 SM1715 SM1717 Block 6 SM1718 SM1719 SM1720 OFF Transmission SM1721 Block 10 Q4AR One scan turns on when the unicompleteg SM1 722 Block11 corresponding data transmission S status New ON Transmission SM1723 Block 12 pong change end has been completed SM1725 SM1726 SM1727 SM1727 SM1728 SM1729 SM1730 SM1731 ock 21 SM1733 App 20 App 20 APPENDICES MELSEC Q Special Relay List Continued Set by ACPU Applicable SM1734 Block 23 SM1736 SM1737 SM1738 SM1739 SM1740 SM1741 SM1742 SM1744 SM1745 SM1746 SM1747 SM1748 SM1749 SM1750 SM1751 ock 40 M1752 SM1752 Block 41 Mirs act OEP I
31. To execute interrupt programs l0 through 131 and 148 through 1255 use an El instruction to enter the interrupt programs into an interrupt enabled status x2 See Section 10 10 for details on the priority ranking of interrupt programs 3 For assurance of station unit blocks in cyclic data see the MELECNET H Network System Reference Manual c When the interrupt program is executed in the default setting of the High Performance model QCPU the save and restoration of the index register value and the save and restoration of the file register block No are performed at the time of switching between the main routine program and interrupt program Refer to Section 10 6 2 for details 4 High speed execution of an interrupt program and overhead time By default High Performance model QCPU performs the following process when executing an interrupt program e To hide and restore an index register See section 10 6 2 e To hide and restore the file name of a file register in use The above listed processes are not performed if Execute at a High Speed is selected at the PLC System tab screen in the PLC Parameter dialog box This will make it possible to shorten the duration of overhead time required for execution of an interrupt program OVERHEAD TIME us PU TYPE High speed execution is not selected _ High speed execution is selected Q02CPU Oooo ao S o Q02HCPU Q06HCPU 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION C
32. Y Confirmation and recovery of errors AA All CPUs debugged v Start of actual operations 19 2 MELSEC Q cvccccccccceccseceee SEleCt RUN at the RUN STOP switch of the QCPU for CPU No 1 to No 4 scecececeeseseeeeeee Set the RESET L CLR switch of the QCPU for the CPU No 1 in the OFF position to cancel resetting Check to see if a RUN status error has occurred with all PLCs on the mulitple CPU system when the reset status for the CPU No 1 is canceled scccccsccccsccseseeelf Errors occurs confirm the details and recover the situation with the GX Developer s system monitor ccccccccccccececeoee GPU No 1 to CPU No 4 on the multiple CPU system debugged individually 19 19 2 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 19 2 Setting Up the Multiple CPU System Parameters Multiple CPU Settings Control CPU Settings This section explains the procedures for setting up the multiple CPU system parameters with GX Developer Refer to the GX Developer s operation manual for details on setting up all other parameters 19 2 1 System configuration The following shows an example procedures for setting up the multiple CPU system parameters GX Developer Siu vjye2 e2 2 leo 2 eo O e 5D SH 3 8 2 2 2 2 8 8 3 8 3 E o o ojo gt s s s5 5 5 Ele E E a zo ne mo ne 5 5S c fl Ss 5 alo oe Oo o 1 a ay S asa S ELElLELEL E ls iss
33. e Valid devices cannot be used in a sub routine program that contains arguments If devices assigned for function registers are used values of the function registers will not correctly be returned to a calling program i CALLP Pono H Po H D RO R10 FDO MOV KO D3 Since the points DO to D3 are used for FDO D3 can not be used for the sub routine program e High Performance model QCPU s word data devices can be used For a procedure for using function devices refer to the QCPU Q mode QnACPU Programming Manual Common Instructions 10 33 10 33 10 EXPLANTION OF DEVICES MELSEC Q 10 3 2 Special relays SM 1 Definition A special relay is used to store High Performance model QCPU status data 2 Special relay classifications Special relays are classified according to their applications as shown below a For fault diagnosis SMO to SM199 b System information SM200 to SM399 c System clock system counter SM400 to SM499 d Scan information SM500 to SM599 e Memory card information SM600 to SM699 f Instruction related SM700 to SM799 g For debugging SM800 to SM899 h Latch area SM900 to SM999 i For A PLC SM1000 to SM1299 1 For details on special relays which can be used by the High Performance model QCPU refer to Appendix 1 2 This takes effect only after you have turned on the Use special relay special register form SM1000 SD1000 check box in the Comp
34. 2 Pointer applications a Pointers are used in jump instructions CJ SCJ JMP to designate jump destinations and labels jump destination beginning b Pointers are used in sub routine CALL instructions CALL CALLP to designate the CALL destination and label sub routine beginning 3 Pointer types There are 2 pointer types local pointers Section 10 9 1 which are used independently in programs and common pointers Section 10 9 1 which are used to call sub routine programs from all programs executed in the CPU 10 9 1 Local pointers 1 Definition a Local pointers are pointers which can be used independently in program jump instructions and sub routine call instructions Local pointers cannot be used from other program jump instructions and sub routine CALL instructions Use an ECALL instruction to call a sub routine subprogram in a program file that contains local pointers b The same pointer No can be used in each of the programs Program A Program B ca nA Same pointer is eu Al reno H FEND HH gt gt ret H Ret H leno eno H For further information on jump instructions and sub routine call instructions see the QCPU Q Mode QnACPU Programming Manual Common Instructions 10 54 10 54 10 EXPLANTION OF DEVICES MELSEC Q 2 Number of local pointer points Local pointers can be divided among all the programs stored in the
35. 50 50 25 App 50 APPENDICES MELSEC Q Special Register List ACPU Special Conversion App 51 10 Special register list dedicated for QnA Special Register after Conversion Special Register for Modification Meaning 0 Normal end 2 ZNRD instruction setting fault Error at relevant station Relevant station ZNRD execution disabled ZNRD LRDP for ACPU processing results i j p 7 Normal end ZNWR instruction setting fault Error at relevant station Relevant station ZNWR execution disabled ZNWR LWTP for ACPU processing results Stores conditions for up to numbers 1 to 16 Local station link type Stores conditions for up to numbers 17 to 32 E SD1204 Link status Forward loop during data link Reverse loop during data link Loopback implemented in forward reverse directions Loopback implemented only in forward direction Loopback implemented only inreverse direction Data link disabled Corresponding Detail etails CPU Stores the execution result of the ZNRD word device read instruction e ZNRD instruction setting fault Faulty setting of the instruction constant source and or destination One of the stations is not communicating The specified station is a remote I O station e Corresponding station error ZNRD
36. 7 character string 3 RO RS R16 R24 R32 R40 Ras R56 R64 R72 R80 Rae R36 R104 R112 R120 e l l e e lolol lololol o lo e l l lolol lololol lo lo e l l e lolol l lololol l lo Writing of file register Online write to PLC screen Connecting interface COMT lt gt PLC module PLC Connection Newa No T Station No Host PLCtype Q06H Target memoy Memory cardRAM z_e f File selection Device data Program Common Local Param Prog _ Select all Cancel all selections Close J main2 O mant a Password setup CL mains Related functions _ 0 Mama EH Device comment TELE DO COMMENT O MAIN Keyword setup EHE Parameter I PLC Network Remote password Remote operation e e Fie register Format PLC memory Wile range Arange PLC memory Range specification ZR 0 432767 Create tile Total ri Writing of the file register to the QCPU Writing of the parameter to the QCPU 10 46 10 46 10 EXPLANTION OF DEVICES 1 Designating file registers for use The standard RAM or the memory card file registers which are to be used in the sequence program are determined at the PLC file tab screen in the PLC Parameter dialog box PLC name PLC system PLC file ruc RAS
37. B in a descending order 6 Connect an extension cable between the OUT connector of an extension base unit and the IN connector of another extension base unit 7 An error may occur if more than 66 mounted number of mounted modules including CPU module 1 CPU No 1 8 Refer to section 14 2 1 for mounting Motion CPUs 9 For the I O number of multiple CPU system other than above see Section 15 1 1 14 4 14 4 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 Precautions For Multiple CPU System Configuration 14 2 1 Function versions of High Performance model QCPU Motion CPUs and PC CPU module that can be used and their mounting positions 1 Function versions a Allowable function versions and version confirmation method 1 To configure a multiple CPU system use the High Performance model QCPU and Motion CPU of function version B 2 Touse the PC CPU module use the following High Performance model QCPU and Motion CPU e High Performance model QCPU First five digits of the serial No is 03051 or later and function version is B e Motion CPU The first digits of the serial No must be as follows Q172CPU H or later Q173CPU G or later 3 The function version of the High Performance model QCPU and Motion CPU can be checked at the following places e Ratings nameplate of High Performance model QCPU and Motion CPU e Product data list
38. Because the Motion CPU is not provided with the FROM instruction or intelligent function module device data cannot be read from the Motion CPU For reading from the PC CPU module refer to the manual of the PC CPU module 16 13 16 13 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 1 Host CPU operation information area OH to 1FFH a The following information is stored in the host CPU with multiple CPU system These will all remain as 0 and will not change in the case of single CPU system 1 Table 16 1 List of host CPU operation information area CPU shared memory Detail Description 2 address Corresponding special register The area to confirm if information is stored in the host CPU s operation information area 1H to 1Fx or not Information Information 0 Information not stored in the host CPU s operation availability availability flag information area e 1 Information stored in the host CPU s operation information area Diagnostic error LIe The numbers of errors during diagnostics is stored with BIN SDO The year and month that the error number was stored in the CPU shared memory s 1H address is stored with two digits of the SD1 BCD code The day and time that the error number was stored in the CPU shared memory s 1H address is stored with two digits of the BCD code The minutes and seconds that the error number was stored in the CPU shared memory s 1H address is stored with
39. Format PLC memory x Connection target information Connection interface com lt gt Puc module Target PLC Network No p Station No Host PLC type faoeH Target memory Program memory Device memory Format Type C Do not create a user setting system area the necessary system area only Create a user setting system area an area which speeds up monitoring from other stations System area fi K steps 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q b Memory capacity after formatting The memory capacity of the program memory after formatting when the user setting area of the system area is not set is indicated in Table 6 1 When the user setting area of the system area is set the value in Table 6 1 decreases by the set capacity Table 6 1 Memory capacity after formatting 1 CPU model Name Max Number of Files Stored Q02CPU 28 k steps 114688 bytes to 13 k steps 53248 bytes 28 files QO02HCPU 28 k steps 114688 bytes to 13 k steps 53248 bytes 28 files QO6HCPU 60 k steps 245760 bytes to 45 k steps 184320 bytes 60 files Q12HCPU 124 k steps 507904 bytes to 109 k steps 446464 bytes 124 files Q25HCPU 252 k steps 1032192 bytes to 237 k steps 970752 bytes 252 files c Precautions for formatting 1 Formatting of program memory The High Performance model QCPU program memory can only be used after being formatted by GX Developer When formatting the program memory designat
40. Goes ON when access is made to area outside the range OFF Within access range of file register R of memory card A ON Outside access range Set within END processing e Reset at user program Memory card A access range flag n a SI N o fo Ke an n g App 7 App 7 APPENDICES Special Relay List Continued Meaning Explanation When Set Goes ON when access is made outside the range of file registers R of memory card B Set within END processing e Reset at user program Memory card B SM673 jfile register access range flag OFF Within access range ON Outside access range 6 Instruction Related Special Relays vant a OFF Carry OFF SM700 Carry flag ON Carry ON Number of output characters selection Carry flag used in application instruction Instruction execution When SM701 is OFF 16 characters of ASCII code are output When SM701 is ON output conducted until NUL 00H code of ASCII code is encountered OFF 16 characters output ON Outputs until NUL MELSEC Q Q2A S1 Q3A Q4A OFF Search next Designates method to be used by search instruction N SM702 Search method ON 2 part search e Data must be arranged for 2 part search B ow OFF Ascending order The sort instruction is used to designate whether data SM703 Sort order g should be sorted in ascending order or in descending ON Descending order order Non match found All
41. Link In the High Performance model QCPU of function version B the following items necessary to configure a multiple CPU system have been added to the PLC parameters Refer to Section 14 2 6 e Multiple CPU setting e Control CPU setting I O assignment In this chapter the PLC parameters and network parameters to be set using GX Developer are listed in a table For details of each setting item refer to the reference section or reference manual given in the table For the setting operation on GX Developer refer to the GX Developer Operating Manual When any PLC parameter setting has been changed power off and then on the PLC ON gt OFF gt ON or reset the QCPU If the High Performance model QCPU is switched from STOP RUN without any operation after the PLC parameter setting change the new parameter setting may not become valid or PARAMETER ERROR error code 3000 may occur 9 PARAMETER MELSEC Q Table 9 1 Parameter List Designate the label and comment for the CPU module to be used These settings do not affect CPU operation PLC system PLC file setting 0000H Designates the label setting name and use 0001H Designates the comment setting Timer limit setting Low Speed High Speed 1000 RUN PAUSE contacts 1001 Output mode at STOP to RUN Floating point arithmetic processing Intelligent functional module setting interrupt pointer setting Common pointer Number of empty slots In
42. Not f 2 0800 No 2 2 osoo No3 Y a osoo Noa N AK o0 NES Setting switch range of transmission for each CPU refresh range 1 It is possible to set four ranges from Setting 1 to Setting 4 for the refresh setting with the setting switch For example it is possible to set the refresh function to divide ON OFF data into bit devices with Setting 1 and other data into word devices with Setting 2 The transmission range for each CPU is set in units of two CPU shared memory points two words Becomes 2 points when specifying the word device with the CPU device and 32 points when specifying the bit device Data for which the point is set at 0 with the range of transmission for each CPU will not be refreshed As the bit device becomes 16 points at one point of the CPU shared memory when refreshing is performed with 32 points between BO and B1F on the CPU No 1 and with 32 points between B20 and B3F on the CPU No 2 the number of transmission points is two for the CPU No 1 and two for the CPU No 2 The number of transmission points is a maximum of 2 k points 2 k words with a total of four ranges for each CPU module making a total of 8 k points 8 k words for all CPUs PLC side device The CPU shared memory CPU share memory is set in two points and the bit device becomes 32 points when bit device is specified on the CPU device 080 080 080 080 Not refreshed as the number of points for CPU
43. Presence absenc SM1100 eofSFC program M9101 SM1101 SM321 Start stop SFC OFF program ON SFC program start status SM1102 App 14 SM322 being requested P set being requested Other than when P set being requested P set being requested Divided processing not underway During divided processing Batch processing Divided processing Read time not shortened Read time shortened Empty spaces in communication request registration area No empty spaces in communication request registration area Error check executed No error check No error Error Replacement No replacement SFC programs not used SFC programs used SFC programs stop SFC programs start Initial Start Continue Main side P set Momentarily ON at P I set completion completion Sub program P Momentarily ON at P I set set completion completion Other than when P set Turned ON once when the P and then turned OFF again set has been completed Provides P set request after transfer of the other program for example subprogram when main program is being run is complete during run Automatically switched off when P setting is complete Provides P set request after transfer of the other program for example subprogram when main program is being run is complete during run Automatically switched off when P setting is complete Turned
44. i Set parameters written onto the hard disk or floppy disk ear End APPENDICES MELSEC Q APPENDICES APPENDIX 1 Special Relay List App 1 Special relays SM are internal relays whose applications are fixed in the PLC For this reason they cannot be used by sequence programs in the same way as the normal internal relays However they can be turned ON or OFF as needed in order to control the CPU module and remote I O modules The headings in the table that follows have the following meanings Function of Item Name e Indicates the name of the special relay Indicates whether the relay is set by the system or user and if it is set by the system when setting is performed lt Set by gt S Set by system U Set by user in sequence program or test operation at a GX Developer S U Set by both system and user lt When set gt indicated only if setting is done by system Each END Set during each END processing Initial Set only during initial processing when power supply is turned ON or when going from STOP to RUN Status change Set only when there is a change in status Error Set when error is generated Instruction execution Set when instruction is executed Request Set only when there is a user request through SM etc e Indicates special relay M9 _ corresponding to the ACPU Corresponding ACPU Change and notation when there has been a change in contents M9 OO
45. v Status bar Zoom v Project data list Alte0 Instruction list Alt F1 Set the contact Elapsed time 10 61 10 61 10 EXPLANTION OF DEVICES MELSEC Q 10 12 Constants 10 12 1 Decimal constants K 1 Definition Decimal constants are devices which designate decimal data in sequence programs They are designated as K settings e g K1234 and are stored in the High Performance model QCPU in binary BIN code See Section 4 8 1 for details on binary code Designation range The designation ranges for decimal constants are as follows e For word data 16 bits K 32768 to K32767 e For 2 word data 32 bits K 2147483648 to K2147483647 10 12 2 Hexadecimal constants H 10 62 1 Definition Hexadecimal constants are devices which designate hexadecimal or BCD data in sequence programs For BCD data designations 0 to 9 digit designations are used Hexadecimal constants are designated as Hi1 settings e g H1234 See Section 4 8 3 for details on hexadecimal code Designation range The setting ranges for hexadecimal constants are as follows e For word data 16 bits HO to HFFFF HO to H9999 for BCD e For 2 word data 82 bits HO to HFFFFFFFF HO to H99999999 for BCD 10 62 10 EXPLANTION OF DEVICES MELSEC Q 10 12 3 Real numbers E 1 Definition Real numbers are devices which designate real numbers in the sequence program Real
46. 1 513 8170 e mail inea inea si Beijer Electronics AB SWEDEN Box 426 S 20124 Malm Phone 46 0 40 35 86 00 Fax 46 0 40 35 86 02 e mail info beijer se ECONOTEC AG Postfach 282 CH 8309 N rensdorf Phone 41 0 1 838 48 11 Fax 41 0 1 838 48 12 e mail info econotec ch SWITZERLAND GTS Dar laceze Cad No 43 Kat 2 TR 80270 Okmeydani Istanbul Phone 90 0 212 320 1640 Fax 90 0 212 320 1649 e mail gts turk net TURKEY CSC Automation Ltd UKRAINE 15 M Raskova St Fl 10 Office 1010 UA 02002 Kiev Phone 380 0 44 238 83 16 Fax 380 0 44 238 83 17 e mail csc a csc a kiev ua Electrotechnical RUSSIA Systems Siberia Shetinkina St 33 Office 116 RU 630088 Novosibirsk Phone 7 3832 22 03 05 Fax 7 3832 22 03 05 e mail info eltechsystems ru Elektrostyle ul Garschina 11 RU 140070 Moscow Phone 7 095 514 9316 Fax 7 095 514 9317 e mail info estl ru Elektrostyle Krasnij Prospekt 220 1 Office No 312 RU 630049 Novosibirsk Phone 7 3832 10 66 18 Fax 7 3832 10 66 26 e mail info estl ru ICOS RUSSIA Industrial Computer Systems Zao Ryazanskij Prospekt 8a Office 100 RU 109428 Moscow Phone 7 095 232 0207 Fax 7 095 232 0327 e mail mail icos ru NPP Uralelektra ul Sverdlova 11a RU 620027 Ekaterinburg Phone 7 34 32 53 27 45 Fax 7 34 32 53 27 45 e mail elektra etel ru SSMP Rosgidromontazh L
47. 10th character from the right changed SD224 7th character from the right 8th character from the right SD225 SD225 5th character from the right 6th character from the right SD226 D226 3rd character from the right 4th character from the right SD227 1st character from the right 2nd character from the right SD227 0 Automatic mode z SD240 Base mode i e Stores the base mode S Initial New 1 Detail mode 0 Main base only hee 1 to 7 No of SD241 extension Sienan Stores the maximum number of the extension bases being installed S Initial installed 7th expansion Q mode base b7 b2 bi b0 ferential ewoo wo k kR Main base 0 QA y a Bis ist expansion installe ase D242 si 2nd expansion S Initial differentiation A mode base 1 Q Bi 0 fixed when the 9 F to base is not installed b15 to b12b11 to b8b7 to b4b3 to bO D243 SD243 Expansion 3 Expansion 2 Expansion 1 Main Noorpase No of base slots SD244 Expansion 7 Expansion 6 Expansion 5 Expansion a S Initial New SD244 os As shown above each area stores the number of slots being installed S Loaded Loaded maximum When SM250 goes from OFF to ON the upper 2 digits of the final Request maximum I O I O No V O number plus 1 of the modules loaded are stored as BIN values Head I O Head I O No for number for module replacement replacement Stores the upper two digits of
48. Anunciator ON procedure Anunciator operation can be controlled by the SET Fi and OUT t ainstructions 1 The SET F lt instruction switches the anunciator ON only at the leading edge OFF to ON of the input condition and keeps the anunciator ON when the input condition switches OFF In cases where many anunciators are used the OUT FL instruction can be used to speed up the scan time The OUT F instruction can switch the anunciator ON or OFF It takes longer to do so than the SET F instruction If the anunciator is switched OFF by using an OUT F instruction this will require the execution of an RST F lt or LEDR instruction Use a SET Fi instruction to switch the anunciator ON POINT If switched ON by any method other than the SET F and OUT F instructions the anunciator functions in the same way as the internal relay Does not switch ON at SM62 and anunciator Nos are not stored at SD62 SD64 to SD79 b Processing at anunciator ON 1 10 13 Data stored at special registers SD62 to SD79 a Nos of anunciators which switched ON are stored in order at SD64 to SD79 b The anunciator No which was stored at SD64 is stored at SD62 c 1 is added to the SD63 value SET F50 SET F25 SET F2047 Z a ain we ae SD62 o gt 50 50 50 SD63 0 gt 1 gt 2 gt 3 SD64 o gt 50 50 50 SD65 o gt 25 25 SD66 o o gt 2047 Up to 16 a
49. Continued Corresponding 7 bei T Explanation SD64 When F goes ON due to OUT F or SET F the F numbers which go progressively ON from SD64 through SD79 are registered The F numbers turned OFF by are deleted from SD64 SD79 and the F numbers stored after the deleted F numbers are shifted to the preceding registers Execution of the instruction shifts the contents of SD64 to SD79 up by one This can also be done by using the INDICATOR RESET switch on the of the Q3A Q4ACPU After 16 annunciators have been detected detection of the 17th will not be stored from SD64 through SD79 SET SET SET RST SET SET SET SET SET SET SET F50 F25 F99 F25 F15 F70 F65 F38 F110F151F210 LEDR TA _ A A A A A A A A A A A A i Numbi Annunciator 50 50 50 50 50 50 50 50 50 50 50 99 umber i 3 3 4 5 6 7 8 9 8 Number of i detection Number of gt Instruction detected i number 501 80 10 10 solela execution 99 99 99 99 15 15 15 15 70 70 70 70 65 65 65 65 38 38 38 38 a te o o a 0 Number detected Slolololofofojo olo ososo Error codes detected by the CHK instruction are stored as BCD CHK number CHK number code Instruction execution Corresponds to SM90 Set the annunciator number F number that will be turned ON when the step tr
50. Either the leading edge or the fall can be specified for execution condition c When Step No and Device is selected The monitor data is sampled when the status previous to execution of the specified status or the status current value of the specified bit device word device is specified 7 28 7 28 7 FUNCTION MELSEC Q When Step No 100 lt P gt Word Device D1 K5 is specified as the detailed condition in the following circuit a monitor execution condition is established at the leading edge of the 100th step where D1 5 X0 MO 100th step Y20 INC D1 The monitor interval of GX Developer depends on the processing speed of GX Developer When a monitor condition is established during the monitor interval of GX Developer the monitor will be performed even if a monitor condition is established at a shorter interval than the monitor interval Step No 100 MO l XO D1 5 Monitor timing QCPU 2 Monitor Stop Condition Set Up Choose Online gt Monitor gt Monitor stop condition to open the Monitor Stop Condition dialog box The following shows an example of stopping a monitoring operation at the leading edge of Y71 Monitor stop condition V Device Device Condition C word device E a DEC i bit integer x _Suspend_ Close Bitdevice YF ll p z peers Step No aways a When Step No is specified 1 Monitoring is stopped when t
51. I O refresh time is the total time required for refreshing I O data of the following modules e Input module e Output module e Intelligent function module special function module b 1 O refresh time is given in the formula I O refresh time Number of inputs point 16 lt N1 Number of outputs point 16 XN2 c The table below shows N1 and N2 CPU type ar ar me Q30B Q6UIB QA1SOB Q30B Q6UIB QA1SOB 2 Instruction execution time a Instruction execution time is the total processing time required to execute an instruction in a program on the High Performance model QCPU For details on the execution time of each instruction see the QCPU Q Mode QnACPU Programming Manual Common Instructions b Overhead time is required for an interrupt program fixed scan execution type program Add overhead time to execution time 3 END processing time a END processing time is the High Performance model QCPU processing time common to the above listed items 1 and 2 b The table below shows the length of END processing time CPU Type END Processing Time QO2CPU Q02HCPU QO6HCPU Q12HCPU Q25HCPU 11 1 11 1 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME MELSEC Q 11 2 Factors Responsible for Extended Scan Time 11 2 The following functions increase the length of scan time When using any of the following functions add a value of extended time to values obtained from Section 11 1 e MELSECNET H
52. Maximum of four Interruption modules isimu ol threstwhen ihe Only one A1SI61 is in use x A maximum of 4 modules per PLC 16 modules per system can be controlled if the network parameters for CC Link are set and controlled by GX Developer There is no restriction in the number of modules when the parameters are set by the instructions dedicated to the CC Link Q series MELSECNET H network modules Q series Ethernet interface modules 14 12 14 12 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 5 Compatible GX Developers and GX Configurators 1 Compatible GX Developers GX Developer Version 6 SW6D5C GPPW E or later are compatible with on multiple CPU system GX Developer Version 5 SW5D5C GPPW E or earlier are not compatible with multiple CPU system 2 Compatible GX Configurators The GX Configurators listed can be used on multiple CPU system without modification 14 13 14 13 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 6 Parameters that enable the use of multiple CPU system 1 Parameters that enable the use of multiple CPU system Compared with the single CPU system the multiple CPU system includes the No of CPU control CPU refresh setting automatic refresh setting of PLC parameters The PLC parameters must be set to the same for all the CPU modules used in the multiple CPU system except some modules Make similar settings to the PC CPU module if one is included
53. Minimum value 4 18 SD528 SD529 Low speed scan time Present value aaa m hre a A hws Ratt A hentia 4 24 SD530 SD531 Low speed scan time Initial value AE O E E 4 24 SD532 SD533 Low speed scan time Minimum value Miaa a a anhitie sh anniek a aaa 4 24 SD534 SD535 Low speed scan time Maximum ValUC A E E E T 4 24 Self diagnosis function cceeeeereeteee 7 59 SEQUENCE PFOQrAM eceeceeeeceeteeteeeeeteeeees 4 1 Serial NOs err ran cetehtasreedd 1 1 Setting range in the internal user device 10 3 Setting the number of stages cceseee 5 2 SFC block device BL seceeeeeeees 10 58 SFC transition device TR 10 58 Single precision floating decimal point data 4 48 Size File Capacity c ceceeeceeeseeeteeeees 6 2 SM Special relay cecceceeseeeeeeeeeeees 10 33 SM415 2n ms clock ececeeceeeeeeeeeeteeteees 8 9 Link special register SW cceeeeeeee 10 30 Link special relay SB eseeeeeee 10 18 Special register SD ccceseseeeeeeeeees 10 34 Special relay SM essecceeeeeseeeeeeeeeees 10 33 SRAM c rdi eratara 6 11 Index 3 ST Retentive timer OUT ST 2 10 21 Stand by type program cceeseeeeeeeeees 4 25 Standard RAM rearen a 6 9 Standard RAM memory capacity 0 00 6 9 Standard ROM sannitica 6 8 Step relay S iraniani reinen neii Ank 10 18 Sub routine program csecce
54. Program error location Switch cause for Q4AR only i For a multiple PLC system the module number or PLC New gt number is stored depending on the error that occurred Refer to the corresponding error code for which number has been stored PLC No 1 1 PLC No 2 2 PLC No 3 3 PLC No 4 4 The individual information category codes store the following codes 0 No error Corresponding ACPU po Corresponding CPU 1 Open 2 File name Drive name 3 Time value actually measured 4 Program error location 5 Parameter number 6 Annunciator number 7 Check instruction malfunction number App 23 APPENDICES MELSEC Q Special Register List Continued Set by Corresponding r Corresponding Explanation CPU Common information corresponding to the error codes SDO is stored here The following four types of information are stored here Slot No Number Meaning SD5 _ Slot No PLC No Base No 1 2 SD6 VO No Not used for base No SD7 SD8 SD9 SD10 SD11 Vacant SD12 SD13 SD14 SD15 1 For a multiple CPU system the slot number or CPU number is stored depending on the error that occurred Slot 0 in the multiple CPU system is the one on the slot on the right of the rightmost CPU module Refer to the corresponding error code for which number has Error been stored Error common common information No 1 CPU 1 No
55. Q fo fo x n e an fon Q fo Pj a Q fo fo x SM415 2n ms clock SGRI E User timing clock SM420 No 0 SM421 User timing clock User timing clock SM422 No 2 User timing clock SM423 No 3 SM424 User timing clock SM430 User timing clock No User timing clock SM431 No 6 SM432 User timing clock User timing clock SM433 No User timing clock SM434 Nog App 6 zZ Z zZ o o o N oa A 2k ON lt lt OFF 1 scan ON OFFe e 0 005 sec 0 005 sec After RUN ON for 1 scan only This connection can be used for scan execution type programs only After RUN OFF for 1 scan only e This connection can be used for scan execution type programs only After RUN ON for 1 scan only This connection can be used for low speed execution type programs only After RUN OFF for 1 scan only e This connection can be used for low speed execution type programs only Repeatedly changes between ON and OFF at 5 ms interval e When PLC power supply is turned OFF or a CPU module reset is performed goes from OFF to start Note that the ON OFF status changes when the designated time has elapsed during the execution of the program e Repeatedly changes between ON and OFF at each designated time interval e When PLC power supply is turned OFF or a CPU module reset is performed goes from OFF to start Note
56. Q2A S1 Drive 4 SD623 pe 7 Q3A capacity Drive 4 capacity is stored in 1 kbyte units Q4A Q4AR The conditions for usage for drive 3 4 are stored as bit patterns In use when ON The significance of these bit patterns is indicated below Boot operation QBT Not used Parameters QPA CPU fault history QFD Drive 3 4 use Drive 3 4 use Device comments QCD lt Not used S Status conons 1 eenduions Device initial value QDI b11 Local device QDL change File R QDR Not used Trace QTS Not used Not used Not used Not used Not used SD624 T The use conditions for memory card B are stored as bit patterns In use when ON The significance of these bit patterns is indicated below Boot operation QBT Simulation data QDS Memory card Memory card Parameters QPA CPU fault history QFD Buse Buse Device comments QCD SFC trace QTR conditions conditions Device initial value QDI Local device QDL File R QDR Not used Sampling trace QTS Not used Status latch QTL Not used b Program trace QTP Not used 7 Fil i D640 Stores drive number being used by file register S Initial D641 Stores file register file name with extension selected at parameters D642 or by use of QDRSET instruction as ASCII code D643 b15 to b8 b7 to bO SD641 Second character First character D644 File register File register SD642 Fourth character Third ch
57. See Section 4 2 for details regarding execution conditions 4 Designating devices a Designate the number of device points used in each program and the number of device points which are shared by all programs See Chapter 10 for details regarding devices which can be used in the High Performance model QCPU b Designate whether or not the internal relays edge relays timers counters and data registers of each program are to be designated as local devices See Section 10 13 1 for details regarding local devices c When creating sub routine programs designate whether or not common pointers are to be used See Section 10 9 2 for details regarding common pointers 5 Device initial value setting Designate whether or not the device initial value settings are to be used for the High Performance model QCPU devices and intelligent function modules See Section 10 13 2 for details regarding device initial values 12 5 12 5 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q 12 2 2 Procedure for writing programs to the High Performance model QCPU The procedure for writing programs and parameters created by GX Developer to the memory card mounted in the High Performance model QCPU memory card interface is shown below In order to write programs and parameters to the High Performance model QCPU memory card the memory card must be mounted the valid parameters drive settings must be designated by the High
58. System Monitor 7 75 T21 LED Display cveseseccce cece creer eee teen tebenee den cellleh eucea caddie dbnded ebeudeecdidseed ceudseceseed tied teed eee eed led sed eudseneees 7 79 AeA LED dis play c2 ha Sin aS Aah a eae Hee ee Rie ee eee eee hee eis 7 79 7 2132 Priority seting i stasis eset eet de ia et de ede eee dee 7 81 7 22 High Speed Interrupt FUNCTION ceceseesececesseseseceseeseseceseeseseseeeseseseeeseseseeeaeseseseeaeaeseaeeaeseeesasseseetesesseeteeeaseeaens 7 83 7 22 1 High speed interrupt program execution eeseceeeceeeeeeeeeeeeteeeeeeeeeeeeeeseeseeeteeseeseeeseeeseeeteneeentaaes 7 85 7 22 2 High speed I O refresh high speed buffer transfer ccccecceseeceeeeeeeeeeceeceeeeeeeaeeaeeeeseaeeeeeeeeeseaes 7 86 Zeza PrOCeSsIng UIMG 228 Sahai aii ath a ara aiaag anehaiaai aan ania ined 7 88 722 4 R StictiONS oda Mee i dee aed deed ed re ede ed ed den eed trees 7 90 7 23 Module Service Interval Time Reading sseececeesesesesesseseseseeseseseeeeseseaeeneseseaeeeeeeeeaeaeeneaessaeeeeeeesaseteneeeasateneens 7 93 A 10 A 10 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE 8 1to8 9 8 1 Communication Between High Performance model QCPU and Q series Intelligent Function Modules 8 1 8 1 1 Initial setting and automatic refresh setting using GX Configurator ccecceseeeeeeeeeeeeeeeeeneeees 8 2 8 1 2 Communication using device initial VAlUC ceccecceseeseeeeeeec
59. The GX Developer Version 5 SW5D5C GPPW E or later is required when changing the response time of the high speed input module The input response time of the high speed input module cannot be amended with the GX Developer Version 4 SW4D5C GPPW E Fixed at 0 2 ms default setting c The input response speed setting is valid in the following cases e After the PLC is turned on e When the High Performance model QCPU is reset 7 FUNCTION MELSEC Q 7 7 3 Selecting the response time of the interrupt module 1 Selecting the response time of the interrupt module Qn H Parameter PLC name PLC system PLC fi 1 0 Assignment Select Interrupt Changing the response time of the interrupt module means to amend the input response speed for interrupt modules QI60 that support the Q Series to 0 1 ms 0 2 ms 0 4 ms 0 6 ms and 1 ms Input from external devices is accepted at the input response speed set for the interrupt module The default setting for the input response time is 0 2 ms ON s OFF External input ON I l i Ly OFF Interrupt module j Input response time Setting the Input Response Time Input response time is set up at the I O assignment tab screen in the PLC Parameter dialog box Select Interrupt among the slot types for which the input response time is to be set Select Detailed settings Select Input response time Intelligen
60. Tokea ja ms 0 5ms 2000ms r Operating mode when there is an error Computation error Stop M r Low speed program execution time Expanded command error Stop o ms 1ms 2000ms Fuse blown Stop fal r Breakdown history 140 module comparison error Stop X Intelligent module program stop z Record in PLC RAM execution error p C Record in the following history file Memory card access error Stop Corresponding E Memory card operation eror Stop momon File name Extemal power supply OFF Stop z History No Item 16 100 Acknowledge XY assignment Multiple CPU settings Default Check End Cancel b Set the set time of the constant scan longer than the maximum scan time of the sequence program Also set the constant scan set time shorter than the WDT set time WDT Set Time gt Constant Scan Set Time gt Sequence Program maximum Scan Time If the sequence program scan time is longer than the constant scan set time the High Performance model QCPU detects PRG TIME OVER an error code 5010 the sequence program is executed with the scan time by ignoring the constant scan Constant scan setting Constant scan 0 END 0 Sequence program j 3 5ms 0 5ms 3 5ms s 4ms 5 3ms i 4ms 0 5ms gt t Scan where the constant scan is not normal Fig 7 2 Operation when the Scan Time is longer than the Constant Scan If the time is longer than the WDT se
61. W etc indicate whether to read from the link module For refresh from CPU to link B W etc designate whether to write to the link module Goes ON for standby network If no designation has been made concerning active or standby active is assumed For refresh from link to CPU B W etc indicate whether to read from the link module For refresh from CPU to link B W etc designate whether to write to the link module Goes ON for standby network If no designation has been made concerning active or standby active is assumed For refresh from link to CPU B W etc indicate whether to read from the link module For refresh from CPU to link B W etc designate whether to write to the link module Goes ON when a CC Link error is detected in any of the installed QJ61QBT11 Goes OFF when normal operation is restored Goes ON when a CC Link error is detected in any of the installed A 1S J61QBT11 Stays ON even after normal operation is restored ON if SFC program is correctly registered and OFF if not registered e Goes OFF if SFC dedicated instruction is not correct e Initial value is set at the same value as SM320 Goes ON automatically if SFC program is present SFC program will not execute if this goes OFF prior to SFC program processing Starts SFC program when this relay goes from OFF to ON Stops SFC program when this relay goes from ON to OFF designate Q2A S1 Q
62. and communication dedicated commands between multiple CPUs omitting the S P GINT instruction at one time However if the Motion dedicated CPU instructions and communication dedicated instructions between multiple CPUs omitting S P GINT instruction are made at the same time the instructions will be executed in order from the first instruction accepted If there are 33 or more unexecuted instructions an OPERATION ERROR error code 4107 will be triggered Refer to the Motion CPU Programming manual for details on and the necessity of use of the motion only instructions 16 11 16 11 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 16 3 2 Reading and writing device data It is possible to read and write device data into the Motion CPU from the High Performance model QCPU with the communication dedicated instructions between multiple CPUs listed in the table below Reading or writing can not take place from the High Performance model QCPU to the High Performance model QCPU the High Performance model QCPU to PC CPU module Motion CPU to the High Performance model QCPU or Motion CPU to Motion CPU CPU module module Instruction name Description poe PC CPU pee S DDWR SP DDWR S DDRD he h P SP DDRD Reads other CPU device data into the host CPU ae S GINT SP GINT Requests start up of other CPU interruption programs rake For example High Performance model QCPU device data can be written
63. and is not required in subsequent scans An instruction that contains a complete device cannot be used for an initial execution type program because the complete device needs several scans to complete the execution Control with one program Using initial execution type program Program A fe NS eS a tee md ae i Initial execution initial program gt f f type program Biin he ie e a ae R ak Division into initial execution type program Program B and scan execution type AS I ERA IEOR RIE Program to execute Scan execution ateveryscan type program Dahe Gites Sethe ee ets 2 Using multiple initial execution type programs When multiple initial execution type programs are used they are executed one by one in ascending order of the program in the PLC parameters 3 END processing END processing is performed when all initial execution type programs are completed and the scan execution type program is then executed from the next scan Power supply ON STOP to RUN i oT i i D Initial execution type program A Y Initial execution 1 Scan Executed by program type program B setting order i Initial execution type program n i 4 END processing r F l Scan execution 1 type program E i 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 Initial scan time a This is the execution ti
64. ate nee function eee ane When the FROM TO instruction is executed e When the power is turned on when reset Control bus error CONTROL BUS ERROR e When the END instruction is executed e When the FROM TO instruction is executed Battery low BATTERY ERROR e Always Default Yes 3 1 O module verification Default When the END instruction is executed i NIT VERIFY ERROR Stop Default Yes Intelligent function module e When the power is turned on when reset UNIT LAY ERR allocation error sPuNTLAYeRR When switched from STOP to RUN inteligent proram exerimon error SP UNIT ERROR e When the FROM TO instruction is executed Default Stop Imeligent function modul versior SP UNIT VER ERR e When the power is turned on when reset No parameter MISSING PARA When the power is turned on when reset Boot error BOOT ERROR When the power is turned on when reset Memory card operaron Sron ICM OPE ERROR When the memory card is installed removed Default Stop File setting error FILE SET ERROR When the power is turned on when reset pote 1 FILE OPE ERROR e When an instruction is executed Instruction execution not possible CAN T EXE PRG When the power is turned on when reset e When the power is turned on when reset Parameter setting check PARAMETER ERROR When switched from STOP to RUN i e When the power is turned on when reset Link parameter error LINK PARA ERROR When switched from STOP to RUN SF
65. bs 100 The sl f the 2 nsion AF CF EF YFF 10F es ot numbers of the 2nd stage s extensio Q68B 8 slot ied base unit continue from the last slot number of S slots ee the 1st stage s extension base unit 10 1i 12 13 14 15 16 17 2 2 2 2 2 2 2 2 2 3 3 B leslesl es 38 2 38 O O O D fo D fe D e e e O xs E amp E o amp o oF E E m 2 gt s s 3535 35 8 83 3 22 2 2 2 5 3 3 28 2 amp exe a S S O O O oo fins Pm Ja ol 16 16 32 32 32 16 16 16 a points points points points points points points points gt X110 X120 130 150 170 Y190 Y1A0 Y1BO X11F X12F 14F 16F 18F Y19F Y1AF Y1BF The above example shows the case where the intelligent function module has 32 I O points The number of occupied I O points may vary depending on the intelligent function module Refer to the manual of the intelligent function module being used and check the number of the I O points before assigning the I O numbers 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 5 2 Remote station I O number It is possible to allocate High Performance model QCPU device input X and output Y to remote station I O modules and intelligent function modules and control the modules in the MELSECNET H remote network the CC Link and other remote I O systems 2 slsls 3 8 5 5 BISiEIGIs S 2 x x s o PfjHz SC Cla sla O C ZJEJ JS CIR ei2l j Rate ojo e ai ai
66. conditions are being registered 7 FUNCTION MELSEC Q 7 11 2 Monitoring test for local device 1 Monitoring and Testing Local Devices a Local devices specified at the Device tab screen in the PLC Parameter dialog box can be monitored or tested by operating from GX Developer This function is useful when debugging a program and monitoring local devices in a program monitored by GX Developer See Section 10 13 1 for local devices b Monitoring the Local Devices The table below shows the status of three programs A B and C being executed on the High Performance model QCPU with local devices DO to D99 specified It assumes that these three programs are executed in the order of A gt B gt C gt END processing A B DO When local devices are DO in Program C is monitored D100 is monitored after Program specified C is executed When local devices are DO in the displayed program is D100 is monitored after the not specified monitored displayed program is executed If the local device monitor setting is made and Program B is displayed for example this makes it possible to monitor the local devices in Program B High Performance model QCPU Program execution A gt B gt C Program A Program B Program C The local device data of the program B is displayed The local device monitor is set and the program
67. d The time includes the time required for processing sub routines when the sub routine CALL command is within the range of scan time measurement The amount of time required for executing interruption programs and fixed scan execution type programs is all added to this Measurement range Main program Sub routine program Measurement range 2 Measuring Scan Time To measure scan time follow the following steps a Display the leading edge of the circuit of which scan time to be measured and set the monitor mode 7 FUNCTION MELSEC Q b The scan time measurement range is specified The specified area is highlighted c Choose Online Monitor Scantime measurement to open Scan time Measurement dialog box Scantime measurement MAIN1 Measurement limit ee ar Start step 52 End step fios so Scantime Close Tst time ms Present ms Most ms Least ms d Click on the Start button Scantime measurement MAIN1 Measurement limit SET art Start step End step i Scantime Close 1st time 0 100 ms Present 0 100 ms Most 0 100 ms Least 0 100 ms 3 Precautions a Set the Measurement limit so that the value of Start step is larger than that of End step b The scan time to skip to another program file cannot be measured c Ifthe measurement time is less than 0 100 ms 0 000 ms is displayed d
68. d Write the device initial value data and parameter settings to the High Performance model QCPU 10 71 10 71 10 EXPLANTION OF DEVICES MELSEC Q 3 Precautions for the use of device initial values a In cases where both device initial value data and latch range data are overlapped the device initial value data takes priority Therefore the latch range data is rewritten by device initial value data at power ON b Device initial values cannot be used in areas where no setting is made for switching from STOP to RUN for data that is changed by a program at power ON Create a program to specify a device by using the MOV instruction in the main routine program Use the TO instruction to write data to the buffer memory of the intelligent function module For details on the setting procedures for the device initial value range device initial value data items and for writing the device initial values to the High Performance model QCPU refer to the GX Developer Operating Manual 10 72 10 72 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME MELSEC Q 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME 11 This chapter describes how to estimate the length of High Performance model QCPU processing time 11 1 Reading High Performance model QCPU s Scan Time The length of scan time is the total of the following times e I O refresh time e Instruction execution time e END processing time 1 lO refresh time a
69. i i Designation range 1 to 124 instruction instruction No of vacant registration area for CC Link communicati on request 3 ial redi h i k gt SD736 PKEY input PKEY input Special register t at temporari y stores keyboard data input by means S During New QnA of the PKEY instruction execution App 40 App 40 Stores the number of vacant registration area for the request for communication with the intelligent device station connected to A 1S J61QBT61 S During execution APPENDICES Number n D738 D739 D740 D741 D742 D743 D744 D745 D746 D747 D748 D749 D750 D751 D752 D753 D754 D755 D756 D757 D758 D759 D760 D761 D762 D763 D764 D765 D766 D767 D768 D769 n D774 O D775 n Message storage PID limit setting for complete derivative 0 Limit set 1 Limit not set refresh Special Register List Continued as Stores the message designated by the MSG instruction D738 D739 D740 SD741 D742 D743 SD744 D745 SD746 SD747 SD748 D749 SD750 SD751 SD752 SD753 SD754 SD755 SD756 SD757 SD758 SD759 SD760 SD761 SD762 SD763 SD764 SD765 SD766 SD767 SD768 SD769 b15 to b8 b7 to b0 2nd character 1st character 4th character 3rd character 6th character 5th character 8th character 7th character 10th character 9th character 12th character 11th character 14th character 1
70. in 1 ms units program to the start of the next scan into SD540 and S Every SD541 Measurement is made in 100us units END SD540 Stores the ms place Storage range 0 to 65535 processing SD541 Stores the us place Storage range 0 to 900 Maximum scan time Maximum scan time in 100 us units END processing time in 100 us units Constant scan wait Stores the wait time for constant scan setting into SD542 Constant scan time in 1 ms units and SD543 Measurement is made in 100us units wait time Constant scan wait SD542 Stores the ms place Storage range 0 to 65535 sin time in 100 us units SD543 Stores the us place Storage range 0 to 900 processing App 36 App 36 APPENDICES pisii Cumulative execution time for low speed execution type programs Execution time for low speed execution type programs Scan execution type program execution time Service interval measurement module Service interval time App 37 Cumulative execution time for low speed execution type programs in 1 ms units Cumulative execution time for low speed execution type programs in 100 us units Execution time for low speed execution type programs in 1 ms units Execution time for low speed execution type programs in 100 us units Scan execution type program execution time in 1 ms units Scan execution type program execution time in 100 us units Unit module No Module s
71. input module Input response time 2 Setting the Input Response Time Input response time is set at the I O assigment tab screen in the PLC Parameter dialog box Select Hi input among the slot types for which the input response time is to be set Select Hi input Select Detailed setting Select I O response time Qn H Parameter PLC name PLC system PLC file Intelligent functional module detailed setting PLCRAS Device Program Bootle SFC 1 0 assignment TE rror time Model name output mode 10 resppnse Control PLC time lia r 1 0 Assignment Switch seha Detailed setting Hi input Assigning the 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur r Base setting Base model name Power medelname Extension cable Slots p Base mode Auto z C Detail 8 Slot Default 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel 3 Precautions a The system will be adversely affected by noise etc when the input response time is set to high speed Set the input response time in consideration of the operating environment b
72. is the function added to the High Performance model QCPU whose first five digits of serial No are 03051 or later 1 OVERVIEW MELSEC Q 1 2 Programs 1 Program management by memory card a Programs created with GX Developer can be stored in the QCPU s program memory standard ROM or memory card High Performance model QCPU Program memory Parameter Memory card Standard ROM 1 RAM Parameter Parameter ara rogram lt Program File register File register _ only read process is enabled ROM Standard RAM 2 l Farameter Program File register F 4 File register When Flash card is used only read process is enabled 1 The standard ROM is used when parameters and programs are written to ROM x2 The standard RAM is used when access to the file register need to speed up b The QCPU processes programs stored in the program memory High Performance model QCPU Program memory Execution of program Parameter in program memory Program 1 OVERVIEW MELSEC Q Programs stored in the standard ROM memory card are executed after they are booted to read to the QCPU program memory Programs to be booted to the QCPU are designated on the PLC Parameter dialog box and the parameter drive is designated by a DIP switch setting at the QCPU High Performance model QCPU _ Program memory Parameter Execution of pr
73. minimum value and maximum value are measured at the High Performance model QCPU and the results are stored in special registers SD520 SD521 and SD524 to SD527 1 Therefore the initial scan time can be checked by monitoring the SD520 D521 and SD524 to SD527 special registers Current value SD520 SD521 Minimum value SD524 SD525 Maximum value SD526 SD527 gt Stores less than 1 ms initial scan time unit s gt Stores the initial scan time in 1 ms units If the SD520 value is 3 and the SD521 value is 400 the initial scan time is 3 4 ms x1 The accuracy of the scan time stored at the special registers is 0 1 ms The scan time count will continue even if a watch dog timer reset instruction WDT is executed at the sequence program 6 WDT Watch dog timer This is the timer which monitors the scan time and its default setting is 200 ms This WDT setting can be designated within the range of 10 to 2000 ms range at the PLC RAS tab screen in the PLC Parameter dialog box Setting units 10 ms When using the low speed execution type program set the WDT greater than the scan time plus the execution time of the low speed execution type program If the scan time execution time for scan execution type program low speed execution type program exceeds the WDT setting value a WDT ERROR error code 5000 occurs and High Performance model QCPU operation is stopped The WDT measure
74. on wo wi TE Set the same point for all the CPU Refresh setting for CPU No 2 Change screens Setting 1 bd Change screens BROMES ice e When the CPU No 1 and CPU No 2 devices have been set up with the same device for each PLC PLC side device me ar P PLC _ RLC skare memon G Dev starting WO BIF K sat Ea set S Ea BF A oi 1e A oe n a wor BFF mog 16 J oof omj wio wF BIF ma ea e e a CED O a ay 16 6 16 6 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM 16 7 MELSEC Q 3 An outline of the operations when the automatic refresh function is divided into four ranges Setting 1 Link relay B Setting 2 Link register W Setting 3 Data register D Setting 4 Internal relay M and then performed is shown in the illustration below _ Device Reading performed Setting 1 Other CPU s with the CPU No 1 BO CPU No 1 shared memory END process to transmission data No 1 CPU No 2 ry are CPU No 2 reception CPU No 2 transmission gt data No 1 data No 1 A CPU No 3 reception CPU No 2 transmission data No 1 Maximum data No 2 CPU No 4 reception 2 k words cpu No 2 transmission data Not data No 3 CPU No 2 transmission data No 4 CPU No 1 X transmission data No 2 CPU No 3 ry CPU No 2 reception CPU No 3 transmission data No 2 data No 1 e CPU No 3 reception CPU No 3 transmission data No 2 Maxi
75. register of all programs automatic refresh will be performed on the file register that corresponds with the last scan execution type program executed 16 7 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q c There are cases where old data and new data will become mixed up for each CPU depending on the timing of refreshing the host CPU and reading data from other CPUs When performing the automatic refresh function create an interlock program similar to the one shown below that uses the first device to be refreshed for each CPU and do not use the data from other CPUs when old data does get mixed up with new data An example of a program set up with the following multiple CPU setting refresh settings is shown below e CPU device DO e CPU No 1 transmission points 1024 points DO to D1023 e CPU vNo 2 transmission points 1024 points D1024 to D2047 DO Used for the CPU No 1 interlock D1024 Used for the CPU No 2 interlock CPU No 1 transmission device CPU No 2 transmission device Example of a program on the transmission side Example of a program on the reception side Interlock with bO of the CPU No 2 Interlock with bO of the CPU No 1 Writing first device D1024 first device DO command D1024 0 DO 0 M Transmission data set in DO to D1023 lt 7 gt bO of the CPU No 1 first device DO for the use of the interlock
76. section shows the I O number of each slot of a base unit module type and the number of points If the number of available points and the installed status are displayed in any column of the Parameter status section make the setting so that I O assignments of PLC parameter can match the installed status d Overall Information The Overall Information section shows the number of base units used and the number of modules installed on the base e Base The Base section indicates the status of base units used and modules installed The Module column indicates the status of a module when the module is in an abnormal condition f PLC diagnostics This button is used to monitor the status of the High Performance model QCPU and an error g9 Module s Detailed Information This button is used to view detailed information about a selected module For details on intelligent function modules see the manual of an intelligent function module 7 FUNCTION MELSEC Q 2 Incase of GX Developer Version 6 SW6D5C GPPW E or later It is possible to confirm the following information for High Performance model QCPUs connected to personal computers with the GX Developer system monitor see illustration below e Installed status e Operation status e Module s detailed information e Product information a gt Installed status Base Base Module 0 3 4 Control PLC QOZHCPU QI71 LPZ
77. using the PC CPU module setting utility For the setting method refer to the manual of the PC CPU module 2 The PLC parameter settings for use with multiple CPU system The PLC parameters necessity of setup and descriptions that are required for using multiple CPU system are listed in table 14 3 Table 14 3 Setting list for the multiple CPU and I O Assignment I O Assignment ve se moore SSCs t oS Standard setting Base mossas o o Powermod o t E Detailed settings Errorime ouiptmade dT dT o FW eror ime PLC operaionmade E resse dT dP Comore o l OY settings maso lt lt Ce S OY Online module change f o f o The input conditor ouside ofthe roupistaken A A The output condiion outside ofthe group staken A A Refresh setting 1 Necessity of setup column Items that must be set up for multiple CPU system operations not possible if not set up A Items that may be set up when required for multiple CPU system Operations carried out with the default values when not set up Items that are the same as single CPU system x2 Descriptions Items that have the same settings for all CPU modules on the multiple CPU system A Items that have the same settings for all High Performance model QCPUs and PC CPU module on the multiple CPU system items that do not have settings for Motion CPUs Items that can be setup up individually for each CPU modules on the multiple CPU system 14 1
78. when all scan execution type programs are executed and the END processing is completed The END processing network refresh can be performed for each program while several scan execution type programs are executed To do this include a COM instruction at the end of each scan execution type program STOP to RUN Power ON to RUN First scan T Second scan ji Third scan ji Forth scan Initial execution type program END processing 0 END 0 END 0 END Scan execution type program A 0 END o END Y Scan execution type program B H END lo END Scan execution type program C m 1 Scan time iaa gt 4 Constant scan Constant scan is a function that repeats the execution of a main routing program at give intervals When constant scan is set the scan execution program is executed at intervals of the preset constant scan time Refer to Section 7 2 for details of constant scan 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 5 Scan time a The scan time is a total of following the execution time of the scan execution type program and END processing If multiple scan execution type programs are used the scan time is the total time required to execute all the programs When an interrupt program fixed scan execution type program is executed the value added to the interrupt program fixed scan execution type program s execution time will become the scan time b The scan time current value
79. yY Mountable module Unmountable module Mounting module will result in error 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 2 Installing Extension Base Units and Setting the Number of Stages There are two types of extension base units Q5__ B Q6_ B for mounting of Q Series modules and QA1S6__ B and for mounting AnS Series modules 1 2 Connecting order of extension base units When using both Q5_ B Q6_ B and QA1S6__B connect all Q5__JB Q6__ B modules closer to the main base unit then connect QA1S6_ B modules Setting order of the stage numbers for extension base units Extension base units require the setting of the extension stage numbers 1 to 7 using the stage No setting connector Assign the extension stage numbers starting from 1 to 7 to the extension base units in the connected order starting from the one connected to the main base unit Cautions for assigning extension stage numbers to extension base units a Assign consecutive numbers to extension stages If you assign stage numbers to base units in Auto mode and assign some stage numbers to no modules 0 is assigned to the skipped stage as the number of slots Consequently the number of empty slots does not increase The skipped stage is also assigned with 0 of I O point b Itis impossible to set and use the same extension stage number with two or more extension base units c Yo
80. 0 0 0 0 0 0 0 D2 0 0 0 0 0 0 0 D100 15559 15559 15559 15559 15559 15559 15 D300 5458 5458 5458 5458 5458 5458 545 KENI Count 2048 Timefsec Step Program Device details are read under trigger conditions specified in the trigger point setting Sampling is performed for each scan Before the sampling is finished by a trigger operation of a peripheral device data is sampled twice because the sampling timing is the same as that of trigger conditions Trace result Bit device Contact Coil Display units o z 10 0 Data when trigger condition is met Count 2048 Time sec Step Program Word device Current value 16 bit bal Decimal z 2048 2047 2046 2045 2043 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15559 15559 15559 15559 15559 155 5458 5458 5458 5458 5458 545 v Count 2048 Time sec Program 7 FUNCTION MELSEC Q f The execution status of the sampling trace function is stored in the special relay SM800 SM802 SM804 and SM805 If an error occurs while the sampling trace function is used SM826 turns on By using special relays in a sequence program the execution status of the sampling trace function can be checked 1 After the trace data and trace conditions set using GX Developer are written to the High Performance model QCPU SM800 sampling trace ready turns on SM800 indicates whether the sampl
81. 1 See Chapter 16 for details on among High Performance model QCPU Motion CPU and PC CPU module 2 Refer to the Ethernet module s manual for details on accessing the High Performance model QCPU with the Ethernet module x3 Refer to the serial communication module s manual for details on accessing the High Performance model QCPU with the serial communication module 15 2 15 ALLOCATING MULTIPLE CPU SYSTEM I O NUMBERS MELSEC Q 15 2 Purpose of PC Parameter I O Allocations with GX Developer Sets up the High Performance model QCPU Motion CPU PC CPU module that are to control the multiple CPU system s I O modules and intelligent function modules a Q Series I O modules and intelligent function modules can be selected as control CPUs for each slot b AnS Series I O modules and intelligent function modules are set as control CPUs on the same CPU modules Q38B 234567 Power supply CPU module CPU module module CPU module Se ee Control CPU can be Q68B selected for each slot 101112131415 foe o gt Q Q gt wn D z e a module QA1S68B 16 17 18 19 20 21 22 23 Power supply module x QA1S68B 24 25 26 27 28 29 30 31 All of the same control CPU are selected Power supply module ae 15 3 15 3 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTE
82. 1 1 gt CH1 Maximum value 1 1 Be CH1 Minimum value 1 1 gt CH2 Maximum value 1 1 gt CH2 Minimum value 1 1 gt CH3 Maximum value 1 1 gt Make text file End setup Cancel The designated auto refresh setting data is stored in the intelligent function parameters of High Performance model QCPU For the details of GX Configurator refer to the manual of the intelligent function module being used 8 1 2 Communication using device initial value 1 Device initial value The device initial value is used to designate the initial setting of the intelligent function module without using a program The designated device initial value is written from High Performance model QCPU to the intelligent function module when High Performance model QCPU is turned ON is reset or is switched from STOP to RUN 2 Designation of the device initial value Using the device memory of GX Developer designate the data of the intelligent function module to be used as the device initial value In the device initial value setting of GX Developer designate the range to be used with the intelligent function module device as the device of the device initial value 1 For the device initial value see Section 10 13 2 2 For the intelligent function module device see Section 10 5 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 1 3 Communication using FROM TO instruction 1 FROM TO instruction At the execution
83. 10 34 10 3 3 Spe idl registers O D j a T a raa a aaa dened Aaaa aaan re Aa a paa aal aiaa Eaa aaia ind 10 35 10 4 Link Direct Devicas tdi Noa Jra 10 36 10 5 Intelligent Function Module Devices UC I GUS oo eeeeeeeseseeseseseseeseseseeeeseseseeeeseseaeeeseeseseateneesasaeenseseeaeateneenesatens 10 39 10 6 Index Registers Ziar dente ceniie eerie beeen anette ene O a eee 10 40 10 6 1 Switching between scan execution type programs and low speed execution type programs 10 41 10 6 2 Switching between scan low speed execution type programs and interrupt fixed SCAN EXECUTION type PFOQFAMS eeeceeeceeeeeeeeeeeeeeeeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeatenatenas 10 42 10 7 File Registers R esnea a dh aaah E ee ae aera ee eee 10 44 10 71 File register capacity s cessccstcnscce Raae A Er Tr RRF LR RA TAIP AERONA AAEE TIAA RARE seeks 10 45 10 7 2 Differences in memory card access method by memory Card type sssssssesesissississrssrsrrsrrsenses 10 45 10 7 3 Registering the file registers 0 0 ee eeceeceeeeeeeeeeeeeeeeeeeeeeeeeeeesaeeseeesaeesaeeseeeseeesaeeseeeseeeseeetenseeeeeeeeanes 10 46 10 7 4 File register designation method ssessessessesresrssnesuesnernsnnenusnnennsennnnnnnnnnsnnnnannnnnnnnnnnannnnnnnnnnannnnnne 10 50 10 7 5 Precautions in USING file registers orreri ea EEn aE EREE EE T aan i aE 10 51 10 8 Nesting N coretan E E A AA 10 53 10 9 Poimers Phas roiret aar EEEE E AE AAAA A A A AAS 10 54 109 T LoOCal
84. 165us 100 u s 4 Cautions on programming a If a device is turned ON in a fixed scan execution type program by a PLS instruction it is kept ON until the same type of the fixed scan execution type program is executed again Fixed scan execution Xo Xo type program execution PLS MO H PLS MO END 0 0 JENDENDo END O O END END 0O ON xy ON LY mMoQFF Switched OFF by PLS M0 instruction Switched ON by PLS M0 instruction at XO leading edge OFF to ON b During the execution of a fixed scan execution type program interruption is prohibited DI Therefore do not execute EI DI instructions during the programming of the fixed scan execution type program c During the programming of a fixed scan execution type program a timer cannot be used Because the timer updates the current values and turns ON OFF at the time of execution of OUT T instruction if the timer is used during the programming in the fixed scan execution type program the current values will be updated only when the fixed scan execution type program is executed and normal measurement will be disabled 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q The following commands cannot be used in the fixed scan execution type program e COM e ZCOM When a fixed scan execution type program is executed an interruption must be allowed by an El instruction in the initial executi
85. 2 2 PLC No 3 3 PLC No 4 4 Multiple PLC number Set by Corresponding Explanation ACPU R l When set Corresponding Following programmable controller CPU module RUN 1 is added each second e Count repeats from 0 to 32767 to 32768 to 0 Number of counts in 1 second units S Status 2n second clock e Stores value n of 2n second clock Default is 30 units Setting can be made between 1 and 32767 Stores value n of 2nms clock Default is 30 e Setting can be made between 1 and 32767 e Incremented by 1 for each scan execution after the CPU module is set to RUN gt x e Count repeats from 0 to 32767 to 32768 to 0 e Incremented by 1 for each scan execution after the CPU module Number of counts in is set to RUN Count repeats from 0 to 32767 to 32768 to 0 e Used only for low speed execution type programs Number of counts in each scan processing x Not counted by the scan in an initial execution type program App 35 APPENDICES MELSEC Q Special Register List 4 Scan information Set b orresponaing Correspondin Number Name Meaning Explanation When a ACPU mt 9 Do TT Execution Program No in Program number of program currently being executed is S Status SD500 New program No _ execution stored as BIN value change S Low speed Low speed execution e Program number of low speed excution type program No Every excution type type program No in currently being executed is stored as
86. 2048 points FO to 2047 Number Edge relay V Default 2048 points VO to 2047 When a standard RAM is used 32768 points RO to 32767 When a SRAM card is used The number of points of up to 1041408 points can be used by block conversion in increments of 32768 points RO to 32767 When a Flash card 2Mbyte is used The number of points of up to 1041408 points can be used by block conversion in increments of 32768 points RO to 32767 e When a Flash card 4Mbyte is used used read only is File register The number of points of up to 1042432 points can be used by block possible conversion in increments of 32768 points RO to 32767 When a standard RAM is used 32768 points ZRO to 32767 The ATA card cannot When a SRAM card is used be used 1041408 points ZRO to 1041407 No block conversion necessary When a Flash card 2Mbyte is used 1041408 points ZRO to 1041407 No block conversion necessary When a Flash card 4Mbyte is used 1042432 points ZRO to 1042431 No block conversion necessary When a Flash card is 3 PERFORMANCE SPECIFICATION MELSEC Q Performance Specifications continued Model pot i iil Link special relay SB 2048 points SBO to 7FF Link special register SW 2048 points SWO to 7FF Step relay S 6 8192 points SO to 8191 Index register Z 16 points Z0 to 15 4096 points PO to 4095 set parameter values to select usable range Pointer P ane of in file pointe
87. 27 28 29 30 31 45 46 47 48 49 50 51 52 300 320 340 360 380 3A0 3C0 3E0 a 5C0 5E0 600 620 640 660 680 System configuration 8 S S 31F 33F 35F 37F 39F 3BF 3DF SDF 5FF 61F 63F 65F 67F 69F Extension base unit Q68B 2 sion base unit QA1S68B Power supply module Power supply module 32 33 34 35 36 37 38 39 53 54 55 56 57 58 59 60 400 420 440 460 480 4a0 4Co 6A0 6CO 6E0 700 720 740 760 780 SESTSTSTSISIS S SISISTSTSTSTS S 41F 43F 45F 47F 49F 4BF 4DF 4FF 6BF 6DF 6FF 71F 73F 75F 77F 79F Extension base unit Q65B Extension base unit QA1S65B Anai Power supply module Power supply module stage K 40 41 42 43 44 g 61 62 63 500 520 540 560 580 7ZC0 7E0 SISISISTS A 51F 53F 55F 57F 59F ZDF Maximum NUMDEN OI Seven Extension Stages Extension Stages 9 Maximum number of I O modules to be 64 modules installed Maximum number of occupied O points 4096 Q33B Q35B Q38B Q312B Q52B Q55B Q63B Q65B Q68B Q612B QA1S65B QA1S68B QCO05B QC06B QC12B QC30B QC50B QC100B 1 Extension bases unit of up to seven stages can be used 2 Do not use extension cable longer than an overall extension length of 13 2m 43 31ft 3 When using an extension cable do not bind it together with the main circuit high voltage and heavy current line or do not lay down them closely to each other 4 When setting the No of the expansion stages set it in the ascending order so that the same No is not set
88. 4 Program memory 28 124 252 1 See Section 6 2 Memory card RAM See Section 6 5 Flash cara BC Se Section 6 5 fil Standard RAM Only one file register and one local device Standard ROM sae See Section 6 3 Standard ROM number of writings Max 100000 times Ee X1 124 is the maximum number of programs that can be executed on High Performance model QCPU 125 or more programs cannot be executed x2 The maximum number of sequence steps for one program for which the parameters are stored in another drive and executed with the High Performance model QCPU can be calculated with the following expression Program size File header size default 34 steps Refer to the High Performance model QCPU Q Mode User s Manual Function Explanation Program Fundamentals for details on the program size and file x3 The memory capacity of the Q12HCPU or Q25HCPU whose first five digits of serial No are 02091 or earlier is 64k bytes Refer to Section 2 3 for the serial No confirmation method 4 The CPU shared memory is not latched The CPU shared memory is cleared when the power is turned on to the PLC or when the CPU module is reset 5 The memory capacity of the QO2HCPU or QO6HCPU whose first five digits of serial No are 04011 or earlier is 64k bytes Refer to Section 2 3 for the serial No confirmation method 3 PERFORMANCE SPECIFICATION MELSEC Q Performance Specifications continued po Mod de
89. 4 8 Timing chart showing response of Output Y when Input X turns ON 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 7 2 Direct mode 1 Definition of direct mode In the direct mode the communication with the I O modules is performed when executing sequence program instructions With High Performance model QCPU direct mode I O processing can be performed by using direct access inputs DX and direct access outputs DY For details on direct I O see Section 10 2 1 and 10 2 2 respectively High Performance model QCPU Remote input Network refresh area CPU operation processing area 3 eee 2 GX Developer 1 Input Input X M input area module device i Output fg Y20 i DY 25 module e When an input contact instruction has been executed The input module s input information 1 is ORed with GX Developer input area s input information 2 or remote input refresh area data and the result is stored into the input X device memory Then this data is then used as input information 3 at sequence program execution e When an output contact instruction has been executed Output information 4 is read from the output Y device memory and a sequence program is executed e When an output OUT instruction has been executed The sequence program s operation result 5 is output to the output module and is stored in the output Y device memory
90. 5 Memory Card iscscita dace dacie diadnnanile dadannannddandadainnnainiidandahadadaddaaiaanda atau 6 11 6 6 Writing Data to the Standard ROM or the Flash Card ceccesesessesesesessseessseeassneassneassneassneaseneassneaseneassneasaes 6 13 6 6 1 Writing Data to the standard ROM or to the Flash card using GX Developer ceeeeee 6 13 6 6 2 Automatic write to standard ROM Auto Download all Data from Memory card to standard ROM c csccceeeceeteeeeeeeeeeeeeeeteeeeatens 6 15 6 7 Executing Standard ROM Memory Card Programs Boot RUMIN scsesseseseseseseseeeeeeseseeeeeeeeeeteteeeseaeeneetens 6 18 6 8 Program File COnfiQuration cccccsecesesseseseseseeseseseseeseseseeeeseseaeceessscseseeeaeaeaeeneaescaeeeeeescaeaeeneeasaeeneesesaseteeeeeesaeentens 6 21 6 9 GX Developer File Operation and File Handling Precautions cccecesssssesssesessessesseesesesseseseeeesseeeseseesseeees 6 23 G91 FIG operaia sa acces ra EE AE eS aye peed ae eae EERE E eat lucas ade led ETEA ENERE REESEN 6 23 6 9 2 File panding precautions sis cscs secs vees ede chechied canes fap shachieda acai ode sbashachasnen Gp staghaedaadeh R 6 24 6 9 3 File Capacity iivcisiea Ohi O tei ine aide ie ead 6 25 6 9 4 Memory Capacity for files 2 ee eeceeeeeeeeeeeeeeeeeeeeseeeeeeseeeeaeeseeesaeesaeeseaesaeeseeesaeesaeeseeeseeeseeseaeseeeeeeeeaaes 6 26 PACPUNCTON EIS no eueceb ae E ia ell ely 7 1 Pees SOMIS LAIN CAI Masa na a ate ecteat viarueet
91. 7 9 Print Date _ Manual Number Jul 2003 SH NA 080038 F Correction SAFETY PRECAUTIONS Section 2 1 Section 6 2 6 7 Section 10 2 11 Section 13 1 13 3 Section 14 1 Chapters 16 Section 16 3 2 Appendix 2 Addition Appendix 5 5 1 5 2 Japanese Manual Version SH 080020 J This manual confers no industrial property rights or any rights of any other kind nor does it confer any patent licenses Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property ights which may occur as a result of using the contents noted in this manual 1999 MITSUBISHI ELECTRIC CORPORATION INTRODUCTION Thank you for choosing the Mitsubishi MELSEC Q Series of General Purpose Programmable Controllers Please read this manual carefully so that equipment is used to its optimum CONTENTS SAFETY INSTRUC TRONS uriene a eii ei i ie aE TE iT REES e EE E EA A A 1 REVIRIONG or a heels Mashsiteachailvies ae andi denedet en innn eal A 6 CONTENTS scence cere teae ented eh dete hate ai tte dah eed ah tt dah eee ah el ae eee al ttt E A 8 LYFE Tn UY ope rece er Pe ree Orpen er ee a E rere ere pererr creer rere ererereer rer ay eears A 19 how toUse This Manualin ete ot ie Aer ee ee ada a ede ee ae A 20 Generic Terms and AbDbreviations ccccccccscscssecssesssssssesesesesesesescseseseacscscseseacacacecacacaeacaeaeacaeaeassnsassseeeseseeeseseeeeeeeeneees A 21 1 OVE
92. 812 11 83 239 e mail office geva at e mail powel utu lt e mail as avtsev spb ru TEHNIKON BELARUS INTEHSIS SRL MOLDOVA CONSYS RUSSIA Oktjabrskaya 16 5 Ap 704 Cuza Voda 36 1 81 Promyshlennaya St 42 BY 220030 Minsk MD 2061 Chisinau RU 198099 St Petersburg Phone 375 0 17 22 75 704 Phone 373 0 2 562 263 Phone 7 812 325 36 53 Fax 375 0 17 22 76 669 Fax 373 0 2 562 263 Fax 7 812 147 20 55 e mail tehnikon belsonet net e mail intehsis mdl net e mail consys consys spb ru Getronics b v BELGIUM Getronics b v NETHERLANDS Electrotechnical RUSSIA Control Systems Pontbeeklaan 43 B 1731 Asse Zellik Phone 32 0 2 467 17 51 Fax 32 0 2 467 17 45 e mail infoautomation getronics com Control Systems Donauweg 2 B NL 1043 AJ Amsterdam Phone 31 0 20 587 67 00 Fax 31 0 20 587 68 39 e mail info gia getronics com Systems Siberia Partizanskaya St 27 Office 306 RU 121355 Moscow Phone 7 095 416 4321 Fax 7 095 416 4321 e mail info eltechsystems ru TELECON CO BULGARIA Beijer Electronics AS NORWAY 4 A Ljapchev Blvd Teglverksveien 1 BG 1756 Sofia N 3002 Drammen Phone 359 0 2 97 44 05 8 Phone 47 0 32 24 30 00 Fax 359 0 2 97 4406 1 Fax 47 0 32 84 85 77 e mail e mail info beijer no INEA CR d o o CROATIA MPL Technology Sp zo o POLAND Drvinje 63 ul Sliczna 36 HR 10000 Zagreb Phone 385 0 1 36 67 140 Fax 385 0 1 36 67 140 e ma
93. A caaat stati ate nha a stata net ats tet tet eat ete 7 2 MS CAUCHIRUNCUONS Arro aa a etalk sls 7 5 A 9 A 9 7 4 Setting the Output Y Status when Changing from to STOP Status to from RUN Status c eee 7 7 RICOK FUNCION eer rte pepee ereeere ere reper terete er rece cpr ey cree cect rire reer rey errr err rere re rr errr a tert eer erty a 7 9 Fi ROMO Ope ANO aa a a a a a a a a a a a a a a a aad aa aiarad iaeei 7 12 7 6A Remote RUN STOP nin iroa ti na aaa anaa a a aa aao aaa aaa adai aiaa dace 7 12 16 2 Remote PAUSE niinn aaa eee ele neo eee ae 7 15 76 3 Remote RESE Taierea naaa aAa ARAETA Naaa NaRa ARIETA AINEA SAEN aTM anata daea TI RNE 7 17 7 6 4 Remote latch clear canona narii aiii a reiii i i i 7 19 7 6 5 Relationship of the remote operation and High Performance model QCPU RUN STOP switch 7 20 7 7 Selecting the Input Response Time of the Q Series Module I O Response Time csecieseeeseeeeeees 7 21 7 7 1 Selecting the response time of the input module eeeecceeeceeeeeeeceeeeeeeeeeaeceeeeeeeaesaeseeteesaeeneeeaeeaas 7 21 7 7 2 Selecting the response time of the high speed input MOCUIE ecceeeeeeeeeteeeeeeeeeeeeeeeeseeeeteaees 7 22 7 7 3 Selecting the response time of the interrupt module ccecceeeeeceeeeeeee cee eeeeeeeeaeeeeeeeeeaetaeeeeeeteaees 7 23 7 8 Error time Output Mode Setting ceecccccsecssesseseseseseeseseseeeeseseeeeescseseeseseaeaeeneaeaeaeeeeeeseaeaeeneasasaeeneeeesee
94. Area after P1 in the processing gt program is written during RUN XO X2 PO 30 Serial a communication module X3 X4 X3 X4 P1H SET M10 P1 X5 H 1 CSET M10 p END END H J Personal computer A Personal computer B C DJ GX Developer GX Developer 3 Precautions Precautions on write during RUN is the same as precautions on write during RUN in the circuit mode in Section 7 12 1 For further information see Section 7 12 1 7 FUNCTION MELSEC Q 7 16 Watch dog Timer WDT 1 What is Watch dog Timer WDT a b c The watch dog timer is an internal sequence timer to detect High Performance model QCPU hardware and sequence program error When the watch dog timer expires a watch dog timer error occurs The High Performance model QCPU responds to the watch dog timer error as follows 1 The High Performance model QCPU turns off all outputs 2 The front mounted RUN LED turned off and the ERR LED starts flicking 3 SM1 turns ON and the error code 5001 WDT ERROR is stored in SDO The default value of the watch dog timer is 200 ms The setting range is 10 to 2000 ms in 10ms units 2 Watch dog Timer Setting and Reset a b The watch dog timer setting can be changed at the PLC RAS tab screen in the PLC Parameter dialog box High Performance model QCPU resets the watch dog timer during the END processing
95. BIN value END program No _ execution e Enabled only when SM510 is ON processing S Ever Current scan time Stores current scan time in 1 ms units Mate y D9017 format in 1 ms units Range from 0 to 65535 change processing Stores current scan time in 100 us units Range from 00000 to 900 Current scan time Example in 100 us units A current scan of 23 6 ms would be stored as follows D520 23 D521 600 Initial scan time e Stores the scan time of an initial execution type program into in 1 ms units D522 and SD523 Measurement is made in 100us units S First SD522 Stores the ms place Storage range 0 to 65535 END SD523 Stores the us place Storage range 0 to 900 processing Current scan time S Every END processing Initial scan time Initial scan time in 100 us units S Every END D9018 format Minimum scan time Stores the minimum value of the scan time except that of an in 1 ms units initial i i D524 D525 change halnipnwersban initial execution type program into SD524 and SD525 processing g time Measurement is made in 100 us units S Ever Minimum scan time SD524 Stores the ms place Storage range 0 to 65535 END y New in 100 us units SD525 Stores the us place Storage range 0 to 900 processing Maximum scan time Stores the maximum value of the scan time except that of in 1 ms units an initial execution type program into SD526 and SD527 S Every change Meas
96. Because link special relays are switched ON and OFF in accordance with various problems which may occur during a data link they serve as a tool for identifying data link problems 2 Number of link special relay points There are a total of 2048 link special relay points between SBO and SB7FF Link special relays are assigned at a rate of 512 points per each intelligent function module such as the MELSECNET H Network Module Link special relays are assigned as shown below SBO For 1st network module SB1FF SB200 S For 2nd network module SB3FF SB400 5 For 3rd network module SB5FF SB600 5 For 4th network module SB7FF 512 points 7512 points 512 points 512 points 2048 points For details on link special relays used at the QCPU refer to the QCPU Q mode QnACPU Programming Manual Common Instructions 10 2 9 Step relays S 10 18 A step relay is an SFC program device For details regarding procedures for using step relays refer to the QCPU Q mode QnACPU Programming Manual SFC Because the step relay is a device exclusively for the SFC program it cannot be used as an internal relay in the sequence program If used in this manner a SFC error will occur and system operation will be stopped system down 10 18 10 EXPLANTION OF DEVICES MELSEC Q 10 2 10 Timers T 10 19 Timers are of up timing with the time measurement beginning when the coil s
97. CPU Parameter Check End Cancel_ a A MULTIPLE CPU DOWN error code 7000 error occurs for the CPU modules and the multiple CPU system will be halted when a stop error is occurs in CPU modules for which the All station stop by stop error of CPU n has been set See POINT on the next page for details b A MULTIPLE CPU ERROR error code 7010 error occurs for all other CPUs but operations will continue when a stop error occurs in CPU modules for which the All station stop by stop error of CPU n has not been set 14 19 14 19 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM 14 20 MELSEC Q POINT A MULTIPLE CPU DOWN stop error will be occur for the CPU on which the error was detected when a stop error occurs There are cases where the timing of error detection will search for the CPU on which the stop error that has caused the MULTIPLE CPU DOWN error occurs not the first CPU on which a stop error occurs and the entire system will assume the MULTIPLE CPU DOWN status For example if a stop error occurs in the CPU No 2 and the CPU No 3 is halted as a direct consequence of this there are cases where the CPU No 1 will be halted because of the stop error on CPU No 3 depending on the timing of error detection Halted with an OPERATION ERROR Power supply module CPU module No 1 CPU module No 2 CPU module No 3 Halted with stop error detection on CPU No 2 becomes MULTIPLE CPU DOWN T
98. CPU modules have been reset there are cases where errors other than the MULTIPLE CPU DOWN error will halt the other CPUs A MULTIPLE CPU DOWN error code 7000 error will occur regardless of the operation mode set at the Multiple CPU settings screen within the PLC Parameter dialog box stop continue all other CPUs on the CPU modules for CPU No 2 to No 4 error when the CPU modules for CPU No 2 to No 4 are reset See Section 14 2 8 for details on the multiple CPU setting operation modes 14 18 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 8 Processing when High Performance model QCPU stop errors occur The operations for the entire system will differ when a CPU No 1 stop error occurs and when any of CPU No 2 to No 4 stop error occurs in the multiple CPU system 1 When a stop error occurs at the CPU No 1 a A MULTIPLE CPU DOWN error code 7000 error occurs for the CPU modules for CPU No 2 to No 4 and motion CPUS and the multiple CPU system will be halted when a stop error occurs at the CPU No 1 See point on the next page for details b Observe the following procedures to restore the system 1 Confirm the cause of the CPU No 1 error with the PC diagnosis function 2 Remove the cause of the error 3 Either reset the CPU No 1 or restart the power to the CPU All CPUs on the entire multiple CPU system will be reset and the system restored when the CPU No 1 is reset or the power to the CPU is
99. D522 SD523 Initial scan time e S D524 SD525 Minimum scan time e SD526 SD527 Maximum scan time e S D528 SD529 Current scan time for low speed e S D532 SD533 Minimum scan time for low speed e SD534 SD535 Maximum scan time for low speed e SD540 SD541 END processing time e S D542 SD543 Constant scan wait time e SD544 SD545 Cumulative execution time for low speed execution type programs e SD546 SD547 Execution time for low speed execution type programs e SD548 SD549 Scan program execution time e SD551 SD552 Service interval time 2 GX Developer monitor values e Execution time measurement e Scan time measurement e Constant scan 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 4 2 Program Execute Type MELSEC Q Programs executed by High Performance model QCPU can be stored in the High Performance model QCPU s program memory standard ROM or memory card Programs can be stored in the standard ROM or memory card as a single program but also as multiple programs by splitting them into separate programs for each control function This permits the programming procedure to be split up among several program designers who can design separate programs for each operation and can store them in the standard ROM or memory card When multiple programs are executed by High Performance model QCPU program name file name and execute type settings of the programs must be designated Control by o
100. Device Progr SFC 1 0 assignment r File register Initial Device value a O Matused Not used m Use the same file name as the program Use the same file name as the program b Corresponding Memory card RAM v Corresponding x memory memory J C 4 Use the folowing fie Corresponding X memory File name File name C Use the following file Corresponding x memory F Capacity K points 1K 1018K points _ p Comment file used in a command m File for local device Notused Not used C Use the same file name as the program Use the following file Corresponding Corresponding Ej memory memory Use the following file Corresponding File name memory File name Acknowledge XY assignment Multiple CPU setting Default Check End Cancel a When selecting Not used This setting should be selected for the following cases e When not using the file registers e When designating the file registers to be used in the sequence program The QDRSET instruction is used to designate which file registers are to be used b When selecting Use the same file name as the program 1 This setting should be selected when the file registers having the same file name as the sequence program are to be used 2 Ifthe program is changed the file registers are automatically changed to conform to the new program name There are also cases where it is
101. EWE H e T current value ST current value C current value D SD W SW R Z ZR eU G J W J SW 7 FUNCTION MELSEC Q b Setting the Trace Condition Set the trace condition at the Conditions tab screen in the Sampling trace dialog box The trace condition setting can set to No of traces Trace point setup Trigger point setup and Additional trace information Sampling trace Execute and status Trace data Conditions Close No of traces Additional trace information Read file No of times 2072 T Times T Time After trigger i T Step no Write file number of times fiazs Times I Program name 3 Delete file Trace point setup Each scan Y ms Device Current value Condition Read from PLC a 2 Write to PLC c Te Trace result EEEE H r hh Trigger point setup At the time of trigger operation Current value Condition le ce foc I i 1 No of traces a The No of times sets the number of times to execute the sampling trace from trace execution to trace complete b The After trigger number of times sets the number of times to executes the sampling trace from trigger execution to trace complete Trace start Trigger point m Trace complete Pee l After trigger number of traces No of times Number of total times c The setting range for each number of times is shown below After trigger number
102. EXECUTION CONDITIONS MELSEC Q 2 Response lag An output module lags max 2 scans behind an input module See Fig 4 8 Ladder examples X5 55 A pae vse Ladder that turns the Y5E output ON when an X5 input turns ON When Y5E turns ON fastest Input refresh Input refresh Output refresh 0 END 056 END 0 ON External contact ON OFF X5 l QCPU ON devices OFF Y5E ON FF External load Lag time Minimum 1 scan Y5E output turns on fastest if the external contact is turned ON immediately before the refresh operation Then X5 turns ON at the input refresh Y5E turns ON at step 56 and the external load turns ON at the output refresh following execution of the END instruction In this case the time lag between the external contact ON and the external load ON is 1 scan When Y5E turns ON slowest Input refresh Input refresh Output refresh 0 END o56 END 0 j Ha Ha ON i i i OF sm of External contact ON i OFF x5 i QCPU ON devices OFF Y5E ON OFF External load i Lag time J Maximum 2 scan Y5E turns on slowest if the external contact is turned ON immediately after the refresh operation Then X5 turns ON at the input refresh Y5E turns ON at step 56 and the external load turns ON at the output refresh following execution of the END instruction In this case the time lag between the external contact ON and the external load ON is 2 scan Fig
103. For 3 slot base unit 3 slots are occupied Q33B type main base unit 01 2 4 Power supply CPU module Ly Five slots are not occupied Q63B type extension base unit 345 Power supply Ly Five slots are not occupied Q63B type extension base unit 678 Power supply L Five slots are not occupied b For 5 slot base unit 5 slots are occupied Q35B type main base unit 012 3 4 gt PPE PON te BE Bond 3 8 KONI 2 E I I I oO I I I ziz TS H 815 oe ere Pepe eee _ _Y L gt Three slots are not occupied Q65B type extension base unit 56789 Power supply Ly Three slots are not occupied Q65B type extension base unit 10 11 12 13 14 a a gt N pas o z e a Ly Three slots are not occupied 5 ASSIGNMENT OF I O NUMBERS MELSEC Q c For 8 slot base unit 8 slots are occupied Q38B type main base unit 0123 45 67 Q68B type extension base unit 8 9 10 11 12 13 14 15 d For 12 slot base unit 12 slots are occupied Power supply CPU module Power supply Q312B type main base unit 0123 45 67 8 9 10 11 Q Qa gt n a o z e a CPU module Q612B type extension base unit 12 13 14 15 16 17 18 19 20 21 22 23 Power supply 5 ASSIGNMENT OF I O
104. H3110 e Stores the Minute and second in BCD bi5 to b1i2b11_ to b8 b7 to b4 b3 lll ae Minute Stores the day of the week in BCD Example 35 minutes 48 seconds Second H3548 to bi2b11 to b8b7 to b4 b3 ro Sunday e Saturday Example Friday H0005 0 must be set E ion fil he block No of th ion fil i D9035 SD1035 SD648 xtension ile Use block No Stores t e bloc o of the extension file register register being used in BCD code Extension file registerfor designation of device number D9036 SD1036 X D9037 SD1037 ba D9038 D1038 SD207 D9039 SD1039 SD208 App 47 LED display priority ranking Device number when individual devices from extension file register are directly accessed Priorities 1 to 4 Priorities 5 to 7 Designate the device number for the extension file register for direct read and write in 2 words at SD1036 and SD1037 in BIN data Use consecutive numbers beginning with RO of block No 1 to designate device numbers Exetension file register oin e ea to 16383 16384 to Block No 1 area Block No 2 area D1037 SD1036 Device No BIN data Sets priority of ERROR LEDs which illuminate or flicker to indicate errors with error code numbers Configuration of the priority setting areas is as shown below b15 to b12b11 to Priority 4 Priority 3 b8b7__ to Priority 2 b4 b3 to Priority 1 bO SD207
105. If ameasurement range is specified between the FOR instruction and the NEXT instruction scan time will show the execution time of making a measurement in the measurement range between specified steps 7 48 7 FUNCTION MELSEC Q 7 14 Sampling Trace Function 1 The SRAM card Q2MEM 1MBS Q2MEM 2MBS is required to store the trace data and trace results After mounting the SRAM card to the High Performance model QCPU execute sampling trace 2 Sampling trace is not executed if the Flash card Q2MEM 2MBF Q2MEM 4MBF or ATA card Q2MEM 8MBA Q2MEM 16MBA Q2MEM 32MBA is installed because the cards cannot store the trace data and trace results 1 What is Sampling Trace Function a This function samples the device continuously on the High Performance model QCPU at specified timings b The changed contents of the device that program uses during debugging can be checked at the specified timing The sampling trace function reads device contents if trigger conditions are satisfied c The sampling trace samples the contents of the specified device at a set interval sampling cycle and stores the trace results at the sampling trace file in the memory card d The sampling trace file stores the trace condition data and trace execution data necessary to perform the sampling trace When trace is started by using GX Developer the trace is performed as many times as specified The sampling trace area is 60 kbyte The number
106. Input refreshed ___X0 input ON gt gt External aio input Input enforced ON OFF operations X0 device enforced OFF X0 ON ae Sequence execution Mo Ss amp lt q vio gt External input X0 Y11 2 forcibly set at OFF Y10 M1 gt Set at ON on the rudder even during enforced OFF external output set at OFF END 1 Explanation of specifications a Enforced ON OFF can be performed regardless of the High Performance model QCPU s RUN STOP status However enforced ON OFF is only allowed for input during stop errors The output is only performed to device Y b Devices can be registered within the ranges input X0 to X1FFF output YO to Y1FFF 7 FUNCTION MELSEC Q c The input and output eligible for enforced ON OFF are shown below 1 Input X and output Y for modules mounted on the base unit 2 VO X Y of High Performance model QCPU or I O LX LY of MELSECNET H modules to be refreshed High Performance model QCPU 3 I O X Y of High Performance model QCPU or I O RX RY of CC Link to be refreshed High Performance model QCPU When enforced ON OFF registration is performed for devices outside the above refresh ranges ex empty slots only the High Performance model QCPU device memory is set at ON OFF and this is not output externally d Canceling ON OFF registration information 1 ON OFF registration information can b
107. Installation Removal of a memory card Installation removal of a memory card requires additional processing time Ifa memory card is installed or removed add 1 scan time to the total processing time Processing Time Inserted Removed 8 File register File register requires additional processing time Add the processing time of file registers to the total processing time Processing Time Q02CPU Standard RAM Q02HCPU QO6HCPU Q12HCPU Q25HCPU SRAM Card Q02CPU 0 94 0 2Xn ms QO2HCPU QO6HCPU Q12HCPU Q25HCPU 0 40 0 1xn ms Conditions n number of program files 11 3 Factors Responsible for Shortened Scan Time The length of scan time can be shorted by making changes to the PLC Parameter setting as follows e A series CPU compatibility Arithmetic operation of floating point 1 A series CPU compatibility When Use special relay special register after SM1000 SD1000 is set in the PLC system settings of the PLC parameter the scan time can be reduced by the value in the following table by setting to Do not use special relay special register after SM1000 SD1000 In this case the A series compatible special relays special registers SM1000 SD1000 to SM1299 SD1999 must be replaced with the Q series dedicated special relays special registers SM0 SDO to SM999 SD999 CPU Type QO2CPU 0 07 ms QO2HCPU QO6HCPU Q12HCPU Q25HCPU 2 Arithmetic operation of floating points By default the Perform internal ari
108. L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 SD1253 SD1253 L32 L31 L30 L29 L28 L27 L26 L25 L24 L23 L22 L21 L20 L19 L18 L17 SD1254 L48 L47 L46 L45 L44 L43 L42 L41 L40 L39 L38 L37 L36 L35 L34 L33 j SD1255 L64 L63 L62 L61 L60 L59 L58 L57 L56 L55 L54 L53 L52 L51 L50 L49 SD1254 The bit corresponding to the station number which is in error becomes 1 i Example When local station 12 is in error b11 of SD1252 SD1255 becomes 1 and when SD1252 is monitored its value is 2048 800k 11 Fuse blown module Corresponding Number Name Meaning Explanation ACPU Corresponding CPU p9 TT D1300 The numbers of output modules whose fuses have blown are D9100 D1301 input as a bit pattern in units of 16 points D9101 D1302 If the module numbers are set by parameter the parameter set D9102 D1303 Bit pattern in units numbers are stored D9103 D1304 of 16 points Also detects blown fuse condition at remote station output D9104 indicating ne TOMS Doros D1305 indicating the b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 bO D9103 D1306 _ Fuse blown modules whose 1 1 D9106 0 0 O Rem S Error D1307 module fuses have blown 5P1300 C ao D9107 D1308 0 No blown fuse D1301 v 0 0 Jot Oro 1 Blown fuse AAA AN present SD1331 O Joe 0 1 8 oO New to New m Indicates a blown fuse Not cleared even if th
109. Multiple CPU System aia u hasanatan ae eiiean nieee iaee adine eabar a iaaeaie aa ie 13 3 13 3 Differences with Single CPU System cecsesecesessesesesesesesesesseseseeteseseseseeseacaeaeeeaeaeaeeteasseaseneacateneesasateneaeaees 13 5 TAT System CONNGUIATION n esen te tended elated halal ath OA at chet del eared 14 1 14 2 Precautions For Multiple CPU System Configuration c cscccesecsesseeseseseeseseeeseeseseeacaeeeeeeseaeeteeessseaeeneeesees 14 5 14 2 1 Function versions of High Performance model QCPU motion CPUs and PC CPU module that can be used and their mounting POSItiONS ecceseeeeeeeeeteeteeeeeeeeees 14 5 14 2 2 Precautions when using Q series corresponding I O modules and intelligent function MOCUICS 4 ii hay tier eae tlie en eh Aa aie A ee en el Bee ee i ee 14 9 14 2 3 Limitations when mounting AnS series corresponding I O modules and special function atolo OI EE P ooo a dari tess fh shea cet tase 0s cna tsee sees eate sasaz sas outa acs E A A tarsaneg aah 14 10 14 2 4 Modules that have mounting reStriCtiONS 00 ee eee eeeeeeeeeeeeeeeeeeeeteeeeeeeseeseeseeseeeseeeteeeseeetenteaes 14 12 14 2 5 Compatible GX Developers and GX Configurators ccccccceceeceeteeeeeeeeeeeaeeeeeeeeeaeeaeseeeeeeeeaee 14 13 14 2 6 Parameters that enable the use of multiple CPU SySteM ecceeceeceeeeeeeeeeeeeeeeeeeeeteeeeeeeaeeaes 14 14 14 2 7 Resetting the multiple CPU SYSteM ceccesccecceeeseeeeceeceeeeeeea
110. No 3 and CPU No 4 is 0 16 3 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM 16 4 Change screens Setting 1 MELSEC Q 4 The CPU shared memory occupied with automatic refresh refreshing becomes the total of setting 1 to setting 4 The first and last addresses of the CPU shared memory being used will be displayed in hexadecimals when the number of transmission points are set The CPU for which the transmission points have been set in setting 1 and setting 2 will become the last address of the setting 2 CPU shared memory Up until 811H is used for CPU No 1 and CPU No 2 and up until 821H is used for the CPU No 4 in the illustration shown below The CPUs that transmits only setting 1 will become the last address of the setting 1 CPU shared memory CPU No 3 is up to the setting 1 address in the illustration shown below Refresh settings Change screens Setting 1 PLC share memory G Dev starting Bol CPU No 1 transmission range Send range for each PLC PLC side device FUG Poit Stat End Stat End 0800 0800F wO WOF 0800 080F ms o 8 BSF Last CPU device Not 32 osoo b UR tL Last address of each CPU share memory CPU shared memory 5 The same number of transmission points must be set for all CPUs on the multiple CPU system A PARAMETER ERROR occurs if the number of transmission points for one CPU is different CPU devices The following devices can be use
111. RESET cannot be performed when the High Performance model QCPU is in RUN status c After the reset operation is complete the High Performance model QCPU will enter operation status set at the RUN STOP switch 1 With the RUN STOP switch in the STOP position the High Performance model QCPU enters into the STOP status 2 With the RUN STOP switch in the RUN position the High Performance model QCPU enters into the RUN status d Take care that Remote RESET does not reset High Performance model QCPU if an error occurs in the High Performance model QCPU due to noise If Remote RESET does not reset use the RESET L CLR switch to reset or turn the PLC off 1 If Remote RESET is executed when the High Performance model QCPU is stopped due to an error the High Performance model QCPU enters the operation status set at the RUN STOP switch after it is reset 2 Even if Remote reset is set as Allow at the PLC system tab screen in the PLC Parameter dialog box the remote process of the GX Developer is completed However the High Performance model QCPU is not reset since the reset process is not performed in it If the status of the High Performance model QCPU does not change though a reset process is performed from GX Developer check if the Remote reset is set as Allow at the PLC System tab screen in the PLC Parameter dialog box 7 FUNCTION MELSEC Q 7 6 4 Remote latch clear 1 What is Remote L
112. SD16 Parameter No 6 SD16 No SD16 Parameter No 6 SD17 SD17 SD17 Error code for intelligent SD18 SD18 function module SD26 SD19 SD19 SD18 SD20 SD20 SD19 SD21 SD21 SD20 5D22 Vacant 5D22 Vacant Spat SD23 SD23 SD22 Vacant D24 D24 SD23 SD25 SD25 SD24 D26 D26 D25 SD26 x6 For details of the parameter numbers refer to the user s manual of the CPU module used App 26 App 26 APPENDICES MELSEC Q Special Register List Continued Corresponding Set b Correspondin Number Name Meaning Explanation ies a ACPU ay paT Error number that ri rror number th rforms error r SD50 Error reset oerforms error reset 5t0 eS error number that performs error reset pu w SARM All corresponding bits go 1 ON when battery voltage drops Subsequently these remain 1 ON even after battery voltage has been returned to normal b4 b3 b2 bi b0 5 CPU error Bit pattern Memory card A alarm Battery low _ indicating where Memory card A error battery voltage drop gt Memory card B alarm occurred Memory card B error The alarm data can be held within the specified time when batter low occurs The error indicates the complete discharge of the battery When the QCPU is used the memory card B is standard and therefore the corresponding bits always remain OFF Bit pattern e Same configuration as SD51 above indicating where e Turns to 0 OFF when the battery voltage returns to normal SD52 Battery low th
113. SD208 For details refer to the applicable CPUs User s Manual and the ACPU Programming manual Fundamentals Priority 7 Priority 6 Priority 5 App 47 APPENDICES MELSEC Q Special Register List Continued ACPU Special Conversion Special Register after Conversion Special Register for Modification For sampling trace D9044 SD1044 D9049 SD1049 D9050 SD1050 D9051 SD1051 D9052 SD1052 Work area for SFC SFC program error number Error transition D9053 SD1053 D9054 SD1054 D9055 SD1055 D9060 SD1060 D9072 SD1072 D9081 SD1081 App 48 Error sequence step Status latch Software version PLC communications check Number of empty blocks in communications request registrtion area ML Ke lt lt Error block Meaning Step or time during sampling trace Block number of extension file register Error code generated by SFC program Block number where error occurred Step number where error occurred Transition condition number where error occurred Sequence step number where error occurred Status latch step Software version of internal software Computer link data check Number of empty blocks in communications request registration area Corresponding Detail etails CPU Turned on off with a peripheral device At scanning At time Time 10 msec unit Stores the value in BIN code Stores the block number of the ex
114. Slot Default dud pea 12 Slot Default Ext Base5 F Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel a Slot Displays the slot No and the ordinal position of the slot in the base unit If the base unit is not designated in Detail mode the stage number of the base unit is shown as and the ordinal number of a slot is counted from slot 0 of the main base unit b Type For High Performance model QCPU Select the type of module being mounted from the followings Empty Empty slot e Input Input module e Hi Input Q Series high speed module 1 e Output Output module e I O Mix I O mixed module e Intelligent Intelligent function module or AnS corresponding special function module e Interrupt Q Series interruption module 2 If the type is not designated the type of the actually mounted module is used 1 Hi input can be set using GX Developer Version 5 products after SW5D5C GPPW E 2 Interrupt can be set using GX Developer Version 6 products after SW6D5C GPPW E 5 13 5 13 5 ASSIGNMENT OF I O NUMBERS MELSEC Q Model name Designate the model name of the mounted module with 16 or less characters High Performance model QCPU does not use the designated model name It is used as a user s memo Points Used with High Performance mo
115. Using local devices when executing an interrupt fixed scan execution type program It is possible to use local devices in the file where an interrupt fixed scan execution type program is stored when executing an interrupt fixed scan execution type program The local devices can be set available unavailable by special relay SM777 ON OFF setting 1 Switching over local devices by setting ON OFF for a special relay SM777 pe Executes operation with the local devices in the file which was OFF executed before the execution of the interrupt fixed scan execution type program ON Executes operation with the local devices in the file where the interrupt fixed scan execution type program is stored Operation at SM777 OFF File name DEF File name ABC Standby program XO DECPL D1 0 HH Occurrence X2 on Need e eee ond i of interrupt __NGP DO Execution of the i Interrupt i interrupt program 1 1 program _ _ IRET END pe Read write of the Local devices used by local devices Local devices used by the file name ABC the file name DEF Operation at SM777 ON File name DEF File name ABC Standby program X0 DECP D1 0 HE Occurrence 7 poe ape a of interrupt ped Execution of the i INCP DO be tes ORGe RATT
116. a suspension error status Switch off the power supply to the PLC Remove the memory card and then set the parameter valid drive to the standard ROM with the CPU s dip switches as follows e Standard ROM SW2 ON SW3 ON The parameters and programs will be booted from the standard ROM to the program memory to enable actual operations when the PLC is switched on 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 2 Precautions This section indicates the precautions for performing Automatic write to standard ROM a If the file to be booted from the memory card shares the same name as a file in the program memory the memory card data will be overwritten Also if the file to be booted from the memory card does not share the same name as a file in the program memory it will be added to the program memory The FILE SET ERROR Error code 2401 will occur at this time if the capacity of the program memory is exceeded It is possible to select whether to perform the boot after the program memory has been cleared or perform the boot without clearing the program memory when booting from the memory card to the program memory Performing the boot after the program memory has been cleared when Automatic write to standard ROM prevents the program memory from overflowing during the boot c The Auto Download all Data from Memory card to Standard ROM setting at the Boot file tab screen is valid
117. and the user s free area An area consisting of the number of automatic refresh points from 800H is used as the automatic refresh area when the automatic refresh of device data is set up The beginning of the user s free area starts from the address immediately after the end of the automatic refresh area 800H to 811H becomes the automatic refresh area if the number of automatic refresh points is 18 11H points and the area after 812H becomes the user s free area The configuration of the CPU shared memory and the necessity of accessing sequence programs are shown in the illustration below Host CPU Other CPUs CPU shared memory Writing Reading Writing Reading Ou to Ost Uoperation Disable Disable Disable Enable information area 1FFH 200H to System area Disable Disable Disable Disable 7FFH 8001 i Automatic refresh area Disable Disable Disable Disable to User s free area Enable Disable Disable Enable FFF p x1 Use the S TO instruction to write the free user area of the host CPU from the High Performance model QCPU The Motion CPU is not provided with a S TO instruction so that it cannot write in the free user area of the host CPU For the writing method from the PC CPU module to the free user area of the host PLC refer to the manual of the PC CPU module 2 To read from the High Performance model QCPU use the FROM instruction or intelligent function module device UL GL
118. are not satisfied The restrictions are roughly classified into the following four different items 1 Items that are all disabled when high speed interrupt setting is made 2 Items that are disabled only within high speed interrupt 3 Items that hold high speed interrupt by interrupt disable 4 Items to be noted in addition to 1 to 3 The time taken to run an interrupt program once should not exceed the preset time of the interrupt cycle interval If that time exceeds the preset time of the interrupt cycle interval high speed interrupt operation cannot be guaranteed 1 Items that are all disabled when high speed interrupt setting is made Q02CPU No function for QO2CPU Parameter error is detected 2 Base unit QAI S6 CIB ORO GID paseis not Parameter error is detected available Multiple PLC system Multiple PLC system is not available Checked at parameter setting of GX Developer BE Ae HOGS FESY PWM SPD Any of the instructions indicated on left is not available Instruction PLOADP PUNLOADP PSWAPP y P and error is detected instructions are not available Instruciion that wii IRE longer 3 Since interrupt is disabled during instruction execution 5 Instruction processing time than high speed interrupt f F f high speed interrupt is not available at preset cycle cycle is not available Response to instruction search will be slow or Programming unit Programming unit is not available communication error may occur on
119. being triggered For example if a stop error occurs in the CPU No 2 when B20 is ON the B20 in the CPU No 1 will remain at ON as shown in the operation outline in fig a When automatic refresh is carried out it is necessary to set the points to be transmitted by each CPU and the device in which the data is to be stored the device that will perform automatic refresh with the PLC parameter multiple CPU settings 16 2 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 2 Automatic refresh settings Set the points to be transmitted by each CPU and the device in which the data is to be stored with the PLC parameter multiple CPU settings for when automatic refresh is to performed Range of transmission setting for each CPU module pee Se sys Not 2 oso ost BOI 5 No2 2 oso 0801 hee a Change screens setting x Switching between setting numbers Sets the header number of the device for which automatic refresh is to be performed uses consecutive numbers from the setup device number to the number of specified points PLC side device Stat K End Send range for each PLC ELC share memory G a 2 3 e 2 k points 2 k words per CPU 8 k points 8 k words for all CPUs Setting is in units of 2 points 2 words 16 3 No 3 No4 N pi Change screens Setting 1 x ac Send range for each PLC _ PLC share memory G P7Point _
120. cannot be executed in the corresponding station Stores the execution result of the ZNWR word device write instruction e ZNWR instruction setting fault Faulty setting of the instruction constant source and or destination One of the stations is not communicating cannot be executed The specified station is in the corresponding station a remote I O station Stores whether the slave station corresponds to MELSECNET or MELSECNET11 Bits corresponding to the MELSECNET 11 stations become 1 Bits corresponding to the MELSECNET stations or unconnected become 0 Device number e Corresponding station error Bit b8 b7 L9 L8 L25 L24 L41 L40 L57 L56 b15 L16 L32 L48 L64 b14 L15 L31 L47 L63 b13 L14 L30 L46 L62 b12 L13 L29 L45 L61 b11 L12 L28 L44 L60 b10 L11 L27 L43 L59 b9 L10 L26 L42 L58 b6 L7 L23 L39 L55 b5 L6 L22 L38 L54 b4 L5 L21 L37 L53 b2 L3 L19 L35 L51 bi L2 L18 L34 L50 D1202 D1203 D1241 D1242 If a local station goes down during the operation the contents before going down are retained Contents of SD1224 to SD1227 and SD1228 to D1231 are ORed If the corresponding bit is 0 the corresponding bit of the special register above becomes valid If the own master station goes down the contents before going down are also retained
121. cannot use them to set program data Users who need to set data with these registers should edit the special registers for the Q QnA However before conversion users could set data at special registers D9200 to D9255 only and after conversion users can also set data at registers 1200 to 1255 For more detailed information concerning the contents of the ACPU special registers see the individual CPU users manual and the MELSECNET and MELSECNET B data link system reference manual Supplemental explanation on Special Register for Modification column For the device numbers for which a special register for modification is specified modify it to the special register for QCPU QnACPU For the device numbers for which is specified special register after conversion can be used Device numbers for which X is specified do not function for QCPU QnACPU Special Register List ACPU Special Special Gohescanaln Special Register after Register for Name Meaning Details ae 9 Conversion Conversion Modification e When fuse blown modules are detected the first I O number of the lowest number of the detected modules is stored in hexadecimal Example When fuses of Y50 to 6F output modules have Number of blown 50 is stored in hexadecimal To monitor the D9000 SD1000 Fuse blown module with number by peripheral devices perform monitor operation blown fuse given in hexadecimal Cleared when all contents of SD1100 to SD1107 are re
122. cc NEXT H Return to FOR instruction Timing chart ON XO OFF ON When Z1 0 VO OFF es ON MO OFF 1 Scan ON X1 OFF ON When Z1 1 V1 OFF l ON M1 OFF l 1 Scan 3 Simple data processing a Real numbers floating decimal point data and character string constants can be used in the programming as they are XO Real number data Real number data Real number data E P E1 23 DO RO Ar DO E3 45 RO 4 68 Real number ADD instruction D1 R1 P D5 CPU D10 Character Character Character Character string data LINK instruction string data string data stnng gata psf o a D10 o a 5 CPU gt D6 NUL on D1 1 ew o D1 2 U p D13 NUL x NUL indicates 00H character string END 1 10 1 10 1 OVERVIEW MELSEC Q b Data processing instructions such as table processing instructions etc enable high speed processing of large amounts of data XO 7 FINSP DO RO K2 FIFO table FIFO table Insertion Insertion Insertion position RO 4 Source designation R1 10 Instruction for data insertion at table DO Ce m 15 R3 20 R4 30 4 Easy shared use of sub routine programs a A common pointer can be used to call the same sub routine program from all sequence programs being executed
123. changing from STOP Status to RUN Status When changing from RUN status to STOP status the RUN status output Y is stored in the sequence and all the outputs Y are turned OFF The status after transition from STOP to RUN can be selected from the following two options with the High Performance model QCPU e The output status prior to STOP is output e The output is cleared Default After transition from STOP to RUN the output Y status prior to STOP is output then the program is executed a Output Y status prior to STOP is output After the output Y status before the STOP status is output the sequence program calculations are performed b Output is cleared Clears all output Y and outputs the output Y after executing the sequence program calculations STOP status to RUN status Is output Y NO Output Y status prior to STOP is output status prior to STOP output YES Output is cleared Output the output Y status right before changing to STOP status Clear the output Y status Execute the sequence program calculations Fig 7 3 Processing when Change from STOP Status to RUN Status 7 FUNCTION MELSEC Q 2 Setting the Output Y Status when Changing from STOP Status to RUN Status The output Y status before the STOP status when switching from STOP status to Run status can be set at the PLC System tab screen in the PLC Parameter dialog box Qn H Parameter P
124. command execution execution 16 1 MELSEC Q 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 16 1 Automatic Refresh of CPU Shared Memory 16 2 1 Automatic refresh of CPU shared memory a Automatic refresh of the CPU shared memory is a function of automatic data transfer between CPUs in END processing of the CPU As the device memory data of other CPUs is automatically read when the automatic refresh function is used is possible for the host CPU to use the device data of other CPUs Data is transmitted between the following parties during automatic refresh of CPU shared memory e Between High Performance model QCPU and High Performance model QCPU e Between High Performance model QCPU and Motion CPU e Between Motion CPU and Motion CPU e Between High Performance model QCPU and PC CPU module e Between Motion CPU and PC CPU module An outline of operations when the CPU No 1 performs automatic refresh on the 32 points between BO and B1F and when the CPU No 2 performs automatic refresh on the 32 points between B20 and BSF b c CPU No 1 CPU No 2 CPU shared memory CPU shared memory Host CPU s operation Host CPU s operation information area information area System area System area Automatic refresh area for writing in the No 2 machine Automatic refresh area for writing in the No 1 machine 8 Beading performed with the CPU No 2 END process
125. convenient to use the file registers as local devices which can only be used with the program currently being executed 3 The number of file register to use can be set by writing to PLC online At program A execution File register A is accessed At program B execution File register B is accessed At program C execution File register C is accessed When file registers A to C having the same name as the programs A to C are to be used operation is as shown below Program A execution S chronized t Ro File register A Program B execution Synchronized po File register B Program C execution Snehronized Ro File register C MELSEC Q 10 47 10 EXPLANTION OF DEVICES MELSEC Q POINT File registers dedicated to each program may not be designated with some instructions Refer to the allowable device in the programming manual of each instruction for details c When selecting Use the following file 1 This setting should be selected when a given file register is to be shared by all executed programs 2 Specify the desired parameters in the Corresponding memory File name and Capacity text boxes The High Performance model QCPU creates a file register file with the specified parameters If a parameter is not specified in the Capacity test box this may result in the following e If a file register file with the specified filename i
126. digablo suspend OFF Sampling trace execution is disabled ae ON Trace enable permission If turned off during sampling trace execution trace is suspended Selects the operation output when block stop is executed ON Retains the ON OFF status of the coil being used M9196 SM1196 Operation output OFF Coil output OFF by using operation output of the step being at block stop ON Coil output ON executed at block stop OFF All coil outputs are turned off Operation output by the SET instruction is retained regardless of the ON OFF status of M9196 VO numbers SM9197 SM1198 to be displayed M919 SM11974 Switch between OFF OFF A 7FO Switches I O numbers in the fuse blow module storage blown fuse and XY registers SD1100 to SD1107 and I O module verify error V O verification storage registers SD1116 to SD1123 according to the E error display KE A combination of ON OFF of the SM1197 and SM1198 OFF ON M9198 SM1198 1000 10 170 Z 1800 to 1FFO App 15 App 15 APPENDICES MELSEC Q Special Relay List Continued ACPU Special Special Special Relay after Relay for Meaning Details Relay Conversion Modification e Recovers the setting data stored in the CPU module at OFF Data recovery disabled restart when sampling trace status latch is executed ON Data recovery enabled SM1199 should be ON to execute again Unnecessary when writing the data again from peripheral devices ZNRD instruction Depends on wheth
127. dimensions 27 4mm 1 08inch o 89 3mm 3 52inch oog ozog oog o2okg 020kg x6 The step relays are devices for the SFC function 7 In a program only FXO to FX4 and FYO to FY4 can be used For general specifications refer to the High Performance Model QCPU Q Mode User s Manual Hardware Design Maintenance and Inspection 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Sequence programs and SFC programs can be executed at the High Performance model QCPU This chapter describes the sequence program configuration and execution conditions SFC programs are not described in this manual For details on SFC programs refer to the QOPU Q mode QnACPU Programming Manual SFC 4 1 Sequence Program 1 Definition of sequence program a Asequence program consists of sequence instructions basic instructions and application instructions etc y Sequence instruction X0 MO K100 Fa lt to gt H TO J_ a Xt Basic instruction Bn 4x10 Do x41 Application instruction FROM H5 Ko DIO K H b There are 3 types of sequence program main routine programs sub routine programs and interrupt programs For details on these programs see the following sections of this manual e Main routine programs Section 4 1 1 e Sub routine programs Section 4 1 2 e Interrupt programs Section 4 1 3 File A
128. during gt 500 steps for write during 6144 steps RUN A 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 3 Calculation result File capacity Memory capacity PARAM QPA 564 bytes Sie Sens 2048 bytes Sequence program q P 9 525 steps capacity St dt 1536 steps eps secured for write 500 steps 6144 bytes during RUN Total 1025 steps Memory capacity total 2048 steps ee 8192 bytes 1 The file which was executed in the CPU whose serial No is 04122 or later may not be executed in the CPU whose serial No is 04121 or earlier 2 About combination of write to PLC and GX Developer The following table indicates the combinations of the CPU module and GX Developer versions used when files are read from the CPU module to GX Developer and written to the other CPU module Legend Write to PLC enabled Restrictions on write to PLC Write Source CPU GX Developer version8 GX Developer version7 Files executed in CPU Files executed in CPU Files executed in CPU Files executed in CPU whose serial No is whose serial No is whose serial No is whose serial No is 04122 or later 04121 or earlier 04122 or later 04121 or earlier earlier 1 Since the file size units differ the files may not be stored into the CPU depending on the file capacity 2 Unless the steps secured for write during RUN is d
129. electricity from human body etc Not doing so can cause the module to fail or malfunction Disposal Precautions A CAUTION e When disposing of this product treat it as industrial waste Transportation Precautions CAUTION e When transporting lithium batteries make sure to treat them based on the transport regulations Refer to Appendix 5 for details of the controlled models REVISIONS x The manual number is given on the bottom left of the back cover Print Date Manual Number Revision Dec 1999 SH NA 080038 A First edition Dec 2000 SH NA 080038 B Add the Q33B type main base unit and Q63B type extension base unit Change Chapter 11 1 to 3 to Section 11 1 to 11 3 Unify the name from the software package GPP function ladder logic test tool function GPPW etc to the product name GX Developer GX Configurator Add the explanation of the following functions of which serial number s upper five digits were added in 02092 02092 gt 25 2 2K 2k 2 3K 3K 2 gt K 2k A e Automatic write to standard ROM e Forced ON OFF correspondence for external I O e Remote password setting Increment of Q12HCPU and Q25HCPU standard RAM capacity MELSECNET H remote I O network correspondence Interrupt module QI60 correspondence Correction Section 1 1 Section 2 1 2 2 Chapter 3 Section 4 2 4 2 1 4 2 2 4 2 3 4 6 Section 5 2 5 3 Section 6 1 6 9 3 Section 7 3 3 4 7 6 5 7 8 7 14 7 18
130. every trace is set Multiple items can be selected from the following of none of the items have to be selected a Time Stores the time when the trace was executed b Step No Stores the step number when the trace was executed c Program Name Stores the program name that executed the trace 7 FUNCTION MELSEC Q c The created trace data and trace condition is written to the memory card The trace file is written to the memory card SRAM card The trace file is written to the memory card SRAM card from the Write to PLC dialog box in the Sampling Trace dialog box The files are written in the memory card SRAM card with file names so multiple trace files can be stored d Sampling trace is executed The sampling trace is executed at the Execute and status tab screen in the Sampling Trace dialog box ix Sampling trace Close Read file Write file Delete file Read from PLC Write to PLC Trace result Trace data Conditions Operation Trace status S Statt ettings Current art trace C Stop trace Eksala Total Times Times C Execute trigger After trigger Times Times fe an Trace Start monitor For start trace from Program Trace data Conditions Results storing dest l Target memory Fil ais MAIN Displays only when Trace concucn Display Status is selected Execute by overwriting the conditions on the PLC side C Execute by following conditions wr
131. execution of the high speed interrupt program High accuracy control e g accurate positioning detection is available with the PLC CPU alone Interrupt cycle interval 0 2ms parameter setting Step 0 l END Seantime ims H R AA a ae a l sey H H H J Main routine program _J 149 interrupt program lt Waiting time k High speed interrupt start X input H Buffer memory read 4 149 overhead H High speed interrupt program execution Buffer memory write m H Y output High speed interrupt end 7 FUNCTION MELSEC Q Since the high speed interrupt function need to pick up interrupts at very short intervals of 0 2ms to 1 0ms with the interrupt pointer 149 please do not run the interrupt programs which use the other interrupt pointers 10 to 148 150 to 1255 and fixed scan execution type programs If any of the interrupt and fixed scan execution type programs is executed interrupt cannot be made at the cycle intervals set for the high speed interrupt function Refer to Section 7 22 3 for other restrictions 1 Compatible CPUs CPU Type Compatibility Remarks QO2HCPU QO6HCPU Upper 5 digits of serial No is Compatible a Q25HCPU 04012 or later ao2oceu o incompatible _ patible 2 Specifications of high speed interrupt function Interrupt cycle interval 0 2 to 1 0ms 0 1ms units Number of interrupt 1 Interrupt pointer 149 programs To set
132. execution time measurement occurs at low speed END processing Therefore a PRG TIME OVER error will occur if the low speed execution monitor time t is designated as 100 ms and the measured low speed scan time at low speed END processing exceeds 100 ms 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 2 4 Stand by type program 1 Definition of stand by type program a Stand by type programs are executed only when requested b Stand by type programs are used for the following applications 1 Placing programs in the library Sub routine and interrupt programs are converted to stand by type programs which are managed separately from the main program 2 Changing the program setup Main routing programs registered as stand by type programs can execute the programs required for control by converting them to scan execution type programs They will be reconverted to stand type programs after they completes the program execution 2 Stand by type program applications a Placing programs in the library 1 This application is used to manage sub routine and interrupt programs separately from the main routine program Multiple sub routine and interrupt programs can be created for a single stand by type program Scan execution type program Scan execution type program Main routine Main routine program program P100 Sub routine 7 7 z program _ Stand by type program _ 10 Interrupt a P100 Sub rout
133. file register settings Settings are designated in the RO to R32767 range for each block RSET K1 MOV DO RO RSET K2 MOV DO RO 2 Serial number access format H H H H RO designation for block 1 RO designation for block 2 RO Block 0 R32767 R0 Block 1 R32767 RO Block 2 KAINININ ININ N NINNIN YN Memory card This format is used for designating file register beyond 32k points by device name Multiple blocks of file registers can be used as a continuous file register mov bo zrs2768 H k H mov bo zress36 ZRO Block 0 ZR32767 id gt ZR32768 Block 1 ZR65535 ZR65536 Block 2 KRADDRADAMAYrnwwws Memory card 10 50 10 EXPLANTION OF DEVICES MELSEC Q 10 7 5 Precautions in using file registers 1 Using file register Nos not registered or outside the registered range a When file register files are not registered in the High Performance model QCPU no error occurs even if reading writing to file registers Reading data from a file register results in the following e Undefined data is stored in the standard RAM e OH is stored in a memory card b Writing reading file register Nos outside the registered range points No error occurs even if reading writing occurs to these file registers Reading data from a file register results in the following e Undefined da
134. for example programs for printer output 2 Executing multiple low speed execution type programs When multiple low speed execution type programs are used they are executed one by one in ascending number order of the program in the PLC parameters 3 Execution time of the Low speed execution type program to be executed per scan If all the low speed execution type program operation is completed within one scan and there is surplus time the processing executed after that depends on the ON OFF status of special register SM330 and the execution condition for low speed execution type programs a 1 Asynchronous method SM330 OFF Method in which low speed execution type program operation is continued in the surplus time Synchronous method SM330 ON Method in which even if there is surplus time low speed execution type program operation is not continued and operation starts again from the next scan Execution condition for low speed execution type programs speed execution type i When constant scan time When low speed program programs is set execution time is set The low speed execution type program is re executed The low speed execution type program is re executed 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 1 If a constant scan time has been designated the low speed execution type program will be executed repeatedly during the constant scan s surplus time T
135. host number using the High Performance model QCPU This will enable easy verification when High Performance model QCPUs are not mounted correctly and when programs are written into other CPUs with the GX Developer In the program shown below the annunciator F1 is set to ON when the High Performance model QCPU writing programs is a CPU other than the CPU No 1 SD395 1 The USER LED on the front of the High Performance model QCPU is illuminated when the annunciator F1 is set to ON The number of the annunciator that has been set at ON will also be stored in a special register SD62 fo K1 0395 eT F1 Set a CPU number used for comparison For the own number confirmation method for the Motion CPU and PC CPU module refer to the manual of the Motion CPU and PC CPU module 14 8 14 8 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 2 Precautions when using Q Series I O modules and intelligent function modules 1 Compatible I O modules All O modules QXO QYO are compatible with to multiple CPU system They can be used by setting any of CPU No 1 to No 4 as a control CPU 2 Compatible intelligent function modules a The intelligent function modules compatible with the multiple CPU system are those of function version B or later They can be used by setting any of CPU No 1 to No 4 as a control CPU b Q Series high speed count modules QD62 QD62D QD62E are compatible with by multiple CPU system are
136. initial value registers the data used for a program in device or intelligent function module buffer memories without using a data setting program The use of device initial values provides a shortcut to specify device data in a program without using a device data setting program initial program Data setting by initial processing program SM402 a Power supply ON MOV H100 DO H STOP RESET to RUN Se oo Device memory Mov H2020 Di J J Device initial At power on reset or STOP gt RUN value Y Device memory b In order to use the device initial values the device initial data must be created with GX Developer in advance and this data must be stored as a device initial value file in the High Performance model QCPU s program memory standard RAM or memory card At power ON or on switching from STOP to RUN the High Performance model QCPU writes the data from the device initial value file to the specified device or intelligent function module buffer memory High Performance model QCPU a a gt aT Be See a rg gy meee ee iy NL a Pie ee ee elt gy ghP oa Program memory Standard ROM GX Developer Memory card aera Device initial value writing Device initial value writing _ Designated gt gt A setting i Device initial At power on reset device fle eae Ar value file or STOP gt RUN I r Soe E 4 i Device initial Intelligent value data i l nte
137. input module is mounted in the future The empty slot for slot No 12 is not changed from 16 points 1 a System configuration and I O number assignment before the I O assignment with GX Developer Q38B 0 1 2 4 5 6 7 v 2 2 2 2 2 2 2 gt gt gt gt 5 gt me mo mo mo ne me ne mo e oO O el O fo O fo e E 5 E E E E E E E gt 8S s s5 s8 s s s 3 Q E Q C a Qa Q jou Q 2 5 5 5 5 2 7 O O O O z 32 32 32 32 32 32 32 a points points pointsipointsjpoints pointsipointsj X00 X20 X40 ie x o YBO YDO X1F X3F X5F 6F Y8F YAF YCF YEF Q68B ro as a e N wo En A wi ol Empty Intelligent function module Intelligent N function module Intelligent function module Intelligent function module oo IN OUT Output module Output module Output module w N oe N ee N oe N oe N 16 points points points points points points points points FO 110 Ea ic ik ka S ne Power supply module 10F 12F 14F 16F 17F Y19F Y1BF Y1DF x1 This is the case where the number of points for an empty slot is set to 16 at the PLC system tab screen in the PLC Parameter dialog box 5 ASSIGNMENT OF I O NUMBERS MELSEC Q b I O assignment with GX Developer Designate slot No 3 to 32 points at the I O assignment tab screen of GX Developer Qn
138. into the Motion CPU s device data with the S DDWR instruction of the communication dedicated instruction between multiple CPUs Writes host Writes host CPU device data into other CPU devices device data into other CPU devices High Performance model QCPU Motion CPU S DDWR instruction oo x Writes in the device memory Reads the device memory Device memory Device memory One High Performance model QCPU can operate up to 32 Motion dedicated CPU instructions and communication dedicated commands between multiple CPUs omitting the S P GINT instruction at one time However if the Motion dedicated CPU instructions and communication dedicated instructions between multiple CPUs omitting S P GINT instruction are made at the same time the instructions will be executed in order from the first instruction accepted If there are 33 or more unexecuted instructions an OPERATION ERROR error code 4107 will be triggered Refer to the Motion CPU Programming Manual for details on and the necessity of use of the communication dedicated instructions between multiple CPUs 16 12 16 12 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 16 4 CPU Shared Memory The CPU shared memory is for exchanging data between CPU modules and consists of 4 096 words between OH and FFF The CPU shared memory consists of four areas the host CPU operation information area the system area the automatic refresh area
139. is retained 3 PAUSE Status Operation Processing a The PAUSE status indicates that the sequence program operations are paused by remote PAUSE function while maintaining the output and device memory status See Section 7 6 2 for details on remote PAUSE function 4 High Performance model QCPU Operation Processing with RUN STOP Status Operation Processing of High Performance Sequence Device memory mdel QCPU program External output RUN to STOP STOP to RUN operation processing M L S T C D OS saves the status Maintains the status immediately before immediately before the the STOP status STOP status and all points turn off Executes up to OS saves the status the END immediately before instruction and the STOP status and stops all points turn off Starts executing the operation from the status immediately before the STOP status When the device initial value function is designated however the device initial value is set or the local devices are cleared Determined by the STOP RUN time Starts at step 0 Joutput mode in the PLC parameter dialog box Determined by the STOP RUN time output mode in the PLC parameter dialog box 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q The High Performance model QCPU performs the following in any of RUN STOP and PAUSE status e I O module refresh processing e Data communication with GX Developer and ser
140. is satisfied 2 Sub routine program management Sub routine programs are created after the main routine program after FEND instruction and the combination of main and sub routine programs can be managed as one program a When created after the main routine program e A sub routine program is created between the main routine program s FEND and END instructions e Because there are no restrictions on the order in which sub routine programs are created it is not necessary to set the pointers in ascending order when creating multiple sub routine programs e Either a local pointer or a common pointer can be used High Performance model QCPU Program A Program memory Standard ROM Memory card Main routine program S Write File of program A FEND Pot kyo 4 RET H Sub routine lt program P8 lt y gt H RET j Pit yi2 4 RET H x See Section 10 9 for details on local and common pointers See Section 10 8 for details on sub routine program nesting 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q b Using the sub routine program as a separate program Sub routine programs can also be managed as separate separate programs stand by type programs See Section 4 2 4 for details on stand by type programs 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 1 3 Interrupt programs 1 Definition of interrupt
141. is set at ON when transmission data setting has been completed 16 8 Operation using the transmission data DO to D1023 Dono bO of the CPU No 2 first device D1024 for the use of the interlock is set at ON when operations using the received data have been completed 16 8 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 16 2 Communication with Multiple CPU Dedicated Instructions and Intelligent Function Module Devices 1 Communication with multiple CPU dedicated instructions S TO instruction FROM instruction and intelligent function module device ULAG The High Performance model QCPU of a multiple CPU system can use an S TO instruction FROM instruction and intelligent function module device UAG to access the CPU shared memory of the High Performance model QCPU Motion CPU and PC CPU module The data written in the CPU shared memory of the host CPU with a S TO instruction can be read by another CPU using a FROM instruction or intelligent function module device UAG Contrary to the automatic refresh function for the CPU shared memory it is possible to read data directly when this instruction is executed An outline of a process where data written in the CPU shared memory of CPU No 1 with an S TO instruction is read by the CPU No 2 using an FROM instruction or intelligent function module device ULAG is shown in the figure below CPU No 1 CPU No 2 CPU shared me
142. model QCPU is in RUN status However for the following cases execute the Write to PLC Flash ROM function after the High Performance model QCPU enters into STOP status 1 The file registers of the Flash card is used in a sequence program 2 The file registers are used in a Sequence program by setting the file register to set not to use in the PLC parameter If the Write to PLC Flash ROM function is executed when the High Performance model QCPU is in RUN status an error may occur and the High Performance model QCPU may stop running While the Write to PLC Flash ROM function is executed the read write cannot be made from other modules This may cause a time out on the side of other modules When the High Performance model QCPU is expanded to STOP status and Write to PLC Flash ROM is being performed do not set it in RUN status RUN cannot be performed normally during Write to PLC Flash ROM Perform RUN after Write to PLC Flash ROM is completed 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 6 2 Automatic write to standard ROM Auto Download all Data from Memory card to Standard ROM Automatic write to standard ROM function writes the parameters and sequence programs stored on the memory card into the High Performance model QCPU s standard ROM without using GX Developer The writing of parameters and sequence programs into the memory card is performed by GX Developer Version 6
143. module refresh waiting time is max 37 5 us when modules are mounted on main base or max 40 u s when they are mounted on extension base Device comment in high speed interrupt program is overwritten Forced ON OFF When multiple programs are run interrupt is disabled during program switching Waiting time is 30 u s When high speed interrupt function has been set the recommended number of programs is 1 4 Monit For ladder monitor device batch monitor or device entry monitor waiting time is as follows onor 0 096 x number of device points 20 p s AC DOWN Waiting time is max 20ms for high speed interrupt start Multiple program execution 7 91 7 91 7 FUNCTION MELSEC Q 4 Items to be noted in addition to 1 to 3 a If High speed execution is selected at the Interrupt program fixed scan execution program setting section on the PLC system tab screen in thd PLC parameter dialog box of GX Developer this setting is invalid for the high speed interrupt function Using the file registers outside the setting range range in excess of the maximum number of points for high speed buffer transfer does not result in an error and does not transfer data to outside the range The contents of the other devices are not corrupted As in the other interrupt programs there are the following items as precautions for program creation 1 The device turned on by the PLS instruction in the high speed interrup
144. of system monitor of GX Developer See Section 2 3 for details b Operations with different function versions Function version A High Performance model QCPUs cannot be used on a multiple CPU system Errors shown in table 14 1 will occur and the multiple CPU system will not start up if function version A High Performance model QCPUs are used on a multiple CPU system If any of the errors shown in table 14 1 are displayed after executing GX Developer Version 6 or later PLC diagnosis function replace the function version A High Performance model QCPU with a function version B High Performance model QCPU Table 14 1 List of operations with differing function versions Error code 2000 Error code 2125 Error code 2000 Error code 7010 Error code 7010 ieee oS ee code 2125 Noerror O x1 The following errors may occur except MULTI EXE ERROR when the PLC is turned on or the High Performance model QCPU for CPU No 1 is reset e CONTROL BUS ERR error code 1413 1414 e MULTIPLE PLC DOWN error code 7000 7002 14 5 14 5 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 2 High Performance model QCPU Motion CPU and PC CPU module mounting positions a Up to four modules of High Performance model QCPU can be mounted in the CPU slots starting from the slot on the right side of power supply module closely and the neighboring slots up to slot 2 There must be no empty slot between CPU modules Mount the
145. of traces can be obtained by dividing 60 kbyte by the number of bytes specified as a device The experssion is Number of Bit Devices 8 2 x Number of Word Devices x1 Round up result of number of Bit Devices 8 in the expression to the right of the decimal point High Performance model QCPU Memory card GX Developer Specified Sampling trace area device data Sampling trace area Device Data for 1st time Read to the PARANA area i peripheral ata tor the Data for 3rd time device sal l File Data for 4th time Ey amoun x Sampling trace register Data for 5th time data monitoring area Data for 6th time 1 Data for n 1 th time Data for n th time When stored for n th time the next data overwrites the 1st time data If the trigger point is executed the sampling trace area data is latched after sampling as many times as specified Fig 7 8 Sampling Trace Operation 7 FUNCTION MELSEC Q e The trace result displays the ON OFF status of the bit device for the sampling cycle and the current value of the word device Trace result Bit device Contact Coil Display units 10 Nd 2040 2030 2020 2010 20 D0 1 co Coil 4 la Count 2048 Timefsec Step Program Word device Current value 16 bit Decimal bd 2048 2047 2046 2045 2044 2043 204 a D1
146. on when canvas screen transfer to AD57 S1 AD58 is done by divided processing and turned off at completion of divided processing Turned on when canvas screen transfer to AD57 S1 AD58 is done by divided processing Turned ON to shorten the search time in the A8UPU A8PUJ In this case the scan time is extended by 10 The A8UPU A8PU cannot be used in the QCPU QnACPU special relays Indication of communication enable disable to remote terminal modules connected to the AJ71PT32 S3 A2C or A52G It is set whether the error checks below are performed or not when the END instruction is processed to set the END instruction processing time e Check for breakage of fuse Check of battery e Collation check of I O module Turns ON when the detail factor of the operation error is stored into SD1091 Remains ON if the condition is restored to normal thereafter The I O module can be changed online when SM251 is turned ON after the head I O number of the I O module to be changed is set to SD251 One module is only allowed to be changed by one setting To be switched on in the program or peripheral device test mode to change the module during CPU RUN To be switched on in peripheral device test mode to change the module during CPU STOP RUN STOP mode must not be changed until I O module change is complete Turned on if the SFC program is registered and turned off if it is not Should be turned on by the program if the
147. or Flash card If a program that contains a small number of steps is written to a Flash card it will take long to fill the Flash card with programs When a RS 232 interface is mounted at Q2MEM 4MBF a baud rate of 115 2k bps takes about 14 minutes To write data to a Flash card increase a baud rate or use a USB interface If the Write to PLC Flash ROM function is executed from a local station communication time will be longer To execute the Write to PLC Flash ROM function set the length of GX Developer s time check to 60 seconds or longer Shorter time check may cause a time out on the GX Developer side To execute the Write to PLC Flash ROM function via the CC Link network by operating from GX Developer at a local station set the length of CC Link s CPU monitoring time SWOA to 60 seconds or longer The default is 90 seconds Use the default value when making the setting 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU d f MELSEC Q When the Write to PLC Flash ROM function is executed all files stored in the standard ROM or on the Flash card are erased before a batch of files specified by GX Developer are written No files can be added to the standard ROM or Flash card To add new files to old files read all the old files from High Performance model QCPU and write them again into the High Performance model QCPU The Write to PLC Flash ROM function can be executed when the High Performance
148. points Input 16 points Input 16 points Q64AD 16 points Q64AD 16 points Q62AD 16 points Output 16 points Output 16 points I O Nos X Y40 to X Y4f By making the automatic refresh setting of the used intelligent function module using GX Configurator the corresponding data can be read written from to the device memory of the CPU module without access being made directly to the buffer e Direct access to link devices LX LY LB LW SB SW of MELSECNET H network modules e g QU71LP21 25 is allowed without refresh settings X0 P W5 wi2 DO Direct readout of the No 5 network module s LW12 link register JO W 12 I gt Link register designation Network No designation QCPU QJ71LP21 25 Input 16 points Input 16 points Q68AD 16 points Q62AD 16 points Output 16 points Output 16 points Power supply module Q68AD 16 points Z 2 Q Zz fe a 1 OVERVIEW MELSEC Q 2 Edge relays simplify pulse conversion processing a The use of a relay V that comes ON at the leading edge of the input condition simplifies pulse processing when a contact index qualification has been made Circuit example M1000 H RT Z1H Reset index register Z1 FOR K1000 H Repetition 1000 times designation X0Z1 VOZ1 A MOZ1 gt Pulsing MO to M999 M1000 tne z H Increment Index Register Z1 1
149. prevent this configure an external safety circuit such as fuse e Build a circuit that turns on the external power supply when the PLC main module power is turned on If the external power supply is turned on first it could result in erroneous output or erroneous operation e When there are communication problems with the data link refer to the corresponding data link manual for the operating status of each station Not doing so could result in erroneous output or erroneous operation e When connecting a peripheral device to the CPU module or connecting a personal computer or the like to the intelligent function module to exercise control data change on the running PLC configure up an interlock circuit in the sequence program to ensure that the whole system will always operate safely Also before exercising other control program change operating status change status control on the running PLC read the manual carefully and fully confirm safety Especially for the above control on the remote PLC from an external device an immediate action may not be taken for PLC trouble due to a data communication fault In addition to configuring up the interlock circuit in the sequence program corrective and other actions to be taken as a system for the occurrence of a data communication fault should be predetermined between the external device and PLC CPU CAUTION e Do not bunch the control wires or communication cables with the main circu
150. product information list window see Section 2 3 e See Section 14 2 4 for details on restrictions on the number that can be used with intelligent function modules 14 9 14 9 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 3 Limitations when mounting AnS Series corresponding I O modules and special function modules 14 10 1 Compatible I O modules and special function modules AnS Series corresponding I O modules and special function modules compact types can be used with the High Performance model QCPU 2 Control CPU The AnS Series corresponding I O modules or special function module can be controlled by only one CPU control CPU of the CPUs No 1 to No 4 when configuring a multiple CPU system For example If the control CPU is set up as the CPU No 2 as shown in the illustration below every slot s control CPU on which I O modules and special function modules compatible with the AnS Series are mounted are set as the CPU No 2 The PARAMETER ERROR error code 3009 occurs even if only one AnS Series corresponding I O module or special function module is set up the multiple CPU system will not be started up Control CPU can be set for each slot Module No Same CPU set as the control CPU QA1S68B The Module No shown in the illustration represents the following CPU 1 to 4 CPU s CPU number Modules 1 to 4 Control CPU s CPU number 14 10 14 SYSTEM CONFIGURATION OF MUL
151. program The processing speed is the total of the instruction execution time and the access time to from the intelligent function modules When reading and processing the data of the intelligent function module frequently in the program use the FROM instruction to read the data at one point in the program and store and process it in a data register instead of using the intelligent function module device every time Otherwise the intelligent function module device accesses the intelligent function module every time the instruction is executed resulting in longer scan time for the program For the intelligent function module device see Section 10 5 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 1 5 Communication using the instructions dedicated for intelligent function modules 1 Description of the instructions dedicated for intelligent function modules a QCPU The instructions dedicated for intelligent function modules are the instructions that facilitate programming using the functions of the intelligent function modules For example the OUTPUT instruction which is the instruction dedicated for serial communication modules allows data transmission in user specified message format with no handshaking protocol In this case the communication is possible without considering the buffer memory address of the objective serial communication module Serial communication module
152. program a An interrupt program begins from the interrupt pointer 1 _ and ends at the IRET instruction 1 b Interrupt programs are executed only when an interrupt factor occurs 1 The interrupt pointers include a pointer designed for only the high speed interrupt function 149 When you have used 149 do not use interrupt programs which use the other interrupt pointers 10 to 148 150 to 1255 and fixed scan execution type programs If any fixed scan execution type program or the like is run the interrupt program using 149 cannot be executed at the preset interrupt cycle intervals See Section 7 20 for details on the high speed interrupt function 1 See Section 10 10 for details on interrupt factors and interrupt pointers 2 Interrupt program management Interrupt programs are created after the main routine program after the FEND instruction and the combination of main and sub routine programs can be managed as one program a When created after the main routine program e An interrupt program is created between the main routine program s FEND and END instructions e Because there are no restrictions on the order in which interrupt programs are created it is not necessary to set the interrupt pointers in ascending order when creating multiple interrupt programs High Performance model QCPU Program A D Program memory Standard F ROM Memory card Main routine program File
153. program memory The local pointer No ranges from PO to the highest No of the local pointer in use The High Performance model QCPU s OS computes the number of points used Even if only P99 is used in a program for example the number of points used will be counted as 100 between PO and P99 Therefore when local pointers are used at several programs the pointer settings should begin from PO If the total number of pointers total for all programs exceeds 4096 points a pointer configuration error error code 4020 occurs occupied points is 100 points is 1 __ ptss PXAMples oe ete s sre ons Sut Soc sentra ace Be RY See POSTS SS SS EER SEES If the local pointer points are used as follows the total is 600 points Program A Program B Program C PO to P99 used in P100 to P199 used Only P299 is used I program in program in program PO to P99 occupy PO to P199 occupy 200 points PO to P299 occupy 300 points Total of 600 100 points points used lf PO to P99 are used If PO is used the the number of number of occupied 10 9 2 Common pointers 1 Definition a Common pointers are used to call sub routine programs from all programs being executed in the High Performance model QCPU Program A Program C Toan P204 H p204 ea Po H FenD H c drer H pzs e ca mal LE FEND Program B END Label b The same pointer No ca
154. programming unit side The following two SFC functions are not available 1 SFC transition monitor check function Functions given on the left are not available and are using SM90 to 99 SD90 to 99 ignored 2 Fixed time executed block execution function Time based sampling trace is not available Sampling trace Sampling trace can be used every scan or when detailed conditions are executed Sampling trace is not available and is ignored When trace read is performed data may not be set not available interrupt or fixed scan execution type program is run type program Since interrupt is disabled during online program correction a high speed interrupt start is delayed during Online program Online program correction is not that period and therefore high speed interrupt is not correction online file available available at preset cycle batch write Online file batch write is not available The following time is taken e Max 102 s for online program correction e Max 300ms for online file batch write Since interrupt is disabled when file registers having the same file name as the program name are changed Te S having Fil ters havinath fil high speed interrupt is not available at preset cycle e same file name ile registers having the same file name The following time is taken as the program as the program name is not available Max 410 ps for standard RAM name 400 us 100 u s X number o
155. registers in the network system network parameter settings must be made Link registers not set in the network parameter settings can be used as data registers For details on network parameters refer to the Q Corresponding MELSECNET H Network System Reference Manual 10 2 14 Link special registers SW 1 Definition a Link special registers are used to store data on the communication status and errors of an intelligent function b Because the data link information is stored as numeric data the link special registers serve as a tool for identifying the locations and causes of faults 2 Number of link special register points There are 2048 link special register points from SWO to SW7FF The link special register points are assigned at the rate of 512 points per intelligent function module such as a MELSECNET H network module By default the following points are assigned for link registers as shown below Swo SW1FF Link special register For the 1st network module Sw200 SW3FF For the 2nd network module SW400 SW5FF For the 3rd network module SW600 SW7FF For the 4th network module For details on link special registers used in the QCPU refer to the QCPU Q mode QnACPU Programming Manual Common Instructions 10 31 512 points 512 points 4 512 points 7512 points 2048 points 10 31 10 EXPLANTION OF DEVICES MELSEC Q 10 3 Internal Sy
156. remote I O stations are also checked fore fuse condition Turned on if the status of I O module is different form entered status when power is turned on e Remains ON if the condition is restored to normal V O module thereafter verification error e I O module verification is done also to remote I O station modules e Reset is enabled only when special registers SD1116 to SD1123 are reset Goes ON if MINI S3 link error is detected at even one of Normal the installed AJ71PT32 S3 modules Error e Remains ON if the condition is restored to normal thereafter e Turns ON if an instantaneous power failure of within 20ms occurs during use of the AC power supply module e Reset when power is switched OFF then ON e Turns ON if an instantaneous power failure of within SM1005 AC DOWN AC DOWN not detected 10ms occurs during use of the DC power supply module detection AC DOWN detected e Reset when power is switched OFF then ON e Turns ON if an instantaneous power failure of within 1ms occurs during use of the DC power supply module e Reset when power is switched OFF then ON SM1000 Fuse blown SM1004 NIMI link error APPENDICES MELSEC Q Special Relay List Continued ACPU Special Special Special Relay after Relay for Name Meaning Details Relay Conversion Modification e Turns ON when the battery voltage drops to or below the SM1006 OFF Normal specified ON Battery low e Turns OFF when the battery voltage
157. restarted 2 When a stop error occurs at the CPU No other than No 1 Whether the entire system is halted or not is determined by the multiple CPU setting s Operating Mode setting when a stop error occurs in the CPU modules for CPU No 2 to No 4 The default setting is for all CPUs to be stopped with a stop error When you do not want to stop all CPUs at occurrence of a stop error in any of the CPU modules click the check box that corresponds to the CPU No whose error will not stop all CPUs Arrow D Multiple CPU settings No of PLC 4 Online module changet F Enable online module change with another PLG NoofPic fa When the online module change is enabled with another PLC 1 0 status outside the group cannot be taken 0 sharing Aultipl are p t Oper a ultiple CPU KA p by stop error of PLC I All station stop by stop error of PLC2 F All station stop by stop error of PLC3 Refresh settings hange screens fSetting1 7 F All station stop by stop error of PLI Send range for each PLC PLC side device L PLC The autoreltesh area Cauion Dev starting Point Stat End Start End Nad a No2 o No3 o Nod o Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address t calles REN e satay enya seg ISM Re sa The unit of points that send range for each PLC is word Import Multiple
158. returns to normal thereafter e Turns ON when the battery voltage drops to or below the OFF Normal specified ON Battery low e Remains ON if the battery voltage returns to normal SM1007 thereafter smioos SM1 Self diagnosis OFF No error Turned on when e result of self error ON Error diagnosis rror is found as a Turned on when OUT F of SET F instruction is SM1009 SM62 executed SM1011 SM56 e Switched off when SD1124 data is zeroed SM1012 SM700 Carry flag Turned on when operation error occurs during execution SM1016 SM1017 SM1020 Battery low Battery low latch Annunciator OFF No F number detected detection ON F number detected Operation error OFF No error of application instruction flag ON Error e Remains ON if the condition is restored to normal thereafter ou can a Carry flag used in application instruction Clears the data memory including the latch range other than special relays and special registers in remote run mode from computer etc when SM1016 is on Clears the unlatched data memory other than special relays and special egisters in remote run mode from computer etc when SM1017 is on Data memory OFF Ignored clear flag ON Output claered Data memory OFF Ignored clear flag ON Output claered User timing clock imi ack e Relay which repeats on off at intervals of predetermined ue When power is turned on or reset is per for
159. sales info meir mee com MITSUBISHI ELECTRIC ITALY EUROPE B V Italian Branch Via Paracelso 12 1 20041 Agrate Brianza Ml Phone 39 039 6053 1 Fax 39 039 6053 312 e mail factory automation itmee com MITSUBISHI ELECTRIC SPAIN EUROPE B V Spanish Branch Carretera de Rub 76 80 E 08190 Sant Cugat del Vall s Phone 34 9 3 565 3131 Fax 34 9 3 589 2948 e mail industrial sp mee com MITSUBISHI ELECTRIC UK EUROPE B V UK Branch Travellers Lane GB Hatfield Herts AL10 8 XB Phone 44 0 1707 27 61 00 Fax 44 0 1707 27 86 95 e mail automation meuk mee com MITSUBISHI ELECTRIC JAPAN CORPORATION Office Tower Z 14 F 8 12 1 chome Harumi Chuo Ku Tokyo 104 6212 Phone 81 3 6221 6060 Fax 81 3 6221 6075 MITSUBISHI ELECTRIC USA AUTOMATION 500 Corporate Woods Parkway Vernon Hills IL 60061 Phone 1 847 478 21 00 Fax 1 847 478 22 83 MIDDLE EAST REPRESENTATIVE TEXEL Electronics Ltd Box 6272 IL 42160 Netanya Phone 972 0 9 863 08 91 Fax 972 0 9 885 24 30 e mail texel_me netvision net il ISRAEL GEVA AUSTRIA UAB UTU POWEL LITHUANIA Avtomatika Sever Ltd RUSSIA Wiener Stra e 89 Savanoriu pr 187 Lva Tolstogo St 7 Off 311 AT 2500 Baden LT 2053 Vilnius RU 197376 St Petersburg Phone 43 0 2252 85 55 20 Phone 370 0 52323 101 Phone 7 812 11 83 238 Fax 43 0 2252 488 60 Fax 370 0 52322 980 Fax 7
160. same when give precision u ncheck using multiple CPU Use special relay special register from SM SD1000 the check box Acknowledge XY assignment Multiple CPU setting Default Check End Cancel 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q In binary notation the portion of the value following the decimal point is calculated as follows 0 1 1 0 1 t t t t This bit expresses 2 This bit expresses 2 This bit expresses 2 This bit expresses 2 4 0 1101 2 27 22 24 0 5 0 25 0 0625 0 8125 10 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 9 Character String Data 1 Character String Data The High Performance model QCPU uses ASCII code data 2 ASCII code character strings ASCII code character strings are shown in the Table below 00x NUL code is used at the end of a character string gt 0 tT oes as Fo ls DVT 0 ofofojo i f1 1 1 0 0 0 ft or 0 a aA gt 0 o 1fof i1f of1 o 1 8 9 A BICI DIEJF Column b8 b7 b6 b5 b4 b3 b2 b1 A 0 0 o JNU m olojojojojojo jlo 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 ASSIGNMENT OF I O NUMBERS This section describes the necessary information on the I O number assignment for the data exchange between High Performance model QCPU and I O modules or intelligent function m
161. setting of automatic refresh function not allowed e A1SD51S AnS series special function e A1SD21 S1 f module shown on the right A1SJ71J92 S3 Total of 6 units When GET PUT service is used Interrupt module f aa One unit only x A maximum of 4 modules if the network parameters for CC Link are set and controlled by the GX Developer There is no restriction in the number of modules when the parameters are set by the special purpose instructions for the CC Link For details on the CC Link System Master Local Unit that can set parameters with the special purpose instructions refer to the user s manual for the CC Link Master Local module b When the AnS series special function modules shown below are used a limitation is given to an accessible device range e A1SJ71J92 S3 type JEMANET interface module e A1SD51S type intelligent communication Accessible device range Input X Output Y X Y0 to 7FF Internal relay M ai relay L MO to 8191 Link relay B BO to FFF Timer T TO to 2047 Counter C CO to 1023 Data register D DO to 6143 Link register W WO to FFF Annunciator F FO to 2047 c A graphic operation terminal can be used only for the GOT900 series Basic OS matching Q mode and communication driver must be installed The GOT800 series A77GOT and A64GOT cannot be used 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q d The modules shown below cannot be used Module Name MELSECNET IO net
162. shown in the table below When the initial processing is completed the High Performance model QCPU goes in the RUN STOP switch setting status See Section 4 4 High Performance model QCPU status Initial processing item When the power When reset is When STOP is turned on executed to RUN The I O module initialization ea loo ee Boot from the standard ROM memory card eed nar em 0 o j PLC parameter check ss sid parameter check Multiple CPU system parameter value equality Pepe te check Device initialization of the range not latched bit device OFF word device 0 Automatic allocation of the I O number of installed modules Start of the MELSECNET H network information setting and network communication Switch setting of intelligent function module of of x CC Link data setting Ethernet data setting Setting of device initialization values EE ASE Se A executed x not executed 1 Indicates that the parameter or program was changed in a STOP status and the CPU was placed in a RUN status without being reset Move the RUN STOP switch from STOP to RUN RUN LED flickers to STOP to RUN Fully note in the above switch operation that normal operation may not be performed since the previous data may not be maintained in the case of the pulse conversion instruction PLS _P depending on the program change 4 3 2 I O refresh I O module refresh processing In I O refresh an input X is received from the input modu
163. significant bit for positive negative discrimination Bit name gt b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 bi bO 215 914 913 912 911 910 99 98 97 96 95 94 93 D2 91 90 Il Il Il Il Il Il Il Il II Il ll Il Il j j Il Decimal value 32768 16384 81924096 2048 1024 512 256 128 64 32 16 8 4 2 1 Negative value when most significant bit is 1 Fig 4 13 Numeric Expressions for High Performance model QCPU Registers b Usable numeric data for High Performance model QCPU As shown in Fig 4 13 the numeric expression range is 32768 to 32767 Therefore numeric data within this range can be stored in the High Performance model QCPU registers 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 8 2 HEX Hexadecimal 1 Hexadecimal notation In hexadecimal notation 4 binary bits are expressed in 1 digit If 4 binary bits are used in binary notation 16 different values from 0 to 15 can be represented Since hexadecimal notation represents 0 to 15 in 1 digit letters A to F are used to represent the numbers 10 to 15 Then acarry occurs after F Table 4 3 shows numeric expressions by binary hexadecimal and decimal notations Table 4 3 Comparison of BIN HEX and DEC Numeric Expressions DEC Decimal HEX Hexadecimal BIN Binar 9 A B C D E F Carry k oO 2 Hexadecimal numeric expression High Performance model QCPU registers data registers link registers etc consist of
164. simultaneously by two extension base units 5 When Q5CB Q6LB and QA1S6LB types of extension base units are mixed first connect the Q5LB Q6LB type and then connect the QA1S6LB type When setting the No of the extension stages set it from Q5LB Q6LIB in order Notes Although there are no particular restrictions in the order of the installation of the Q5LB and Q6LB refer to Section 6 6 for usability 6 Connect the extension cable from OUT of the extension cable connector of the base unit to IN of the extension base unit on the next stage 7 If 65 or more modules are installed an error will occur 8 When bus connected the GOT occupies one extension stage and one slot 9 The High Performance model QCPU processes the GOT as a 16 point intelligent function module Hence connection of one GOT decreases the number of controllable points on base unit by 16 points 10 As a power supply module the Q61SP cannot be used 2nd extension stage 3rd extension stage Use the Q61P A1 Q61P A2 Q62P or Q64P as a power supply module 2 4 2 4 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q b When slim type main base unit Q3_
165. slots is determined as the one designated at the I O assignment tab screen in the PLC Parameter dialog box 2 Order of I O number assignment The I O numbers are assigned to the modules from left to right consecutively starting from OH assigned to the module on the right of the High Performance model QCPU in the main base unit 3 Order of I O number assignment for extension base units The I O numbers for extension base units continue from the last number of the I O number of the main base unit The I O numbers are assigned to the extension base units from left I O 0 to right consecutively in the order in which the setting connectors of the extension base unit are set 4 I O numbers of each slot Each slot of base units occupies the points of I O numbers of the mounted I O modules or intelligent function modules special function modules When 32 point input module is mounted on the right of High Performance model QCPU X0 to X1F are assigned as I O numbers 5 I O numbers of empty slots If the base unit has empty slots mounted with no I O modules or no intelligent function modules special function modules are mounted the points designated at the I O assigment tab screen in the PLC Parameter dialog box are assigned to the empty slots Default value is 16 points When the assignment of base units is conducted in Auto mode the number of empty extension stages is not assured even if the extension stage is skipped a
166. sssssessssrssussnernssnssnsenerntnsnnnnnnnnnnnnnnnnnetnnennnnnannnanannnnnanenannnannnnn 4 20 4 2 4 Stand by type program T E ak ni aa iki a a a a di a a E auntie niauadoahiaaa 4 26 4 2 5 Fixed SCAN execution type PLOQKAIM eeeecceeceeeeeeeeeeeeeeeeeeeaeeeaeeeaeeeaeeeaeeeaeeeaeseaeeeaeeaeeeaeeeaeeeaeeeeeeeatenas 4 32 4 3 Operation Processing 4shcceatesi teen e ddd etn eden 4 35 A321 initial processi annoin naiai cel dete celd dake dedd dete eld Sets Ed ai a e i AEN 4 35 4 3 2 I O refresh I O module refresh ProC SSING cecceceeseeeeceeceeeeaeceeceeeeeeeaesaeseseaesaesaeeeeeeaeeaeeaeeateaes 4 35 4 3 3 Automatic refresh of the intelligent function module 0 0 eee eeeeeeeeeeeeeeeeeeeaeeeaeeeaeeeaeeeaeeaeeeaeeeatenas 4 36 A 3 4 END proCeSsing zirian ia te eect eee ects AEE OEE A EEOAE 4 36 4 4 RUN STOP PAUSE Operation ProceSSing cccccccsssssssssssssssssessseseseseseseseseseseacacacscaeaeacacaeaeacaeaeassnseeeeeseeeeesess 4 37 4 5 Operation Processing during Momentary Power Failure cccscecseseseseseeeceeeeeeeeseeeeeeaeaeeneeeeeseeteteeeeeeeeasateneees 4 38 4 6 Data Clear ProCeSSing snepi e E A A E KEN E E E A EEE E 4 39 4 7 VO Processing and Response LaQ s ssesscseceseseeseseseseeseseseeeeseseseeeeseseseeeeseaeaeeeeeeacseaeeneeasaeeneatenseeseaeeteeseeasatentees 4 40 4 7 1 ROfreSh MOUS sszcsczesscescccesecdereescenerensntatecnseenctensneaaecusceaheasneacecagesanteusesaaecusetasecasneatieusztasteesueasicusti
167. stages 560 580 5A0 System configuration 57F 59F 5BF Power supply module Extension base s Extension base 3 extension J 35 6 extension J 53 stages stages 640 660 680 6A0 67F 69F 6BF Power supply module Extension base Extension base unit QA1S65B 4 extension cee J 40414243 J 61 500 740 Prohibit Prohibit Power supply module When module is installed an error occurs Number of CPU Maximum number of extension stages 4096 Q33B Q35B Q38B Q312B Q52B Q55B Q63B Q65B Q68B Q612B QA1S65B QA1S68B Extension cables QC05B QC06B QC12B QC30B QC50B QC100B A maximum of 7 extension base units can be used Do not use extension cable longer than 13 2 m 43 28 feet 1 2 3 When using an extension cable it should not be connected to or allowed to come close to the main circuit high voltage and large current 4 When setting the number of extension stages set the number in ascending order to avoid setting the same number repeatedly 5 lf Q5 B Q60 B and QA1S6 L B are to be mounted on the same extension base unit be sure to connect Q5 C B Q6 L B at first and then Notes QA1S6 0B Make the setting of the number of levels of an extension base unit starting with Q5 CO B Q6
168. stated in Scan Time Details for Scan Execution are displayed Constant indicates the constant scan waiting time when the setting is made for constant scan b Scan Time Details for Scan Execution The details of the scan time are displayed e Program The total execution time of the scan execution type program is displayed END operation time The END operation time is displayed Low speed program This indicates the total execution time of a low speed execution type program when making the setting for the execution time of a low speed execution type program or constant scan time Constant waiting The constant scan waiting time is displayed when setting the constant scan time However when the low speed execution type program execution time is set as well this value is 0 000 ms c Each Program Execution Status The execution status of program specified at the Program tab screen in the PLC Parameter dialog box is displayed e Program The program name is displayed in the order set in the parameter Execute The program type set in the parameter is displayed Scan Time The actual scan time current value is displayed At the program stop wait status the scan time is displayed as 0 000 ms Execute count The number of times the program was executed is displayed setting the starting point of when the measurement is started as 0 The number of execution times is displayed up to 65535 times and returns to 0 w
169. steps 245760 bytes 60 files Q12HCPU 124 k steps 507904 bytes 124 files Q25HCPU 252 k steps 1032192 bytes 252 files In computing a memory capacity 1 step is equal to 4 bytes 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 4 About the Standard RAM 1 What is the standard RAM a The standard RAM is used when using file registers or local devices without a memory card being mounted on the High Performance model QCPU b The standard ROM must be formatted by using GX Developer when using the High Performance module QCPU for the first time Refer to the GX Developer manual for details on the formatting method c Datacan be written into the standard RAM by using the online function Write to PLC 2 Stored Data A standard RAM holds two files file register file and local device file Any other files cannot be written into a standard RAM The standard RAM cannot store other files than the file register and local device files 3 Formatting a Formatting To format a standard RAM choose Online Format PLC memory and then select Standard RAM in the Target memory list box See Section 6 2 for the PLC Memory Format dialog box b Memory capacity after formatted Table 6 3 shows the memory capacity of standard RAM Table 6 3 Memory ee Number of Files Number of Files Stored _ CPU Type Serial No Number of Files Stored File Register aozcpu _ 32k words 64 kbyte
170. stopped and the remainder of the program is executed in the next scan 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q R 1 Asynchronous method 7777 TTT TT TTT srs sss sss sss sess s 1 Constant scan time setting The low speed execution type program is operated under the following conditions as shown below e Constant scan time 8ms e Total scan execution type program time 4ms to 5ms e Execution time of low speed execution type program A ims e Execution time of low speed execution type program B 3ms e END processing low speed END processing Oms 0 ms is used to simplify the illustration END END END END processing processing processing processing Y Y 16 24 l ms i T Scan execution type program i ims ms ims ims Low speed execution type program A F F l i 5 ms 2ms 0 5ms _ l R 1 5ms 1 Low speed execution type program B O H i 0 5ms i e sn gns 0 5ms Constant scan wait time Low speed Low speed i i i i i Low speed scan time l Scan time I 1 scan time l 1 l l 1 as pat gt l 13ms 8 5ms 8 5ms f t Low speed Low speed Low speed END processing END processing END processing 1 execution execution execution 2 Low speed program execution time setting The low speed execution type program is operated under the following conditions as shown below e Low sp
171. that simultaneous access does not occur Reduce the number of MELSECNET H and CC LINK refresh access points Reduce the number of automatic refresh points between CPU modules It is possible to reduce scan time by changing the following PLC parameter settings e A Series CPU compatibility setting e Floating point arithmetic processing See Section 18 3 for details 14 21 15 ALLOCATING MULTIPLE CPU SYSTEM I O NUMBERS MELSEC Q 15 ALLOCATING MULTIPLE CPU SYSTEM I O NUMBERS 15 1 Concept behind Allocating I O Numbers Multiple CPU system ossess I O numbers to enable interactive transmission between the CPU modules and the I O modules and intelligent function modules and I O numbers to enable interactive transmission between the CPU modules 15 1 1 I O modules and intelligent function module I O numbers The difference with single CPU systems is the 00H position slot of the O number with multiple CPU system However the concept behind the sequence for aoea I O numbers the I O numbers for each slot and the I O numbers for empty slots is the same for both types of system See Chapter 5 Aora 1 0 Numbers for details on the concept behind the sequence for allocating I O numbers the I O numbers for each slot and the I O numbers for empty slots 1 OOH position for I O numbers a The number of slots set with the PLC parameters multiple CPU settings are occupied by the CPU modules on the multiple CPU system b Th
172. that the ON OFF status changes when the designated time has elapsed during the execution of the program Goes between ON and OFF in accordance with the number of seconds designated by SD414 When PLC power supply is turned OFF or a CPU module reset is performed goes from OFF to start Note that the ON OFF status changes when the designated time has elapsed during the execution of the program Switches between ON and OFF in accordance with the number of milliseconds designated by SD415 When PLC power supply is turned OFF or a CPU module reset is performed goes from OFF to start Note that the ON OFF status changes when the designated time has elapsed during the execution of the program e Relay repeats ON OFF switching at fixed scan intervals When PLC power supply is turned OFF or a CPU module reset is performed goes from OFF to start e The ON OFF intervals are set with the DUTY instruction DUTY ni n2 SM420 e For use with SM420 to SM424 low speed programs M9036 S Every END processing S Every END processing S Every END processing S Every END processing M9037 M9038 M9039 S Every END processing New o M9034 format change S Status change S Status change S Status change S Status change Every END processing Every END processing App 6 APPENDICES MELSEC Q Special Relay List 4 Scan info
173. the PLC Parameters dialog box e Memory card on which the parameters and programs are stored e Memory card mounted onto the High Performance model QCPU and the High Performance model QCPU switch settings POINT Perform Automatic write to standard ROM after the High Performance model QCPU control is suspended A suspension error BOOT OK Error Code 9020 occurs when automatic write to standard ROM is completed It is necessary to reset the High Performance model QCPU or restart the power supply to the PLC after Automatic write to standard ROM is completed 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 1 Execution procedure for Automatic write to standard ROM Observe the following procedure for Automatic write to standard ROM a Operations with the GX Developer Settings for Automatic write to Standard ROM 1 Check Auto Download all Data from Memory card to Standard ROM at the Boot file tab screen in the PLC Parameter dialog box Set the parameters and programs to be booted Set the Transfer from to Standard ROM QNH Parameter El Check Auto Download all Data from PE PLE en PL ef PLC AS Devi a l Memory card to Standard ROM oO aaa High spoed monitor aroa from oiher station JP Ksteps 015K step inline change area of mul tiple blocks inition ST 0 z K steps F Ais Bowricad al Data om Memow cadio Standard ROW Set the Tra
174. the PLC system tab screen in the PLC Parameter dialog box 4 RESET or LATCH CLEAR can be performed if the High Performance model QCPU changed to the STOP status by a remote operation x5 This includes a situation where the High Performance model QCPU is stopped due to error 2 Remote Operations from the Same GX Developers When remote operations are performed from the same GX Developer the status of the remote operation that is executed last will be effective 3 Remote Operations from Multiple GX Developers While a remote operation is being performed by one GX Developer another remote operation cannot be performed by another GX Developer After a remote operation that is being performed by one GX Developer is cancelled a new remote operation can be performed by another GX Developer For example a remote PAUSE operation is being performed by one GX Developer the PAUSE status will remain active even if a remote STOP remote RUN operation is attempted by another GX Developer When a remote RUN operation is performed by the GX Developer that is performing a remote PAUSE operation and then that remote operation is cancelled a new remote operation can be performed by another GX Developer 7 FUNCTION MELSEC Q 7 7 Selecting the Input Response Time of the Q Series Module I O Response Time 7 7 1 Selecting the response time of the input module 1 Selecting the response time of the input module The input response time of a Q
175. the 2nd step is ON Step No 2 lt ON gt 1 When the 2nd step is connected by the AND instruction As shown below the monitor execution condition is established when both X0 and X1 are ON Circuit mode List mode yo 2nd step 0 LD x2 1 AND if Y20 2 AND 3 OUT 2 When the 2nd step is connected between the AND ON blocks As shown below the monitor execution condition is established when X1 is ON Whether X0 is ON or OFF it does not affect the monitor execution condition 2nd ste OSE rao x p 1LD XI xo Xx x2 2 AND X2 0 Y20 3 OR X3 X3 4 ANB 5 OUT Y20 3 If the beginning of a ladder block not at Step 0 is specified in Step No as a detailed condition monitor data is collected when the execution status of the instruction immediately before execution becomes the specified status If Step No 2 lt ON gt is specified in the following ladder monitor data is collected when OUT Y10 turns ON xo OLD X0 oH a Y10 1 OUT Y10 2LD X1 3 OUT Y11 Y11 b When only Device is specified Word Device or Bit Device can be specified 1 When Word Device is selected The monitor data is sampled is when the current value of the specified word device becomes the specified value Type a current value in decimal digits or hexadecimal digits 2 When Bit Device is specified The monitor data is sampled is when the execution status of the specified bit device becomes the specified value
176. the CPU Goes ON when MSG instruction is executed In manual mode designates whether or not to force the SV value to match the PV value Selects whether only the general data process is performed for the execution of the COM instruction or the link refresh process is also performed Selects whether all refresh process or the refresh set with SD778 is performed when COM instruction is executed Determines whether to enable disable the local device in the program CALLED at CALL e Determines whether to enable disable the local device at the execution of interrupt programs Switches ON when the number of the CC Link dedicated instructions that can be executed simultaneously reaches 32 Switches OFF when the number goes below 32 Specifies whether the set value SV will be matched with the process value PV in the manual mode Explanation e Switches ON when the trace preparation is completed Goes ON when sampling trace is ready e Trace is started when this relay switches ON e Trace is suspended when this relay switches OFF All related special Ms switches OFF Sampling trace started when this goes ON Suspended when OFF Related special M all OFF e Switches ON during execution of trace Goes ON during execution of sampling trace e Trace is triggered when this relay switches from OFF to Identical to TRACE instruction execution status Sampling trace trigger goes ON when this goes from
177. the MC protocol For details of the MC protocol refer to the following manual Q Corresponding MELSEC Communication Protocol Reference Manual 1 When the END processing is performed for the scan where the remote PAUSE command was accepted the PAUSE status contact SM204 is turned on When the scan after the PAUSE status contact is turned on is executed to the END process it enters the PAUSE status and stops the calculations 2 When the remote RUN command is received the sequence program calculations are performed again from step 0 Remote PAUSE command Remote RUN command ON ON when PAUSE condition met SM204 RUN PAUSE status PAUSE status Fig 7 7 PAUSE Time Chart with GX Developer 3 Precaution To set the output Y ON OFF status when change to the PAUSE status perform an interlock with the PAUSE status contact SM204 M20 Y70 ON OFF is determined with the k Y070 gt on OFF of the M20 in the PAUSE status X000 SMP04 lt Y071 gt Turns off at PAUSE status lt Y072 Turns on at PAUSE status SM204 7 FUNCTION 7 6 3 Remote RESET MELSEC Q 1 What is Remote RESET a The remote RESET resets the High Performance model QCPU externally when the High Performance model QCPU is at STOP status Even if the High Performance model QCPU RUN STOP switch is at RUN the reset can be performed when the High Performance model QCPU i
178. the PLC parameter designate the file name of parameter and program to be read from the standard ROM In the program settings in the PLC parameter designate the name of the program to be executed and its execution condition Set the High Performance zosi model QCPU RUN STOP key to the STOP position then switch the power ON Connect the GX Developer to the High Performance model QCPU See Section 10 13 2 ERR LED switches ON MELSEC Q 12 3 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU 12 4 MELSEC Q 2 In PLC memory format in the GX Developer online mode select Program memory device memory and press Execute format the program memory In Write to PLC Flash ROM in the GX Developer online mode select Standard ROM and write the parameter data and crated program Use the High Performance model QCPU RESET L CLR switch to execute a reset High Performance modelQCPU If a boot file setting is not made BOOT LED switches ON or when writing parameters or programs onto the program memory the BOOT LED does not light up End 12 4 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q 12 2 Procedure for Multiple Programs This section describes the procedure for writing multiple programs split up according to function process designer to the High Performance m
179. the allowable device in the programming manual of each instruction for details Refer to Section 10 2 for the concept of the number of words of the devices used as local devices 10 65 10 65 10 EXPLANTION OF DEVICES Sequence program Local device For program A For program B For program C MELSEC Q d Local device designation 1 In order to use the above devices as local devices the usable local device range must be designated at the Device tab screen in the PLC Parameter dialog box Note that the range designated for local devices applies to all programs and cannot be changed for individual programs For example if the local device range is designated as MO to M100 this range will be used for local devices in all programs Mo Program A Program B Program C This range becomes Local device Local device Local device the local device range for all programs M100 To Te 2 When local device settings are designated the drive and file name 3 Program A where the local device data is to be stored must be designated at the PLC file tab screen in the PLC Parameter dialog box To write data from the GX Developer onto the High Performance model QCPU specify whether to use a local device at the PLC file tab screen in the PLC Parameter dialog box If a local device is not specified the local devices used for previously executed programs are selected This does not r
180. the bit devices Max 64 k points D 12 k points W 8 k points SW 2 k points No setting Only 1 range is designated for each device of B F V T ST Section 7 3 C D W Only 1 range is designated for each device of L B F V T No setting ST C D W Section 7 3 No setting n 1 range is designated for each device of M V T ST C Section 10 13 1 No setting Program name execution type fixed scan for fixed scan Section 4 2 execution file use setting I O refresh setting Do not clear the program memory Do not clear the program memory during boot f Section 6 6 2 during boot Clear the program memory during boot Type data name and source drive No setting The destination drive is automatically set in the program memory Do not execute automatic refresh to Do not execute automatic refresh to the standard ROM Section 6 6 2 the standard ROM Do not execute automatic refresh to the standard ROM a See the QCPU Q mode QnACPU Programming Manual Section 6 6 SFC 1 o 9 PARAMETER MELSEC Q Table 9 1 Parameter List continued I O assignment setting Designates the status of installation of each module of the system Designates the number of points of each slot Points Head XY aro Head I O number Designates the first input and output numbers of each slot Designates the model of the used main base unit and extension Base model name base unit Memorandum for users who do no
181. the first O number of an I O module that is removed replaced in the online status default value 1004 RS422 RS422 transmission transmission speed speed e Stores transmission speed of RS422 0 9600bps 1 19 2kbps 2 38 4kbps changed Number of e Indicates the number of mounted MELSECNET 10 modules or modules installed MELSECNET H modules MELSECNET H module Network Network No of mounted MELSECNET 10 module or No MELSECNET H module Group Group No of mounted MELSECNET 10 module or MELSECNET H number module Station Station No of mounted MELSECNET 10 module or MELSECNET H No module In the case of standby stations the module number of the standby S Initial station is stored 1 to 4 Information from te 5 i Configuration is identical to that for the 2nd module 2nd module Information from e Configuration is identical to that for the 3rd module 3rd module Information from e Configuration is identical to that for the 4th module 4th module APPENDICES MELSEC Q Special Register List Continued Set by N N M Expl wanes Sa ELL e When Xn0 of the mounted CC Link module turns ON the bit of the corresponding station turns to 1 ON When either Xn1 or XnF of the mounted CC Link module turns OFF the bit of the corresponding station turns to 1 ON e Turns to 1 ON when communication between the mounted CC Link module and CPU module cannot be made Information Information Infor
182. the high speed interrupt function choose PLC system System interrupt settings High speed interrupt setting on the PLC parameter screen 3 Detailed items of high speed interrupt function Interrupt program execution Runs the interrupt program created with 149 Updates I O signals between the I O intelligent function High speed I O refresh i f modules and CPU module at interrupt cycle intervals Updates data between the intelligent function module High speed buffer transfer buffer memories and CPU module devices at interrupt cycle intervals 7 FUNCTION MELSEC Q 7 22 1 High speed interrupt program execution The high speed interrupt program execution function is designed to run an interrupt program according to the setting of high speed interrupt pointer 149 Set the high speed interrupt pointer 149 at High speed interrupt 149 fixed scan interval after choosing PLC system System interrupt settings High speed interrupt setting on the PLC parameter screen High speed interrupt setting High d interrupt padaha ms 0 2ms 1 0ms 149 fixed scan interval Set within the range 0 2 to 1 0ms High speed 1 0 refresh setting Assignment method C Points Start Start End Type Points DEC _StartfHEX End HEX X input X input X input X input X input X input Y output Y output Y output Y output Y output Y output
183. the same way as a single CPU system It is possible to access non control modules in the following ways e Refresh the input for I O modules and intelligent function modules the PLC parameter multiple CPU setup is necessary e Read the intelligent function module s buffer memory Download the output data for the output module the I O combination module and the intelligent function modules the PLC parameter multiple CPU setup is necessary However it is not possible to access non control modules in the following ways e Outputting data to the output module and intelligent function module e Writing data into the intelligent function module s buffer memory 6 CPU 0 1 2 3 4 Power supply CPU module Input module Input module N CPU module E E Output module on Intelligent function module Input module x Intelligent function module rm Output module Possible to read with the CPU module2 Possible to read with the CPU module1 4 GX Developer access range a It is possible to write parameter programs and perform monitoring and tests in High Performance model QCPUs connected to personal computers To access High Performance model QCPUs that are not connected to personal computers specify the High Performance model QCPU to be accessed connection destination specification with the GX Developer It is possible for the GX Developer to access the High Performance model QCPU regardless of the
184. to specified serial communication modules and Ethernet modules when the power supply to the sequence is switched on or the High Performance model QCPU is reset b Amending and canceling remote passwords It is possible to amend and cancel remote passwords by connecting the GX Developer to the relevant High Performance model QCPU Remote passwords set in the High Performance model QCPU can be amended or cancelled by setting up an amended password or canceling a remote password with the GX Developer Remote passwords cannot be amended or cancelled from a remote location For example an outline of what will happen when a remote passwords is set up amended or cancelled from an Ethernet module is shown below GX Developer Ethernet Power supply N CPU module D The remote password is transmitted to QJ71E71 when the power is switched on or the system reset A check is run on the remote password The remote password is set up amended or cancelled and the result written in the High Performance model QCPU GX Developer 7 FUNCTION MELSEC Q 2 Remote password lock unlock processing Unlocks the Ethernet module remote passwords for the access source via modems serial communication modules and the Ethernet Access to the High Performance model QCPU is enabled if the remote password matches up For example an outline of what will happen during remote password lock unlock processing with an Etherne
185. trace results appears in Trace results display Sampling trace is executed only once When re executing execute the TRACE instruction and reset the sampling 3 Precautions a SRAM card is required for sampling trace Set the sampling trace file in the memory card SRAM b The sampling trace can be executed from other station on the network or serial communication module However the trace cannot be executed from multiple areas at once The trace can only be executed from one area with High Performance model QCPU c The trace information trace file registered in the High Performance model QCPU is registered in the SRAM card and latched As the condition data is stored in the trace file even if the power is off or the High Performance model QCPU is reset the sampling trace can be executed under registered trace conditions At power on reset of High Performance model QCPU latched trace information is cleared in the cases where e The SRAM card registered in a trace file is not inserted e The trace file is corrupted This requires registering trace information once again by operating from GX Developer To clear data perform the latch clear operation with the RESET L CLR switch To perform sampling trace again after latch clear execute sampling trace after selecting Regist trace d This is performed by connecting the High Performance model QCPU and GX Developer e While in STOP status the High Performance model Q
186. used by the CPU module when accessing the I O module and intelligent function module and this bus cannot be used by plural CPU module at the same time The CPU modules that attempted buss access afterwards when plural CPU module use the bus simultaneously will assume the Standby status until processing for the CPU module that executed the procedure first has been completed This Standby status the amount of time the CPU module must wait will cause delays in input and output on the multiple CPU system and result in extended scan times See Chapter 18 for details on extended scan times Maximum standby time The host CPU will reach the maximum standby time in the following cases with a multiple CPU system e When four CPU modules are used on the multiple CPU system e When additional base units are in use e When intelligent function modules that possess vast quantities of data are mounted onto additional base units e When four CPU modules simultaneously access modules mounted onto additional base units Reducing the time required for multiple CPU system processing The following methods are available for reducing the amount of time required for multiple CPU system processing Combine modules with many access points such as MELSECNET H and CC LINK refresh etc together into a main base unit Set modules with many access points such as MELSECNET H and CC LINK refresh etc as control module on a single CPU module and ensure
187. used for each sequence program 2 Determine if the file register capacity exceeds the number of points used on the basis of the total file register sequence program Program example 1 capacity set in SD647 in the The file register range of use is checked at the beginning of each program Designates 4k points SD647 yey Mo gt H lt vo gt SM400 lt MO MO Transfer command H MOVP K4x20 Ro H Program example 2 Final file register range check Alarm processing Writing to file register The file register range of use is checked after executing the QDRSET instruction c SORET 1 aacp SM400 lt mo lt SD647 K4 lt Yo MO Transfer command MOVP K4X20 RO Program example 3 For block switching SM400 lt SD647 k33 lt mo gt H Mo lt w MO Block switching command RSET KI H l L 3 Deleting a File Register File register is changed to drive 1 ABCD Final file register range check Alarm processing Writing to file register Final file register range check Alarm processing Switching to block 1 To erase unwanted file register files perform the PLC data deletion online 10 52 10 52 10 EXPLANTION OF DEVICES MELSEC Q 10 8 Nesting N 1 Definition Nesting devices are used to nest MC or MCR master control instructions when programming operating conditions 2 Designation method wit
188. written into the CPU shared memory of the host CPU with instructions that use UD GD g SP UNIT ERROR error code 2114 occurs if data is read from the CPU shared memory of the host CPU with the FROM instruction and instructions that use UD GU h SP UNIT ERROR error code 2110 also occurs if access is attempted on a non mounted CPU with instructions that use UD GU 16 10 16 10 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 16 3 Interactive Communications between The High Performance model QCPU and Motion CPU 16 3 1 Control commands from the High Performance model QCPU to the Motion CPU It is possible to issue control commands from the High Performance model QCPU to the Motion CPU and read and write device data with the Motion dedicated CPU instructions listed below Control commands from Motion CPU to Motion CPU can not be used Instruction name Description S SFCS R f the moti SP SFCS equests startup of the motion SFC program ious Requests the start of operations for the servo program SP SVST q p program SP CHGV the real mode SP CHGA and the cam axes For example it is possible to start up the Motion CPU s motion SFC from the High Performance model QCPU with the S P SFCS instruction High Performance model QOPU Motion SFC Startup request Motion SFC S SFCS instruction One High Performance model QCPU module can operate up to 32 Motion dedicated CPU instructions
189. 0 SD778 1 0 0 TEE i 1 0 refresh CC Link refresh MELSECNETHH refresh Automatic refresh of intelligent function modules b15 bit 0 General data processing executed 1 General data processing QCPU Serial number 04012 or later Automatic refresh of CPU shared memory Execution non execution of not general data processing executed App 41 App 41 APPENDICES MELSEC Q Special Register List 7 Debug Remaining No of imul ne ae e Stores the remaining number of simultaneous execution of the CC One Diese Link dedicated instructions CC Link f dedicated instruction Stores the mask patterns masked by the IMASK instruction as follows b15 bi bO SD781 163 149 148 Mask pattern SD782 179 165 164 PID limi ial QCPU i Serial No fi for 05032 incomplete or later derivative Corresponding ACPU DTT Corresponding Expl i xplanation CPU Mask pattern of IMASK instruction S During execution Stores file name with extension from point in time when status latch was conducted as ASCII code b15 to b8 b7 to bO Status latch file name Status latch file name SD806 SD807 SD808 SD809 SD810 SD811 Second character First character Fourth character Third character Sixth character Fifth character Eighth character seventh character First character of
190. 1 Interrupt C J errupt progra program Fp ee IRET END a Read write of the local devices L_ Local devices used by Local devices used by the file name ABC the file name DEF For details on SM777 see Appendix 1 10 68 10 68 10 EXPLANTION OF DEVICES MELSEC Q 2 Cautions e If SM777 is ON the local device data is read before the interrupt fixed scan execution type program is executed and the local device data is saved after the execution of the IRET instruction Accordingly scan time increases when an interrupt fixed scan execution type program is executed once with the setting of SM777 ON See Section 10 13 1 e ON OFF setting of SM777 is enabled in CPU module units Setting in file unit is not enabled e If the ON OFF setting of SM777 is changed while a sequence program is executed the control is made according to the information after change g Clearing the Local Device Data The local device data is cleared in the following cases where 1 The PLC is powered on or the CPU module is reset 2 The CPU module enters into the RUN status from the STOP status The local device data cannot be cleared by operating from the GX Developer To clear the local device data follow the above listed steps 1 and 2 10 69 10 69 10 EXPLANTION OF DEVICES MELSEC Q 10 13 2 Device initial values 1 Definition a Using device
191. 1 Q61P A2 Q62P or Q64P cannot be used as a power supply module 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q 2 Configuration of peripheral devices MELSEG L J Memory card 1 High Performance model QCPU USB cable 1 To be procured yourself Q2MEM 1MBS Q2MEM 2MBS Q02CPU Q02HCPU Q06HCPU Only Q02HCPU QO6BHCPU Q2MEM 2MBF Q2MEM 4MBF Q12HCPU Q25HCPU Q12HCPU and Q25HCPU can be used Q2MEM 8MBA Q2MEM 16MBA 4 Q2MEM 32MBA RS 232 cable QC30R2 Personal Computer PC card adapter GX Developer Version 4 or later Q2MEM ADP SW4D5C GPPW E x1 For writing into memory card on GX Developer and USB cable refer to the operating manual of the GX Developer 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q 3 Outline of system configuration a When main base unit Q3__B is used Main base unit Q312B Power supply module 2 3 4 5 6 7 8 9 1011 Slot No Extension cable Extension base unit Q612B i Power supply module The figure shows the configuration ee 12 13 14 15 16 17 18 19 20 21 22 ome g 180 1A0 1C0 1E0 200 220 240 260 280 2A0 2c0 when 32 I O modules are SISTSTSTSTSTSTS TS loaded to each slot 19F 1BF 1DFH1FF 21F 23F 25F 27F 29F 2BF 2DF Extension base unit Q68B Extension base unit QA1S68B Power supply module Power supply module g J 24 25 26
192. 1 second later The low speed timer measures time in 100 ms units Time chart ON XO OFF h ON TO coil OFF 1s H oN TO contact OFF 2 Measurement units a The default time measurement units setting for low speed timers is 100 ms b The time measurement units setting can be designated in 1 ms units within a 1 ms to 1000 ms range This setting is designated at the PLC system tab screen in the PLC Parameter dialog box 10 19 10 EXPLANTION OF DEVICES MELSEC Q 1 Definition a High speed timers are valid only while the coil is ON A high speed timer is marked with a symbol H b The time measurement begins when the timer s coil switches ON and the contact switches ON when the time elapses When the timer s coil switches OFF the current value becomes 0 and the contact switches OFF Ladder example High speed timer display XO H K200 When XO switches ON the T200 coil switches ON and the contact switches ON 2 second later The high speed timer measures time in 10 ms units T200 Time chart XO T200 coil T200 contact OFF y 2 Measurement units a The default time measurement units setting for high speed timers is 10 ms b The time measurement units setting can be designated in 0 1ms units within a 0 1 ms to 100 ms range This setting is designated at the PLC system tab screen in the PLC Parameter dialog box 10 20 10 20 10 EX
193. 10 1 Device List Default Values Parameter Reference Class Type Device Name Designated Number of Points Range Used Section Setting Range Internal user Changeable wihin or 102 devices 29k words 3 2048 points TO to T2047 5 Section 10 2 10 Retentive timer 1 STO to ST2047 1024 points CO to C1023 Section 10 2 11 Word devices Data register 12288 points DO to D12287 Section 10 2 12 Link register 8192 points Wo to W1FFF Section 10 2 13 Link special register 1 2048 points SWO to SW7FF Section 10 2 14 Special relay 2048 points SMO to SM2047 FDO to FD4 Special register 2048 points SDO to SD2047 L L nk relay x1 8192 points Jn XO to Jn X1 FFF Link output 8192 points n Y0 to Jn Y1FFF ink rela i r 2 Unchangeable Section 10 3 2 Section 10 3 1 Section 10 3 3 Function input FXO to FXF 4 Section 10 3 1 Bit devices Function output FYO to FYF 4 Section 10 3 1 Unchangeable J Link relay 16384 points Jn B0 to Jn B3FFF Link special relay 512 points JNn SBO to Jn SB1FF S 16384 points JmWO to JniW3FFF Link special register 512 points Jn SW0 to Jn SW1FF Link direct devices Section 10 4 10 1 10 1 10 10 EXPLANTION OF DEVICES MELSEC Q Default Values Parameter Reference Device Name Designated Number of Points Range Used p Section Setting Range Buff i 65536 poi re Unch bl Section 10 5 uffer register points Un G65535 2 nchangeable ection 10 Word device Index register 16 p
194. 16 bits Therefore the numeric values expressed in hexadecimal notation can be stored in each register within 0 to FFFFu range 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 8 3 BCD Binary Coded Decimal 1 BCD notation BCD notation is binary expression with a carry similar to that of the decimal notation Though it uses 4 bit representation like hexadecimal notation it dose not use letters A to F Table 4 4 gives numeric expressions by binary BCD and decimal notations Table 4 4 Comparison of BIN BCD and DEC Numeric Expressions BCD DEC Decimal BIN Bi Deemal inary Binary Coded Decimal 0 1 2 3 4 5 6 7 8 9 Carry _a ot N 2 BCD numeric expression High Performance model QCPU registers data registers link registers etc consist of 16 bits Therefore the numeric values expressed in BCD notation can be stored in each register within 0 to 9999 range 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 8 4 Real numbers floating decimal point data 1 Real numbers Real numbers are single precision floating decimal point data 2 Internal expression of floating decimal point data The High Performance model QCPU s internal expression of received real number data is explained below Real number data is expressed as shown below using 2 word devices 1 Mantissa x 2 characteristic The bit configuration used for inter
195. 19 D1404 indicating the numbers are stored D9120 i Also detects I O module information baza D1405 119 module te b15b14b13b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 bi bO D9121 sD1406 verification D9116 0 G S Error D9122 O Rem D1407_ error 0 No VO D9123 D1408 verification D9117 0 errors ey 1 O verification P9123 0 ayy 7 New to New error present t Indicates an I O module verification error DIN jojojo W n v Jno e Not cleared even if the blown fuse is replaced with a new one This flag is cleared by error resetting operation 13 For redundant systems Host system CPU information 1 for Q4AR only D1510 to SD1599 are only valid for redundant systems They are all set to 0 for standalone systems Corresponding be TT Set the basic period 1 second units use for the process Basic period control instruction using floating point data Basic period iome Floating points data SD1501 SD1500 Process control Process control instruction detail instruction detail error code error code Process control Process control instruction instruction e Shows the error process block that occurred in the process S Error New Q4AR generated error generated error control instruction occurrence location location Operation mode Hot start switch Shows the power out time S during the automatic switch during CPU bower our nie f
196. 2 CPU 2 No 3 CPU 3 No 4 CPU 4 information 2 If a fuse blown or I O verify error occurred in the module loaded in the MELSECNET H remote O station the network number is stored into the upper 8 bits and the station number into the lower 8 bits Use the I O No to check the module where the fuse blown or I O verify error occurred File name Drive name Example Number Meaning ABCDEFGH IJK SD5 Drive b15 to b8 b7 to b0 SD6 42H B 41H A SD7 File name 44H D 43H C SD8 ASCII code 8 characters 46H F 45H E SD9 48H H 47H G SD10 Extension 3 2EH 49H I 2EH SD11 ASCII code 3 characters 4BH K 4AH J SD12 SD13 SD14 SD15 Vacant 3 Refer to REMARK 1 Extensions are shown below her Se i Higher8 bits Lowers bits Higher bits Etension name Filetype Pp SIH TH aH y QT Deviceinitialvalue po SIH TAHT SAH QDR Fileregister o Simulation data App 24 App 24 APPENDICES MELSEC Q Special Register List Continued Set by Corresponding emer mamo eanna paidi nen AGEI earns Time value set Meaning D Time 1 us units 0 to 999 us Time 1 ms units 0 to 65535 ms ram error location Meaning File name ASCII code 8 characters Extension 2EH ASCII c
197. 2 is during a stop error LC No 3 normal Goes OFF when the PLC No 3 is normal including a LC No 3 during s continuation error Comes ON when the PLC No 3 is during a stop error LC No 4 normal Goes OFF when the PLC No 4 is normal including a 4 during s continuation error error e Comes ON when the PLC No 4 is during a stop error No 2 CPU reset 2 reset cancel flag 2 resetting No 3 CPU reset i 3 reset cancel flag 3 3 resetting No 4 CPU reset 4 reset cancel flag 4 resetting No 1 CPU error flag No 2 CPU error flag No 3 CPU error flag No 4 CPU error flag App 3 App 3 APPENDICES MELSEC Q Special Relay List Continued Explanation When Set Max loaded I O OFF Ignored e When this relay goes from OFF to ON maximum loaded das ON Read VO number is read to SD250 y New seus OFF No replacement VO change flag ON Replacement All stations OFF Refresh arrival station refresh command JON Refresh all stations OFF Operative network MELSECNET 10 ON Standby network module 1 information OFF Writes ON Does not write OFF Operative network MELSECNET 10 ON Standby network module 2 information OFF Operative network MELSECNET 10 ON Standby network module 3 information OFF Operative network MELSECNET 10 ON Standby network module 4 information OFF Normal ON Error 280 CC Link erro
198. 2092 or later 128k points Refer to Section 2 3 to confirm the function version and serial number of the High Performance model QCPU 1 OVERVIEW MELSEC Q 9 Data can be written automatically to standard ROM You need not use GX Developer to write parameters programs on a memory card to the standard ROM of the High Performance model QCPU When the standard ROM is used to perform ROM operation you can load a memory card into the High Performance model QCPU and write parameters programs on the memory card to the standard ROM Hence you need not carry GX Developer personal computer to rewrite the parameters programs 10 External I O can be turned ON OFF forcibly If the High Performance model QCPU is in the RUN mode you can operate GX Developer to turn external inputs outputs ON OFF forcibly independently of the program execution status You need not put the High Performance model QCPU in the STOP mode to perform wiring operation tests by forced ON OFF of outputs 11 Remote password can be set When access to an Ethernet module or serial communication module is made externally whether access to the High Performance model QCPU can be made or not can be selected with a remote password 12 Remote I O network of MELSECNET H can be configured You can load the remote master station of the MELSECNET H to configure an MELSECNET H remote I O system 13 PC CPU module compatibility in multiple CPU system configuration The H
199. 25 SET F2047 RST F25 LOO RE RAE Re GO sp62 o0 f 50 50 50 gt 50 SD63 0 gt 1 gt 2 gt 3 2 SD64 0 gt 50 50 50 50 SD65 0 0 25 25 2047 SD66 0 0 0 2047 Pa 0 SD67 0 0 0 0 a 0 SD79 0 0 0 0 0 3 Processing by High Performance model QCPU If all SD64 to SD79 anunciator Nos are switched OFF the USER LED on the High Performance model QCPU front display is switched OFF If an error occurs to continue operation with the higher priority over an anunciator when the anunciator is switched ON eliminate the error by executing an LEDR instruction See Section 7 20 2 for priority In this case executing an LEDR instruction will not switch the anunciator OFF To switch the anunciator OFF you must first eliminate the error before executing the LEDR instruction because the error takes priority over the anunciator 10 15 10 15 10 EXPLANTION OF DEVICES MELSEC Q 10 2 6 Edge relay V 1 Definition a An edge relay is a device which stores the operation results ON OFF information from the beginning of the ladder block Edge relays can only be used at contacts and cannot be used as coils xo Xt xo vi Edge relay Stores the X0 X1 and X10 operation results b The same edge relay number cannot be used twice in programs executed by the High Performance model QCPU 2 Edge relay applications Edge relays are used for detecti
200. 3 0800 0801 Setting 2 In the case of link registers Change screens Send range for each PLC PLC side device PLC PLC share memory G Point Stat End Stat End e The same devices can be specified for settings 1 to 4 However as setting 1 in the illustration on the left uses CEE SSS SSS Sas SSS 160 points between BO and BOF ce OR BAO and higher can be used for setting 3 No part of a device number can be Setting 3 In the case of link relays duplicated as shown with BO to B9F on setting 1 and B90 to B10F on setting 3 Change screens Setting 3 x Send range for each PLC PLC share memory G Point Stat End Statt__ __End _ 0812 0813 B120 B13F 0804 0807 B140 B17F 0802 0805 B180 B1BF UR c HS The first and last will be calculated automatically with the GX Developer 16 5 16 5 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q Each of the setting 1 to setting 4 devices can be set up independently For example the CPU No 1 can be set up as a link relay and the CPU No 2 can be set up as an internal relay Refresh setting for CPU No 1 Change screens Setting 1 Setting 2 fxg Change screens ice send range for each PLC PLC side device End e When the CPU No 1 and CPU No 2 devices PLC PLC share memory G Dev starting woj BTF have been set up with different devices A Pont Poset Ed sit _ Ea ney eN w o wo w not 16 oeoa
201. 3A Q4A Q4AR U END M9094 OFF Replacement prohibited e N I O change OK ON Replacement enabled Goes ON when I O replacement is OK S END U S Initial U S Status change QCPU Remote TEN S Initial M9100 Initial S Initial M9101 U format change App 4 APPENDICES MELSEC Q Special Relay List Continued Explanation When Set OFF Restart SFC program start status Presence absenc e of continuous transition for entire block Continuous transition prevention flag Output mode at block stop SFC device clear mode Output during end step execution Operation mode for low speed execution type program Normal SFC program execution status Program execution management SFC program execution status Access execution flag App 5 ON ON Initial start Continuous transition not effective Continuous transition effective When transition is executed When no transition OFF Preserves Clear device Preserves device OFF Preserves Asynchronous mode Synchronous mode Not executed Being executed Not executed Being executed ON indicates completion of intelligent function module access Initial value is set at ON or OFF depending on parameters When this relay is OFF all execution status are cleared from time SFC program was stopped starts from the initial step of block where the start
202. 3Zpt Unmo wti ng Unmo unti ng Unmo until ng Unmo unti 25 ng l l t4 b Parameter status I 0 Address QOZHCPU Diagnostics Module s Detailed Information Base Information Product Inf List g r Status im Module system error E Module error O Module warning Start monitor Stop monitor Close a b c a Installed status Enables the controlling CPU the model an07 d the number of modules mounted onto the selected base unit to be confirmed Not installed will be displayed for slots in which modules have not been mounted When slots have been set as Empty at the I O assignment tab screen in the PLC Parameter dialog box the module s model will not be displayed when if a module has been mounted Parameter status Enables the I O number the module type and the number of modules mounted for each of the slots on the selected base unit to be confirmed If the operation status shows 0 empty points and an allocation error is displayed it means that the PLC parameter s I O allocation and the actual status are different In this event align the PLC parameter s I O allocation with the actual status by allocating an I O Base Enables the status of the modules mounted onto the base unit in use to be confirmed The stat
203. 3th character 16th character 15th character 18th character 17th character 20th character 19th character 22nd character 21st character 24th character 23rd character 26th character 25th character 28th character 27th character 30th character 29th character 32nd character 31st character 34th character 33rd character 36th character 35th character 38th character 37th character 40th character 39th character 42nd character 41st character 44th character 43rd character 46th character 45th character 48th character 47th character 50th character 49th character 52nd character 51st character 54th character 53rd character 56th character 55th character 58th character 57th character 60th character 59th character 62nd character 61st character 64th character 63rd character Designate the limit for each PID loop as follows b15 to b1 SD774 Loop16 to Loop2 D775 Loop32 to Loop18 Selects whether or not the data is refreshed when the COM instruction is executed MELSEC Q Corresponding t ACPU Corresponding D9 S During execution 1 Refresh Designation of SD778 is made valid when SM775 turns ON Refresh processing selection when the COM instruction is executed b15b14 to b5b4 b3 b2 b1 b
204. 4 14 14 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM 14 15 MELSEC Q After parameters such as multiple CPU settings are changed reflect the changes to keep uniformity among all CPUs in the multiple CPU system then reset the CPU No 1 It is possible to transfer across and use the CPU settings and I O Assignments set up for other projects with GX Developer See section 19 2 3 for details on transferring and using multiple CPU settings and I O Assignments a Number of CPUs setting Setup necessary 1 The number of CPU modules to be used on a multiple CPU system are set at the PLC parameter s Multiple CPU settings screen in the PLC Parameter dialog indicated with the A arrow Multiple CPU settings A No of PLCS Meee 4 Operating mode Error operation mode at the stop of PLC FZ All station stop by stop error of PLC I All station stop by stop error of PLC2 F All station stop by stop error of PLCS F All station stop by stop error of PLC4 Settings should be set as same when using multiple CPU Online module change I Enable online module change with another PLC le change is hate with another PLC e ti F at c IT All CPUs can read all output Refresh settings Change screens Setting1 Send range for each PLC PLC side device PLC The auto refresh area Caution Dev starting Point Start End Start End No 1 fi No 2 o No 3 o No 4 o
205. 49 to 64 hee J aot Loe el i Forward loopback e Loopback in forward loop only Reverse loopback Forward loopback e Loopback in reverse loop only T Station 1 Station 2 i I I ene EA ey Oe Ge A c A IL J4 PR Ee A Meni Stores the local or remote I O station number at which loopback is being executed Station 2 T Pees See ol ie Se eee Se ed Forward loopback Reverse loopback In the above example 1 is stored into D9205 and 3 into D9206 If data link returns to normal status data link in forward loop values in D9205 and D9206 remain 1 and 3 To return them to 0 therefore use a sequence program or perform reset operation Stores the number of retry times due to transmission error Count stops at maximum of FFFFH To return the value to 0 perform reset operation Stores the number of times the loop line has been switched to reverse loop or loopback Count stops at maximum of FFFFH To return the value to 0 perform reset operation Stores the local station numbers which are in STOP or PAUSE mode Device number b15 b14 b13 b12 b11 b10 b9 b6 b5 b4 b1 D1212 L16 L15 L14 L13 L12 L11 L10 L7 L6 L5 L2 D1213 L32 L31 L30 L29 L28 L27 L26 L25 L23 L22 L21 L18 D1214 L48 L47 L46 L45 L44 L43 L42 L41 L39 L38 L37 L34 D1215 L64 L63 L62 L61 L60 L59 L58 L57 L55 L54 L53 L50 When a local station is switched to STOP or PAUSE mode the bit corresponding to the station nu
206. 5 7 FUNCTION MELSEC Q 7 13 2 Interrupt program monitor list 1 What is Interrupt Program Monitor List a This function displays execution count of the interrupt program l0 to 1255 b This is used to confirm the execution status of the interrupt program 2 Using the Interrupt Program Monitor List Choose Online Monitor Interrupt program monitor list The Interrupt Program Monitor List dialog box appears on screen The following shows an execution example of the interrupt program monitor list Interrupt program monitor list Cut in pointer Common comment 2512 100ms 6280 40ms 12560 20ms 0 0 0 0 0 0 0 0 0 0 0 0 0 a Execute count The number of times the interrupt program was executed is displayed This function starts counting the number when High Performance model QCPU is in RUN status When the number reaches 65536 times it is reset to 0 b Common Comment This indicates device comments created on interrupt points 10 to 1255 7 FUNCTION MELSEC Q 7 13 3 Scan time measurement 1 What is Scan Time Measurement a This function displays the set program interval processing time b To specify a scan time measurement range follow either of the following two steps e Make the setting on the Ladder monitor window e Make the setting on the Scan Time Measurement dialog box c The time for the subroutines and interrupt program can be measured as well
207. 7 13 1 to 7 13 3 e Program monitor list e Interrupt program monitor list e Scan time measurement 7 13 1 Program monitor list 1 What is Program Monitor List a This is a function to display the processing time of the program being executed b The scan time number of times executed and processing time by item can be displayed for each program 2 Using the Program Monitor List a Choose Online Monitor Program monitor list Program Monitor List dialog box appears on screen b The following shows an example of executing program monitor list b Program monitor list a gt Total scan time Scan execution part detailed scan time IEEE END operation tne Low speed programines a c gt Each program execution status Progam Erecue Scan tinefna Execute cout T MAINT Scan 0 000 MAIN4 Low speed 0 000 pan Sree a Startup program Stop program Close 7 FUNCTION MELSEC Q a Total Scan Time The monitor time set in WDT the watch dog timer of PLC RAS tab screen in the PLC Parameter dialog box and total scan time for each program type are displayed e Monitor Time The monitoring time for the scan execution type program initialization program and low speed execution type program are displayed If the scan time exceeds this time the High Performance model QCPU displays the watch dog timer error Sum of Scan Time The total time in each item
208. 8192 points max X YO to 1FFF as the number of I O devices which can be used in the remote I O stations such as MELSECNET H remote I O NET CC Link data link and MELSECNET MINI S3 data link 2 Lineup according to program capacity The optimum CPU module for the program capacity to be used can be selected Q02CPU QO2HCPU 28k step QO6HCPU 60k step Q12HCPU 124k step Q25HCPU 252k step 3 Realised high speed processing Depending on the type of the sequencer high speed processing has been realized Example when LD instruction is used Q02CPU 0 079US QO2HCPU QO6HCPU Q12HCPU Q25HCPU 0 034uUs In addition an access to the intelligent function module or an increase in speed of the link refresh of the network have been realized by the connection system System bus connection of the newly developed base unit Access to the intelligent function module 20s word approx 7 times 1 MELSECNETHH link refresh processing 4 6ms 8k word approx 4 3 times 1 1 Where QO2HCPU is compared with Q2ASHCPU S1 4 Increase in debugging efficiency through high speed communication with GX Developer In the High Performance model QCPU a time required for writing reading of a program or monitoring has been reduced through the high speed communication at a speed of 115 2kbps max by the RS 232 and a communication time efficiency at the time of debugging has been increased In the QO2HCPU QO6HCPU Q12HCPU and Q25HCPU a high speed co
209. 904 poner oss power loss SD90 a e arac e character Shes ite es 2EH Sp905 extension 3rd character of 2nd character of SD906 SD906 extension extension i D910 D911 D912 D913 D914 D915 D916 D917 D918 D919 D920 D921 D922 D923 D924 D925 DNIN D H Jaja S S S njo NIM n App 43 RKEY input RKEY input Stored in sequence that PU key code was entered SD910 SD911 SD912 SD913 SD914 SD915 SD916 SD917 SD918 SD919 SD920 SD921 SD922 SD923 SD924 SD925 b15 to b8 b7 to bO 2nd character 1st character 4th character 3rd character 6th character 5th character 8th character 7th character 10th character 9th character 12th character 11th character 14th character 13th character 16th character 15th character 18th character 17th character 20th character 19th character 22nd character 21st character 24th character 23rd character 26th character 25th character 28th character 27th character 30th character 29th character 32nd character 31st character S During execution App 43 APPENDICES MELSEC Q 9 A to Q QnA conversion correspondences ACPU special registers D9000 to D9255 correspond to the special registers SD1000 to SD1255 after A series to the Q QnA series conversion These special registers are all set by the system and users
210. B is monitored EX In case that the local device is from DO to D10 DO 4 is displayed when X10 is on and D9 8 is displayed Personal computer when X11 is on Install the GX Developer 7 FUNCTION MELSEC Q 2 Monitoring the Local Devices Monitor local devices in the following steps Connect the personral computer to the CPU module Display the circuit in the circuit mode Change the mode to the monitor mode Select Tool Select Option e e e Display option window Select Program type e e e e Change to the option selection window by program Select Monitor to monitor i i the local device e e e e Setting of the local device monitor The local device of the displayed program is monitored 3 Precautions a Itis only a single program that local devices can be monitored or tested by operating from a single GX Developer Local devices in multiple programs cannot be monitored or tested by operating from a single GX Developer b Itis a maximum of 16 programs that local devices can be monitored or tested by operating from multiple GX Developers connected to a RS 232 serial communication module of the High Performance model QCPU c If local devices in a stand by type program are monitored scan time is extended for some time because local device data is read and saved See Section 10 13 1 for details d Local devices in a fix scan execution type pro
211. C Link system x1 See Section 4 7 1 for details on the refresh mode 10 9 10 9 10 EXPLANTION OF DEVICES MELSEC Q 10 2 3 Internal relays M 1 Definition a Internal relays are auxiliary relays which cannot be latched by the programmable controller s internal latch memory backup All internal relays are switched OFF at the following times e When power is switched from OFF to ON e When reset occurs e When latch clear operation is executed b There are no restrictions on the number of contacts N O contacts N C contacts used in the program provided the program capacity is not exceded No restrictions on the quantity used MO switches ON at X0 OFF to ON SET MO The internal relay MO ON can only be used for internal High Performance model QCPU processing and cannot K20 be output externally TO MO ON OFF information is output from the output module to an external destination Figure 10 5 Internal Relay 2 Procedure for external outputs Outputs Y are used to output Sequence program operation results to an external destination Latch relays L should be used when a latch memory backup is required See Section 10 2 4 for details on latch relays 10 10 10 10 10 EXPLANTION OF DEVICES 10 2 4 Latch relays L MELSEC Q 1 Definition a Latch relays are auxiliary relays which can be latched by the programmable b c controller s internal latch memory backup Latch re
212. C parameter error SFC PARA ERROR When switched from STOP to RUN Intelligent funiein module SP PARA ERROR e When the power is turned on when reset parameter error 1 Can be changed to Continue in the GX Developer function parameter setting 2 Can be set to No in the GX Developer function parameter setting Also checking is not performed when SM251 is on 3 Can be set to No in the GX Developer function parameter setting 7 65 7 FUNCTION MELSEC Q Self Diagnosis List Continued from the preceding page Diagnosis description Diagnostic timing When the power is turned on when reset P REMOTE PASS ERR Paswodenr fevomerassemn f When switched from STOP to RUN e When the power is turned on when reset e When switched from STOP to RUN e When an instruction is executed e When the power is turned on when reset No END i i MISSING END INS SaNa s e When switched from STOP to RUN e When the power is turned on when reset Poi i AN T SET P S SETE When switched from STOP to RUN e When the power is turned on when reset Poi i AN T SET I When switched from STOP to RUN Operati n check error Default Stop OPERATION ERROR When an instruction is executed FOR to NEXT i ee to instruction structure FOR NEXT ERROR CALL to RET instruction structure F et Program error CAN T EXECUTE P When an instruction is executed ISFCP FORMATERR FORMAT ERR When switched When switched from STOPtoRUN STOP to RUN SFC op
213. C program execution error AEE o FILE OPE ERROR File access error penn pcan Low speed execution monitoring time time up CHK instruction o E TEn 1 When leaving the LED turned off at the error described above set the factor number setting area each 4 bits which stores the factor number corresponding to SD207 to SD209 to 0 Example To leave the ERR LED off when a fuse shutoff error is detected set the factor number setting area to 0 where the error number is 2 x D209 gt SD208 gt k 5D207 0 0 A 9 8 7 6 5 4 3 0 1 Because the factor number 2 is not set the ERR LED remains off even if the fuse shutoff is detected In this case even if another error with the factor number 2 I O module verify error or intelligent function module verify error is detected the ERR LED remains off 2 Even if the LED is set to be turned off error code storage is performed for SMO Diagnostic error flag on SM1 self diagnosis flag on and SDO CPU diagnostic error register 7 FUNCTION MELSEC Q 7 22 High Speed Interrupt Function When an interrupt program is created using the interrupt pointer 149 the QnHCPU can run a program by making high speed fixed cycle interrupts at intervals of 0 2ms to 1 0ms And the QnHCPU improves the I O response by refreshing the I O signals and intelligent function module buffer memories in the parameter set ranges before and after the
214. C30B QC50B QC100B B is used MELSEC Q Battery Q6BAT noemi ae tL LITHIUM BATTERY Battery holder Battery Q7BAT Q7BAT SET Power supply module 6 1 O module Intelligent function module of he Q Series Extension of the Q Series module Q5 Q52B Q55B B extension base unit Q6LB extension base unit Q63B Q65B Q68B Q612B ecg Power supply module x4 1 O module Intelligent function module of the Q Series module the I O module and the special function module x3 x4 5 6 supply module Q61SP cannot be used D The additional QA1S65B and QA1S68B base units are used as the AnS Series power supply For further information on PC CPU module consult CONTEC Co Ltd Tel 81 6 6472 7130 The Q Series power supply module is not required for the Q5LB extension base unit The motion CPU and PC CPU module do not accept a battery As a power supply module use the Q61P A1 Q61P A2 Q62P or Q64P The slim type power 14 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM b MITSUBISHI Memory card 1 Q2MEM 1MBS Q2MEM 2MBS Q2MEM 2MBF Q2MEM 4MBF Q2MEM 8MBA Q2MEM 16MBA Q2MEM 32MBA When slim type main base unit Q3 MELSEC Q SB is u
215. COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 2 Precautions a The following values are set in the CPU module s first O number with the FROM instruction the S TO instruction and instructions that use UD GO PLC No PLC No 1 PLC No 2 PLC No 3 PLC No 4 Value set in the first VO number b Do not perform writing as reading in the system area or automatic refresh area for the CPU shared memory see Section 16 4 c An error will not occur when CPUs accessed with the FROM instruction the S TO instruction and instructions that use UL GO are reset However access execution flag SM390 will remain OFF when instruction execution has been completed d Establish an interlock to prevent simultaneous access during interactive data communication with the FROM instruction the S TO instruction and instructions that use UD GO There are cases where old data and new data will be mixed together if simultaneous access is carried out e The instruction that uses the S TO instruction UD GD cannot be used to write data to the CPU shared memory of other PLCs SP UNIT ERROR error code 2115 occurs if data is written to the CPU shared memory of other CPUs with the instruction that uses UAGO SP UNIT ERROR error code 2117 occurs if data is written to the CPU shared memory of other CPUs with the instruction that uses the S TO instruction f SP UNIT ERROR error code 2114 also occurs if data is
216. COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 1 1 Initial setting and automatic refresh setting using GX Configurator 1 Initial and automatic refresh settings of intelligent function modules Installing the GX Configurator compatible with the intelligent function module enables the initial setting and automatic refresh setting with GX Developer When the initial setting and automatic refresh setting of the intelligent function module is designated with GX Developer you can write read data without creating the program for the communication with the intelligent function module Moreover you can conduct the initial setting or automatic refresh setting without designating the buffer memory address of the intelligent function module 2 Setting using the GX Configurator This section describes the example to set the initial setting and automatic refresh setting of A D conversion module Q64AD a Initial setting The initial setting of Q64AD offers the following four settings e A D conversion enable disable setting e Sampling process averaging process setting e Time number of times specifying e Average time average number of times setting The initial setting of Q64AD is designated on the following initial setting screen of GX Configurator Initial setting screen Initial setting BE Module information Module model name Q644D Start 170 No 0000 Module type A D Conversion Module Setting i
217. CPU and the MELSECNET H network modules Link direct devices are used to directly access the link devices in the MELSECNET H network modules b Designation method e Link direct devices are designated by network No and device No Designation method JUi Ci Device No Input ee xX0 Output eee YO r Link relay BO Link register Wo Link special relay SBO Link special register SW0 Network No 1 to 239 e For link register 10 W10 of network No 2 the designation would be J2 W10 Network modules at network No 2 wf MOVP K100 sw W10 e For a bit device X Y B SB digit designation is necessary Designation example J1 K1X0 J10 K4B0 2 Designation range Link direct device designations are allowed for all the link devices in network modules Device outside the range specified by the network refresh parameters can also be designated a Writing 1 Writing is executed within that part of the link device range set as the send range in the common parameters of the network parameters that is outside the range specified as the refresh range in the network refresh parameters High Performance model QCPU Network module _ BO LB 0 Link range Refresh i range j send range Writing range 10 36 10 36 10 EXPLANTION OF DEVICES MELSEC Q 2 Although writing is also allowed in the refres
218. CPU cannot read sampling trace results To enable the High Performance model QCPU to read the sampling trace results enter the High Performance model QCPU into RUN status f When executing the sampling trace ensure that trigger conditions cannot be satisfied at trigger points If the trigger conditions are met when executing the sampling trace they will not be recognized as trigger conditions 7 FUNCTION MELSEC Q 7 15 Debug Function with Multiple Users 1 What is Debug Function with Multiple Users a This function performs debugging from multiple GX Developer connected to High Performance model QCPU or Serial communication module at the same time b If debugging tasks are classified by process or by function this function is used to perform debugging of different files from multiple GX Developer at once 2 Function Description The debug function combination for multiple users are as follows Functions to be executed Execution time Sampling during RUN measurement Monitor O x O OQ Write during RUN x Execution time measurement o x x o Sampling trace Co a ae Can be performed at the same time However the detailed condition can only be set from one GX Developer In this case the detailed condition setting cannot be performed from another GX Developer x Can only be performed from one GX Developer This function cannot be performed by the GX Developer while it is being executed by a
219. CPU of another CPU can use FROM instruction or intelligent function module device to read data from the action data area of the host CPU However because there is a delay in data updating use the read data for monitoring purposes 1 For the Motion CPU 5H to 1CH of the host CPU s operation information area is not used If 5H to 1CH of the host CPU s operation information area is read from the Motion CPU it will be read as 0 x2 Refer to the corresponding special registers for further details 16 14 16 14 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM 16 15 2 3 MELSEC Q System area 200H to 7FFH The area used by the High Performance model QCPU Motion CPU and PC CPU module systems OS This is used by the OS when communication dedicated instructions between multiple PLCs are executed Automatic refresh area The area used when the multiple CPU system is automatically refreshed Writing is not enabled with the S TO instruction and reading is not enabled with the FROM instruction or intelligent function module device UD GLD User s free area The area for performing communication between CPU modules with the multiple CPU system s S TO instruction FROM instruction and intelligent function module device UL GL The area used after the number of points set for automatic refresh is used An area between 800H and FFH can be used as the user s free area when automatic refresh is not being p
220. Configuration is identical to that for the first module Initial SD361 module iguration is igent i A S nmal D362 Inf ion f SDS92 10 Moman nom Configuration is identical to that for the first module 4th module No of l eu Indicates the number of mounted Ethernet module D341 enemies O number of mounted Ethernet module D342 NeworkNo ofmountedethemetmodie No of mounted Ethernet module D343 e Group No of mounted Ethernet module D344 Ethernet J S e Station No of mounted Ethernet module S Initial D345 information D346 i IP address IP address of mounted Ethernet module D347 a oa code of mounted Ethernet module D348 to Information from 2nd DN IN ND IW WD Mm oO g w J A Q Oo Nin W nn Configuration is intel to trator the fst module ration is identical to that for the first module D354 module pag D Information from 3rd 355 19 i _ is identical to that for the first module D361 module Depete Ethernt rormanomntrorn 45i Contguration is identical trator the fst modus is identical to that for the first module S Initial information module b15 to b8 b7 b6 b5 b4 b3 b2 b1 b0 o to 0 Not used Instruction reception status of channel 1 Instruction reception status of channel 2 Ethernet Instruction reception status of channel 3 instruction Instruction reception ________ Instruction reception status of channel 4 reception status of 1st module Instruction reception status o
221. DEF programs are executed in the order as set at the Program tab screen in the PLC Parameter dialog box 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 3 Precautions for creating stand by type programs a Because current value is updated and contact ON OFF is switched when the OUT T instruction is executed timers cannot be used in stand by type programs b Gathering sub routine programs in a single program 1 Create the sub routine programs in order beginning from step 0 of the stand by type program An END instruction is required at the end of the sub routine program 2 Because there are no restrictions on the order of creating sub routine programs the pointer numbers need not be assigned in ascending order when creating multiple sub routine programs 3 Use common pointers Sub routine programs with common pointers can be called from all programs executed by High Performance model QCPU If local pointers are used the stand by type program s sub routine programs will not be executed Program A High Performance model QCPU Program memory Standard Main routine ROM Memory card program Write Program A Common pointer Program B Stand by type program Program B Write Use a common pointer x This does not have to be created in order 4 See section 10 13 1 for execution of a sub routine program that contains local devi
222. Designates the constant scanning time time execution at each scanning history latch range and the local device range 2000H Designates the number of device points used iene ET rier WES several programs onto the CPU module Designates the boot operation program file type data name and destination drive Designates whether automatic refresh to the standard ROM is made or not Designates the SFC program start mode starting conditions and Device setting 7000H Boot file setting Boot file setting Automatic refresh to standard ROM SFC program start 8002H mode SFC setting Starting conditions 8003H h i lock f F Outpurmode when the output mode in a block stop for SFC program use the block is stopped 8005H 9 PARAMETER MELSEC Q 10 to 2000 ms 10 ms units Section 4 2 2 No setting 10 to 2000 ms 10 ms units Section 4 2 1 No setting 10 to 2000 ms 10 ms units Section 4 2 3 Stop Continue Section 7 16 Checked Checked Not checked Section 7 16 No setting 0 5 to 2000 ms 0 5 ms units Section 7 2 No setting 1 to 2000 ms Section 4 2 3 Record in PLC RAM Record in PLC RAM Record in the following history file Section 7 17 X 8 k points Y 8 k points S 8 k points SB 2k points and SW 2 k points are fixed Including the above points 3 7 k words a total range of 29 k Section 10 1 words is available Section 10 2 e For one device Max 32 k points Total number for
223. EM 16MBA Q12HGPU QZSHCPU Q2MEM 32MBA Personal computer GX Developer Version 6 or later SW6D5C GPPW E PC card adapter Q2MEM ADP x1 For writing into memory card on GX Developer and USB cable refer to the operating manual of the GX Developer Refer to the Motion Controller User s Manual for connection between the Motion CPU and peripheral modules The GX Developer installed in a Personal computer connected to the Motion CPU is not used to communicate with the High Performance model QCPU You cannot install GX Developer and Motion CPU software package in a single PC Refer to the manual of the PC CPU module for the connection between the PC CPU module and peripheral modules 14 3 14 3 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q Main base unit Q312B 123 4 5 6 7 8 9 10 11 Slot No Oo 00 20 40 60 80 AO CO EO 100 SSIS S S S S 1F 3F 5F 7F 9F BF Extension cable CPU module 1 CPU module 2 CPU module 3 CPU module 4 Power supply module Extension base unit Q612B The figure shows the configuration 1 extension 15 16171819 20 21 2223 when 32 1 O modules are mounted stages to each slot 120 1401160 MSF SF ZF Power supply module Extension base Extension base unit QA1S68B 2 extension J 27 5 extension J_45 46 47 48 49 50 51 52 stages
224. ES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q PRECAUTIONS 1 The program capacity displayed during programming with GX Developer is the sum of file header and executed program capacities and does not include the capacity of steps secured for write during RUN Example The capacity of the program whose executed program part has 491 steps is displayed on GX Developer as shown below The file header is fixed to 34 steps File header 34 steps Executed program 491 steps Display on GX Developer 34 steps 491 steps 525 steps Status of File on GX Developer 2 Since a file is stored on the program memory in file size unit the program capacity displayed during programming with GX Developer may differ from the capacity of the program file on the High Performance model QCPU Refer to Section 6 9 3 for details 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 9 GX Developer File Operation and File Handling Precautions 6 9 1 File operation GX Developer online operation allows the files which are stored in the program memory standard ROM and memory card to perform the file operations in the table below However the available file operations vary according to the presence or absence of a password registered by GX Developer the High Performance model QCPU write protect switch setting status and the High Performance model QCPU RUN STOP status Table 6 5 File Operatio
225. Enabled only for Q3ACPU and Q4ACPU ae Clock data read OFF Ignored e When this relay is ON clock data is read to SD210 to eMets ON Read request D213 as BCD values ied O Rem Goes OFF when reset of the PLC No 1 is canceled No 1 CPU reset OFF PLC No 1 reset cancel Comes ON when the PLC No 1 is resetting including flag ON PLC No 1 resetting the case where the PLC is removed from the base The other PLCs are also put in reset status Goes OFF when reset of the PLC No 2 is canceled Comes ON when the PLC No 2 is resetting including the case where the PLC is removed from the base The other PLCs result in MULTI CPU DOWN error code 7000 Goes OFF when reset of the PLC No 3 is canceled Comes ON when the PLC No 3 is resetting including the case where the PLC is removed from the base The other PLCs result in MULTI CPU DOWN error code 7000 Goes OFF when reset of the PLC No 4 is canceled S Status QCPU Comes ON when the PLC No 4 is resetting including function the case where the PLC is removed from the base change Ver B The other PLCs result in MULTI CPU DOWN error code 7000 LC No 1 normal Goes OFF when the PLC No 1 is normal including a LC No 1 during si continuation error Comes ON when the PLC No 1 is during a stop error LC No 2 normal Goes OFF when the PLC No 2 is normal including a LC No 2 during s continuation error e Comes ON when the PLC No
226. Error time output mode setting Hardware error time CPU operation mode setting Switch setting of intelligent function module compatible with Q Series Monitoring function Set monitor conditions Monitor test local Devices Turn ON OFF external I O Write during RUN the GX Developer Measure execution time Program list monitor Interrupt program monitor Scan time measurement Sampling trace function Multiple user debugging function Watch dog timer Self Diagnosis function Failure history System protect This function resets the CPU module when the CPU module is ina STOP status This function clears the latch data of the CPU module when the CPU module is ina STOP status The response time of the input module Composite I O module compatible with Q Series can be selected from 1 ms 5 ms 10 ms 20 ms and 70 ms with this function Default 10 ms The response time of the high speed input module compatible with Q Series can be selected from 0 1 ms 0 2 ms 0 4 ms 0 6 ms and 1 ms with this function Default 0 2 ms The response time of the interrupt module compatible with Q Series can be selected from 0 1 ms 0 2 ms 0 4 ms 0 6 ms and 1 ms with this function Default 0 2 ms This function sets whether the output to the Q series compatible output module hybrid I O module or intelligent function module will be cleared or held when the CPU module results in a stop error This function sets whether the operation of the CPU m
227. Execution Type Programs during Network Refreshing 1 Refer to the following manual on the block assurace of cyclic data for each station Q Corresponding MELSECNET H Network System Reference Manual 4 32 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q e Execution during END processing When the execution condition of fixed scan execution type programs are established during the wait time of END instruction while the constant scan is executed the fixed scan execution type programs are executed f Perform the processing of the index register when the program is switched from the scan execution type program to the fixed scan execution type program by seeing Section 10 6 2 3 Setting of fixed scan execution type program for high speed execution and overhead time When fixed scan execution type programs are executed the processing below is performed e Save and return of index resister e Save and return of file name of file resister in use If High Speed Execution is selected from the interrupt program fixed scan execution type program at the PLC system tab screen in the PLC Parameter dialog box the processing above will not be performed As a result the overhead time for the fixed scan execution type programs can be reduced Overhead time CPU type High speed execution is not High speed execution is selected S Q02CPU 380 u s 230ps sd us Q02HCPU Q06HCPU Q12HCPU Q25HCPU
228. Fig 4 9 I O Information Flow in Direct Mode 1 The GX Developer input area can be turned ON and OFF by the following e Test operation by GX Developer e Writing from a serial communication module x2 The output Y device memory can be turned ON and OFF by the following e Test operation by the GX Developer e A network refresh by MELSECNET H network system e Writing from a serial communication module e CC Link automatic refresh x3 The remote input refresh area indicates the area used when automatic refresh setting is made to the input X with MELSECNET H and CC Link Automatic refresh of the remote input refresh area is performed during END processing 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 2 Response lag An output module lags max 1 scan behind an input module See Fig 4 10 Ladder examples ze kj Ladder that turns the DY5E output n DY5E When DY5E turns ON fastest ON when an DX5 input turns ON LD DX5 OUT DY5E 0 5 ON OFF DX5 ON OFF DY5E DY5E output turns fastest ON if the DX5 input is turned ON immediately before the step 55 operation If DX5 is ON when step 55 s LD DX5 is executed DY5E will turn ON within that scan Therefore in this case output DY5E lags minimally behind input DX5 When DY5E turns ON slowest LD DX5 OUT DY5E Y Y 0 5556 END 0 5556 l p l T ON OFF DX5 cdl ON OFF DY5E E Lag time M
229. GX Developer is completed 3 Simultaneous access to different files from multiple GX Developers The High Performance model QCPU allows simultaneous access from other GX Developers to up to 10 different files of the same CPU module For details on the PLOAD instruction refer to the QOPU Q Mode QnACPU Programming Manual Common Instructions 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 9 3 File capacity The file size differs with the types of files used When a program memory standard RAM standard ROM and memory card are used calculate the size of a file by referring to the table 6 7 shown below Table 6 7 List of File Capacity Estimated File Size in bytes Default 564 increased by the parameter setting For Reference Boot setting to 70 18 Number of files With the MELSECNETHH setting to maximum 4096 units increased With Ethernet setting to maximum 922 units increased Parameter With CC LINK setting to maximum 251 units increased With remote password setting to 64 20 number of target modules x 10 increased to up to 164 136 1 4 x number of steps number of steps secured for write during RUN 74 Total of comment data size of each device e Comment data size of a device 10 10250 x a 40 x b a quotient of Number of device points 256 Device comment e b remainder of Number of device points 256 66 44 x n 2 x Total number of device points s
230. H Parameter x PLC name Puc system PLC file PLC RAS Device Program Boot file SFC 1 0 assignment jE 120 TeL pe Model name Points Stabl Al switch settin jac f z Select 32 points When the type is not selected 3 2 the type of the installed module will be selected Detailed setting Assigning the 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Base setting a Se eee Penson caie sic Snot Auto c Detail tB 8 Slot Default F EEE 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel c I O number assignment after the I O assignment with GX Developer Q38B 0 1 2 4 5 6 7 2 2 2 2 5 3 3 5 v ne ne ne by ne mo ne fo oO O O O e O O e E 5 E E 3 E E E E gt s8 s s 5 sis s 8 Q E pen om a eg jon 2 5 5 5 5 a T O O O O e O 32 32 32 32 32 32 32 points points points points points points points points X00 X20 X40 60 Y80 YAO YCO YEO X1F X8F X5F 7F Y9F YBF YDF YFF Q68B 8 9 10 11 12 13 14 15 o Oo oO oO
231. Items indicated as New have been newly added for High performance model QCPU QnACPU e Indicates the corresponding CPU type name Rem Can be applied to all CPU types and MELSECNET H remote I O modules Can be applied to all types of CPU Corresponding CPU QCPU Can be applied to High Performance model QCPU QnA Can be applied to QnA series and Q2ASCPU Series Remote Can be applied to the MELSECNET H remote I O modules Each CPU type name Can be applied only to the specific CPU e g QAARCPU Q3ACPU Set by When set For details on the following items refer to the following manuals e Networks For Q Corresponding MELSECNET H Network System Reference Manual PLC to PLC network e For Q Corresponding MELSECNET H Network System Reference Manual Remote I O network e For QnA Q4AR MELSECNET 10 Network System Reference Manual e SFC QCPU Q Mode QnACPU Programming Manual SFC 1 SM1200 to SM1255 are used for QnACPU These relays are vacant with QCPU 2 Special relays SM1500 and later are dedicated for Q4ARCPU App 1 APPENDICES 1 Diagnostic Information MELSEC Q Special Relay List Number N Meani i Diagnostic errors Self diagnosis error Error common information Error individual information No error Error No self diagnosis errors Self diagnosis No error common information Error common information No error common information Error com
232. KO ZRO 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 5 Memory Card 1 Memory card a A memory card is used to expand the size of an internal memory of the High Performance model QCPU b There are three types of memory cards for use in the High Performance model QCPU SRAM card Flash card and ATA card POINTS 1 Before the memory card can be used for the first time the memory card must be formatted by GX Developer For details on the formatting procedure by GX Developer refer to the GX Developer manuals Before writing data into a Flash card all previous data stored on the Flash card are erased For this reason to write data into the Flash card you must first read and copy all previous data stored in the Flash card before writing necessary data Please note that an error may occur if data stored in the Flash card is used in a sequence program with data being written on the Flash card 2 Stored Data A memory card holds parameter and program data See Section 6 1 for the types of data stored in a memory card 3 Format The SRAM card and ATA card must have all been formatted Since the SRAM card and ATA card purchased are not yet formatted use them after formatting with GX Developer The Flash card need not be formatted a Execution of formatting To format the card choose Online _ Format PLC memory and then select Memory card RAM or Memory card ROM on GX Develope
233. LC name PLC system Jeuc file PLC Device Program Boot file SFC 1 0 assignment r Timer limit setting Low fioo ms 1ms 1000ms speed High 10 0 ms 0 1ms 100ms speed m RUN PAUSE contacts Output mode setting RUNER PeoeirED at STOP to RUN PAUSE x lt 0 X1 FFF r Remote reset Vv NIB mode at STOP to RUN Previous state Recalculate output is 1 scan later r Floating point arithmetic processing Perform internal arithmetic operations in double precision r Intelligent function module setting Interrupt pointer setting Settings should be set as same when using multiple CPU Common pointer No P l After 0 4095 Points occupied by empty slot f16 v Points System interrupt settings Interrupt counter start No C 0 768 Fixed scan interval 128 foao ms 0 5ms 1000ms 129 40 0 mms 0 5ms 1000ms 130 joo ms 0 5ms 1000ms High speed 131 10 0 ms 0 5ms 1000ms Eag 2m r Interrupt program Fixed scan program setting I High speed execution r Module synchronization IV Synchronize intelligent module s pulse up APLC I Use special relay special register from SM SD1000 Acknowledge XY assignment Multiple CPU settings Default Check End Cancel 3 Precaution If an output Y is forcefully turned ON with the High Performance model QCPU in the STOP status it will not remain in the ON status even if the STOP stat
234. M 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM 16 1 It is possible to perform the following interactive transmission between each CPU modules with a multiple CPU system Automatically refreshing the device data between each CPU modules with multiple CPU system parameter settings Data transfer between other High Performance model QCPU and PC CPU module via CPU shared memory using multiple CPU instructions Also data reading of High Performance model QCPU from CPU shared memory of Motion CPU using multiple CPU instructions Control command from the High Performance model QCPU to the Motion CPU with Motion dedicated CPU instructions Writing and reading of the device data from the High Performance model QCPU to the Motion CPU with communication dedicated instructions between multiple CPUs Also event issuance from High Performance model QCPU to PC CPU module using instructions dedicated to multiple CPU communication Automatic refresh of device data Automatic refresh of the CPU shared memory is a function of automatic data transfer between CPU modules in END processing of the CPU As the device memory data of other CPUs is automatically read when the automatic refresh function is used is possible for the host CPU to use the device data of other CPUs CPU No 1 CPU No 2 CPU shared memory Host CPU s operation information area CPU shared memory Host CPU s operation information area
235. M 8MBA Q2MEM 16MBA and Q2MEM 32MBA type ATA card Memory card General name for SRAM card Flash card and ATA card CPU slot Slot on the right of the power supply module of the main base unit Control CPU High Performance model QCPU motion CPU that controls any of the I O and intelligent function modules mounted on the main or extension base unit For example when the module mounted on slot 3 is controlled by the CPU No 2 the CPU No 2 is the control CPU of the module on slot 3 Non controlled module Non group module I O or intelligent function module other than the controlled module For example when the module mounted on slot 3 is controlled by the CPU No 2 the module on slot 3 is the non controlled module of the CPU Nos 1 3 and 4 I O or intelligent function module controlled by the control CPU For example when Controlled module the module mounted on slot 3 is controlled by the CPU No 2 the module on slot 3 is the controlled module of the CPU No 2 Numbers assigned to differentiate between the High Performance model QCPU and CPU numbers motion CPU mounted in a multi CPU system The CPU on the CPU slot is the CPU No 1 the one on slot 0 is the CPU No 2 the one on slot 1 is the CPU No 3 and the one on slot 2 is the CPU No 4 System mounted with the High Performance model QCPU on the CPU slot to exercise control PC CPU module MELSEC Q Series corresponding PC CPU module High Performance mode
236. M604 and SM605 are OFF Always ON Memory card B OFF Unusable usable flags ON Use enabled ON when memory card B is ready for use by user Initial Always ON S Memory card B OFF No protect protect flag ON Protect Goes ON when memory card B protect switch is ON S Initia New e Always ON S Initial New QCPU OFF No drive 3 Drive 3 flag oer A ON Drive 3 present Goes ON when drive 3 card 2 RAM area is present S Initia New S OFF No drive 4 Always ON New QCPU ON Drive 4 present Goes ON when drive 4 card 2 ROM area is present ew S 2A S1 Memory Sar OEE Notused Goes ON when memory card B is in use S Initial New CEN in use flag ON Inuse Q3A Q4A Q4AR Zz Zz Zz 623 Drive 4 flag Memory card Bee Remeueineett enabled Goes ON when memory card B cannot be inserted or remove insert ON Remove insert N prohibit flag prohibited removed OFF File register not used z es S Status SM640 File register use ON File register in use Goes ON when file register is in use change N Comment use OFE File register not Uen Goes ON when comment file is in use S Siatls New ON File register in use change OFF Internal memory execution Goes ON while boot operation is in process S Status ON Boot operation in Goes OFF if boot designation switch is OFF change progress ew ew SM609 SM620 SM624 SM650 n D D o wW fo fo Q o 3 T fe
237. MELSEC Q 7 22 3 Processing time The following chart shows the processing times of the high speed interrupt function between a start and an end Main routine program Waiting time H High speed interrupt start H X input k Buffer memory read e 149 overhead H High speed interrupt program execution m Buffer memory write m Y output H High speed interrupt end m High speed I O refresh and high speed buffer transfer take the following processing times in their processings Processing Item Processing Time e Max 37 5us or more than 37 5 us instruction processing time Waiting time e Max 40 u s when MELSECNET H CC Link or intelligent function modules are mounted on extension base speed interrupt end 1 Main base Time 0 14 x total number of X points 0 65 X number of settings 0 85 2 Extension base Time 0 21 x total number of X points 0 65 x number of settings 0 85 Calculation example 3 74 u s when the module is mounted on the main base the number of settings is 1 and the number of X points is 16 X input 1 Main base a 16 words or less Time 0 47 X total number of transferred words 2 85 X number of settings 0 95 b More than 16 words Time 0 5 x total number of transferred words 0 95 2 Extension base a 16 words or less Time 1 07 X total number of transferred words 2 85 lt number of settings 0 95 b More than 16 words Time 1 1 x total number of tr
238. Motion CPU or PC CPU module in the following way e Mount the Motion CPU on the right side of the High Performance model QCPU e Mount only one PC CPU module at the right end of CPU modules No CPU module can be mounted on the right side of the PC CPU module Table 14 2 Installation positions of CPU modules Number of CPUs Mounting positions of CPU modules Power supply module CPU module Power supply CPU module CPU module module Power supply CPU module Power supply CPU module Motion CPU 0 oO oO z 2 Power supply CPU module Motion CPU module CPU module Power supply module CPU module Power supply module CPU module o CPU module CPU module Motion CPU Power supply 1 module CPU module Power supply module CPU module Motion CPU PC CPU module PC CPU module CPU module Power supply CPU module CPU module n CPU module Motion CPU rm CPU module CPU module Motion CPU Motion CPU module CPU module Power supply module CPU module Power supply module CPU module o CPU module 1 The PC CPU module occupies two slots 14 6 14 6 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q Number of CPUs Mounting positions of CPU modules Motion CPU Motion CPU Motion CPU Power supply module CPU module CPU module CPU module 1 Power sup
239. N at step trace completion S Status M9180 tracecompleted ON End Goes OFF when step trace is commenced change Trace error Switches ON if error occurs during execution of trace Stat QCPU OFF Normal change Sampling trace ON Errors Goes ON if error occurs during execution of sampling S Status error trace gae SM827 Status latch error OFE Noral Goes ON if error occurs during execution of status latch S Status New ON Errors ae Program trace OFF Normal Goes ON if error occurs during execution of program S Status SM828 error ON Errors trace change 8 Latch area ai os Set SM900 Power cut file OFF No power cut file Goes ON if a file is present during access when power is__ S U Status ON Power cut file present interrupted change S Status change After step trace OFF Not after trigger trigger ON ls after first trigger OFF Keyboard input RKEY notregistered Goes ON at registration of keyboard input registration flag ON Keyboard input OFF if keyboard input is not registered registered Instruction execution App 10 App 10 APPENDICES MELSEC Q 9 A to Q QnA conversion correspondences Special relays SM1000 to SM1255 are the relays which correspond to ACPU special relays M9000 to M9255 after A to Q QnA conversion All of these special relays are controlled by the system so that users cannot turn them ON OFF in the program If users want to turn these relays ON
240. N during operation in the no continuous transition mode Step transition smiios smgo watchdog timer start equivalen of D9108 Step transition SM1109 SM91 watchdog timer start equivalen of D9109 Step transition SM1110 SM92 watchdog timer start equivalen of D9110 pee OFF Watchdog timer reset SM1111 ON Watchdog timer reset start equivalen start of D9111 Step transition watchdog timer Name Meaning Details e Turns ON when the measurement of the step transition watchdog timer is started Turning this relay OFF resets the step transition watchdog timer Erg et ort a o 5 R 2 g M9112 SM1112 f start equivalen of D9112 Step transition M9113 SM1113 watchdog timer start equivalen of D9113 O Step transition M9114 SM1114 watchdog timer start equivalen Baa OFF Trace started Set when sampling trace of all specified blocks is gt ON Trace completed completed Reset when sampling trace is started completion flag porer aunen Active step OFF Trace not veing Executed Set when sampling trace is being executed M9181 SM1181 sampling trace ON Trace execution under R A eset when sampling trace is completed or suspended execution flag way e Selects sampling trace execution enable disable Active step f ON Sampling trace execution is enabled M9182 SM1182 sampling trace OFF Traca
241. NUMBERS MELSEC Q 2 Detail mode a b In Detail mode the number of mountable modules is assigned to the individual base units main and extension base units at the I O assignment tab screen in the PLC Parameter dialog box Use this mode to match the number of slots to the one for the AnS Series base units 8 fixation Cautions on setting the number of slots The number of slots can be set regardless of the number of the module being used However the number of slots must be set for all the base units in use If the number of slot is not set for all the base units I O assignment may not work correctly The followings result if the preset number of slots differs from that of the installed base units 1 When the designated number of slots is larger than that of the installed base unit Among the designated slots those after the slots occupied by the installed base unit will be empty slots For example when 8 slots are designated for a 5 slot base unit 3 slots will be empty slots Q35B type main base unit y 01234 1O at 1 10 __ Empty __ __ Empty __ Empty 4 Power supply CPU module gt Three slots are occupied The number of points for the empty slots is the one designated at the I O assignment tab screen in the PLC Parameter dialog box Default value is 16 points 2 When the designated number of slots is smaller than that of the base uni
242. No 1 Fixed Designates whether online module change will be enabled or Online module change setting E0061 disabled for other CPU modules When it is enabled the out of group I O status cannot be imported Designates the type of the installed module Model name 400H Designates the model of the installed module Memorandum for users who do not use the CPU module Operating mode Designates whether the output status of the output module controlled by other PLCs are acquired or not Designates whether the input status of the input module and Out of group input setting intelligent function module controlled by other PLCs are acquired E04H or not Out of group output setting Designates the devices and the number of points for which data Refresh settings write read will be performed by automatic refresh between CPU modules in the multiple CPU system 9 PARAMETER MELSEC Q Default Value e PLC CPU No 2 to No 4 PLC No n Empty Designate CPU empty for slots where no CPU module is installed No setting e Input output module and intelligent function module e Input high speed input output intelligent input output mixture interrupt Section 5 6 No setting e 16 single byte characters 0 point 16 points 32 points 48 points 64 points 128 points 256 points 512 points 1024 points No setting OH to FFOH No setting e 16 single byte characters No setting e 16 single byte characters Section 5 3 a e In
243. O 04 1 4 Execute type weit ieee 4 10 Execution time measurement 7 39 Execution time of the low speed execution type progra M a aeaa aea E a Sea an ae 4 19 EXt NSION cceeceeeceeeeeeeeeeeeeeeeeeeeeeeteees 6 2 6 4 F ANNUNCiatOr aono 10 12 Failure MSTO orea eak 7 64 FD Function register 10 31 File r QIStel ecceesceeseeeeeeeeeeeeeeeseeneeeeeeeees 10 43 ACCESS Method 10 44 Designation Method eeeeeeeeeeeeteees 10 49 REGQISTEMING sis cteey acetal aciecct ies eiet es ece teers 10 45 FIlG SIZ upone a a 6 18 Fixed scan execution type program 4 31 FlashCards AA AA 6 12 Floating decimal point data eee 4 48 Function device FX FY FD 10 31 FUNCTION version 13 5 14 4 FX FUNCtION INPUT rerperr 10 31 FY Function Output siirrossa 10 31 Global device ceeeeeeeeeeteeteeeeteeeeeeneeees 10 63 GX Configurator s s s 8 2 14 12 GX Developer 0 cecceseeceeceeeeeeteeeeeeeeeeaes A 18 H Hexadecimal constants eeeeeeee 10 61 HEX Hexadecimal 0 cee eee 4 46 Hexadecimal constants H 10 61 high speed interrupt function 0 7 81 High speed retentive timer ST 065 10 21 Index 1 High speed timer T sessen 10 20 J K L Interrupt pointer 10 56 I O No designation device Un 0 10 59 Index register Z ceeeesceeseeseeseeeteeeteeeteees 10 39 Initial execution monitor time eee 4 16 Init
244. OFF Suspend Program trace started when this goes ON S Status New trace ON Start e Suspended when OFF Related special M all OFF change Program trace SM812 areas under OFF Suspend ON when program trace execution is underway ON Start Progiam trace Program trace trigger goes ON when this goes from OFF S Status SmaI PEF A ONES to ON Identical to PTRA instruction execution status gawa After program OFF Not after trigger 3 S Status N SM814 trace trigger ON After trigger Goes ON after program trace trigger change ew Program trace OFF Not completed 5 4 S Status SM815 ON End Goes ON at completion of program trace New Step trace OFF Not ready F N SM820 ON Ready Goes ON after program trace registration at ready OFF Suspend When this goes ON step trace is started S Status M9182 format SM83821 Step trace starts TON Start Suspended when OFF Related special M all OFF change change Step trace Goes ON when step trace execution is underway S Status 181 Goes OFF at completion or suspension change M918 underway Goes ON if even 1 block within the step trace being executed is triggered Goes OFF when step trace is commenced After Step trace OFF Is not after all triggers Taes ON Iall blacks wether tne Step tee being S Status executed are triggered New trigger ON IS after all triggers Goes OFF when step trace is commenced change SM825 Step OFF Not completed Goes O
245. OFF the program should be modified to use QCPU QnACPU special relays For SM1084 and SM1200 through SM1255 however if a user can turn ON OFF some of special relays M9084 and M9200 through M9255 before conversion the user can also turn ON OFF the corresponding relays among SM1084 and SM1200 through SM1255 after the conversion For details on the ACPU special relays see the user s manuals for the individual CPUs and MELSECNET or MELSECNET B Data Link System Reference Manuals The processing time may be longer when converted special relays are used with QCPU Uncheck A series CPU compatibility setting within the PC system setting in GX Developer parameters when converted special relays are not used The following are additional explanations about the Special Relay for Modification column When a special relay for modification is provided the device number should be changed to the provided QGPU QnACPU special relay 2 When W is provided the converted special relay can be used for the device number When AX is provided the device number does not work with QCPU QnACPU Special Relay List ACPU Special Special Applicabl Special Relay after Relay for Name Meaning Details pplicable wae CPU Relay Conversion Modification Turned on when there is one or more output units of which fuse has been blown Normal e Remains ON if the condition is restored to normal Module with blown fuse thereafter Output modules of
246. OFF to ON Identical to STRA instruction execution status MELSEC Q When Set S Instruction execution S Instruction execution S Instruction execution QCPU serial number 04012 or later U Status change U Status change U Status change QCPU serial No 05032 or When Set S Status New change S Status New nA change S Status vigoae QCPU change S Status QnA change Q M9047 M9046 Switches ON after trace is triggered p cians New QCPU change A S Status Goes ON after sampling trace trigger change App 9 APPENDICES MELSEC Q Special Relay List Continued lal a ae a S Status see Trace Trace competed OFF Not completed Switches ON at Switches ON at completion oftrace of trace change 9043 QCPU ON End Sampling trace Goes ON at completion of sampling trace S Status 9043 QnA completed gange SM806 Fraus Jach OFF Not ready Goes ON when status latch is ready S Status preparation ON Ready change SM807 Statys ateh OFF gt ON Latch e Runs status latch command be command SM808 Status leten DEF Later noteompieted Comes ON when status latch is completed 9 Slatu 9055 completion ON Latch completed change SM809 Status latch clear OFF ON Clear Enable next status latch pu _ New Program trace OFF Not ready S Status New N SM810 ON Ready Goes ON when program trace is ready change lew SMB11 Start program
247. ON Resets WDT batch processing are executed used when the scan time SM1045 exceeds 200 ms OFF Trace not in progress Sug A SM1046 SM802 Sampling trace ON Trace in progress Switched on during sampling trace Sampling trace OFF Sampling trace e Sampling trace is not executed unless SM801 is turned SM1047 SM801 ping suspended ON preparations ON Sampling trace started e Sampling trace is suspended when SM801 goes OFF Sampling trace Selection of OFF Output until NULL code When SM701 is OFF characters up to NULL 00H code are output SM1043 SM701 numosror en o ntersd e When SM701 is ON ASCII codes of 16 characters are characters output ON 16 characters output output e Switched ON to disable the CHG instruction Switched ON when program transfer is requested Automatically switched OFF when transfer is complete e When SM1052 is ON the SEG instruction is executed as SEG instruction OFF 7SEG segment display an I O partial refresh instruction SM1051 SM1052 i 7 ate switch ON I O partial refresh e When SM1052 is OFF the SEG instruction is executed as a 7 SEG display instruction SM1054 SM205 STEP RUN flag OFF STEP RUN not in effect Switched on when the RUN key switch is in STEP RUN ON STEP RUN in effect position QnA SM1055 SM808 Status latch OFF Not completed Turned on when status latch is completed completion
248. ONDITIONS MELSEC Q 5 Program creation restrictions a A device which is switched ON by a PLS instruction in an interrupt program will remain ON until that interrupt program is executed again X0 XO PLS PLS MO END 0 IO JIRET END 0 END 0 IlO IRET END 0 ON yore PE loo iON y A Switched OFF by PLS M0 instruction Switched ON by PLS M0 instruction at X0 leading edge OFF to ON b ADI status interruption prohibited is established during execution of an interrupt program Do not execute El DI instructions in the interrupt program c Timers cannot be used in interrupt programs As timers are used at OUT T instructions to update present values and switch contacts ON and OFF the use of a timer in the interrupt program would make a normal time count impossible d The following commands cannot be used in the interrupt program e COM e ZCOM e When the interrupt program fixed scan execution type program is executed at a measuring time such as the scan time or execution time the values of the interrupt program fixed scan execution type program are added to the measured time Thus if the interrupt program fixed scan execution type program is executed the values stored in the following special registers and GX Developer monitor values will be longer than when the interrupt program fixed scan execution type program is not executed 1 Special registers e SD520 SD521 Current scan time e S
249. Oo D 0 0 0 3 l 3 3 3 3 2 2 2 82 COEG ZONES le le fe E Gel Se cee S9E Y EJEJ E gt cja gt c F gt c gt c 5 5 5 rs o o 2 2 x i 8 esles esles g g g a safa S 5 5 5 SSS Exe 9 E z 32 32 32 32 16 32 32 32 x a points points points points points points points points 100 120 140 160 180 Y190 Y1BO Y1D0 11F 13F 15F 17F 18F Y1AF Y1CF Y1EF 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 2 Changing the I O number of slots Change the I O number of an empty slot slot No 3 to X200 through X21F so that the I O numbers of slot No 4 and later slots do not change when a 32 point input module is mounted to the empty slot slot No 3 a System configuration and I O number assignment before the I O assignment with GX Developer Q38B Input module Input module N Input module Output module gt Output module or Output module gt Output module N CPU module N ee N 32 points points points points points points points points X00 X20 X40 60 Y70 Y90 YBO YDO oe N oe N oe N oe N Power supply module X1F X3F X5F 6F Y8F YAF YCF YEF Q68B wo A ol Intelligent function module Intelligent function module Intelligent function module Intelligent function module joo i oo Output module Output module oo oo oo oo oo oe N oe oe N oe N
250. PLANTION OF DEVICES MELSEC Q 1 Definition a b c d Retentive timers measure the coil ON time The measurement begins when the timer coil switches ON and the contact switches ON when a time out coil OFF occurs Even when the timer coil is OFF the current value and the contact ON OFF status are saved When the coil is switched ON again the time measurement resumes from the current value which was saved There are 2 retentive timer types low speed retentive timer and high speed retentive timer The RST T12 instruction is used to clear reset the current value and switch the contact OFF Ladder example XO K200 aa i X0 ON time is measured as 20 seconds when the timer STO ODEA measures time in 100 ms units x1 p Retentive timer display i RST STO When X1 switches ON the STO contact is reset and the current value is cleared Time chart ON X0 OFF ON TO coil OFF k 15s 5s TO present value OXI to 150 4 X51 to 200 Xo Present value is saved when coil switches ON TO contact OFF f A Contact remains ON when coil switches Instruction execution RST STO instruction Y ON x1 OFF 2 Measurement units a The measurement units settings for retentive timers are the same as those for low speed timers and high speed timers e Low speed retentive timer Same as low speed timer e High speed retentive timer Same as high speed timer In o
251. PU Memory or on the Memory Card The table below shows the type of data stored in a standard RAM standard ROM or on a memory card High Performance model Memory QCPU Built In Card RAM ead Card ROM eae P i ik d gee ie d Remarks SRAM Card Flash Fash Cara ATA Card MEOE Parameter ie a ee 1 data drive module al Progam EC oaa ee B E BEE oe Cae ee a Sep Sh Fleregter ff O De Pe P gt ee ebuigidata tail E a a a A x ST a ee ee E O Needed Stored X Not stored REMARK 1 Boot the program memory to execute a program 2 Data can be written by operating from the GX Developer Device comments cannot be used in an instruction of a sequence program 3 The read from a sequence program requires several scans x4 A sequence program allows the read only No data can be written through access from a sequence program x5 A standard RAM hold a single file x6 Data can be written or read with the following instructions e S FREAD allows the batch read from a specified file on a memory card e S FWRITE allows the batch write to a specified file on a memory card The table below shows file names and extensions of data files stored in the High Performance model QCPU or on a memory card PARAM QPA Intelli functi ntelligent function module IPARAM QPA parameter QCD The portions can be named by the user 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 3 Drive N
252. PU Q Mode User s Manual Hardware Design Maintenance and Inspection CONTENTS 1 OVERVIEW 1 1 Features 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM 2 1 System Configuration 2 2 Precaution on System Configuration 2 3 Comfirming Serial Number and Function Version 3 GENERAL SPECIFICATIONS 4 HARDWARE SPECIFICATION OF THE CPU MODULE 4 1 Performance Specification 4 2 Part Names and Settings 4 3 Switch Operation After Writing in Program 4 4 Latch Clear Operation 4 5 Executing automatic Write to standard ROM 5 POWER SUPPLY MODULE 5 1 Specification 5 1 1 Power supply module specifications 5 1 2 Selecting the power supply module 5 1 3 Precaution when connecting the uninterruptive power supply 5 2 Names of Parts and Settings 6 BASE UNIT AND EXTENSION CABLE 6 1 Base Unit Specification Table 6 2 Extension Cable Specification Table 6 3 Parts Names of Base Unit 6 4 Setting the Extension Base Unit 6 5 Guideline for Use of Extension Base Units Q5 __ B 7 MEMORY CARD AND BATTERY 7 1 Memory Card Specifications 7 2 Battery Specifications For CPU Module and SRAM Card 7 3 Handling the Memory Card 7 4 The Names of The Parts of The Memory Card 7 5 Memory Card Loading Unloading Procedures 7 6 Installation of Battery for CPU Module and Memory Card 8 EMC AND LOW VOLTAGE DIRECTIVE 8 1 Requirements for Conformance to EMC Directive 8 1 1 Standards applicable to the EMC Directive 8 1 2 Installation ins
253. Performance model QCPU operation status on the front of the High Performance model QCPU The display details of each LED are described below 7 21 1 LED display 1 The details of the LED display are shown below LED name Display Description Indicates the High Performance model QCPU mode Q mode A mode ON green Q mode No registration of enforced ON OFF for external I O ON orange A mode Flicker green with registration of enforced ON OFF for external I O Indicates the CPU module operation status On When operating with the RUN STOP switch at RUN Off When stopped with the RUN STOP switch at STOP Or when an error that stops operation is detected Flicker When writing parameters ad programs during STOP and when setting the RUN STOP switch from STOP RUN Perform the following operations in order to illuminate the RUN LED after program writing Set the RUN STOP switch to RUN STOP RUN e Reset the system with the RESET L CLR switch e Switch on the power to the PLC again Perform the following operations in order to illuminate the RUN LED after parameter writing e Reset the system with the RESET L CLR switch e Switch on the power to the PLC again When the RUN STOP switch has been set to RUN STOP RUN after the parameters have been amended the parameters related to intelligent function modules and other network parameters will not be reflected back Indicates the CPU
254. Performance model QCPU DIP switches SW 2 SW 3 and the boot settings for the PLC parameters must be designated by GX Developer For details regarding High Performance model QCPU DIP switches refer to the High Performance model QCPU Q mode User s Manual Hardware Design Maintenance and Inspection When writing programs and parameters to the High Performance model QCPU program memory the steps indicated by asterisks below are not required Procedural steps shown in C3 boxes are performed at GX Developer side and those shown in boxes are performed at the High Performance model QCPU side Start the GX Developer Refer to the GX Developer Operating Manual Mode selection screen is displayed Change the number of device points ae sy a s See Section 10 1 2 Change the number of device points at the device setting item in the PLC parameter Create the program which is to be executed in the High Performance model QCPU module 12 6 12 6 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q Use the device initialvalue cage See Section 10 13 2 Right click on the device memory and select Add to specify device initial value data Vv Right click on a device initial value and select Add to specify a device initial value range Select the device memory to be used in the device memory registration setting of the device init
255. Performance model QCPU from an external source such as digital switch use BCD binary coded decimal which allows the same setting as decimal form However the High Performance model QCPU handles the values as BIN data since the operation is based on BIN form if it uses values set in the BCD form as they are Therefore the High Performance model QCPU operates with numeric values that are different from the set values A BIN instruction is provided to convert the BCD input data to the BIN data compatible with the High Performance model QCPU A program which converts numeric data to BIN data can be created at the sequence program to allow the settings of numeric values from an external source without being conscious of the corresponding BIN values High Performance model QCPU Numeric data designation Digital switch BINP K4Xx0 DO a BCD input XF aa BIN data BCD D5 K4Y30 Fig 4 11 Digital Switch Data Input to High Performance model QCPU 2 External numeric outputs from High Performance model QCPU A digital display can be used to display numeric data which is output from the High Performance model QCPU However BIN date cannot be displayed at the digital display as it is because the High Performance model QCPU use it for operation Therefore BCD instruction is provided for the High Performance model QCPU to convert the BIN data to BCD data A program which converts BIN data to BCD data can be created
256. Q mode User s Manual Hardware Design Maintenance and Inspection When writing programs and parameters to the High Performance model QCPU program memory the steps indicated by asterisks below are not required Procedural steps shown in C3 boxes are performed at the GX Developer and those shown in boxes are performed in the High Performance model QCPU Start Start the GX Developer SERS Refer to the GX Developer Operating Manual Mode selection screen is displayed Change the number of device points eee SRS See Section 10 1 2 Change the number of device points at the device setting item in the PLC parameter i Create the program which is tobe executed in the CPU module 4 12 2 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU 12 3 Use the device initial value Right click on the device memory and select Add to specify device initial value data Right click on a device initial value and select Add to spe cify a device initial value range Select the device memory to be used in the device memory registration setting of the device initial value and click on Use device memory In the PLC file setting in the PLC parameter designate the name of file to be used for the designated device initial values In the boot file setting item in
257. Q02CPU 0 24 ms Q02HCPU QO6HCPU Q12HCPU Q25HCPU 4 GX Developer Monitoring GX Developer monitoring requires additional processing time Add the GX Developer monitoring time to the total processing time a The table below shows the processing time required when 64 data register points are assigned by the registered monitor CPU Type QO2CPU 0 10 ms Q02HCPU QO6HCPU Q12HCPU Q25HCPU b The table below shows the processing time required when monitoring conditions are specified ProcessingTime Time CPU Type When steps are When devices in eee ETN in match Qoc OOOO OS 0 05ms 05 ms ooms 01 ms Q02HCPU Q06HCPU Q12HCPU Q25HCPU 5 Local devices Local devices require additional processing time Add the processing time of local devices to the total processing time CPU Type o2cu oO o o oomosoxnms Standard RAM Q02CPU 0 94 0 40Xn ms QO2HCPU QO6HGPU Q12HCPU Q25HCPU 0 39 0 17xn ms SRAMCarg Q02ZCPY 0 94 1 38xn ms QO2HCPU QO6HCPU Q12HCPU Q25HCPU 0 39 0 95xn ms Conditions Local devices 1k points n number of program files 6 Execution of multiple programs Execution of multiple programs requires overhead time of each program being executed Add overhead time to the total processing time CPU Type Q02CPU 0 08 lt n ms Q02HCPU QO6HCPU Q12HCPU Q25HCPU Conditions n Number of program files 11 3 11 3 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME MELSEC Q 7
258. R F R F 17 to 24 L R22 L R19 L R18 R FIR F R FI R F Stores conditions 501235 Drso Enay kee D9235 D1235 for up to numbers 51236 RJ FIRIF AE RE 25 to 32 L R38 L R35 L R34 R FREF R IFIRI IF Stores conditions 521237 Uraa URAZ D9236 SD1236 for up to numbers S1238 Rie R F RF RIF 33 to 40 L R51 L R50 L R49 R F JRF R F R FI RIF it SD Stores conditions 1239 urs LR58 URS7 for up to numbers In the above table F indicates a forward loop line and 41 to 48 R a reverse loop line The bit corresponding to the peor forme Stores conditions station number at which the forward or reverse loop error D9238 D1238 for up to numbers has occurred becomes 1 49 to 56 Example When the forward loop line of station 5 has an Stores conditions error b8 of SD1232 become 1 and when D9239 D1239 for up to numbers D1232 is monitored its value is 256 100H 57 to 64 Stores the number of times the following transmission Number of times Stores errors have been detected D9240 D1240 communications cumulative total CRC OVER AB IF errors detected of receive errors Count is made to a maximum of FFFFH To return the value to 0 perform reset operation Corresponding CPU Stores whether the slave station corresponds to MELSECNET or MELSECNET11 e Bits corresponding to the MELSECNE
259. R UR UR UR UR UR UR 16 15 14 13 12 11 10 9 8 rs 6 5 4 3 2 1 D1229 UR UR UR UR UR UR UR UR UR UR UR UR UR UR UR UR 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 SD1230 UR UR UR UR UR LR UR L R UR UR LR UR UR UR UR L R 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 3 D1231 UR UR UR UR UR UR UR LUR UR UR UR UR UR UR UR UR 64 63 2 61 60 59 58 57 56 55 54 53 52 51 50 3 The bit corresponding to the station number with the error becomes 1 Example When local station 3 and remote I O station 14 have an error b2 and b13 of SD1228 become 1 and when SD1228 is monitored its value is 8196 2004H App 53 APPENDICES MELSEC Q Special Register List Continue ACPU Special Special Special Register after Register for Meaning Details Conversion Conversion Modification Stores conditions D9232 SD1232 for up to numbers Stores the local or remote station number at which a 1to8 forward or reverse loop error has occurred i Device Bit Stores condi 1ons number b14 b13 b12 b11 b10 b3 b2 D9233 SD1233 for up to numbers RIFIRIF R F 9 to 16 81282 L R7 LIR6 L R2 v R F R F RIF Stores condi fons 0238 L R15 L R14 L R11 L R10 D9234 SD1234 for up to numbers S R F R F
260. RVIEW 1 1to1 11 VA F atures tit thtaiat e einai Ree ae ea ae ee 1 2 1 2 PROGlaMS squealed is 1 5 1 3 Convenient Programming Devices and Instructions ccceeesecseseceseeseseseeeeseseeeeeeseaeaeeteseacaesteeeeeasateaeaeeeeetaeatees 1 8 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM 2 1 to 2 8 2ASystem CONQUIrAllOMN oir aa nr nuke ennn nena enna OONO nk hve 2 1 2 2 Precaution ON System Configuration ccccccccsssssssssssssssssssssssesesssessseseseseseseseseseseseseseseseseseseseeeeeeeeeeeeeeeeeeeeeeeeeesees 2 6 2 3 Confirming the Serial No and Function Versions ccceseceseseseceseeeseceseeeseseseeeescaeseeeeeaeaeetseaeaeeteeeeeeeateneenaeas 2 8 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 4 1 to 4 53 4 1 Sequence Program iaickadadeiade initio ie et ett tae dn alt 4 1 4 1 1 Main routine Program ia AAAA 4 3 41 2 Sub routine programs 8 24 eavavieweae aves bien n Mi ivhe ton neediest 4 4 4 1 3 Interrupt PrOQFAMS eaae aeea Ee EAREN EEEE ETAT EEE OTANTA EREET ARATA TER ARAA A EA E 4 6 4 2 Program Execute Type sick ate tiie dain hatin hin tin death ie ad eon awe Seas s 4 10 4 2 1 Initial execution type program eee eeeeeeeeeeeeteeeeeeeeeeeeeeeeeeeeeaeeeaeeeaesaeeeaeseaeeeaeeeaeeeaeeeaeeeeseaeeeaeeeaeeeaeenas 4 16 4 2 2 Scan execution type program ceccecceceeseeeeceeceeeeaeceeceeeeaecaecaeceeeeaesaecaesaeeaesaeseeseaesaesaeseeeeataeseeteateaes 4 18 4 2 3 Low speed execution type program ss
261. SB is used Slim type main base unit Q35SB 0 1 2 3 4 lt SlotNo 00 20 40 60 80 SISIS 1F 3F 5F 7F 9F System configuration Power supply NU module CPU module The above system assumes that each slot is loading with a 32 point module Maximum number of Extension not allowed Extension Stages Maximum number of I O modules to be 5 modules installed Maximum number of occupied O points 4036 i pman pasa Q32SB Q33SB Q35SB unit type Extension base unit Cannot be connected Extension cable Cannot be connected 1 The Q61P A1 Q61P A2 Q62P or Q64P cannot be used as a power supply module N Use the Q61SP as a power supply module otes 2 The slim type main base unit does not have an extension cable connector The extension base or GOT cannot be connected 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q 2 2 Precaution on System Configuration This section describes hardware and software packages compatible with QCPU 1 Hardware a The number of modules to be installed and functions are limited depending on the type of the modules Limit of number of modules e QJ71LP21 e QJ71BR11 Q Series MELSECNET 10H QJ71LP21 25 Up to 4 units network module e QJ71E71 ope Ethernet interface QJ71E71 B2 Up to 4 units e QU71E71 100 Q series CC Link system QJ61BT11 Noimt o limit master local module e QJ61BT11N a limit seca Nad data l A ae a
262. SFC program is to be started If turned off operation output of the execution step is turned off and the SFC program is stopped Selects the starting step when the SFC program is restarted using SM322 ON All execution conditions when the SFC program stopped are cleared and the program is started with the initial step of block 0 OFF Started with the step of the block being executed when the program stopped Once turned on the program is latched in the system and remains on even if the power is turned off Should be turned off by the sequence program when turning on the power or when starting with the initial step of block 0 App 14 APPENDICES MELSEC Q Special Relay List Continued ACPU Special Special Special Relay after Relay for Relay Conversion Modification 7 Selects consecutive or step by step transfer of steps of Presence absenc OFF oar mau transition net which transfer conditions are established when all of the SM1103 SM323 e of continuous ON Continuous transition transfer conditions of consecutive steps are established transition effective ON Consecutive transfer is executed OFF One step per one scan is transferred OFF during operation in the continuous transition mode Continuous OFF When transition is or during continuous transition and ON when continuous SM1104 SM324 transition completed transition is not executed suspension flag ON When no transition e Always O
263. ST C instruction is executed the coil of C12 also turns OFF Hence if the execution condition of the OUT Cc instruction is still ON after execution of the RST Cc instruction the coil of Cc is turned ON at the execution of the OUT C instruction to update the current value increment the count value by 1 Ladder example MO K10 lt c gt RST co H In the above ladder example when MO turns from OFF to ON the coil of CO turns ON updating the current value When CO reaches the preset value finally the contact of CO turns ON and the execution of the RST CO instruction clears the current value of CO At this time the coil of CO also turns OFF When M0 is still ON in the next scan the current value is updated since the coil of CO turns from OFF to ON at the execution of the OUT CO instruction The current value turns to 1 10 25 10 EXPLANTION OF DEVICES Current value update timing Sequence END OUT CO RST CO END OUT CO RST CO END i i i i program ON Mo orF_f ON Coil of CO OFF Current value update amp Current value is updated contact ON Coil of CO OFF since coil of CO turns from OFF to ON RSTCo OFF Count value cleared amp contact OFF As a remedy for the above it is recommended to insert the normally closed contact of the OUT CO instruction execution condition as the execution condition of the RST CO instruction as shown in the following modifi
264. Series input module can be set to a desired response time 1 ms 5 ms 10 ms 20 ms or 70 ms The input module reads external inputs at the specified response time The default value of an input response time is 10 ms ON External input ae ON FF Input module aye R Input response time T 2 Setting the Input Response Time At the I O Assignment tab screen in the PLC Parameter dialog box specify the desired input response time Select Input in the Type column of a slot for which to specify the desired input response time For the Composite I O module choose I O mix Input module Select Input Composite I O module Select I O mix Select Detailed setting Select I O response time intelligent functional module detaed zoting PLC name PLC system PLC file PLCRAS Device Program Boot fle SFC 1 0 assignment HAW error ig time PLC Control PLC operation i mode 120 fesponse Model name 1 0 Assignment Switch seing 4 KIKIKI 16points Detailed setting KIKI Assigning the 1 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Base setting r Base mode Ao Main C Detail Ext B 8 Slot Default 12 Slot Default l Settings should be set as
265. Service Interval Time Reading The High Performance QCPU can monitor the service interval time time from service acceptance to next service acceptance of the intelligent function module network module or GX Developer This indicates the frequency at which access to the CPU occurs from outside To read the module service interval time i operate the following special relay and special registers 1 Special relay Turning this relay from OFF to ON reads to SD551 and SD552 the module service interval time of the Module service interval intelligent function module specified in the special time read register SD550 ON Read OFF No processing 2 Special registers Set the I O number of the module whose module service interval time will be measured Set the I O number of the peripheral device connected to the RS 232 or USB interface of the CPU module to FFFFn Stores the service interval time from the module Module service interval time measured module specified in SD550 when SM551 is turned on SD551 1ms units range 0 to 65535 SD552 100 us units range 0 to 900 stored at intervals of 100 ps Module service interval time Example When module service interval time is 123 4ms D551 123 SD552 400 1 The module service interval indicates the time between a transient request such as monitor test program read write The access interval in cyclic communication from the network module is not stored
266. Shows the special register SDL for the host system CPU module ERE EEFEEE EEE EERIE Ha n Hil 15 For redundant systems Trucking for Q4AR only SD1700 to SD1799 is valid only for redundant systems These are all 0 for standalone systems Corresponding Number Name Meaning Explanation si ACPU Corresponding sp 2 SD1700 Trucking S Trucking GREIS Make it the trucking error detection 1 Error New Q4AR detection count _ detection count occurrence 2 Shows the special register SDL_L_ for the host system CPU App 57 App 57 APPENDICES MELSEC Q APPENDIX 3 List of Interrupt Pointer Nos and Interrupt Factors Interrupt Factors sey Interrupt factors pny 10 1st point Errors that stop operation 2nd point Empty 6th point 242 UNIT VERIFY ERR FUSE BREAK OFF 2 SP UNIT ERROR OPERATION ERROR QI60 A1SI61 3 SFCP OPE ERROR interr pt mod le Error factor 4 SFCP ECE ERROR fedlor EX POWER OFF ICM OPE ERROR 4 FILE OPE ERROR LC Empty SC 14th point 250 CHK instruction execution 6 Anunciator detection Empty _149 Internal timer factor Sequence start sone ctor module factor 4 ag i Specifies which intelligent Intelligent function function module is used 18 to 223 module factor 6 With parameters Internal timer factor 2 1 1st to 12th points are allocated in order beginning from the s
267. Stat End Start End No 1 0 No 2 0 No 3 0 Nod o Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address Settings should be set as same when Using multiple CPU The applicable device of head device is B M Y D W RZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check Ena Cancel Multiple CPU settings Multiple CPU system optional No of PLC J Onir dule changef A a ac BE T Enable ore mode change with another PLC e Sets the device and number of CPU share memory G points Lite SE ien the online jule je is enabled wit E i CE E EE to perform data communications with the automatic refresh peice nese pees ae ak ec process between CPU modules Error ratie de at the stop of PLC is Can read all inputs r m A a AE a aa e This is linked from the device number set with the first device to TT Al station stop by stop eror of PLC2 Refresh settings the number of CPU share memory G points and used E A ea 2 The 1st CPU share memory G point occupies the points shown TRESEN Send range for each PLC PLC side device J pic The auto refresh area Caution Dev starting DO in the table below Point Start End Start End No 1 1024 0000 OFF DOJ 01023 Nez 1024 0000 OSFF D1024 D2047 Device P
268. Switch setting for 1 0 and intelligent functional module PLC name PLC system PLC fif PLCRAS Device Program Bootfile SFC 1 0 assignmer Input format SLSR 1 0 Assignment arr 4 Model name se oa SENSIS z re Modelname Switch 1 Switch 2 Switch 3 Switch 4 Switch 5 Ha es Detaled setting z hea MEZ X z 4 33 7 4 Bea x z 5 aca 5 aea X zi 6 Be 6 505 x z 7 es 7 606 x z z 8 pen Assigning the 1 0 address is not necessary as the CPU does it automatically g 8 8 Leaving this setting blank will not cause an error to occur 10 9 9 Base stint PMN Base model name Power model name Extension cable Slots 7 pBase mode ENESE G Auto 14 1313 lt C Detail 15 _ 14 14 a Slot Defaut End setup Cancel Zi 1231o Defaut Dee a a Gestueie Designate the contents of the Acknowledge XY assignment Multiple CPU settings Default Check End Cancel intelligent function module switch 3 Precautions a Do not apply the switch setting for an intelligent function module to an AnS Series corresponding special function module If the switch setting for an intelligent function module is specified for an AnS Series corresponding special function module an error SP PARA ERROR will occur b For details on the switch setting for an intelligent function module refer to the manual of the intelligent function module in use c The switch settings for interruption modules with the GX Developer
269. T 11 stations Stores conditions become 1 p9241 SD1241 for up to numbers Bits corresponding to the MELSECNET stations or 33 to 48 unconnected become 0 Device Bit number b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b1 D1202 L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L2 Local station link SD1203 L32 L31 L30 L29 L28 L27 L26 L25 L24 L23 L22 L21 L20 L18 SD1241 L48 L47 L46 L45 L44 L43 L42 L41 L40 L39 L38 L37 L36 L34 type D1242 L64 L63 L62 L61 L60 L59 L58 L57 L56 L55 L54 L53 L52 L50 If a local station goes down during the operation the contents before going down are retained Stores conditions Contents of SD1224 to SD1227 and SD1228 to SD1231 for up to numbers are ORed If the corresponding bit is 0 the 49 to 64 corresponding bit of the special register above becomes valid If the own master station goes down the contents before going down are also retained Station number Stores station ee P D9243 SD1243 information for host Allows a local station to confirm its own station number number 0 to 64 station Number of link Stores number of D9244 SD1244 i Indicates the number of slave stations in one loop device stations slave stations Stores the number of times the following transmission Number of times Stores oan i errors have been detected CRC OVER AB IF D9245 SD1245 communications cumulativ
270. TIPLE CPU SYSTEM MELSEC Q 3 Ranges of access to control and non control modules The following table indicates accessibility to the control and non control modules in the multiple CPU system Accessibility Access target Non control module I O pee outside of the group Control module Disabled Enabled input tes es a eo eal Output Y a E E Buffer Red o x x O memoy wie Oo x o x O Accessible X Inaccessible 14 11 14 11 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 4 Modules that have mounting restrictions The following table indicates restrictions on the number of modules that can be mounted in multiple CPU system Ensure that the number of modules mounted is within these ranges Ce e a Product Model mounted per system mounted per PLC e QJ71LP21 e QJ71BR11 Maximum of four PLC to PLC Maximum of four PLC to PLC e QJ71LP21 25 networks and remote I O networks and remote I O e QU71LP21G networks networks e QJ71LP21GE e QU71E71 e QJ71E71 B2 Maximum of four Maximum of four e QJ71E71 100 Q series CC Link system QJ61BT11 No limit No limit master local modules e QJ61BT11N i MEL SECNETMINI S3 AES E see ee refresh iaa A refresh data link modules e A1SJ71T32 S3 function cannot be set up function cannot be set up e A1SD51S AnS series corresponding AADAT Special function modules e A1SJ71J92 S3 Maximum of six Maximum of six When the GET and PUT services are used
271. The amount of data transmitted received is the following transferal data e Link refresh data ee eee SW Refer to the following table for N5 CPU type Systems with only a Systems that include main base unit additional base units Q02CPU QO2HCPU QO6HCPU Q12HCPU Q25HCPU 18 3 18 3 19 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 19 STARTING UP THE MULTIPLE CPU SYSTEM This Chapter explains the standard procedures for starting up the multiple CPU system 19 1 Flow chart for Starting Up the Multiple CPU System Start Clarification of function sharing in multiple CPU system en Purpose of each device and allocation ay Selection of module to be used Installation of module ee GX Developer startup en ey Multiple CPU setting control CPU setting and other parameter settings Creation of sequence programs PLC power ON 1 Connection of PC and QCPU CPU No 1 1 Parameter and program writing CPU No 1 QCPU resetting ceccccccccccccseoees Clarify the control and functions executed by each CPU srvcccccecccccsesees TO USE automatic refresh of CPU share memory reserve continuous refresh points For automatic refresh of CPU share memory see section 16 1 sevcccececececesesee Select the modules for realizing the functions executed in the multiple CPU system evccccccccccsccesees Stal
272. Version 6 SW6D5C GPPW E or later are made by setting the type to Interruption The switch settings for interruption modules with the SW5D5C GPPW E or earlier GX Developers are made by setting the type to Intelligent Refer to the following manual for further details on the interruption module s switch settings e Building Block I O Module User s Manual d The switch setting of the intelligent function module is valid in the following cases e After the PLC is turned on e When the High Performance model QCPU is reset 7 FUNCTION MELSEC Q 7 11 Monitoring Function 1 What is Monitoring Function a This is a function to read the program device and intellignet function module status of the High Performance model QCPU by using GX Developer The High Performance model QCPU performs the END processing to handle monitor requests from GX Developer The results of High Performance model QCPU s END processing are displayed on the GX Developer side b By setting the monitoring conditions with GX Developer it is possible to monitor the High Performance model QCPU operation status under the specified conditions It is also possible to maintain the monitoring status under the specified conditions by setting the monitoring stop conditions c The use of local devices for execution of multiple programs makes it possible to monitor local device data 7 11 1 Monitor condition setting 1 Setting monitor execution conditions when m
273. When the High Performance model QCPU detects an error it turns on ERR LEDs When an error is detected special relays SMO SM1 are turned ON and an error code of the error is stored in the special register SDO When multiple errors are detected error codes of the latest errors are stored in the special register SDO For error detection use special relays and special registers in programs so that these devices can interlock with sequencers and mechanical systems b The High Performance model QCPU stores 16 latest error codes See Section 7 18 The failure history can be checked in the GX Developer function PLC diagnostics mode The failure history can be stored even when the power is shut off using the battery backup 3 High Performance model QCPU operation at the time of error detection a When an error is detected from the self diagnosis there are two types of modes that the High Performance model QCPU operation can change to 1 High Performance model QCPU calculation stop mode The calculation is stopped on detecting an error and all outputs of modules are set to OFF if the outputs for the modules have been set to Clear Default at the Error time output mode section in the I O assignment tab screen within the PLC Parameter dialog box And output Y is held The outputs Y on the device memory are retained However the outputs of the modules are held if they have been set to Hold there The output Y is also
274. a local station acting as the master station of tier three detects a parameter error or a remote I O station whose I O assignment is abnormal the bit of the device number corresponding to the station number of that local station or remote I O station turns to 1 Example When local station 5 and remote I O station 14 detect an error b4 and b13 in SD1220 become 1 and when SD1220 is monitored its value is 8208 2010H Stores the local or remote station numbers while they are communicating the initial data with their relevant master station QnA Bit b8 UR 9 Device number b5 UR 6 b4 UR 5 4 D1224 D1225 D1226 D1227 UR UR UR 25 22 21 UR UR UR 41 38 37 UR UR UR 57 54 53 The bit corresponding to the station number which is currently communicating the initial settings becomes 1 Example When stations 23 and 45 are communicating b6 of SD1225 and b12 of SD1226 become 1 and when SD1225 is monitored its value is 64 40H and when SD1226 is monitored its value is 4096 1000H Stores the local or remote station numbers which are in error Device Bit number b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 bo SD1228 UR UR UR UR UR UR UR UR UR U
275. a to which the files will be written This unit is called the file size unit a Conditions 1 Write target CPU module Q25HCPU 2 Written files File Capacity PARAM QPA parameter file 564 bytes MAIN QPG sequence program 525 steps 2100 bytes 1 1 Indicates the program capacity file header executed program displayed on GX Developer Refer to Section 6 8 3 Steps secured for write during RUN 500 steps 2000 bytes b Memory capacity calculation Memory capacity calculation is based on the file size unit of the write target CPU module In the example the file size unit of the Q25HCPU is 512 steps 2048 bytes according to Section 1 1 Parameter file capacity calculation The parameter file capacity is 564 bytes However since the parameter file is stored in the file size unit in the program memory it occupies 512 steps 2048 bytes lt In program memory gt Parameter Parameter 4 ete p 564 bres Occupies 2048 bytes 512 steps ale Ses 2 Program capacity calculation The program capacity is the sequence program capacity steps secured for write during RUN In the example the program capacity is 525 steps 500 steps 1025 steps However since the program file is stored in the file size unit in the program memory it occupies 1536 steps 6144 bytes lt In program memory gt Sequence Sequence program 325 st6pS program Steps secured Steps secured Occupies 1536 bytes for write
276. ach of the programs in an independent manner Moreover the device initial settings allow the data setting for devices and intelligent function modules special function modules without using a program 10 13 1 Global devices and local devices A number of programs can be stored and executed in the High Performance model QCPU High Performance model QCPU devices are classified into global devices shared by all the programs being executed and local devices used independently by each of the programs 1 Global devices a Global devices can be shared by all the programs being executed in the High Performance model QCPU Global device data are stored in the High Performance model QCPU s device memory and can be used by all programs High Performance model QCPU Program A Device memory Mo Internal relay 4 y12 MO ON OFF l Mo ON OFF data Program B Mo ______ lt Y11 i l MO ON OFF data b When executing multiple programs the shared range for all programs and the independent range for each program must be designated in advance Example Internal relay Mo Shared by all programs Used in program A The range of use must be designated for each program Used in program B Used in program C NS 10 64 10 64 10 EXPLANTION OF DEVICES 2 Local devices Local devices are used independently by the programs The use
277. ad write cannot be performed as well e Write cannot be performed to the file Read only If the password is registered file operations from GX Developer cannot be performed unless the same password is input 7 FUNCTION MELSEC Q 1 Password Registration To register the password select GX Developer Online Password setup keyword set up for writing to PLC Register password Password registration change x Password is set up for the PLC and the project currently selected on GX Developer a gt Target memory Program memory Device memory x Registration Password Registration condition A Write protect MAN TC i X Program MAINZ O U iemet r Program Man S U Witte protect r Program MAINS O U iemet r Pte protect vir Program MAINS Each item is described below a Target memory Specifies the memory storing the file whose password is to be registered or changed b Data type eects Displays the type of a file stored in the target memory c Data name uu eee Displays a filename of a file stored in the target memory d Registration eee Displays an asterisks that indicates a password protected file e Password Defines or changes a password f Registration Condition 1 Write Protect Write operation is restricted by a password Reading is not allowed 2 Read Write protect Read Write operation is restricted by a pas
278. afa MITSUBISHI ELECTRIC MELSEC System Q Programmable Logic Controllers User s Manual Functioning and Programming CPU Modules Q CPU Q Mode Art no 130022 01 06 2003 SHINE oa aa MITSUBISHI ELECTRIC INDUSTRIAL AUTOMATION Version F ersion e SAFETY INSTRUCTIONS e Always read these instructions before using this equipment When using Mitsubishi equipment thoroughly read this manual and the associated manuals introduced in this manual Also pay careful attention to safety and handle the module properly These SAFETY PRECAUTIONS classify the safety precautions into two categories DANGER and CAUTION r Indicates that incorrect handling may cause hazardous conditions e DANGER resulting in death or severe injury CAUTION Indicates that incorrect handling may cause hazardous conditions resulting in medium or slight personal injury or physical damage Note that the CAUTION level may lead to a serious consequence according to the circumstances Always follow the instructions of both levels because they are important to personal safety Please save this manual to make it accessible when required and always forward it to the end user Design Precautions lt DANGER e Install a safety circuit external to the PLC that keeps the entire system safe even when there are problems with the external power supply or the PLC module Otherwise trouble could result from erroneous output or erroneous o
279. ailed setting User connection No valid f Set the user connection No setting System connection valid setting Set the remote password valid port of the system connection 9 PARAMETER MELSEC Q Default Value fo e i Range aaa Section e Refer to the CC Link manual a Nt lt SC S bytes alohanumeric characters special symbols No omni No 1 to connection No 16 Specify the remote password valid port e Automatic open UDP port FTP communication port TCP IP e GX Developer communication port TCP IP e GX Developer communication port UDP IP HTTP port 9 PARAMETER MELSEC Q x1 N and M indicate the following N Indicates the module number M Indicates the network type Network Type MELSECNET 10 mode Control station MELSECNET H mode Control station MELSECNET 10 mode Normal station MELSECNET H mode Normal station MELSECNET H Remote master MELSECNET H Stand by station x2 N and M indicate the following N Indicates the module number M Indicates the network type Network Type Master station Local station 2H Standby master station 10 EXPLANTION OF DEVICES MELSEC Q 10 EXPLANTION OF DEVICES This chapter describes all devices that can be used in the High Performance model QCPU 10 1 Device List The names and data ranges of devices which can be used in the High Performance model QCPU are shown in Table 10 1 below Table
280. al devices and local devices eceeceeeeeeeceeseeeeeeeeeeeeeeeaecaeseeseaeeaeeaeseeseaeeaesaesaesaesaeseeeeeeaee 10 64 1051322 Device initial VAlUCSs eienn nA E A O REO E eve anevada ernie 10 70 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME 11 1to11 4 11 1 Reading High Performance model QCPU S Scan Time sscscssscscseseeeseseececeeeeeseseeeeeeeeeeaseaeaeaeaes 11 1 11 2 Factors Responsible for Extended Scan Time s sscscecsesecesesseseseseseeseseeeeeeseseeeeeeeeaeseeeeesasaeenseeeeasaeenenaeaeens 11 2 11 3 Factors Responsible for Shortened Scan Time sscscscscscscssscsescsescseseecceeceeeeseeeeeeeeeeeieeeeeeaeaes 11 4 12 1 Writing Procedure for 1 Progam neee e E E R E 12 1 12 1 1 Items to consider when creating one program ssssssssississisisrrsisinstnstnstnstnntutnntnntuntnsnnnnnnnnnn 12 1 12 1 2 Procedure for writing programs to the High Performance model QOPU csseeeeeteeees 12 2 12 2 Procedure for Multiple Programs seseseseseseeeeseseseseseseseseseseacaeacacacacaeacaeaeaeacaeacaeaeaeasaeaeaeeeeeeeeeeeeeeeeeeeeeeeeeees 12 5 12 2 1 Items to consider when creating Multiple programS ssssssssssssessrsrsrsirssrssnsrnstnsrnrnstnntnsnnnennrnnn 12 5 12 2 2 Procedure for writing programs to the High Performance model QCPU ssssssssesessssesesseese 12 6 13 OUTLINE OF MULTIPLE CPU SYSTEM 13 1 to 13 6 AKE VA RN SCEE O REEERE AEE A T a eee Bagh heat gees A Mg a ear A eget 13 1 13 2 Qutline of
281. al module of the CC Link having the lowest number There is restriction on the order of allocating I O numbers for MELSECNET H remote I O networks CC Link or other networks 5 10 5 10 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 6 I O Assignment by GX Developer This section describes the I O assignment using GX Developer 5 6 1 Purpose of I O assignment by GX Developer I O assignment by GX Developer is used under the following circumstances 1 Reserving points when converting to module other than 16 point modules You can reserve the number of points in advance so that you do not have to change the I O numbers when the current module will be changed to one with a different number of occupied I O points in the future For example you can assign a 32 point I O module to the slot where a 16 point O module is mounted at present Preventing I O numbers from changing when converting modules You can avoid the change in the I O numbers when an I O module other than 16 point module or intelligent function module special function module is removed due to a malfunction Changing the I O numbers to those used in the program When the designed program s I O numbers are different from the actual system I O numbers each module s I O number of base units can be set to program l O number Setting the input response time of input modules and interrupt modules I O response time To match the input response time of the input
282. ame of the program to be stored in the High Performance model QCPU must be designated This file name is used when writing the program and parameters from GX Developer to the High Performance model QCPU and when designating the program to be executed in the High Performance model QCPU See Chapter 6 for details regarding file names 3 Designating devices The number of devices required for the program must be determined See Chapter 10 for details regarding devices which can be used in the High Performance model QCPU 4 Device initial value setting Designate whether or not the device initial value settings are to be used in the High Performance model QCPU devices and intelligent function modules See Section 10 13 2 for details regarding device initial values 12 1 12 1 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q 12 1 2 Procedure for writing programs to the High Performance model QCPU 12 2 The procedure for writing programs and parameters created with GX Developer to the High Performance model QCPU standard ROM is shown below In order to write programs and parameters to the High Performance model QCPU standard ROM the valid parameters settings must be designated by the High Performance model QCPU DIP switches SW2 SW3 and the boot settings must be designated in the PLC parameter mode For details regarding High Performance model QCPU DIP switches refer to the High Performance model QCPU
283. ameter dialog box There are two types of latch range settings 1 Valid latch clear key Sets the latch range that can be cleared by operating latch clear with the RESET L CLR switch and remote latch clear 2 Invalid latch clear key Sets the latch range that can not be cleared even by operating latch clear with the RESET L CLR switch or operating remote latch clear from GX Developer b The devices in which RESET L CLR switch is set to invalid can only be cleared by an instruction or GX Developer 1 Instruction to clear method Reset with the RST instruction or send 0 with the MOV FMOV instruction 2 GX Developer clear method Clear all device memory in the online PLC memory clear including latch Refer to the GX Developer operating manual for details of the GX Developer operation methods To clear file registers or local devices use the RST instruction to perform a reset operation or use the MOV FMOV instruction to transmit 0 Refer to following manual for the MOV FMOV instruction QCPU Q mode QnACPU Programming Manual Common instructions 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 7 O Processing and Response Lag In the direct mode the batch communication with I O modules is performed before sequence program operation starts By creating a sequence program with direct access I O I O processing can be performed in a direct mode to communicate with I O module at execution
284. an execution type program step 0 to END Low speed execution Low speed execution Low speed execution Low speed execution type program step type program step type program step type program step 0 to 200 201 to 320 321 to END 0 to 120 wt 1 Scan 1 Scan 1 Scan 1 Scan 1 RUN write command of the scan execution type program 2 RUN write execution of the scan execution type program 3 RUN write command of the low speed execution type program 4 RUN write execution of the low speed execution type program If the write during RUN is executed while the PLOAD PUNLOAD or PSWAP instruction is executed the processing will enter into a stand by status for the write during RUN If the write during RUN is executed while the PLOAD PUNLOAD or PSWAP instruction is executed the execution of the instruction is delayed until the write during RUN is executed 7 FUNCTION MELSEC Q e The capacity of a High Performance model QCPU s program file is a sum of the capacity of the program created and steps used for the write during RUN The write during RUN is executed when the capacity of a program file is increased If the capacity of a program file becomes larger than what it was before steps can be assigned for the write during RUN This means that the write during RUN can be executed only when enough space is available in a user memory area If steps are assigned again while the write during RUN is executed scan time could be exten
285. ansferred words 0 95 Calculation example 4 74 u s when the module is mounted on the main base the number of settings is 1 and the number of words is 2 149 overhead 41us High speed interrupt program Depends on the user created interrupt program execution Buffer memory read 7 FUNCTION MELSEC Q 1 Main base a 16 words or less Time 0 47 X total number of transferred words 2 65 X number of settings 0 95 b More than 16 words Time 0 55 x total number of transferred words 0 95 2 Extension base Buffer memory write a 16 words or less Time 1 07 X total number of transferred words 2 65 lt number of settings 0 95 b More than 16 words Time 1 15 x total number of transferred words 0 95 Calculation example 4 54 u s when the module is mounted on the main base the number of settings is 1 and the number of words is 2 1 Main base Time 0 13 x total number of Y points 1 55 2 Extension base Time 0 2 x total number of Y points 1 55 Calculation example 3 63 u s when the module is mounted on the main base Y output the number of settings is 1 and the number of Y points is 16 7 FUNCTION MELSEC Q 7 22 4 Restrictions This section explains the items to be noted when the high speed interrupt function is executed Depending on the items a WDT error may occur or high speed interrupt may not be executed at preset cycle intervals if the corresponding restrictions
286. ansition Corresponds to SM91 watchdog timer setting or watchdog timer time limit error occurs b15 to b8 b7 to bO Corresponds to SM92 Step transition watchdog Corresponds to SM93 4 A timer setting F number for Corresponds to SM94 value timer set value F number setting Timer time limit Enabled only and time over Corresponds to SM95 0 to 255 setting oTo Corresponds to SM96 Ito ena 1 s units e Turning ON any of SM90 to SM99 during an active step starts the timer and if the transition condition next to the corresponding step is not met within the timer time limit the set annunciator F turns ON Corresponds to SM97 3 300bps 6 600bps 24 2400bps 48 4800bps 96 9600bps 192 19 2kbps 384 38 4kbps 576 57 6kbps 1152 115 2kbps QCPU Remote transmission transmission speed setting speed when RS232 GX Developer is used App 28 App 28 APPENDICES MELSEC Q Special Register List 2 System information Corresponding gt Set by ACPU Corresponding Number Name Meaning Explanation When set P T O l J o Eii e The switch status of the remote I O module is stored in the following format b15 to b4b3 to bO Det hag S Always New Remote lt 4 Vacant Q Remote I O module switch status Always 1 STOP e The CPU switch status is stored in the following format b15 to bi2b11 to b8 b7 to b4b3 t bO Q CPU switch s
287. aracter 7 D645 file name file name SD643 Sixth character Fifth character S Initial New SD644 Eighth character Seventh character SD645 First character of extension 2Ex i Second character of SD646 Third character of extension extension D647 Stores the data capacity of the currently selected file register in 1 k capacity capacity word units change block number block number change drive drive number the QCDSET instruction change S Status change oj on n Ue n App 39 App 39 APPENDICE MELSEC Q Special Register List Continued Corresponding Correspondin Number Name Meaning Explanation ACPU p 9 bo T TL Stores the comment file name with extension selected at the parameters or by the QCDSET instruction in ASCII code b15 to b8 b7 to bO SD651 Second character First character Comment file Comment file SD652 Fourth character Third character S Status SD653 Sixth character Fifth character change SD654 Eighth character Seventh character SD655 First character of extension 2Ex j Second character of SD656 Third character of extension extension Stores the drive number where the boot designation file QBT i being stored S Initial Boot Stores the file name of the boot designation file QBT operation SD661 S ia s Fi s z econd character irst character ignation designatio SD662 Fourth cha
288. ard Not required card Q2MEM 4MBF 4 Mbyte Q2MEM 8MBA 8 Mbyte ATA card Q2MEM 16MBA 16 Mbyte Q2MEM 32MBA 32 Mbyte 1 If the memory is in the initial status or it is unstable due to low voltage of the battery Q6BAT Q7BAT formatting automatically starts upon power on or resetting of the PLC However format with GX Developer before starting operation 2 The standard ROM is used in ROM formation of the program memory and therefore formatting is unnecessary for it Required Use the GX Developer 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 2 Program Memory 1 What is the Program Memory a The High Performance model QCPU s program memory is an internal RAM that stores programs executed by the High Performance model QCPU b The data storage in the program memory is backed up by High Performance model QCPU s built in batteries Q6BAT Q7BAT c Before using the High Performance model QCPU for the first time the program memory must be formatted by GX Developer For details on the formatting procedure by GX Developer refer to GX Developer manuals 2 Data Storage Data on parameters and programs can be stored in the program memory For the types of data stored in the program memory see Section 6 1 3 Format a Formatting Choose Online Format PLC memory to open the Format PLC memory dialog box Select Program memory Device memory from the Target Memory list box
289. ata etc are stored in this area The file header size changes between 25 and 35 steps 100 and 140 bytes depending on the device setting in the PLC parameter dialog box Execution program The created program is stored in this area 1 step is 4 bytes Memory allocated for Write during RUN This area is used when write during RUN that write during RUN increases the number of steps is executed from GX Developer Default value is set to 500 steps 2000 bytes The number of memory allocated for Write during RUN can be changed using the online write to PLC program The number of memory allocated for Write during RUN can be redefined if the number of memory allocated is not sufficient for write during RUN See Section 7 12 1 2 The size of the program displayed by GX Developer During programming by GX Developer the program size the total of the file header size and the number of created program steps is displayed as the number of steps as shown below During programming the size of the program created is displayed Number of steps used display 2 MELSOFT series GX Developer Unset project LD Edit mode MAIN 35 Step SS Project Edit Find Replace Convert View Online Diagnostics Tools Window Help Dale 5 salen aelel ll ale Ble Program al D j TE z 2a zal EEEF p F 5 z sF sFO aF 7 aFS aF5 caF5 cahl0 F10 F 4 We Z7 Hor amp l 6 MEMORIES AND FIL
290. atch Clear a The remote latch clear resets the device data latched to the High Performance model QCPU using the GX Developer etc when the High Performance model QCPU is in STOP status b Remote latch clear is useful when the High Performance model QCPU is in the following areas In these cases the operations are performed in combination with the remote RUN STOP e When the High Performance model QCPU is at a position out of reach e When externally performing latch clear of the High Performance model QCPU inside a control panel 2 Remote Latch Clear Method The remote latch clear can only be performed from GX Developer or by using serial communication module To perform the remote latch clear follow the following steps a Use the remote STOP to bring the High Performance model QCPU to STOP status b Use the Latch Clear to bring the High Performance model QCPU to the Latch Clear status 1 The GX Developer operations are performed by on line remote operation 2 The serial communication module and Ethernet interface module are controlled by commands complying with the MC protocol For details of the MC protocol refer to the following manual Q Corresponding MELSEC Communication Protocol Reference Manual c To return the High Performance model QCPU to RUN status after the remote latch clear perform a remote RUN operation 3 Precautions a Either remote latch clear or latch clear by RESET L CLR switch cannot be perfor
291. atecaats 4 40 Af 2 DWOCU MOOG he izes ies bectict sone lesb chi 2e ben oie duet ae ated Ne dust iMe aes Me dete adie a det ae eget iti eee 4 43 4 8 Numeric Values which Can Be Used in Sequence Programs ssecsecsesestesesesescseseseeecseseeeseeseaeeeeeeeeeeateteeeaees 4 45 4 83 11 BIN Binay cOd irpta eiar aA Aa TAKAA a AKERRAK tenistisenieteehistisen RRETAN 4 47 4 8 2 HEX Hexadecimal cence tas vias wi ie a ie ie eevee i ria 4 48 4 8 3 BCD Binary Coded Decimal cccceceeseeeceeeseeeceeeeeeeseeaecaeeaeeaecaecaeeeaeeaesaesaseaesaeseeeaesaesaseeseateaes 4 49 4 8 4 Real numbers floating decimal point data 0 eee eeceeeeeeeeeeeeeeeeeeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeeaeeatenas 4 50 4 9 Charactek String Deltas Merien Sh Ohi alata chal alee e de Oa ah a ee att alah all aas 4 53 5 1 Relationship Between the Number of Stages and Slots of the Extension Base Unit csseeeeeeees 5 1 5 2 Installing Extension Base Units and Setting the Number of Stages secsccceesseseseseseseseseeseeeeeeseateteeeseatens 5 2 5 3 Base Unit Assignment Base Mode ou esesesessseseeeeeeteteeseeeeseseeeseseseseeseeseseseasasseeseeesseaeasesasesssetenenenenenenenenenenenes 5 3 54Whatae VO NUM DETS Paetaa Gh Aided aria Neate dersis atten aeteierdeaneneeteenilee bentendertta ani aian 5 7 5 5 Concept of V O Number ASSIQNMENA 2 sccececesecseseseseeseseceseeseseseeeeseaeseeneseacaeeeeseacaeseeeseseaeeeeseseateneeeesaeateneesaea
292. ated instruction executable PID bumpless processing for incomplete derivative n n n n n n n n n J J N N N N N N N oO foe RI J J J Q Q Q le N o a R N Co 7 Trace preparation Sampling trace preparation Sampling trace start Trace execution in progress Sampling trace execution in progress Trace trigger Sampling trace trigger After trace trigger After sampling trace trigger App 9 Number E Meaning Instruction not executed Instruction execution Keyboard input reception enabled Keyboard input reception disabled Instruction not executed Instruction execution Forces match Does not force match Performs link refresh Performs no link refresh Performs all refresh processes Performs the refresh set the SD778 Local device disabled Local device enabled Local device disabled Local device enabled CC Link dedicated instruction executable CC Link dedicated instruction not executable Matched Not matched Meaning Not ready Ready Suspend Start Suspend Start gt ON Start OFF Not after trigger ON After trigger Special Relay List Continued Explanation ON when PKEY instruction is being executed Goes OFF when CR is input or when input character string reaches 32 characters Goes ON when keyboard input is being conducted Goes when keyboard input has been stored at
293. atibility with A PLC section at the PLC system tab screen in the PLC Parameter dialog box 10 34 10 34 10 EXPLANTION OF DEVICES MELSEC Q 10 3 3 Special registers SD 1 Definition A special register is used to store High Performance model QCPU status data diagnosis and system information 2 Special register classifications Special registers are classified according to their applications as shown below a For fault diagnosis SDO to SD199 b System information SD200 to SD399 c System clock system counter SD400 to SD499 d Scan information SD500 to SD599 e Memory card information SD600 to SD699 f Instruction related SD700 to SD799 g For debugging SD800 to SD899 h Latch area SD900 to SD999 i For A PLC D1000 to SD1299 j _Fuse blown module D1300 to SD1399 k Check of I O modules D1400 to SD1499 1 For details on special relays which can be used by the High Performance model QCPU refer to Appendix 2 2 This takes effect only after you have turned on the Use special relay special register form SM1000 SD1000 check box in the Compatibility with A PLC section at the PLC system tab screen in the PLC Parameter dialog box 10 35 10 35 10 EXPLANTION OF DEVICES MELSEC Q 10 4 Link Direct Devices J 2 2 1 Definition a At END processing of sequence program a data refresh data transfer is performed between the High Performance model Q
294. aximum of 1 scan DY5E output turns ON slowest if the DX5 input is turned ON immediately after the step 55 operation In this case the DY5E output will turn ON during the next scan In this case output DY5E lag max 1 scan behind input DX5 Fig 4 10 Timing chart showing response of Output Y when Input X turns ON 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 8 Numeric Values which Can Be Used in Sequence Programs Numeric and alphabetic data are expressed by 0 OFF and 1 ON numerals in the High Performance model QCPU This expression form is called binary code BIN The hexadecimal HEX expression form in which BIN data are expressed in 4 bit units and the BCD binary coded decimal expression form are applicable to the High Performance model QCPU Real numbers may also be used See Section 4 8 4 The numeric expressions by BIN HEX BCD and Decimal DEC notations are shown in Table 4 1 below Table 4 1 BIN HEX BCD and Decimal Numeric Expressions BCD DEC Decimal HEX Hexadecimal BIN Binary Binary Coded Decimal l i 0 E20 Zz nmoowv gt k o 0111 4444 1111 nnn 0114 14111 1111 1000 0000 0000 1000 0000 0000 1000 0000 1000 0000 0000 id 1111 1111 1111 1111 1111 1111 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 1 External numeric inputs to High Performance model QCPU When inputting numeric values to the High
295. azn MHA SD18 File name 44H D 43H C SD19 ASCII code 8 characters 46H F 45H E SD20 48H H 47H G SD21 Extension 2EH 49H 1 2EH SD22 ASCII code 3 characters 4BH K 4AH J SD23 SD24 5D25 Vacant SD26 Time value actu1ally measured Number Meaning SD16 Time 1 us units 0 to 999 us SD17 Time 1 ms units 0 to 65535 ms SD18 SD19 SD20 SD21 SD22 Vacant D23 D24 D25 D26 Program error location Number Meaning SD16 SD17 File name Error SD18 ASCII code 8 characters er PE SD19 Error individual dividual SD20 Extension 2EHO S Error New O Rem information information SD21 ASCII code 3 characters SD22 Pattern SD23 Block No SD24 Step No transition No SD25 Sequence step No L SD26 Sequence step No H Contents of pattern data 1514 to 4 3 2 1 0 Bit number 0 0 to 0 O gt k L SFC block designation present Not used 1 absent 0 SFC step designation present 1 absent 0 n g N n n n n n n n n g g g g iw is o 0 N N N N a a a a wo N oO o N D ooon SD25 SFC transition designation present 1 absent 0 Parameter number Annunciator Intelligent function number CHK module parameter instruction error malfunction for QCPU only number Number Meaning Number Meaning Number Meaning
296. ce model QCPU with the RESET L CLR switch After the boot run is completed in the specified memory the BOOT LED lights up 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 3 Changing Program Files While the High Performance model QCPU is in the Run Status a While the High Performance model QCPU is in RUN status addition change deletion of program files from the standard ROM or memory card to the program memory can be made by using any of the following instructions in a sequence program e PLOAD Loading program from memory card e PUNLAOD Unloading program from program memory e PSWAP Load Unload For details on the PLOAD PUNLAOD and PSWAP instructions refer to the QCPU Q Mode QnACPU Programming Manual Common Instructions Even if a program file is changed while the High Performance model QCPU is in RUN status the settings specified at the Program tab screen the PLC Parameter dialog box will remain unchanged When the High Performance model QCPU is in STOP status the settings made at the Program tab screen in the PLC Parameter dialog box must be adjusted to any changes addition change or deletion of program names made when the High Performance model QCPU was in RUN status If no adjustment is made at the Program tab screen in the PLC Parameter dialog box an error may occur when the High Performance model QCPU enters into RUN status from STOP status 4 Precau
297. ceeceeeeeeeeeneees 4 4 SW Link special register ccceeeeee 10 30 Switch setting of intelligent function module 7 21 System Protect ccceccesscseeetessteesseeseeseeees 7 65 T DEAR ini p E E E 10 19 ME T hoai on a eid batile tia h 10 19 ACCUIACY ai E hbaes aha 10 22 PFOCOSSING Hi aneren aaa 10 22 TR SFC transition device 0 eee 10 58 U U I O No designation device 10 59 U 12 G i Intelligent function module device 10 38 USOPr MEn as o a A 6 3 V V Edge telaren a eee 10 16 VD Macro instruction argument device 10 60 W W Link register ceeeeeeeeeeeeeeeeeeeeeeeeeeees 10 29 Watch dog timer 7 57 WDT Watch dog timer eeeeeeeeeeeeeeea 7 57 Write during RUN 0006 7 35 7 37 7 55 Writing to the time data 0 0 eee eeeeeeeeeeee 7 9 X X INPUt cee eae eee eee 10 5 Y Y OUIDUL ia aeaes wae het ohh Qin A 10 8 Z Z Index FEGISLEL ee eeeeeeeeeeeeteeeteeeteeeteeeteees 10 39 ZR Serial number access format of file register dpa seein whips learns wu vneehine anes tibet enseectiudipas leas 10 49 Index 3 WARRANTY Please confirm the following product warranty details before starting use 1 Gratis Warranty Term and Gratis Warranty Range If any faults or defects hereinafter Failure found to be the responsibility of Mitsubishi occurs during use of the product within the gratis warranty term the product shall be repaired at n
298. ces See Section 10 9 for details on common pointers and local pointers 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q c Gathering interrupt programs in a single program 1 Create the interrupt programs in order beginning from step 0 of the stand by type program An END instruction is required at the end of the interrupt program 2 Because there are no restrictions on the order of creating interrupt programs the pointer numbers need not be assigned in ascending order when creating multiple interrupt programs Program A High Performance model QCPU Program memory Standard Main routine ROMA Merely card rogram a Write Program A Program B Stand by type program Program B IRET H 132 Lya gt H IRET JH 128 cmn 4 IRET H Interrupt program END Interrupt pointer This does not have to be created in order See Section 10 10 for details on interrupt pointers 4 SEQUENCE PROGRAM CONDITIONS CONFIGURATION AND EXECUTION MELSEC Q 4 2 5 Fixed scan execution type program 1 Definition of fixed scan execution type program a b This program is executed at specified intervals Without describing an interrupt point and IRET instruction a fixed scan execution can be performed for each file The type of execution is set to Fixed Scan at the Program tab screen in the PLC parameter dialog bo
299. cessed 2 Execution conditions for main routine programs 2 If multiple programs are being executed the following five types of execution conditions can be designated by the program in the PLC parameters according to the application e Initial execution program See Section 4 2 1 e Scan execution type program See Section 4 2 2 e Low speed execution type program See Section 4 2 3 e Stand by type program See Section 4 2 4 e Fixed scan execution type program See Section 4 2 5 1 For details on the END FEND instruction refer to the QCPU Q mode QnACPU Programming Manual Common Instructions 2 If only one program is executed it is processed under the scan execution type program condition without designation by the program in the PLC parameters 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 1 2 Sub routine programs 1 Definition of sub routine program a Asub routine program begins from a pointer P _ and ends at a RET instruction b A sub routine program is executed only when called by a CALL instruction e g CALL P FCALL P from the main routine program c Sub routine program application 1 The overall step count can be reduced by using a sub routine program as a program which is executed several times in one scan 2 The step count of a constantly executed program can be reduced by using a sub routine program as a program which is executed only when a given condition
300. col Reference Manual Step 0 END Step 0 ON module CPU module RUN STOP status STOP status Fig 7 5 Remote RUN STOP Time Chart using GX Developer serial communication module etc 7 FUNCTION MELSEC Q 3 Precautions a Take note of the following because STOP has priority in High Performance model QCPU 1 The High Performance model QCPU enters the STOP status when remote STOP is performed from remote RUN contact GX Developer or by using serial communication module 2 Toset the High Performance model QCPU to RUN status from STOP status again perform the remote RUN from the external factor remote RUN contact GX Developer serial communication module etc from which the remote STOP was performed The RUN STOP status is described below e RUN Status Status in which the calculations are repeatedly executed from step 0 to the END FEND instruction in the sequence program e STOP Status Status in which the sequence program calculations are stopped and the output Y is all OFF 7 FUNCTION MELSEC Q 7 6 2 Remote PAUSE 1 What is Remote PAUSE a The remote PAUSE performs PAUSE of the High Performance model QCPU externally with the CPU module RUN STOP switch at RUN position The PAUSE function stops the High Performance model QCPU calculations while maintaining the ON OFF status of all output Y b This can be used to maintain the output Y on even
301. control modules and non control modules By connecting a single High Performance model QCPU to a personal computer it is possible to perform monitoring and tests on all modules being controlled by the multiple PLC system s High Performance model QCPU in the same way as with a single CPU system Other station High Performance model QCPUs on the same MELSECNETH H Ethernet or other network can also be accessed It is possible for all High Performance model QCPUs on a multiple CPU system to be accessed from a GX Developer that is connected to other stations on the same network 13 4 13 OUTLINE OF MULTIPLE CPU SYSTEM MELSEC Q 13 3 Differences with Single CPU System 13 5 The differences between single CPU system and multiple CPU system are explained below 1 Function versions see Sections 14 2 1 to 14 2 5 a Function version B High Performance model QCPUs are supported by multiple CPU system Function version A High Performance model QCPUs cannot be used on a multiple CPU system b All I O modules can be used on a multiple CPU system c Use function version B intelligent function modules on the multiple CPU system Function version A intelligent function modules can be used if set up as control CPU by the CPU No 1 Mounting position of CPU module see Section 14 2 1 High Performance model QCPUs can be mounted on the CPU slot from the right hand side of the power unit sequentially The motion CPUs are mounted t
302. cuit mode during RUN status c Writing program during RUN can be performed from a GX Developer connected to another station in the network MELSECNET H Change by GX Developer and write in High Performance model QCPU at the conversion Personal computer GX Developer 7 FUNCTION MELSEC Q 2 Precautions Take a note of the following when writing during RUN a 1 2 The memory that can be written during RUN is only program memory 1 If the write during RUN is performed while booting a program from a memory card RAM the program to be booted will be changed While booting it takes some time until the write during RUN is completely executed If the write during RUN is performed while booting a program from the standard ROM or memory card ROM the program to be booted will not be changed Before turning off the PLC or resetting the High Performance model QCPU write the program memory into the standard ROM or memory card ROM A maximum of 512 steps can be written at once during RUN When a low speed execution type program is being executed the RUN write is started once the low speed execution type program is complete Also the low speed execution is stopped temporarily during a RUN write 3 4 Scan execution type program step 0 to END Scan execution type program step 0 to END Scan execution type program step 0 to END Sc
303. d Write to PLC Flash ROM 1 Write the program memory to ROM a The Write the program memory to ROM function allows a batch of files stored in a program memory to be written to a standard ROM or a Flash card This function is used to debug the programs stored in the program memory When the Write a memory to ROM function is executed all files stored in the standard ROM or Flash card are erased before a batch of files stored in a program memory are written No files can be added to the standard ROM or Flash card The memory capacity of a standard ROM or Flash card is the same as that of a program memory A memory of a larger size than the memory capacity of a program memory cannot be used To execute the Write the program memory to ROM function set the length of GX developer s time check to 60 seconds or longer Shorter time check may cause a time out on the GX Developer side To execute the Write the program memory to ROM function via the CC Link network by operating from a GX Developer at a local station set the length of CC Link s CPU monitoring time SWOA to 60 seconds or longer The default is 90 seconds Use the default value when making the setting 2 Write to PLC Flash ROM a b The Write to PLC Flash ROM function is used to write a batch of files specified by GX Developer to a standard ROM or Flash card The Write to PLC Flash ROM function can fill all available space in a standard ROM
304. d 10 3 TOZ NOUS XA a a hc Se ba eet at dea ett a Sad aed a a deta ed i te a ev ed ea a Pde ea ele a Bt ad 10 5 V02 2 UTOUTS Naras spe nctaeGtenaresbecscscSteagucavaaesuasiss bucaveexdcas E 10 8 10 2 3 Internal relays M c ccessce sdec ease dec eine ei ee dite A i A a iN 10 10 10 24 Lateh relays Lja a e a aeaa AA p AAR eL A RARA Ei CiN DRR RAEN AFARA IA F SAAE AEAEE REENA 10 11 10 2 5 Anunciators Fjne nainn er es 10 12 10 2 6 Edge TIVAN I raea e EE acct tes teres eter A OE ean tes Cee E AO EA E lla 10 16 1ST Link relays B sanka A A A A 10 17 0 2 8 Link special relays O B aaa aa aa aaa ea ara a aaa a Taaa A aeaaea E aeei EEan a haa Taa Eai 10 18 10 29 Step relays O j a ean ne A ee ed a ee i le ee 10 18 10 210 Timers Thea a tees cas cede eh ee he ea ee de 10 19 10 24 11 Counters C EEA hea E linia dela iisanleamsasiatidedan 10 24 10 2 12 Data registers D iisiis tesscigst te tiaeecig th tind ee esha ted titi nadie tidied aiding inane 10 29 TOL TS Bink FeGisters W ccs ce a E ceete cas ian Seatac tain eae ate ata ie eta ta ie ed 10 30 10 2 14 Link special registers SW cccccsccecceeeseeeeceeceeeeseeeecaeceeeeeesaesaeseeseaesaesaeseseaesaesaeseeseastaseeseeeaee 10 31 10 3 Internal System DeViCeS riiseni iii RAA iain ei aewind 10 32 10 3 1 Function devices FX FY FD cccceeesceseseeeeeeeeeeeeeeeeeeeeeeeeeaeeseaeeseaeeseaaeeeaaeesaeeseaeeseaeeseeeeaeeesaes 10 32 10 3 2 Special relays SM iinn iniii a aaa ined diene
305. d for automatic refresh purposes other devices cannot be set up with the GX Developer Settable devices e The device in the left column occupies one point for every transmission point e Multiples of 0 or 16 are specified for the first number e The device in the left column occupies one point for every transmission point 1 CPU devices use the total amount of transmission point devices consecutively from the specified device number to the CPU No 1 to No 4 in the first set range Set a device number so that the amount of transmission point devices can be secured Sixteen times the number of transmission points will be set if a bit device is specified in the CPU device For example If the total number of transmission points for CPU No 1 to No 4 is ten then 160 points will be set between BO and BOF when the BO link relay is specified 16 4 16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE CPU SYSTEM MELSEC Q 2 The CPU devices are set as follows e It is possible to change the device and set up settings 1 to 4 The same devices can also be specified as long as the device range for settings 1 to 4 are not duplicated Setting 1 In the case of link relays Change screens Setting 1 Send range for each PLC PLC side device RUE PLC share memory G Dev starting BOJ It is possible to change the device Poite Stat End Stat End and set up settings 1 to 4 0800 oso BOC 0800 0801 No3 4l 0800 080
306. d in BIN code SD62 can be cleared by or instruction If another F number has been detected the clearing of SD62 causes the next number to be stored in SD62 When one of FO to 255 is turned on by or SET F the F number which has been detected earliest among the F numbers which have turned on is stored in BIN code SD62 can be cleared by executing or instruction or moving INDICATOR RESET switch on CPU module front to ON position If another F number has been detected clearing of SD62 stores the next F number into SD62 When operation error has occurred during execution of application instruction the step number at which the error has occurred is stored in BIN code Thereafter each time operation error occurs the contents of SD1010 are renewed App 45 APPENDICES MELSEC Q Special Register List Continued ACPU Special Special Correspondin Special Register after Register for Name Meaning Details p 9 ae CPU Conversion Conversion Modification When operation error has occurred during execution of application instruction the step number at which Step number at k D9011 SD1011 Errorsie which Gperation the error has occurred is stored in BIN code Since p itor ne ocaiired the step number is stored into SD1011 when SM1011 turns from OFF to ON the data of SD1011 is not updated unless SM1011 is cleared by a user program R The I O control mode set is returned in any of the following numbe
307. d the amount that can be stored the oldest history is overwritten with the latest history POINT Even if the failure history file set in the parameter does not exist in the memory card the error will not occur in the High Performance model QCPU The High Performance model QCPU stores the failure to the failure history storage file 2 Failure History Clearing Method The failure history storage memory failure history file are cleared using the failure history clear in the GX Developer PLC diagnosis mode Data stored in both the High Performance model QCPU failure history storage memory and failure history file within the memory card can be cleared with a failure history clear 7 FUNCTION MELSEC Q 7 19 System Protect The High Performance model QCPU has a few protection functions system protect to prevent the program changes by a third party other than the designer from GX Developer function or serial communication module There are the following methods for system protects Valid Item to protect Protect valid file Protection description Method iming Be Set the High Prohibits all write control i A Performance model Valid for All of CPU All files instructions to the High i QCPU system setting devices too Performance model QCPU i switch SW1 on Memory card Performs drive protect forthe Set write protect switch All files f Always module memory card and write protect on the memory card on Changes t
308. de where the operations for the low speed execution type program are started from the next scan even when there is the excess time Indicates whether the normal SFC program is being executed or not Used as an SFC control instruction execution interlock M9102 format change Instruction execution tae S Status change QCPU serial No 04122 or later Indicates whether the program execution management SFC program is being executed or not Used as an SFC control instruction execution interlock The status of the intelligent function module access instruction executed immediately before is stored This data is overwritten when the intelligent function module access instruction is executed again Used by the user in a program as a completion bit S Status change App 5 APPENDICES 3 System clocks counters Special Relay List MELSEC Q Corresponding v9 OL som S SM400 Always ON aa Normally is ON Every END processing SM401 Always OFF ON e Normally is OFF oFF Y ON 1 scan OFF gt ON for 1 scan SMa02 only after RUN for 1 scan only Low speed execution type SM404 program ON for 1 scan only after RUN Low speed execution type SM405 program After RUN OFF for 1 scan only ts second clock saat 0 2 second clock sm2 1 second clock SM414 2n second clock n n e sEe BR RIT SR Sa SE So mwfoafo n R are w N oO O o 5 a
309. ded for a value shown below in the table Controls are interrupted for a value shown below in the table Step for Write During RUN CPU Type If Not Changed If Assigned Again QnCPU QnHCPU f High Performance model QCPU does not work correctly if the following instructions are written during RUN write 1 Trailing edge instruction If the execution conditions of the following trailing edge instructions are not arranged upon completion of writing the trailing edge instruction is executed e LDF e ANDF ORF e MEF e PLF 2 Leading edge instruction If the execution conditions for leading edge instructions PLS instruction and OP instruction are arranged upon completion of writing leading edge instruction is not executed The leading edge instruction is executed when the execution conditions are OFF then ON 3 SCJ instruction If the execution conditions of the SCJ instruction are arranged upon completion of writing a jump to the designated pointer occurs even ina scan cycle 7 FUNCTION MELSEC Q 7 12 2 Writing a batch of files during RUN 1 File Write During RUN function a The file write during RUN function is used to write a batch of files to the High Performance model QCPU as shown below in the table NA N High Performance model QCPU Built in Memory Card RAM Memory Card ROM emory Name Standard RAM Standard ROM SRAM Card Flash Card ATA Card Intelligent function T x x x x x module parameter Prog
310. del QCPU To change the number of occupied I O points of each slot select it from the followings 0 0 point e 16 16 points e 32 32 points e 48 48 points e 64 64 points e 128 128 points e 256 256 points e 512 512 points e 1024 1024 points If the number of occupied I O points is not designated for a slot the one of the actually mounted module is used Start XY Used with High Performance model QCPU 1 When the I O number of each slot is changed you should designate the head I O number according to the change If Start XY is not designated for a slot the I O number continuing from the last number of the currently designated slot is assigned 2 Avoid the I O number designation of each slot from overlapping the I O numbers assigned by High Performance model QCPU An error SP UNIT LAY ERR occurs when the I O numbers overlap 2 Slot status after I O assignment When the I O number is assigned to a slot the assigned I O number takes priority regardless of the actual installation of a module a If the designated number of occupied I O points is lower than that of the actually mounted I O module some I O points of the mounted module are not used For example if a slot where a 32 point input module is mounted is designated for a 16 point input module the latter 16 points of the 32 point input module are disabled If the designated number of occupied points is less than that of the actually mou
311. duct information e o 1 Z 3 4 5 6 0108100000000000 A Base QIJELUnmo Unmo Unmo Unmo Unmo Unmo Unmo F z x R i Base Module BTlljunti juntijuntijuntijuntijuntijunti A 32pt ng ng ng ng ng ng ng Main base QZ5H C ks ol y S Es C gt Parameter status E I O Address BBs Ie Ll Status E Unit system error 4 Unit error UO Unit warming PLC diagnostics Module s Detailed Information Stop monitor Close f 9 a Base Information The Base Information section shows information about a selected base unit the name of a base unit main base or extension base 1 to 7 the number of slots base type the number of modules mounted on the base 1 The Base name field indicates the main base or extension base with power source It indicates the extension base even if a power source module is not installed on the extension base 2 The Base type field indicates the following abbreviations Q for Q33B Q35B Q38B Q312B Q for Q63B Q65B Q68B Q612B e QA for QA1S65B QA1S68B 3 The Number of Installed Module field indicates the number of modules installed on the base unit b Installed status The Installed status section shows the model name of the selected base unit and the number of points The slot column indicates Unmounting if a base unit is not installed in a particular slot 7 FUNCTION MELSEC Q c Parameter status The Parameter status
312. dule Input module Input module function module Input module function module Output module Output module Intelligent Intelligent N Setup of the controlling QCPU 1 Control performed with the QCPU1 sequence program Control performed with the QCPU2 sequence program b The CPU module that controls the I O modules and intelligent function modules is known as the Control CPU The I O modules and intelligent function modules controlled by the control PLC are known controled modules Other modules not controlled by the control CPU are known as non controlled modules 1 For further information on PC CPU module consult CONTEC Co Ltd Tel 81 6 6472 7130 2 Indicates the grouping configuration on the GX Developer CPU module indicates the CPU No 1 and 1 on the I O module and intelligent function module indicates that their control CPU is the CPU No 1 13 3 13 3 13 OUTLINE OF MULTIPLE CPU SYSTEM 13 4 MELSEC Q 2 Multiple CPU system setup It is necessary to set up the Number of mounted CPU modules and the Control CPU with PLC parameters in all CPU modules onto which main base units are mounted in order to control a multiple CPU system see Chapter 9 3 Multiple CPU system access range a b It is possible for a multiple CPU system s control CPU to perform the I O refresh procedure on control modules and write in the buffer memory of intelligent function modules in
313. e Input module Output Output module Composite I O module Intelli Intelligent function module 3 Itis possible to load output ON OFF data being controlled by other CPUs with direct access output 4 Remote station output such as empty slots MELSECNET H and CC Link cannot be loaded Use automatic refresh of CPU shared memory and send the ON OFF output data for remote stations to use the ON OFF output data for MELSECNET H CC Link and other remote stations in other CPUs b When Do not load output condition outside of group has been set It is not possible to load ON OFF data output to output modules and intelligent function modules by other PLCs into the host CPU s output Y remains at OFF 17 3 17 3 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES 17 4 MELSEC Q 3 Output to output modules and intelligent function modules It is not possible to output ON OFF data to non control modules ON OFF will be performed within the High Performance model QCPU when the output from output modules and intelligent function modules controlled by other PLCs such as sequence programs have been set to ON OFF but this will not be output to output modules or intelligent function modules Accessing the intelligent function module buffer memory a It is possible to read data from the buffer memory of intelligent function modules being controlled by other CPUs with the comma
314. e execute types of ABC and DEF programs are switched as shown below Before execution of PSCAN and PSTOP instructions Scan execution type program ABC e PSCAN is an instruction that switches Mo the specified DEF program to a scan PSCAN DEF type program ESTOP AC e PSTOP is an instruction that switches the specified ABC program to a stand by type program Stand by type program DEF Scan execution type program GHI PSCAN GH PSCAN ABC PSTOP DEF PSTOP GHI Il When M0 is on After execution of PSCAN and PSTOP instructions Stand by type program ABC MO PSCAN DEF PSTOP ABC Scan execution type program DEF Scan execution type program GHI PSCAN GHI PSCAN ABC PSTOP DEF PSTOP GHI 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q d The execute type of program is switched at END processing The program execute type does not change while the program is being executed If different execute type is specified for a same program in a same scan the last specified execute type becomes effective END processing END processing Execution program gt GHI ABC GHI GHI DEF name GHI H a H PSTOP ABC execution Switches DEF to the scan PSCAN DEF execution execution type and ABC to the stand by type program respectively END processing 1 The GHI and
315. e I O modules and intelligent function modules are mounted from the right of the slots occupied by the CPU modules c I O number of a system without PC CPU module The I O number for the I O modules and intelligent function modules mounted from the right of the slots occupied by the CPU modules is set as 00H and consecutive numbers are then allocated sequentially to the right 1 Example Two modules are mounted 1234567 Power supply CPU module CPU module module gt O number 00H 2 Example Three modules are mounted and one empty slot exists 234567 Empty Power supply CPU module CPU module module CPU module 1 O number 00x d putoa number of a system with PC CPU module The PC CPU module occupies two slots The one on the right side among the two slots is handled as an empty slot 16 empty points are occupied with default setting Therefore the I O number of the slot on the right side of the PC CPU module is 10H Set the empty slot at zero point using I O A of PLC Parameters dialog box to assign OOH to the first I number CPU module CPU module CPU module Empty slot OOH to OFH occupied e If the number of CPU modules mounted on the main base unit is smaller than the number set at the Multiple CPU setting of PLC Parameter dialog box the aes on the right of the actually mount
316. e Output refresh Data in the output Y device memory is output in a batch 2 to the output module before sequence program operation starts e When an input contact instruction has been executed Input information is read 3 from the input X device memory and a sequence program is executed When an output contact instruction has been executed Output information is read 4 from the output Y device memory and a sequence program is executed e When an output OUT instruction has been executed The sequence program operation result 5 is stored in the output Y device memory Fig 4 7 I O Information Flow in Refresh Mode 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 1 The peripheral device input area can be switched ON and OFF by the following e Test operation by the GX Developer e A network refresh by the MELSECNET H network system e Writhing from a serial communication module e CC Link automatic refresh 2 The output Y device memory can be switched ON and OFF by the following e Test operation by GX Developer e A network refresh by the MELSECNET H network system e Writhing from a serial communication module e CC Link automatic refresh x3 The remote I O refresh area indicates the area used when automatic refresh setting is made to the input X with MELSECNET H and CC Link Automatic refresh of the remote input refresh area is executed during END processing 4 SEQUENCE PROGRAM CONFIGURATION AND
317. e Remote password setting e Increased standard RAM capacity of Q12HCPU Q25HCPU e Compatibility with MELSECNET H remote I O network e Interrupt module QI60 compaitibilit e Compatibility with the multiple PLC system Version 6 or later w Installation of PC CPU module into the 03051 or later multiple PLC system Version 7 or later e High speed interrupt function e Compatibility with index modification for module designation of dedicated instruction e Selection of refresh item for COM 04012 or later instruction e Extended life battery of SRAM card e Compatibility with 2Mbyte SRAM card e Increased standard RAM capacity of QO02HCPU QO6HCPU n e SFC program online batch change 04122 or later Eile memory capacity change Version 8 or later e CC Link remote network additional mode e Incomplete derivative PID operation 05032 or later function e Floating point comparison instruction speedup 02092 or later Version 6 or later 1 Refer to Section 2 3 for the serial No and function version of the High Performance model QCPU 2 Refer to Appendix 4 for details 1 OVERVIEW MELSEC Q 1 1 Features High Performance model QCPU has the following new features 1 Controllable multiple I O points All High Performance model QCPUs support 4096 points X Y0 to FFF as the number of actual I O points capable of getting access to the I O module installed on the base unit They also support
318. e blown fuse is replaced with a new one Ne This flag is cleared by error resetting operation W Bit pattern in units The module number in units of 16 points whose external power of 16 points supply has been disconnected is input as a bit pattern indicating the If the module numbers are set by parameter the parameter set Ext i modules whose numbers are used xterna external power b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 bi bO power SUPP Supply hasbeen SD1350 0 0 0 1 of o o 1 o o o o o disconnected QCPU mod le disconnected SD1351 ololololilololololo olo S Error New Remote 0 External power 3 a For future supply S ai expansion 7 i Bt r p disconnected 1 External power A supply is not 1 oj olojololojo 0 0 disconnected 2 Indicates a blown fuse App 55 App 55 n APPENDICES MELSEC Q Special Register List Continue 12 I O module verification Corresponding Correspondin Number Name Meaning Explanation ACPU U g po IT D1400 When the I O modules whose I O module information differs from D9116 D1401 that registered at power on are detected the numbers of those D9117 D1402 Bit pattern in I O modules are entered in bit pattern D9118 D1403 units of 16 points Ifthe O numbers are set by parameter the parameter set D91
319. e cables be sure that the base unit and the module connectors are installed correctly After installation check them for looseness Poor connections could cause an input or output failure e Securely load the memory card into the memory card loading connector After installation check for lifting Poor connections could cause an operation fault e Completely turn off the external power supply before loading or unloading the module Not doing so could result in electric shock or damage to the product e Do not directly touch the module s conductive parts or electronic components Touching the conductive parts could cause an operation failure or give damage to the module Wiring Precautions lt DANGER e Completely turn off the external power supply when installing or placing wiring Not completely turning off all power could result in electric shock or damage to the product e When turning on the power supply or operating the module after installation or wiring work be sure that the module s terminal covers are correctly attached Not attaching the terminal cover could result in electric shock Wiring Precautions A CAUTION e Be sure to ground the FG terminals and LG terminals to the protective ground conductor Not doing so could result in electric shock or erroneous operation e When wiring in the PLC be sure that it is done correctly by checking the product s rated voltage and the terminal layout Connecting a po
320. e canceled from GX Developer Devices for which enforced ON OFF has been performed will assume the following statuses when ON OFF registered information has been cancelled Enforced ON OEF device ON OFF performed with ON OFF not performed sequence programs with sequence programs Input from modules mounted on Assumes the ON OFF status received from the the base unit module Input Input of High Performance model QCPUs to be refreshed from LX of MELSECNET H module Input of High Performance model QCPUs to be refreshed from RX Assumes the refreshed ON OFF status from of CC Link ce Link input other than apoye Maintains the enforced ON OFF status outside of the refresh range Outputs the results of the sequence program OFF is output operations Assumes the refreshed ON OFF status from MELSECNET H Output from modules mounted on the base unit Output of High Performance model QCPUs to be refreshed from LX of MELSECNET H Output module Output of High Performance Outputs the results of the model QCPUs to be refreshed sequence program OFF is output from RX of CC Link operations Assumes the result of the sequence program Assumes the OFF status operations Outputs the results of the sequence program OFF is output operations Output other than above outside of the refresh range 2 The enforced ON OFF settings are cleared with the following operations e Power supply OFF ON e Reset with the High Performanc
321. e model QCPU RESET L CLR switch e Reset with remote reset operations 7 FUNCTION MELSEC Q e The timing for external I O enforced ON OFF is shown in the table below e During END processing input e During END processing output refresh refresh e During the execution of During the execution of commands that used direct commands that used direct access input DX LD LDI AND access output DY OUT SET ANI OR ORI LDP LDF ANDP DELTA RST PLS PLF FF LDF ANDF ORP ORF MC I O modules on the base unit X Y 1 0 of High Performance model e During END processing MELSECNETHH refresh QCPU to be refreshed During execution of the COM command from LX LY of e During execution of the ZCOM command MELSECNET H 1 0 of High Performance model __ During END processing CC Link refresh QCPU to be refreshed During execution of the COM command from RX RY of CC e During execution of the ZCOM command Link f A total of thirty two devices can be registered for enforced ON and OFF g Sequence program operations take precedence when used with an output Y contact h The enforced ON OFF and cancelled status including those that are not set up can be confirmed with GX Developer Confirmation is also allowed with the MODE judgment LED when at least one device is registered the MODE LED will flicker i Itis possible to register enforced ON OFF for external I O in the same CPU module from
322. e time out period of the internal timer by choosing PLC system System interrupt setting High speed interrupt setting on the PLC parameter screen Set it in the setting range 0 2 to 1 0ms in 0 1ms increments x6 To use the intelligent function module interrupt the intelligent function module setting interrupt points setting is required at the PLC system tab screen in the PLC Parameter dialog box For the interrupts from the intelligent function module see Section 8 2 1 7 When 149 is set in the PLC parameters other interrupt programs l0 to 148 150 to 1255 or fixed scan execution type programs must not be executed If or fixed scan execution type program or the like is executed the interrupt program using 149 cannot be executed at the set interrupt cycle intervals 10 58 10 58 10 EXPLANTION OF DEVICES MELSEC Q 10 11 Other Devices 10 11 1 SFC block device BL This device is used for checking if the block designated by the SFC program is valid For details on the use of SFC block devices refer to the QOPU Q mode QnACPU Programming Manual SFC 10 11 2 SFC transition device TR This device is used for checking if a forced transition is designated for a specified transition condition in a specified SFC program block For details regarding the use of SFC transition devices refer to the QOPU Q mode QnACPU Programming Manual SFC 10 11 3 Network No designation device J 1 Defi
323. e total Count is made to a maximum of FFFFH To return the errors detected of receive errors ani i value to 0 perform reset operation App 54 App 54 APPENDICES MELSEC Q Special Register List Continue ACPU Special Special Special Register after Register for Meaning Details Conversion Conversion Modification itions Stores the local station number which is in STOP or PAUSE D9248 D1248 mode Device Bit number b14 b13 b12 b11 b10 b9 b6 b5 b4 b3 b2 ions 5D1248 i5 L14 L13 L12 L11 L10 Lo L8 L7 Le ts L4 L3 SD1249 for up to numbers SD1249 L31 L30 L29 L28 127 L26 L25 L24 L23fL22 L21 L20 L19 Local station D1250 L47 L46 L45 L44 L43 L42 L41 L40 L39 L38 L37 L36 L35 Corresponding CPU operation ae D1251 L64 L63 L62 L61 L60 L59 L58 L57 L56 L55 L54 L53 L52 L51 ions 3 ATRIA D1250 status The bit corresponding to the station number which is in STOP or PAUSE mode becomes 1 Example When local stations 7 and 15 are in STOP mode b6 and b14 of SD1248 become 1 and when SD1251 SD1248 is monitored its value is 16448 4040H Stores conditions for up to numbers Stores the local station number other than the host which is in error Device Bit A ions number 515 b14 b13 b12 b11 b10 b9 bs b7 b6 b5 b4 b3 b2 b1 bo D1252 L16 L15 L14 L13 L12 L11
324. e whether or not a system area is to be allocated for user settings and multiple block online change 0 to 15 k steps in 1 k step units can be allocated for the user setting system area 0 to 15k steps System area y Unit of 1k step User files Parameters Memory capacity after formatting programs etc 2 System area setting If RS 232 and USB interfaces are connected to GX Developer the system area user setting data is used for registering monitor data from the GX Developer connected to serial communication module The allocation of space for system and user defined areas will make it much easier to perform monitoring operation by operating from the GX Developer connected to the serial communications module Although the designation of a user setting area speeds up monitoring from the GX Developer connected to serial communication module it also reduces the amount of space available for user files 1 1 This table shows an example in which 0 k step is allocated for a system area 2 2 In computing the memory capacity 1 step is equal to 4 bytes 3 3 Maximum number of executable program is 124 More than 124 programs can not be executed 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 3 About the Standard ROM 1 What is the standard ROM a The standard ROM is used for the ROM operation of the High Performance model QCPU b Programs stored in the standard ROM can be used a
325. ease note that scan tame is extended for 1 25 seconds at 30 k step when an ATA card is in use c Please note that no access can be made from an instruction in a sequence program while a batch of files is written with the High Performance model QCPU in the RUN status While the file write during RUN is being executed an instruction to make access to a file is not executed d Donot execute file write during RUN simultaneously from multiple locations Doing so may erase program file contents e If a sequence program file being executed is written when the High Performance model QCPU is in the RUN status the following will not work properly After the write is complete a fall instruction is executed only when its execution condition is OFF e LDF e ANDF e ORF e MEF e PLF f If batch write of SFC program files during RUN is executed an initial start is made after execution The following CPU module and GX Developer versions are required to execute batch write of SFC program files during RUN e CPU module whose serial No is 04122 or later e GX Developer Version 8 or later 7 FUNCTION MELSEC Q 7 13 Execution Time Measurement This is a function to display the processing time of the program being executed This is used to find out the effect of each program s processing time on the total scan time There are three functions to the execution time measurement The details of each function are indicated in sections
326. ecaeseeeeaeeaeeeseaesaesaeseeseaesaesaeeeeseaeeaee 14 18 14 2 8 Processing when High Performance model QCPU stop errors OCCU cccceeeteeteeeeeeeteeeees 14 19 14 2 9 Reducing the time required for multiple CPU system processing e ceseeeeeeeeteteeeeeneeees 14 21 15 1 Concept behind Allocating I O Numbers s ecesecsesesesesesecesesseseseeceseseseeesseseaeseeeeaeaeaeeneesasaeeteeseeaeaeeeenatatens 15 1 15 1 1 I O modules and intelligent function module I O NUMDETS ceceeeeeeeeeteeeeeeeeeeeeteeeeeeeeaees 15 1 15 1 2 I O number of High Performance model QCPU Motion CPU and PC CPU module 15 2 15 2 Setting of Control CPUs with GX Developer uo eee eeseseeseseeeseeseseeaeeteaesneassneassneassteaseneaseneaseneaneassneateneaeeneas 15 3 16 1 Automatic Refresh of CPU Shared Memory esscsecesesseseceseseeseseseseeseseceeeescseseensseaeaeeneeeseaeaneesesseeasaeaeeteaeaeas 16 2 16 2 Communication with Multiple CPU Dedicated Instructions and Intelligent Function Module Devices 16 9 16 3 Interactive Communications between The High Performance model QCPU and Motion CPU 16 11 16 3 1 Control commands from the High Performance model QCPU to the Motion CPU 16 11 16 3 2 Reading and writing device data ee eeceeceeeceeeeeeeeeeeeeteeeseeteeesaeeeeeseeeseeeeeeseeeseeeteeeseeeseeeeeeeeaaes 16 12 16 4 CPU Shared Memory esccsessceseesesssesessesecessesesesesesesenecs
327. ecify execution target YY MM DD Hr Min Sec Day Currently specified station Grou i fiss foe fro fir 42 Jod Tues el Seay yeep ln m Boarding o 7 FUNCTION MELSEC Q 2 Method to Write from the Program The time data is written to the clock element by using the clock instruction DATEWR A program example to write the time data using the time data write instruction DATEWR Write request X0 0 MOVP K1999 DO Year 1999 move ka D Month 8 move Kio D2 Hpay 10 MOVP K11 D3 Hour 11 MOVP K35 D4 Minute 35 MOVP K24 D5 Second 24 move K2 De HH pay Tuesday 2 DATEWR DO Refer to QCPU Q mode QnACPU Programming Manual Common Instructions for details on the DATEWR instruction b Reading Time Data When reading the time data to the data register use the time data read instruction DATERD from the program The figure below shows an example of a program used to read the clock data with the DATERD instruction and then store it in D10 to D16 Read request xi The time data is read and DATERD pie 1 then stored in D10 to D16 Refer to the QCPU Q mode QnACPU Programming Manual Common instructions for the details on the DATERD instruction 1 Time Data can be written to and read from by special relays SM210 to SM213 and special registers SD210 to SD213 See Appendix 1 for details on special relay See Appendix 2 for deta
328. ecreased the files may not be stored into the CPU depending on the file capacity 7 FUNCTION 7 FUNCTION Fu 7 1 Function List Fu M nction of High Performance model QCPU module is as follows nctions of High Performance model QCPU are listed below ELSEC Q Description Reference section Constant scan This function executes the program in a set time interval regardless of the program scan time Section 7 2 Latch function This function maintains the device data when performing the reset operation during power off Section 7 3 Output status selection function for transition from STOP status to RUN status This function selects the output Y status output before STOP output after the calculation execution when the CPU module is set from STOP status to RUN status Section 7 4 Clock function This function executes the CPU module internal clock Section 7 5 Remote operation This function operates the CPU module from a remote place Remote RUN STOP This function stops and starts operating the CPU module Section 7 6 1 Remote PAUSE This function stops the CPU module operation while retaining the output Y of the CPU module Section 7 6 2 Remote RESET Remote latch clear Input response time selection for input module compatible with Q Series Input response time selection for high speed input module compatible with Q Series Input response time selection for interrupt module compatible with Q Series
329. ed CPU modules is are set as CPU mpty the io adnabar for the multiple CPU system can be confirmed with the system monitor 15 1 15 1 15 ALLOCATING MULTIPLE CPU SYSTEM I O NUMBERS MELSEC Q 15 1 2 I O number of High Performance model QCPU Motion CPU and PC CPU module 15 2 I O numbers are allocated to the CPU modules with the multiple CPU system in order to allow interactive communications between the CPU modules with the following commands e Multiple CPU commands e Motion dedicated commands e Dedicated communication commands between multiple CPUs The I O numbers for the CPU modules are fixed for the slots on which they are mounted and cannot be amended The table below shows the I O number allocated to each CPU module when the multiple CPU system is composed CPU modul CPU slot Slot 0 Slot 1 Slot 2 mounting position First I O number 3E00H 3E10H 3E20H 3E30H The CPU modules I O numbers are used in the following cases e When writing data in the host CPU s CPU shared memory with the S TO instruction 1 15 e When reading data from other CPU s CPU shared memory with the FROM instruction 1 e When reading data from other CPU s CPU shared memory with the intelligent function module device U_ G_ 1 e When specifying the High Performance model QCPU to be accessed with the Ethernet module 2 e When specifying the High Performance model QCPU to be accessed with the serial communication module 3
330. ed ladder example so that the coil of CO will not turn OFF while the OUT CO instruction execution condition MO is ON Modified ladder example Mo K10 lt co CO MO msr o 5 Maximum counting speed The counter can count only when the input condition ON OFF time is longer than the execution interval of the corresponding OUT C instruction The maximum counting speed is calculated by the following expression Maximum counting 9 1 n Duty 2 speed Cmax joo T mess 1 1 See Section 10 2 1 for details on direct access inputs 2 2 The duty is the count input signal s ON OFF time ratio expressed as a percentage value T Execution interval of the OUT C1 instruction Ti A gt o When T12 T2 n T1472 x 100 When T1 lt T2 n 2 x 100 T1 T2 Ti T2 ar F i Count input signal OFF 10 26 10 26 10 EXPLANTION OF DEVICES MELSEC Q Interrupt counters 1 Definition Interrupt counters are devices which count the number of interrupt factor occurrences 2 Count processing a b The interrupt counter s current value is updated when an interruption occurs It is not necessary to create a program which includes an interrupt counter function Interrupt counter operation requires more than the simple designation of a set value To use the interrupt counter for control purposes comparison instructions lt etc must also be used to enable comparisons wi
331. ee s gt gt l gt gt gt elsia o o O2 a2 Q ofru B ola zjo ololo lz z o z o 2 Z Z No 2 intelligent function module No 3 input module No 3 output module No 4 input module No 4 output module 2 3 fe E gt Q 2 m wn re oO fo A 19 3 19 3 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 19 2 2 Creating new systems GX Developer started up Refer to GX Developer operating manual PC parameter window on the GX Developer opened J Qn H Parameter x Select Multiple CPU Settings to display the multiple CPU C system PLC file PLC RAS Device Program Boot file SFC 1 0 assignment setup window Refer to GX Developer operating manual Label Comment Acknowledge XY assignment Multiple CPU settings Default Check End Cancel _ Setting the number of CPUs required item No of PLC Onine module changet z e Sets the number of CPU modules to be I Enabie online module change with another PLC i Pap NoofPLe fa z When the online module change is enabled with another PLC mounted onto the main base unit with the 1 0 status outside the group cannot be taken eai 170 sharing when using Multiple CPUs multiple CPU system Enor operation mode at the stop of PLC IT AII CPUs can read all input I All station stop by stop error of PLC1 7 All CPUs can read all outp F7 All
332. eed END processing starts after the all low speed execution type programs are completed See Section 4 2 3 for details on the low speed execution type program and low speed END processing 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 4 RUN STOP PAUSE Operation Processing The High Performance model QCPU has three types of operation status RUN STOP and PAUSE status The High Performance model QCPU operation processing is explained below 1 RUN Status Operation Processing a RUN status indicate that the sequence program operation is performed from step 0 to END FEND instruction to step 0 repeatedly b When entering the RUN status the output status saved at STOP status is output by setting Previous status as Output mode at STOP to RUN at the PLC system tab screen in the PLC Parameter dialog box c It usually takes 1 to 3 seconds to prepare for staring the sequence program operation since STOP status is switched to RUN status though it might be longer depending on the system 2 STOP Status Operation Processing a STOP status indicates that the sequence programs are stopped by RUN STOP switch or remote STOP function See 7 6 1 for details on remote STOP function High Performance model QCPU might enter STOP status when a stopping error occurs b When entering the STOP status save the output status and turn off all output The device memory of other than the output Y
333. eed program execution time 3ms e Total scan execution type program time 4ms to 5ms e Execution time of low speed execution type program A ims e Execution time of low speed execution type program B 3ms e END processing low speed END processing Oms 0 ms is used to simplify the illustration END END END END END processing processing processing lie processing 0 4 11 5 18 5 25 5 33 5 ms fesse tee Salt ale Seif ses p Uae e u ap Soha Sle kf ale fe sp aye Sie apatite apa rete ele l alee sl ents arly eases dead sl ral sls ry wae alread eed 4ms 4 5ms 4ms 4ms 5ms Scan execution type program H irs ims ims is Low speed execution type program A H q i Ge ims 1ms 2ms 3ms Low speed execution type program B k H H H i Low speed scan time Low speed scan time Low speed scan time P 12 5ms i 8ms 8ms i i i Low speed END Low speed END Low speed END processing execution processing execution processing execution 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q fees is 2 Svnchronous method 77 TUT TTT Ts sss sess ees s ess s cress 1 Constant scan time setting The low speed execution type program is operated under the following conditions as shown below e Constant scan time 8ms e Total scan execution type program time 4ms to 5ms e Execution time of low speed execution type program A ims e Execution time of low speed execution type program B 3ms e END processing low
334. eeeeeeeeeceeseeeeaecaeceeseeesaesaeeeeeaeeaeseeseteaees 8 3 8 1 3 Communication using FROM TO instruction ccccecceseeeceeceeeeeeeeeseeeeeeeaesaeseeseeesaesaeseeeeateaeeeseeeeaes 8 4 8 1 4 Communication using the intelligent function module device ceceeeeeeceeeeeeeeeeeeeeeeeeeeeteeeeeeeeeaes 8 4 8 1 5 Communication using the instructions dedicated for intelligent function modules 0e 8 5 8 2 Request from Intelligent Function Module to High Performance model QCPU ssceesseeceeseeteteeeeteees 8 6 8 2 1 Interrupt from the intelligent function module oe ee eeceeeeeeeeeeeeeteeeeeeeeeeeeeteeteeeteeteeeeeeeseteeeteneteees 8 6 8 3 Communication Between High Performance model QCPU and AnS Series Special Function Modules 8 7 8 3 1 Communication using device initial VAlUC ceccececeeseeeeeeeeeeeeeeeeeceeeeeeeaesaeseeseeesaesaeeeeeaesaeseeseeeaees 8 7 8 3 2 Communication using FROM TO instruction cccceceeseecceeeeeeeeeeeeeeseeeeaesaeceeseeesaeeaeseeseateaeeaeeeeseaes 8 8 8 3 3 Communication using the intelligent function module device eceeeeeeeeeeeceeeeeeeeeeeteeeeeeeeeeeeeeaes 8 8 8 3 4 Effects of quicker access to the special function module and countermeasures against them 8 9 9 PARAMETER LIST 9 1 to 9 12 10 EXPLANTION OF DEVICES 10 1 to 10 72 10 1 Device List ee nh She dh eh eb ie a de hee 10 1 10 2 Internal User Devices 2scc dei ident teen a A A steed dic ea
335. ens 5 8 5 5 1 I O numbers of main base unit Slim type base unit and extension base Unit 5 8 5 5 2 Remote station O NUMDEM ccccecceceeseeeeeeeeeeeeeeceeceeeeaeeaecaeceeeaesaecaeseaeeaesaeseeseaesaeeaeseeseaseeseeseeeaees 5 10 5 6 I O Assignment by GX DeVelopel ssecccsecesesseseseseseeseseseeseseseetesescseseeeseseaeensseaeaeeeeeeeseateneestatetseeesaeeteneeasaeeteees 5 11 5 6 1 Purpose of I O assignment by GX Developer ceccecceeeeeceeeeeeeeceeceeeeaesaeceeeeeesaesaeseeseaeeaneeteneeaees 5 11 5 6 2 Concept of I O assignment using GX Developer ccecceceeseeeeeeeceeeeaeeaeceeseeesaesaeseeeaeeaesaeeeeeeateaes 5 13 5 7 Examples of O Number ASSIQNMen 2 ccceseceseeesecesesseseseeesscseseeeseseseeseseaeseseaeaeeaeaeseateaeaeaeseetesesseatensanseasens 5 16 5 8 Checking the V O NUMDENS ss 4 faces enansar Geen nd ied anda aetna 5 19 6 1 About the High Performance model QCPU S M MOr scscseseceseeteseseseecseseseeeeseaeeeeeacaeeeseeseaeseeneenseetacatens 6 3 G2 Programi MOMOry esate tecsscestetecteSeceade hidectextedeccduaedsasdussdadecuandsasevaedeaiavivdnanazisdnsiavisdaaiaiiadvinssusiaiasiiadauaaiiviasiatiaiaadaaaaias 6 6 6 3 About the Standard ROM wives wawe dined whee odie tel dduan ied disianiedeliadandeeenavieds 6 8 6 4 About the Standard RAM c ccccccscsesssesssseseseseeseseseeeeseseseeeeseseaeeeeseacseseeseeescaeeneaescaeeeeeaeaeaeeseaeasaeeteeeesaseteneeasateneens 6 9 6
336. equence start generator module installed closest to the High Performance model QCPU 2 The internal times shown are the default setting times These times can be designated in 0 5 ms units through a 0 5 to 1000 ms range set at the PLC system tab screen in the PLC Parameter dialog box x3 When an error interruption with 132 error that stops operation occurs the High Performance model QCPU is not stopped until 1832 processing is completed x4 Execution of error interruptions is prohibited for the interrupt pointer Nos 132 to I39 when the power is turned on and during a High Performance model QCPU reset When using interrupt pointer Nos 132 to 139 set the interruption permitted status by using the IMASK instruction 5 Set the time out period of the internal timer by choosing PLC system System interrupt setting High speed interrupt setting on the PLC parameter screen Set it in the setting range 0 2 to 1 0ms in 0 1ms increments x6 To use the intelligent function module interrupt the intelligent function module setting interrupt points setting is required at the PLC system tab screen in the PLC Parameter dialog box For the interrupts from the intelligent function module see Section 8 2 1 x7 When you have set 149 in the PLC parameters do not execute other interrupt programs l0 to 148 150 to 1255 and fixed cycle programs If any fixed cycle program or like is run the interrupt program us
337. equire replacing local devices in a memory card with the device memory of the High Performance model QCPU If local devices are not used for Program B while executing Programs A B and C the local devices are used as shown below Used local device of program A Restored 10 66 Program B Program C Program A Program B Saved Restored Saved Restored Local device _ Local device For For program A ha program A For For program B program B For For program C program C Di Unless designated as local devices all devices are global devices e Using local devices used by the file where a sub routine program is stored It is possible to use local devices that are used by the file where a sub routine program is stored when executing a sub routine program Whether or not such local devices are used is set by special relay SM776 ON OFF setting 10 66 10 EXPLANTION OF DEVICES MELSEC Q 1 Switching over local devices by setting ON OFF for a special relay SM776 reed SM776 Executes calculation by the local devices that are used by the file OFF where the sub routine program was called Executes calculation by the local devices that are used by the file ON f where the sub routine program is stored Operation at SM776 OFF
338. er Trace execution OFF ON execution complete Number of 1 Number of trace after trace after i trigger _ Clear the trace count trigger Sampling trace ready SM800 SM801 Sampling trace start SM802 Sampling trace executing SM803 Sampling trace trigger SM804 After sampling trace trigger SM805 Sampling trace complete x When trace is interrupted from GX Developer the SM800 is also turned off 7 52 7 52 7 FUNCTION 2 Operation Procedure The sampling trace operation is performed in the following procedures Each operation is performed on the Sampling trace dialog box within the online mode trace menu a Trace Device Setting Set the device to perform sampling trace at the Trace data tab screen in the Sampling trace dialog box Sampling trace Execute and status Trace data Conditions Device specification Bit device Device Connect Coil Connect Coil Bit Device Maximum of 50 bit devices can be set as follows X DX Y DY M L F SM V B SB e T contact T coil ST contact ST coil e C contact C coil oJ ahs ek Word device X J Y J B J_ SB BLL S Word Device Maximum of 50 word devices can be set as follows MELSEC Q Close Read file Write file Delete file Read from PLC Write to PLC Trace result
339. er or not the ZNRD word device LRDP instruction read instruction has been received e Used in the program as an interlock for the ZNRD instruction Data recovery of SM1199 online sampling A trace status latch E a SM1202 reception for i master station e Use the RST instruction to reset ZNWR instruction Depends on whether or not the ZNWR word device LWTP instruction OFF Not leted write instruction execution is complete SM1203 ee COPS Used as a condition contact to reset M9202 and M9203 completion for after the ZNWR instruction is complete master station RST instruction to reset OFF Not accepted ON Accepted reception for master station Use the RST instruction to reset Depends on whether or not the ZNRD word device read instruction execution is complete e Used as a condition contact for resetting M9200 and M9201 after the ZNRD instruction is complete Use the RST instruction to reset instruction LRDP instruction for OFF Not completed ACPU completion ON End for master station ZNWR instruction Depends on whether or not the ZNWR word device LWTP instruction write instruction has been received Used in the program as an interlock for the ZNWR instruction OFF Not accepted ON Accepted
340. eration check error a SFCP OPE ERROR When an instruction is executed Default Stop SFC program execution error ISFCP EXE ERROR EXE ERROR When switched When switched fromSTOPtoRUN STOP to RUN SFC block execution error BLOCK EXE ERROR When an instruction is executed SFC step execution error STEP EXE ERROR When an instruction is executed Watch dog error supervision _ WOT ERROR PLC error Program time exceeded PRG TIME OVER Al MULTI CPU DOWN eae e When the power is turned on when reset Multiple CPU consistency error CPU VER ERR e When the power is turned on when reset Other CPU minor error MULTI CPU ERR Instruction code check INSTRUCT CODE ERR When an instruction is executed Other CPU major error e When the power is turned on when reset Annunciator check F 2k k k k When an instruction is executed CHK Instruction check lt CHK gt ERR x x x x When an instruction is executed 1 Can be changed to continues in the GX Developer function parameter setting 7 FUNCTION MELSEC Q 7 17 1 Interrupt due to error occurrence The High Performance model QCPU can execute the interrupt program of the interrupt pointer that is set as the interrupt object when an error occurs Only when the error set to continue at the PLC RAS tab screen in the PLC Parameter dialog box occurs the High Performance model QCPU executes the interrupt program corresponding to the error When the
341. ereafter S New battery voltage drop When the QCPU is used the memory card B is standard and occurred therefore the corresponding bits always remain OFF AC DC Every time the input voltage falls to or below 85 AC Number of times for power 65 DC power of the rating during calculation of the SD53 DOWN AC DC DOWN CPU module the value is incremented by 1 and stored in BIN S Error D9005 O Rem detection code When any of X n 0 X n 20 X n 6 X n 26 X n 7 X n 27 and X n 8 X n 28 of the mounted MINI S3 turns ON the bit of the corresponding station turns to 1 ON Turns to 1 ON when communication between the mounted MINI link Error detection MINI 3 and CPU module cannot be made S D9004 format errors state b15 to b9 b8 to change 8th tst 8th module module module module gt lt Information on Information on Blown fuse Number of module Value stored here is the lowest station I O number of the module with blown fuse with the blown fuse VO module VO module The lowest I O number of the module where the I O module SD61 verification verification error S Error D9002 error number module number verification number took place SD62 poe fib hate annunciator number F number to be detected is stored TRPA D9009 srecen Number of Number of SD63 Stores the number of annunciators searched nto D9124 App 27 App 27 APPENDICES MELSEC Q Special Register List
342. erformed 16 15 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES MELSEC Q 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES 17 1 Range of Control CPU Communications The relationship between control CPUs and control modules I O modules intelligent function modules special function modules is the same as with independent CPU systems There is no restriction to control the control module with the control CPU 17 2 Range of Non control CPU Communications 17 1 It is possible for non control CPUs to read the contents of the intelligent function module s buffer memory It is also possible to load non control module input X ON OFF data and another CPU module output Y ON OFF data with the CPU parameters Input modules composite I O module controlled by other CPUs can be used as interlocks for the host CPU and the output status to external equipment being controlled by other CPUs can be confirmed However it is not possible for non control CPUs to output ON OFF data to output modules composite I O module or intelligent function modules or write in the buffer memory of intelligent function modules 17 1 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES MELSEC Q 1 Loading input X from input modules and intelligent function modules The Out of group input output se
343. erforming input refresh before a sequence program calculation starts 2 Input X loading is performed for the modules mounted onto the following additional base unit slots I O allocation type Mounted module input module po None p Intelligent function module ese Input module PN Input 17 Output module Loads OFF data Intelli Intelligent function module Po OS 3 Itis possible to load ON OFF data from input modules and intelligent function modules with direct access input Remote station input such as empty slots MELSECNET H and CC Link cannot be loaded Use automatic refresh of device data to use the ON OFF input data for MELSECNET H CC Link and other remote stations in other CPUs 4 b When Do not load input condition outside of group has been set It is not possible to loads ON OFF data from input modules and intelligent function modules being controlled by other CPUs remains at OFF 17 2 17 2 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES MELSEC Q 2 Loading output Y The Out of group input output settings setting in the PLC parameter s multiple CPU settings determines whether output can be loaded from output modules and intelligent function modules being controlled by other CPUs I O sharing when using Multiple CPUs O All CPUs can read all inputs All CPUs can read all outputs No of PLC f Online module change T Enable online module c
344. error set to stop there occurs the interrupt program 132 for Stop all errors is executed Interrupt pointer Corresponding error message 132 Stop all errors x oL 133 Empty 134 UNIT VERIFY ERR FUSE BREAK OFF SP UNIT ERROR 135 OPERATION ERROR SFCP OPE ERROR Errors that occur when the system can continue SFCP EXE ERROR the drive mode where or continue is selected from 136 ICM OPE ERROR continues stops FILE OPE ERROR 137 EXTEND INS ERR 138 PRG TIME OVER CHK instruction 139 Annunciator detect Y 140 to 147 Empty 1 The interrupt pointers 132 to 139 is at an execution disable mode when the power is started or High Performance model QCPU is reset When using 132 to 139 use the IMASK instruction and El instruction to enable execution 2 The 132 interrupt program is not executed upon the following serious errors e MAIN CPU DOWN e END NOT EXECUTE e RAM ERROR e OPE CIRCUIT ERR 7 17 2 LED display when error occurs When an error occurs the LED located on the front of the High Performance model QCPU turns on flickers See Section 7 21 for the details on the LED operation 7 FUNCTION MELSEC Q 7 17 3 Error cancellation High Performance model QCPU error cancel operation can be performed only for error that can continue the High Performance model QCPU operation 1 Error cancellation a Procedures for error cancellation The error cancel is performed as follo
345. errupt 149 is executed properly For other interrupt pointers interrupt programs are not available and interrupt counters are executed Command of intelligent function module that accesses CPU module Monitor via other station Interrupt counter corresponding to interrupt Interr ounter j terruptic pointer 149 is not available 2 Items that are disabled only within high speed interrupt No Item Restriction When Used In high speed interrupt program device Device comment comment that is the same as program name is not saved restored 2 Index register In high speed interrupt sequence index Index register in high speed interrupt program is register is not saved restored overwritten 3 Bus access flag In high speed interrupt program bus SM390 value in high speed interrupt program is SM390 access flag SM390 is not saved restored overwritten high i f N OFF i High speed X Y refresh area cannot be In ig speed interrupt forced ON OFF is not executed and is ignored tumed ON OFF forcibly Does not result in time out error E e monitor aint program Does not result in time out error Dea a measurement interrupt program Does not result in time out error 3 Items that hold high speed interrupt interrupt disable C 4 instruction Interrupt is disabled during instruction execution Interrupt is disabled during refresh bus access Link refresh For MELSECNET H CC Link or intelligent function
346. ervice interval in 1 ms units Module service interval in 100 us units MELSEC Q Special Register List Continued Corresponding ACPU po Set by When set Corresponding CPU e Stores the cumulative execution time of a low speed execution type program into SD544 and SD545 Measurement is made in 100s units SD544 Stores the ms place Storage range 0 to 65535 SD545 Stores the us place Storage range 0 to 900 Cleared to 0 after the end of one low speed scan S Every END processing Stores the execution time of a low speed execution type program during one scan into SD546 and SD547 Measurement is made in 100s units SD546 Stores the ms place Storage range 0 to 65535 SD547 Stores the us place Storage range 0 to 900 e Stored every scan S Every END processing e Stores the execution time of a scan execution type program during one scan into SD548 and SD549 Measurement is made in 100us units SD548 Stores the ms place Storage range 0 to 65535 SD549 Stores the us place Storage range 0 to 900 Stored every scan S Every END processing Sets I O number for module that measures service interval Stores the service interval for the module specified in SD550 into SD551 and SD552 when SM551 is turned ON Measurement is made in 100us units SD551 Stores the ms place Storage range 0 to 65535 SD552 Stores the us place Storage range 0 to 900 S Reques
347. esponding MELSECNET H Network System Reference Manual e Setting procedures GX Developer Operating Manual Windows Version 10 38 10 38 10 EXPLANTION OF DEVICES MELSEC Q 10 5 Intelligent Function Module Devices Ut G 1 Definition a The intelligent function module devices allow the High Performance model QCPU to directly access the buffer memories of intelligent function modules special function modules which are mounted on at the main base unit and extension base units b Intelligent function module devices are designated by the intelligent function module special function module I O No and the buffer memory address Designation method Ul GU Ly Butter memory address setting range 0 to16383 decimal 1 Intelligent function module special function module I O No Setting If the I O No is a 3 digit value designate the first 2 digits For X Y1F0 X Y1F0 Designate 1F Setting range 00H to FEH When digital output values of channels CH 1 to CH 4 of the Q64AD Type Analog Digital Conversion Module X Y20 to 2F mounted at Slot 2 of the main base unit are stored in DO to D3 the I O number and the buffer memory address are specified as shown below Q64AD 11 CH 1 Digital output value 12 CH 2 Digital output value 13 CH 3 Digital output value 14 CH 4 Digital output value 2 Processing speed The processing speed for intelligent function mod
348. essary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Base setting Base model name Power model name Extension cable Base mode Auto C Detail 8 Slot Default 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel Error time output mode Select Clear or Hold HZW error i time PLC ti o PLC Output 120 mix Intelli pena 4 settings should be set as same when using multiple CPU Cancel 3 Precautions The error time output mode setting is made valid when The PLC CPU is powered ON or The CPU module is reset Failure to perform either operation after changing the error time output mode setting will result in PARAMETER ERROR error code 3000 7 FUNCTION MELSEC Q 7 9 Hardware Error time CPU Operation Mode Setting 1 Hardware Error time CPU Operation Mode Setting The hardware error time CPU operation mode setting is to set whether the operation of the CPU module will be stopped or continued when a hardware error occurs in the intelligent function module 2 Hardware Error time CPU Operation Mode Setting Make the hardware error time CPU operation mode setting in the I O assignment of the PLC parameter dialog box Choose Intelligent as the
349. eteneeasateneees 7 24 7 9 Hardware Error time CPU Operation Mode Setting cscccceccsesecesesseeseeeseeseseseseeseseeeeneeessaeeeeeeesaeeteneeeeeateneees 7 25 7 10 Setting the Switches of the Intelligent Function MOCUIC ceceeseeeeeceseeeeeceeeeeeseseeteeeseaeeteeeeeaeeteeeeeaeateteees 7 26 TtT Monitoring Functio Rererererererererer err rer er rrerer rire rere RRRA 7 27 7 11 1 Monitor CONITION setting 0 ee cece cece eeeeeeeeeeeeeeeeeeeseeeeeeeeeeesaeeseeeseeesaeesaeeseeesaeeseeeseeeseeseateeeseeeseeeeeaes 7 27 7 11 2 Monitoring test for local device oo ee eee eeceeeeeeeeeeeteeeeeeeeeeeeaeeeaeeseeesaeesaeesaeesaeesaeeseeeseeeseeeeeeeteeeteeeeaaes 7 31 7 11 3 Enforced ON OFF for external 1 O ccccecceceeseeeeeeeceeeeeeeeecaeceeeeaesaeseeseeetaesaeseeseeesaesaeseeseaeeeeineaeeaees 7 33 7 12 Writing in Program during High Performance model QOPU RUN c esseseceseseeteseeeseeseseeeeseeeeeeeaeeteeeeeaeas 7 37 7 12 1 Writing data in the circuit mode during RUN ee ee eeceeeeeeeeeeeeeeeeeeeeeeeeseeeseeeseeeseeeseaseeeseeeteeeeees 7 37 7 12 2 Writing a batch of files Curing RUN sraon aea aa a E OE E 7 40 7 13 Execution Time Measurement cececssesssesseesseeserrereesereesnsnseseenseaeaeseaeaeananaeanaeaeaesnaeseaesesesssesesesesesesesenesess 7 42 7 13 1 Program Monitor list ee eearri aeiia ei eiti e ir aN AAS A 7 42 7 13 2 Interrupt program Monitor list 00 eee eee eeeeeeeeeeeteeeeeeeeeeeeeeeeeeesaeeseeesaeesaee
350. etic operations K she in double precision r Intelligent function module setting Interrupt pointer setting Settings should be set as same when using multiple CPU r Output mode at STOP to RUN Previous state High speed interrupt setting Interrupt program Fixed scan program setting C Recalculate output is 1 scan later High speed execution Module synchronization IV Synchronize intelligent module s pulse up APLC IV Use special relay special register from SM SD1000 Acknowledge XY assignment Multiple CPU settings Default Check End Cancel b When the High Performance model QCPU is in RUN status use remote STOP to arrange the STOP status c Reset High Performance model QCPU by the remote RESET operation 1 For the GX Developer this is performed by on line remote operation 2 The serial communication module and Ethernet interface module are controlled by commands complying with the MC protocol For details of the MC protocol refer to the following manual Q Corresponding MELSEC Communication Protocol Reference Manual 7 FUNCTION MELSEC Q 3 Precautions a To perform the remote RESET check the Allow check box of the Remote reset section at the PLC system tab screen in the PLC Parameter dialog box and then write parameters into High Performance model QCPU If the Allow check box is not checked a remote RESET operation is not performed b Remote
351. etwork parameters for MELSECNET H Station inherent parameter No 2 5NMBuH Ethernet setting Designates network parameters for Ethernet PARAM 2 alsz MELSEC Q 4 Value el Range eee Section e Refer to the Q Corresponding MELSECNET H manual e Refer to the Q Corresponding Ethernet manual 9 PARAMETER MELSEC O Table 9 1 Parameter List continued Designates parameters for MELSECNET H Ethernet and CC Link Network parameter CC Link setting 2 Remote input RX Refresh device Remote output RY Refresh device Remote register RWr Refresh device Remote register RWw Refresh device Ver 2 Remote input RX Refresh device Ver 2 Remote output RY Refresh device Ver 2 Remote register RWr Refresh device Ver 2 Remote register RWw Refresh device Special relay SB Refresh device Special register SW Refresh device station count CPU down specification Scan mode specification Designates network parameters for CC Link Remote device station initial setting Interrupt setting Set the remote password for the Ethernet serial communication or Remote password P modem interface module Password setting Enter the remote password Select the module model name to be checked for the remote Password valid password set to the QCPU module setting Head X Y Set the head address of the module to be checked for the remote password Det
352. evice value comment local device set at the PLC file tab screen in the PLC Parameter dialog box per program The data is set for each program By default the option Use PLC file setting is selected If the option Not used is selected the File Use setting is made as listed below in the table Setting item Processing when the option Not used is selected File registers can not be used in the program The device initial value is not set when the program file name and the device initial value is the same Initial device value Comment file used in a command Local devices are not hidden or restored at the time of program Local device conversion 6 I O Refresh Setting High Performance model QCPU uses the I O Refresh setting to update output and input from an I O module and an intelligent function module The I O Refresh Setting button is used to update the range of selected programs Make the I O Refresh setting for a scan execution type program if you want to receive an input X or produce an output Y before executing the fixed scan execution type program Comments can not be used in the program b There are following 5 execute types 1 Initial execution Initial This program type is executed once only at power ON or when STOP RUN switching occurs See Section 4 2 1 2 Scan execution Scan This program type is executed once per scan beginning from the scan which follows execution of the in
353. execution type program occurs the low speed execution type program s index register data is saved and the scan execution type program s index register data is restored Switch Switch Low speed Switch Low speed Scan execution ing ing Scan execution ing 4 Executed program gt execution gt gt execution itype program type program type program i type program Z0 1 Z0 0 to Z0 3 Z0 1 to Z0 6 Z0 3 Index register value For scan execution j f Z0 0 ZO 1 Z0 1 ZO 1 Z0 1 Z0 6 Z0 6 Index register type programs i storage area For low speed i i j Q J i execution type Z0 0 Z0 07 Z0 0 Z0 3 Z0 3 Z0 3 Z0 3 program 1 For low speed execution type program Z0 is changed to 3 2 For scan execution type program Z0 is changed to 6 2 Exchanges of index register data Word devices should be used for exchanges of index register data between scan execution type programs and low speed execution type programs 10 41 10 44 10 EXPLANTION OF DEVICES MELSEC Q 10 6 2 Switching between scan low speed execution type programs and interrupt fixed scan execution type programs The following processing is performed at the time of switching between scan low speed execution type program and interrupt program fixed cycle execution type program Index register Z0 to Z15 value is saved protected rest
354. extension 2EH Third character of extension 2nd character of extension S During execution Stores step number from point in time when status latch was conducted SD812 SD813 SD814 SD815 SD816 Patterm x Block number Step No Transition condition No Sequence step No L Sequence step No H D9055 format change S During execution Status latch step Status latch step x Contents of pattern data 1514 to 4 3 2 1 0 Bit number ojo to o oj a ath EN A Not in use I SFC block designation present 1 absent 0 SFC block designation present 1 absent 0 SFC transition designation present 1 absent 0 App 42 App 42 APPENDICES MELSEC Q Special Register List 8 Latch area Name Meaning Corresponding Explanation ACPU bo TT Corresponding CPU S Status change Access file Drive where drive number Pa SD900 power was Stores drive number if file was being accessed during power loss during power loss Stores file name with extension in ASCII code if file was being interrupted SD901 accessed during power loss b15 to b8 b7 to bO SD902 ooo SD901 2nd character 1st character File name Access file SD902 4th character 3rd character vadur l SD903 6th character 5th character S Status Beane 4 8th charact 7th charact change om 0
355. f channel 5 S Initial Instruction reception status of channel 6 status L Instruction reception status of channel 7 Instruction reception status of channel 8 ON Received Channel is used OFF Not received Channel is not used App 34 App 34 nn n Ce l e amp amp D APPENDICES Ethernet instruction reception status Software version Multiple PLC number 1 second counter App 35 MELSEC Q Special Register List Continued Corresponding bo TTI Information from ormignons fo Configuration is identical to that for the first module 2nd module Information from er j ai Configuration is identical to that for the first module S Initial 3rd module Information from Configuration is identical to that for the first module 4th module Stores the internal system software version in ASCII code The data in the lower byte position is indefinite Higher byte Lower byte The software version is stored Internal system in the higher byte position software version For version A for example 41H is stored S Initial Note The internal system software version may differ from the version indicated by the version symbol printed on the case eina multiple PLC system configuration the PLC number of the a QCPU function host CPU is stored S Initial Ver B or later PLC No 1 1 PLC No
356. f program files for SRAM card Res fe Interrupt program l0 to 148 150 to 1255 Since multiple interrupts are disabled high speed A and fixed scan execution type program is interrupt is not available at preset cycle while any fixed scan execution i i f 7 FUNCTION MELSEC Q Since interrupt is disabled when local devices are changed high speed interrupt is not available at preset cycle Local devices Local devices are not available The following time is taken 390 u s 170 u s xX n for standard RAM e 390 u s 950 us X n for SRAM card n number of program files Since interrupt is disabled at the time of CPU access Issue of CPU access command from command issue a high speed interrupt start is delayed intelligent function module that accesses during that period and high speed interrupt is not CPU module e g QU71C24 or QU71E71 available at preset cycle is not available N points read write 0 07 x N 34 us N points random read write 0 07 xX N 101 us If host monitor request and intelligent function module Monitor via MELSECNET H QJ71C24 or relayed monitor request overlap interrupt disable other intelligent function module is not processing time increases Therefore a high speed available during host monitoring interrupt start is delayed 102 u s during that period and high speed interrupt is not available at preset cycle If there is interrupt counter setting setting for 149 is ignored and high speed int
357. fies whether to bring the start of a CPU module into synchronization with the start of an intelligent function module Specifies whether to use MELSEC A Series special relays special registers SM1000 SD1000 to SM1299 SD1299 Designates the various files used in the CPU module H Designates the file for file registers to be used in the program Designates the file for comments to be used in the program H Initial Device value il 9 11021 File for local device 1103H 2 Designates the file for the device initial values to be used in the CPU module Designates the file for local devices to be used in the program 9 2 9 PARAMETER MELSEC Q Default Value Setting Range Reference Section No setting Max of 10 characters fa eee 7 i No setting Max of 64 characters a ooms fi to 1000 ms 1 ms units Section 10 2 10 HOOms Ss to 100 0 mss Section 10 2 10 No setting XO to X1FFF Section 7 6 1 Enabled Disabled Section 7 6 3 Previous status produce the status of Produce the status of an output X before STOP Clear the Section 7 4 an output X before STOP output output is 1 scan later i Perform internal arithmetic operation Check Not Checked to perform internal arithmetic operation F ss Section 4 8 4 with double precision with double No setting 150 to 1255 leading I O No leading SI No Section 10 10 No setting PO to P4095 Section 10 9 2 0 16 32 64 128 256 51 2 1024 points Section 5 6 1 Nose
358. flag ON Completed e Turned off by reset instruction SM1056 SM1057 gt App 13 App 13 CHG instruction OFF Enabled execution disable ON Disable T ETE OFF Other than when P set being requested Provides P set request after transfer of the other ON P set being requested program for example subprogram when main program is OFF Other than when P set being run is complete during run Automatically switched being requested off when P setting is complete ON P set being requested Main side P set request x Sub side P set request a a an a oy a F BR BR BR 5 BR BR F B oO N a a BR N N a a is o N x APPENDICES MELSEC Q Special Relay List Continued ACPU Special Special Special Relay after Relay for Conversion Modification SM1058 SM1059 SM1060 SM1061 SM1065 SM1066 SM1070 SM1081 SM1084 SM1091 Sub program 2 P set request Sub program 3 P set request Divided processing execution detection Divided processing request flag A8UPU A8PUJre quired search time Communication request registration area BUSY signal Error check Instruction error flag xX xs all eet NZ VN i I O change flag Relay M9058 M9059 M9060 M9061 M9065 M9084 M9091 M9094 M9100 ls A
359. following check boxes at the PLC file tab screen in the PLC Parameter dialog box you must register a file register file with the High Performance model QCPU e Not used e Use the same file name as the program For registration of a file register file use the Write to PLC dialog box a b c d Connecting interface COM lt gt PLE module PLC Connection Network No T StationNo Host PLCtype AOA Target Memon caaan Ste File selection Device data Program Common Local d ParamsPiog Select al Cancel all selections Close wa A sae MAINS Related functions Device comment it Transfer setup COMMENT MAIN Rese bette meter PLC Network Remote password Remote operation Gi register Cleat PLC memory ht z PET Format PLC memory E Oder Arrange PLC memory Range specification ZR 0 a Create title Total free e Taai Bytes Selecting a memory to store file registers Choose the standard RAM memory card RAM or memory card ROM from this list box to specify a memory to store file registers If you want to use the same filename as that of a program store a file register file in the memory specified in the PLC File sheet of the PLC Parameter dialog box Selecting a file register file If amemory for file registers is selected a filename of a file register file is displayed Select the desired filename of a fi
360. formance model QCPU is indicated The set date and time indicate the GX Developer side date and time Size The file size when written from GX Developer to the High Performance model QCPU is indicated in byte units To view the latest High Performance model QCPU data click on the Update button Files are stored in the High Performance model QCPU program file and standard ROM in 4 byte units 1 step and in the memory card in 1 byte units When calculating a file s size at least 64 bytes 136 bytes for programs will be added to all user created files other than file registers 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 1 About the High Performance model QCPU s Memory 1 User Memory A user memory can be created within the memory of the High Performance model QCPU by using the GX Developer sequence program The High Performance model QCPU has the following built in memories e Program memory e Standard RAM e Standard ROM A memory card can be mounted on the High Performance model QCPU to increase the size of a user memory a Programs used for arithmetic operations of the High Performance model QCPU are stored in the program memory Programs stored in the standard ROM or on a memory card are booted read into the program memory for arithmetic operation Parameters and programs are stored in the standard ROM These data are used for ROM operation of the High Performance model QCPU File reg
361. fter being read boosted to the program memory in accordance with the setting made at the Boot file tab screen in the PLC Parameter dialog box c The standard ROM does not need formatting d Writing into standard ROMs is performed with the GX Developer s on line PLC Writing flash ROM of Create Program Memory ROM see Section 6 6 1 It is also possible to write in a standard ROM from the memory card with Automatic writing in the standard ROM without using GX Developer POINTS 1 Before writing data to a standard ROM all previous data stored in the standard ROM are erased Therefore all data stored in a standard ROM must be read out and copied into the program memory at first There read through and modify it as necessary Then write the modified data back into a standard ROM at a time Please note that an error may occur if data stored in the standard ROM is used in a sequence program with data being written in the standard ROM For details on the formatting procedure by GX Developer refer to GX Developer manuals 2 Data Storage A standard ROM stores data such as parameters and programs See Section 6 1 for the data to store in the standard ROM 3 Memory Capacity Table 6 2 shows the memory capacity of standard ROMs Table 6 2 Memory Capacity Model Name Memory Capacity Max Number of Files Stored Q02CPU 28 k steps 114688 bytes 28 files QO2HCPU 28 k steps 114688 bytes 28 files QO6HCPU 60 k
362. gardless of whether the module concerned is a control CPU or a non control CPU 13 6 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM This chapter explains the system configuration of Multiple CPU System and the precautions for Multiple CPU System configuration 14 1 System Configuration This section explains the equipment configuration of Multiple CPU System the connections with peripheral device and an output of the system s configuration 1 Equipment configuration of Multiple CPU System a When main base unit Q3 Memory card 1 Q2MEM 1MBS Q2MEM 2MBS Q2MEM 2MBF Q2MEM 4MBF Q2MEM 8MBA Q2MEM 16MBA Q2MEM 32MBA Extension of the AnS Series modu High Performance model QOPU Q02CPU Q02HCPU QO6HCPU Q12HCPU Q25HCPU Main base unit Q33B Q35B Q38B Q312B T e QA1S60 extension base unit QA1S65B QA1S68B Power supply module 1 O module Intelligent function module of the AnS Series POINT 1 Only one memory card can be mounted Select the memory card SRAM Flash and ATA in accordance with application and capacity When commercial memory cards the operation is not assured x2 Extension cable QC05B QC06B QC12B Q
363. gh Performance model QCPU Stee OS MEM EMES Q02CPU Q02HCPU Q06HCPU 2l isd j 12HCPU Q25HCP Q2MEM 8MBA Q2MEM 16MBA Sree UeeeHOny Q2MEM 32MBA A MITSUBISHI TITHIUM BATTERY Battery Q7BAT B Battery holder Q7BAT SET Power supply module 4 V O module Intelligent function module of the Q Series Main base unit Q33B Q35B Q38B Q312B Q Series module Extension of the AnS Series module ae Extension of the Exena bl Q50B extension base unit n n 1 QA1S60 extension base unit a ean cee Q52B Q55B B i l Q6LB extension base unit QA1965B QA1968B QC30B QC50B QC100B i Q63B Q65B Q68B Q612B t l i Power supply module I O module Intelligent function module of the AnS Series POINTS x1 The number of memory cards to be installed is one sheet The memory card must be selected from SRAM Flash and ATA according to the application and capacity With commercial memory cards the Operation is not assured Power supply module 3 4 O module Intelligent function module of the Q Series i 2 QA1S65B and QA1S68B extension base units are used for the po
364. gh speed interrupt x Compatibility with index modification for module designation of dedicated instruction Available x N A For function details refer to the High Performance model QCPU Q mode User s Manual Function Explanation Program Fundamentals App 59 App 59 APPENDICES MELSEC Q APPENDIX 4 3 Added functions and the corresponding GX Developer versions SW4D5C GPEW E ewer Version pte Fusion Function SW5D5C GPPW E Version6 Version 7 a Version 8 3 03D Automatic write to standard Automatic write to standard ROM _ External I O can be turned Se ee Remote Remote password setting setting eee T fo remote I O network Interrupt module QI60 compatibility Compatibility with the multiple CPU yoan ESERE the os AE CPU system High speed interrupt speed interrupt Compatibility with index modification for module designation of dedicated instruction Selection of refresh item for COM E SFC program online batch ISFC program online batch change x File memory capacity change SSS e eee CC Link remote network additional x 7 y y mode Incomplete derivative PID yy 7 y X Eg operation function Floating point comparison E instruction speedup O Available xX N A Function not related to GX Developer App 60 App 60 APPENDICES MELSEC Q APPENDIX 5 Transportation Precautions When transporting lithium batteries make sure to treat them based on the tra
365. give out the program control results to the external devices such as solenoid electromagnetic switch signal lamp and digital display Signal lamp Digital display Output Y Sequence operation Contact rO b Outputs give out the result equivalent to one N O contact c There are no restrictions on the number of output Yn N O contacts and N C contacts used in a program provided the program capacity is not exceeded Programmable No restrictions on the quantity used controller y Program Out ladder external device Figure 10 4 Output Y 2 Using outputs as internal relays M Y corresponding to the slots installed with input modules and empty slots can serve as internal relays M 2 5 el e eje 553 ELS SlSlslols gt Blo B oloo g elel elEJEJE 2 EJE Eleje z a gt Zag a 22 oE slag z A US gt OUT Yn L gt Equivalent to internal relay 10 8 10 8 10 EXPLANTION OF DEVICES MELSEC Q 3 Output method a There are 2 types of output refresh outputs and direct access outputs 1 The refresh output gives out the ON OFF data to an output module by performing an output refresh before the sequence program is executed 1 High Performance model QCPU Output module ON OFF data output Output refresh area 0 x Y 10 The refresh output is indicated as Yt 1 in the sequence program For e
366. gram gt 129 interrupt program Pa Fig 4 3 Interrupt Program Execution 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS b Interrupt factor Interrupt program execution Network refresh execution MELSEC Q When an interrupt factor occurs the interrupt program with the interrupt pointer number corresponding to that factor is executed However interrupt program execution varies according to the condition at that time 1 2 If two or more interrupts occur at the same time The interrupt programs are executed starting with the one corresponding to an interrupt pointer number I _ of the highest priority 2 The remaining interrupt programs remain on stand by until processing of the higher priority interrupt program is completed If the same interrupt factor as that being executed occurs before the interrupt program is processed the interrupt factor is stored in the memory and after the interrupt program has been processed the same interrupt program is executed again When an instruction is being executed The interrupt program may be executed by interrupting the execution of an instruction in the main routine program When the same device is used in both the main routine program and interrupt program device data may be separated To prevent the separation of the device data the following measures must be taken a Do not specify the device to which data will be written
367. gram A type program A type program B END l Next scan time WDT reset Scan time WDT reset QCPU internal processing QCPU internal processing Watchdog timer measured time Fig 7 9 Watch dog Timer Reset REMARK 1 Scan time is the time from when the High Performance model QCPU starts processing a sequence program at Step 0 until it restarts processing another sequence program with the same filename at Step 0 The scan time is not the same at every scan and differs depending on e Whether the commands used are executed or not executed e Whether to execute or not an interrupt program and a fixed scan execution type program 2 To execute at the same scan time at every scan use the constant scan function For details of the constant scan function see section 7 2 7 FUNCTION MELSEC Q 7 17 Self Diagnosis Function 1 What is Self Diagnosis Function a The self diagnosis is a function performed by the High Performance model QCPU itself to diagnose whether there is an error in the High Performance model QCPU b The self diagnosis function is used to prevent the High Performance model QCPU erroneous operation as well as preventive maintenance The self diagnosis processing detects and displays the error when an error occurs at the High Performance model QCPU power on or during High Performance model QCPU RUN mode It also stops High Performance model QCPU calculations 2 Processing for Error Detection a
368. gram cannot be monitored or tested 7 FUNCTION MELSEC Q 7 11 3 Enforced ON OFF for external I O Enforced ON OFF operations from GX Developer will forcibly switch the external I O on and off The information registered for ON OFF will be cancelled with GX Developer operations A GX Developer Version 6 or higher is required to use this function It is possible to perform enforced ON enforced ON registration enforced OFF enforced OFF registration and cancel enforced ON OFF cancel registration with the enforced ON OFF function The operations for performing enforced ON enforced OFF and canceling enforced ON OFF are shown in the table below Input X operation Output Y operation During canceling Performs sequence program Outputs the results of sequence no operations operations with external input program operations externally Performs sequence program Outputs ON externally regardless During enforced ON Joperations in the enforced ON of the results of sequence program status operations Performs sequence program Outputs OFF externally During enforced OFF operations in the enforced OFF regardless of the results of status sequence program operations The operations when enforced ON OFF is performed are shown in the diagram below Output enforced ON OFF operations Y10 device enforced OFF Y10 output External Output refreshed ACS Soe aoe cantons output OFF gt N vid OFF
369. h Performance model QCPU to the Motion CPU 1 The High Performance model QCPU can issue instructions dedicated to communication between multiple CPUs to read or write device data from to the Motion CPU The High Performance model QCPU can issue events to the PC CPU module 2 1 Refer to the manual of the Motion CPU for instructions dedicated to Motion x2 Refer to the manuals of Motion CPU and PC CPU module for instructions dedicated to the communication between multiple CPUs 13 2 13 OUTLINE OF MULTIPLE CPU SYSTEM MELSEC Q 13 2 Outline of Multiple CPU System 1 What is a multiple CPU system a A multiple CPU system is a system in which main base units are mounted on several maximum four High Performance model QCPUs and motion CPU in order to control the I O modules and intelligent function modules Motion CPU PLC CPU PC CPU module E minds Puc cpu CPU 5 PC CPU module The allowable CPU modules are shown in the table below PLC CPU Q02CPU QO2HCPU QO6HCPU Q12HCPU Q25HCPU Motion CPU Q172CPU Q173CPU Q172CPUN Q173CPUN PC CPU module CONTEC Co Ltd Choose the CPU modules suitable to the system size and application to configure the system It is necessary to set control CPU setup which High Performance model QCPU and Motion CPUs are to control which I O modules and intelligent function modules with a multiple CPU system CPU 0 1 2 3 4 5 6 Power supply CPU module CPU mo
370. h master control The master control instructions are used to open and close the ladders common bus so that switching of ladders may be executed efficiently by the sequence program Nesting devices must be numbered in descending order from NO to N7 of nested relation For details on how to use master control refer to the QCPU Q mode QnACPU Programming Manual Common Instructions Designated in ascending L A No order mc No M15 Executed when condition A is satisfied O 4 D gt Executed when conditions MC N2 M17 A and B are satisfied N2 N27 M17 __ Designated in descending nesting r Co No order control range gt Executed when condition MCR N2 A B and C are satisfied N1 is reset O NO nesting nesting control range control range gt Executed when conditions MCR N1 4 A and B are satisfied N1 to 2 are reset Executed when condition e A is satisfied NO to 2 are reset Q I Z oO gt Executed regardless of A B C condition statuses 10 53 10 53 10 EXPLANTION OF DEVICES MELSEC Q 10 9 Pointers P 1 Definition Pointer devices are used in jump instructions CJ SCJ JUMP or sub routine call instructions CALL ECALL A total of 4096 pointers can be used total for all programs being executed
371. h range portion of the link device range specified by refresh parameters the link module s link device data will be rewritten when a refresh operation occurs Therefore when writing by link direct device the same data should also be written to the High Performance model QCPU related devices designated by refresh parameter Refresh parameter settings Network No 1 High Performance model QCPU W0 to W3F gt Network module LWO to LW3F Sequence program MOV K100 W1 fj 100 is written to network module LW1 when a refresh occurs MOV W1 J1 W1 H 100 is written to network module LW1 when the MOV instruction is executed Writing timing QCPU Network module MOV K100 W1 Writing at instruction execution MOV W1 J1 W1 wo W1 Wi Writing at instruction execution Writing at refresh operation 3 When data is written to another station s writing range using a link direct device the data which is received from that station will replace the written data b Reading Reading by link direct device is allowed in the entire link device range of network modules Only one network module capable of writing reading link direct devices can be used per network number If two or more network modules are installed at the same network number the network module with the lowest first I O number will be the one that handles writing reading using link direct devices For example if stat
372. hange with another PLC No of PLC 7 When the online module change is enabled with another PLC LO status outside the group cannot be taken Ope g 41 0 sharing when using Multiple CPUs Eror mode atthe stop of PLC M Al CPUS all inp IT Al station stop by stop error of PLC2 _ Refresh settings J All station stop by stop eror of PLC3 Change screens Setting gt I All station stop by stop error of PLC4 Send range for each PLE PLC side device PLC The auto reftesh area Caution Dev starting DO Point Start End Start Nod 1024 0000 OFFF Do D1023 No 2 1024 000 OoFF D1024 D2047 No 3 512 0000 FF D2046 D2559 No 4 512 0000 mF D2560 D3071 Caution Ost HEX tom stating a e auto refresh area a tha users a i menh PLC SmE he aang ads t SE pe sot an oma hea E E devicn of AEREN TON AZA The un of por Ihat send renge fr eaeh PLC word Import Multiple CPU Parameter Check ena Cancel a When Load output condition outside of group has been set 1 Loads to the host CPU s output Y the ON OFF data that is output to the output and intelligent function modules by the other CPUs by performing output refresh before a sequence program calculation starts 2 Output Y loading is performed for the modules mounted onto the following additional base unit slots I O allocation type Mounted module Output module Intelligent function modul
373. he attribute for each Programs Change the attribute for Fil dul Devi t MAET the file in the P d Al ile module evice comments e file in the Passwor ways ef ain 1 Read Write display prohibit i y Device initial values a Registration 2 Write prohibit The control instruction read write display and write mentioned above are as follows tems Description High Performance model QCPU operation instruction by Control instruction ae T operation Remote RUN remote STOP etc Read Write display displa Program read write operations Cd read write operations Writ Operation related with write processing such as program rite writes the program and tests POINT The following functions set the PLC Parameter and High Performance model QCPU dip switches are performed even when the High Performance model QCPU system s SW1 setup switch is set to ON and the system protect function is activated e Booting from the standard ROM and the memory card e Automatic write to standard ROM 7 19 1 Password registration Password is used to prohibit reading and writing data of the program and comments in High Performance model QCPU from GX Developer The Password Registration is set for the specified memory program memory standard memory memory card program file device comment file and device initial file Either of the following two descriptions is to be registered e The file name is not displayed and re
374. he status at execution of the specified step becomes as specified 2 The specification method for the execution status is shown below a When changing from non execution status to executing status lt P gt b When changing from executing status to non execution status lt F gt c Always when executing only lt ON gt d Always when not executing only lt OFF gt e Always regardless of status lt Always gt 3 When Step No is not specified the monitoring operation is stopped after the High Performance model QCPU END processing 7 FUNCTION MELSEC Q b When Device is specified Word Device or Bit Device can be specified 1 When Word Device is selected The monitoring operation is stopped when the current value of the specified word device becomes the specified value A current value can be expressed in decimal digits hexadecimal digits 16 bit integral numbers 32 bit integral numbers or real numbers 2 When Bit Device is specified The monitoring operation is stopped when the execution status of the specified bit device becomes the specified value Either the leading edge or the fall can be specified for execution condition 3 Precautions a When monitoring after setting the monitor condition the file displayed on GX Developer is monitored Match the file to be monitored by executing the New PLC Read and file name on GX Developer b When monitoring the file register which is n
375. held 2 High Performance model QCPU calculation continue mode When an error is detected the program Instruction area where the error occurred is skipped and the rest of the program is executed The outputs Y on the device memory are retained b The calculation continue stop can be set at the PLC RAS tab screen in the PLC Parameter dialog box if the following error occur All parameter defaults are set at Stop Computation error Expanded Command error Fuse blown I O module comparison error Intelligent module program execution error Memory card access error Memory card operation error External power supply OFF For example when the I O module verification error is set to continues the calculations are continued in the I O address before the error occurred 7 64 7 64 CSCI ove 7 FUNCTION MELSEC Q 4 Error check selection The following error checking can be set to yes no at the PLC RAS tab screen in the PLC Parameter dialog box All parameter defaults are set at Yes a Battery check b Fuse blown check c I O unit comparison Self Diagnosis List Diagnosis description Diagnostic timing Hardware failure Handling error Parameter error e When the END instruction is executed Fuse bl fault 1 FUSE BRAKE OFF iui ab ocntas ey Default Yes O interrupt error 1 0 INT ERROR e When an interrupt occurs i When the power is turned on when reset P UNIT DOWN
376. hen cleaning the module or retightening the terminal or module mounting screws Not doing so could result in electric shock Undertightening of terminal screws can cause a short circuit or malfunction Overtightening of screws can cause damages to the screws and or the module resulting in fallout short circuits or malfunction Startup and Maintenance precautions A CAUTION e The online operations conducted for the CPU module being operated connecting the peripheral device especially when changing data or operation status shall be conducted after the manual has been carefully read and a sufficient check of safety has been conducted Operation mistakes could cause damage or problems with of the module e Do not disassemble or modify the modules Doing so could cause trouble erroneous operation injury or fire e Use acellular phone or PHS more than 25cm 9 85 inch away from the PLC Not doing so can cause a malfunction e Switch all phases of the external power supply off before mounting or removing the module If you do not switch off the external power supply it will cause failure or malfunction of the module e Do not drop or give an impact to the battery mounted to the module Doing so may damage the battery causing the battery fluid to leak inside the battery If the battery is dropped or given an impact dispose of it without using e Before touching the module always touch grounded metal etc to discharge static
377. hen the 65536th time measurement is made The ex times remains even when the program is stopped 7 FUNCTION MELSEC Q 3 Program can be started and stopped on the program list monitor screen a Startup program button Clicking the startup program button displays the following dialog box 1 gt Program name SAMPLE1 2 Startup mode Scan execution C Low speed execution Fixed scan execution 1 Program name Only the program that is set at the Program tab screen in PLC Parameter dialog box can be selected It is not allowed to enter a program name freely 2 Startup mode A stand by type program for Scan execution Low speed execution or Fixed scan execution can be set Startup mode defaults to the value that was set by choosing PLC Parameter lt Program gt ms or s can be selected as the unit 7 FUNCTION MELSEC Q b Stop program button Clicking the stop program button displays the following dialog box Stop program x 1 gt Proaram name SAMPLE1 7 BTA Close 2 gt Stop mode After stop output stop The output of the OUT instruction is turned off POFF instruction corresponding After stop output hold The output is maintained PSTOP instruction corresponding 1 Program name Only the program that is set at the lt Program gt tab in the PLC Parameter dialog box can be selected It is not allowed to enter a pr
378. her stations System area fi K steps me 1 A maximum of 15 k steps can be setin 1 k step modules as a system area Only 1 k step can correspond to one station monitor file Therefore a maximum of 15 station monitor files can be set 3 Precautions a The detailed condition setting of the monitor can only be set from one area b Monitoring can be performed even if a station monitor file is not set but high speed monitoring cannot be performed The system area is in the same area as the program memory so the area of the stored program decreases when the system area is set c When a user defined system area of 15k steps is created simultaneous monitoring of a single CPU from 16 areas can be speeded up 7 FUNCTION MELSEC Q 7 15 2 Multiple user RUN write function 1 What is Multiple User RUN Write Function a Multiple users can write to one file or different files during RUN b To enable multiple users to write to a single file at the same time during RUN operation specify the desired pointer for the write during RUN in advance and then select Relative step No by pointer so that its radio button is checked 2 Operation Procedure The multiple user RUN write operation is performed in the following procedures a Select Tool from Option menu and set After conversion writing behavior and Step No specification used in writing Program common Each program Whole data TEL r Edi
379. here are cases where the system will be halted with stop error detected on the CPU No 3 depending on the timing of error detection becomes MULTIPLE CPU DOWN Owing to this there are cases where a different CPU No to the CPU that initially caused the stop error will be stored in the error data s common information category In this event remove the reason for the error on the CPU that caused the stop error in addition to the MULTIPLE CPU DOWN error when restoring the system In the illustration shown below the cause of the CPU No 2 error that did not cause the MULTIPLE CPU DOWN error is removed switch STOP No2 PLC operation STOP switch STOP lo Present Error 7000 MULTI CPU DOWN 4100 OPERATION ERROR 7000 MULTI CPU DOWN r Error lo Year Month Day OPERATION ERROR 2000 11 6 c Observe the following procedures to restore the system 1 Confirm the cause of the CPU No 1 error with the PLC diagnostics function 2 Remove the cause of the error 3 Either reset the CPU No 1 or restart the power to the PLC All CPUs on the entire multiple CPU system will be reset and the system restored when the CPU No 1 is reset or the power to the CPU is restarted 14 20 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 9 Reducing the time required for multiple CPU system processing 14 21 1 Multiple CPU system processing A bus base unit pattern extension cable is
380. herefore the low speed execution type program s execution time varies from scan to scan As the low speed execution type program will not be executed at all if the constant scan s surplus time is 0 5 ms or less a constant scan time setting should be designated which provides a surplus time of more than 0 5 ms 2 If a low speed program execution time has been designated the low speed execution type program will be executed repeatedly in accordance with that time setting Therefore the scan time will vary from scan to scan x3 If a constant scan time has been designated the surplus time after completion of low speed END processing is waiting time and execution of ascan execution type program starts when the constant scan time has elapsed This means that the scan time is constant in each scan However if the surplus time after the constant scan is less than 0 5 ms low speed execution type programs cannot be executed If using a low speed execution type program set the constant scan time so that the surplus time is 0 5 ms or longer 4 If a low speed program execution time has been designated scan execution type program operation is started ignoring the surplus time after completion of low speed END processing This means that the scan time differs in each scan If a low speed execution type program cannot be processed within constant scan surplus time or within the low speed program execution time program execution is temporarily
381. ial communication module e Refresh process of MELSECNET H and CC Link For this reason I O monitor and test operation using GX Developer reading writing from the serial communication communication with another station using MELSECNET H and communication with a remote station over the CC Link can be made even in the STOP or PAUSE status 4 5 Operation Processing during Momentary Power Failure The High Performance model QCPU detects a momentary power failure when the input power voltage supplied to the power supply module is lower than the regulated ranges When the High Performance model QCPU detects a momentary power failure the following operation processing is performed 1 When momentary power failure occurs for a period shorter than the permitted power failure time a The output is maintained when the momentary power failure occurs and file name of the file accessed and error history are logged Then the system interrupts the operation processing The timer clock continues b When there is an SFC continue specification a system saving processing is performed c Whena momentary power failure ends the operation processing is resumed d Even if the operation is interrupted due to momentary power failure the watch dog timer WDT measurement continues For example if the GX Developer PLC parameter mode WDT setting is set at 200 ms when a momentary failure of 15 ms occurs at scan time 190 ms the watch dog timer err
382. ial execution type program s es 4 15 Initial SCAN Men reenedanicnnnudaa a 4 16 Input response TIME eee eee eee eeteeeeeeeaeeeee 7 21 Intelligent function module device U lt 2 G 7 10 38 Internal relay M 10 10 Internal system device seee 10 31 Internal user device sseeeseeeeesesee 10 3 Interrupt MOUIE iosian i 5 11 Interrupt pointer I sseseseeseeseeresesersnenn 10 56 Interrupt program ssssssesseeieersersrrerisrrsrrsns 4 6 J Network designation device 0 10 58 Jti B i3 Link relay n 10 35 Jt SB Link special relay 06 10 35 J 1 SW ii Link special register 10 35 J ti W C3 Link register oer 10 35 Co X c LINK input sessen 10 35 J ii Y ii Link output secsec 10 35 K Decimal constants 0 cee 10 61 L Latch relay enata A 10 11 Laten functia 7 5 Latch relay L eeeecseeeseeeseeeeeeeteeeeeeeees 10 11 LED CiSplay eea a REAA 7 74 Link direct device 10 35 Link register W ssssesssssesresrssrsrsrrsrrsrsenens 10 29 Lirik relay B ronin 10 17 List of Interrupt factors eeeeeeeeeeeee 10 57 App 55 Local COVICC ee ceecceecceeeeeeeceeeeeeeeteeteeeteeetes 10 63 Low speed END processing 0 eeeeee 4 23 Low speed execution monitor time 4 24 Low speed execution type program 4 19 Low speed retentive timer ST 0 0 0 10 21 Low speed Scan timer cccseeeeteeeeeeeees 4 23 Low
383. ial function module x4 Represents the program using the intelligent function module device or the FROM TO instruction 8 3 1 Communication using device initial value 1 Device initial value The device initial value is used to designate the initial setting of the special function module without using a program The designated device initial value is written from High Performance model QCPU to the special function module when High Performance model QCPU is turned ON is reset or is switched from STOP to RUN 2 Designation of the device initial value In the device initial value setting of GX Developer designate the special function module device as the device of the device initial value 1 For the device initial value see Section 10 13 2 2 For the intelligent function module device see Section 10 5 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 3 2 Communication using FROM TO instruction 1 FROM TO instruction At the execution of the FROM TO instruction the data stored in the buffer memory of the special function module can be read or data can be written to the buffer memory of the special function module The FROM instruction stores the data read from the buffer memory of the special function module to the designated device The TO instruction writes the data of the designated device to the buffer memory of the special function module 1 For the details of the FROM TO instructio
384. ial value and click on Use device memory In the PLC file setting in the PLC parameter designate the name of file to be used for the designated device initial values Designate local devices gg See Section 10 13 1 In the device setting item in the PLC parameter designate the name of the local device range In the PLC file setting item in the PLC parameter designate the name of the local device file Use the common A 6 Yet Stet ee See Section 10 9 2 pointers In the PLC system setting item in the PLC parameter desig nate the first pointer No 12 7 12 7 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q 2 In the boot file setting item in the PLC parameter designate the file name of parameter and program to be read from the memory card In the program settings in the PLC parameter designate the name of the program to be exe cuted and its execution condition Set the CPU module s RUN f ERR LED switches ON STOP switch to the STOP position then switch the power ON Connect the GX Developer to the CPU module In the GX Developer online mode select the program memory and use the PLC memory batch operation to format the program memory In the GX Developer online mode select the memory card RAM then use the PLC memory batch operation to format the memory card
385. if the High Performance model QCPU is changed to STOP status in such areas as process control The output Y is turned off upon a stopping error To retain the output even upon a stopping error use I O allocation of PC parameters to set output retention 2 Method with Remote PAUSE There are two ways to use remote PAUSE a Method with remote PAUSE Contact The remote PUASE contact is set at the PLC system tab screen in the PLC Parameter dialog box of GX Developer The device can be set in the range of input XO to 1FFF 1 The PAUSE status contact SM204 is turned on when the END processing is executed for the scan with both remote PAUSE contact and PAUSE permission flag SM206 on 2 When the remote PAUSE contact is off or SM206 is turned off the PAUSE status is canceled and the sequence program calculation is performed again from step 0 0 Remote PAUSE contact SM206 ON ON when PAUSE condition met RUN PAUSE status PAUSE status Fig 7 6 PAUSE Time Chart with Remote PAUSE Contact 7 FUNCTION MELSEC Q b Method with GX Developer Serial Communication Module etc The remote PAUSE operation can be performed from the GX Developer or by using serial communication module The GX Developer operation is performed by on line remote operation The serial communication module and Ethernet interface module are controlled by commands complying with
386. igen 1 l gt function setting i l module i Se ee eT ee j 10 70 10 70 10 EXPLANTION OF DEVICES MELSEC Q c Device initial values can be used by the following devices 1 Timer present value T 8 File register RO to R32767 2 Retentive timer present value ST 9 File register ZRO to ZR1042431 3 Counter present value C 10 Intelligent function module device 4 Data register D UL3 GC3 5 Special register SD 11 Link direct device JDI WC3 6 Link register W JO SWT3 7 Link special register SW Ke ae n a a wa 2 Procedure for using device initial values a Designate the device initial value range settings in the device mode in the Device initial value setting screen b Designate the device initial value data settings in the device mode screen Device initialization range setting screen Device mode screen Point Start End Comment Device Label D0 z Display 16bit integer x bec v R0 R32767 2 Device name 0 i 2 3 4 5 6 7_ Character string RO RS R16 R24 R32 R40 R48 R56 R64 R72 R80 R38 R96 R104 R112 R120 R128 R136 Rl44 The above device range and device data settings will be written to the PLC as initial values RSZ Please execute Device memory diversion if the device initial range setting is changed R160 Liei kk
387. igh Performance model QCPU Motion CPU and PC CPU module can configure a multiple CPU system 14 Ease of handling CC Link system When one master module for CC Link system is used I O signals for up to 64 remote I O stations can be controlled without parameter setting The remote I O stations can be controlled as if I O modules on the base unit are controlled 15 File password for blocking illegal access The file password can be used to set the access level read disable write disable of a program to prevent program file device initial value file and device comment file changes due to illegal access 1 Features 9 to 12 are functions added to the High Performance model QCPU whose serial number is 02092 or later in its upper 5 digits 2 The remote password facility can be executed when the Ethernet module or serial communication module of function version B and GX Developer Version 6 or later are used 3 In addition to the remote password there are the following protection facilities for the High Performance model QCPU Protection of the whole CPU module by making system settings of the High Performance model QCPU Protection of the memory card by setting the write protect switch of the memory card File by file protection using password 4 The MELSECNET H remote I O network facility can be executed when the MELSECNET H network module of function version B and GX Developer Version 6 or later are used 5 The feature in 13
388. il PL 31 444 Krakow Phone 48 0 12 632 28 85 Fax 48 0 12 632 47 82 e mail krakow mopl pl AutoCont CZECH REPUBLIC Control Systems s r o Nemocnicni 12 CZ 702 00 Ostrava 2 Phone 420 59 6152 111 Fax 420 59 6152 562 e mail consys autocont cz louis poulsen DENMARK industri amp automation Geminivej 32 DK 2670 Greve Phone 45 0 70 10 15 35 Fax 45 0 43 95 95 91 e mail pia lpmail com UTU Elektrotehnika AS P rnu mnt 160i EE 11317 Tallinn Phone 372 0 6 51 72 80 Fax 372 0 6 51 72 88 e mail utu utu ee ESTONIA Beijer Electronics OY FINLAND Ansatie 6a FIN 01740 Vantaa Phone 358 0 9 886 77 500 Fax 358 0 9 886 77 555 e mail info beijer fi UTECO A B E E 5 Mavrogenous Str GR 18542 Piraeus Phone 302 0 10 42 10 050 Fax 302 0 10 42 12 033 e mail sales uteco gr GREECE Meltrade Automatika Kft 55 Harmat St HU 1105 Budapest Phone 36 0 1 2605 602 Fax 36 0 1 2605 602 e mail office meltrade hu HUNGARY SIA POWEL Lienes iela 28 LV 1009 Riga Phone 371 784 22 80 Fax 371 784 22 81 e mail utu utu lv LATVIA Sirius Trading amp Services srl ROMANIA Str Biharia No 67 77 RO 013981 Bucuresti 1 Phone 40 0 21 201 1146 Fax 40 0 21 201 1148 e mail sirius siriustrading ro INEA d o o SLOVENIA Stegne 11 SI 1000 Ljubljana Phone 386 0 1 513 8100 Fax 386 0
389. ils on special registers 2 The figure below shows the clock data stored in D10 to D16 D10 1999 4 digits in AD D11 8 Month D12 10 Date D13 11 Hour See Section 7 5 1 D14 35 Minute D15 24 Second D16 2 Day of the week 7 FUNCTION MELSEC Q 3 Precautions a The clock data is not set prior to shipment The clock data is used in High Performance model QCPU system and intelligent function module for failure history and other functions Be sure to set the accurate time when operating the High Performance model QCPU for the first time b Even when a part of the time data correcting all data must be written to the clock element again c The data to be written to the clock element is checked in the range described in 1 b of Section 7 5 For this reason if improbable clock data in the range described in 1 b of Section 7 5 is written to the clock element correct clock operation is unavailable Example fe ea Writing to clock element CPU module operation status February 30 Error is not detected When DATEWR instruction is executed 32 of month 13 Not executed OPERATION ERROR Error code 4100 When SM210 is on SM211 is on 4 Accuracy of Clock Data The accuracy of the clock function differs with the ambient temperature as shown below Ambient Temperature C Accuracy Day difference S 3 18 to 5 25 TYP 2 12 25 3 93 to 5 25 TYP 1 9 14 69 to 3 53 TYP 3 67
390. in the interrupt program directly in the main routine program but use another device by shifting the data with a transfer instruction etc b If inconvenience is caused when the instruction is interrupted in the main routine program execute it after disabling the interruption with the DI instruction However since the interrupt program will not interrupt during access to the device of each argument of the instruction data separation will not occur on an argument basis Interruption during a network refresh If an interrupt factor occurs during a network refresh operation the network refresh operation is suspended and the interrupt program is executed This means that assurance of blocks in cyclic data at each station cannot be secured by using a device designated as a destination of link refresh operation on the MELSECNET H Network System 3 Pt 7 Network refresh operation is suspended and the interrupt program is executed Fig 4 4 Interruption during Network Refresh Operation 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 Interruption during END processing If an interrupt factor occurs during an END processing waiting period when constant scan is performed the interrupt program corresponding to the factor will be executed 1 For details on the IMASK and El instructions refer to the QCPU Q mode QnACPU Programming Manual Common Instructions
391. in the sequence program in order to display the output data in the same manner as decimal data High Performance modle QCPU Numeric data designation BINP K4x0 Do H Digital display FROEN l YF v30 BCD D5 ea BCD output BIN data Fig 4 12 Digital Display of Data from High Performance model QCPU 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 8 1 BIN Binary Code 1 Binary code Binary date is represented by 0 OFF and 1 ON Decimal notation uses the numerals 0 through 9 When counting beyond 9 a 1 is placed in the 10s column and a 0 is placed in the 1s column to make the number 10 In binary notation the numerals 0 and 1 are used A carry occurs after 1 and the number becomes 10 decimal 2 Table 4 2 gives a comparison between binary and decimal notations Table 4 2 Comparison between Binary and Decimal Notations DEC Decimal BIN Binary Carry Carry Carry 2 Binary numeric expression a High Performance model QCPU registers data registers link registers etc consist of 16 bits and a 2 value is allocated to each of the register bits The most significant bit initial bit is used to discriminate between positive and negative 1 When most significant bit is 0 Positive 2 When most significant bit is 1 Negative The numeric expressions for the High Performance model QCPU registers are shown in Fig 4 13 below Most
392. ine program program i 10 Interrupt program 2 When stand by type program execution is completed the program which was active before the stand by type program was executed is executed A stand by type program s sub routine and interrupt programs are executed as shown below CALL P100 command execution Interrupt error factor occurred END aa END processing END processing Scan execution type program P100 RET Sub routine program H 10 IRET Interrupt program 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS b c When M0 is on switch the ABC program from a a i scan execution type Hee stand by type program to When M1 is on switch the ABC program from a scan execution type program to a stand by type program Changing the program setup 1 execute necessary programs MELSEC Q Create a program compatible with all programs and use it only to Programs designated as stand by type programs in the PLC Parameter dialog box can be converted to scan execution type programs and executed in a sequence program Change the execution type in the High Performance model QCPU by using PSCAN PLOW PSTOP and POFF instructions See Section 4 2 3 The following methods can be used to convert a program which is to be executed 1 program Selecting the program to be executed from a single management e Convert a stand by type program that meet
393. ing 149 cannot be executed at the preset interrupt cycle intervals App 58 App 58 APPENDICES MELSEC Q APPENDIX 4 Enhancement of the High Performance Model QCPU Functions The High Performance model QCPU has been updated to add functions and change the specifications The functions and specifications that can be used with the High Performance model QCPU change depending on the function version and serial No APPENDIX 4 1 Specification Comparison Serial No of CPU Module Function Version A Function Version B Ae 02091 02092 03051 04012 Specifications or earlier or later or later or later Q02CPU 64kbyte Q02HCPU 64kbyte 128kbyte Standard RAM capacity QO6HCPU 64kbyte 128kbyte Q12HCPU 256kbyte 256kbyte lcPUsharedmemoy x x o o Extended life battery sRaMcar o x lo ox d x x o Compatibility with 2MbyteSRAMcard x d x x x o Available x N A APPENDIX 4 2 Function comparison Serial No of CPU Module Function Version A Function Version B l 02091 02092 03051 04012 04122 05032 Added Function or earlier or later or later orlater orlater or later Automatic write tostandadROM x OT Oh OT Oh UT OU UT OU Remote password setting Compatibility with MELSECNET H remote I O network Interrupt module QI60 compatibility PS ae a SOE al Compatibility with the multiple CPU system ca eo ee Ro ae ee oe ARARAT peeve e e a a multiple CPU system EEE E E Ee a a a se x Hi
394. ing range J 1 When used outside the MELSECNET H network system s range link registers can serve as data registers b Link registers which consist of 16 bits per point read and write data in 16 bit units b15 a bo 7 a a EEE c If the link registers are used for 32 bit instructions the data is stored in registers Wn and Wn 1 The lower 16 bits of data are stored in the link register No Wn designated in the sequence program and the higher 16 bits of data are stored in the designated register No 1 Wn 1 For example if link register W12 is designated in the DMOV instruction the lower 16 bits are stored in W12 and the upper 16 bits are stored in W13 H _ pmov ks500000 we Processing object W12 W13 W13 W12 Upper 16 bits Lower 16 bits ted gt In two link register points 2147483648 to 2147483647 or OH to FFFFFFFFu data can be stored d Data stored by the link register is maintained until another data is save The MELSECNET H network module has 16384 link register points The High Performance model QCPU has 8192 link register points When subsequent points after Point 8192 are used for link registers change a number of points setting of link registers at the Device tab screen in the PLC Parameter dialog box 10 30 10 30 10 EXPLANTION OF DEVICES MELSEC Q 2 Using link registers in a network system In order to use link
395. ing trace can be executed or not 2 When a sampling trace start request is accepted the sampling trace starts and SM802 sampling trace executing turns on SM802 indicates whether the sampling trace is executed or not A trace from GX Developer starts e SM801 is turned on 3 When a next trigger condition is satisfied SM804 after sampling trace trigger turns on SM804 indicates whether the trigger conditions are satisfied or not A trigger from GX Developer executed e The TRACE instruction is executed e SM803 is turned on 4 After the sampling trace is completed SM805 sampling trace complete is turned on Trigger SM801 SM801 Trigger Trace execution OFF ON execution complete Number of i Number of trace after trace after i trigger Clear the trace count trigger i a S a SM800 Sampling trace ready l l SM801 Sampling trace start SM802 Sampling trace executing SM803 l Sampling trace trigger i SM804 After sampling trace trigger SM805 Sampling trace complete When trace is interrupted from GX Developer the SM800 is also turned off 7 FUNCTION MELSEC Q g Trace interrupt 1 When SM801 sampling trace start is turned off during sampling trace the sampling trace is interrupted In the meantime the number of traces is cleared 2 When turning on SM801 again trace is restarted Trigger SM801 SM801 Trigg
396. ints The standard RAM can store only the file registers and local devices Hence when the local devices are not used the above number of points can be used for the file registers 2 Using the SRAM Card The size of a file can be expanded at the rate of 32 k words per block up to 32 blocks 1017 k words The number of expandable blocks depends on the size of programs or device comments stored on a memory card 3 Using the Flash Card The size of a file can be expanded at the rate of 32 k words per block up to 32 blocks 1018 k words The number of expandable blocks depends on the size of programs or device comments stored on a memory card For details regarding the High Performance model QCPU memory cards see Section 6 1 10 7 2 Differences in memory card access method by memory card type File registers are stored in three types of memories standard RAM SRAM card and Flash card Note that the file register access method differs depending on the memory type How to A Standard SRAM Flash carta ia RAM Card Card Read with a user s program aeons ome Write with a user s program PLC read through the device setting PLC write through the device setting ome eo ee ee Online test operation rom GX Developer CO OX PLC writefrom x Developer Ox PLC write from GX Developer FlashROM X X TOT Batch write from serial communication modue O f of x Device write rom oT900 Seres CO Ox Random write command fromGoTgo0sere
397. ion No 1 and station No 2 network modules are installed in network No 1 as shown in the figure below the station No 2 network module will handle link direct device operations Network No 1 Network module Network module CPU module St Power supply module 2 ion St 2 N og aa ion z e SS Writing reading using link direct devices not allowed Writing reading using link direct devices allowed 10 37 10 37 10 EXPLANTION OF DEVICES MELSEC Q 3 Differences between link direct devices and link refresh The differences between link direct devices and link refresh are shown in Table 10 4 below Table 10 4 Differences Between Link Direct Devices and Link Refresh Link Direct Device Link Refresh Link relay Ji s K4B0 or later BO or later Program 7 7 Link register Ji j WO or later WO or later notation Link special relay JC i K4SBO0 or later SBO or later method Link special register Ji i SWO or later SWO or later Number of steps 1 step All network module link Refresh parameter Network module access range A devices designated range Access data guarantee range Word units 16 bits 1 For details on the MELSECNET H network system refer to the Q Corresponding MELSECNET H Network System Reference Manual 2 For details on network parameters common parameters and network refresh parameters refer to the following manuals e Detailed information Q Corr
398. ion and lower link are not checked Br stations JON Check non execution When SM1209 is OFF the link parameters of the higher and lower link are checked z z z z z N N N N N S e S a lt lt D Link card error for OFF Normal Control is performed depending on whether the link card M9210 SM1210 i master station ON Abnormal hardware is faulty or not M9211 SM1211 Er OFF Normal Control is performed depending on whether the link card use ON Abnormal hardware is faulty or not OFF Online ee z M9224 SM1224 Link status ON Offline station to station PePends on whether the master station is online or offline or is in station to station test or self loopback test mode test or self loopback test M9225 SM1225 Forward loop error OFF Normal Depends on the error condition of the forward loop line ON Abnormal M9226 SM1226 Reverse loop error OFF Normat Depends on the error condition of the reverse loop line ON Abnormal App 16 App 16 APPENDICES ACPU Special Special Special Relay after Relay for Conversion Modification SM1227 SM1233 SM1235 SM1236 SM1238 SM1240 SM1242 SM1243 SM1246 SM1250 SM1251 SM1252 SM1253 SM1254 SM1255 App 17 MELSEC Q Special Relay List Continued Not being executed Forward or reverse loop test execution underway RUN or STEP RUN status STOP or PAUSE status Loop test status Local stati
399. ipheral devices perform monitor operation given in hexadecimal Cleared when all contents of SD1116 to SD1123 are reset to 0 e O module verify check is executed also to the modules of remote I O terminals e Error status of the MINI S3 link detected on loaded AJ71 P T32 53 i is stored b15 b7 to 8 7 6 5 413 2 514 a a Bits which correspond to the signals of AJ71PT32 S3 shown below are turned on as the signals are turned on e Hardware error X0 X20 e MINI S3 link error datection X6 X26 e MINI S3 link communication error X7 X27 Bits which correspond to faulty AJ71PT32 S3 are turned on When the AC power supply module is used 1 is added at occurrence of an instantaneous power failure of within 20ms The value is stored in BIN code It is reset when power is switched from OFF to ON When the DC power supply module is used 1 is added at occurrence of an instantaneous power failure of within 10ms The value is stored in BIN code It is reset when power is switched from OFF to ON When the DC power supply module is used 1 is added at occurrence of an instantaneous power failure of within 1ms The value is stored in BIN code It is reset when power is switched from OFF to ON When one of FO to 255 is turned on by or SET F the F number which has been detected earliest among the F numbers which have turned on is store
400. isplay is performed with the following conditions 1 A stop error is displayed without condition 2 An operation continue error is displayed according to the priority factor number set as the default The priority can be changed Set with special registers SD207 to SD209 3 When errors with the same priority level occur the error detected first is displayed The priority is set with the special registers SD207 to SD 209 in the following manner Factor number default value Hexadecimal 15 to 1211 to 8 7 to 43 to 0 bit 15 to 0 bit D207 Priority order 4 Priority order 3 Priority order 2 Priority order 1 SD207 4 3 2 1 Factor number setting area SD208 Priority order 8 Priority order 7 Priority order 6 Priority order 5 SD208 8 5 Factor number setting area Priority order 10 Priority order 9 sD209 0 Neglected Factor number setting area 7 FUNCTION MELSEC Q The description and default priority for the factor number to be set in the special registers SD207 to SD209 are as follows o Factor number 3 Priority Description Remarks Hexadecimal AC DC DOWN Power shutoff UNIT VERIFY ERR I O module verification error 2 2 FUSE BREAK OFF Fuse shutoff SP UNIT ERROR Intelligent function module verify error OPERATIN ERROR Calculation error LINK PARA ERROR Link parameter error 3 SFCP OPE ERROR SFC instruction calculation error SFCP EXE ERROR_ SF
401. ister and local device data is stored in the standard RAM The use of file registers in the standard RAM will enable high speed access as is the case with data registers Memory card A memory card can be connected to a memory card interface of the High Performance model QCPU This allows the read write of data The High Performance model QCPU supports three types of memory cards SRAM card Flash card and ATA card 1 The SRAM card allows the write read of programs through a sequence program in the following cases where File registers are used in excess of the standard RAM capacity e Sampling trace data is stored e Failure history data is stored The use of file registers allows the write read of data at 1017k points in a sequence program 2 The Flash card allows only the read through a sequence program The Flash card is useful when data written by the High Performance model QCPU is read through a sequence program but no change is made to the data The use of file registers allows a sequence program to read a maximum of 1018 k points of data written by the High Performance model QCPU 3 The ATA card is used for PLC user data general purpose data Access to PLC user data stored on the ATA card can be made in CSV format binary format by using a file access instruction e g FWRITE in a sequence program 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 2 Types of Data Stored in the High Performance model QC
402. it or power wires or install them close to each other They should be installed 100 mm 3 94 inch or more from each other Not doing so could result in noise that would cause erroneous operation e When controlling items like lamp load heater or solenoid valve using an output module large current approximately ten times greater than that present in normal circumstances may flow when the output is turned OFF to ON Take measures such as replacing the module with one having sufficient rated current Installation Precautions CAUTION e Use the PLC in an environment that meets the general specifications contained in High Performance model QCPU Q Mode User s Manual Hardware Design Maintenance and Inspection Using this PLC in an environment outside the range of the general specifications could result in electric shock fire erroneous operation and damage to or deterioration of the product e Hold down the module loading lever at the module bottom and securely insert the module fixing latch into the fixing hole in the base unit Incorrect loading of the module can cause a malfunction failure or drop When using the PLC in the environment of much vibration tighten the module with a screw Tighten the screw in the specified torque range Undertightening can cause a drop short circuit or malfunction Overtightening can cause a drop short circuit or malfunction due to damage to the screw or module e When installing mor
403. ith internal arithmetic operations such as the SIN command and COS command when double precision is set e Real arithmetic operations will be performed faster owing to the internal arithmetic operations being performed with short precision 82 bit when Do not perform internal arithmetic operation in double precision is set and there are also cases where a certain amount of precision will be lost Qn H Parameter x PLC name PLC system ruc file PLCRAS Device Program Boot file SFC 1 0 assignment Timer limit setting Low 100 ms 1ms 1000ms Common pointer No P After 0 4095 speed Hih 10 0 1 speed SUIS Paneer EG gt Points RUN PAUSE contacts System interrupt settings SH bs GO KTFFF Intenupt counter start No C 0 768 PAUSE X X lt 0 X1FFF Fixed scan interval Remote reset 128 100 0 ms 0 5ms 1000ms I Allow 129 400 0 5ms 100 Output mode at STOP to RUN re tomes or Previous state 130 20 0 ms 0 5ms 1000ms High speed Recalculate outputis 1 scan later 131 TOO ms 0 5ms 1000ms uPtseting Floatin ithmetic processing Interu pool pt program Fixed scan program setting Perl ithmeti erations To turn off Perform r TT High speed execution internal arithmetic Intelligent function module setting Module synchronization f Interrupt pointer setti I Synchronize intelligent module s pulse up operations in double pee n JSettings should be set as
404. ith the PLC parameter multiple CPU settings b The automatic refresh period of the CPU shared memory is calculated in the following equation Automatic refresh time N1 received word points X N2 X number of other CPUs N3 transmitted word points X N4 us e The received word points must equal the word points transmitted by other CPUs For example if the host CPU is the CPU No 1 then this value must equal the number of points transmitted for the CPU No 2 to CPU No 4 e Use the following values for N1 to N4 QO2HCPU QO6HCPU Q12CPU Q25HCPU 0 44 us 0 08 ps c The amount of time required for the automatic refresh process will be prolonged by the following amount of time when processing is duplicated with the automatic refresh function on other PLCs Prolonged time transmitted received word point X N5 X number of other CPUs ps Use the following values for N5 CPU type Systems with only a main base Systems that include additional base units Q02CPU QO2HCPU QO6HCPU Q12HCPU Q25HCPU 18 2 18 PROCESSING TIME FOR MULTIPLE CPU SYSTEM HIGH PERFORMANCE MODEL QCPUS QCPUS MELSEC Q 2 MELSECNET H refresh a The amount of time required for performing the refresh process between High Performance model QCPU and MELSECNET H network modules Refer to the following manual for details on the refresh time for MELSECNET H e Q Corresponding MESLECNET H Network S
405. itial execution program See Section 4 2 2 3 Low speed execution Low speed This program type is executed only when a constant scan setting is made or when a time is set for execution of low speed execution type programs e When a constant scan setting is made the program is executed during the surplus time of a scan execution type program When a time for execution of low speed execution type programs is set the program is executed during this set time See Section 4 2 3 4 Stand by Wait This program is executed only when its execution is requested See Section 4 2 4 5 Fixed scan execution Fixed scan Program that is executed at time intervals specified in the Fixed scan and In units columns of the Program Setting sheet of the PLC Parameter dialog box See Section 4 2 5 c Scantimes of programs being executed except the fixed scan execution type program can be checked on the monitor of the program list See Section 7 11 1 4 13 4 13 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 2 Flow of each program of High Performance model QCPU The flow of each program after power ON or STOP of the PLC to RUN switching of the CPU module is shown below Power ON STOP to RUN x Executed only once at power ON or STOP to RUN Initial execution type program Run only when constant scan or Low speed execution low speed program execution time type program l e END proce
406. itten App 46 App 46 APPENDICES MELSEC Q Special Register List Continued ACPU Special Conversion Special Register after Conversion Special Register for Modification Corresponding CPU D1019 D1020 D1021 D1028 SD526 1 second counter Clock data dt D213 D9019 D9020 D9021 D9022 D9025 D9026 D9027 D9028 Clock data Clock data Clock data Maximum scan time 10 ms units Constant scan time User sets in 10 ms units Scan time 1 ms units Count in units of 1s Clock data year month Clock data day hour Clock data minute second Clock data day of week If scan time is larger than the content of SD526 the value is newly stored at each END Namely the maximum value of scan time is stored into SD526 in BIN code Sets the interval between consecutive program starts in multiples of 10 ms 0 No setting 1 to 200 Set Program is executed at intervals of set value x 10 ms e Scan time is stored and updated in BIN code after every END When the PC CPU starts running it starts counting 1 every second e It starts counting up from 0 to 32767 then down to 32768 and then again up to 0 Counting repeats this routine e Stores the year 2 lower digits and month in BCD b15 to bi2b11_ to b8b7 to _b4 b3 Example L H8707 Month Stores the day and hour in BCD to bi2b11_ to b8b7 to b4 b3 b0 Example 31th 10 o clock
407. itten on the PLC side Operation Trace data Condition Results storing dest and Trace condition can be set when Execute and Status is displayed 1 Atthe Operation section select one of the following e Start trace The trace is started Starts to count the trace count e Stop trace The trace is interrupted The total trace count and trace count after trigger are cleared When restarting trace select Start trace again e Execute trigger Starts to count the trace count after trigger The trace is complete when the trace count reaches the specified trace count after trigger e Regist trace Registers trace data when a program is executed 2 Inthe Trace data Conditions Results storing dest section specify a file name of a file in which to store trace data and trace conditions Trace results are also stored in a selected file with a specified file name 7 FUNCTION MELSEC Q 3 Atthe Trace Condition section select one of the following e Execute by overwriting the conditions on PLC side Overwrites trace condition to the existing trace file e Execute by following conditions written on PLC side Executes the program with the conditions in the trace file specified in Trace Data Condition Results storing dest e Read the trace results form the High Performance model QCPU and display the data 1 Read from PLC reads the trace result from the High Performance model QCPU 2 The read
408. l HOMES sareari tred TEAR a ERAR REEI AARAA a FAREREI EERROR E ERAR A RIERA AREE E EER ESAR 10 54 10 9 2 Common pointers is ninini aiiin eh aeons ee 10 55 10 10 Interrupt Portar a sos A EA AAAA 10 57 MONRO NEIN BIE AAA E A E A E E A A E 10 59 T0 SFC block device BE e ma E aa a a aa tenet eink ie endl lero Aa Da Sa ed atte 10 59 10 11 2 SFC transition device TR ccceccesseceeceseeseceeceeeeeceeceeseeeeaeseeeaeseeesaesaeseseaesaesaeseeseaeeaesaeseeseaeeaee 10 59 10 11 3 Network No designation device J eeceeceeeceeeeeeeeeeeeeeeeeseeeseeeeeeesaeeseeeseeseeeseeeseeeseeeseeeeeeesentaaes 10 59 10 11 4 I O No designation device U c ccecceccecceseseeceeeeseeeececeeeeeesaecaeseeseaesaesaeseeseaesaesaeseeeeaetaeeeseeeaee 10 60 10 11 5 Macro instruction argument device VD ee eeceeceseeeeeeeeeeeeeeeeeeeseeseeeseeesaeeseneseeeseeeteeeteeeeeeeeaes 10 61 10 42 Constants aaa aa eaa a hil eal he tt ed et 10 62 10 12 31 Decimal Constants KK rart aar a AAAA 10 62 10 12 2 Hexadecimal Constants H ceceeceesceeeeeeeeeeeeeeeeeeeeeseeeeaeeseeesecesecesaeesaeeseeeseeseeseeeseeeseaeseeseneeeaes 10 62 10 12 3 Real numbers E ereraa earna AR ERAEN EAA RETEA A ERA RA AA RSA RA ERA AE RT A E 10 63 10 12 4 Character string c2esaiiasaies ities eh RO ees eae Ue ie 10 63 10 13 Convenient Uses for D VICOS ccsesccesecesessesesesesteseseseseseseseeseseseseeueseseseeeaeseseeteaeseseaeeteasseeaeseseeteneasseateeeaeiees 10 64 10 13 1 Glob
409. l QCPU Q mode User s Manual Hardware Design Maintenance and Inspection and resolve the error cause 7 FUNCTION MELSEC Q 7 18 Failure History The High Performance model QCPU can store the failure history results detected from the self diagnosis function and the time in the memory The detection time uses the High Performance model QCPU internal clock so make sure to set the correct time when using the High Performance model QCPU for the first time 1 Storage Area a The latest 16 failures are stored in the latched High Performance model QCPU failure history storage memory b When storing more than 16 the history can be stored in the memory card file using PLC RAS setting in the PLC Parameter box c When the history count set in the parameter and that stored in the memory card are different after the following operation is performed the contents of the memory card history file is cleared then the 16 failure data in the High Performance model QCPU failure history storage memory is trandferred to the history file 1 When the history count in the parameter history file is changed in the middle of operation 2 When a memory card which has a different history count from that set in the parameter is mounted d The storage area in the failure history file is as follows File in the set memory card Amount that can be stored _ Max 100 can be changed x1 When the number of storage excee
410. l QCPUs and or Motion CPUs other than the control CPU Non control CPUs For example when the module mounted on slot 3 is controlled by the CPU No 2 the CPU Nos 1 3 and 4 are the non control CPU of the module on slot 3 System mounted with up to four High Performance model QCPU Motion CPU and PC CPU module on the main base unit to exercise control Single CPU system Multiple CPU system MEMO 1 OVERVIEW 1 OVERVIEW MELSEC Q This manual describes the functions programs and devices of the High Performance model QCPU Refer to the following manual for the specifications etc of the power supply modules base units extension cables memory cards and battery High Performance Model QCPU Q Mode User s Manual Hardware Design Maintenance and Inspection Functions are added when the High Performance model QCPU is updated The added functions can be discriminated by the function version serial number of the CPU module Table 1 1 gives the added functions and the corresponding GX Developer versions When using the added function confirm the function version serial number and the GX Developer version Table 1 1 List of Functions Added to High Performance Model QCPU and Function Versions Serial Numbers Update Details of High Performance Model QCPU Function Corresponding pes Serial No Added functions GX Developer version e Automatic write to standard ROM e Enforced ON OFF for external I O
411. l off for standalone systems Set by ACPU Applicable OFF No hold e Specifies whether or not to hold the output value when a M1500 Hoinede ON Hold range over occurs for the S IN instruction range check u New OFF No hold Specifies whether or not the output value is held when a New eMiody tod mode ON Hold range over occurs for the S OUT instruction range check U New OFF Redundant system backup mode SM1510 Operation mode independent e Turns on when the operating mode is redundant system S New system separate Each END ON Redundant system separate mode OFF System A fixed mode ON Previous control system latch mode is started ON Hot start start when the redundant system is started up CPU is started ON Hot start start when the redundant system is actually start up CPU is switched ON Hot start module operation is switched for a redundant system OFF Output reset e Turns on when the output mode during a stop error is S status ON Standby system the standby system change OFF Power supply on startup Turns on when the CPU module is started up by the S Status SM1517 CPU startup status ON Operation operation system switch Turns on when the start mode for a redundant system when the power is turned on is the previous control system S Initial latch mode Start mode when power supply is on system switch Reset using the user program changa staru
412. l the selected module to the main base unit and expansion base units sevcceccecccecseeeee Start the GX Developer Version 6 or later For the starting method refer to the GX Developer operating manual srccccccccccecsecves Create parameters and sequence programs for CPU No 1 to No 4 For multiple CPU settings and control CPU settings see sections 16 1 and 19 2 For automatic refresh of device data see section 16 1 scecccccccccsccoeeee Select STOP at the RUN STOP switch of the QCPU and turn off the RESET L CLR switch and turn on the CPU sevcccececececeseees Connect the PC from which GX Developer has been started and the QCPU with the QCPU of the CPU No 1 using RS 232 cable or USB cable coccccccccccccscooes Write parameters and sequence programs to the CPU No 1 For CPU No 2 to No 4 select and write the applicable CPU according to the connection destination designation srvcescscesesesseses Get the RESET L CLR switch of the QCPU of the CPU No 1 in the RESET position 1 1 For systems with a PC CPU module install GX Developer Version 7 or later to the PC CPU module to connect the High Performance QCPU with GX Developer via the bus Refer to the GX Developer Version 7 or later operating manual for details 19 1 19 1 19 STARTING UP THE MULTIPLE CPU SYSTEM 1 Y RUN STOP switch setting of all CPUs v Cancellation of resetting of QCPU of CPU No 1 AA Status confirmation of all CPUs
413. lassification e Refer to SD4 for the storage status D1600 Diagnosis error n D1605 D1606 Stores the common information for the error code e Refer to SD5 to SD15 for the storage status Error common Error common SD5 SD1605 SD6 SD1606 SD7 SD1607 information information SD8 SD1608 SD9 SD1609 SD10 SD1610 D11 SD1611 SD12 SD1612 SD13 SD1613 D14 SD1614 SD15 gt SD1615 D1613 D1619 Stores the individual information for the error code Refer to D1620 SD16 to SD26 for the storage status D1621 Error individual Error individual SD16 SD1616 SD17 gt SD1617 SD18 gt SD1618 Siez information information SD19 gt SD1619 SD20 gt SD1620 SD21 gt SD1621 SEA SD22 gt SD1622 SD23 D1623 SD24 gt SD1624 D1623 SD25 gt SD1625 SD26 gt SD1626 D1624 D1625 D1626 D1650 Switch status CPU module e Stores the CPU module switch status S Each New switch status e Refer to SD200 for the storage status SD1650 SD200 END e Stores the CPU module s LED status CPU modu e Shows 0 when turned off 1 when turned on and 2 when S Each D1651 LED N 3 status ED status flicking END es e Refer to SD201 for the storage status SD1651 SD201 P l i natty E CPU modu Stores the CPU module operation status Refer to SD203 for S Each New ee operation status the storage status SD1653 gt SD203 END 1 Stores other system CPU module self diagnosis information and system information 2
414. lay This function connects to the GX Developer and monitors system configuration This function enables the front mounted LEDs to indicate the operating conditions of the CPU module Section 7 20 Section 7 21 LED display This function indicates the normal or abnormal operating conditions of the CPU module Section 7 21 1 Preference setting This function sets failure preferences to turn off LED displays Section 7 21 2 This function executes an interrupt program by fixed scan interrupt at 0 2ms to 1 0ms intervals High speed interrupt function i BE prog y P Section 7 22 using the interrupt pointer 149 Module service interval time read This function monitors the access interval time time between the access acceptance of the CPU module and the next access acceptance of the intelligent function module network module or peripheral device Section 7 23 7 FUNCTION MELSEC Q 7 2 Constant Scan 1 What is Constant Scan The scan time differs because the processing time differs depending on whether the instruction which is used in the sequence program is executed or not Constant scan is a function to execute the sequence program repeatedly while maintaining the scan time at a constant time Because I O refresh is made prior to execution of the sequence program use of the constant scan function helps maintain the I O refresh interval at a constant rate even if the sequence program execution time varies Scan time when c
415. lay operation results ON OFF information are saved even in the following cases e When power is switched from OFF to ON e When reset occurs The latch is backed up by the High Performance model QCPU battery Latch relays can be switched OFF by pertorming latch clear for the High Performance model QCPU However the latch relay set as Latch 2 Cannot clear with Latch Clear key at the Device tab screen in the PLC Parameter dialog box cannot be turned off even when the RESET L CLR switch remote latch clear is made for latch clear of it There are no restrictions on the number of contacts N O contacts N C contacts used in the program provided the program capacity is not exceeded No restrictions on the quantity used LO switches ON at X0 OFF to ON SET LO H The latch relay LO ON can only be used for internal QCPU processing and cannot be output externally K20 To 4 Y20 LO ON OFF information is output from the output module to an external destination L100 H lt 12047 Figure 10 6 Latch Relay 2 Procedure for external outputs Outputs Y are used to output Sequence program operation results to an external destination Internal relays M should be used when a latch memory backup is not required See Section 10 2 3 for details on internal relays 10 11 10 11 10 EXPLANTION OF DEVICES MELSEC Q 10 2 5 Anunciators F 1 Definition a Anunciators are internal relays used fo
416. le intelligent function module and output Y of the High Performance model QCPU is sent to the output module intelligent function module The I O refresh is executed before the sequence program operation starts During constant scan execution the I O refresh is executed after the constant scan delay time has elapsed The I O refresh is executed at each constant scan cycle 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 3 3 Automatic refresh of the intelligent function module When automatic refresh of intelligent function modules is set communication with the intelligent function modules of the designated data is performed Refer to the manual of the intelligent function modules for details on the automatic refresh setting of intelligent function modules 4 3 4 END processing This is a post processing to return the sequence program execution to step 0 after completing the whole sequence program operation processing once a When a refresh request is made from the network module refresh processing is performed b When the trace point of the sampling trace is set at every scan after END instruction execution the set device status is stored in the sampling trace area 1 When the constant scan function See Section 7 2 is set END processing time result is stored until wnen END processing is completed or the next scan starts 2 When executing the low speed execution type program the low sp
417. le register file Specifying the capacity and filename This section is used to specify the capacity of file registers and a filename of the file register file to be written onto the High Performance model QCPU QCPU side filename 1 The capacity of file registers can be specified from ZRO in the units of 1 point Note that the capacity is secured in 256 point units as a file If file registers cannot be assigned from ZRO this will result in a file register file that contains points from ZRO to the last point For example if the storing range of file registers are designated from ZR1000 to ZR1791 a file register file will contain points from ZRO to ZR1791 Specify file registers from ZRO because undefined data is from ZRO to ZR999 A check on the capacity of file registers is made in the units of 1k points The capacity of file registers should be specified from RO in the units of 1k points Storing a file register file in the High Performance model QCPU s memory This button is used to store a file register file with the specified number of points in the specified High Performance model QCPU s memory 10 49 10 EXPLANTION OF DEVICES 10 7 4 File register designation method 10 50 1 Block switching format MELSEC Q The block switching format designates the number of file register points in 32k point RO to R82767 units If multiple blocks are used switch to the block No to be used in the RSET instruction for further
418. led with another PLC 1 0 status outside the group cannot be taken Operating mode 1 0 sharing when using Multiple CPUs Error operation mode at the stop of PLC IV All CPUs can read all inputs I All station stop by stop error of PLCI All CPUs can read all outputs T Al station stop by stop error of PLC2 Refresh settings FM All station stop by stop error of PLC3 Change screens Setting gt F All station stop by stop error of PLC4 Send range for each PLC PLC side device PLC The auto rehesh area Caution Dev starting DOI Point Stet End Start End Not 1024 0000 OFF Do D1023 No 2 1024 0000 OoFF D1024 D2047 No 512 0000 OIFF bode D2559 Nod 512 000 OWFF D260 D3071 Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address Settings should be set as same when using multiple CPU The applicable device of head device is B M Y D W RZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check Qn H Parameter x PLC name PLC system PLC fle PLCRAS Device Program Boot fle SFC 1 0 assignment Cancel r120 Assignment Model name Points PLCNo 1 v Switch setting PLCNo 2 v PLCNo 3 v Detailed setting PLC Empty v Assigni
419. log box Setting unit 10 ms b The low speed execution type program is executed after the execution of the initial execution type program is completed To use the low speed execution type program specify the time that is longer than the sum of the initial scan time and the execution time of the low speed execution type program c When the initial scan time exceeds the set initial execution monitor time WDT ERROR error code 5000 occurs and High Performance model QCPU operation is stopped When the initial execution monitor time is designated there will be a 10 ms error in the count value Therefore a monitor time setting t of 10 ms will result in a WDT ERROR when the initial scan time is in the range 10 ms lt t lt 20 ms 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 2 2 Scan execution type program 1 Definition of scan execution type program a Scan execution type programs are executed once per scan beginning from the scan which follows execution of the initial execution type program b Set the execute type to scan at the Program tab screen in the PLC Parameter dialog box 2 Executing multiple scan execution type programs When multiple scan execution type programs are used they are executed one by one in ascending order set at the Program tab screen in the PLC Parameter dialog box 3 END processing The first scan execution type program is executed again
420. ls CPU Stores the local station numbers which are in error Device number b2 L3 L19 L35 L51 b6 L7 L23 L39 L55 b3 L4 L20 L36 L52 b1 L2 L18 L34 L50 b14 L15 L31 L47 L63 b13 L14 L30 L46 L62 b11 L12 L28 L44 L60 b9 L10 L26 L42 L58 b5 L6 L22 L38 L54 b4 L5 L21 137 153 b15 L16 L32 L48 L64 b12 L13 L29 L45 L61 b10 ak L27 L43 L59 SD1216 SD1217 SD1218 D1219 If a local station detects an error the bit corresponding to the station number becomes 1 Example When station 6 and 12 detect an error b5 and 11 in SD1216 become 1 and when SD1216 is monitored its value is 2080 820H L25 L41 L571 L24 L40 L56 Stores the local station numbers which contain mismatched parameters or of remote station numbers for which incorrect I O assignment has been made Bit b8 L9 L25 L41 L57 Device number b2 L3 L19 L35 L51 bo L1 L171 L33 L4g b6 L7 L23 L39 L55 b3 L4 L20 L36 L52 b1 L2 L18 L34 L50 b14 L15 L31 L47 L63 b13 L14 L30 L46 L62 b12 L13 L29 L45 L61 b11 L12 L28 L44 L60 b10 L11 L27 L43 L59 b9 L10 L26 L42 L58 b7 L8 L24 L40 L56 b5 L6 L22 L38 L54 b4 L5 L21 137 153 b15 L16 L32 L48 L64 D1220 D1221 D1222 D1223 If
421. macro conversion to the designated device is performed when the macro instruction is executed 2 Designating macro instruction argument devices Specify the devices transferred from sequence programs to macro registration ladders as macro instruction argument devices among the devices used in the ladders registered as macro with GX Developer 1 Designate devices that correspond to the macro argument devices used in the macro registration ladders in ascending order when using macro instructions in a sequence program Sequence program Ladder registered as a macro registration name MAX M MAX DO D1 RO gt vDo vDi MOV vpo vp2 Transfer to VD2 4K Transfer to VD1 Transfer to VDO lt vDo vD1 vov vD1 vp2 Name of ladder registered as a macro Actual sequence program executed at CPU gt Do p1 mov bo roH H lt Do pi mov n RO 1 1 With the macro instruction argument device VDO to VD9 can be used in one ladder registered as a macro instruction 2 The GX Developer read mode provides an option to view a program in macro instruction format Choose View Macro Instruction format display to view macro instructions View Online Diagnostics Tools Window He Comment Ctrl F5 Statement Ctrl F Note Ctrl F8 Alias Alt Ctl F6 Macro instruction format display lt m Change of macro instruction display Comment format gt Alias format display gt Toolbar
422. mages caused from special reasons regardless of Mitsubishi s expectations compensation for accidents and compensation for damages to products other than Mitsubishi products and other duties 5 Changes in product specifications The specifications given in the catalogs manuals or technical documents are subject to change without prior notice 6 Product application 1 In using the Mitsubishi MELSEC programmable logic controller the usage conditions shall be that the application will not lead to a major accident even if any problem or fault should occur in the programmable logic controller device and that backup and fail safe functions are systematically provided outside of the device for any problem or fault 2 The Mitsubishi general purpose programmable logic controller has been designed and manufactured for applications in general industries etc Thus applications in which the public could be affected such as in nuclear power plants and other power plants operated by respective power companies and applications in which a special quality assurance system is required such as for Railway companies or National Defense purposes shall be excluded from the programmable logic controller applications Note that even with these applications if the user approves that the application is to be limited and a special quality is not required application shall be possible When considering use in aircraft medical applications railways incineration a
423. match S Instruction execution Goes ON when all data conditions have been met for the Block comparison BKCMP instruction Selection of real number When SM707 is OFF real number instructions are processed at high speed instruction When it is ON real number instructions are processed processing type with high accuracy SHK nsiru tion Conditions priority Remains as originally set when OFF gt priority ranking Instruction flag Pattern priority CHK priorities updated when ON execution Speed oriented Accuracy oriented Other than during divided processing During divided processing Transmission Batch processing In processing of AD57 S1 goes ON when canvas S i processing Instruction Divided processing screen is divided for transfer i selection execution Divided transmission status In processing of AD57 S1 goes ON when screen is split S for transfer and goes OFF when split processing is Instruction completed execution Communication request to remote terminal module enabled Communication request to remote terminal module disabled Communication request registration area BUSY signal e Used to determine whether communications requests to S remote terminal modules connected to the AJ71PT32 S3 Instruction can be executed or not execution S Instruction execution During DI El f g During EIl ON when EIl instruction is being exec
424. mation at pot OE b15 to bi2b11 to b8b7 to b4b3 to QCPU Vacant Remote 1st module 2nd module F 3rd module SD280 CC Link error Error detection 4th module status The above module Nos n are in order of the head I O numbers However the one where parameter setting has not been made is not counted When Xn0 of the mounted CC Link module turns ON the bit of the corresponding station turns to 1 ON When either Xn1 or XnF of the mounted CC Link module turns OFF the bit of the corresponding station turns to 1 ON e Turns to 1 ON when communication between the mounted CC Link module and CPU module cannot be made b15 to b9 b8 to bO 8th 1st 8th 1st module module module module lt ln gt Information of Information of Stores the number of points currently set for X devices Stores the number of points currently set for Y devices Stores the number of points currently set for M devices Stores the number of points currently set for L devices Stores the number of points currently set for B devices Device Stores the number of points currently set for F devices allocation Same as S Initial parameter Stores the number of points currently set for SB devices contents Stores the number of points currently set for V devices Stores the number of points currently set for S devices Stores the number of points currentl
425. mber in the register becomes 1 Example When station 7 switches to STOP mode b6 in SD1212 becomes 1 and when D1212 is monitored its value is 64 40H App 52 APPENDICES MELSEC Q Special Register List Continue ACPU Special Conversion Special Register after Conversion Special Register for Modification D9216 SD1216 D9217 SD1217 D9218 SD1218 Local station error detect D9219 SD1219 D9220 SD1220 SD1222 Local station parameters non conforming remote I O station I O allocation error D9223 SD1223 SD1224 SD1225 SD1226 SD1227 SD1228 SD1231 Local station and remote I O station initial communications underway Local station and remote I O station error App 53 Meaning Stores conditions for up to numbers 1 to 16 Stores conditions for up to numbers Stores conditions Stores conditions for up to numbers 1 to 16 Stores conditions for up to numbers 17 to 32 Stores conditions for up to numbers 33 to 48 Stores conditions for up to numbers 49 to 64 Stores conditions for up to numbers 1 to 16 Stores conditions for up to numbers 17 to 32 Stores conditions for up to numbers 33 to 48 Stores conditions Stores conditions for up to numbers 1 to 16 Stores conditions for up to numbers Stores conditions for up to numbers Corresponding Detai
426. me of setup field Function description Enter the I O number for which enforced 1 Device ON OFF is to be set or for which enforced ON OFF is to be cancelled Displays the registration status of 2 Registration status displayed area p j registered enforced input and output i Displays the registration status loaded Load registration status from CPU module f Performed enforced ON OFF registration 4 Enforced ON OFF registration ve for specified devices registered devices 3 f f Cancels the enforced ON OFF for 5 Registration cancellation Cancels all registered enforced I O 6 Bulk registration cancellation 4 registrations 7 FUNCTION MELSEC Q 7 12 Writing in Program during High Performance model QGPU RUN When the High Performance model QCPU is in the RUN status you can write programs or files in any of the following steps e Writing data in the circuit mode during RUN see Section 7 12 1 e Writing data by using pointers during RUN see Section 7 12 2 e Writing a batch of files during RUN see Section 7 15 2 7 12 1 Writing data in the circuit mode during RUN 1 Writing data in the circuit mode during RUN Status a Writing data in the circuit mode during RUN is a function to write a program during the High Performance model QCPU RUN status b The program can be changed without stopping the process in High Performance model QCPU program by performing writing data in the cir
427. me period for initial execution type programs If multiple initial execution type programs are executed it is the execution time period in which all those programs are executed When an interrupt program fixed scan execution type program is executed while an initial execution type program is running the execution time of the interrupt program fixed scan execution type program will be added to the initial execution type program b The High Performance model QCPU measures the initial scan time and stores the result in special registers SD522 SD523 1 The initial scan time can be checked by monitoring the SD522 and SD523 special registers sp522 s0523 ior less than 1 ms initial scan time unit ws gt Stores the initial scan time in 1 ms units If the SD522 value is 3 and the SD523 value is 400 the initial scan time is 3 4 ms 1 The accuracy of the initial scan time stored at the special registers is 0 1 ms The initial scan time count will continue even if a watchdog time reset instruction WDT is executed at the sequence program 5 Initial execution monitor time a The execution period of the initial execution type program can be monitored by this timer The default value is not set When monitoring the execution time of the initial execution type program designate the initial execution monitor time within the range of 10 to 2000 ms range at the PLC RAS tab screen in the PLC Parameter dia
428. med the clock SM1022 User tuming clack starts with off No 2 e Set the intervals of on off by DUTY instruction User timing clock M9024 SM1024 User timing clock No 4 Clock data set OFF Ignored e Writes clock data from SD1025 to SD1028 to the clock M9025 SM1025 request ON L r anest oresentusgd element after the END instruction is executed during the q yest p scan in which SM1025 has changed from off to on OFF No error M9026 SM1026 Clock data error ON Error e Switched on by clock data SD1025 to SD1028 error Clock data is read from SD1025 to SD1028 and month Q3A M9027 SM1027 se data nite tae day hour minute and minute are indicated on the CPU Q4A play spay module front LED display Q4AR Clock data read OFF Ignored e Reads clock data to SD1025 to SD1028 in BCD when M9028 SM1028 e ON Read request SD1028 is on ial p jaa p gu po M9016 gt ae Es The SM1029 relay is turned on using a sequence program to process all data communication requests Batch processing OFF Batch processing not ge during one scan in the END processing of that f PAE M9029 SM1029 of d ta A gt conducted The batch processing of the data communication communications ON Batch processing f i requests conducted requests can be turned on and off during running e The default is OFF processed one at a time for each END processing in the order in which data communication request
429. med when the High Performance model QCPU is in RUN status b The latch range for the device set at the Device tab screen in the PLC Parameter dialog box includes a range that makes latch clear RESET L CLR switch valid or invalid Remote latch clear operation is reset in the range of latch clear valid setting c Devices that are not latched are cleared when the remote latch clear is performed The data in the failure history storage memory of the High Performance model QCPU will also be cleared by a remote latch clear operation 7 FUNCTION MELSEC Q 7 6 5 Relationship of the remote operation and High Performance model QCPU RUN STOP switch 1 Relationship of the Remote Operation and High Performance model QCPU Switch The High Performance model QCPU operation status is as follows with the combination of remote operations to RUN STOP switch Remote operation RUN 1 STOP PAUSE RESET Latch clear Cannot Cannot STOP PAUSE ak A operate operate STOP STOP STOP STOP RESET Latch clear x1 When performing the operation with remote RUN contact RUN PAUSE contact must be set at the PLC system tab screen in the PLC Parameter dialog box x2 When performing the operation with remote PAUSE contact RUN PAUSE contact must be set at the PLC system tab screen in the PLC Parameter dialog box In addition the remote PAUSE enable coil SM206 must be set ON 3 Remote reset enable must be set at
430. ment error is 10 ms Therefore a WDT setting t of 10 ms will result in a WDT ERROR if the scan time is in the following range 10 ms lt t lt 20 ms Use the GX Developer s Program Monitor List to check the execution time of a program being executed See Section 7 11 1 for details on the GX Developer s Program Monitor List 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 2 3 Low speed execution type program 1 Definition of low speed execution type program Low speed execution type programs are executed only during constant scanning surplus time or during the period designated for low speed program execution time a b c 1 3 For a constant scan time with enhanced control accuracy designate a constant scan time setting at the PLC RAS tab screen in the PLC Parameter Setting range 0 5 to 2000 ms setting unit 0 5 ms To secure execution time for low speed execution type programs at each scan designate a low speed program execution time in the PLC RAS tab screen the PLC Parameter Setting range 1 to 2000 ms setting unit 1 ms In order to execute a low speed execution type program set either the constant scan time or low speed program execution time Set the execute type of the low speed program to low speed in the program of the PLC parameters The low speed execution type program is used for programs which do not require execution in each scan
431. mmunication at a speed of 12Mbps is allowed through the USB 26k step program transfer time Q25HCPU USB E 12 Q25HCPU RS 232 30 Q2ASHCPU 86 A2USHCPU S1 94 0 10 20 30 40 50 60 70 80 90 100 Unit s 5 AnS series I O module or special function module are available For Q series if an appropriate module is not available the AnS series I O module or special function module can also be used for the High Performance model QCPU through the use of the QA1S65B QA1S68B extension base unit 1 OVERVIEW MELSEC Q 6 Saved space by a reduction in size The installation space for Q series has been reduced by approx 60 of the space for AnS series Comparison of installation space MELSEC ASHe ol RUN ICLR RUN ERROR RESET RESET MITSUBISI kA z3 MELSEG Atsezp POWER Q S Atsyso E _ BR A ue E Ees MITSUBISHI i Zin MODE RUN ERR USER BAT BOOT i 0 0 0 T T T T 2 2 F 2 98mm 3 3 3 3 3 86 4 4 4 3 pi lt PULL 3 b 5 inch a T T T T O E 8 g g USB 9 9 9 ge A A nN A Y B B B B Cc Cc C C PULL D D D D MITSUBISHI F F F F F F F ra a 5 Slot Basic Base Unit 245mm 9 65inch depth 98mm 3 86inch gt 8 Slot Basic Base Unit 328mm 12 92inch 12 Slot Basic Base U
432. module error detection status On When a self diagnosis error that does not stop the operation except for battery error is detected Set the operation error set mode to continue in the parameter mode PLC RAS setting Normal When an error that stops the operation is detected When automatic write to standard ROM is complete normally BOOT LED also flickers The detection status for the CHK instruction or annunciator F status is indicated On When an error is detected with the CHK instruction or when the annunciator is turned on Off Normal Flicker _ When the latch clear is executed Indicates the CPU module and Memory card battery status On When a battery error is detected due to low battery voltage Off Normal Indicates the execution status of the boot operation On When the execution is complete Off When not executed Fricker When automatic write to standard ROM is complete normally ERR LED also flickers 7 FUNCTION MELSEC Q 2 Method to turn off the LED The LED that is on can be turned off by the following operation Except for the reset operation Method to Turn LED Off Applicable LED ede err USER BaT Boor ERR USER BAT BOOT Executing the LEDR instruction after resolving the cause of error After the cause of error is resolved cancel the error by operating the special relay SM50 and special register SD50 x Only for the operation continue errors Turn off
433. module switch setting and error time output mode setting the PLC must be powered off then on again ON to OFF to ON or the High Performance model QCPU must be reset 2 If any of the I O modules other than the 16 point modules fails without I O assignment being made using GX Developer the I O numbers after that module may change leading to a malfunction Therefore it is recommended to make I O assignment using GX Developer 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 6 2 Concept of I O assignment using GX Developer 1 I O assignment for each slot Type module type Points number of occupied I O points and Start head I O number can be designated individually for each slot of the base unit For example to change the number of occupied I O points of the designated slot only the number of occupied I O points can be designated The items other than designated are set to the status where the base unit is installed The I O assignment is conducted at the I O assignment tab screen in the PLC Parameter dialog box a b c d e Qn H Parameter PLC name PLC system PLC file PLC RAS Devi vo ema oil aT Switch setting Detailed setting Assigning the 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Base setting Auto C Detail Ext Eae Ezt Bas2 8
434. module verify error e O module verify check is executed also to remo V O station modules If normal status is restored clear is not performed Therefore it is required to perform clear by user program When one of FO to 255 FO to 2047 for AuA and AnU is turned on by 1 is added to the contents of SD63 When or instruction is executed 1 is subtracted from the contents of SD63 If the INDICATOR RESET switch is provided to the CPU module pressing the switch can execute the same processing Quantity which has been turned on by is stored into SD63 in BIN code The value of SD63 is maximum 8 When any of FO to 2047 is turned on by SET F the annunciator numbers F numbers that are turned on in order are registered into D9125 to D9132 The F number turned off by is erased from any of D9125 to D9132 and the F numbers stored after the erased F number are shifted to the preceding registerers By executing instruction the contents of SD64 to SD71 are shifted upward by one For A3N A3HCPU it can be performed by use of INDICATOR RESET switch on front of CPU module When there are 8 annunciator detections the 9th one is not stored into SD64 to SD71 even if detected SET SET SET RST SET SET SET SETSET SET SET F50 F25 F99 F25 F15 F70 F65 F38 F110 F151 F210 LEDR WOW WOW WON 50 50 50 50 50 50 50 50 50 50 50 99 1 2 3 2 3 4 5 6 7 8 8 8 50 50 50 50 50 50 50
435. modules and interrupt modules to the system select Type at the I O assignment tab screen in advance For details see Section 7 7 Error time output mode setting The output mode at error can be set to the output module I O module or intelligent function module Make this setting after selecting Type in I O assignment For details see Section 7 8 Setting the switch of intelligent function modules To set the switch of the intelligent function module select Type at the I O assignment tab screen in advance For details see Section 7 10 Setting outputs during High Performance model QCPU error To set the output status retain clear of the output modules and intelligent function modules when the High Performance model QCPU stops the operation due to a stop error select Type at the I O assignment tab screen in advance For details see Section 7 8 Setting High Performance model QCPU operation during a hardware error of intelligent function modules To set the High Performance model QCPU operation continue stop during a hardware error of an intelligent function module select Type at the I O assignment tab screen in advance For details see Section 7 9 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 1 The I O assignment is necessary for changing the response time of the input modules and the switch of intelligent function modules For the I O assignment input module response time setting intelligent function
436. mon information ON if diagnosis results show error occurrence Includes when an annunciator is ON and when an error is detected with CHK instruction Stays ON subsequently even if normal operations restored Comes ON when an error occurs as a result of self diagnosis Stays ON subsequently even if normal operations restored When SM0 is ON ON if there is error common information When SM0 is ON ON if there is error individual information SM50 Error reset OFF gt ON Error reset Conducts error reset Operon U e See section 11 3 for further information SM51 Battery low latch AC DC DOWN detection MINI link errors Operation Errors Blown fuse detection V O module verification error Annunciator detection CHK detection Startup of watchdog timer for step transition Enabled only when SFC program exists App 2 OFF Normal Normal Battery low AC DC DOWN not detected AC DC DOWN detected Normal Error Normal Operation error e Comes ON even if there is only one output module with a blown fuse and remains ON even after return to normal Error Module with blown fuse Blown fuse status is checked even for remote I O station Normal Error Not detected Detected Not detected Detected Not started watchdog timer reset Started watchdog timer started ON if battery voltage at CPU module or memory card drop
437. mory Host CPU s operation information area CPU shared memory Host CPU s operation information area System area System area Automatic refresh area for the use of No 1 machine writing 2 Read with FROM instruction or UL G Data written with the S TO instruction gt 1 Writing performed with the S TO instruction Sequence program S TO instruction execution Sequence program FROM instruction execution CPU No 1 processing 1 Data is written into the user s free area on the CPU No 1 with the S TO instruction CPU No 2 processing 2 An FROM instruction or the intelligent function module device ULAGL is used to read data from the free user area of the CPU No 1 to the designated device Refer to the following manual for further details on the S TO and FROM instructions QCPU Q mode QnACPU Programming Manual Common Instructions POINT The Motion CPU cannot use the S TO instruction FROM instruction or intelligent function module device Use automatic refresh of the CPU shared memory or communication dedicated instructions between multiple CPUs to communicate between the High Performance model QCPU and Motion CPU For the accessing method from the PC CPU module to the CPU shared memory refer to the manual of the PC CPU module command between multiple CPUs 16 9 16
438. multiple GX Developers connected to the network However when enforced ON OFF is registered in the same device from multiple GX Developers it will assume the most recent registered ON OFF status Owing to this there are cases when the GX Developer executed first will display different ON OFF information to the CPU module ON OFF information When performing enforced ON OFF from multiple GX Developers ensure that the most up to date information is set with the Load Registration Status switch before executing the enforced ON OFF procedure 7 FUNCTION MELSEC Q 2 Operation procedure The operation procedure is explained below a Register enforced ON OFF for the specified device Online Debug Enforced I O Registration Cancellation It is possible to perform enforced ON or enforced OFF for a specified device by selecting Enforced ON Registration or Enforced OFF Registration after the device has been specified on the Enforced I O Registration Cancellation setup screen Registration forced ON OFF x Device Set forced ON Cancel it 4 n e ee Set forced OFF 5 wo Device ON OFF No Device ON OFF al 17 2 18 3 19 4 20 5 21 6 22 X 23 2 lt 8 24 9 25 10 26 FL 27 12 28 13 29 14 30 15 31 16 32 NX 3 gt Update status Clear all Close 6 b Descriptions of the fields to set up are provided below Na
439. mum data No 2 aE ae CPU No 4 reception 2 k words cpu No 3 transmission data No 2 data No 3 CPU No 3 transmission data No 4 CPU No 1 X transmission data No 3 CPU No 4 CPU No 2 reception CPU No 4 transmission data No 3 data No 1 CPU No 3 reception CPU No 4 transmission data No 3 data No 2 Maximum CPU No 4 reception 2 k words cpy No 4 transmission data No 3 data No 3 CPU No 4 transmission data No 4 pee No 1 ransmission data No 4 CPU No 2 reception data No 4 Q CPU No 3 reception data No 4 r N CPU No 4 reception data No 4 CPU No 1 Writing during the END process CPU shared memory A CPU No 1 transmission data No 1 CPU No 1 transmission data No 2 CPU No 1 Maximum transmission 2 k words data No 3 CPU No 1 transmission data No 4 User s free area 3 Precautions a Device ranges set for the use of the automatic refresh function cannot be set in local devices If the device ranges set for the use of the automatic refresh function are set in local devices the settings will not be reflected back onto the refresh data Do not set devices for the use of the automatic refresh function in the file register of all programs If devices for the use of the automatic refresh function are set in the file
440. n refer to the following manuals QCPU Q mode QnACPU Programming Manual Common Instructions 2 For the details of the buffer memory of the special function module refer to the manual of the special function module being used 8 3 3 Communication using the intelligent function module device 1 Intelligent function module device The intelligent function module device is the buffer memory of the special function module represented as a device of High Performance model QCPU in High Performance model QCPU programs It enables reading data stored in the buffer memory of the special function module to be read or writing data to the buffer memory of the special function module 2 Difference from the FROM TO instruction The intelligent function module device can be handled as a device of High Performance model QCPU enabling the processing of data read from the special function module with one instruction This saves the number of steps in the entire program The processing speed is the total of the instruction execution time and the access time to from the special function modules When reading and processing the data of the special function module frequently in the program use the FROM instruction to read the data at one point in the program and store and process it in a data register instead of using the intelligent function module device every time Otherwise the intelligent function module device accesses to the special function m
441. n as ON for 1 scan ON RUN status except when the key switch is at STOP SM1038 only after RUN Geeks elt scan position and turned off and on Switched off if the key switch is in STOP position SM1038 is on for one scan RUN flag After On scan only and SM10339 is off for one scan only if the key switch eat tl Daca sea scan only SM206 PAUSE enable e When RUN key switch is at PAUSE position or remote coil ON_ PAUSE enabled i USE status OFF PAUSE not in effect pause contact has turned on and if SM204 is on PAUSE SM204 mode is set and SM206 is turned on contact ON STOP in effect switch is in STOP position OFF Sampling trace in e Turned on upon completion of sampling trace performed Sampling trace rogress the number of times preset by parameter after STRA alia heey apae ON Sarain trace instruction is executed completed Reset when STRAR instruction is executed Turning on off SM803 can execute STRA STRAR instruction OFF gt ON STRA SM803 is forcibly turned on off by a peripheral device Same as execution When switched from OFF to ON STRA instruction ON OFF STRAR When switched from ON to OFF STRAR instruction Same as execution The value stored in SD1044 is used as the condition for the sampling trace At scanning at time Time 10 ms unit e The SM1015 relay is turned on to reset the WDT when Watchdog timer OFF Does not reset WDT the ZCOM instruction and data communication request SM1044 WDT reset
442. n is executed the special function module continues its processing and suspends processing of the FROM TO instruction until the processing is completed As a result the scan time becomes longer by the period to wait the completion of the processing of the special function module 2 The following are the special function modules which suspend the FROM TO instruction e A1S63ADA A1S66ADA e A1SD61 A1SD62 A1SD62D A1SD62E e A1SD70 A1SD71 S2 A1SD71 S7 e A1SJ71PT32 S3 A1SJ71T32 S3 A1SD51S e A1SJ711ID1 R4 A1SJ71ID2 R4 2 Countermeasures against the effects of quicker access to the special function module To use a special function module with High Performance model QCPU adjust the execution time with SM415 2n ms clock and SD415 2n ms clock setting The initial value of SD415 is 30 When SD415 is used for interlock of the FROM TO instruction the FROM TO instruction is executed at every 120 ms SM400 MOVP K30 sD415 SM415 FROMP HO Ki DO Kt 1 To change the clock value of SM415 store the new value in SD415 2 For details of SM415 see appendix 1 For details of SD415 see appendix 2 8 9 9 PARAMETER 9 PARAMETER 1 2 MELSEC Q Parameter types and setting a The High Performance model QCPU has two different parameter types the PLC parameters set for a system that uses the PLC independently and the network parameters set for use of MELSECNET H Ethernet or CC
443. n switching could not be executed normally S Error SM1590 ON Switching if the network module had detected a network fault and the network module i cee ocurrs unsuccessful issued a switching request to the host CPU module App 19 App 19 APPENDICES MELSEC Q Special Relay List 11 For redundant system Other system CPU information 1 for Q4AR only SM1600 to SM1650 only valid for the CPU redundant system backup mode so they cannot be refreshed during the separate mode Either the backup mode or the separate mode is valid for the SM4651 to SM1699 SM1600 to SM1699 are all turned off for standalone system Set by Number Name Meaning Explanation When Set OFF No error e Turns on if a error occurs in the diagnosis results s SM1600 Diagnosis error i Including external diagnosis ON Error Each END e Remains on even if returns to normal thereafter OFE uo salt e Turns on when an error occurs in the self diagnosis Self diagnosis error diagnosis etter results ON Self diagnosis S ae END Siror e Remains on even if returns to normal thereafter OFF No error Error common oo e Turns on when there is error common information and the information SM1600 is on Eih END ON Error common information OFF No error ane individual o i TRN A Error individual information urns on when there is error individual information and the S information mio PRE SM1600 is on Each END ON Error individual information
444. n type program the current value will be added to the low speed scan time when the OUT T instruction is executed See Section 4 3 2 for details on the low speed scan time g If two timers are used the ON OFF ladders should be created as shown below TO K10 T1 1 second measurement following TO ON T1 K10 TO 1 second measurement when T1 ON TO lt MO ON OFF repeated every 1 second 10 23 10 23 10 EXPLANTION OF DEVICES MELSEC Q 10 2 11 Counters C Counters are up timing types with the contact being switched ON when the count value equals the set value count out condition There are two counter types counters which count the number of input condition start ups leading edges in sequence programs and counters which count the number of interrupt factor occurrences 1 Definition A counter is a device which counts the number of input condition leading edges in sequence programs 2 Count processing a When and OUT C t instruction is executed the following counter processing occurs coil ON OFF current value update count value 1 and contact ON OFF Counter current value update and contact ON OFF processing are not performed at END processing Ladder example XO K10 clio Processing at OUT CO Instruction X0 OFF to ON END OUT CO END Sequence _ program Processing content Coil ON OFF Current value update Contact ON OFF b The current value update count value 1 i
445. nal expression of floating decimal point data is shown and explained below b31 b30 N b23 b22 b16 b15 bO N i J Y Yy b23 to b30 bO to b22 Characteristic Mantissa b31 Mantissa code e Mantissa code The mantissa code is expressed at b31 as follows 0 Positive 1 Negative e Characteristic The n of 2n is expressed in various ways at b23 to b30 depending on the b23 to b30 BIN value b23 to b30 FFH FEH FDH 81H 80H 7FH 7EH 02H O1H OOH Non Non n numeric 127 126 2 1 0 1 125 126 numeric e Mantissa For a binary value of 1 XXXXXxX the XXXXXX portion of the value is expressed at bO to b22 23 bits 3 Calculation examples Calculation examples are shown below the nnnnn X indicates an X system data expression a Storing 10 1 Oho gt 1 01 0 o gt 1 01000 x 28 2 Mantissa code Positive to 0 Characteristic 3 to 824 to 10000010 2 Mantissa 010 00000 00000 00000 00000 2 Therefore the data expression will be 41200000 as shown below Code Characteristic Mantissa 0 10000010 01000000000000000000000 3 V e S S y k V y EK y EA V Bk y 4 y J l l l l l l l l 4 1 2 0 0 0 0 0 4 50 4 50 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q b Storing 0 75 0 75 10 gt 0 11 2 1 100 x2 p Mantissa code Positive to 0 Characteristic 1 to 7En to 01111110 2 Mantissa 100 00000 00000 00000 00000 z Therefore the data exp
446. nced Resets watchdog timer when it goes OFF S Goes ON if even one annunciator F goes ON APPENDICES MELSEC Q Special Relay List 2 System information aries abe Se LED OFF i When this relay goes from OFF to ON the LEDs ehiepe OER SONS LED OFT corresponding to the individual bits at SD202 go off SM203 STOP contact STOP status Goes ON at STOP status aan M9042 S Status SM204 PAUSE contact PAUSE status Goes ON at PAUSE status change M9041 SM205 ster ON STEP RUN status Goes ON at STEP RUN status S Statis M9054 contact Ea PAUSE enable OFF PAUSE disabled PAUSE status is entered if this relay is ON when the mooo coil ON PAUSE enabled remote PAUSE contact goes ON Device test OFF Device test not yet request vi y Comes ON when the device test mode is executed on executed S Request Remote acceptance i GX Developer status ON Device test executed k When this relay goes from OFF to ON clock data being Glockgata eet OPE noted stored from SD210 to SD213 after execution of END U M9025 request ON Set request i an instruction for changed scan is written to the clock device OFF No error ON when error is generated in clock data SD210 to sitll huaswenmenalied D213 value and OFF if no error is detected Si Requesh Moree Displays clock data as month day hour minute and SA Clock data She hit second at the LED display at front of CPU module M9027 play
447. nd fuel devices manned transport devices equipment for recreation and amusement and safety devices in which human life or assets could be greatly affected and for which a particularly high reliability is required in terms of safety and control system please consult with Mitsubishi and discuss the required specifications Microsoft Windows Microsoft Windows NT are registered trademarks of Microsoft Corporation in the United States and other countries Pentium is a registered trademark of Intel Corporation in the United States and other countries Ethernet is a registered trademark of Xerox Co Ltd in the United States Other company and product names herein are either trademarks or registered trademarks of their respective owners afa MITSUBISHI ELECTRIC HEADQUARTERS EUROPEAN REPRESENTATIVES EUROPEAN REPRESENTATIVES EUROPEAN REPRESENTATIVES MITSUBISHI ELECTRIC EUROPE B V German Branch Gothaer Stra e 8 D 40880 Ratingen Phone 49 0 2102 486 0 Fax 49 0 2102 486 1120 e mail megfamail meg mee com EUROPE MITSUBISHI ELECTRIC FRANCE EUROPE B V French Branch 25 Boulevard des Bouvets F 92741 Nanterre Cedex Phone 33 1 55 68 55 68 Fax 33 1 55 68 56 85 e mail factory automation framee com MITSUBISHI ELECTRIC IRELAND EUROPE B V Irish Branch Westgate Business Park Ballymount IRL Dublin 24 Phone 353 0 1 419 88 00 Fax 353 0 1 419 88 90 e mail
448. nds listed below e FROM command e Commands that use intelligent function module devices UL GL 0 2 3 4 5 6 7 lt Slot No Input module Input module Power supply module CPU module No 1 function module Output module Intelligent function module Intelligent function module Output module Intelligent CPU module No 2 Control CPU settings CPU No 1 CPU No 1 CPU No 2 CPU No 2 Readable from the buffer memory with the FROM command and UD GO Readable from the buffer memory with the FROM command and UD GO It is not possible to write in the buffer memory of intelligent function modules being controlled by other CPUs e TO instruction e Intelligent function module devices UD GD e Intelligent function modules dedicated commands An SP UNIT ERROR error code 2116 will be triggered if an attempt to write in the intelligent function module controlled by other CPUs is carried out 3 4 7 lt Slot No Input module Input module o Output module gt Output module ro gt a 2 3 wn pes D z io a CPU module No 2 Intelligent function module Intelligent function module Intelligent function module CPU module No 1 3 5 E S X Control CPU 2 2 settings gt gt gt gt gt A oO ae A i O O O O O Not writable write in the buffer memory with the TO command and UD GO Not writable write in
449. ne CS file creating Close 3 PERFORMANCE SPECIFICATION MELSEC Q 3 Performance Specification The table below shows the performance specifications of the CPU module Performance Specifications oe Q02CPU QO2HCPU QO6HCPU Q12HCPU Q25HCPU aia Control method Repetitive operation of stored program Direct I O is possible by I O control mode Refresh mode direct I O specification DXO DYO Relay symbol language logic symbolic language oie a A MELSAP3 SFC MELSAP L Function block q guag structured text ST Processing speed 0 079 us 0 034 us S Sequence instruction ao DO D1 0 237 us 0 102 us er 381 Total number of instructions pe sake k f F otanumoero excluding intelligent function module dedicated instructions Te Constant scan ms Function for setting the scan timer to fixed 0 5 to 2000 configurable in increments of 0 5 ms settings Program 2 Program memory 28k step 60k step 124k step 252k step See Section 6 2 capacity Drive 0 Memory card RAM Drive 1 Set parameter values to specify Capacity of loading memory cards 2Mbyte max See Section 6 5 Memory card ROM Installed memory card capacity See Section 6 5 Drive 2 Flash card 4 Mbyte max ATA card 32 Mbyte max Standard RAM x Drive 3 64kbyte 128kbyte 5 256kbyte 3 See Section 6 4 Pra RON 112 kbyte 240 kbyte 496 kbyte 1008 kbyte See Section 6 3 R shared memory 8 kbyte See Section 14 2
450. ne program Control by separating into multiple programs Program A Control contents A Program B Control contents B Control contents n Store by separating the code according to control contents 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 1 Execute Type Setting a To execute several programs specify a Program name and Execute type of each program at the Program tab screen in the PLC Parameter dialog box High Performance model QCPU will execute the selected programs in the order of specified Execute Type setting PLC name PLC system PLC file PLC RAS Device 6 1 Program name This column is used to specify a program name file name of the program to be executed by High Performance model QCPU 2 Execute type This column is used to specify the execute type of the program defined in the Program name column See Section b 3 Fixed scan This column is used to specify time intervals at which to an execution type program The Fixed Scan setting range is determined by the units of time intervals as follows In the unit ms 0 5 to 999 5 e In the unit s 1 to 60 4 In units This column is used to specify the units ms s of fixed scan intervals 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 5 File Use Setting Sets whether to use the data file register initial d
451. nfiguration the I O numbers communications between CPU modules and communications between I O modules and intelligent function modules Maintenance and Inspection Generic Terms and Abbreviations The following abbreviations and general names for Q02CPU QO2HCPU QO6HCPU Q12HCPU and Q25HCPU are used in the manual Generic Term Abbreviation High Performance model QCPU Description General name for Q02CPU QO2HCPU QO6HCPU Q12HCPU and Q25HCPU modules Q Series Abbreviation for Mitsubishi MELSEC Q Series Programmable Logic Controller AnS Series Abbreviation for small types of Mitsubishi MELSEC A Series Programmable Logic Controller GX Developer General product name for SWnD5C GPPW E SWnD5C GPPW A E SWnD5C GPPW V E and SWnD5C GPPW VA E For QCPU version 4 or later can be used General name for Q33B Q35B Q38B and Q312B type main base units that accept High Performance model QCPU Q series power supply module input output modules and intelligent function modules General name for Q32SB Q33SB and Q35SB type slim type main base units that accept High Performance model QCPU slim type power supply module input output modules and intelligent function modules General name for Q52B and Q55B that accept the Q Series I O and intelligent function modules General name for Q63B Q65B Q68B and Q612B type extension base unit with Q Series power supply module I O module intelligent function mod
452. ng at the END FEND With ladder mode the instructions in a ladder block are executed in order beginning from left bus to the right bus When one ladder block is completed the next downward ladder block will be executed Ladder mode List mode Left to right LD oo I 1 2 7 8 9 AND XO X1 X5 X6 X7 10 21D H m imm Y 10 AND Z a 5 F i ORB Top to order beginning OR FHH AND bottom 6 from step 0 to X the END 11 instruction 10 CEND H OMOANDORWN O oO Number 1 to 11 indicate the operating order of the sequence program Step No Fig 4 2 Sequence Program Operation 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 1 1 Main routine program 1 Definition of main routine program a Amain routine program begins from step 0 and ends at the END FEND instruction 1 b Inthe main routine program the instructions are executed from step 0 to the END FEND 1 If only one program is executed the program is operated from step 0 again after the END FEND instruction is executed and the END instruction is processed Step0 Program execution Main routine l program Returns to step 0 when only one Speise bai seetenceesee a program is being executed END FEND END FEND END processing 2 If multiple programs are being executed each of them will be operated according to the designated execution conditions after the END FEND instruction is pro
453. ng each END processing Initial Set only during initial processing when power supply is turned ON or when going from STOP to RUN Status change Set only when there is a change in status Error Set when error occurs Instruction execution Set when instruction is executed Request Set only when there is a user request through SM etc e Indicates corresponding special register in ACPU D9 _ _ _ Change and notation when there has been a change in contents e New indicates the item that has been newly added to the High Performance model QCPU QnACPU e Indicates the corresponding CPU module type name Rem Can be applied to all CPU types and MELSECNET H remote I O modules Can be applied to all types of CPU module Corresponding CPU QCPU Can be applied to High Performance model QCPU QnA Can be applied to QnA series and Q2ASCPU series Remote Can be applied to the MELSECNET H remote I O modules Each CPU type name Can be applied only to the specific CPU e g Q4ARCPU Q3ACPU Set by When set For details on the following items refer to the following manuals e Networks For Q Corresponding MELSECNET H Network System Reference Manual PLC to PLC network e For Q Corresponding MELSECNET H Network System Reference Manual Remote I O network e For QnA Q4AR MELSECNET 10 Network System Reference Manual e SFC QCPU Q mode QnACPU Programming Manual SFC 1 SD1200 to SD1255 are used for QnACPU These relays are
454. ng the 1 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Base setting Base model name Power model name Extension cable 8 Slot Default 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Error time output mode 1 0 response Control PLC time ea PLC No 2 PLC No 3 PLC Empty KIKIKI PLC No 1 v PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 PLC No 1 x 7 settings should be set as same when using multiple PLC 19 8 MELSEC Q The multiple CPU settings and I O Assignment Setting data are read and written into the specified project when OK is selected Confirming the multiple CPU settings When changing the CPU devices in the Refresh settings enter the device number after it has been changed indicates the item can be changed Confirm the I O Assignment and standard settings on the I O Allocation Window Select Detailed Settings to display the detailed setting window Confirm the control CPU settings 19 8 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 2 Setup of parameters other than the multiple CPU system settings
455. ng the leading edge OFF to ON in programs configured using index modification Ladder example SM400 MOV KO Z1 Index register Z1 clear F F FOR K10 H Repetition 10 times designation XxX0Z1 VOZ1 z e MOZ1 MOZ1 is turned ON 1 scan at leading edge of X0Z1 M400 INC Z1 jH Increment Index Register Z1 1 NEXT Return to FOR instruction Timing chart ON x0 OFF l f ON When Z1 0 VO OFF ON MO OFF 1 Scan ON X1 OFF ON 1 scan ON at X1 leading edge When Z1 1 V1 OFF ON M1 OFF f 1 Scan 1 The ON OFF information for X0Z1 is stored at the VOZ1 edge relay For example the XO ON OFF information is stored at VO and the X1 ON OFF information is stored at V1 10 16 10 16 10 EXPLANTION OF DEVICES MELSEC Q 10 2 7 Link relays B 1 Definition a A link relay is the High Performance model QCPU relay used to refresh the High Performance model QCPU from the MELSECNET H network module s link relay LB and to refresh the MELSECNET H network module s link relay LB from the High Performance model QCPU data High Performance model QCPU MELSECNET H network module Link relay Link relay BO LBO j Link refresh i Link refresh setting range Internal relays or latch relays can be used for data ranges not used by the MELSECNET H network system e Range where no link relay latch is performed Internal relay e Range whe
456. ng valve monitoring timer and the f number at setting time out App 49 Head I O number of Corresponding Detail etails CPU Sets the time check time of the data link instructions ZNRD ZNWR for the MELSECNET 10 1 s to 65535 s 1 to 65535 1s 10 s If 0 has been set default 10 s is applied For details refer to the manual of each microcomputer program package Detailed error Self diagnosis g Stores the detail code of cause of an instruction error code detailed error code Stores the first two digits of the head I O number of the I O module which will be dismounted mounted online in BIN value Example Input module X2F0 H2F The DIP switch information of the CPU module is stored in the following format 0 OFF 1 ON b15 b5 b4 b3 b2 b1 bO D9095 e Output module numbers in units of 16 points of which fuses have blown are entered in bit pattern Preset output unit numbers when parameter setting has been performed b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 bd SD1100 0 Olt lolojoltyofojojo vco v80 D1101 0 0 0 0 0 0 0 0 0 0 0 D1107 0 9 9 yO O 9 0 0 0 0 BO e fuse blow e Fuse blow check is executed also to module of remote I O station If normal status is restored clear is not performed Therefore it is required to perform clear by user program he output e Set the set value of
457. nit 489mm 17 30inch 7 Connection of up to seven extension base units a The High Performance model QCPU can connect to seven extension base units eight base units including the main and accept up to 64 modules b The overall distance of the extension cables is up to 13 2m to ensure high degree of extension base unit arrangement 8 Memory extension by memory card The High Performance model QCPU is provided with a memory card installation connector to which a memory card of 32 Mbyte max can be connected 32 Mbyte is available when a ATA card is used When a memory card of large capacity is installed a large capacity of file can be controlled comments to all data devices can be set up and the programs in the past can be stored in the memory as they are in the form of the corrected histories If amemory card is not installed a program can be stored onto the standard ROM built in the CPU module and file registers can be handled by the standard RAM e The number of file registers that can be handled changes depending on the function version serial number of the CPU module used CPU Module Type Number of File Registers Q02CPU 32k points Q02HCPU First 5 digits of serial number are 04011 or earlier 32k points QO6HCPU First 5 digits of serial number are 04012 or later 64k points Q12HCPU First 5 digits of serial number are 02091 or earlier 32k points Q25HCPU First 5 digits of serial number are 0
458. nition The network No designation device is used to designate the network No in data link instructions 2 Designating network No designation device The network No designation device is designated in the data link instruction as shown below Hienon o o H gt Network No designation device n network No gt Instruction name gt Network No designation instruction For details on data link instructions refer to the Q Corresponding MELSECNET H Network System Reference Manual 10 59 10 59 10 EXPLANTION OF DEVICES MELSEC Q 10 11 4 I O No designation device U 10 60 1 Definition I O No designation devices are used with instructions dedicated to intelligent function module to designate I O numbers 2 Designating the I O No designation device I O No designation devices are designated with the intelligent function module instructions as shown below L GP READ Un 2 gt I O No designation device n I O No gt Instruction name gt I O No designation instruction For details on intelligent function module instructions refer to the corresponding manual for the intelligent function module to be used 10 60 10 EXPLANTION OF DEVICES MELSEC Q 10 11 5 Macro instruction argument device VD 1 Definition Macro instruction argument devices are used with ladders registered as macros When a VD setting is designated for a ladder registered as a
459. nnot be used again as a label Such use will result in a pointer configuration error error code 4021 10 55 10 55 10 EXPLANTION OF DEVICES 10 56 MELSEC Q 2 Common pointer range of use In order to use common pointers the first common pointer No must be designated at the PLC system tab screen in the PLC Parameter dialog box A range of common pointers starts from a specified pointer number to P4095 However only pointer numbers subsequent to the local pointer range can be designated by parameter setting as common pointers If a total of 400 points are used in three programs 100 points in Program A 100 points in Program B and 200 points in Program C for example all local pointers after P400 can be used as common pointers If the last number of local pointers used in several programs overlaps the first number of common pointers a pointer configuration error Error Code 4020 will occur Program A Program B Program C PO to P99 used PO to P99 used PO to P199 used in program in program in program PO to P99 occupy 100 points PO to P99 occupy 100 points PO to P199 occupy 200 points Total of 400 points used All pointers after P400 can be used as common pointers Common pointer settings screen Set the head number x of the common pointers here Qn H Parameter PLC name PLC system puc file Puc RAS Device Program Boot file ZFC vo assignment
460. nnunciator SD67 0 0 0 No can be stored SD79 oO 0 0 ol Processing at CPU USER LED at High Peformance model QCPU front is ON Setting the display priority at error occurrence to SD207 SD209 allows you to select whether the ERR LED is to be ON or OFF when the annunciator turns ON 10 13 10 EXPLANTION OF DEVICES MELSEC Q 3 Anunciator OFF procedure and processing content a Anunciator OFF procedure An anunciator can be switched OFF by the RST F 3 LEDR BKRST and OUT F instructions 1 Ananunciator No which has been switched ON by the SET Fi instruction can be switched OFF by the RST F instruction 2 The LEDR instruction is used to switch OFF the anunciator Nos stored at SD62 and SD64 3 The BKRST instruction is used to switch all the anunciator Nos within a specified range 4 The OUT Fit instruction can execute ON OFF of the anunciator No by the same instruction However if an anunciator is switched OFF by the OUT Fi instruction the processing at anunciator OFF item b below is not performed Execute the RST Fi LEDR or BKRST instructions after the anunciator has been switched OFF by the OUT F instruction 1 To switch OFF only the anunciators stored at SD62 and SD64 Fault detection program ___ Annunciator ON program _ Display reset input LEDR H SD62 and SD64 annuciators OFF program To switch OFF all anunciators which are ON Fault detection program ___ Annunciato
461. not be finished When an interrupt program fixed scan execution type program is used constant scan time could be shifted by the execution time of an interrupt program fixed scan execution type program Refer to QCPU Q mode QnACPU Programming Manual Common Instructions for the command processing time 7 FUNCTION 7 3 Latch Functions MELSEC Q 1 What is Latch Functions a The values of each High Performance model QCPU device are set back to the default bit device OFF and word device 0 when e The PLC power is turned on e The reset operation is performed e There is a momentary power failure for more than the permissible amount of time Latch function maintains the device information when the above conditions occur The availability of latches does not affect the operation performed by a program The latch can be used to continue control by maintaining the production quantity defect count and address even when there is a momentary power failure for more than the permissible amount of time The following devices can use the latch function The default latch range is only the latch relay 1 Latch relay L 2 Link relay B 3 Annunciator F 4 Edge relay V 5 Timer T 6 Retentive timer ST 7 Counter C 8 Data register D 9 Link register W 2 Latch Range Setting The latch range setting is performed at the Device tab screen in the PLC Parameter dialog box There are two ty
462. nother GX Developer 7 FUNCTION MELSEC Q 7 15 1 Multiple user monitoring function 1 What is Multiple User Monitoring Function a The multiple user monitoring operation can be performed by operating from multiple GX Developers connected to the High Performance model QCPU or the Serial communications module b Multiple users can monitor at the same time By setting a station monitor file high speed monitoring can be performed It is not necessary to set host station monitor file 2 Operation Procedure a For multi user monitoring operation create a user defined system file in the following steps 1 Choose Online Format PLC Memory to open the Format PLC Memory dialog box 2 Select program memory from the Target Memory list box 3 Atthe Format Type section select Create a user setting system area so that its radio button is checked 4 Specify the desired k steps in the System Area text box b The follwing figure illustrates an example in which 1k step is specified in the System Area text box Format PLC memory x Connection target information Connection interface coma ees Pic module Target PLO 9 Network No p Station No Host PLC type faoeH Target memory Program memory Device memory 7 Format Type C Do not create a user setting system area the necessary system area only Create a user setting system area an area which speeds up monitoring from ot
463. ns from GX Developer Operation File Operation Enabled Disabled Operation Description A B C D Read from PLC Oe el Ol 26 Files are read from concerned memory Files are written to the program memory or Write to PLC x prog y SRAM card Verify the target memory and the GX Developer s pa alalolo i mower O e memory to ROM to the standard ROM or Flash card PaE ROM standard ROM or Flash card Delete PLC data alal xix x JA lA file stored in memory is deleted stored in memory is deleted Format PLC memory Faaa Memory formatting is executed Memory files which are no longer contiguous Arrange PLC memory f are re organized to make them contiguous Write during RUN in Write changes made in the ladder mode into the the ladder mode program memory Execution enabled A Execution enabled with some restrictions X Execution disabled 1 The codes A B C D used at the operation enabled disabled item in the above table are explained below Table 6 6 Operation enabled disabled A When write prohibit password is registered in a file a When read write prohibit password is registered in a file When the High Performance model QCPU s system protect switch is ON D sWhen High Performance model QCPU RUN status is in effect 2 Execution is allowed only when the passwords match 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 9 2 File handling precautions 1 P
464. nsfer from r Boot file setting Device initi a Insert Delete 2 D as fon fon fs to the Standard ROM Transferto a Data name Transfer from rameter v PARAM Standard ROM y Program memory Standard ROM gt Program memory w Comment IN COMMENT Standard ROM v Program memory I zi z alojo BEI afalalafalalala Acknowledge XY assignment Multiple CPU setting Default Check End Cancel b c 2 Store the setup parameters and the programs to be booted in the memory card Operations with High Performance model QCPU Automatic write to standard ROM 1 2 3 Switch off the power supply to the PLC Mount the memory card that contains the parameters and programs to be booted onto the High Performance model QCPU Set the parameter valid drive to the mounted memory card with the CPU s dip switches as follows e When a SRAM card is mounted SW2 ON SW3 OFF e When a Flash ATA card is mounted SW2 OFF SW3 ON Switch on the power supply to the PLC Boot the file specified with the parameter to the program memory from the memory card Write the contenst of the program memory to the standard ROM when the boot is completed BOOT LED will flicker when automatic write to standard ROM is completed and the High Performance model QCPU will assume
465. nsport regulations APPENDIX 5 1 Controlled models The batteries for the High Performance model QCPU including memory cards are Classified as follows Classification for Product name Model Product supply status f transportation Q series battery Q7BAT Lithium battery Lithium battery with Dangerous goods Q series battery Q7BAT SET Hide Q series battery Q6BAT Lithium battery Q series memory card battery Q2MEM BAT Lithium coin battery Non dangerous goods Q seri d Q2MEM 1MBS _ Packed with lithium coin series memory car Q2MEM 2MBS _ battery Q2MEM BAT APPENDIX 5 2 Transport guidelines Comply with IATA Dangerous Goods Regulations IMDG code and the local transport regulations when transporting products after unpacking or repacking while Mitsubishi ships products with packages to comply with the transport regulations Also contact the transporters App 61 App 61 INDEX Accuracy of initial scan time 4 16 Accuracy of scan time eee eeeeeeeeeeeeteeee 4 18 Annunciator F 10 12 ASCI Code incr tats a 4 51 ATA Cardar raap ad gbsbhshies 6 11 AUO MOCO iero renean eaen aaaea 5 3 Automatic write to standard ROM 6 14 B B Link tala anan 10 17 Base MOdE aenieiai aaneren 5 3 BCD Binary coded decimal 006 4 47 BIN Binary code seese 4 45 BL SFC block device 10 58 BOOt RUIN AEE A E EAT 6 17 C GC COUET ahairea RIP RRETIK 10 24 Catalog PLC MeMOT ccsccc
466. nstructions c Reading CPU shared memory of Motion CPU from High Performance model QCPU with multiple CPU instructions FROM instruction d Control instruction from the High Performance model QCPU to the Motion CPU with Motion dedicated CPU instructions e Writing and reading of the device data from the High Performance model QCPU to the Motion CPU with communication dedicated instructions between multiple CPUs f Event issuance from High Performance model QCPU to PC CPU module using instructions dedicated to multiple CPU communication Processing during resets and errors See Sections 14 2 7 and 14 2 8 The processing performed when resets and errors occur are different for the multiple CPU system s CPU No 1 and the CPU No 2 to CPU No 4 a High Performance model QCPU for CPU No 1 can be reset with a multiple CPU system CPU modules for CPU No 2 to No 4 and Motion CPU cannot be reset b Multiple CPU system operations will be suspended when a stop error occurs with the CPU No 1 It is possible to select whether to suspend or continue with multiple CPU system operations when a stop error occurs with CPU Nos 2 to 4 and Motion CPU Clock function An intelligent function module with which the error code and time of occurrence is stored in the buffer memory when an error is triggered is available time data read from the High Performance model QCPU The CPU No 1 time data will be stored as the time that the error occurred re
467. nted intelligent function module SP UNIT LAY ERR will occur If the designated number of occupied I O points is higher than that of the actually mounted I O module the points exceeding the points of the actually mounted module are set as dummies 5 ASSIGNMENT OF I O NUMBERS MELSEC Q d Be sure to set the same module type for the mounted module and the I O assignment If the module type of the I O assignment is different from that of the actually mounted module the module may not work normally For the intelligent function module make sure that the numbers of I O points are the same Actually installed module O assignment Input module Output Empt Output module Input Empt Input module output module Intelligent Error SP UNIT LAY ERR Empty Empty Intelligent function module Input output Error SP UNIT LAY ERR Empty slot Intelligent e Be sure to assign the I O numbers so that the last I O number is within the range of FFFu or less An error SP UNIT LAY ERR occurs when the last I O number exceeds FFFH System monitor of GX Developer shows Kx ag an I O address 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 7 Examples of I O Number Assignment This section shows the examples of the I O number assignment using GX Developer 1 When changing the number of points of an empty slot from 16 to 32 points Reserve 32 points to the empty slot slot No 3 so that the I O numbers do not change when a 32 point
468. nual Number Model Code SH 080037 13JL97 SH 080039 13JF58 SH 080040 13JF59 SH 080041 13JF60 SH 080076 13JF61 SH 080366E 13JF68 How to Use This Manual This manual is prepared for users to understand memory map functions programs and devices of the CPU module when you use MELSEC Q Series PLCs The manual is classified roughly into three sections as shown below 1 Chapters 1 and 2 Chapters 3 to 6 Chapter 7 Chapter 8 Chapters 9 and 10 Chapter 11 Chapter 12 Chapters 13 to 19 This manual does not explain the functions of power supply modules base units extension cables memory cards and batteries of CPU module For these functions refer to the manual shown below e High Performance Model QCPU Q Mode User s Manual Hardware Design Describe the outline of the CPU module and the system configuration The feature of CPU module and the basics of the system configuration of CPU module are described Describe the performance specifications executable program I O No and memory of the CPU module Describes the functions of the CPU modules Describes communication with intelligent function modules Describe parameters and devices used in the CPU modules Describes the CPU module processing time Describes the procedure for writing parameters and programs created at the GX Developer to the CPU module Describes an overview of the multiple PLC system the system co
469. numbers are designated as E settings e g E1 234 x1 _ Emovp E1 234 DO See Section 4 8 4 for details on real numbers Designation range The setting range for real numbers is 1 0x2 to 1 0x2 0 and 1 0x2 to 1 0x2 Designation method Real numbers can be designated in sequence programs by a normal expression or an exponential expression e Normal expression The specified value is designated as it is For example 10 2345 becomes E10 2345 e Exponential expression The specified value is multiplied by a 10 exponent For example 1234 becomes E1 234 3 1 1 The 3 in the above example represents a 10 value 1 0 10 12 4 Character string 1 10 63 Definition Character string constants are devices used to designate character strings in sequence programs They are designated by quotation marks e g ABCD1234 Usable characters All ASCII code characters can be used in character strings The QCPU is sensitive to uppercase and lowercase characters Number of designated characters Character strings extend from the designated character to the NUL code 00k You can use up to 32 characters for a character string in an instruction such as MOV 10 63 10 EXPLANTION OF DEVICES MELSEC Q 10 13 Convenient Uses for Devices When executing multiple programs in the High Performance model QCPU local devices among the internal user devices can be designated to execute e
470. o cost via the dealer or Mitsubishi Service Company Note that if repairs are required at a site overseas on a detached island or remote place expenses to dispatch an engineer shall be charged for Gratis Warranty Term The gratis warranty term of the product shall be for one year after the date of purchase or delivery to a designated place Note that after manufacture and shipment from Mitsubishi the maximum distribution period shall be six 6 months and the longest gratis warranty term after manufacturing shall be eighteen 18 months The gratis warranty term of repair parts shall not exceed the gratis warranty term before repairs Gratis Warranty Range 1 The range shall be limited to normal use within the usage status usage methods and usage environment etc which follow the conditions and precautions etc given in the instruction manual user s manual and caution labels on the product 2 Even within the gratis warranty term repairs shall be charged for in the following cases 1 Failure occurring from inappropriate storage or handling carelessness or negligence by the user Failure caused by the user s hardware or software design 2 Failure caused by unapproved modifications etc to the product by the user 3 When the Mitsubishi product is assembled into a user s device Failure that could have been avoided if functions or structures judged as necessary in the legal safety measures the user s device is subject to or as neces
471. ode 3 characters Pattern x4 Block No Step No transition No Sequence step No L Sequence step No H 4 Contents of pattern data Error 1514 to 4 3 2 1 0O Bit number Error common ojo to 0 O gt K common 3 A information __SFC block designation present information Not used 1 absent 0 SFC step designation present 1 absent 0 SFC transition designation present 1 absent 0 SD15 Switch cause Number Meaning SD5 Switch cause 0 automatic switch 1 manual switch SD6 Switch direction 0 standby system to control system 1 control system to standby system SD7 Tracking flag 5 SD8 SD9 SD10 oe Vacant SD13 SD14 SD15 x5 Tracking flag contents Shows whether or not the tracking data is valid 1514 to 4 3 2 1 0 j Bit number ojo to ojoj Invalid work data Not used invalid 0 valid 1 System data SFC active step information invalid 0 valid 1 L Switching cause invalid 0 valid 1 App 25 App 25 APPENDICES MELSEC Q Special Register List Continued Corresponding Corresponding Number Name Meaning Explanation ACPU box B e Individual information corresponding to error codes SDO is stored here File name Drive name Example Number Meaning ABCDEFGH UK SD16 Drive b15 to b8 b7 to b0 SD17
472. odel QCPU and executing them 12 2 1 Items to consider when creating multiple programs To create multiple programs it is necessary to set in advance the size of each program the device used and the program file name etc 1 Program size considerations Set the program capacity within the range of the High Performance model QCPU program capacity The program capacities of the High Performance model QCPU s are shown below e Q02CPU 28 k steps e QO2HCPU 28 k steps QO6HCPU 60 k steps Q12HCPU 124 k steps Q25HCPU 252 k steps Decide whether the parameters are to be stored in the program memory the standard ROM or the memory card If they are to be stored in the program memory the standard ROM the area available for the program will be the capacity shown above minus the parameter data size 2 Designating a program file name Designate the file name of the program to be stored in the High Performance model QCPU This file name is used when writing the program and parameters from GX Developer to the High Performance model QCPU and when designating the program to be executed in the High Performance model QCPU See Chapter 6 for details regarding file names 3 Designating the program execution conditions In order to execute multiple programs in the High Performance model QCPU execution conditions must be designated for each program Execution is impossible for programs without file name and execution condition settings
473. odule every time the instruction is executed resulting in longer scan time for the For the intelligent function module device see Section 10 5 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 3 4 Effects of quicker access to the special function module and countermeasures against them 1 Effects of quicker access to the special function module As the scan time of High Performance model QCPU increases there are some limitations for the execution of the FROM TO instruction to the AnS compatible special function module The following effects may be produced in the program which reads writes data from to a special function module with the FROM TO instruction at every scan a Special function modules which assign priority to the FROM TO instruction 1 When the FROM TO instruction is executed the special function module stops its processing and processes the FRO TO instruction first As a result the processing time of the special function module becomes longer resulting in watch dog timer error of the special function module 2 The followings are the special function modules which assign priority to the FROM TO instruction e A1S64AD A1S68AD e A1S62RD3 A1S62RD4 e A1S68DAV A1S68DAI e A1S68TD e A1SD75P1 S3 A1SD75P2 S3 A1SD75P3 S3 e A1SD75M1 A1SD75M2 A1SD75M3 b Special function modules which suspend processing of the FROM TO instruction 1 Even when the FROM TO instructio
474. odule will be stopped or continued when the hardware error of the intelligent function module occurs Use this function for various settings of the intelligent function module Refer to each intelligent function module for the details of the setting This function monitors the status of programs and devices on the CPU module by operating from This function monitors using a fine timing of the CPU module This function monitors and or tests the local devices of the designated program using the GX Developer This function forcibly turns the external I O of the CPU module on or off from the GX Developer This function displays the processing time of a program being executed the number of times to execute an interrupt program and the execution time of a program This function prevents the programs from being modified from GX Developer serial communication module or like Section 7 6 3 Section 7 6 4 Section 7 7 1 Section 7 7 2 Section 7 7 3 Section 7 8 Section 7 8 Section 7 10 Section 7 11 Section 7 11 1 Section 7 11 2 Section 7 11 3 Section 7 12 Section 7 13 Section 7 19 This function provides read write protection for files stored in the CPU module against access from Password registration Section 7 19 1 the GX Developer A function to prevent illegal access from external sources with serial communication modules and t Remote password Section 7 19 2 Ethernet modules System display LED disp
475. odules 5 1 Relationship Between the Number of Stages and Slots of the Extension Base Unit High Performance model QCPU allows the system configuration using eight base units one main base unit and seven extension base units However the number of available slots modules is limited to 64 slots including empty slots An error SP UNIT LAY ERR occurs when a module input output or intelligent function module is installed to the 65th or subsequent slots Be sure to install modules within the range of 64 slots An error does not occur as long as all modules are installed within the range of 64 slots even if the total number of slots of the main and extension base units results in 65 slots or more e g When 6 12 slot base units are installed 012 3 4 5 6 7 8 9 1011 lt Slot No Setting of extension 3 z no p s 312B stage 5 S S See Section 5 2 re i 12 13 14 15 16 17 18 19 20 21 22 23 Lexa a T g oo 5 Q612B z at 24 25 26 27 28 29 30 31 32 33 34 35 O exe 2 Q Z 5 Q612B ege z ee i 36 37 38 39 40 41 42 43 44 45 46 47 5 gt 0o Q a oa 3 Q612B oo D oOo es Hel 48 49 50 51 52 53 54 55 56 57 58 59 oo gt oo Q oo Q arid z Q612B lone Coo h 60 61 62 63 CX Ooo Q oo i T 5 a Q612B o lone oo
476. of program A FEND r oH lt 10 IRET Interrupt lt program g2 cyi c iret 128 y A IRET END Interrupt pointer 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q b Using the interrupt program as a separate program Interrupt programs can also be managed as separate discrete programs stand by type programs See Section 4 2 4 for details on stand by type programs However the same interrupt program pointer number cannot be used more than once in the program being executed by the CPU module 3 Executing interrupt programs a In order to execute an interrupt program with the interrupt pointer 132 to 147 IMASK and El instructions are required to obtain permission for the interruption 1 1 If an interrupt factor occurs prior to an interruption permitted status the interrupt program corresponding to the factor will be executed when the interruption permitted status is established 2 Ifan interrupt factor occurs during a STOP PAUSE the interrupt program corresponding to the factor will be executed when the interruption permitted status is established following a return to the RUN status Interrupt program example Interrupt program execution Program execution i Interrupt program for 10 activated Main routine program End of main FEND routine program Interrupt program gt IO interrupt program Interrupt pro
477. of each instruction in the sequence program For details on direct access I O see Section 10 2 1 and 10 2 2 respectively 4 7 1 Refresh mode 1 Definition of refresh mode With the refresh mode batch communication with the I O modules is performed before the sequence program operation starts a Batch reading of the input module ON OFF information is executed in the High Performance model QCPU s internal input device memory when sequence program operation starts This ON OFF data in the input device memory is then used for processing when a sequence program is executed b The processing result of the output Y sequence program is output to the High Performance model QCPU s internal output device memory and batch output of the ON OFF data in output device memory to the output module is executed when sequence program operation starts High Performance model QCPU Remote input refresh area CPU operation processing area 3 Input 09 GX Developer refresh device input area memory P x1 1 At input Area for refresh At input communication x2 with input module At output Output Y refresh device memory e Input refresh Before start of the sequence program operation input data are batch read from the input module 1 and ORed with the GX Developer input area or remote input refresh area data and the results are stored into the input X device memory
478. of local devices permits programming of multiple independent execution programs without regard to other programs Local devices data can be stored in the standard RAM and the memory a Sequence program card High Performance model QCPU If local devices are designated as M7000 or later they can be used independently in each program executing M7000 or later Program A M7000 Y12 Memory card MELSEC Q M7000 ON OFF data a Program B M7000 Y11 M7000 ON OFF data Five device types can be used as local devices internal relays M i l Internal relay ON OFF Internal relay I f f m iM7000 ON OFF o e f f relays V timers T ST counters C and data registers D Programs used as local devices exchange the local device file data stored in the memory card with the data in the device memory of High Performance model QCPU Therefore the scan time is extended by this data exchange time Program A Program B Program C Restored Saved Restored Saved Restored Local device Local device _ Local device _ For For For program A program A program A For For For DER program B program B program B For For For program C program C program C The local device may not be designated with some instructions Refer to
479. of the FROM TO instruction the data stored in the buffer memory of the intelligent function module can be read or data can be written to the buffer memory of the intelligent function module The FROM instruction stores the data read from the buffer memory of the intelligent function module to the designated device The TO instruction writes the data of the designated device to the buffer memory of the intelligent function module 1 For the details of the FROM TO instruction refer to the following manuals QCPU Q mode QnACPU Programming Manual Common Instructions 2 For the details of the buffer memory of the intelligent function module refer to the manual of the intelligent function module being used 8 1 4 Communication using the intelligent function module device 1 Intelligent function module device The intelligent function module device is the buffer memory of the intelligent function module represented as a device of High Performance model QCPU in High Performance model QCPU programs It enables reading data stored in the buffer memory of the intelligent function module or enables writing data to the buffer memory of the intelligent function module 2 Difference from the FROM TO instruction The intelligent function module device can be handled as a device of High Performance model QCPU enabling the processing of data read from the intelligent function module with one instruction This saves the number of steps in the entire
480. of times lt No of times lt 8192 7 FUNCTION MELSEC Q 2 Trace Point Setup This sets the timing to collect trace data Select one from the following a Each Scan Collects trace data for every scan END processing b Interval Collects trace data at specified times c Detailed Sets the device and step no The setting method and trace data sampling timing is the same as mentioned in section 7 11 1 when setting the monitor condition The devices that can be set in the detailed condition are as follows e Bit Device X Y M L F SM V B SB T contact ST contact C contact J LAX J LAY J _ B J _ SB BL_ S e Word Device T current value ST current value C current value D SD W SW R Z ZR ULAG J LAW J L ASW The following attributes can be set for the above devices e Bit device number of digits specification e Word device bit number specification 3 Trigger Point setup This sets the point to execute the trigger Select one from the following a At the time of TRACE order The time of execution of TRACE instruction is set as the trigger b At the time of trigger operation The trigger operation from GX Developer device is set as the trigger c Detailed setting The device and step number is set The setting method and trigger execution timing is the same as mentioned in Section 7 11 1 the monitor condition setting 4 Additional trace information The information to be added for
481. ogether on the slot to the right of the High Performance model QCPUs The PC CPU module is installed on the extreme right side in the multiple CPU system The total number of High Performance model QCPU Motion CPU and PC CPU module must be up to four Multiple CPU system parameters see Section 14 2 6 In comparison with independent CPU systems there are more PLC parameter items on a multiple CPU system Of the PC parameters that have been added to the multiple CPU system the parameters that must be set are listed below e Number of CPUs Sets the number of mounted High Performance model QCPUs motion CPUs and PC CPU module that are in use e Control CPU settings Sets which High Performance model QCPU Motion CPU and PC CPU module controls while modules Sameness check see Section 14 2 6 A setting exists to indicate that the QCPU motion CPU PC CPU module used are the same in the number of CPUs control CPU settings and other multiple CPU system parameters The High Performance model QCPU Motion CPU PC CPU module runa check sameness check to ascertain that the multiple CPU system parameters are the same when the PLC power is set at ON the High Performance model QCPU is reset and the STOP status is changed to the RUN status The multiple PLC system will not start up if an error is triggered during the sameness check Concept of the I O number see Section 15 1 The right side of the installed CPU module is I O numbe
482. ogram booted from the standard ROM or memory card to the program memory Program Boot Standard ROM Parameter Parameter Memory card Program Program 2 Program construction Programs are stored in a file format in the program memory standard ROM or memory card Multiple programs can therefore be stored in the program memory standard ROM or memory card by using different file names Multiple program writing A J is enabled by using different file names File name ABC File name ABC File name DEF Parameter Program eee Program comments High GX Developer gt Performance Writing from GX Developer to QCPU model QCPU Therefore the program creation can be split among several designers so that they control and manage the programs by process or function Only the relevant programs should be modified or debugged when the specifications are changed a Example of program creation split among several designers High Performance model QCPU Program memory Standard ROM Memory card Designer A gt Program A Programs A to C Program B are executed in sequence 1 Y Designer B Designer C gt Program C 1 See Section 4 2 for details on the execution sequence 1 OVERVIEW b Example of programs split by process 1 Split by process lt MELSEC Q High Performance model QCPU Program memory
483. ogram name freely 2 Stop mode e Executing After stop output stop for the scan execution type turns off the output non execution processing at the next scan The program is put in the standby status at and after the next scan This operation is the same as performed when the POFF instruction is executed e Executing After stop output stop for the low speed execution type suspends the execution of the low speed execution type and turns off the output at the next scan The program is put in the standby status at and after the next scan This operation is the same as performed when the POFF instruction is executed e Executing After stop output stop for the standby program stops the program after one scan OFF is executed as scan execution For this reason Execute count is also increased by 1 e Execute count is also increased by 1 if an error occurs in the RET IRET instruction during execution of one scan OFF in the standby program At this time the execution type is scan execution POINT Depending on the instruction the output may not turn OFF if After stop output stop is executed For details refer to the section of the POFF instruction in the following manual QCPU Q Mode QnACPU Programming Manual Common Instructions 4 Precaution The scan time of a constant scan execution type program being executed is not displayed on screen but a dash is displayed in the Scan Time column 7 45 7 4
484. oints ZO to Z15 Unchangeable Section 10 6 0 to 1018 k points File register Word device File register 0 points I en 1k ea Section 10 7 15 points NO to N14 Unchangeable Section 10 8 4096 points PO to P4095 Section 10 9 7 A Unchangeable Interrupt pointer 256 points 10 to 1255 Section 10 10 Bit devices SFC block device 320 points BLO to BL319 Section 10 11 1 SFC transition device 512 points TRO to TR511 Section 10 11 2 Network No 256poi Other Network No 56 points J1 to J255 Unchangeable Section 10 11 3 VO No UO to UFF Section 10 11 4 M instruction acro instru i VDO to VDO Section 10 11 5 argument device Hexadecimal constants HO to HFFFFFFFF Section 10 12 2 Real number constants E 1 17550 38 to E 3 40282 38 Section 10 12 3 h ter stri Character string ABC and 123 Section 10 12 4 constants Decimal constants K 2147483648 to K2147483647 Section 10 12 1 REMARK x1 For the timer retentive timer and counter bit devices are used for the contact and the coil and the word device is used for the present value x2 The actual number of usable points varies according to the intelligent special function module For details regarding the buffer memory s number of points refer to the Intelligent Special Function Module Manual x3 Inputs outputs step relays link special relays link special registers remain at their default values which cannot be changed 4 In a program only FXO to FX4 and FY0 to FY4 can be
485. oints occupied No 3 512 0000 DIFF D20481 02559 No 4 512 0000 DIFF 02560 03071 1 6 points Caution Offset HEX from starting address of the auto refresh area i Refer to the user s manual of the each PLC about the starting address 1 po I nt Seige spat pe setae same when The applicable device of head device is B M Y D W R ZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check End Cancel 2 19 5 19 5 19 STARTING UP THE MULTIPLE CPU SYSTEM 2 Qn H Parameter El PLC name PLC system PLC file PLC RAS Device Program Bootfie SFC 1 0 assignment r120 Assignment Twe Modelname Ponts stable suiten seting PLC No 3 v Detailed setting PLC Empty v v Assigning the 1 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur r Base setting aa EstBases Base mode Auto C Detail 8 Slot Default 12 Slot Default Settings should be set as same when Intelligent functional module detailed setting x using multiple CPU Import Multiple CPU Parameter Read PLC data Acknowledge XY assignment Multiple CPU settings Default Check End Cancel Model name PLC No 1 HAW error a time PLC 1 0 res
486. ollows 1 Remote STOP Executes the program to the END instruction and enters the STOP status 2 Remote RUN When remote RUN is performed while in the STOP status using remote STOP the status changes to RUN and executes the program from step 0 7 FUNCTION MELSEC Q 2 Method with Remote RUN STOP There are two ways to perform remote RUN STOP a Method with remote RUN contact The remote RUN contact is set at the PLC system tab screen in the PLC Parameter dialog box of GX Developer The device can be set in the range of input XO to 1FFF By turning the set remote RUN contact ON OFF the remote RUN STOP can be performed 1 When the remote RUN contact is OFF the QCPU enters the RUN status 2 When the remote RUN contact is ON the QCPU enters the STOP status Step 0 gt END Remote RUN contact OFF CPU module RUN STOP status STOP status Fig 7 4 Time Chart for RUN STOP with Remote RUN Contact b Method with GX Developer serial communication module etc High Performance model QCPU RUN STOP can be performed by the remote RUN STOP operation from the GX Developer serial communication module etc The GX Developer operation is performed with on line remote operations The serial communication module and Ethernet interface module are controlled by commands complying with the MC protocol For details of the MC protocol refer to the following manual Q Corresponding MELSEC Communication Proto
487. om GX Developer to the High Performance model QCPU files can be specified by type parameter program comment etc without regard to their extension GX Developer automatically assigns the appropriate extension for the file type which has been specified b Itis impossible to set and use the same extension stage number with two or more extension base units High Performance model QCPU file management The use of different file and extension names permits multiple files to be stored in the High Performance model QCPU Because the High Performance model QCPU can also process a given program as one file programs created can be managed individually according to their designer process or function by using different program file names Moreover program execution is allowed for multiple programs stored in the High Performance model QCPU See Chapter 4 for details on High Performance model QCPU program execution details File written from GX Developer The High Performance model QCPU stores files written from GX Developer in the memory program memory standard ROM memory card 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 4 File details File name file size and writing date which are set when created with GX Developer are added to every file written into High Performance model QCPU When monitoring the files by GX Developer the files are displayed as shown
488. on operation status Local station error detect status Local station remote I O station parameter error de status Local station remote I O station initial communications status Local station remote I O station error Local station remote I O No errors Error detection No errors Error detection No communications Communications underway Normal Abnormal Normal Abnormal OFF Online ON Offline station to stationtest or self loopback test OFF Loopback not being conducted ON Loopback implementation Loopback implementation OFF Reception ON No reception Details Depends on whether or not the master station is executing a forward or a reverse loop test Control is performed depending on whether a local station is in the STOP or PAUSE mode Depends on whether or not a local station has detected an error in another station Depends on whether or not a local or a remote I O station has detected any link parameter error in the master station Depends on the results of initial communication between a local or remote I O station and the master station Parameter communication etc Depends on the error condition of a local or remote I O station Depends on the error condition of the forward and reverse loop lines of a local or a remote I O station Depends on whether the local station is online or offline or is in station to station test or self loopback
489. on GX Developer version APPENDIX 4 Transportation Precautions APPENDIX 4 1 Controlled models APPENDIX 4 2 Transport guidelines INDEX Manuals The following manuals are also related to this product In necessary order them by quoting the details in the tables below Related Manuals Manual Name High Performance Model QCPU Q Mode User s Manual Hardware Design Maintenance and Inspection This manual provides the specifications of the CPU modules power supply modules base units extension cables memory cards and others Sold separately QCPU Q Mode QnACPU Programming Manual Common Instructions This manual describes how to use the sequence instructions and application instructions Sold separately QCPU Q Mode QnACPU Programming Manual PID Control Instructions This manual describes the dedicated instructions used to exercise PID control Sold separately QCPU Q Mode QnACPU Programming Manual SFC This manual explains the system configuration performance specifications functions programming debugging error codes and others of MELSAP3 Sold separately QCPU Q Mode QnACPU Programming Manual MELSAP L This manual describes the programming methods specifications functions and so on that are necessary to create the MELSAP L type SFC program Sold separately QCPU Q Mode Programming Manual Structured Text This manual describes the structured text language programming methods Sold separately Ma
490. on serial number of the CPU module Serial Number GX Developer Pp AT Version 4 SWADSC GPPW E or later Functions added to 03052 Version 7 SW7D5C GPPW E or later Functions added to 04012 ee ZEON Dee Ore Ee Functions added to 04122 Version 8 SW8D5C GPPW or later Functions added to 05032 Version 8 03D SW8D5C GPPW or later 1 Refer to Section 2 3 for the serial No and function version of the High Performance model QCPU 2 Refer to Appendix 4 for details 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q 2 3 Confirming the Serial Number and Function Version The CPU module serial No can be confirmed on the rated plate and GX Developer s system monitor 1 Confirming the serial No on the rated plate MITSUBISHI MODEL Function version SERIAL_05032 00000000006 80M1 IND GONT EQ c US LISTED a MITSUBISHI ELECTRIC MADE IN JAPAN 2 Confirming the serial No on the system monitor list of product information The CPU module serial No and function version can be confirmed with the list of product information on the GX Developer Version 6 or later system monitor Serial Nos and function versions of the intelligent function module and CPU module can also be confirmed Serial number Function version Product Information List Intelli Q QU71LP21 25 32pt 0000 020810000000000 None None ze None 5 No
491. on type program B m i Low speed scan time Low speed scan time i 12 5ms 12ms ht Pet Low speed END Low speed END processing execution processing execution i 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 i 1 Low speed END Low speed END i 1 l l l l l l l I l l l l l l l l Li I I l l I l Li Li l l l l l I l l l l l l l l l l l l l l l I l l l l l l l l I 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 Precautions for creating Low speed execution type programs a See Section 10 6 1 for details on index register processing when switching from a scan execution type program to a low speed execution type program b See Section 10 6 2 for details on index register processing when an interrupt program a fixed scan execution type program is executed during execution of low speed execution type program c The low speed program execution time should be set so that sum of the scan time low speed program execution time sum is less than the WDT setting value d The COM instruction can not be used in low speed execution type programs e Low speed execution type programs can also be executed with scans that execute the initial execution type programs Establish an interlock with SM402 and SM403 for the circuit that validates the low
492. on type program scan execution type program When the interrupt program fixed scan execution type program is executed at a measuring time such as the scan time or execution time the values of the interrupt program fix scan execution type program are added to the measured time Thus if the interrupt program fixed scan execution type program is executed the values stored in the following special registers and GX Developer monitor values will become longer than when the interrupt program fixed scan execution type program is not executed 1 Special registers e SD520 SD521 Current scan time e D522 SD523 Initial scan time e S D524 SD525 Minimum scan time e S D526 SD527 Maximum scan time e SD528 SD529 Current scan time for low speed e SD532 SD533 Minimum scan time for low speed e SD534 SD535 Maximum scan time for low speed e SD540 SD541 END processing time e S D542 SD543 Constant scan wait time e S D544 SD545 Cumulative execution time for low speed execution type programs e SD546 SD547 Low speed execution time e SD548 SD549 Scan program execution time e SD551 SD552 Service interval time 2 GX Developer monitor values e Execution time measurement e Scan time measurement e Constant scan 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 3 Operation Processing 4 3 1 Initial processing This is a preprocessing for sequence operation execution and is performed only once as
493. onitoring circuits Choose Online gt Monitor gt Monitor condition to open the Monitor Condition dialog box The following shows an example in which to start a monitoring operation at the leading edge of Y70 Monitor condition n Select when monitoring gt F Device Device Condition by setting the contents Suspend of the device Word device x pmo 5 Pa Select when monitoring gt J Step No by setting Step No In case of SFC program It is not effective for SFC chart a When only Step No is specified 1 The monitor data sampled when the status previous to execution of the specified step becomes the specified 2 The specification method for the execution status is indicated below a When changing from non execution status to executing status lt P gt b When changing from executing status to non execution status lt F gt c Always when executing only lt ON gt d Always when not executing only lt OFF gt e Always regardless of status lt Always gt When Step No 0 is specified set the condition to Always 7 FUNCTION MELSEC Q If a step between the AND OR blocks is specified as a monitor condition monitor data is sampled when the status previous to execution of the specified step is specified by the LD instruction The monitor timing depends on the step specified as a monitor condition The following shows examples of monitoring when
494. only when the High Performance model QCPU parameter valid drive is to Memory Card The Auto Download all Data from Memory card to Standard ROM setting at the Boot file tab screen is disabled if the parameter valid drive is set to Program Memory or Standard ROM 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 7 Executing Standard ROM Memory Card Programs Boot Run 1 Executing High Performance model QCPU programs a The High Performance model QCPU executes programs stored in the program memory The High Performance model QCPU does not perform operation of programs stored in the standard ROM or memory cards b To execute programs stored in the standard ROM and memory card designate file names to be booted read to program memory at the Boot file tab screen in the PLC Parameter dialog box Programs with file names designated on the Boot file tab screen are booted from the standard ROM memory card to the program memory and executed in the order set on the Boot file tab screen when the PLC is powered ON or the High Performance model QCPU is reset Preparation for Boot Run Perform the following steps in preparation for boot run a Create a program using GX Developer Create a program used for the boot run b Select a boot file using GX Developer Select a boot file at the Boot file tab screen in the PLC Parameter dialog box Qn H Parame ter Lx PLC name PLC s
495. ons for Point Start End Start End i Nol i all other CPUs will continue even when an error occurs No 2 0 No 3 a in the CPU No 2 No 4 i e The operation mode for the CPU No 1 cannot be changed Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address Settings should be set h ee gr assamewhen The applicable device of head device is B M Y D W AZR using multiple CPU The unit of points that send range for each PLC is word Out of the group input output settings optional ultiple CPU settings No of PLE Online module change Sets whether or not the I O status of non control 7 Enable online module change with another PLC K No of PLC When the enine module change is enabled with another PLC PLCs are acqu ired O status outside the group cannot be taken a A H Operating mode 1 0 sharing when using Multiple CPUs 0 Default Default Do not acquire Enor operation mode atthe stop of PLC I CPUs can esd allnpulg No check I All station stop by stop error of PLC1 AI CPUs can read all outputs T Al station stop by stop error of PLC2 Refresh settings I All station stop by stop eror of PLC3 Change screens Setting1 Y FZ Al station stop by stop error of PLC4 Send range for each PLC PLC side device PLC The auto refresh area Caution Dev starting Pont
496. onstant scan is not used Sequence program END processing END 0 ENDy 0 END 0 f tp H 5ms 5ms Scan time when constant scan setting is set to 7 ms _ Sequence program END processing END 0 END 4 ange Wait time 5ms 2ms 7ms Sequence program A Sequence program B Sequence program C 7 END processing Wait time 8ms 10ms Fig 7 1 Constant scan operation When using a low speed execution type program the constant scan function setting or low speed execution type program execution time must be set 7 FUNCTION MELSEC Q 2 Setting the constant scan time a The constant scan time is set at the PLC RAS tab screen in the PLC Parameter dialog box The constant scan can be set in the range of 0 5 ms to 2000 ms A setting can be made in 0 5 ms units e When executing constant scan set the constant scan time e When not executing a constant scan leave the constant scan time blank Example When the constant scan is set to 10 ms Qn H Parameter x PLC name PLC system PLC file PLC RAS Device Program Boctfie SFC 1 0 assignment WDT Watchdog timer setting Error check WDT Setting 200 ins 10ms 2000ms I Cary out battery check inialevee thon I Carry out fuse blown check monitoring time ms 10ms 2000ms M Carry out 1 0 module comparison Low speed 1 Oms Constant scannin 1 execution ms 10ms 2000ms g
497. or is set Momentary power failure occurrence Power recovery mig QCPU interrupts the operation Fig 4 6 Operation Processing When Momentary Power Failure Occurs 2 When a power failure occurs for a period longer than the permitted power failure time The High Performance model QCPU starts initially PLC power is turned on The same operation processing as that after the following operation occurs e Power ON e Resetting using RESET L CLR switch e Remote setting using GX Developer 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 6 Data Clear Processing 1 Data clear The High Performance model QCPU clears all data except for the following when a reset operation is performed with RESET L CLR switch or power ON to OFF to ON a Program memory data except for when clear program memory is set at boot specification b Data in the memory card c Device data with latch specification latch clear valid d Device data with latch specification latch clear invalid e File register data Failure history data when special register SD storage Data in c is cleared by operating latch clear with the RESET L CLR switch or operating remote latch clear from GX Developer See Section 7 6 4 for details on the remote latch clear 2 Device latch specification a Specify the device latch latch range setting for each device at the Device tab screen in the PLC Par
498. or later With this function the parameters and sequence programs are booted from the memory card to the program memory and the booted parameters and sequence programs are then written from the program memory into the standard ROM as shown below High Performance model QCPU Memory card Parameters Parameters Boot e Sequence e Sequence programs programs Standard ROM e Parameters e Sequence programs wating Automatic write to standard ROM is used to change the High Performance model QCPU programs that perform ROM operations with the standard ROM Overwriting in the standard ROM is performed by GX Developer but using Automatic write to standard ROM moves the memory card in which the parameters and the changed programs are written to the High Performance model QCPU so that they are written into the standard ROM from the memory card Automatic write to standard ROM is available with a combination of the High Performance model QCPU with the upper five digits of its serial No as 02092 or later and GX Developer Version 6 or later If the memory card in which Automatic write to standard ROM is set is mounted in the High Performance model QCPU whose the upper five digits of its serial No is the 02092 or later the boot operations are performed from the standard ROM The followings are necessary for Automatic write to standard ROM e Set Automatic write to standard ROM settings in
499. ored File register block No is saved protected restored For the index register Z0 to Z15 when not writing date to index registers check by using an interrupt program fixed scan execution type program the High speed execution check box in the Interrupt program Fixed scan program setting section at the PLC system tab screen in the PLC Parameter dialog box This will switch between programs quickly 1 Index register processing a When High speed execution is not selected 1 When the scan low speed execution type program is switched to the interrupt fixed scan execution type program the scan low speed execution type program s index register value is first saved and is then transferred to the interrupt fixed scan execution type program 2 When the interrupt fixed scan execution type program is switched to the scan low speed execution type program the saved index register value is reset i Switch Scan low speed ina Interrupt program Reset Scan low speed execution type program Executed program execution type i gt Fixed scan execution gt execution type program i itype program i program Transi Index register value Z0 1 erred Z0 1 to Z0 3 Z0 1 Saved Reset Index register storage area J i Z0 0 Z0 1 Z0 1 Z0 1 Z0 1 For scan low speed x For interrupt program Z0 is changed to 3 Word devices should be used to transfer index register data from an inter
500. os and Interrupt Factors Interrupt factors La Errors that stop operation Empt ply uN ARIE TR 4th point 240 SP UNIT ERROR OPERATION ERROR genais m Sich ECE EROR i alin sale EX POWER OFF 10th point 246 ICM OPE ERROR FILE OPE ERROR 12th point 13th point 14th point CHK instruction execution 15th point Anunciator detection 16th point Tst point Empty 2nd point aa 3rd point 149 Internal timer factor 0 2 to 1 0mg 5 7 4th point Sequence start oth point generator module 6th point factor 1 i i Specifies which intelligent A N function module is used 18 to 223 mogu edactor with parameters x1 1st to 12th points are allocated in order beginning from the sequence start generator module installed closest to the High Performance model QCPU x2 The internal times shown are the default setting times These times can be designated in 0 5 ms units through a 0 5 to 1000 ms range set at the PLC system tab screen in the PLC Parameter dialog box x3 When an error interruption with 132 error that stops operation occurs the High Performance model QCPU is not stopped until 182 processing is completed x4 Execution of error interruptions is prohibited for the interrupt pointer Nos 132 to 139 when the power is turned on and during a High Performance model QCPU reset When using interrupt pointer Nos 132 to 139 set the interruption permitted status by using the IMASK instruction 5 Set th
501. ot specified 0 is displayed c Perform the monitoring by matching the device allocation of the High Performance model QCPU and GX Developer d When monitoring the buffer memory of the intelligent function module the scan time takes longer as well as when executing the FROM TO instruction e Multiple users can perform monitoring at the same time When multiple users are performing monitoring at the same time take note of the following e High speed monitoring can be performed by increasing 1k step in the system area for other station s monitor file when formatting of program memory Up to 15 stations can be set as the station monitor file but the program space will be reduced e The detailed condition setting for the monitoring can only be set for one user f The monitoring detailed condition setting can only be set in circuit monitor g When the same device is specified as the monitor condition and monitor stop condition specify ON or OFF h The monitoring conditions will not be established unless the following specified steps commands are executed when Step No has been specified for the monitoring conditions 1 When skipping steps specified with the CJ command the SCJ command and the JMP command 2 When the specified step is the END command the FEND command exists while the program is running and the END command is not executed i Do not reset the High Performance model QCPU while monitoring
502. ower OFF or reset during program operation a If power is switched OFF during a file operation which will not cause a file shift the memory data will not be lost b If files and data in the memory of the High Performance model QCPU is backed up using the battery Q6BAT the program memory data will not be lost when the power is switched OFF during the following file operations which cause a file shift e File size change e PLC memory arrangement e New file creation e Writing a program file during the RUN status e Writing a program in excess of memory allocated for Write during RUN e Reading a file with the PLOAD instruction Files stored in the memory card will not be lost unless the memory card is removed from the High Performance model QCPU while the power is OFF If the above operations are done the half processed data will be stored in the High Performance model QCPU internal memory and will be restored when power is switched ON again A battery backup is required in order to save internal memory data for this reason 2 Simultaneous write to the same file from multiple GX Developers The High Performance model QCPU does not allow access from other GX Developers to the file being written It does not allow write from other GX Developers to the file being accessed either Therefore to perform write from multiple GX Developers to the same file start the processing of next GX Developer after the processing of current
503. p e When this relay is turned OFF the start of tracking is delayed until it is executable if the tracking memory is being used at END e When this relay is turned ON the start of tracking is carried over to next END if the tracking memory is being used at OFF Batch operation mode ON Carryover mode Tracking execution SM1521 SM1522 SM1523 SM1524 SM1525 SM1526 SM1527 SM1529 Block 10 SM1530 Block 11 U New SM1531 Block 12_ Specified the blocks to trigger when ark OFF No trigger SM1532 Block 13_ the data is transmitted by the data ON Trigger SM1533 Block 14 _ tracking instruction specification nee SM1534 Block 15_ S TRUCK SM1535 Block 16 SM1537 SM1538 SM1539 SM1540 SM1541 SM1542 SM1543 lock 25 SM1545 Block 26 App 18 App 18 APPENDICES MELSEC Q Special Relay List Continued Set by ACPU Applicable SM1546 Block 27 SM1548 SM1549 SM1550 SM1551 SM1552 SM1553 Block 34 SM1554 Block 35 SM1556 SM1557 SM1558 SM1559 SM1560 SM1561 SM1562 SM1563 P Specified the blocks to trigger when Data tracking OFF No trigger SM1564 the data is transmitted by the data smises vansmssion ink ON Trigger SM1565 tracking instruction u specification SM1566 S TRUCK New Q4AR SM1567 SM1568 SM1569 SM1570 SM1571 SM1572 SM1573 SM1574 SM1575 SM1576 SM1577 SM1578 SM1579 SM1580 SM1581 SM1582 SM1583 pas Switching status from OFF Normal Turns ON whe
504. pansion file register which is used as the work area for the execution of a SFC program in a binary value Stores 0 if an empty area of 16K bytes or smaller which cannot be expansion file register No 1 is used or if SM320 is OFF e Stores error code of errors occurred in the SFC program in BIN code 0 No error 80 SFC program parameter error 81 SFC code error 82 Number of steps of simultaneous execution exceeded 83 Block start error 84 SFC program operation error Stores the block number in which an error occurred in the SFC program in BIN code In the case of error 83 the starting block number is stored Stores the step number where error code 84 occurred in an SFC program in BIN value Stores 0 when error code 80 81 or 82 occurred Stores the block stating step number when error code 83 occurs e Stores the transition condition number where error code 84 occurred in an SFC program in BIN value Stores 0 when error code 80 81 82 or 83 occurred Stores the sequence step number of transfer condition and operation output in which error 84 occurred in the SFC program in BIN code Stores the step number when status latch is executed e Stores the step number in a binary value if status latch is executed in a main sequence program Stores the block number and the step number if status latch is executed in a SFC program Block No Step No BIN BIN Higher 8 bits Lower 8 bits
505. pecified in the device initial value setting en specified number of device initial values User setting area When set at the time of formatting 0 to 15k Multiple block online Device init i When set at the time of formatting 0 1 25k 2 5k change setting File register 2 X Number of file register points 362 20 2 X Number of word device points Number of bit device pints 8 x Number of traces 12 X Device range 2 70 6 ao of specified device 7 x total number of M and V points 16 D points 18 x Total points of T ST and C 16 X number of programs EI e Symbols M V D T ST and C stand for the following devices M internal relay Sampling trace data Local device V edge relay D data register T timer ST relative timer C counter 1 136 is the default increases depending on the parameter setting x2 Round down the fractional portions of bit devices 8 total number of M and V points 16 and total number of T ST and C points 16 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 9 4 Memory capacity for files The memory capacity for files indicates a capacity after the files have been written to the memory area For the files transferred from the memory card to the program memory in boot operation note that the secured memory capacity changes after transfer 1 File size unit When files are written to the memory area the storage capacity
506. peed LD X DX Main base unit 4 0 Us DIS Extension base unit 4 8 Us Input module mounted on base extension base unit Input of intelligent function module mounted on base extension base unit Input of I O link module mounted on extension base unit Input used at MELSECNET H network 1 See Section 4 7 1 for details on the refresh mode 10 6 10 6 10 EXPLANTION OF DEVICES MELSEC Q c The same input number can be designated for a refresh input and a direct access input If the number is used as a refresh input after being used as a direct access input the operation is executed with the ON OFF data read by performing a direct access input Operation is based on the ON OFF data read at the input refresh before sequence program operation starts Direct access input Pee is based on the data read from the input module Operation is based on the ON OFF data read at the direct access input Figure 10 3 Refresh Input amp Direct Access Input 1 When debugging a program an input X can be set to ON OFF as described below e OUT Xn instruction OUT X1 ON OFF command A gt X1 e GX Developer test operation 2 An input X can be used in the following cases e Destination device for RX refresh of CC link e Destination device for refresh of link input of MELSECNET H 10 7 10 7 10 EXPLANTION OF DEVICES MELSEC Q 10 2 2 Outputs Y 1 Definition a Outputs
507. peration 1 Outside the PLC construct mechanical damage preventing interlock circuits such as emergency stop protective circuits positioning upper and lower limits switches and interlocking forward reverse operations 2 When the PLC detects the following problems it will stop calculation and turn off all output in the case of a In the case of b it will stop calculation and hold or turn off all output according to the parameter setting a The power supply module has over current protection equipment and over voltage protection equipment b The PLC CPUs self diagnosis functions such as the Watch dog timer error detect problems In addition all output will be turned on when there are problems that the PLC CPU cannot detect such as in the I O controller Build a fail safe circuit exterior to the PLC that will make sure the equipment operates safely at such times Refer to LOADING AND INSTALLATION in High Performance model QCPU Q Mode User s Manual Hardware Design Maintenance and Inspection for example fail safe circuits 3 Output could be left on or off when there is trouble in the output module relay or transistor So build an external monitoring circuit that will monitor any single outputs that could cause serious trouble Design Precautions lt DANGER e When overcurrent which exceeds the rating or caused by short circuited load flows in the output module for a long time it may cause smoke or fire To
508. pes of range in which the latch clear key RESET L CLR switch and remote latch clear operation become valid or invalid in the latch range setting 7 FUNCTION MELSEC Q 3 Clearing the Latch Range Device Data The status of devices to which latch clear is made is shown in the table below Latch setting Clear retention after latch clear Devices not designated in latch range Latch 1 setting Devices with latch clear option Clear Latch 2 setting Devices without latch clear option Refer to Section 4 6 for the clearing method File registers R cannot be cleared with latch clear See Section 10 7 for clearing file registers 4 Precautions a Even if the device has been latch specified it will not be latched the when the local device or the device initialization is specified b The device details of the latch range are maintained with the battery Q6BAT attached to the High Performance model QCPU 1 The battery is necessary to latch the device if ROM operation is performed using the sequence program that has been stored on the standard ROM or memory card 2 Take care that if the battery connector is disconnected from the connector of the High Performance model QCPU when PLC is turned off the latch range device memory is not retained but becomes undefined 7 FUNCTION MELSEC Q 7 4 Setting the Output Y Status when Changing from to STOP Status to from RUN Status 1 Output Y Status when
509. ply CPU module CPU module Motion CPU module gt ro 2 i N pes D fo A module PC CPU module CPU module Power supply Motion CPU Motion CPU module CPU module x1 The PC CPU module occupies two slots b Motion CPUs are mounted together on the slot to the right of the High Performance model QCPU High Performance model QCPUs cannot be mounted to the right of Motion CPUs Mounting is allowed Mounting is not allowed CPU 0 1 Motion CPU Motion CPU rm Power supply module CPU module CPU module Motion CPU a 2 wn pes D fo A c Mount the PC CPU module at the right end in the multiple PLC system No CPU module can be mounted on the right side of the PC CPU module CPU 0 a Motion CPU a 2 wn pes D fo A module CPU module d An empty slot is secured for future addition of a CPU module The number of CPU module including empty slots are set with the No of CPU setting and the type is set in the CPU empty setting from the slot immediately to the right of the number of CPU modules set at the I O Assignment tab screen in the PLC Parameter dialog box For example when four CPU modules have been set with the multiple CPU setting and two High Performance model QCPUs and one Motion CPU have been mounted the High Performance model QCPUs are mounted in the CPU module slot and slot 0 the Motion CPU is mounted in slot 1 and
510. ponse Control PLC operation time bil mode PLC No 2 PLC No 3 PLC E mpty settings should be set as same when using multiple PLC End Cancel l Setup of parameters other than the multiple CPU system settings e Set parameters written onto the hard disk MELSEC Q Selects CPU Empty for the slots on which CPU modules are not to be mounted by type Select Detailed Settings on the I O assignment window to display the detail settings window Control CPU settings required item Selects the control CPUs CPU No 1 to No 4 for each slot e Function version A intelligent function modules set the control CPU No 1 Output modules and special function modules that support the AnS series set a single CPU in all slots or floppy disk 19 6 End 19 6 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 19 2 3 Using existing preset multiple CPU settings and I O allocations GX Developer started up PLC system PLC file PLCRAS Device Program Bootfile SFC 1 0 assignment Label Comment Acknowledge XY assignment Multiple CPU settings Default Check End Cancel No of PLC Online 7 p Refresh setting of PLC3 Change screens Setting 1 Send range for each PLC PLC side device PLC The auto refresh area Caution Dev starting Point 9 S
511. pt program fixed cycle execution type program the block No of the file register in the scan low speed execution type program is saved and then transferred to the interrupt program fixed cycle execution type program b At the time of switching from the interrupt program fixed cycle execution type program to the scan low speed execution type program the saved block No of the file register is felprets Scan low speed Switching Interrupt program Restored Scan low speed i i Executed program execution type ell fixed cycle execution gt execution type program itype program program l l I I 1 Block No Block 4 Transferred RSET KOT t y Block 4 of file register Saved Block 1 0 Restored l l l I 1 Save area Block 0 Block1 Block 1 Block 1 lt Block 1 l l I 10 43 10 43 10 EXPLANTION OF DEVICES MELSEC Q 10 7 File Registers R 1 Definition a File registers are expansion devices for data registers b File register data is stored in files in the standard RAM the memory card Refer to the table as follows CPU Module Type Number of File Registers QO2CPU 32k points QO2HCPU QO6HCPU 64k points Q12HCPU Q25HCPU 128k points x Use a memory card to store much more points if necessary vov wo ma Standard RAM Memory card File register RO AN a l I R1 100 is written to R2 tro
512. put I O mixture 10 ms e Input I O mixture 1 ms 5 ms 10 ms 20 ms 70 ms Section 7 7 High speed input 0 2 ms e High speed input 0 1 ms 0 2 ms 0 4 ms 0 6 ms 1 0 ms i PLC No 1 e PLC No 1 PLC No 2 PLC No 3 No 4 Section 14 2 1 eS a SE SS oss 2 Al 1 module s 1 to 4 modules Section 14 2 1 Stop all CPUs upon error of PLC No n Stop or do not stop all PLCs upon an error of PLC No n Section 14 2 8 Online module change is disabled for Online module change is enabled disabled for other CPU other CPU modules modules Do not permit inputs from outside e Permit or d E f ide th Section 17 2 group ermit or do not permit inputs from outside the group ection 17 Do not permit outputs to outside group Permit or do not permit outputs to outside the group Section 17 2 Setting range of each CPU 0 to 2048 points in 2 point intervals module Max 4k points 4096 points system e Device on CPU side B M Y D R ZR No setting Devices equivalent to the number of points Section 16 1 set for the transmission range from the designated device number are occupied e 16 points are occupied with B M and Y for each point of transmission range e 1 point is occupied with D W R and ZR for each point of transmission range 9 PARAMETER MELSEC Q Table 9 1 Parameter List continued Network parameter E parameters for MELSECNET H Ethernet and CC Q No of module setting 5000H Valid module during other Designates n
513. r Presenceabsene OFF SFC program absent ON SFC program present N o e S n a O program Start stop SFC program OFF SFC program stop ON SFC program start SM252 SM254 SM321 App 4 ON Does not read OFF Reads ON Does not write ON Does not read ON Does not write ON Does not read ON Does not write After the head I O number of the I O module being replaced is set in SD251 is set on line O module replace ment is enabled when this relay is ON Only one module can be replaced at each setting To replace an I O module in the RUN status use the program or a peripheral device to turn this relay ON to replace an I O module in the STOP status turn this relay ON in the test mode of a peripheral device Do not switch between RUN and STOP status until O module replacement is completed Effective for the batch refresh also effective for the low speed cyclic Designate whether to receive arrival stations only or to receive all slave stations Goes ON for standby network If no designation has been made concerning active or standby active is assumed For refresh from link to CPU B W etc indicate whether to read from the link module For refresh from CPU to link B W etc whether to write to the link module Goes ON for standby network If no designation has been made concerning active or standby active is assumed For refresh from link to CPU B
514. r Refer to Section 6 2 for the Format PLC memory screen Do not format ATA card using other than GX Developer If it is formatted using format function of Windows the ATA card may not be usable with set in a CPU module b Precautions When the SRAM card or ATA card is formatted the memory card information area is automatically secured reducing the space by the size of the memory card information area 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 4 Memory capacity Table 6 4 indicates the the memory capacities of the memory cards Table 6 4 Memory Capacity Memory Card Model Memory Capacity Number of Files Stored ame 1011 5 kbyte 1 SRAM card Q2MEM 1MBS 011 5 kbyte 56 files Q2MEM 2MBS 2034 kbyte 1 288 files Q2MEM 2MBF 2035 kbyte 288 files Fasheni card ATA card 1 The indicated memory capacities of the SRAM card and ATA card are those after formatting 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 6 6 Writing Data to the Standard ROM or the Flash Card 6 6 1 Writing Data to the standard ROM or to the Flash card using GX Developer The write to PLC function in the GX Developer Online menu does not allow the user to write files into a standard ROM or on a Flash card For writing files to a standard ROM or to a Flash card by operating from GX Developer GX Developer Online menu provides two functions Write the program memory to ROM an
515. r shared pointers 256 points l0 to 255 Tot The number of device The specified intervals of the system interrupt pointers 128 to 131 can enn Oe Interrupt pointer points is fixed be set with parameters 0 5 to 1000ms 0 5 ms unit Default 128 100ms 129 40ms 130 20ms_ 131 10ms 2048 points SDO to 2047 16 points FXO to F 16 points FYO to F 7 5 points FDO to 4 7 Device having a direct access to link device MELSECNET 10 H use only Specified form JOO XOO JOO YOO JOO WOo JOO BOO JOO Swoo JOO sBoOo maicena ieden Device having a direct access to the buffer memory of the intelligent ntelligent function module device g function module Specified form JOO GOO LO to 8191 default Latch range can be set for B F V T ST C D and W Set parameter values RUN and PAUSE contacts can be set from among X0 to 1FFF to specify Remote RUN PAUSE contact l respectively Year month day hour minute second day of the week Number of device points Link direct device Latch power failure compensation range leap year automatic distinction Clock function Accuracy 3 18 to 5 25s TYP 2 12s d at 0 C Accuracy 3 93 to 5 25s TYP 1 90s d at 25 C Accuracy 14 69 to 3 53s TYP 3 67s d at 55 C Allowable momentary power failure period Varies according to the type of power supply module 5VDC internal current consumption 0 60A 0 64A 0 64A 0 64A 0 64A 98mm 3 86inch H External
516. r 00H in the multiple CPU system For this reason the position of I O number 00H varies according to the number of installed CPUs However because each PC CPU module occupies two slots one slot for CPU and one empty slot the I O number deviates by the number of points set to the empty slot Default empty 16 points 13 5 13 OUTLINE OF MULTIPLE CPU SYSTEM 13 6 6 MELSEC Q Interactive transmission with non control CPUs see Chapter 17 a It is possible to control I O modules and intelligent function modules controlled by the host CPU in the same way as on an single CPU system b It is not possible to output ON OFF data to modules that are not controlled by the host CPU or write in the buffer memory of intelligent function modules It is possible to read I O data from non control modules with PLC parameter settings It is possible to confirm the status of modules controlled by other CPUs the control status of other CPUs and control the host CPU Interactive transmission between each CPU modules on a multiple CPU system see Chapter 16 It is possible to perform the following interactive transmission between each CPU modules with a multiple CPU system a Automatically refreshing the device data between each CPU modules with multiple CPU system parameter settings b Data transfer between other High Performance model QCPU and PC CPU module via CPU shared memory using multiple CPU instructions FROM S TO i
517. r ON program _ Display reset input BKRSTP FO K10H FO to F9 OFF program For details on the LEDR and BKRST instruction refer to the QCPU Q mode QnACPU Programming Manual Common Instructions 10 14 10 14 10 EXPLANTION OF DEVICES MELSEC Q b Processing at anunciator OFF 1 Special register SD62 to SD79 data operation at execution of LEDR instruction a Anunciator No stored at SD64 is deleted and anunciator Nos stored at subsequent registers SD65 to SD79 are moved up to fill the empty space b The anunciator No stored at SD64 is stored at SD62 c 1 is subtracted from the SD63 value d If the SD63 value is 0 SM62 is switched OFF SETF50 SETF25 SETF2047 LEDR FO RO ORI eS spe2 ol 50 50 50 235 spe3 ol gt 1 23 3l 2 sD64 ol gt l 50 50 50 F 25 sD65 o o gt 235 25 OA 2047 sp 6 o 0 o gt 2047 i 0 sp67 o 0 0 soz o of of of oO 2 Special register SD62 to SD79 data operation when an anunciator is switched OFF by the RST F instruction a The anunciator No which was switched OFF is deleted and all subsequent anunciator Nos are moved up to fill the empty space b If the anunciator No stored at SD64 was switched OFF the new anunciator No which is stored at SD64 is stored at SD62 c 1 is subtracted from the SD63 value d If the SD63 value is 0 SM62 is switched OFF SET F50 SET F
518. r erer reer eerrerecreres 2 4 7 23 QNG RUiie cts sentra iene a hers A 18 CAIG PW sees eels cat desea tds ces AS hate A 18 R File register ssesceeeceeseeeseeeseeeeeeees 10 43 Reading from the time data ce 7 9 Real numbers E ccecccsceceseceeeceeeeeeeeeeeees 4 48 10 62 Refresh input eeeeeeeeeeeeeeeeeeeeeeeteeteees 10 6 Index 2 S Refresh Mode ceecsscescesceesceeeneeeneeeents 4 38 Refresh Output ce cceeccsecceeccteceeeeeteeeteeetes 10 9 Remote latch Clear oo eceeeeeseeseeeeeeeeeenteees 7 19 Remote Operation cceeccesceseeeeeeeseeeeeeeees 7 12 Remote PAUSE cccccececeeseeeeeeeeeeeneeaes 7 15 Remote password ccccceeeeees 7 1 7 67 Remote RESET ccccescsscseceeseeteteeeeeeeeeeaes 7 17 Remote RUN STOP ccccssceseeeeeeteees 7 12 Remote station I O nUMbe 00ceeeeee 5 10 Retentive timer OUT ST 02 ccceeesenees 10 21 RUN Status eranen eraino eda 4 35 S Step relay ceccecceceeseeeeeceeeeeeeeseeeeees 10 18 SB Link special relay ceeeeeeeeee 10 18 Scan execution type program s 4 17 SCANIMG i caine ea el ae 4 18 SD Special register cceeeeeeeeeeees 10 34 SD415 2n ms clock setting ccee 8 9 SD520 SD521 Scan time present value 4 18 SD522 SD523 Initial scan time 4 4 16 D524 SD525 Scan time Maximum value 4 18 D526 SD527 Scan time
519. r fault detection programs created by the user b When anunciators switch ON a special relay SM62 switches ON and the Nos and quantity of the anunciators which switched ON are stored at the special registers SD62 to SD79 e Special relay SM62 00 Switches ON if even one anunciator switches ON e Special register SD62 0 No of first anunciator which switched ON is stored here SD68 inaa The number quantity of anunciators which are ON is stored here SD64 to SD79 Anunciator Nos are stored in the order in which they switched ON The same anunciator No is stored at SD62 and SD64 The anunciator No stored at SD62 is also registered in the fault history area c Using annunciators for a fault detection program an equipment fault or fault presence absence annunciator number can be checked by monitoring the special register SD62 to SD79 when the special relay SM62 switches Annunciator ON detection ON PA E ae etc een et ye ee vee E a S E N age 2 1 The program which outputs the No of the ON annunciator F5 is shown below Fault detection program XO X10 SET F5 E IS 7 J SM62 OFF to ON gt SD62 Oto5 SM62 SD63 Oto 1 _ BcpP spe2 K4y20 H SD64 0to5 i SD65 0 i Output of annunciator i No which switched ON SD79 0 10 12 10 12 10 EXPLANTION OF DEVICES MELSEC Q 2 Anunciator ON procedure a
520. racter Third character file SD663 Sixth character Fifth character S Initial SD664 Eighth character Seventh character SD665 First character of extension 2Ex n n n g a Q oO n Wl i Second character of SD666 Third character of extension extension n 6 Instruction Related Registers Corresponding Correspondin Number Name Meaning Explanation ACPU p g SD705 During block operations turning SM705 ON makes it possible to use Mask pattern Mask pattern the mask pattern being stored at SD705 or at SD705 and SD706 if Sp706 double words are being used to operate on all data in the block with the masked values Number of vacant i sn Aa Stores the number of vacant blocks in the communications request i communicati S During SD714 ii Request area for remote terminal modules connected to the execution q MELSECNET MINI S3 registration areas Patterns masked by use of the IMASK instruction are stored in the SD715 following manner IMASK b15 to b1 b0 saris perucion Mask pattern D715 115 i Danie execution mask pattern SD716 131 117 SD717 SD717 S078 accumulator Accum e For use as replacement for accumulators used in A series programs su New Program No Program No desidnation d sicnation Stores the program number of the program to be loaded by the SD720 g g PLOAD instruction when designated for PLOAD for PLOAD iat gt
521. ram o x x x x Program eee Pe oe eo Devicecommet o x x a x a Deviceinitalvaue x x x x S x x File register A Local device Debug data Failure history data PLC user data x x Program file A The file write during RUN allows writing three types of files e Program program memory SRAM card ATA card x x x X XXIX x x x x O Writable data Unwritable data A Writable data if access is not being made in sequence program Personal computer GX Developer e Device comment program memory SRAM card ATA card e File register standard RAM SRAM card Any other files cannot be written while the High Performance model QCPU is in the RUN status 7 FUNCTION MELSEC Q 2 Precautions The precautions for file write during RUN are as follows a The file write during RUN can be executed when any of the following conditions is met 1 Program memory e When continuous space is available e When space is available 2 Memory card e When space is available b Please note that scan time could be extended as shown below in the table if the file write during RUN is executed Controls are stopped for some time as specified by a value in the table QncPU_ _QnHCPU When continuous space is available in a program memor When space is available in a program memor max 80 ms max 300 ms When space is available in a memory card except ATA card Pl
522. rameter printing Power model name Designate the model name of the installed power supply module with 16 or less characters High Performance model QCPU does not use the designated model name It is used as a user s memo or for parameter printing Increase cable name Designate the model name of the extension cable being used with 16 or less characters High Performance model QCPU does not use the designated model name It is used as a user s memo or for parameter printing Points Used with High Performance model QCPU Select the number of points for the slot of the base unit being used from the followings 2 2 slots e 3 3 slots 5 5 slots 8 8 slots e 10 10 slots e 12 12 slots 8 fixation 12 fixation Used with High Performance model QCPU Select either option to designate the number of slots for all base units to the same number 5 ASSIGNMENT OF I O NUMBERS 5 4 What are I O Numbers MELSEC Q O numbers are used in sequence programs for importing ON OFF data to High Performance model QCPU from outsides and outputting ON OFF data from High Performance model QCPU to outsides Input X is used for the importing of ON OFF data to High Performance model QCPU Output Y is used for outputting ON OFF data from High Performance model QCPU I O numbers are expressed as hexadecimal When using 16 point I O modules I O numbers are consecutively assigned to the slots having 0 to
523. rangmission ous Block 42 one scan turns on when the M1754 Transmission trigger uncompleted SM1754 z AN S status M1755 jend flag ON Transmission SM1755 PE Poo ng Cata transmissi n change New ak as been completed M1756 end SM1756 M1757 SM1757 M1758 SM1758 M1759 SM1759 M1760 SM1760 M1761 SM1761 M1762 SM1762 M1763 SM1763 M1764 SM1764 M1765 SM1765 M1766 SM1766 M1767 SM1767 M1768 SM1768 M1769 SM1769 M1770 SM1770 M1771 SM1771 M1772 SM1772 M1773 SM1773 M1774 SM1774 M1775 SM1775 App 21 App 21 APPENDICES MELSEC Q APPENDIX 2 Special Register App 22 The special registers SD are internal registers with fixed applications in the PLC For this reason it is not possible to use these registers in sequence programs in the same way that normal registers are used However data can be written as needed in order to control the CPU modules and remote I O modules Data stored in the special registers are stored as BIN values if no special designation has been made to the contrary The headings in the table that follows have the following meanings e Indicates whether the relay is set by the system or user and if it is set by the system when setting is performed lt Set by gt S Set by system U Set by user Sequence programs or test operations from GX Developer S U Set by both system and user lt When set gt Indicated only for registers set by system Each END Set duri
524. rder to use retentive timers a retentive timer number of points used setting must be designated at the Device tab screen in the PLC Parameter dialog box 10 21 10 21 10 EXPLANTION OF DEVICES MELSEC Q Timer Processing and accurac a When an OUT T instruction is executed the following is processed timer coil ON OFF current value update and contact ON OFF processing Timer current value update and contact ON OFF processing are not performed at END processing Ladder example fa Processing at execution of OUT TO instruction EN OUT TO END Sequence f program gt Processing content Coil ON OFF Current value update Contact ON OFF b When the OUT T instruction is executed the current value is added to the scan time measured at the END instruction If the timer coil is OFF when the OUT T instruction is executed the current value is not updated Ladder example Fo __as Current value update timing OUT TO OUT TO OUT TO OUT TO OUT TO OUT TO END END END END END END processing processing processing processing processing processing Program 1 1 i ON oi a a XO external input OFF ane he ee E A ON i i i i i i i i i qcpusxo POER E o a ON i i i i i TO coil OFF bed a Cos SER o i TE ON a TO contact OFF iar bias Lo fo Ly im ae oe a a a a e a measurement P a es a ee Measured value 3 s 7 at END instruc
525. re link relay latch is performed Latch relay b There are no restrictions on the number of contacts N O contacts N C contacts used in the program No restrictions on the quantity used BO switches ON at X0 OFF to ON SET BO H The link relay B0 ON can only be used for internal QCPU processing and cannot be output externally K20 To 4 Y20 gt BO ON OFF information is output from the output module to an external destination B100 gt HH kB Fre 4 Figure 10 7 Link Relay 2 Using link relays in the network system In order to use link relays in the network system a network parameter setting is required Link relays for which no network parameter setting has been designated can be used as internal relays or latch relays 1 For details on the network parameters refer to the For Q Corresponding MELSECNET H Network System Reference Manual 2 The MELSECNET H Network Module has 16384 link relay points assigned High Performance model QCPU has 8192 link relay points assigned When using subsequent points after Point 8192 change the number of link relay points at the Device tab screen in the PLC Parameter dialog box 10 17 10 17 10 EXPLANTION OF DEVICES 10 2 8 Link special relays SB 1 Definition MELSEC Q a A link special relay indicates the communication status and error detection of an intelligent function module such as the MELSECNET H Network Module b
526. re set for the CPU No 1 Intelligent functional module detailed setting x Error time Slot Type Model name output mode Q PLC PLC No 1 1 PLC PLC No 2 2 PLC PLC No 3 3 PLC PLC E mpty Isettings should be set as same when using multiple PLC Cancel 14 16 14 16 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 3 Multiple CPU setting and I O Assignment checks Checks as shown in table 14 4 will be run to ascertain that all CPU modules have the same settings sameness check when the description column in table 14 3 has been set with the O symbol and the power to the sequence is switched on the High Performance model QCPU is reset or the status is changed from STOP to RUN a The multiple CPU system will be started up if all CPUs have the same settings b The operations described in table 14 4 will be performed when all CPUs do not have the same settings In this event check the multiple CPU settings and I O Assignment and set all CPUs with the same settings To start the multiple CPU system reset the High Performance model QCPU for CPU No 1 or turn off and on the CPU power ON gt OFF gt ON For the action after the High Performance model QCPU for CPU No 1 is reset see Section 14 2 7 Table 14 4 List of sameness check contents e A comparison check will be run on the When CPU No 1 is reset multiple CPU
527. refresh e Local devices e CC Link automatic refresh e Execution of multiple programs e Sampling trace e Installation removal of a memory card e GX Developer monitoring e File register with the same filename as a program 1 MELSECNET H refresh MELSECNET H refresh requires additional processing time to refresh data between the High Performance model QCPU and the MELSECNET H network module For details on MELSECNET H refresh time see Q Corresponding MELSECNET H Network System Reference Manual 2 CC Link automatic refresh Refresh time between the High Performance model QCPU and CC Link master local module a When module is QJ61BT11N Refer to the following manual for CC Link automatic refresh processing time e QJ61BT11N CC Link System Master Local Module User s Manual Details b When module is QJ61BT11 Refer to the following manual for CC Link automatic refresh processing time e QJ61BT11 CC Link System Master Local Module User s Manual Details 11 2 11 HIGH PERFORMANCE MODEL QCPU PROCESSING TIME MELSEC Q 3 Sampling trace time Sampling trace requires additional processing time When sampling trace data is specified to execute the sampling trace function add the sampling trace time to the total processing time The table below shows the length of processing time required when sampling trace data is specified to assign 50 internal relay points for bit devices and 50 data register points for word deices CPU Type
528. request was made S Initial When this relay is ON starts from execution block and U execution step active at time SFC program was stopped ON is enabled only when resumptive start has been designated at parameters SM902 is not automatically designated for latch e When this relay is OFF transition occurs at one scan one step for all blocks e When this relay is ON transition occurs continuously for all blocks in one scan In designation of individual blocks priority is given to the continuous transition bit of the block Designation is checked when block starts When continuous transition is effective goes ON when continuous transition is not being executed goes OFF when continuous transition is being executed e Normally ON when continuous transition is not effective When block stops selects active step operation output All coil outputs go OFF when this relay is OFF Coil outputs are preserved when this relay is ON Selects the device status when the stopped CPU is run after the sequence program or SFC program has been modified when the SFC program exists Selects the output action of the step being held when a block is ended by executing the end step All coil outputs go OFF when this relay is OFF Coil outputs are preserved when this relay is ON e Asynchronous mode Mode where the operations for the low speed execution type program are continued during the excess time Synchronous mode Mo
529. ression will be 3F400000n as shown below Code Characteristic Mantissa 0 01111110 01000000000000000000000 a V JA y J V J y LS y JA y i y HN y i j 4 1 4 t 3 F 4 0 0 0 0 0 POINT 1 The monitor function for GX Developer permits monitoring the real number data of the High Performance model QCPU However if an attempt is made to monitor the data that cannot be represented as a real number e g FFFFH is displayed For a 0 value 0 will be indicated at all the bO to b31 bits It is possible to select either Perform internal arithmetic operation in double precision or Do not perform internal arithmetic operation in double precision with the floating point arithmetic processing on the PLC parameter s PLC system settings The result of the operation will be short precision regardless of the floating point arithmetic processing setting It is recommended that Do not perform internal arithmetic operation in double precision is selected if increased speed for the real arithmetic operations is required and Perform internal arithmetic operation in double precision is selected if precision is required when applying compatibility with conventional equipment e Only internal arithmetic operations will be performed at double precision 64 bits when Perform internal arithmetic operation in double precision is selected default setting Precision will be increased for commands that use many real arithmetic operations w
530. rmation ease eae ia Low speed OFF Completed or not program executed erected execution flag ON Execution under way processing e When this relay goes from OFF to ON the module service interval designated by SD550 is read to SD551 to SD552 Goes ON when low speed execution type program is Reads module OFF Ignored service interval ON Read 5 Memory cards Riki Memory card A OFF Unusable a l SM600 usable flags ON Use enabled ON when memory card A is ready for use by user S Initial SM601 Memory card A OFF No pr tect Goes ON when memory card A protect switch is ON S Initial protect flag ON Protect OFF No drive 1 F a SM602 Drive 1 flag ON Drive 1 present Goes ON when drive 1 card 1 RAM area is present S Initial OFF No drive 2 5 SM603 Drive 2 flag ON Drive 2 present Goes ON when drive 2 card 1 ROM area is present S Initial Meinory tard A OEE Not used Goes ON when memory card A is in use S Initial in use flag ON In use Memory card A OFF Remove insert enabled remove insert ON Remove insert prohibit flag prohibited Turned ON by user to enable the removal insertion of z memory card Memory card OFF Remove insert remn veikesit prohibited oe m by the system after the memory card is u s New enable flag ON Remove insert enabled i U on Q O BK Goes ON when memory card A cannot be inserted or removed e This contact can be used only when S
531. rom hot start to initial start in the operation mode when the S Initial New module start up CPU module is started up Switch request Request origin Stores the request origin at work No when the SM1590 is S Error SD1590 New network No network No turned on occurrence e Shows the detailed error contents for the error that occurred S Error in the process control instruction occurrence 1 Stores the host system CPU information App 56 App 56 APPENDICES MELSEC Q 14 For redundant systems Other system CPU information 1 for Q4AR only SD1600 to SD1659 is only valid during the back up mode for redundant systems and refresh cannot be done when in the separate mode When a standalone system SD1600 to SD1699 are all 0 Special Register List Corresponding i Correspondin Number Name Meaning Explanation Rena ACPU Ponsa e Stores as BIN code the error No of the error that occurred Diagnosis error k z No during the other system CPU module diagnosis i e Stores the latest error currently occurring D1601 5 P SD1600 stores the updated date and time Diagnosis error P an D1602 Diagnosis error Stores each of the BCD two digits occurrence p1603 time occurrence time Refer to SD1 to SD3 for the storage status SD1 SD1601 SD2 SD1602 SD3 SD1603 Error Error Stores the error comment information individual information D1604 information information classification code classification _ c
532. rrupt pointers are used as labels at the beginning of interrupt programs Interrupt pointer interrupt program label a lt A Interrupt program IRET b A total of 256 interrupt points 10 to 1255 can be used total for all programs being executed 2 Interrupt pointer No amp interrupt factor a As shown below there are four types of interrupt factor e QI60 A1S161 factor Interrupt input from the QI60 A1SI161 interruption module e Sequence start generator Interruption input from special function module factor modules which can dictate an interrupt start to the High Performance model QCPU QI60 A1SI61 excluded e Internal time factor Fixed scan interruption by High Performance model QCPU s internal timer e Error interruption Interruption by an error that does not stop sequence program operation e Intelligent function Interruption by an intelligent function module module interrupt 1 1 To use the intelligent function module interrupt the intelligent function module setting interrupt points setting is required at the PLC system tab screen in the PLC Parameter dialog box For the interrupts from the intelligent function module see Section 8 2 1 10 57 10 57 10 EXPLANTION OF DEVICES MELSEC Q b A list of interrupt pointer Nos and interrupt factors is given in Table 10 5 below Table 10 5 List of Interrupt Pointer N
533. rrupt program fixed scan execution type program s execution time will become the low speed scan time 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q b The low speed scan time is measured by the High Performance model QCPU and the result is stored in special registers SD528 to SD535 1 The low speed scan time can therefore be checked by monitoring the SD528 to SD535 special registers Current value SD528 SD529 Minimum value SD532 SD533 Maximum value SD534 SD535 gt Stores less than 1 ms low speed scan time unit u gt Stores the low speed scan time in 1 ms units If the SD528 value is 50 and the SD529 value is 400 the low speed scan time is 50 4 ms x1 The accuracy of the scan time stored at the special registers is 0 1 ms The scan time count will continue even if a watchdog time reset instruction WDT is executed in the sequence program 7 Low speed execution monitor time The execution time of the low speed execution type program can be monitored by this timer The default value is not set When monitoring the execution time of the low speed execution type program designate the low speed execution monitor time in a 10 to 2000 ms range at the PLC RAS tab screen in the PLC Parameter dialog box Setting unit 10 ms If the execution time of the low speed execution type program exceeds this timer setting a PRG TIME OVER error occurs The low speed
534. rs 1O control mode D9014 D1014 O control mode h mber 0 Both input and output in direct mode 1 Input in refresh mode output in direct mode 3 Both input and output in refresh mode The operation status of CPU as shown below are stored in SD203 b15 to bi2b11 to be b7 to Remote RUN STOP CPU key switch b ti E o R of RN Operating status Operating status of s D9015 SD1015 Sian pe emg STEP RUN Remains the same in remote RUN STOP mode Status in program Remote RUN STOP 0 Except below ey parameter seina STOP 1 instruction execution PAUSE 341 x 1 When the CPU mdoule is in RUN mode and SM1040 is off the CPU module remains in RUN mode if changed to PAUSE mode Main program ROM Main program RAM Subprogram 1 RAM Subprogram 2 RAM Subprogram 3 RAM Subprogram 1 ROM Indicates which sequence program is run presently D016 ame Subprogram 2 One value of 0 to B is stored in BIN code ROM Subprogram 3 ROM Main program E PROM Subprogram 1 E PROM Subprogram 2 E PROM Subprogram 3 E PROM If scan time is smaller than the content of SD520 the D9017 SD1017 SD520 Sean tine Minimum Apel time value is newly stored at each END Namely the l 10 ms units minimum value of scan time is stored into SD520 in BIN code n tim n time i red in BIN h END an D9018 SD1018 SD524 Scan time Scan ti e Scan time E stored i code at eac and 10 ms units always rewr
535. rset the channel 63 0 2 b15 to use by control vy data Channel _ ee 4 Channel ae ee EES Ennn 2 b A completion device should be designated for the instruction dedicated for intelligent function modules The designated completion device turns ON for one scan when the execution of the instruction dedicated for intelligent function modules is completed When the completion device turns ON another instruction dedicated for intelligent function modules can be executed to the same intelligent function module To use two or more instructions dedicated for intelligent function modules to one intelligent function module be sure to execute the next instruction dedicated for intelligent function modules after the completion device turns ON 2 Note a b If the instruction dedicated for intelligent function modules are executed and High Performance model QCPU is switched from RUN to STOP before the completion device turns ON the completion device turns ON one scan later when High Performance model QCPU is switched to RUN next time The instruction dedicated for intelligent function modules can be executed to the intelligent function modules of the main base unit and extension base unit The instruction dedicated for intelligent function modules cannot be executed to the intelligent function module installed to the remote I O station of MELSECNET H
536. rupt or fixed scan execution type program to a scan or low speed execution type program 10 42 10 42 10 EXPLANTION OF DEVICES MELSEC Q b When High speed execution is selected 1 If a scan execution type program low speed execution type program is switched to an interrupt program fixed scan execution type program index register data will not be saved restored 2 If data is written to index registers by using an interrupt program fixed scan execution type program the values of index registers used for an scan low speed execution type program will be corrupted i Switch Scan low speed ing Interrupt program ess t Scan low speed Executed program execution type i Fixed scan execution i execution type program itype program i program Transf Trans Zo 1 Sred 1 70 1 to Zo 3 ered 1 _ 79 3 Index register value Index register storage area For scan low speed Z0 0 ZO0 0 execution type program x For interrupt program Z0 is changed to 3 3 Before writing data to index registers by using an interrupt program fixed scan execution type program use the ZPUSH ZPOP instruction to save restore the data SM400 A The points after DO stores the 10 zPUSH DO E data Z0 to 215 SM400 POP DO The data after DO is stored 7 in points ZO to Z15 PRET 2 File register block No processing a At the time of switching from the scan low speed execution type program to the interru
537. s OT o x 10 45 10 45 10 EXPLANTION OF DEVICES MELSEC Q 10 7 3 Registering the file registers To use file registers register the file registers with the High Performance model QCPU in the following steps Setting of file register to be used TEE PLC file tab screen at PLC parameter dialog box PLC name PLCsystem PLCfile PLCRAS Device Program Bootfie SFC 1 0 assignment p Fie register Initial Device value Notused Notused Use the same file name as the program C Use the same file name as the program g Memory card RAM 7 Corresponding x memory memory Use the following file Use the following file Corresponding Corresponding 7 memory memory File name File name Capacity K points 1K 1018K points j Comment file used in a command r File for local device Notused Notused C Use the same file name as the program Use the following file Corresponding i Corresponding memory memory Use the following file Corresponding E E File name memory File name Acknowledge XY assignment Multiple CPU atinas Defaut Check End Cancel Use the following files is selected Not used or Use the same file name as the program is selected File register setting E Creating new device memory screen Device Label RO Z Display ieit integer z pec z Ro Ra2767 2 3 4 5 a at Device name o 1 6
538. s a ea a 04011 32 k words 64 kbytes or earlier QO2HCPU 04012 64 k words 128 kbytes or later 04011 32 k words 64 kbytes or earlier QO6HCPU 04012 64 k words 128 kbytes or later Q12HCPU 02092 128 k words or later 256 kbytes 02091 32 k words 64 kbytes or earlier Q25HCPU 02092 128 k words or later 256 kbytes 02091 32 k words 64 kbytes or earlier 1 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 4 Precautions When setting file registers and local devices in the standard RAM memory capacity is secured in 1024 byte units for the Q12HCPU Q25HCPU that have the serial number whose upper five digits are O2092 or later Memory capacity is secured in 512 byte units for the Q12HCPU Q25HCPU Q02CPU QO02HCPU and QO6HCPU that have the serial number whose upper five digits are 02091 or earlier When specifying file registers using the serial access method ZRO with commands that access the standard RAM on 02092 and subsequent High Performance model QCPUs the amount of time required for processing each command from 02091 and previous High Performance model QCPUs will be prolonged QnCPU Average 0 65us QnNHCPU Average 1 1us The processing time when the MOV command is used is shown below Q12HCPU Q02CPU Command 02092 02091 02092 02091 a later lt a earlier later ae earlier MOV KO RO Lott ont O oz oe MOV
539. s stopped and an error that can be detected by the self diagnosis function occurs b Remote RESET can reset the High Performance model QCPU remotely when an error occurs for which the High Performance model QCPU cannot be operated directly Remote RESET can be executed only in STOP status When the High Performance model QCPU is in RUN status use Remote STOP to arrange the STOP status Remote RESET Method The remote RESET can only be performed from GX Developer or by operating serial communication module To perform the remote RESET follow the following steps a Atthe PLC system tab screen in the PLC Parameter dialog box check the Allow check box at the Remote reset section and then write parameters to the High Performance model QCPU Qn H Parameter PLE name PLC system PLCfile PLC RAS Device Program Boot file SFC 1 0 assignment Timer limit setting Low 100 z E ms 1ms 1000ms High 10 0 seed ms 0 1ms 100ms m RUN PAUSE contacts Common pointer No P After 0 4095 Points occupied by empty slot 46 Points Allow the Remote reset r System interrupt settings MN ce aiii Interrupt counter start No C 0 768 PAUSE Xx 0 1 FFF Fixed scan interval Re reset 128 100 0 ms 0 5ms 1000ms ivi 129 40 0 ms 0 5ms 1000ms 130 20 0 ms 0 5ms 1000ms 131 10 0 ms 0 5ms 1000ms r Floating point arithmetic processing _ Perform intemal arithm
540. s an operation with ON OFF data The data is read by performing an input refresh before the sequence programs is executed 1 CPU module Input module Acquisition of ON OFF data Input refresh area ON OFF data The refresh input is indicated as Xi in the sequence program For example a 10 input becomes X10 2 The direct access input executes an operation with ON OFF data The data is read from an input module when the instruction is executed 2 CPU module Input module Input refresh area Acquisition of ON OFF data DX10 4 ran The direct access is indicated as DX 2 in the sequence program For example a 10 input becomes DX10 The direct access input can be made in a LD AND OR instruction that uses an input in units of 1 point b Differences between refresh input and direct access input The direct access input accesses an input module directly when an instruction is executed which results in slower processing speed compared with the refresh input The direct access input is used only for inputting to the input module or the intelligent function module special function module mounted on the main base unit or extension base unit The refresh input and direct access input differences are shown in Table 10 2 below Table 10 2 Differences Between Refresh Refresh Input Direct Access Inputs Main base unit 8 0 us 0 079 4s Extension base unit 8 0 Us Processing s
541. s are accepted 0 05 M9030 SM1030 0 1 second clock seconds 0 05 seconds 0 1 0 1 0 1 second 0 2 second 1 second and 2 second clocks M9031 SM1031 0 2 second clock seconds are generated seconds Not turned on or off per scan but turned on and off even during scan if corresponding time has elapsed 0 5 M9032 SM1032 1 second clock seconds ae Starts with off when PLC power supply is turned on or Secon CPU module reset is performed M9033 SM1033 Le App 12 App 12 F 2 second clock seconds 1 seconds x 1 minute clock indicates the name of the special relay M9034 of the ACPU APPENDICES MELSEC Q Special Relay List Continued ACPU Special Special Special Relay after Relay for Meaning Details Relay Conversion Modification Alternates between ON and OFF according to the 2n minute clock seconds specified at SD414 Default n 30 M9034 SM1034 1 minute seconas n f Not turned on or off per scan but turned on and off even lock seconds during scan if corresponding time has elapsed ce e Starts with off when PLC power supply is turned on or CPU module reset is performed pcs fours weon ON Used as dummy contacts of initialization and application instruction in sequence program ON SM1038 and SM1037 are turned on and off without M9037 SM1037 Always OFF OFF regard to position of key switch on CPU module front SM1038 and SM1039 are under the same conditio
542. s below rated value Stays ON subsequently even after normal operation is restored e Synchronous with BAT ALA BAT LED Same as SM51 but goes OFF subsequently when S Error battery voltage returns to normal Comes ON it a momentary power interruption of less than 20ms occurred during use of the AC power supply module and reset by turning the power OFF then ON Comes ON if a momentary power interruption of less than 10ms occurred during use of the DC power supply module and reset by turning power OFF then ON Comes ON if a momentary power interruption of less than 1ms occurred during use of the DC power supply Error module and reset by turning power OFF then ON S Goes ON if MINI S3 link error is detected at even one of the installed AJ71PT32 S3 modules S Error Stays ON subsequently even after normal operation is S ON when operation error is generated Stays ON subsequently even if normal operations restored restored output modules Comes ON if there is a discrepancy between the actual O modules and the registered information when the power is turned on S Error M9002 O module verification is also conducted for remote I O station modules Instruction execution Goes ON if error is detected by CHK instruction S Stays ON subsequently even after normal operation is Instruction restored execution Goes ON when measurement of step transition watchdog timer is comme
543. s designated in 16 point units 2 Amaximum of 32 k points can be designated for one device The maximum total number of points for the internal relay latch relay anunciator edge relay link relay link special relay step relay timer retentive timer and counter is 64 k points 1 point is calculated as 2 points 1 for coil 1 for contact for the timer retentive timer and counter Default value Dev point can be changed for the device where a Dev point value is shown in brackets Multiple CPU settings 2 Memory capacity Use the following expression to obtain the memory capacity of an internal user device 3 7 Bit devices capacity Word devices capacity Timer retentive timer and counter capacity lt 29k a For bit devices For bit devices 16 points are calculated as 1 word M L F V B total number of points 16 Bit device capacity Word 10 3 10 3 10 EXPLANTION OF DEVICES MELSEC Q b For timer T retentive timer ST and Counter C For the timer retentive timer and counter 16 points are calculated as 18 words T ST C total number of points 16 Timer retentive counter capacity x 18 Word c For word devices For data registers D and link registers W 16 points are calculated as 16 words D W total number of points 16 Word device capacity x 16 Word 1 When an internal user device s number of u
544. s flickering 11 2 7 Flowchart for when ERR LED is on flickering 11 2 8 When USER LED is turned on 11 2 9 When BAT LED is turned on 11 2 10 Flowchart for when BOOT LED is flickering 11 2 11 Flowchart for when output module LED is not turned on 11 2 12 Flowchart for when output load of output module does not turn on 11 2 13 Flowchart for when unable to read a program 11 2 14 Flowchart for when unable to write a program 11 2 15 Flowchart for when it is unable to perform boot operation from memory card 11 2 16 Flowchart for when UNIT VERIFY ERR occurs 11 2 17 Flowchart for wnen CONTROL BUS ERR occurs 11 3 Error Code List 11 3 1 Procedure for reading error codes 11 3 2 Error code list 11 4 Canceling of Errors 11 5 I O Module Troubleshooting 11 5 1 Input circuit troubleshooting 11 5 2 Onput circuit troubleshooting 11 6 Special Relay List 11 7 Special Register List APPENDICES APPENDIX 1 Error Code Return to Origin During General Data Processing APPENDIX 1 1 Error code overall explanation APPENDIX 1 2 Description of the errors of the error codes 4000H to 4FFFH APPENDIX 2 External Dimensions Diagram APPENDIX 2 1 CPU module APPENDIX 2 2 Power supply module APPENDIX 2 3 Main base unit APPENDIX 2 4 Slim type main base unit APPENDIX 2 5 Extension base unit APPENDIX 3 Upgraded Functions of High Performance model QCPU APPENDIX 3 1 Specification comparison APPENDIX 3 2 Function comparison APPENDIX 3 3 Usability of added functions depending
545. s off 1 is on and 2 is flicker a to nen to ee to m to i 1 l 1 gt 4 gt 4 gt 4 gt 4 gt 4 gt 4 gt 4 gt S Status O O chariis BOOT CARD A Memory card A CARD B Memory card B i Vacant Bit pattern of Stores bit patterns of LEDs turned off SD202 LED off LED that is Only USER and BOOT enabled turned off e Turned off at 1 not turned off at 0 The operating status of the remote I O module is stored in the following format b15 to b4 b3 to b0 i i i S Always New Remote 4 gt lt gt Vacant Remote I O module operating status Always 2 STOP e The CPU operating status is stored as indicated in the following figure b15 to b12b11 to b8 b7 to b4 b3 to bO 5 L L L L L fi q L 1 L pa L L L ms peraing Operatin SD203 status of ne er Q Operating status of CPU 0 RUN one 1 lt STEP RUN 2 STOP S Every D9015 format 3 PAUSE END change O STOP PAUSE cause 0 RUN STOP switch processing 1 Remote contact 2 Remote operation from the GX Developer or Serial Communication 3 Internal program instruction Note Priority is earliest first 4 Errors Test not yet executed During X Device test i device test execution Set when the device test mode is executed on GX Developer Remote During Y device test During X Y device test R type Request
546. s performed at the leading edge OFF to ON of the OUT C instruction The current value is not updated in the following OUT C instruction statuses OFF ON to ON ON to OFF Ladder example XO K10 co Current value update timing END OUT CO END OUT CO END OUT CO Sequence l program i i i ON i i XO OFF ON CO coil OFF Current value update Current value update 10 24 10 24 10 EXPLANTION OF DEVICES 10 25 MELSEC Q c Multiple counters can be used within a single scan to achieve the maximum counting speed In such cases the direct access input DX 2 method should be used for the counter input signals 1 OUT OUT OUT OUT OUT END Ci Ci Ci END Ci Ci Sequence i i i a n a wn A O 3 Resetting the counter a Counter current values are not cleared even if the OUT Cc instruction switches OFF Use the RST C instruction to clear the counter s current value and switch the contact OFF gt OUT C _ execution intervals b The count value is cleared and the contact is switched OFF at execution of when the RST C lt instruction Ladder example XO ec rR co Counter reset timing END RST CO END RST CO END RST CO Sequence program ON i i i X0 OFF Execution RSTCO OFF gt instruction t t Count value cleared amp contact OFF Count value cleared amp contact OFF 4 Precautions for resetting the counter When the R
547. s stored on the specified drive that file register file is used e If a file register file with the specified filename is not found on the specified drive a PARAMETER ERROR 3002 will occur e When an ATA card is used a memory card ROM cannot be registered with the targeted memory If a memory card is registered with the targeted memory a parameter error 3000 will occur when a file register file is written to the High Performance model QCPU 2 File Register Setting Use the device memory screen to specify a filename of a file register file a Device Label RO Z Display 6b integer z pec z Ro Ra2767 2 3 4 5 6 Lb be Device name 0 1 E G a elololololololololololololo ollo elololololololololololololololo elololololololololololololololo elololololololololololololololo elololololololololololololololo elololololololelolololololololo elelolololololololololololololo a Setting the file registers Type Rn in the list box to view a listing of file registers b Setting the parameters Enter the desired data in columns to specify file registers This step is not needed when you specify only the capacity of file registers 10 48 10 48 10 EXPLANTION OF DEVICES 3 10 49 MELSEC Q Registering the File Register File with the High Performance model QCPU If you click on the
548. s the designated conditions to a scan execution type program by using a constantly executed scan execution type program as the management program Then execute the converted program Scan execution type programs which are not required can be converted to stand by type programs e Execute types of ABC DEF GHI and JKL stand by type programs are converted as shown below Scan execution type program Control program Mo r HH pPscan M1 aseles H HH pPsToP PSCAN ABC ABC DEF e PSCAN is an instruction that switches the specified ABC program to a scan execution type program PSTOP is an instruction that switches the specified ABC program to a stand DEF by type program Stand by Stand by Stand by type type type program program program ABC DEF GHI Stand by type program JKL 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 2 When changing the execute type of the scan execution type programs and stand by type programs by the scan execution type programs having the condition for switching the execution type e The scan execution type program being executed changes the next program to be executed from a stand by type program to a scan execution type program e If the condition realizes when ABC and GHI programs have been set to scan execution type and DEF program to stand by type th
549. sable points setting is changed the following files which were created under the previous setting cannot be used as they are e The sequence program e The SFC program After changing the setting the sequence program and SFC program must be read from the High Performance model QCPU to GX Developer and then they must be written back to the High Performance model QCPU again 10 4 10 4 10 EXPLANTION OF DEVICES MELSEC Q 10 2 1 Inputs X 1 Definition a Inputs transmit commands or data to the High Performance model QCPU from an external device such as push button switches selector switches limit switches digital switches Push button switch Selector switch Input X Sequence operation Digital switch b If the input point is the Xn virtual relay inside the High Performance model QCPU the program uses the Xn s N O contact or N C contact Virtual relay 1 Programmable controller Input ladder external device Program Figure 10 1 Inputs X c There are no restrictions on the number of Xn N O contacts and N C contacts used in a program provided the program capacity is not exceeded No restrictions on the quantity used Figure 10 2 Input X Used in Program 10 5 10 5 10 EXPLANTION OF DEVICES MELSEC Q 2 Reading the inputs a There are 2 types of input refresh inputs and direct access inputs 1 The refresh input execute
550. same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU setting Default Check End Cancel 3 Reactions a Higher input response time may result in response to inputs being influenced by noise Set the desired input response time by taking into consideration the operating environment of an input module in use PE 4 KIKIKIKIKIKIKIKIKIK settings should be set as same when using multiple PLC Eng ema b No change can be made to the input response time of an AnS Series corresponding input module An input response time setting is not made for a slot of an AnS Series corresponding input module c The input response speed setting is valid in the following cases e After the PLC is turned on e When the High Performance model QCPU is reset 7 FUNCTION MELSEC Q 7 7 2 Selecting the response time of the high speed input module 1 Selecting the response time of the high speed input module Changing the response time of the high speed input module means to amend the input response speed for high speed input modules QX40 S1 that support the Q Series to 0 1 ms 0 2 ms 0 4 ms 0 6 ms and 1 ms Input from external devices is accepted at the input response speed set for the high speed input module The default setting for the input response time is 0 2 ms ON External input or ON High speed OFF
551. sary by industry standards had been provided 4 Failure that could have been avoided if consumable parts battery backlight fuse etc designated in the instruction manual had been correctly serviced or replaced 5 Failure caused by external irresistible forces such as fires or abnormal voltages and Failure caused by force majeure such as earthquakes lightning wind and water damage 6 Failure caused by reasons unpredictable by scientific technology standards at time of shipment from Mitsubishi 7 Any other failure found not to be the responsibility of Mitsubishi or the user 2 Onerous repair term after discontinuation of production 1 Mitsubishi shall accept onerous product repairs for seven 7 years after production of the product is discontinued Discontinuation of production shall be notified with Mitsubishi Technical Bulletins etc 2 Product supply including repair parts is not possible after production is discontinued 3 Overseas service Overseas repairs shall be accepted by Mitsubishi s local overseas FA Center Note that the repair conditions at each FA Center may differ 4 Exclusion of chance loss and secondary loss from warranty liability Regardless of the gratis warranty term Mitsubishi shall not be liable for compensation to damages caused by any cause found not to be the responsibility of Mitsubishi chance losses lost profits incurred to the user by Failures of Mitsubishi products damages and secondary da
552. sed High Performance model QOPU Q02CPU QO02HCPU QO6HCPU Q12HCPU Q25HCPU Motion CPU 4 Battery Q6BAT 00 00000 k ajam D00 00000 ee Battery Battery holder Q7BAT Q7BAT SET O 8 Slim type main base unit Q32SB Q33SB Q35SB 2 POINT 1 One memory card is installed Select the memory card from the SRAM card Flash card and ATA card according to the application and capacity When the memory card available on the market is used operation is not guaranteed Slim type power supply module 3 1 O module Intelligent function module x2 The slim type main base unit does not have an extension cable connector The extension base or GOT cannot be connected 3 As a power supply module use the slim type power supply module Q61SP The Q61P A1 Q61P A2 Q62P or Q64P cannot be used as a power supply module x4 The Motion CPU do not accept a battery 14 2 14 2 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 2 Configuration of peripheral devices for High Performance model QCPU USB cable gt 1 To be procured yourself Used only for QQ2HCPU QO6HCPU Q12HCPU and Q25HCPU ooooo0 MITSUBISHI MELSE e Memory card gt 1 High performance model QCPU Q2MEM 1MBS Q2MEM 2MBS QO2CPU Q02HCPU QO6HCPU Q2MEM 2MBF Q2MEM 4MBF Q2MEM 8MBA Q2M
553. seeseeeseeeseeseeeteeeseeeeeeeeeaes 7 46 7 13 3 Scan ime meas EMEA a a A Aae ara a a aa aa haaat 7 47 LAA Sampling Trace FUACHOM A E EE 7 49 7 15 Debug Function with Multiple USersS cee eeeeeeeseeeeeseseeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 7 58 7 15 1 Multiple user monitoring FUNCTION eee eece cece eeeeeeeeteeeteeeeeeeseeeteeeeeeeeaeeseeesaeeseesaeeseeteeseeteeeteneteaes 7 59 7 15 2 Multiple user RUN write function oo ee eee eeeeeeeeteeeeeeeeeeeeeeeeesaeeseeesaeesaeeseeesaeesaeeseeeseeeseeeeeeeeeeeteneeeaes 7 60 716 Watch Dog Timer WDT ivesccesevevevestvevevevieeceeeeree doce dee eee ren deee dee deek een deeded eed deadeadnebe eevee 7 62 7 1 7 Self Diagnosis FUNCOM gsi aa aaeeea EENEN Ea AATE AE DEE KATRE ERE RENEE aaa aaa ae tite 7 64 7 17 1 Interrupt due to error OCCUITONCE s essessessesresnssnesnesnernsrnsrnsenernstnnnnnnactnnnnnnasnnnnnstantunnannnennnnnnnennnnnenae 7 67 7 A7 2 LED display when error OCCUIS roenan cetetaxdevcct eee swectastbwcet vn ARET EATE AEE AEREE ATENEA AKDERE 7 67 7 17 3 Error CAUCE ATION cra meani aera ANE AE TAAA SEA AATE ATE AA TAEA ATEREA 7 68 FAB Failure HISTO eoioiiiroririniaiis ieat AEAEE AAAA E EAEE A A 7 69 AD OyStem ProteCt arannana ehen aha E E O E AAN A E eats 7 70 TAS Password registration erena R a a a cee sdesPietas 7 70 A19 2 Remote password ior A ke ies A A A ea 7 72 7 20 Monitoring High Performance model QCPU System Status from GX Developer
554. seeseeseeteeees 6 18 Character String c ccccccscsseeseesesseeseeteees 4 51 Glock fUnGtion 22 2eeech eos Gace eee 7 9 PreGISlOM ne E aee toc ra Eaa 7 11 COMMON pointer sssi 10 54 Concept of I O assignment ceeee 5 8 Concept of I O assignment using GX Developer cecceceseeeeeeeeeeeeeeeeeeeeees 5 12 Constant SCAN ccccceeceeseeseeeseeeseeeseeeseeeeees 7 2 Gonstans Na Ace eta 10 61 Gounter CG vei ivescctv sect nesdieen tie diindes 10 24 Count ProceSSing ceceseeeeeeeeeees 10 24 Maximum counting speed cee 10 25 D D Data register cceccceeeeeeeeeeeeeeeeeteeees 10 28 Data register D c cceeseeeeeeeeeseeeeseeeeees 10 28 Data stored on the memory card 6 4 Decimal constants K c cccseeeeeeeees 10 61 Device initial ValU cecceeeseeeeesneeees 10 69 D vice Stei arsperet sheeveetiavsaiet Sariren 10 1 Direct ACCESS input 10 6 Direct ACCESS output 10 9 Direct MOE yasaini 4 41 Drive Num Den eiectus ei etenunea 6 5 Index 1 E F G H Duby EE E EE A E 10 25 DX Direct access input s es 10 6 DY Direct access OUtpUt eee 10 9 E Real nUmbers ececeeeeeeeeeeeeeeeeeeeeeeees 10 62 Edge relay V 2 cectivdadieetinleid wired 10 16 END procCeSSing cscceeeeeeeseeeeeeeeeeeeeeeens 4 34 Enforced ON OFF sccceeeseteeeeereeteeees 7 31 Enforced ON OFF for external I
555. seseseeeaeaesesecaeacseseseaeaeseaeeasaeseaseasaesessssseeteeasseateeeaeaees 16 13 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES 17 1to17 5 17 1 Range of Control CPU CoOmMUNnicattiOns cececcsecseeseseceseseseeseseeeeesseseseeeesescaeeeseaeseaeeneesacaeeeeesaeaeateeeeeaeaeens 17 1 17 2 Range of Non control CPU Communications cccsecesecseeceseseseseeeseeseseeeeeeseaeeeeeeeeaeaeeneseeaeeeeeeeeaeeteeeenaeaeens 17 1 18 PROCESSING TIME FOR MULTIPLE CPU SYSTEM HIGH PERFORMANCE MODEL QCPUs 18 1t0 18 3 18 1 Concept behind CPU Scanning Time csccseceseseesesesesesseseseseeseseseeeeseseaeeeesescaeeeeseeseateneesasaeeneesesasateneenasatees 18 1 18 2 Factor to Prolong the Scan Time esesseesesseseseseseeseseseseescseseseeacseseeeesescaeseeseecaeaeeeaeseaeensasseeeeseaeeteneesesateneanaees 18 2 19 STARTING UP THE MULTIPLE CPU SYSTEM 19 1t0 19 9 19 1 Flow chart for Starting Up the Multiple CPU System 0 cecccesecsesecesesseseseeeeeeseseseeeseaeeteeeseeeeesaeetetescesateneeaeas 19 1 19 2 Setting Up the Multiple CPU System Parameters Multiple CPU Settings Control CPU Settings 19 3 19 21 SYSTEM configuration enra ets lek tlie dave Wale Waialua laevis ele 19 3 19 2 2 Creating NEW SYSTEMS ae aaa aa a a r e aa aAa a a a aa a ae a aaa A A aa Aaa EA RAE 19 4 19 2 3 Using existing preset multiple CPU settings and I O allocations ccccccessese
556. set to 0 e Fuse blow check is executed also to the output modules of remote I O stations e Stores the module numbers corresponding to setting switch numbers or base slot numbers when fuse blow occurred VO module for AoJ2_ _ Extension base unit switch slot No Fuse blown Number of module with blown fuse D9001 SD1001 App 44 App 44 APPENDICES MELSEC Q Special Register List Continued ACPU Special Conversion Special Register after Conversion D1002 D1004 Special Register for Modification Meaning V O module verification error module number V O module verification error Stores setting status made at parameters modules 1 to 8 MINI link errors AC DOWN counter AC DOWN SD1005 SD1008 Annunciator D 9903 detection D9010 SD1010 App 45 SD1009 SD62 occurred Step number at Error step which operation Pe A ee Number of times for Self diagnosis _ Self diagnosis error e When error is found as a result of self diagnosis error error number number is stored in BIN code F number at which external failure has error has occurred Corresponding Detail etails CPU If O modules of which data are different from data entered are detected when the power is turned on the first O number of the lowest number unit among the detected units is stored in hexadecimal Storing method is the same as that of SD1000 To monitor the number by per
557. seteseteseeeeeeeees 19 7 APPENDICES App 1 to App 60 APPENDIX 1 Special Relay List sccscsscssssessesesecesesseseseseescsescacseseeseseaeeeeeeacaeseeeesseaeacaeaeeseeasaseeeeeesasateneeasacens App 1 APPENDIX 2 Special Register List cscscccseseseseseeeeeeesesesesseseseeesseeeeeseaeeeeeeacaeseeeseeeasseaeaeeseseeaseneeeeeaeateneeaeatens App 22 APPENDIX 3 List of Interrupt Pointer Nos amp Interrupt Factors 0 eeececesescseteeeseeeeeeeeeeeeeeeeecaeaeaeneasaeaeneensaeees App 58 APPENDIX 4 Enhancement of the High Performance Model QCPU Functions ceesseseceseseeteeeeseeeseees App 59 APPENDIX 4 1 Specification COMpariSOn cc ccccceceeeeeeeeeeeceeeeaeeaecaeeeeeeaesaeceeseeeeaeeeseseaeeaesaeseeeeaeeaes App 59 APPENDIX 4 2 Function Comparison cccceccesceseeeeceeeeseeeeceeceeeeaecaecaeseeeeaesaeseeseeesaesaesaeseaeeaseaeeesentats App 59 APPENDIX 4 3 Usability of Added Functions Depending on GX Developer Version 0 01 App 60 APPENDIX 5 Transportation PreCautiOns secececsceccseseeteeseeseseseseasseneaeaeseseeeneeeeeeeneneneeenenenenenesaseasasaeaeataeaeaeaes App 61 APPENDIX 5 1 Controlled Mmodels eccccccecceceeseeeeeeeceeeeeeeaecaecaeeeaeeaecaeeaeeaeeaecaesaeseaesaesaeeeeseaeeaeeesateaes App 61 APPENDIX 5 2 Transport Quidelines eien RR App 61 INDEX Index 1 to Index 3 Related Manual cceececceeceseeeeeeseeeeeeeeeeeeeeeeeeeeeeeneees High Performance Model QC
558. settings and I O Assignments for CPU No 1 e A PARAMETER ERROR error code 3012 will occur in the host CPU if they do not match A comparison check will be run on the multiple CPU settings and I O Assignments for When CPUs inthe the CPU in the RUN mode with the lowest number RUN mode exist A PARAMETER ERROR error code 3012 will occur in the host CPU if they do not match No sameness check will be run e When the RUN STOP switch has been changed from STOP to RUN When CPUs in the e When parameters are RUN mode do not written with the GX exist Developer A comparison check will be run onthe e A comparison check will be run on the multiple CPU settings and I O multiple CPU settings and I O Assignments for CPU No 2 Assignments for CPU No 1 A PARAMETER ERROR error code A PARAMETER ERROR error code 3012 will occur in the host CPU if they 3012 will occur in the host CPU if they do not match do not match STOP RUN is not allowed as a MULTIPLE CPU DOWN error code 7000 error will occur in the host CPU When a stop error occurs at CPU No 1 After multiple CPU system parameters unavailable with the Motion CPU are changed for the High Performance model QCPU or PC CPU module in a multiple CPU system including a Motion CPU be sure to reset the High Performance model QCPU for CPU No 1 or turn off and on the CPU Otherwise the High Performance model QCPU or PC CPU module checks consistency with multiple CPU sys
559. slot 2 is left empty However the empty slot must be on the right side of CPU modules Mounting is allowed Mounting is not allowed CPU 0 1 2 2 a ale ie z 2 1 3 3 8 2 a a 3 2 E uw a E Pol E Ke Sno salgi 23 5 LEJOJ O ge 14 7 14 7 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q To add a High Performance model QCPU or Motion CPU to a system where the PC CPU module is used shift the PC CPU module to the right because no CPU module is allowed on the right side of the PC CPU module 2 High Performance model QCPU Motion CPU and PC CPU module CPU numbers a CPU numbers are allocated for identifying the High Performance model QCPUs Motion CPUs and PC CPU module mounted on the main base unit in the multiple CPU system The CPU No 1 is allocated to the CPU slot and the CPU No 2 No 3 and No 4 are allocated to the right of the CPU No 1 CPU slot CPU No 1 Slot CPU No 2 Slot CPU No 3 Slot CPU No 4 CPU module CPU module CPU module CPU module Power supply module These PLC numbers are used for the following purposes of e To access the High Performance model QCPU when the GX Developer personal computer is not connected in the multiple CPU system e To set up control CPUs with the I O Assignment in the multiple CPU system b The High Performance model QCPU stores the host number in the special register SD395 It is recommended to build a program for checking the
560. speed END processing Oms 0 ms is used to simplify the illustration END END END END processing processing processing processing 0 8 i 16 24 32 ms Lett tpt tt pp pete te pp e e k S pe eae pa a i a a a d E E a i e a 4ms 4 5ms 4ms 4ms 5ms Scan execution type program l rs ms Low speed execution type program A H l l com 0 5ms 2 5ms 0 5ms Low speed execution type program B H H H l i e ik i i Constant scan wait time H n H m Low speed scan time Lowspeedscantime me api gt 13ms h 15 5ms i processing execution processing execution 2 Low speed program execution time setting The low speed execution type program is operated under the following conditions as shown below e Low speed program execution time 3ms e Total scan execution type program time 4ms to 5ms e Execution time of low speed execution type program A ims e Execution time of low speed execution type program B 3ms e END processing Oms 0 ms is used to simplify the illustration END END END END END processing processing processing processing processing 0 4 11 5 16 5 23 5 29 5 ms P j Eek Ea Ce Re Ht ED Cs fe Cc EE se ned Ue bee Le i ee ea hele a le ed re aie ie lr oss SEs Py al ab i elre p 4ms 4 5ms 4ms 4ms_ 5ms Scan execution type program I 0 ms l ms ims Low speed execution type program A H H i 2ms ims 2ms ims cs Low speed executi
561. speed execution type program s operation after the scan execution type program has been executed f When the constant scan time and low speed program execution time have been set PRO TIME OVER error code 5010 will occur if surplus time of constant scan lt low speed program execution time 5 Low speed END processing The low speed END processing is performed when all the low speed execution type programs are executed The following processing is performed for the low speed END processing e Low speed program special relay special register setting e Low speed execution type program write during RUN e Low speed scan time measurement e Low speed execution type program watch dog timer reset When the low speed END processing is completed the low speed execution type program is executed from the beginning again 1 During execution of low speed execution type programs the constant scan time may deviate by the amount of the maximum instruction processing time low speed END processing time 6 Low speed scan time a The low speed scan time is the total time required for low speed execution type program execution and low speed END processing If multiple low speed execution type programs are executed the low speed scan time is the total time required to execute all the programs plus the low speed END processing time When an interrupt program fixed scan execution type program is executed the value added with the inte
562. speed timer T eesse 10 19 Index 2 M N O P Q R M Internal relay asasessessesrssrerseesreresrenens 10 10 Macro instruction argument device VD 10 60 Main routine program eceeeeseeseseeeeeeeees 4 3 Memory Card onreine 6 11 Monitor condition setting eeeeeeeeees 7 25 Monitoring the local devices eee 7 30 N N STING eeeeeeeeeeeeeeeeeeeeeeeeaeeeaeeeateeateeas 10 52 COUTDUT CY erisia an alnan dieters tia bet 10 8 P POMON pariri eaa E TIRE 10 53 PassWord e nii aiir ei 7 65 PLOW instruction c ccccccscesesseeseeseenees 4 14 POFF instrucioni 4 14 Pointer P sss vata er E 10 53 Precautions for the use of device initial values 10 71 Precautions when using timers 0 10 23 Priority OF LED opar a 7 76 Procedure for using device initial values 10 70 Processing at annunciator OFF 10 14 Processing at annunciator ON 008 10 12 Program construction 1 6 Program execute tyPe eeeeeeeeseeseeeteeeteees 4 10 Program Memory ececeeeeeeeeeteeeteeeeeeeeeateees 6 6 Program monitor list 7 39 PSCAN instruction cccccceseeseeseeseenees 4 14 PSTOP instruction 0 cccccsccscessesseeeseeeneeees 4 14 Purpose of I O assignment 5 11 Purpose of I O assignment using GX Developer eccecceceeceeceeteseeseeeeeeeeeaes 5 11 OCP ish E E fee ented es teast hentia A 18 310 peeeereerreree rere ace
563. ssing gt Fxied scan execution ca oe specified cyclic type program has been set Run only when execution request is given Scan execution type program Stand by type program Not all execute types need to be set for the High Performance model QCPU Use the items marked with as needed such as the Initial execution low speed execution stand by and fixed scan execution type programs 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 3 Changing the Execute Type a The Execute Type setting made at the Program tab screen in the PLC Parameter dialog box can be changed at any time while a sequence program is executed To change the execute type of a program use a PSCAN PLOW PSTOP or POFF instruction PLOW pcan PSAN PSCAN ee execution Scan execution Eoc Low pcan PSAN execution Io program ype program type program t PSTOP POFF PSCAN Stand by type program b The following table shows the timing of changing the execute type of a program by using a PSCAN PLOW PSTOP or POFF instruction Executed instruction oe PSCAN PSTOP POFF PLOW Execute type before change i No change remains Output is turned OFF Scan execution type i scan execution type in the next scan Becomes stand by B comes stand by type Becomes low speed 5 yP type from the next Noe p ia andere scan after
564. station stop by stop error of PLC2 Refresh settings F All station stop by stop error of PLC3 Change screens Setting gt I All station stop by stop error of PLC4 Send range for each PLC PLC side device PLC The auto refresh area Caution Dev starting Point Start End Start End Not a No 2 a No 3 a No 4 a Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address Settings should be set as same when uting ae CPU The applicable device of head device is B M Y D W RZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check Cancel 1 19 4 19 4 19 STARTING UP THE MULTIPLE CPU SYSTEM MELSEC Q 1 Setting the operating mode optional No of PLCC ie ne oS E T e Selects whether to halt operations for all CPUs NoofPLc fe x v e les or continue with operations when a stop error occurs Operating mode ing Mie OPUs 1 Default Stop all PLCs upon a stopping error at CPU Error operation made at the stop of PLC ait pia rere se Mer No 2 No 3 or No 4 r op by op A Retes settings No check eee For example if the tick beside the All station stop by stop Send range for each PLC PLC side device en PLC The auto rehesh area Caution Dev staring error of CPU2 is removed the operati
565. stem Devices Internal system devices are used for system operations The allocations and sizes of internal system devices are fixed and cannot be changed by the user 10 3 1 Function devices FX FY FD 1 10 32 Definition a Function devices are used in a sub routine program with arguments to perform write read of data between the sub routine call source with argument and the sub routine program with argument If FXO and FD1 are used at the sub routine program and if MO and DO are designated by the sub routine CALL instruction the MO ON OFF data is transferred to FXO and the DO data is transferred to FD1 Sub routine program CALL source Sub routine program XO FXO caL Po Mo Do Po H k mov FD1 RO b Because the function devices used for each sub routine program CALL source can be set the same sub routine program can be used without regard to other sub routine CALL sources Types of function devices There are 3 function device types function input devices FX function output devices FY and function register devices FD a Function input devices FX e These devices are used to designate inputs of ON OFF data to a sub routine program e In the sub routine program these devices are used for reading and processing bit data designated by sub routine with argument CALL instruction All the QCPU bit data designation devices can be used b Function output devices FY e These devices are used
566. sword 3 lear Password is cleared Sets password currently registered in Password POINT 1 Password protected files are limited to program files device comment files and device initial value files Other files cannot be password protected 2 The password registered to a file can not read out from the file If the password can not be remembered file operation other than following can not be performed e Program memory Memory card Format PLC memory e Standard ROM Write to PLC Flash ROM Take notes of the password registered and keep it on hand 7 FUNCTION MELSEC Q 7 19 2 Remote passwords The remote password function prevents illegal access to the High Performance model QCPU by users in remote locations The remote password function is enabled for use by setting it up in the High Performance model QCPU When the remote password function has been set a check will be run on remote passwords when users in remote locations attempt to access the High Performance model QCPU with serial communication modules or Ethernet modules with modem functions 1 Setting up amending and canceling remote passwords a Remote password setup Remote passwords are set up on the GX Developer s remote password setup screen The GX Developer is then connected to the High Performance model QCPU into which the remote password is to be set and the password uploaded The High Performance model QCPU will transmit the remote password
567. t App 37 APPENDICES MELSEC Q Special Register List 5 Memory card Memory card models Corresponding ACPU DJS E TT Set by When set Corresponding Meani leaning CPU Explanation Indicates memory card model installed b15 to b8 b7 to b4b3 to b0 oo ae Drive 1 RAM model 0 Does not exist 1 SRAM S Initial and card removal 0 Does not exist Drive 2 1 SRAM ROM model 2 ATA FLASH 3 Flash ROM Indicates memory card A model installed b15 to b8 b7 to b4b3 to bO 0 lt Memory card A models 0 Does not exist 1 SRAM Drive 1 RAM model S Initial and card removal 0 Does not exist Drive 2 ROM model 2 EEPROM 3 Flash ROM Drive 1 RAM capacity removal removal removal removal Drive 1 capacity is stored in 1 kbyte units Drive 2 ROM capacity Drive 2 capacity is stored in 1 kbyte units The use conditions for memory card A are stored as bit patterns In use when ON e The significance of these bit patterns is indicated below Boot operation QBT Parameters QPA Device comments QCD Device initial value QDI File register R QDR Trace QTS Not used Not used Memory card use conditions Memory card use conditions b8 Not used b9 CPU fault history QFD b10 Not used b11 Local device QDL b12 Not
568. t X input X input X input Y output Y output Y output Y output Y output Y output High speed buffer transfer setting Default Check Cancel Choose here when setting the high speed buffer transfer ranges e High speed buffer transfer setting High speed buffer transfer setting Assignment method p Buffer memory address Points Start C DEC h ff r memor Start End HEX Set the bu e gmo y transfer ranges Starting Points Buffer memory Buffer memory PLC side PLC side Type 1 0No DEC start end device start_ _device end Buffer read Buffer read Buffer read Buffer read Buffer read Buffer read Buffer write Buffer write Buffer write Buffer write Buffer write Buffer write PETES EST SS SF Default Check Cancel It is recommended to mount the target modules of this function on the main base Access time to modules mounting on the main base is shorter than that on the extension base 7 FUNCTION MELSEC Q The settings for high speed I O refresh and high speed buffer transfer are as follows ee Number of Item Sub Item Contents Restrictions Settings Start X Y Head device No I O and intelligent function Up to 6 points for High speed I O XO to XFFO YO to YFFO modules X input and Y refresh setting Point Number of transferred bits Specify m
569. t program remains on until the same interrupt program is executed again 2 While the high speed interrupt program is executed DI interrupt disable is established Do not execute the El DI instruction in the high speed interrupt program 3 Timers cannot be used in the high speed interrupt program 4 If the high speed interrupt program is executed during time measurement such as scan time or execution time measurement the high speed interrupt program running time is added to the measurement time Hence if the high speed interrupt program is executed the values to be stored into the following special registers and the monitor values of GX Developer become longer than the values when the high speed interrupt program is not executed Special registers e SD520 SD521 Current scan time e SD522 SD523 Initial scan time e S D524 SD525 Minimum scan time e SD526 SD527 Maximum scan time e S D528 SD529 Current scan time for low speed e SD532 SD533 Minimum scan time for low speed e S D534 SD535 Maximum scan time for low speed e SD540 SD541 END processing time e SD542 SD543 Constant scan waiting time e SD544 SD545 Low speed program cumulative execution time e SD546 SD547 Low speed program execution time e SD548 SD549 Scan program execution time e SD551 SD552 Service interval time GX Developer monitor values e Execution time measurement e Scan time measurement Constant scan 7 FUNCTION els MELSEC Q 7 23 Module
570. t being used The slots other than those designated are disabled For example when 8 slots are designated for a 12 slot base unit the 4 slots on the right of the base unit are disabled If a module is mounted to the prohibited slot an error SP UNIT LAY ERR occurs Q312B type main base unit 01234567 foo o 4 oO 4 k Power supply CPU module Prohibit Prohibit Prohibit Prohibit XM lt lt af Module can be mounted Modules must not be mounted When eight slots are set 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 3 Setting screen and setting items for Base mode of GX Developer Qn H Parameter PLC name PLC system Puc file Puc RAS Device Program Boot file SFC r120 Assignment Assigning the 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Switch setting Detailed setting Base setting Auto C Detail Ext Base2 8 Slot Defaut d e Ext Based 12 Slot Default i Settings should he set as same when using multiple CPU Acknowledge XY astignment Multiple CHU settings Default Base model name Designate the model name of the installed base unit with 16 or less characters High Performance model QCPU does not use the designated model name It is used as a user s memo or for pa
571. t from standard ROM with an ATA card mounted 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU f MELSEC Q If the program memory is changed when a sequence program is written in the program memory and PLC is turned on or reset boot operation mode may be selected If the BOOT LED is lit on the front panel of the High Performance model QCPU the boot operation mode is selected Cancel the boot operation mode with the following procedure 1 Write parameters in which no boot file settings are made into the program memory 2 Using the DIP switch of the CPU module set program memory for the valid drive setting DIP switch setting SW2 OFF SW3 OFF 3 Turn off and on the PLC or reset the CPU module After the procedure the settings given in steps 1 and 2 become valid 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU 6 8 Program File Configuration MELSEC Q 1 Program File Configuration Program files consist of a file header an execution program and allocate memory allocated for Write during RUN Program file configuration a b Execution program 34 steps default File header The area is allocated in file size unit Memory allocated for Write during RUN je steps As shown below the size of a program stored in the High Performance model QCPU includes all the above components 1 File header The file name file size and file creation d
572. t functional module detailed setting HAW error Model name Interrupt Interrupt 16points Base setting Assigning the I O address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur EA EEA A Extension cable Slots CI C Auto m Base mode 4 lt talata a 4 C Detail 8 Slot Default Jsettings should be set as same when using multiple PLC Cancel 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Multiple CPU settings Default Check End Cancel 3 Precautions a The system will be adversely affected by noise etc when the input response time is set to high speed Set the input response time in consideration of the operating environment b The input response time cannot be amended for the A1S161 interruption module that supports the AnS Series No processing will be performed with interruption modules that support the AnS Series even if the input response time is set in the slot c The GX Developer Version 6 SW6D5C GPPW E or later is required when changing the response time of the interrupt module The input response time of the interrup
573. t module cannot be amended with the SW5D5C GPPW E or earlier GX Developers Fixed at 0 2 ms default setting d The input response speed setting is valid in the following cases e After the PLC is turned on e When the High Performance model QCPU is reset 7 FUNCTION MELSEC Q 7 8 Error time Output Mode Setting 1 Error time Output Mode Setting The error time output mode setting is to set whether the output to the Q series compatible output module hybrid I O module or intelligent function module will be cleared or held when the CPU module results in a stop error 2 Error time Output Mode Setting Make the error time output mode setting in the I O assignment of the PLC parameter dialog box Choose Output Hybrid I O or Intelligent as the type of the slot to which the error time output mode is set Then select Detailed setting Choose Clear or Hold for the slot to which the error time output mode is set The default is Clear Select Type Qn H Parameter Lx PLC name PLC system PL file PLCRAS Device Program Boot fle SFC 1 0 assignment 140 Assignment i d Slot Model name Points Staryja e Witch setin 0 PLC PLC X g 1 0 0 Output X 16points H H a oe e oa Deas sei Select Detailed setting 3 2 2 Intelli 32points_ v LBE X x 5 J44 6 J565 X m 7 16 6 x x X Assigning the 1 0 address is not nec
574. t module is shown below The remote password is unlocked relesed and access to the QCPU is allows The remote password locking process is performed when the line is closed GX Developer Ethernet Power supply A CPU module 5 t A check is run on the remote password The remote password is transmitted to QU71E71 when the power is switched on or the system reset GX Developer 3 Number of remote password set modules The number of remote password set modules changes depending on the version of used GX Developer The following table indicates the number of remote password set modules depending on the GX Developer version f Maximum Number of Maximum Number of Set GX Developer Version Module Name Set Modules Modules in System Ethernet module 4 modules Serial communication module 8 modules Version7 7 4 modules Modem interface module Version6 Ethernet module 4 Amodules Serial communication module 8 modules 8 modules Modem interface module 7 FUNCTION MELSEC Q 4 Procedure for setting up the remote password GX Developer Remote Password Remote Password Setup screen Advanced Remote Password Setup screen a Setup screen Remote password setup Detail is required with the QU71E71 Remote password se tings r Password settings Password pe m Password active module settings QU71E71 vjoooo Detail J71c24 o1o0 assy
575. t object shift forward setting r After conversion writing behavior Continuous ladder block Write during BUN while PLC is runnir Cancel Shift the program forward Write if PLC STOP 1 1 ladder block Don t write to PLC Don t shift the program forward Comment input r Step No specification used in writing I Continues during command write Absolute step No default le 2 Double coil check setup L F Relative step No by pointer I Checks for double coils during write r nna I Monitor Scan time extension r Statement insertion method CPU statement r Show don t show character string Macro GPP statement T Common to all programs C None Comment statement note Alias Macro r Ladder monitor of PLS PLF instruction Ladder r for FXGP system 1 Set Write during RUN while PLC is runnning in After conversion writing behavior 2 Select Absolute step No default or Relative step No by pointer in Step No specification used in writing 7 FUNCTION MELSEC Q b The specified circuit of the pointer is displayed to write the circuit after conversion during RUN The following is an example of GX Developer A writing during RUN from PO and GX Developer B writing during RUN from P1 The program area surrounded with is the area to be written during RUN Area after PO in the processing program is written during RUN a
576. t the stage number setting connector of the base unit Lower I O numbers are assigned first To reserve empty extension stages for future expansion use the PLC parameter to set the base unit 5 ASSIGNMENT OF I O NUMBERS MELSEC Q The following shows the example of the I O number assignment when the base unit is set in Auto mode without I O assignment Q35B 5 slots occupied 0 2 3 EEE Slot No 2 ofe fje 2 5 5 5 3 5 53 5 gr ko me nel ne fo o O o O fo O El E E E E E a 3 a a a FA a Allocate the I O number with a Byte m E 6 6 the I O points of each slot O 16 16 32 16 64 LJ points points points points points epee 1 O numbering direction The slot numbers of the 1st stage s extension base unit continue from the last slot number of the main base unit gt X00 X10 X20 Y40 li XOF X1F X3F Y4F Y8F Extension Q65B 5 slots occupied cable 5h 6 7 3 2 2 2 2j 2 i a i pay gt 2 52 82 82 2 ma 1 gt 2 s 2 s 2 s 5 __ Empty slot points designated at the PLC system So g ES E3 ER amp tab screen in the PLC Parameter dialog box are o a ro o ee a e allocated Default 16 points Eol z 32 32 32 16 16 points pointsjpoints pointsipoints gt BO
577. t time the High Performance model QCPU detects a WDT error and stops the program execution 7 FUNCTION c MELSEC Q The sequence program processing stops during the wait time from the last END processing execution until the next scan starts 1 2 If a low speed execution type program is executed it will be interrupted for 0 5 ms a constant scan time setting If an interrupt factor occurs after the END processing is performed the interrupt program or fixed scan execution type program is executed Constant Scan Time Accuracy This section describes the accuracy of a constant scan time setting 1 The remaining portion wait time of a constant scan time setting is 0 02 ms on QO2CPU and 0 01 ms on QO2HCPU QO6HCPU Q12HCPU Q25HCPU when the following programs are not executed e low speed execution type program e interrupt program e fixed scan execution type program Wait time is 0 5 ms when a low speed execution type program is used If the maximum processing time for one instruction in a low speed execution type program is 0 5 ms the remaining portion of constant scan time is the same as described in 1 If the maximum processing time exceeds 0 5 ms constant scan delays for an excessive duration Interrupt is enabled while an interrupt program fixed scan execution type program is executed If constant scan time runs out when an interrupt program fixed scan execution type program is executed constant scan can
578. t use the CPU module Designates the model of the power supply module installed to the Standard ee modue mogel 401H main and extension base units Memorandum for users who do setting not use the CPU module Extension cable model Designates the model of the extension cable Memorandum for name users who do not use the CPU module Numbarorciots Designates the number of slots of the main and extension base units The number of slots is designated for each base unit Switch setting Designates various switches of the intelligent function module Error time output 403H Designates whether the output is cleared or retained upon a module stopping error of the control PLC HW error time CPU 40041 Designates whether the control PLC continues operation or it is Detailed operation mode stopped upon a hardware error of the intelligent function module f Designates the response time of the input module high speed VO response time input module and I O mixture module Designates the control PLC of the I O module and intelligent Control CPU a Pesiane module Achnouledad XYassidnment Contents of I O allocation MELSECNET Ethernet setting and CC 9 9 Link setting can be checked Multiple CPU setting __ Defines settings for establishment of a multiple CPU system Designates the operation of the multiple CPU system upon a stopping error of the PLC No 2 to No 4 CPU modules The multiple CPU system is stopped if a stopping error occurs to the PLC
579. ta N f devi Number of I O device points 8192 points X YO to 1FFF UNDEF GICEMICES usable on program Number of points Number of occupied I O points 4096 points X Y0 to FFF accesible to actual I O modules Internal relay M Default 8192 points MO to 8191 Latch i a IL Default 8192 points LO to 8191 Link link reay sd B Default 8192points BO to 1FFF Default 2048 points TO to 2047 for low high speed timer Select between low high speed timer by instructions The measurement unit of the low high speed timer is set with Timer T parameters Low speed timer 1 to 1000ms 1ms unit default 100ms High speedtimer _ 0 1 to 100ms 0 1ms unit default 10ms Default 0 point for low high speed retentive timer Switchover between the low high speed retentive timer is set by instructions Number of use points The measurement unit of the low high speed retentive timer is set with Jis set with parameters parameters Low speed retentive timer 1 to 1000ms 1ms unit default 100ms High speed retentive timer 0 1 to 100ms 0 1ms unit default 10ms Normal counter default 1024 points CO to 1023 Counter C Interrupt counter maximum 256 points cc 0 point set with parameters Data register Data register D ss Default 12288 Default 12288 points D0 to 12287 DO to 12287 Retentive timer ST points 5 Link register W Default 8192 points WO to 1FFF Default
580. ta is stored in the standard RAM e OH is stored in a memory card 2 File register capacity check a Perform a file register capacity check in the sequence program so that reading writing from to the file register is performed within the size number of points set in the High Performance model QCPU e A file register capacity check should be executed at step 0 of programs in which file registers are used e After switching to another file register file using the QDRSET instruction execute a file register capacity check e When using the RSET instruction to switch blocks confirm that the switching destination block has a capacity of 1k points or more before executing the RSET instruction File register capacity gt 32k points X switching block No 1k points b The available file register capacity can be checked in the file register capacity storage register SD 647 1 The file register capacity is stored in SD647 in 1k point units The less than 1k points surplus portion of a file register capacity is not stored In order to ensure an accurate range of use check be sure to designate the file register setting in 1k point 1024 points units 1 If a file register file is switched to another the file register capacity of the currently selected file register file is stored in SD647 10 51 10 51 10 EXPLANTION OF DEVICES MELSEC Q c Checking the file register capacity 1 Check The file register capacity
581. tart End Start End No l No 2 No 3 No 4 Caution Offset HEX from starting address of the auto refresh area Refer to the user s manual of the each PLC about the starting address Settings should be set as same wh t fad li CPU The applicable device of head device is B M Y D W R ZR The unit of points that send range for each PLC is word Import Multiple CPU Parameter Check Cancel Project drive Drive Path fa MELSEC Project name Cancel 19 7 Refer to the GX Developer s operation manual Opens the GX Developer s PC parameter setup window Select Multiple CPU settings to display the multiple CPU setup window Transferring multiple CPU settings Click on Diversion multiple CPU parameters Setting up transferred projects Select the project into which existing multiple CPU settings and I O allocations are to be transferred Click on Open 19 7 19 STARTING UP THE MULTIPLE CPU SYSTEM 1 Diversion of multiple PLC parameter x It is executed multiple PLC parameter utilization and all followina parameters will be overwritten 1 0 Assignment Setting 1 0 Assingment Standard setting Multiple PLC Setting Execute the multiple PLC parameter utilization Cancel Multiple CPU settings No of PLC Online module changef T Enable online module change with another PLC No of PLC z When the online module change is enab
582. tatus Memory card switch Always OFF DIP switch Status of CPU switch gt gt lt gt lt gt lt Vacant 0 S Every END processing b8 through b12 correspond to SW1 through SW5 of system setting switch 1 0 OFF 1 ON b13 through b15 are vacant e The CPU switch status is stored in the following format b15 to bi2b11 to b8 b7 to b4 b3 to bO CPU key Status of switch Memory cards switch App 29 gt 4 gt 4 Vacant gt lt b4 corresponds to memory card A and b5 corresponds to memory card B OFF at 0 ON at 1 b8 through b12 correspond to SW1 through SW5 of system setting switch 1 b14 and b15 correspond to SW1 and SW2 of system setting switch 2 respectively OFF at 0 ON at 1 S Every END processing App 29 APPENDICES MELSEC Q Special Register List Continued Corresponding f Meaning Explanation ee ACPU Corresponding bo TT The following bit patterns are used to store the statuses of the LEDs on the CPU module b15 to b12b11 to b8 b7 to b4 b3 to BO lt gt lt gt 4 gt lt gt 4 gt lt gt 4 gt lt gt O O h BOOT S Status A Vacant change Vacant MODE Bit patterns for MODE 0 OFF 1 Green 2 SD201 LED status Orange Information concerning which of the following status the LEDs on the CPU module are in is stored in the following bit patterns Oi
583. td 23 Lesoparkovaya Str RU 344041 Rostov On Don Phone 7 8632 36 00 22 Fax 7 8632 36 00 26 e mail STC Drive Technique RUSSIA ul Bajkalskaja 239 Office 2 23 RU 664075 Irkutsk Phone 7 3952 24 38 16 Fax 7 3952 23 02 98 e mail privod irk ru STC Drive Technique Poslannikov Per 9 str 1 RU 107005 Moscow Phone 7 095 790 72 10 Fax 7 095 790 72 12 e mail info privod ru RUSSIA RUSSIA RUSSIA RUSSIA RUSSIA AFRICAN REPRESENTATIVE CBI Ltd Private Bag 2016 ZA 1600 Isando Phone 27 0 11 928 2000 Fax 27 0 11 392 2354 e mail cbi cbi co za SOUTH AFRICA Aa MITSUBISHI ELECTRIC INDUSTRIAL AUTOMATION Gothaer Strasse 8 D 40880 Ratingen Phone 49 2102 486 0 Hotline 49 1805 000 765 Fax 49 2102 486 7170 www mitsubishi automation de megfa mail meg mee com www mitsubishi automation com
584. tem parameters of the Motion CPU causing a PARAMETER ERROR error code 3012 14 17 14 17 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q 14 2 7 Resetting the multiple CPU system 14 18 It is possible to reset the entire multiple CPU system by resetting the CPU No 1 The CPU modules for CPU No 2 to No 4 I O modules and intelligent function modules will be reset when the CPU No 1 is reset If a stop error occurs for any of the CPUs on the multiple CPU system either reset the CPU No 1 or restart the sequencer power supply ON OFF gt ON after the problem has been recovered Recovery is not allowed by resetting the CPU modules for CPU No 2 to No 4 for which stop errors have occurred 34567 CPU No 2 CPU module CPU No 3 CPU module CPU No 4 CPU module pro Reset is not allowed with the multiple CPU system If a reset is attempted all CPU on the multiple CPU system will assume the MULTIPLE CPU DOWN status The entire multiple CPU system can be reset CPU No 1 CPU module 1 Itis not possible to reset the CPU modules for CPU No 2 to No 4 individually in the multiple CPU system If an attempt to reset any of the CPU modules for CPU No 2 to No 4 during operation of the multiple CPU system a MULTIPLE CPU DOWN error code 7000 error will occur for the other CPUs and the entire multiple CPU system will be halted However depending on the timing in which the
585. tem Setting value CH1 A D conversion enable disable setting Enable CH1 Sampling process averaging process setting Sampling CH1 Time number of times specifying Number of times CH1 Average time average number of times setting Setting range Time 2 to 5000 ms Number of times 4 to 62500 times CH2 A D conversion enable disable setting Enable CH2 Sampling process averaging process setting Sampling Details Select input Make text file End setup Cancel The designated initial setting data is stored in the intelligent function module 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q b Auto refresh setting For the auto refresh setting designate the device at High Performance model QCPU to store the following data e Digital output of Q64AD e Maximum minimum values of Q64AD e Error code The auto refresh setting of Q64AD is designated on the following auto refresh setting screen of GX Configurator Auto refresh setting screen Auto refresh setting _ fx Module information Module model name Q644D Start 1 0 No 0000 Module type A D Conversion Module Module side Module side Transfer PLC side Laj Setting item Buffer size Transfer direction Device word count CH1 Digital output value 1 1 gt D11 CH2 Digital output value 1 1 gt D12 CH3 Digital output value 1 1 gt D13 CH4 Digital output value
586. terrupt counter start No 1002 1003 1004 100A 1005 1007 Fixed scan interval n 28 to31 High speed interrupt setting 1008H These are the settings required for using the CPU module Default values are available for PLC control Designates the low speed high speed timer settings Designates the contact which controls the CPU module s RUN PAUSE operation Enables disables the remote reset operation from the GX Developer Designates the output Y mode at STOP RUN switching Specifies whether to perform floating point arithmetic processing with double precision Specifies the assignment of interrupt pointers 150 to 1255 leading I O Nos and leading SI Nos of an intelligent function module H Designates the common pointer first No Designates the number of empty slot points in the main extension base units Designates the interrupt counter first No pm H H H H H H Specifies time intervals at which to execute interrupt pointers 128 to 131 Sets the fixed cycle interval high speed I O refresh setting and high speed buffer transfer setting of the high speed interrupt pointer 149 Interrupt program fixed scan 1008h Specifies whether to perform the high speed execution of an program setting interrupt program Module synchronization 100C A series CPU compatibility setting 100D File register Comment file used in a command 1101 11001 Speci
587. test mode Depends on the error condition of the forward loop line Depends on whether or not loopback is occurring at the local station Depends on whether or not a tier three station has received data from its master station in a three tier system Parameters not OFF Reception Depends on whether or not link parameters have been received ON No reception received from the master station Link relay OFF Not being executed ON Forward or reverse loop test execution underway OFF RUN or STEP RUN status ON _ STOP or PAUSE status Loop test status Master station operation status Local station other than host station operation status Local station other than host station error OFF RUN or STEP RUN status ON STOP or PAUSE status OFF Normal ON Abnormal OFF Normal R 3 ON Abnormal Depands on the data link condition at the local station Depends on whether or not the local station is executing a forward or a reverse loop test Control is performed depending on whether the master station is in the STOP or PAUSE mode Control is performed depending on whether a local station other than the host is in the STOP or PAUSE mode Depends on whether or not a local station other than the host is in error App 17 APPENDICES MELSEC Q Special Relay List 10 For redundant systems Host system CPU information 1 for Q4AR only SM1510 to SM1599 are only valid for redundant systems Al
588. th the set value with an internal relay M etc being switched ON or OFF according to the comparison result The figure below shows a sample program in which MO is switched ON after 10 interrupt inputs are performed In this example C300 is the interrupt counter No corresponding to 10 H K10 c300 mo gt 3 Setting the interrupt counter a b 10 27 In order to use interrupt counters at first interrupt counter No setting must be designated at the PLC system tab screen in the PLC Parameter dialog box 256 points are then allocated for interrupt counters beginning from the first counter No which is designated If C300 is designated as the first interrupt counter No numbers C300 to C555 will be allocated for interrupt counters C300 10 C301 l1 C302 12 Interrupt counter 256 points C555 1255 ve ho Values corresponding to the interrupt counter No In order to use an interrupt counter an interruption permitted status must be established by E1 instruction at the main routine program 10 27 10 EXPLANTION OF DEVICES 10 28 MELSEC Q 4 Precautions a One interrupt pointer is insufficient to execute interrupt counter and interrupt program operation Moreover an interrupt program cannot be executed by an interrupt counter setting designated at the PLC system tab screen in the PLC Parameter dialog box If the processing items sho
589. that ype execution type 7 Stand by t Np Changes semaine No processin sae Ae stand by type p 9 Low speed execution Low speed execution type execution is Low speed execution type execution is stopped becomes type execution is stopped and output is No change remains Low speed execution type scan executions from stopped becomes turned OFF in the low speed the next scan stand by type from the next scan Becomes executions Execution from step next scan stand by type from the 0 next scan after that Output is turned OFF in the next scan f f Becomes scan Becomes stand by Becomes low speed Fixed scan execution type Becomes stand by execution type type type type from the next scan after that PSTOP POFF Fixed scan execution type program Initial execution type 1 If the fixed scan execution type program is changed to another execution type you cannot return to the fixed scan execution type 4 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS MELSEC Q 4 2 1 Initial execution type program 1 Definition of initial execution type program a An initial execution type program is executed once only at power ON or when STOP to RUN switching occurs b This program s execute type is designated as initial in the program of the PLC parameters c Inthe same manner as the initial processing for the intelligent function module the initial execution program is executed only once
590. that include additional base units Q02CPU Q02HCPU QO6HCPU Q12HCPU Q25HCPU 2 Total value of command execution time Refer to the following manual for details on the processing time of special 18 multiple CPU commands and the processing time for commands that have different processing times with multiple CPU system QCPU Q mode QnACPU Programming Manual Common Instructions 3 END process The following tables shows the END processing time CPU type END processing time Q02CPU 0 42 ms Q02HCPU Q06HHCPU Q12HCPU Q25HCPU 18 1 18 PROCESSING TIME FOR MULTIPLE CPU SYSTEM HIGH PERFORMANCE MODEL QCPUS MELSEC Q 18 2 Factor to Prolong the Scan Time 18 2 The processing time for multiple CPU system is prolonged in comparison with single CPU system when the following functions are used Add the following values to the values calculated in Sections 11 1 and 18 a to acquire the amount of time used by these functions e Multiple CPU system automatic refresh e MELSECNETHH refreshing e CC Link automatic refresh 1 Automatic refresh of CPU shared memory a The amount of time required to perform the refresh function set up with the multiple CPU settings This value is the total amount of time required for writing into the host CPU s CPU shared memory and the amount of time required to read from other CPUs CPU shared memories These values are added when setting up the refresh settings w
591. the LED by operating the special relay SM202 and Pra special register SD202 O Valid x Invalid x1 Special relay and special register contents SM50 uu When switch from OFF to ON the error is canceled for the error code stored in the SD50 SD50 The error code for the error to be canceled is stored For further information on error codes see the High Performance model QCPU Q Mode Users Manual Hardware Design Maintenance and Inspection SM202 eee When turned from OFF to ON the LED corresponding to each bit in the SD202 is turned off SD202 iiinis This specifies the LED to turn off Only USER LED and BOOT LED can be turned off 15 bit 8 4 0 bit t BOOT LED USER LED 1 means turn off and 0 means leave on in the setting The setting to turn off each LED is as follows All in hexadecimal e When turning off both LEDs SD202 110H e When turning off only the BOOT LED SD202 100H e When turning off only the USER LED SD202 10n 3 Method to not display the ERR LED USER LED and BAT LED The ERR LED USER LED and BAT LED have the same priorities explained in Section 7 21 2 When an error number for an LED is deleted from this priority the LED will not turn on even if an error with that error number occurs See POINT in Section 7 21 2 for the setting method 7 FUNCTION MELSEC Q 7 21 2 Priority setting When multiple factors that can be displayed occur the d
592. the buffer memory with the TO command and UD GO 17 4 17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM S I O MODULES AND INTELLIGENT FUNCTION MODULES MELSEC Q 5 Accessing MELSECNET H modules Only control PLCs can access MELSECNET H modules Link direct devices cannot be used in MELSECNET H modules being controlled by other CPUs OPERATION ERROR error code 4102 occurs if a program that uses link direct devices is used in MELSECNET H modules being controlled by other CPUs 18 PROCESSING TIME FOR MULTIPLE CPU SYSTEM HIGH PERFORMANCE MODEL QCPUs MELSEC Q 18 PROCESSING TIME FOR MULTIPLE CPU SYSTEM HIGH PERFORMANCE MODEL QCPUs 18 1 Concept behind CPU Scanning Time 18 1 The concept behind multiple CPU system scanning time is the same as the single CPU system See Section 11 1 for details of the scan time concept This chapter provides explanations on the factors to be added to the scan time calculated as explained in Section 11 1 and the method of calculating processing time when configuring multiple CPU system 1 W O refresh time Input refresh time is calculated in accordance with the equation explained in Section 11 1 The I O refresh time for the following values only are prolonged when bus access overlaps with other CPUs input points output points 16 Prolonged time XN3 X number of other CPUs u s Use the following values for N3 CPU type Systems with only a main base Systems
593. the step transition watchdog timer and the annunciator number F number that will turn on when the watchdog timer times out b15 to b8b7 to bO Timer setting 1 to 255 s in seconds F number setting By turning on any of MSM708 to SM1114 the monitoring timer starts If the transfer condition following a step which corresponds to the timer is not established within set time set annunciator F is tuned on App 49 APPENDICES ACPU Special Special Register after Conversion Conversion D1125 D1126 D1127 D1128 D1129 D1130 D1131 D1132 App 50 Special Register for Modification MELSEC Q Special Register List Continued V O module verification error Annunciator detection quantity Annunciator detection number Meaning Bit pattern in units of 16 points indicating the modules with verification errors Annunciator detection quantity Annunciator detection number Corresponding Details CPU e When I O modules of which data are different from those entered at power on have been detected the VO unit numbers in units of 16 points are entered in bit pattern Preset I O unit numbers when parameter setting has been performed b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 bi b0 T SD1116 0 o0jo0jojo 0 0 0 0 0 O 9 Ie J SD1117 0 0 0 0 0 0 0 0 0 0 0 0 D1123 0 0 0 cexy o ojojojojojo 0 780 ae V O
594. thmetic operations in double precision check box in the PLC System sheet of the PLC Parameter dialog box is on Turning off the check box will increase the processing speed of executing an instruction that includes a floating point For details on floating point arithmetic operation see the QCPU Q Mode QnACPU Programming Manual Common Instructions 11 4 11 4 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU MELSEC Q 12 PROCEDURE FOR WRITING PROGRAMS TO HIGH PERFORMANCE MODEL QCPU This chapter describes the procedure for writing programs created at the GX Developer to the High Performance model QCPU 12 1 Writing Procedure for 1 Program 12 This section describes the procedure for writing one program to the High Performance model QCPU and executing it 12 1 1 Items to consider when creating one program In order to create a program the program size number of device points used and the program file name etc must be set in advance 1 Program size considerations Check that CPU module s program capacity is adequate for storing the program and parameter data The program capacities of the CPUs are shown below Q02CPU 28 k steps QO2HCPU 28 k steps e QO6HCPU 60 k steps Q12HCPU 124k steps Q25HCPU 252 k steps If the CPU module capacity is only adequate for the program the parameter data should be stored in the standard ROM memory card 2 Designating a program file name The file n
595. those of function version A or later They can be used by setting any of CPU No 1 to No 4 as a control CPU c Q Series interruption modules QI60 do not have a function version but are supported by multiple CPU system CPUs No 1 to No 4 can be set up as control CPUs d Intelligent function modules of function version A can be used in multiple CPU system by setting CPU No 1 as acontrol CPU However only control CPU can be accessed from serial communication modules and other external modules MELSECNET H serial communication modules and other external modules cannot access non control CPUs The SP UNIT VER ERR error code 2150 occurs if any of CPU No 2 to No 4 has been set as a control CPU and the multiple CPU system will not be a started up 3 Ranges of access to control and non control modules In a multiple CPU system non control modules can be accessed by setting I O setting outside of the group at the Multiple CPU settings dialog box in PLC Parameter The following table indicates accessibility to the control and non control modules in the multiple CPU system Accessibility Access target Non control module I O setting outside of the group Control module Disabled Enabled e er Read o Writer te Accessible X Inaccessible The function version of intelligent function modules can be confirmed at the rated name plate of the intelligent function module and with the GX Developer s System monitor
596. ting o to C22722 Counter setting points can be set up to 256 Section 10 2 11 128 100 0 ms ae a me 0 5 to 1000 ms 0 5 ms units Section 10 10 131 10 0 ms 149 0 2 to 1 0 ms 0 1ms units Section 7 21 Section 4 1 3 The high speed execution is disabled Enable Disable the high speed execution Section 4 2 5 The start of an intelligent function Yes No to synchronize the start of an intelligent function module is synchronized module Special relays special registers after Yes NO to use the special relays special registers after Section 10 3 2 SM1000 SD1000 are used SM1000 SD1000 Section 10 3 3 ee Not used Use the same file name as the program Section 10 7 e Use the designated file e Not used e Use the same file name as the program e Use the following file e Not used e Use the same file name as the program Section 10 13 2 e Use the following file e Not used see Section 10 13 1 e Use the following file 9 PARAMETER MELSEC Q Table 9 1 Parameter List continued PLC RAS setting These settings are used for the RAS function WDT WDT setting Set the watch dog timer of the CPU module setting Set the watch dog timer for the use of an initial execution type Watch time 3000H program dog Set the watch dog timer for the use of a low speed execution type timer watching time program error an error is detected 3001H Designates whether or not to detect a specified error Constant scanning 3003H
597. tion E a sgh ales e aa en A E TO current value 0 2 2 2 3 5 5 2 7 7 3 10 Input reading timing Timer accuracy 1 scan 1 scan time timer time limit setting to 1 scan time 10 22 10 22 10 EXPLANTION OF DEVICES MELSEC Q c The timer response accuracy from when reading input X until when outputing it is 2 scan time timer time limit setting Precautions for using timers The following are a few precautions regarding timer use a A given timer cannot be designated by OUT T12 more than once ina single scan This designation results in measurement since the timer current value is updated at execution of each OUT T instruction OUT OUT OUT OUT OUT END Ti Te Ti END Ti Ts Sequence L I L program gt Current value is updated 1 Scan I b When a timer for example T1 coil is ON the OUT T1 instruction cannot be skipped using a CJ instruction and so forth If the OUT T instruction is skipped the timer current value will not be updated c Timers cannot be used in interrupt programs and fixed scan execution programs d Ifthe timer set value is 0 the contact turnes ON when the OUT T1 instruction is executed e If the set value changes to a value which is higher than the current value following a timer time out the time out status will remain in effect and timer operation will not be performed f If atimer is used at a low speed executio
598. tions for Executing Programs in the Standard ROM Memory Card a For boot run store parameters PLC parameters of the boot file setting ina standard RAM or memory card If parameters are stored in a program memory and a parameter valid drive is set to Program Memory the boot file setting made in the PLC Parameter dialog box is ignored As a result a boot run is not performed when power is turned on or when the PLC is reset If programs are written in the program memory during RUN status while a boot run is performed from a memory card RAM any change made will be reflected in the programs stored on the memory card RAM For details on the writing of programs during RUN status see Section 7 10 If programs are written in the program memory during RUN status while a boot run is performed from a standard ROM memory card ROM any change made will not be reflected in the programs stored in the standard ROM or the memory card ROM At the Boot file tab screen in the PLC Parameter dialog box set the maximum number of boot files to the number of files stored in the program memory The number of boot files will be decreased by one in the following cases where e A header is specified e A PLC parameter in which a boot file setting is maded is booted If boot operation is made under the following conditions it may take maximum 200 ms for each 1k steps 4kbyte during boot sequence e To boot from an ATA card e To boo
599. to 32767 or 0000H to FFFFH Data registers which consist of 16 bits per point read and write data in 16 bit units b15 S4 If the data registers are used for 32 bit instructions the data will be stored in registers Dn and Dn 1 The lower 16 bits of data are stored at the data register No Dn designated in the sequence program and the higher 16 bits of data are stored in the designated register No 1 Dn 1 For example if register D12 is designated in the DMOV instruction the lower 16 bits are stored in D12 and the upper 16 bits are stored in D13 H _ pov ks00000 oH d Processing object D12 D13 D13 D12 Upper 16 bits Lower 16 bits Ha Je Two data registers can store a range of numeric data from 2147483648 to 2147483647 or from OH to FFFFFFFFH Data stored by the sequence program is maintained until another data save operation occurs 10 29 10 EXPLANTION OF DEVICES MELSEC Q 10 2 13 Link registers W 1 Definition a A link register is the High Performance model QCPU memory used to refresh the High Performance model QCPU with data from the link registers LW of intelligent function modules including MELSECNET H network module Link registers are used to store numeric data 32768 to 32767 or 0000H to FFFF High Performance model QCPU MELSECNET H network module Link register Link register W LWO f Link refresh 1 Link refresh 1 sett
600. to designate outputs of sub routine program operation results ON OFF data to the sub routine program CALL source e The operation results are stored at the device designated by using sub routine programs with arguments All bit data designation devices except High Performance model QCPU inputs X DX can be used 10 32 PAn EXAME MR oer re pea Te eee A EL Pe CR Te r pp ee Pe a7 10 EXPLANTION OF DEVICES MELSEC Q c Function registers FD e Function registers are used to perform write read of data between the sub routine call source and the sub routine program e The function register I O condition is automatically determined by the High Performance model QCPU If the sub routine program data is the source data the data is designated as sub routine input data If the sub routine program data is the destination data the data is designated as sub routine output data e 1 point occupies 4 words The number of words used depends on an instruction in a sub routine program A one word instruction requires 1 word J CALLP PO oH Po 1k MOV RO ro a eee eee ee The data is stored in one point DO A two words instruction requires 2 words Ji CALLP PO oH Po 1 DMOV RO rot ee ieee eee The data is stored in two points DO and D1 The destination of 32 bit multiplication division operation requires 4 words Hoe PO ca ro D RO R10 roo t 5 The data is stored in four points DO to D3
601. tructions for EMC Directive 8 1 3 Cables 8 1 4 Power supply module 8 1 5 When using Q1AS6 B type base unit 8 1 6 Others 8 2 Requirement to Conform to the Low Voltage Directive 8 2 1 Standard applied for MELSEC Q series PLC 8 2 2 MELSEC Q series PLC selection 8 2 3 Power supply 8 2 4 Control box 8 2 5 Grounding 8 2 6 External wiring 9 LOADING AND INSTALLATION 9 1 General Safety Requirements 9 2 Calculating Heat Generation by PLC 9 3 Module Installation 9 3 1 Precaution on installation 9 3 2 Instructions for mounting the base unit 9 3 3 Installation and removal of module 9 4 How to set Stage Numbers for the Extension Base Unit 9 5 Connection and Disconnection of Extension Cable 9 6 Wiring 9 6 1 The precautions on the wiring 9 6 2 Connecting to the power supply module 10 MAINTENANCE AND INSPECTION 10 1 Daily Inspection 10 2 Periodic Inspection 10 3 Battery Replacement 10 3 1 Battery service life 10 3 2 Battery replacement procedure 10 4 When Resuming Operation after Storage of PLC without Battery 10 5 When Resuming PLC Operation after Storage of PLC with Battery Gone Flat A 16 A 16 11 TROUBLESHOOTING 11 1 Troubleshooting Basics 11 2 Troubleshooting 11 2 1 Troubleshooting flowchart 11 2 2 Flowchart for when MODE LED is not turned on 11 2 3 Flowchart for when MODE LED is flickering 11 2 4 Flowchart for when POWER LED is turned off 11 2 5 Flowchart for when the RUN LED is turned off 11 2 6 When the RUN LED i
602. tting at the PLC system tab screen in the PLC Parameter dialog box You should also designate System setting at the intelligent function module To execute an interrupt program by the interrupt from the intelligent function module refer to the manual of the intelligent function module being used 8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE SPECIAL FUNCTION MODULE MELSEC Q 8 3 Communication Between High Performance model QCPU and AnS Series Special Function Modules The following methods enable the communication between High Performance model QCPU and the special function modules compatible with AnS Series e Device initial value e Intelligent function module device e FROM TO instruction The following table shows the communication timing for the communication methods with special function modules described above Communication timing Storage location 1 2 Communication method with special function modules Performance STOP gt Instruction i 3 model QCPU RUN Special Device initial value O O FROMTOinstuction CE CS d o o o hd o d jh oo ST COT Inteligent function module device 4 l o o Executable Not executable 1 Indicates whether the data of the device initial value is stored in High Performance model QCPU or in a special function module x2 Represents the internal memory of High Performance model QCPU or a memory card 3 Special represents a spec
603. ttings setting in the PLC parameter s multiple CPU settings determines whether input can be loaded from input modules and intelligent function modules being controlled by other CPUs Multiple CPU settings I O sharing when using Multiple CPUs e 1 Snr ae ane All CPUs can read all inputs No of PLC Ev HE VEs heoa ma e ae iin O All CPUs can read all outputs Operating mode 1 0 sharing n p Error operation mode at the stop of PLC E micros omneis gt FZ All station stop by stop error of PLC IT All station stop by stop error of PLC2 Refresh settings I All station stop by stop eror of PLC3 Change screens Setting v F All station stop by stop error of PLC4 AICPOScar Send range for each PLC PLC side device PLC 7 The autoreftesh area Caution Dev starting Da Point Start End Start End Nad to2s ooo BFF Do onza No2 102a 0000 osFF D1024 D2047 Nos 512 oo o1FF __b2oael___ 2569 Nod 512 oo o1FF D2560 D3071 Caution Ofset HEX om stating adtess ofthe auto rehash ar Refer to the user s manual of the each PLC about the atari ting address t e e S A E A EAEEREN TON EZE The unit of points thatsand range for each PLCs word Import Multiple CPU Parameter Check e Cancel a When Load input condition outside of group has been set 1 Loads ON OFF data from the input and intelligent function modules being controlled by the other CPUs by p
604. two digits of the BCD code Erorinteriation Eenmaa Stores an identification code to determine what error information has been stored in the common error information and individual SD4 identification code identification code error information o Time the diagnosis Time the diagnosis error occurred error occurred wo A a SD5 to SD15 SD16 to SD26 Common error Common error The common information corresponding with the number of the information information error during diagnostic is stored Individual error Individual error The individual information corresponding with the number of the information information error during diagnostic is stored 1CH Empty je Se i Cannot be used 1DH Switch status CPU switch status Stores the CPU module switch status SD200 1Ex LED status CPU LED status Stores the CPU module s LED bit pattern SD201 P i P j H CPuoperation CRU operation Stores the CPU module s operation status SD203 status status o T Wo b The host CPU s operation information area is updated when the contents of the corresponding register change However there are times when changes in the corresponding register are relayed by a maximum of 200ms when the High Performance model QCPU s scan time is 200ms or less There are times when changes in the corresponding register are delayed by 200ms or more if the High Performance model QCPU s scan time exceeds 200ms c The High Performance model Q
605. type of the slot to which the hardware error time CPU operation mode is set Then select Detailed setting Choose the hardware error time CPU operation mode of the slot to which the hardware error time CPU operation mode is set The default is Stop Select Intelligent Qn H Parameter x PLC name PLC system PLC file PLCRAS Device Program Bootfile SFC 1 0 assignment 140 Assignment Slot e Model name Points Stary a PLC PLC o o 1 1 2 2 Intelli 3 3 4f 4 5 5 6 6 X X v Assigning the 1 0 address is not necessary as the CPU does it automatically Leaving this setting blank will not cause an error to occur Switch setting Detailed setting Select Detailed setting 16points afafajajajaja afafa alaaa na fon Jon f foo jn J jo Base setting Base mode Auto C Detail 8 Slot Default 12 Slot Default Settings should be set as same when Import Multiple CPU Parameter Read PLC data using multiple CPU Hardware error time CPU operation mode Select Stop or Continue 2 HAW error A pome time PLC 0 response Control PLC mode operation time i mode_ A B Intelli Jsettings should be set as same when using multiple CPU End Cancel 3 Precautions a The hardware error time CPU operation mode setting is made valid
606. u cannot use the system if two or more connector pins are inserted to the stage setting connector On the contrary you cannot use the system if no connector pin is inserted to the stage setting connector 012345 6 7 Setting of extension Q38B i i stage gt Main base unit Stage setting connector 8 9 101112131415 joo 1 gt f 00 Q Extension base unit for mounting module 2 o a Q68B corresponding to the Q Series oo al Q5__ B Q6 _ B is connected to the main base unit or Q5L1B Q6 B 16 17 18 19 20 21 22 23 oo 2 oo e 5 QA1S68B oo e Extension base unit for mounting module corresponding to the AnS Series 24 25 26 27 28 29 30 31 QA1S6L_1B is connected to the end of Xe 3 2 Q5L1B Q6 _B or QA1S6 _ B a QA1S68B oo g exe b amp 5 ASSIGNMENT OF I O NUMBERS MELSEC Q 5 3 Base Unit Assignment Base Mode There are Auto and Detail modes to assign the number of modules can be mounted in the main and extension base units of High Performance model QCPU 1 Auto mode In Auto mode the slot numbers are assigned to the main and extension base units according to the number of slots than can be occupied The I O numbers are assigned according to the modules which can be mounted to the current base unit a
607. ule attachable QA1S6_ General name for QA1S65B and QA1S68B type extension base unit with AnS Series power supply module I O module special function module attachable QnCPU General name for QO2CPU QnHCPU General name for Q02HCPU QO6HCPU Q12HCPU and Q25HCPU Main base unit General name for Q33B Q35B Q38 and Q312B type main base unit with Q Series power supply module I O module intelligent function module attachable Slim type main base unit General name for Q32SB Q33SB and Q35SB type slim type main base units that accept High Performance model QCPU slim type power supply module input output modules and intelligent function modules Extension base unit General name for Q5_ B Q6 B and QA1S6__ Base unit General name for main base unit and extension base unit Extension cable General name for QC05B QCO6B QC12B QC30B QC50B and QC100B type extension cable Power supply module General name for Q61P A1 Q61P A2 Q62P Q63P Q64P A1S61PN A1S62P and A1S68P type power supply module Slim type power supply module General name for Q61SP type slim type power supply module Battery General name for battery for Q6BAT and Q7BAT type CPU module and Q2MEM BAT type SRAM card SRAM card Abbreviation for Q2MEM 1MBS and Q2MEM 2MBS type SRAM card Flash card General name for Q2MEM 2MBF and Q2MEM 4MBF type Flash card ATA card General name for Q2ME
608. ule devices is a Reading or writing the buffer memory of the intelligent function module special function module is rather faster than the processing speed of FROM TO instructions For example case of MOV U2 G11 DO b To conduct reading the buffer memory of the intelligent function module special function module and another process in a single instruction add the processing speed of FROM TO instruction and processing speed of instruction to setup the reference value For example case of U2 G11 DO D10 If the same buffer memory of the same intelligent function module special function module is used two or more times in a sequence program the processing speed can be increased by using the FROM instruction to read that buffer memory data to a High Performance model QCPU device x1 For details on buffer memory addresses and applications refer to the intelligent function module special function module manual 10 39 10 39 10 EXPLANTION OF DEVICE ee MELSEC Q 10 6 Index Registers Z 1 Definition a Index registers are used in the sequence program for indirect setting index qualification designations An index register point is used for index modification XO _ move K5 ZO SM400 BCD DOZO K4Y30 Index registers consist of 16 bits per point b There are 16 index registers ZO Z15 c Index registers which consist of 16 bits per point read and write data in 16bit units
609. ultiple CPU Parameter Read PLC data using multiple CPU Acknowledge XY assignment Mutiple CPU settings Defaut Check End Cancel A PARAMETER ERROR error code 3010 occurs to all mounted CPU modules in the following cases The number of mounted CPU modules exceeds the number set with the No of CPU setting No CPU module is installed in slots set for CPU No 1 to No 4 14 15 14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEM MELSEC Q b Operation mode setting optional This is set to continue operation of other CPUs where a stopping error has not occurred when an error occurs at any of CPUs No 2 to No 4 The operation mode for the CPU No 1 cannot be changed all CPUs will suspend operations when a stop error is triggered for the CPU No 1 See Section 14 2 8 for further details c I O settings outside of the group optional This is set when the input and output X Y for O modules and intelligent function modules being controlled by other CPUs is to be downloaded to the host CPU See Section 17 2 for further details d Refresh setting optional This is set up to automatically refresh the device data on the multiple CPU system See Section 16 1 for further details e Control CPU settings optional Sets up the control CPUs for the I O modules and intelligent function modules mounted on the base units on the multiple CPU system indicated by the C arrow All default settings a
610. ultiples of 16 output oints 16 to 4096 only 1 respectively Head I O address 10H Intelligent function Starting I O No 0 to FFH modules only 2 Buffer memor Intelligent function High speed Head address 0 to FFFFH g Up to 6 points for start modules only buffer transfer read and write Number of transferred bits Specify even addresses setting Points 1 2 to FFFEn and even words only 3 PLC side Head device No D W R ZR only device start 1 Only multiples of 16 can be set for both the head device No and the number of transferred bits 2 Since the QA base cannot be connected the A QnA series intelligent function modules are not the target When the QA base is connected PARAMETER ERROR 3006 is detected PARAMETER ERROR 3006 is also detected if an error occurs in intelligent function module mounting check or buffer memory capacity check x3 Only when the specified number of transferred words is 1 an odd address can be specified respectively 2 This function s execution requires both the El instruction is in execution and 149 is not masked by the IMASK instruction By default 149 is not masked by the IMASK instruction Executability of high speed interrupt Executable x Inexecutable High speed I O refresh Conditions High speed interrupt program ee speed buffer transfer execution MASK instruction 149 masked O E DI instruction x x in execution 7 FUNCTION
611. umber a The High Performance model QCPU uses drive numbers to control standard RAMs standard ROMs and memory cards GX Developer specifies a selected memory standard RAM standard ROM or memory card to read write parameters and program files from to the High Performance model QCPU There is no need to specify the drive number when using the GX Developer b The table below shows the drive numbers used to specify a selected memory program memory standard RAM standard ROM or memory card when using a sequence program The drive number must be used to specify a selected memory when the read write is made through access from a serial communication module Programmemory o0 High Performance model Standard RAM oe QCPU built in ancar Standard ROM a Memory card RAM SRAM card Flash card Memory card ROM ATA card E 4 Memory Capacity and Formatting The following table shows the size of a memory of the High Performance model QCPU and whether to format a memory r one Q02CPU Q02HCPU QO6HCPU Q12HCPU Q25HCPU a to Format Standard RAM 64 64 kbyte 128 kbyte 256 kbyte Prarain menor 28 k steps 28 k steps 60 k steps 124 k steps 252 k steps 2 Y 412 kbyte 112 kbyte 240 kbyte 496 kbyte 1008 kbyte Standard ROM 112 kbyte 112 kbyte 240 kbyte 496 kbyte 1008 kbyte SRAM Q2MEM 1MBS 1 Mbyte card Use the GX Developer or Q2MEM 2MBS 2 Mbyte a personal computer Memory Q2MEM 2MBF 2 Mbyte Flash c
612. unit changes depending on the CPU module and memory area to which the files will be written This unit is called the file size unit a File size units classified by memory areas The following table indicates the file size units classified by the CPU module and memory area to which files will be written File Size Unit of Program Memory Standard ROM Flash Card 1 QO2CPU 128 steps 512 bytes 2 1 The file size unit of the Flash card applies to the case where the program memory contents are written to the Flash card via the CPU module using GX Developer 2 1024 steps 4096 bytes for the CPU module whose first five digits of serial No are 04121 or earlier b File size units classified by memory cards Memory Card Model Name Memory Capacity 2MEM 1MB 12 byt SRAM card a gt z yes Q2MEM 2MBS 1024 bytes Q2MEM 2MBF 1024 bytes Flash card Q2MEM 4MBF 1024 bytes Q2MEM 8MBA 4096 bytes ATA card Q2MEM 16MBA 4096 bytes Q2MEM 32MBA 2048 bytes 1 The file size unit of the Flash card applies to either of the following cases 1 Where files are written to the Flash card via the CPU module using GX Developer 2 Where files bypass the CPU module and are written to the Flash card using GX Developer 6 MEMORIES AND FILES HANDLED BY HIGH PERFORMANCE MODEL QCPU MELSEC Q 2 Memory capacity calculation example When files are written to the memory area the storage capacity unit changes depending on the CPU module and memory are
613. urement is made in 100us units END SD526 Stores the ms place Storage range 0 to 65535 processing New SD527 Stores the us place Storage range 0 to 900 Current scan Current scan time Stores the current scan time of a low speed execution type time in 1 ms units program into SD528 and SD529 Measurement is made in for low speed C rents an in 100us units execution type SD528 Stores the ms place Storage range 0 to 65535 processing programs i1100 us ural SD529 Stores the us place Storage range 0 to 900 Minimum scan Minimum scan time Stores the minimum value of the scan time of a low speed time for in 1 ms units execution type program into SD532 and SD533 S Every low speed a s Measurement is made in 100us units END j Minimum scan time execution type in 100 us units SD532 Stores the ms place Storage range 0 to 65535 processing programs SD533 Stores the us place Storage range 0 to 900 Maximum scan Maximum scan time Stores the maximum value of the scan time except that of time for in 1 ms units the first scan of a low speed execution type program into S Every low speed A SD534 and SD535 Measurement is made in 100us units END Maximum scan time execution type in 100 us units SD534 Stores the ms place Storage range 0 to 65535 processing programs SD535 Stores the us place Storage range 0 to 900 END processing time Stores the time from the end of a scan execution type
614. us is switched to the RUN status The output status is effected as set for Output mode at STOP to RUN at the PLC System tab screen 7 FUNCTION MELSEC Q 7 5 Clock Function 1 What is Clock Function a Clock function reads the clock data inside the High Performance model QCPU with a sequence program and uses the data for clock management Also the time data is used for time maintenance for the High Performance model QCPU system functions such as those for failure history The clock operations are maintained using the battery Q6BAT even when the PLC power is off or when a momentary power failure for longer than the permitted time occurs b Clock Data The following table lists the time data that are used for the High Performance model QCPU clock element Contents Four digits in AD Countable from 1980 to 2079 Month 1 to 12 Day 1to31 Automatic leap year calculation 0 to 23 24 hours Minute 0 to 59 0 to 59 Second Sunday Monday po 2 Day of the week 6 Friday Saturday 2 Writing Reading Time Data To From Clock Element a The following two methods can be used to write to the time data clock element 1 Method to write from GX Developer The time data is written to the clock element by displaying Online gt Set time window m Connection target information l eoe e EON lt gt PLE modue Target PLE Network No p Station No Host PLC type faoeH m Clock setup Sp
615. us will be displayed in the unit column when an error has occurred for even one of the modules Diagnostics This function is used to confirm the status of the High Performance model QCPU and errors 7 FUNCTION MELSEC Q e Module s detailed information This function is used to confirm the detailed information for selected modules Refer to the instruction manual for details on the relevant intelligent function module and intelligent function modules f Base information Enables the Overall Information and Base Information to be confirmed 1 Overall information Enables the number of base units in use and the number of modules mounted on the base units to be confirmed 2 Base information Enables the base name the number of slots the base type and the number of modules mounted onto the base for the selected base unit main base unit additional base units 1 to 7 to be confirmed g Product Information List Enables the individual information for mounted CPU modules I O modules and intelligent function modules to be confirmed type series model number head I O control PLC serial No function version Serial No Function version Product Information List Intelli Q QU71LP21 25 32pt 0000 020810000000000 None w None ad z None ia None a CS file creating Close 7 FUNCTION MELSEC Q 7 21 LED Display The High Performance model QCPU has an LED to indicate the High
616. used 10 2 10 2 10 EXPLANTION OF DEVICES MELSEC Q 10 2 Internal User Devices Internal user devices can be used for various user applications The number of usable points setting is designated in advance default value for internal user devices However this setting can be changed at the Device tab screen in the PLC Parameter dialog box Device setting screen PLC name PLC system PLC file PLC RAs ogam Bootfile SFC 1 0 assignment Dev Latch 1 Latch 1 Latch 2 Latch 2 point _ start end start eni dev start dev end K ik 12K 8K 2k Device total 28 8 K words The total number of device points is up to 29 K words The bit device total is up to 64 Kbits Word device 26 0 K words Latch 1 It is possible to clear using the latch clear key Latch 2 Clearing using the latch clear key is disabled Bit device 44 0 K bits Acknowledge XY assignment Default Check End Cancel 1 Setting range in the internal user device The number of points for internal user devices other than the input X output Y step relay S link special relay SB and link special registers SW can be changed within a 29 k words including 3 7 k words for an internal user device range at the Device tab screen in the PLC Parameter dialog box The following gives more information a Setting range 1 The number of device points i
617. used b13 Not used b14 Not used b15 Not used The use conditions for memory card A are stored as bit patterns In use when ON The significance of these bit patterns is indicated below Boot operation QBT Parameters QPA Device comments QCD Device initial value QDI File register R QDR Sampling trace QTS Status latch QTL Program trace QTP Memory card A use conditions Indicates the drive 3 4 models b15 to b8 b7 to b4 b3 Simulation data QDS CPU fault history QFD SFC trace QTR Local device QDL Not used Not used Not used Not used to bO 0 A Drive 3 Fixed at 1 App 38 Standrd RAM Drive 4 Fixed at 3 Stanga Rom Fxed at S S Status change S Status change S Initial App 38 APPENDICES MELSEC Q Special Register List Continued Corresponding Correspondin Number Name Meaning Explanation ACPU p g Do E Indicates memory card B models installed b15 to b8 b7 to b4 b3 to bO 0 Memory card Memory card Drive 1 0 Does not exist a B models B models RAM model 1 SRAM S Initial New Drive 2 0 Does not exist BOM medel 2 E PROM ROM model 3 Flash ROM S Ini Drive 3 capacity is stored in 1 kbyte units QCPU Q2A S1 SD622 3 a Ta Q3A Drive 3 capacity is stored in 1 kbyte units ial New Q4A Q4AR e Drive 4 capacity is stored in 1 kbyte units i
618. ut to external devices High Performance model QCPU reads writes the data from to the buffer memory 8 1 Communication Between High Performance model QCPU and Intelligent Function Modules The following methods enable the communication between High Performance model QCPU and intelligent function modules e Initial setting or automatic refresh setting using GX Configurator e Device initial value e FROM TO instruction e Intelligent function module device e Instructions dedicated for intelligent function modules The following table shows the communication timing for the communication methods with intelligent function modules described above Communication timing Storage location 1 dan ERAR High h h ll f Communication i seas intelligent function Performance STOP gt linstruction model QCPU RUN Initial setting GX Configurator Instructions dedicated for intelligent function modules 4 Can be stored Cannot be stored 1 Indicates whether the data designated by the GX Configurator of the device initial value etc is stored in High Performance model QCPU or in an intelligent function module x2 Represents the internal memory of High Performance model QCPU or a memory card x3 Intelligent represents an intelligent function module x4 Represents the program using the intelligent function module device the FROM TO instruction or the instructions dedicated for intelligent function modules 8
619. uted Comment read not completed Comment read completed Comment read completion flag e Switches ON for only one scan when COMRD or PRC instruction is completed S Status change Switches ON while a file is being accessed by the S FWRITE S FREAD COMRD PRC or LEDC instruction File not accessed File being accessed File being accessed S Status change Error detection performed Error detection not performed Request for communication with intelligent device station enabled ON Request for communication with intelligent device station disabled BIN DBIN instruction error disabling flag Turned ON when OPERATION ERROR is suppressed for BIN or DBIN instruction BUSY signal for CC Link communication request registration area Used for determination whether to enable or disable the S communication request for the intelligent device station Instruction connected with A 1S J61QBT11 execution SM704 SM707 SM710 SM711 SM712 SM714 SM715 SM720 SM721 SM722 SM730 App 8 App 8 APPENDICES PKEY instruction execution in progress flag Keyboard input reception flag for PKEY instruction MSG instruction reception flag PID bumpless processing for complete derivative Selection of link refresh processing during COM instruction execution Enable disable local device at CALL Enable disable local device in interrupt program CC Link dedic
620. vacant with High Performance model QCPU 2 Special register SD1500 and later are dedicated for Q4ARCPU App 22 APPENDICES MELSEC Q Special Register List 1 Diagnostic Information ee Clock time for diagnosis error occurrence Clock time for diagnosis error occurrence Error information category code Error information categories App 23 PSE Sa errors error code e Contents identical to latest fault history information change Year last two digits and month that SDO data was updated is stored as BCD 2 digit code b15 to b8 b7 to bO Example Year 0 to 99 Month 1 to 12 October 1995 9510H The day and hour that SDO was updated is stored as BCD 2 digit i code jagnosi bi5 to b8 b7 to po Example New Day 1 to 31 Hour 0 to 23 7 oa on 25th The minute and second that SDO data was updated is stored as BCD 2 digit code b15 to b8 b7 to bo Example Minutes 0 to 59 Seconds 0 to 59 85 min 48 sec past the hour 3548H Category codes which help indicate what type of information is being stored in the common information areas SD5 through SD15 and the individual information areas SD16 through SD26 are stored here b15 to b8 b7 to bO Individual information Common information O Rem category codes category codes The common information category codes store the following codes 0 No error Unit module No PLC No Base No File name Drive name Time value set
621. verall system scan time Data processing low speed Control at 1 ms or higher Control at several to several tens of ms Mechanical control Mechanical control high speed CPU module Data processing CPU module F lt i ee z Everything controlled on a single CPU Mechanical control made even father by load dispersion in accordance with control tact b Itis possible to increase the amount of memory used throughout the entire system by spreading the memory used between several High Performance model QCPUs Expansion possible in CPU modules One CPU module added Program memory expanded e Device memory expanded 3 Enables system configuration through function dispersion By dispersing the functions so that control for production line A and control for production line B is performed on different High Performance model QCPUs it is possible to debug each function individually 13 1 13 1 13 OUTLINE OF MULTIPLE CPU SYSTEM 13 2 MELSEC Q 4 Communication can be made between CPU modules in the multiple CPU system The following data transfer can be made between CPU modules in the multiple CPU system a b Automatic refresh setting at GX Developer enables the data transfer between CPU modules The High Performance model QCPU can use the FROM S TO instruction to read data from other CPU as necessary Instructions dedicated to Motion can be used to issue control commands from the Hig
622. wer supply module O module and special function module of the AnS series 3 The Q series power supply module is not required for the Q5LB type extension base unit 4 AS a power supply module use the Q61P A1 Q61P A2 Q62P or Q64P The slim type power supply module Q61SP cannot be used 2 SYSTEM CONFIGURATION FOR SINGLE CPU SYSTEM MELSEC Q b When slim type main base unit Q3_ SB is used MITSUBISHI goocco0 MELSEG E Memory card 1 High Performance model QCPU 2MEM 1MBS Q2MEM 2MBS 2 CENNET C MEANE Q02CP U QO2HCPU QO6HCPU fa Q2MEM 8MBA Q2MEM 16MBA Q12ACPUQ25HCPU Q2MEM 32MBA 7 ienaa hes Battery Battery holder Q7BAT Q7BAT SET o aijee x Slim type main base unit Slim type power supply module 3 Q32SB Q33SB Q35SB 2 he module Intelligent function module POINTS x1 One memory card is installed Select the memory card from the SRAM card Flash card and ATA card according to the application and capacity When the memory card available on the market is used operation is not guaranteed 2 The slim type main base unit does not have an extension cable connector The extension base or GOT cannot be connected x3 As a power supply module use the slim type power supply module Q61SP The Q61P A
623. wer supply that is different from the rating or incorrectly wiring the product could result in fire or damage e External connections shall be crimped or pressure welded with the specified tools or correctly soldered Imperfect connections could result in short circuit fires or erroneous operation e Tighten the terminal screws with the specified torque If the terminal screws are loose it could result in short circuits fire or erroneous operation Tightening the terminal screws too far may cause damages to the screws and or the module resulting in fallout short circuits or malfunction e Be sure there are no foreign substances such as sawdust or wiring debris inside the module Such debris could cause fires damage or erroneous operation e The module has an ingress prevention label on its top to prevent foreign matter such as wire offcuts from entering the module during wiring Do not peel this label during wiring Before starting system operation be sure to peel this label because of heat dissipation Startup and Maintenance precautions lt DANGER e Do not touch the terminals while power is on Doing so could cause shock or erroneous operation e Correctly connect the battery Also do not charge disassemble heat place in fire short circuit or solder the battery Mishandling of battery can cause overheating or cracks which could result in injury and fires e Switch all phases of the external power supply off w
624. when e The PLC CPU is powered ON or e The CPU module is reset Failure to perform either operation after changing the hardware error time CPU operation mode setting will result in PARAMETER ERROR error code 3000 7 25 7 25 7 FUNCTION MELSEC Q 7 10 Setting the Switches of the Intelligent Function Module 1 Setting the Switches of the Intelligent Function Module The switches of the intelligent function module is to set the switches of an Q Series intelligent function module using GX Developer The settings of the switches set by GX Developer is written from High Performance model QCPU to each intelligent function module at the leading edge or reset of High Performance model QCPU High Performance Intelligent function lt 2x paveiopa model QCPU Power supply module L ON CPU Switch setting of the i module Reset intelligent function module at the I O assignment 2 Setting the Switches of the Intelligent Function Module At the I O assignment tab screen in the PLC Parameter dialog box specify the desired switch setting Select Intelli in the Type column of a slot for which to set the switches of the intelligent function module Select Intelli Select Switch Setting Qn H Parameter
625. witches ON and ending time out when the current value exceeds the set value The current value matches the set value when a time out occurs There are two types of timers a low high speed that allows the current value to return to 0 when a timer coil switches OFF and a retentive timer that retains the current value even when a timer coil switches OFF Timers Timers Low speed timers E High speed timers L Retentive timers Low speed retentive timers High speed retentive timers With a timer setting instruction format a device is assigned for a low speed timer or high speed timer The OUT TO instruction is used to assign a device for a low speed timer The OUTH TO instruction is used to assign a device for a high speed timer With a timer setting instruction format a device is assigned for a low speed retentive timer or high speed retentive timer The OUT TO instruction is used to assign a device for a low speed retentive timer The OUTH TO instruction is used to assign a device for a high speed retentive timer 1 Definition a Low speed timers are valid only while the coil is ON b The time measurement begins when the timer s coil switches ON and the contact switches ON when a time out occurs When the timer s coil switches OFF the current value becomes 0 and the contact switches OFF Ladder example k XO K10 When X0 switches ON the TO coil switches ON and the To contact switches ON
626. wn below are in progress when an interruption occurs the counting operation will be delayed until processing of these items is completed The count processing starts after the execution of programs is completed Even if the same interruption occurs again while processing of these items is in process only one interruption will be counted e During execution of sequence program instructions e During interrupt program execution e During execution of a fixed scan execution type program The maximum counting speed of the interrupt timer is determined by the longest processing time of the items shown below e Instruction with the longest processing time among the instructions used in the program e Interrupt program processing time e The processing time of a fixed scan execution type program The use of too many interrupt counters will increase the sequence program processing time and may cause a WDT ERROR If this occurs reduce the number of interrupt counters or the counting speed for the input pulse signal The interrupt counter s count value can be reset by using the RST C instruction in the sequence program prior to the FEND instruction The interrupt counter s count value can be read out by using the sequence program MOV instruction 10 28 10 EXPLANTION OF DEVICES 10 2 12 Data registers D 10 29 MELSEC Q 1 Definition a b c Data registers are memory devices which store numeric data 32768
627. work A1SJ71LP21 A1SJ71BR11 A1SJ71QLP21 module A1SJ71QLP21S A1SJ71QLP21GE A1SJ71QBR11 MELSECNET II B data link 1 6 174 qpo1 A1SJ71AR21 A1SJ71AT21B A1SJ71QE71 B2 S3 B5 S3 Ethernet interface module A1SJ71E71 B2 S3 B5 S3 Serial communication module 1a 45 174 C24 N A1SJ71UC24 R2 R4 PRF computer link module CC Link master local module A1SJ61QBT11 A1SJ61BT11 Modem interface module A1SJ71CMO S3 ME NET interface module A1SJ71ME81 e A dedicated instruction for the next module which was present in the QnA A series program instruction cannot be used for the High Performance model QCPU Re writing using FROM TO instruction is required High speed counter module _ A1SD61 A1SD62 A1SD62D S1 A1SD62E f Some system configurations and functions are restricted when writing the parameter of the High speed interrupt fixed scan interval setting Refer to the following manual for the restrictions when the parameter of the High speed interrupt fixed scan interval setting has been written e High Performance model QCPU Q mode User s Manual Function Explanation Program Fundamentals Note that the above restrictions do not apply to the High Performance model QCPU of serial number 04011 or earlier since it ignores the High speed interrupt fixed scan interval setting module 2 Software package GX Developer that can use the functions added to the High Performance model QCPU changes depending on the function versi
628. ws 1 Resolve the cause of error 2 Store the error code of the error to be canceled in the special register SD50 3 Switch special relay SM50 from OFF to ON 4 The error is canceled b Status after error cancellation When the CPU module is recovered by canceling the error the special relay special register and LED affected by the error are set to the status before the error occurred When the same error occurs after canceling the error it is logged again in the failure history c Cancellation of annunciator For the cancellation of the annunciator detected multiple times only the first detected F is canceled 1 When error cancellation is performed by storing the code of the error to cancel is stored in SD50 the lower 2 digits of the code number is ignored Example When the error codes 2100 and 2101 occur canceling the error code 2100 will also cancel the error code 2101 When 2100 and 2111 occur in the error code and error code 2100 is canceled error code 2111 is canceled as well If the cause of the error is not in the CPU module the error cause cannot be resolved if error cancellation is performed using the special relay SM50 and special register SD50 Example Since SP UNIT DOWN is an error that occurred on the Q bus the error cause cannot be resolved if error cancellation is performed using the special relay SM50 and special register SD50 Refer to the error code list in the High Performance mode
629. x 2 Execution of fixed scan execution type program a Interrupt factor Fixed scan execution type program execution Link refresh Fixed scan execution type programs are executed at specified cyclic time intervals When multiple fixed scan execution type programs have reached there simultaneously they are executed in the ascending order set at the Program tab screen in the PLC Parameter dialog box Set the periodic interval at the Program setting tab screen in PLC Parameter dialog box The setting range varies with the set unit e When the unit is ms 0 5 to 999 5ms e When the unit is s 1 to 60s When the specified times of fixed scan execution type programs and interrupt programs 128 to 131 have come simultaneously the priority of execution is given to the interrupt programs Execution during network refreshing When the execution conditions of fixed scan execution type programs are established during the network refreshing the network refresh is suspended and interrupt programs are executed Therefore even if the block assurance of cyclic data for each station is made in the MELSECNET H network system the above operation will not be assured when a device set to be refreshed is used in the interrupt programs 1 10ms ale 10ms uN ie y execution Link refresh operation is suspended and the interrupt program is executed Fig 4 5 Execution of Fixed Scan
630. x D0 5 b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 bO gt Bit designation DO 1 0 4 0 Weir yf Word device designation b Direct processing in 1 point units is permitted within a program simply by using direct access inputs DX _ and direct access outputs DY _ In the case of High Performance model QCPU In the case of AnS Direct access input i Dx104 M9036 H H py 100 lt H SET M9052 L Always ON utput to output M9036 module at SEG K1xX10 K1B0 instruction execution X10 to X13 refresh gt Read from input MO ci Y100 module at instruction execution M9036 m HH see ktY100 K1B0 H Y100 to Y103 refresh c Differential contacts HH eliminate the need of converting inputs to pulses In the case of High Performance model QCPU In the case of AnS Differential contact XO X1 X0 hH vo H Y100 MO K H4 Y100 gt gt ON at leading Y100 edge of X0 1 OVERVIEW MELSEC Q d The buffer memory of intelligent function module e g Q64AD Q62DA can be used in the same way as devices when programming In the case of High Performance model QCPU In the case of AnS XO P U4 G12 Readout of Q64AD buffer memory s address 12 data UNG12 C gt Buffer memory address designation Intelligent function module designation Power supply module QCPU Input 16
631. xample a 10 output becomes Y10 2 The direct access output gives out the ON OFF data to an output module when the instruction is executed High Performance model QCPU Output module Output refresh area ON OFF data output roe The direct access output is indicated as DY in the sequence program For example a 10 output becomes DY10 b Differences between refresh output and direct access output The direct access output accesses an output module directly when an instruction is executed which realizes shorter external output time However it processes an instruction slower compared with the refresh output The direct access output is used only for outputting to the output module or the intelligent function module special function module mounted on the base unit or extension base unit The refresh and direct output differences are shown in Table 10 3 below Table 10 3 Differences Between Refresh Outputs amp Direct Access Outputs Refresh Input Direct Access Outputs 0 158458 Main base unit ges Extension base unit 8 8Us Processing speed OUT Y DY Main base unit 4 0 Us OIDPE MS Extension base unit 4 8 Us Output module installed at base extension base unit Outputs of intelligent function module Usable Usable installed at base extension base unit Outputs of I O link module installed at extension base unit Outputs used at MELSECNET H network Usable Unusable system or C
632. y set for T device Stores the number of points currently set for ST devices ints e Stores the number of points currently set for C devices located for C APPENDICES MELSEC Q Special Register List Continued Set by Expl eee oe Number of poin P g SD302 Device umber Or ponis Stores the number of points currently set for D devices A allocated for D allocation Number of points SD303 Same as p Stores the number of points currently set for W devices S Initial allocated for W ee Number of points contents E P Stores the number of points currently set for SW devices allocated for SW Reserves the designated time for communication processing with GX Developer or other units The greater the value is designated the shorter the response time reserved for Time reserved for for communication with other devices GX Developer serial communicat communication communication units becomes ion i Setting range 1 to 100 ms processing If the designated value is out of the range above it is assumed to no setting The scan time becomes longer by the designated time D304 END processing n D342 d D343 n D344 i S Initial SD345 to Sp346 Ethernet With QCPU the Ethernet IP address of the 1st module is stored QCPU information in buffer memory Remote SD347 D34 Inf f 2n a 9 rhs romana Configuration is identical to that for the first module SD355 to Information from 3rd
633. ystem PLC file PLCRAS Device Program Boot file src 0 assignment r Boot option I Clear program memory High speed monitor area from other station 0 Ksteps 0 15K step Online change area of multiple blacks 0 K steps Online change area of FB definition ST IT Auto Download all Data from Memory card to Standard ROM Boot fle setting Ta Transfer from Transfer to Memory card RAM v Program memory Program Data name LINE1 LINE2 LINE1 Memory card RAM v Program memory MAINT Sequence LINE2 Memory card RAM v Program memory Device cor Sequence MAINT Memory card RAM _ Program memory 2 3 4 COMM f 5 Parameter 6 Z 8 3 PARA Device initi Lu gt alalalalalafalalalalata 4 Acknowledge XY assignment Multiple CPU setting Default Check End Cancel c Make the High Performance model QCPU hardware setting Set High Performance model QCPU Dip switches to specify a parameter driven drive d Insert a memory card Insert a memory card in a slot if you want to store parameters or programs on the memory card during the boot run e Write parameters and programs using GX Developer Write parameters on the parameter driven drive Write a program to the memory specified at the Boot file tab screen in the PLC Parameter dialog box f Execute a program Reset the High Performan
634. ystem Refresh Manual b The amount of time required for the automatic refresh process will be prolonged only by the following amount of time when requests for refreshing are issued by other MELSECNET H modules at the same time on a multiple CPU system Prolonged time transmitted received word point x N5 X number of other CPUs ps The number of words transmitted received is the total value of the following transferal data e Link refresh data LB LX LY SB LW 16 Data transferred to the memory card s file register AEE ERE SB 16 LB e Transferal between data links tet LW x 2 Refer to the following table for N5 CPU type Systems with only a Systems that include main base unit Q02CPU additional base units QO2HCPU QO6HCPU Q12HCPU Q25HCPU 3 CC Link automatic refresh a The amount of time required for performing the refresh process between High Performance model QCPU and CC Link master local modules Refer to the following manual for details on the automatic refresh time for CC Link e QJ61BT11 CC Link System Master Local Module User s Manual c The amount of time required for the automatic refresh process will be prolonged only by the following amount of time when requests for refreshing are issued by other CC Link modules at the same time ona multiple CPU system Prolonged time transmitted received word point xX N5 X number of other CPUs ps

High Performance Model QCPU(Q Mode)User`s Manual(Function

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