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1. Gleichman Electronics Research Hpeims Jump Start Tutorial Version 2009 29 09 Copyright Notice This document is copyrighted 2009 by Gleichmann Electronics Research Austria GmbH amp Co KG All rights are reserved Gleichmann Electronics Research Austria GmbH amp Co KG reserves the right to make improvements to the products described in this manual at any time without notice No part of this manual may be reproduced copied translated or transmitted in any form or by any means with out the prior written permission of Gleichmann Electronics Research Austria GmbH amp Co KG Infor mation provided in this manual is intended to be accurate and reliable However Gleichmann Elec tronics Research Austria GmbH amp Co KG assumes no responsibility for its use nor for any infringe ments upon the rights of third parties which may result from its use a Gleichmann _ Research Table of Contents 1 Introduction reinen neve Kenner een nern heran A 6 2 Getting started eine ee E A reines 6 3 Automating and Extending Hpe JTAG ou ccccccscccccssececeessececeeseeeceeaeeeceeaeeeceesaeeeeceesaseeeeses 12 x Gleichmann g Table of Figures Figure 1 Click Initialize lt interface gt to establish JTAG communication useesennenneneeenennnnnennennnnn 7 Figure 2 Hpe _JTAG requires BSDL files to establish JTAG CommMuUNICcatiOn cccccccccesteeeeeeeees 7 Figure 3 Hpe JTAG G2. JTAG sampling 200 12Hz Figure 7 Hpe _JTAG sampling frequency 10 a Gleichmann _ Research Controlling IOs using EXTEST Board Connection Test Hpe _JTAG does not require netlists to know about the topology of a board Instead a proprietary format board connection description bcd can be used to tell Hpe JTAG how scan cells are con nected on the board In our example we want to control the four outputs of one of the counters Imagine that they drive LEDs on the board and you want to turn them on or off Execute JTAG Generate and Load bcd from JTAG pin selection to generate a bcd file You can toggle the imaginary LEDs by clicking on the 0 or 1 values in the GUI bcd have a simple syntax that is explained in the comment section of each bcd file After the com ment section the current JTAG pin selection is listed single ended connections for device 0 ACTEL_CNT Cuicoue MCOUNI S We COUNT 3 Outs uiteman COW Nis LE Olona COUNT 2 OUEPUFELCOUN ZELTE COUNT 1 SUEPUSELCOUN AO LE UF COUNT 0 Listing 1 Board Connection Description BCD file bcd files can be generated as follows e Automatically from the current JTAG pin selection e Graphically e With conversion scripts from a netlist e With a text editor For more information on the BCD format please refer to section Board Connection Description of the user manual
3. 0 HyperTreeList 2 KnobCtrl T9 LabelBook 2 MultiDirDialog 27 PeakMeter T9 Piectrl 19 PyCollapsiblePane 6Elclass MyFrame wx Frame T9 PyProgress 70 def init T9 RulerCtrl self parent ID title pos wx DefaultPosition 22 ShapedButton size wx DefaultSize style wx DEFAULT_FRAME STYLE 2 SpeedMeter y 229 SuperToolTip T9 Thumbnailctrl wx Frame init self parent ID title pos size style T9 ToasterBox panel wx Panel self 1 Active Version Original Frames and Dialogs E AUI_DockingWindowMgr button wx Button panel 1003 Close Me E au _MDI kutton SetPosition 15 15 E Dialog self Bind wx EVT_BUTTON self OnCloseMe button E Frame self Bind wx EVT_CLOSE self OnClosellindow E moIwindows E MiniFrame L Wizard OnCloseMe self event 3 Common Dialogs self Close True AboutBox ColourDialog OnCloseWindow self event DirDialog 25 self Destroyt T FileDialog lt FindReplaceDialog FontDialog BA activates Fal A n ctivate False MessageDialog OnappActivate False MultiChoiceDialog OnApp ctivate True PageSetupDialog On ctivate True E PrintDialog Ondctivate False A On pp ctivate False Pi l I ee 5 i w Ondppactivate True i ainoleChnicelialon Ondctivate True Demo Log Messages Filter Demos Q gt Searc Figure 10 GUIs can be quickly build by cutting and pasting from the wxPython demo Implementing low level JTAG accesses With
4. Now work through the rest of the simulator tutorial described in section Simulator Tutorial of the user manual Upon completion you will know all you need to know to interactively debug boards using SAMPLE or EXTEST and even ICs using INTEST 11 kr Gleichmann 3 Automating and Extending Hpe JTAG As mentioned earlier there is always two ways of doing things in Hpe _JTAG either graphically in the GUI or through the python scripting interface If you are new to python a good way of getting started is simply by typing help in the python shell This will point you to Help Python Quick start in the Help menu for a list of recommended reading on this powerful scripting language gt gt gt help Type helpi for interactive help or helpfobject for help about object See menu Help gt Python Quickstart for an introduction about Hpe_desk python scripting Figure 8 Getting started with python The Hpe _JTAG API is well documented under Help Browse Scripting API Documentation A list of JTAG related commands can also be obtained by just typing jtag in the python shell If you want to read the command line help of these commands just type help jtag This will give you a list of JTAG related commands For instance instead of clicking on Initialize lt Interface gt you can use itag initialize and get its command line help by typing help jtag and double clicki
5. the python scripting interface you can declare read from or write to any JTAG register For in stance open the BSDL file of the first device in your JTAG chain and search for IDCODE You will find the section that defines the JTAG instructions for this device which might look like this 14 a Gleichmann _ Research attribute INSTRUCTION_LENGTH of lt device gt entity is 8 attribute INSTRUCTION_OPCODE of lt device gt entity is BES Ss alla EEE IDCODE 00001111 amp EXTEST 00000000 amp SAMPLE 00000001 amp ecer Listing 3 Relevant section in a BSDL file In this example one could read out the device ID see upper right corner after tag initialize by executing jtag declareRegister 0 15 32 util Msg nDevice ID s hex jtag readRegister 0 15 jtag updateGUl Listing 4 Reading out the ID register with low level JTAG commands This example demonstrates a very powerful feature very clearly with Hpe _JTAG you can do any thing that is accessible via JTAG These commands might be very useful if you are implementing your own JTAG controller and JTAG registers or if you have deep knowledge about the Silicon you are try ing to test or debug For instance you could use these commands to read out the configuration regis ter ofthe A D converters of Actel Fusion FPGAs 15
6. vendor For instance lt name gt pin is expected for Altera lt name gt pad file for Lattice and a lt name gt rpt or lt name gt pdc for Actel devices The devices BSDL and pin files that are used by the simulator do not correspond to any real devices or files In the example of the tutorial you will see a window similar to the one below JTAG Pin Selection Select JTAG Pins for device 2 ACTEL_CNT Available Pins Selected Pins Pin Location Signal Name Direction Name Direction CLK INPUT RESET INPUT UPDOWN INPUT Group COUNT O OUTPUT COUNT 1 OUTPUT Ungroup COUNT 2 OUTPUT Default Group Basis T TPUT COUNT 3 OUTPU sin Ooct Opec OHEX Load Signal Names From rpt pde File Load Bsdl Names As Signal Names Filter j j Clear Signal Names Figure 4 Pin selection window By default buses are grouped One can use the Ungroup button to show individual signals of a bus In the context of the simulator you probably do not need all this but imagine that you are trying to debug an FPGA with several hundred user IOs and you are looking for a 64 bit bus that is controlled by an enable signal a clock and a reset All you remember is that you named these signals OE CLK RST and DATA 63 0 in your top level HDL entity but of course you do not remember each and every pin location of these signals Normally it would be a tedious task to locate these signals but with Hpe _JTAG you will complete this task wi
7. U lhice 3ccetvexecdeesssanceescdnibevseask arena ana 8 Figure 4 Pin selection window ccccccccssssessssscecececseseaaeceeceesesaseseeeescesseseaeaeseeeeecesseseaaeseeeeseeseaaeas 9 Figure 5 Using filters to find signals quickly ccccccccssssssseceecessesecnsceeeeecesseseeesaaeeeeeesseeseaaaeeeeeesses 10 Figure 6 Buses can be displayed grouped or ungrouped cccceseesssseceececessesneaecececsseeseesseaeeeesens 10 Figure 7 Hpe _JTAG sampling frequency ccscccccsssceceessececseeecceesaececsesaececsesaesesceesaeeeceesaeeeceesaes 10 Figure 8 Getting started With python u cccccesssccccecsssessseceecesseseaeseeececesseseaeseaeeeeeesseeseeaeeeeeesses 12 Figure 9 There is a command help integrated in the python shell cccccsssceceessesssssseteeeeeeeens 12 Figure 10 GUls can be quickly build by cutting and pasting from the wxPython demo 14 x Gleichmann g 1 Introduction Hpe _JTAG is a boundary scan tool for prototype board setup and debugging It can also be used to automatically test limited lot productions Batch mode is supported Hpe _JTAG is not intended for production testing and has certain restrictions in that context A python scripting interfaces allows extending and automating this tool even integrating customized GUIs Gleichmann Electronics Re search s philosophy is not to hinder the user s creativity so everything you can do via JTAG should be p
8. hapter Scripting of the user manual if you want to get the most out of this powerful feature Many example scripts can be found in your installation directory under scripts JTAG They are explained in section Example Scripts e g section Board Connection Test Script shows how to run a connection test on the board simulated by the Hpe _JTAG simulator The subdirectory scripts JTAG JtagExampleLib contains more complex examples to generate waveforms for flash programming or bus interfaces such as 12C or SPI These application examples are explained under Help Application Notes If boundary scan with Hpe _JTAG is just part of what you are trying to automate you may want to run Hpe _JTAG in batch mode as described in section Batch processing of the user manual 13 Gleichmann Creating your own GUIs selt is easy to create you own GUls using wxPython In the user manual see section Introduction to GUI scripting to get started Then start the wxPython Demo and go to Frames and Dialogs Frame Click on Demo to see what your GUI will be looking like and click on Demo code to see the corre sponding code examples The example from the user manual is more or less just cutting and pasting from the wxpython demo with a few modifications wxPython A Demonstration File Demo Help _ wxPython Demos S Frame Overview 2 Demo Code EX Demo 259 HyperLinkCtrl
9. ng initialize in the list of options PyShell gt gt gt helpiljtag bsdliaddFile bsdlHandledBsdlFileiIntfo bsdlRemoveFile declareRegister getBoardConfiguration getFailedBoardConnectionTests getPassedBoardConnectionTests initBoardConnectionTest initialize Figure 9 There is a command help integrated in the python shell Type jtag initialize to use the default values You will get the same result as you got when clicking the Initialize lt Interface gt button Now cut amp paste jtag initialize to your favourite text editor and save it as test py You can now execute it under Automation Execute Python Script In order to make the effects of any com mand or chain of commands visible in the GUI you need to execute jtag updateGUl Additional output can be displayed in the Info window by using util Msg or util Msglmportant 12 a Gleichmann _ Research You can use jtag initialize to make sure that certain devices are present in the JTAG chain Below is an example on how to perform a simple infrastructure test util Msg nAttempting to initialize JTAG communication jtag initialize DIGILENT_INTERFACE LFEC2_50E_XXF672 util MsgImportant nCompleted JTAG initialization jtag updateGUI Listing 2 Simple infrastructures test The user manual dedicates a whole chapter to the python scripting interface Please refer to c
10. ng as the user has not selected relevant signals which is why the GUI is mainly grey in the beginning E Hpe_desk JTAG TER Eile Settings JTAG Automation Window Help Unload Interface simulated Circuit Help 0 ALTERA_CNT 1 LATTICE_CNT 2 ACTEL_CNT No pins selected for SAMPLE or INTEST Device Information Id Code 0x149510dd Version 0x1 Part No 0x4951 Manufacturer 0x6e Altera Instructions Run SAMPLE Run INTEST Run Board Connection Test Default Group Basis sin Ooct Opec OHEx Log BE PyShell a Hpe_desk JTAG v2 2b 2009 07 27 Python 2 5 4 r254 67916 Dec 23 2008 15 10 54 MSC v 1310 32 bit Intel Opening the pdf document at a given location note please close the document on in32 before when it is already open otherwise jumping to the location does not work SIMULATED_INTERFACE Connected to JTAG chain 0x149510dd 0x11555043 Ox100011c gt Info Details Warnings gt gt gt lig Idle Figure 3 Hpe _JTAG GUI Gleichmann Observing IOs using SAMPLE Click on Edit JTAG pin selection or on Sample to enter the pin selection window Signals can be quickly found by either their pin location or a signal name Signal names can be defined by the user or loaded from the BSDL file or a pin file that has been generated during synthesis Please note that the suffix of the pin file that is expected depends on the FPGA
11. not match your GUI 100 but you will get the idea 2 Getting started You can get started with Hpe _JTAG with just a few mouse clicks and quickly answer questions like e Are certain devices present in the JTAG chain e Are configurations bits of my SRAM FPGA set properly e Are clocks toggling e Are resets active e Are buses stuck to certain values e Are peripherals on my PCB working as expected e g an LED if directly stimulated using bound ary scan You can answer these questions even if your FPGA or any other IEEE1149 1 compliant component cannot be configured properly as long as you are able to establish a JTAG communication with these components In case you are evaluating Hpe _JTAG you can work through this section with just the Hpe _JTAG simulator See section Software installation of the user manual for details on how to install Hpe _JTAG and the appropriate device drivers Connect any supported JTAG cable to the JTAG interface of your tar get board and a USB port of the PC that hosts Hpe _JTAG Than power your board up If necessary select the appropriate JTAG interface under Settings Hpe_desk Options Hardware Settings For Gleichmann more information please refer to section Selecting the hardware interface and Checking the hardware interface functionality ofthe use manual For the purpose of explaining the basic functionality of Hpe _JTAG we will select the Simulated In
12. ossible with this tool Since python is an object oriented scripting language one can build and maintain powerful applications There is an Hpe _JTAG simulator so that users can get acquainted with the tool even without real hardware The simulator is described under section Simulator Tutorial of the user manual There is also a time restricted demo version of the tool Section Restricted Hpe_JTAG demo version of the user manual describes its limitations Whenever the Hpe _JTAG user manual is referenced in this document you can quickly find the appropriate section by copying the section name opening the user manual with Help Open Hpe_desk JTAG documentation and using Ctrl f to locate the section name If you do not mind reading a few pages this Jump Start Tutorial is probably the fastest way to learn about the tools capabilities It is intended to give an overview and guide you through the rest of the documentation Chapter 2 Getting started should enable you to use Hpe _JTAG for interactive PCB debugging Chapter 3 Automating and Extending Hpe JTAG will get you started in writing your own python scripts to automate repetitive tasks or writing your own extensions e g for flash pro gramming or even creating your own GUIs If you prefer a more interactive approach there is also an online tutorial available under Help Open JTAG Tutorial It was created with the Hpe _desk version of the GUI so it might
13. tegrated Circuit Hardware Description Language that describes how JTAG communication can be established with a device For a device to be IEEE1149 1 compliant it has to have a BSDL file In most cases BSDL files can be downloaded from the device vendors webpage This is a one time effort for new devices BSDL file import can be automated using jtag bsdlAddFile file_name For more information please refer to section Downloading BSDL files and BSDL file handling of the user manual Initialize lt Interface gt is establishing a JTAG communication and reads out some general device in formation for each device in the chain which is displayed in the upper right corner of the GUI under Device Information Each device in the chain is represented as a register card with its name and position in the chain being displayed on each tab The lower left section of the GUI is used to display messages The lower right section is a python shell There is always two ways of doing things in Hpe _JTAG either graphically in the GUI or via the python scripting interface In the python shell users can try out commands and than cut amp paste these commands from the shell to a script This is a very powerful feature for sophisticated users and allows them to automate repetitive tasks and extend the functionality of the tool It is our philosophy that only signals relevant to the user should be displayed Hence nothing is dis played as lo
14. terface for now The simulator tutorial is explained under section Simulator Tutorial Simply click on Simulated Circuit Help to open this section The simulator tutorial will walk you through the following topics e Non intrusive signal observation using SAMPLE e Testing connections on your board with EXTEST e Testing ICs using INTEST SAMPLE and EXTEST together with BYPASS are mandatory instructions for all IEEE1149 1 compliant devices INTEST is an optional instruction which is supported by Hpe _JTAG if sup ported by the device For more information please refer to section Running JTAG instructions of the user manual Click on Initialize lt Interface gt to establish JTAG communication Hpe_desk JTAG File Settings JTAG Automation Window Help Initialize SIMULATED_INTERFACE Simulated Circuit Help Figure 1 Click Initialize lt interface gt to establish JTAG communication For all devices that are unknown to Hpe _JTAG Hpe _JTAG will ask you to import the corresponding BSDL file Missing bsd file Found an unknown device in the JTAG chain at position 0 Manufacturer Actel Part No 0011010100111010 Version 0010 IDCODE 00100011010100111010000111001111 Figure 2 Hpe _JTAG requires BSDL files to establish JTAG communication x Gleichmann amp BSDL Boundary Scan Description Language is a subset of VHDL Very High Speed In
15. th a few mouse clicks JTAG Pin Selection Select JTAG Pins for device 2 ACTEL_CNT Available Pins Selected Pins U Pin Location Signal Name Direction Name Direction COUNT 3 OUTPUT COUNT 2 OUTPUT COUNT 1 OUTPUT COUNT O OUTPUT Default Group Basis BIN Ooct Opec OHEX Load Signal Names From rpt pdc File Load Bsdl Names As Signal Names Filter count Clear Signal Names i a Cancel Figure 5 Using filters to find signals quickly Hpe_desk JTAG File Settings JTAG Automation Window Help Initialize SIMULATED_INTERFACE Unload Interface Simulated Circuit Help 0 ALTERA_CNT 1 LATTICE_CNT 2 ACTEL_CNT S Gar Jean u m m Figure 6 Buses can be displayed grouped or ungrouped If you observe signals with frequencies of several hundred MHz using boundary scan it is like taking random screen shots of these signals It is in the nature of boundary scan that it is relatively slow but in most cases you will use it to detect signal activity observe static signals like reset vectors or con figuration bits or test the connectivity of your board At the bottom of the GUI Hpe _JTAG will show the sampling frequency with which signals are updated It depends on many factors like the length of the boundary scan register your JTAG cable and even your PC and its current CPU load In this exam ple the complete boundary scan register is sampled more than 200 times per second
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