RL78/G10 Datasheet
Contents
1. Clock generator Reset generator Main OSC 1 to 20 MHz X1 X2 EXCLK High speed on chip oscillator 1 25 to 20 MHz Selectable power on Low speed on chip reset oscillator 15 kHz Vo Vss PORT 0 8 PO00 to P07 PORT 4 K 2 PA40 P41 PORT 12 K C3 1 P121 P122 P125 PORT 13 P137 C Buzzer clock PCLBUZO output control KD Key return amp KRO to KR5 6 ch Interrupt control INTPO to INTP3 4ch 8 10 bit lt ADD converter 8 ch lt Watchdog timer 4 5 12 bit interval timer ANIO to ANI6 Low speed on chip oscillator R01DS0207EJ0100 Rev 1 00 Apr 15 2013 RENESAS Page 7 of 28 RL78 G10 CHAPTER 1 OUTLINE 1 6 Outline of Functions This outline describes the function at the time when Peripheral I O redirection register PIOR is set to OOH Code flash memory 10 pin 16 pin R5F10Y16ASP R5F10Y14ASP R5F10Y47ASP R5F10Y46ASP R5F10Y44ASP 4KB 2KB 1KB RAM 512B 256 B 128B Main High speed system System clock clock X1 X2 crystal ceramic oscillation external main system clock input EXCLK 1 to 20 MHz Vpb 2 7 to 5 5 V 1 to 5 MHz Voo 2 0 to 5 5 V High speed on chip oscillator clock e 1 25 to 20 MHz Vpb 2 7 to 5 5 V e 1 25 to 5 MHz Voo 2 0 to 5 5 V Low speed on chip oscillator clock 15 kHz TYP General purpose register 8 bit register x 8 Minimum instructi2. Renesas Electronics China Co Ltd 7th Floor Quantum Plaza No 27 ZhiChunLu Haidian District Beijing 100083 P R China Tel 86 10 8235 1155 Fax 86 10 8235 7679 Renesas Electronics Shanghai Co Ltd Unit 204 205 AZIA Center No 1233 Lujiazui Ring Rd Pudong District Shanghai 200120 China Tel 86 21 5877 1818 Fax 86 21 6887 7858 7898 Renesas Electronics Hong Kong Limited Unit 1601 1613 16 F Tower 2 Grand Century Place 193 Prince Edward Road West Mongkok Kowloon Hong Kong el 852 2886 9318 Fax 852 2886 9022 9044 Renesas Electronics Taiwan Co Ltd 13F No 363 Fu Shing North Road Taipei Taiwan Tel 886 2 8175 9600 Fax 886 2 8175 9670 Renesas Electronics Singapore Pte Ltd 80 Bendemeer Road Unit 06 02 Hyflux Innovation Centre Singapore 339949 Tel 65 6213 0200 Fax 65 6213 0300 Renesas Electronics Malaysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 Jin Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 2013 Renesas Electronics Corporation All rights reserved Colophon 2 2
3. from SCKpf when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 4 C is the load capacitance of the SCKp and SOp output lines Remarks 1 p CSI number p 00 m Unit number m 0 n Channel number n 0 2 fwck Serial array unit operation clock frequency Operation clock to be set by the CKSmn bit of serial mode register mn SMRmn m Unit number n Channel number mn 00 R01DS0207EJ0100 Rev 1 00 Page 18 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 3 CSI mode slave mode SCKp external clock input Ta 40 to 85 C 2 0 V lt Voo 5 5 V Vss 0 V Parameter Conditions SCKp cycle time 2 7 V lt Voo lt 5 5 V fuck 20 MHz 8 fuck fuck 10 MHz 6 fuck 2 0V lt Vp0 lt 2 7V 6 fuck SCKp high low level width 2 0V lt Vo0 lt 5 5V tkcy2 2 Slp setup time to SCKpT 2 7 V lt Voo lt 5 5 V 1 ivick 20 2 0 V lt Voo lt 2 7 V 1 fmck 30 Slp hold time from SCKpT 2 0 V lt Voo lt 5 5 V 1 fmck 31 Delay time from SCKpl to SOp C 30 pF 2 7 V Vio 5 5 2 fmck 50 output V 2 0 V lt Voo lt 2 7 2 fvwck 110 V Notes 1 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The Slp setup time becomes to SCKpl when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 2 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The Slp hold time becomes from SCKpl
4. 1 16 O P07 SDAAO TOO3 ANI6 SCKO1 P40 KRO TOOLO PCLBUZO0 T101 TO01 O 2 O 15 O P06 SCLAO INTP3 ANI5 S101 P125 KR1 RESET O 3 14 k O POS5 ANI4 TI02 TO02 SO01 P137 TIOO INTPO O 4 13 K O PO4 ANI3 TI01 TO01 KR5 IVREFO P122 X2 EXCLK INTP2 O 5 12 O P03 ANI2 TO00 KR4 INTP1 IVCMPO P121 X1 INTP3 O 34 6 11 4 O P02 ANI1 SCK00 SCL00 PCLBUZ0 KR3 VCOUTO Vss O 7 10 O P01 ANIO S100 RXD0 SDA00 KR2 Vov O 8 9 O P00 SO00 TXDO INTP1 Remarks 1 For pin identification see 1 4 Pin Identification 2 Functions in parentheses in the above figure can be assigned via settings in the peripheral I O redirection register PIOR R01DS0207EJ0100 Rev 1 00 Page 4 of 28 Apr 15 2013 RENESAS E RL78 G10 CHAPTER 1 OUTLINE 1 4 Pin Identification ANIO to ANI6 INTPO to INTP3 KRO to KR5 P00 to P07 P40 P41 P121 P122 P125 P137 PCLBUZO EXCLK X1 X2 IVCMPO VCOUTO IVREFO RESET RxDO SCKOO SCKO1 SCLOO SCLAO SDAO00 SDAAO S100 SIO1 SO00 SO01 TIOO to TIOS TOO0 to TOO3 TOOLO TxDO VDD Vss Analog Input External Interrupt Input Key Return Port 0 Port 4 Port 12 Port 13 Programmable Clock Output Buzzer Output External Clock Input Crystal Oscillator Comparator Input Comparator Output Comparator Reference Input Reset Receive Data Serial Clock Input Output Serial Clock Output Serial Data
5. E 4 40 0 20 HE 6 40 0 20 A 1 725 MAX A1 0 125 0 05 A2 1 50 A3 0 25 e 0 65 0 08 bp 0 227 0 07 0 03 n 0 157 0 04 L 0 50 Lp 0 60 0 10 L1 1 00 0 20 x 013 Y 0 10 Boo 3 ZD 0 325 2012 Renesas Electronics Corporation All rights reserved R01DS0207EJ0100 Rev 1 00 Page 28 of 28 Apr 15 2013 d RENESAS Revision History RL78 G10 Data Sheet Description Rev Date Page Summary 1 00 Apr 15 2013 First Edition issued All trademarks and registered trademarks are the property of their respective owners SuperFlash is a registered trademark of Silicon Storage Technology Inc in several countries including the United States and Japan Caution This product uses SuperFlash technology licensed from Silicon Storage Technology Inc C 1 NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between VIL MAX and VIH MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between VIL MAX and VIH MIN 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal inp
6. RL78 User s device microcontroller UART mode bit width reference 1 transfer rate High low bit width Baud rate error tolerance TxDO RxDO Remark fmck Serial array unit operation clock frequency Operation clock to be set by the CKSmn bit of serial mode register mn SMRmn m Unit number n Channel number mn 00 R01DS0207EJ0100 Rev 1 00 Page 17 of 28 Apr 15 2013 RENESAS D RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 CSI mode master mode SCKp internal clock output Ta 40 to 85 C 2 0 V x Voo 5 5 V Vss 0 V Parameter Conditions SCKp cycle time tkcvi gt A feik 2 7V lt Vo0 lt 5 5V 200 2 0 V lt Voo lt 5 5 V 800 SCKp high low level width tkH1 tkL1 2 7V lt Vo0 lt s5 5V tkcy1 2 18 2 0 V lt Voo lt 5 5 V tkcy1 2 50 Slp setup time to SCKpT 2 7 V lt Voo lt 5 5 V 47 2 0 V lt Voo lt 5 5 V Slp hold time from SCKpT Delay time from SCKpl to SOp C 30 pF Note 3 output Notes 1 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The Slp setup time becomes to SCKpl when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 2 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The Sip hold time becomes from SCKpl when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 3 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The delay time to SOp output becomes
7. e Interval timer 12 bit 1 channel only for 16 pin product e 15 kHz watchdog timer 1 channel Rich Analog e ADC Up to 8 channels 10 bit resolution 3 4 us conversion time e Supports 2 4 V e 1 x comparator only for 16 pin product Safety Features e Detects execution of illegal instruction e Detects watchdog timer program loop General Purpose I O e High current up to 20 mA per pin e Open drain internal pull up support External Interrupt e External interrupt input 4 e Key interrupt input 6 Operating Ambient Temperature e Standard 40 to 85 C Package Type and Pin Count e SSOP 10 and 16 pin There is difference in specifications between every product Please refer to specification for details Page 1 of 28 2tENESAS RL78 G10 CHAPTER 1 OUTLINE O ROM RAM capacities Flash ROM R5F10Y47ASP R5F10Y16ASP R5F10Y46ASP R5F10Y14ASP R5F10Y44ASP Notes 1 16 pin products only 2 Under development Remark The functions mounted depend on the product See 1 6 Outline of Functions R01DS0207EJ0100 Rev 1 00 Page 2 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 1 OUTLINE 1 2 List of Part Number Figure 1 1 Classification of Part Number PartNo R5F10Y17AxxxS P ZVO JE Packaging style V0 Tray X0 Embossed Tape Package type SP SSOP 0 65 mm pitch ROM number Omitted with blank products Classification A Consumer applications
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9. for each device and according to related specifications governing the device Notice 1 Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information 2 Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein 3 Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others 4 You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes
10. from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics 6 You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges 7 Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by you 8
11. operating ambient temperature 40 C to 85 C ROM capacity 4 1KB 6 2KB 7 4KB Pin count 1 10 pin 4 16 pin RL78 G10 group 10Y Memory type F Flash memory Renesas MCU Renesas semiconductor product Pin count Package Part Number 10 pin plastic LSSOP R5F10Y16ASP4VO R5F10Y16ASP X0 4 4 x 3 6 mm 0 65mmpitch R5F10Y14ASP4VO R5F10Y14ASP X0 16 pin plastic SSOP R5F10Y47ASP 4 4 x 5 0 mm 0 65mmpitch R5F10Y4GASP R5F10Y44ASP Note Under development Caution The part number represents the number at the time of publication Be sure to review the latest part number through the target product page in the Renesas Electronics Corp website R01DS0207EJ0100 Rev 1 00 Page 3 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 1 OUTLINE 1 3 Pin Configuration Top View 1 3 1 10 pin products e 10 pin plastic LSSOP 4 4 x 3 6 P40 KRO TOOLO PCLBUZO TIO1 TOO1 O P125 KR1 RESET O P137 TIOO INTPO O Vss O Vpop O O PO4 ANIS TIO1 TOO1 KR5 O P03 ANI2 TO00 KR4 INTP1 O PO2 ANI SCKOO SCLOO PCLBUZO KR3 O PO1 ANIO SIOO RXDO SDAOO KR2 O P00 SO00 TXDO INTP1 Remarks 1 For pin identification see 1 4 Pin Identification 2 Functions in parentheses in the above figure can be assigned via settings in the peripheral I O redirection register PIOR 1 3 2 16 pin products e 16 pin plastic SSOP 4 4 x 5 0 P41 TIO3 INTP2 O
12. 4341 NESAS Datasheet RL78 G10 RENESAS MCU R01DS0207EJ0100 Rev 1 00 Apr 15 2013 True Low Power Platform as low as 46 uA MHZz 2 0 to 5 5V Operation 1 to 4 Kbyte Flash for General Purpose Applications 1 OUTLINE 1 1 Features Ultra Low Power Technology e 2 0 to 5 5 V operation from a single supply e Stop RAM retained 0 56 pA e Operating 46 uA MHz RL78 S1 Core e Instruction execution 78 of instructions can be executed in 1 to 2 clock cycles e CISC architecture Harvard with 3 stage pipeline e Multiply 8 x 8 to 16 bit result in 2 clock cycles e 16 bit barrel shifter for shift amp rotate in 2 clock cycle e 1 wire on chip debug function Main Flash Memory e Density 1 to 4 Kbyte e Flash memory rewritable voltage 4 5 to 5 5 V RAM e 128 to 512 Byte size options e Supports operands or instructions e Back up retention in all modes High speed On chip Oscillator e 20 MHz with 2 accuracy over voltage 2 0 to 5 5 V and temperature 20 to 85 C e Pre configured settings 20 MHz 10 MHz 5 MHz 2 5 MHz and 1 25 MHz Reset and Supply Management e Selectable power on reset SPOR generator with 4 setting options Multiple Communication Interfaces e 1 x l C master e 1x C multi master only for 16 pin product e 1x UART 7 8 bit e Up to 2 x CSI SPI 7 8 bit R01DS0207EJ0100 Rev 1 00 Apr 15 2013 Extended Function Timers e Multi function 16 bit timers Up to 4 channels
13. 85 C 2 0 V lt Voo lt 5 5 V Vss 0 V Conditions Instruction cycle minimum Main system clock 2 7 V lt Voo lt 5 5 V 0 05 instruction execution time fuain operation 2 0V lt Vo lt 5 5V 0 2 TIOO TIO1 input high level Noise filter is not used 1 fuck width low level width 10 TOOO TOO1 output frequency 4 0 V lt Voo lt 5 5 V 2 7 V lt Voo lt 4 0 V 2 0 V lt Voo 2 7 V PCLBUZO output frequency 4 0 V lt Voo lt 5 5 V 2 7 V lt Voo lt 4 0 V 2 0 V lt Voo 2 7 V RESET low level width Remark fmck Timer array unit operation clock frequency AC Timing Test Points Vih VoH Vih VoH Test points Vi VoL ps E E ViuUNoL TI TO Timing tri gt lt trin TIOO TIO1 1 fto TOOO TOO1 R01DS0207EJ0100 Rev 1 00 Page 15 of 28 Apr 15 2013 ztENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS Interrupt Request Input Timing Le tiv tint INTPO INTP1 Key Interrupt Input Timing tke KRO to KR5 RESET Input Timing inst RESET RO1DSO207EJ0100 Rev1 00 a Page 16 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 5 Serial Communication Characteristics 2 5 1 Serial array unit 1 UART mode Ta 40 to 85 C 2 0 V lt Voo lt 5 5 V Vss 0 V Transfer rate Theoretical value of the maximum transfer rate fcLk fuck 20 MHz UART mode connection diagram
14. CIFICATIONS 2 6 4 Data retention power supply voltage characteristics Ta 40 to 85 C Vss 0 V Data retention power supply voltage Voppr 5 5 range Caution Data is retained until the power supply voltage becomes under the minimum value of the data retention power supply voltage range Note that data in the RAM and RESF registers might not be cleared even if the power supply voltage becomes under the minimum value of the data retention power supply voltage range R01DS0207EJ0100 Rev 1 00 Page 24 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 7 Flash Memory Programming Characteristics Ta 0 to 40 C 4 5 V lt Voo lt 5 5 V Vss 0 V fl ry Cerwr Retained for 20 years T 7 re writable times Notes 1 2 3 Notes 1 1 erase 1 write after the erase is regarded as 1 rewrite The retaining years are until next rewrite after the rewrite 2 When using flash memory programmer 3 These are the characteristics of the flash memory and the results obtained from reliability testing by Renesas Electronics Corporation 2 8 Dedicated Flash Memory Programmer Communication UART Ta 0 to 40 C 4 5 V lt Von lt 5 5V Vss 0 V Tansee TP o do jes Remark The transfer rate during flash memory programming is fixed to 115 200 bps R01DS0207EJ0100 Rev 1 00 Page 25 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 9 Tim
15. Conditions Resolution 10 Overall error 10 bit resolution Vpp2 5 V 43 1 Voo 3V 45 Note Conversion time 10 bit resolution 2 7 V lt Vo0 lt s5 5V i 18 4 2 4VxVop lt 5 5V i 18 4 Zero scale error 10 bit resolution Vpp 5V 10 19 Vop 3V 0 39 Full scale error 10 bit resolution Vpp 5V 0 29 Vpp 3V 0 42 Integral linearity error 10 bit resolution Voo 5V 41 8 Vpp 3V 1 7 Differential linearity error 10 bit resolution Vpp 5V d1 4 0 Voo 3V 15 Analog input voltage Notes 1 Excludes quantization error 1 2 LSB 2 This is the characteristic evaluation value plus or minus 3 These values are not used in the shipping inspection 2 6 2 SPOR circuit characteristics Ta 40 to 85 C Vss 0 V Parameter Conditions Detection supply voltage Power supply rise time Power supply fall time Power supply rise time Power supply fall time Power supply rise time Power supply fall time Vspors Power supply rise time Power supply fall time Note Minimum pulse width Note Time required for the reset operation by the SPOR when Vop becomes under Vspopr 2 6 3 Power supply voltage rising slope characteristics 40 to 85 C Vss 0 V R01DS0207EJ0100 Rev 1 00 Page 23 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPE
16. Input Output Serial Data Input Serial Data Output Timer Input Timer Output Data Input Output for Tool Transmit Data Power Supply Ground R01DS0207EJ0100 Rev 1 00 Apr 15 2013 RENESAS Page 5 of 28 RL78 G10 CHAPTER 1 OUTLINE 1 5 Block Diagram 1 5 1 10 pin products TIOO TOOO choo TIO1 TOO1 ch01 BCD adjustment On chip Ton ce gt Code flash 2 KB Interrupt control Clock generator RESET Reset generator High speed on chip oscillator 1 25 to 20 MHz Low speed on chip oscillator 15 kHz Selectable power on reset Voo Vss PORT 0 PORT 4 PORT 12 PORT 13 Buzzer clock output control sic Key return 6 ch Interrupt control 2ch 8 10 bit A D converter 4 ch K 5 gt PO00 to P04 P40 P125 P137 PCLBUZO 6 KRO to KR5 INTPO INTP1 ANIO to ANI3 Low speed Watchdog timer on chip oscillator R01DS0207EJ0100 Rev 1 00 Apr 15 2013 ztENESAS Page 6 of 28 RL78 G10 CHAPTER 1 OUTLINE 1 5 2 16 pin products TIOO TOOO TIO1 TOO1 TIO2 TO02 TIO3 TOO3 RxDO TxDO SCKOO S100 S000 SCK01 S101 S001 SCLOO SDAOO TOOLO On chip debugger Kk gt BCD adjustment dup SCLAO SDAAO ICAO CS IVREFO COUP IVCMPO E VCOUTO Code flash 4 KB Interrupt control RAM 512B On chip
17. NGS 3 1 10 pin products R5F10Y16ASP R5F10Y14ASP JEITA Package Code RENESAS Code Previous Code MASS TYP g P LSSOP10 4 4x3 6 0 65 PLSP0010JA A P10MA 65 CAC 2 0 05 detail of lead end UNIT mm ITEM DIMENSIONS 3 6050 10 0 50 0 65 T P 0 24 0 08 0 10 0 05 1 45 MAX 1 20 0 10 6 40 0 20 4 40 0 10 1 004 0 20 0 08 0 17_ 0 07 NOTE Each lead centerline is located within 0 13 mm of its true position T P at maximum material condition 0 50 0 13 0 10 o 3 0 25 T P 0 60 0 15 0 25 MAX 0 15 MAX z cilMv z zir x c irommioou rv 2012 Renesas Electronics Corporation All rights reserved R01DS0207EJ0100 Rev 1 00 Page 27 of 28 Apr 15 2013 d RENESAS RL78 G10 CHAPTER 3 PACKAGE DRAWINGS 3 2 16 pin products R5F10Y47ASP R5F10Y46ASP R5F10Y44ASP JEITA Package Code RENESAS Code Previous Code MASS TYP g P SSOP16 4 4x5 0 65 PRSP0016JC A P16MA 65 FAA 2 0 08 detail of lead end L Lp HE m L1 S UNIT mm ITEM DIMENSIONS D 5 00 0 15 D1 5 20 0 15
18. Voo 3 0 V 5 0 V Ibos STOP mode Voo 3 0 V WDT supply current lwor fi 15 kHz Note 4 ADC supply current lanc During conversion at the Voo 5 0 V meee highest speed Voo 3 0 V Notes 1 Total current flowing into Voo including the input leakage current flowing when the level of the input pin is fixed to Vop or Vss The values below the MAX column include the peripheral operation current However not including the current flowing into the watchdog timer A D converter I O port and on chip pull up pull down resistors 2 During HALT instruction execution by flash memory 3 When the high speed on chip oscillator is stopped 4 Current flowing only to the watchdog timer including the operating current of the low speed on chip oscillator The current value of the RL78 microcontrollers is the sum of Ipp Ipp2 or Ipps and Iwot when the watchdog timer operates 5 Current flowing only to the A D converter The current value of the RL78 microcontrollers is the sum of Ipp or Ipp2 and lanc when the A D converter operates in an operation mode or the HALT mode Remarks 1 fi Low speed on chip oscillator clock frequency 2 fi High speed on chip oscillator clock frequency 3 Temperature condition of the TYP value is Ta 25 C R01DS0207EJ0100 Rev 1 00 Page 14 of 28 Apr 15 2013 RENESAS z RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 4 AC Characteristics Ta 40 to
19. ectronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products 11 This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics 12 Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics RENESAS SALES OFFICES Renesas Electronics Corporation http www renesas com Refer to http www renesas com for the latest and detailed information Renesas Electronics America Inc 2880 Scott Boulevard Santa Clara CA 95050 2554 U S A Tel 1 408 588 6000 Fax 1 408 588 6130 Renesas Electronics Canada Limited 1101 Nicholson Road Newmarket Ontario L3Y 9C3 Canada Tel 1 905 898 5441 Fax 1 905 898 3220 Renesas Electronics Europe Limited Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Tel 44 1628 651 700 Fax 44 1628 651 804 Renesas Electronics Europe GmbH Arcadiastrasse 10 40472 Dusseldorf Germany Tel 49 211 65030 Fax 49 211 6503 1327
20. ent of pins 10 0 x 0 7 80 x 0 01 8 7 mA e Total output current of pins lot x 0 7 n x 0 01 Example Where n 80 and lo 10 0 mA Total output current of pins 10 0 x 0 7 80 x 0 01 8 7 mA However the current that is allowed to flow into one pin does not vary depending on the duty factor A current higher than the absolute maximum rating must not flow into one pin 4 Value of current at which the device operation is guaranteed even if the current flows from an output pin to the Vss pin 5 The value under the condition which satisfies the high level output current loH1 6 The value under the condition which satisfies the low level output current loL1 Cautions 1 P00 and P01 do not output high level in N ch open drain mode 2 The maximum value of Vin of POO and P01 is Voo even in N ch open drain mode Remark Unless specified otherwise the characteristics of alternate function pins are the same as those of the port R01DS0207EJ0100 Rev 1 00 Page 13 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 3 2 Supply current characteristics Ta 40 to 85 C 2 0 V lt Von lt 5 5 V Vss 0 V Parameter Conditions Supply current Operating Basic fia 20 MHz Von 3 0 V 5 0 V mode operation Normal fia 20 MHz Voo 3 0 V 5 0 V operation fm 5 MHz Voo 3 0 V 5 0 V Ipp2 HALT mode fin 20 MHz Voo 3 0 V 5 0 V fin 5 MHz
21. function Provided Power supply voltage Vpb 2 0 to 5 5 V Operating ambient temperature R01DS0207EJ0100 Rev 1 00 Apr 15 2013 TA 40 to 85 C Page 8 of 28 ztENESAS RL78 G10 CHAPTER 1 OUTLINE Notes 1 The number of outputs varies depending on the setting of channels in use and the number of the master see 6 8 3 Operation as multiple PWM output function in the RL78 G10 User s Manual 2 The illegal instruction is generated when instruction code FFH is executed Reset by the illegal instruction execution not issued by emulation with the on chip debug emulator R01DS0207EJ0100 Rev 1 00 Page 9 of 28 Apr 15 2013 RENESAS E RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 ELECTRICAL SPECIFICATIONS Cautions 1 This chapter explains the electrical specifications of two products the R5F10Y16ASP and the R5F10Y14ASP 2 Electrical specifications for the 16 pin products are T B D because these products are under development 3 The RL78 G10 has an on chip debug function which is provided for development and evaluation Do not use the on chip debug function in products designated for mass production because the guaranteed number of rewritable times of the flash memory may be exceeded when this function is used and product reliability therefore cannot be guaranteed Renesas Electronics is not liable for problems occurring when the on chip debug function is used 4 The pins mounted depend on the pr
22. ing of Entry to Flash Memory Programming Modes Parameter Conditions How long from when an external tsuinit SPOR reset must end before the external reset ends until the initial reset ends communication settings are specified How long from when the TOOLO SPOR reset must end before the external pin is placed at the low level until reset ends an external reset ends How long the TOOLO pin must be SPOR reset must end before the external kept at the low level after an reset ends external reset ends lt i gt lt V RESET M eX AS V ee een PE Ls V Mode setting one byte data TOOLO WEM NT o tsu tsuINIT i an Eh 1 The low level is input to the TOOLO pin 2 The external reset ends SPOR reset must end before the external reset ends 3 The TOOLO pin is set to the high level 4 Setting of entry to the flash memory programming mode by UART reception Remark tsuinit The segment shows that it is necessary to finish specifying the initial communication settings within 100 ms from when the resets end tsu How long from when the TOOLO pin is placed at the low level until an external reset ends MIN 10 4s tHo How long to keep the TOOLO pin at the low level from when the external reset ends R01DS0207EJ0100 Rev 1 00 Page 26 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 3 PACKAGE DRAWINGS 3 PACKAGE DRAWI
23. lt Voio lt 5 5 V 3 gt 2 7 V lt Voo lt 4 0 V 3 gt 2 0 V lt Voo lt 2 7 V 3 gt Note 3 Total of all pins 3 gt Input voltage high Input voltage low Output voltage high Note 5 4 0V lt Vp0 lt s5 5V lou 2 10 mA lou 3 0 mA 2 7 V lt Voo lt 5 5 V lou 2 0 mA 2 0 V lt Voo lt 5 5 V lou 1 5 mA Output voltage low Note 6 4 0 V lt Voo lt 5 5 V lo 20 mA lo 2 8 5 mA 2 7 V lt Voo lt 5 5 V lo 3 0 mA lo 2 1 5 mA 2 0 V lt Voo lt 5 5 V lo 0 6 mA L lt J LIJIISI SISIKII SISS lt Input leakage current high Vi VoD E gt Input leakage current low Vi Vss t gt On chip pull up resistance Vi Vss Notes 1 Value of current at which the device operation is guaranteed even if the current flows from the Voo pin to an output pin 2 Do not exceed the total current value 3 This is the output current value under conditions where the duty factor x 70 The output current value when the duty factor gt 70 can be calculated with the following expression when changing the duty factor to n R01DS0207EJ0100 Rev 1 00 Apr 15 2013 ztENESAS Page 12 of 28 RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS e Total output current of pins lou x 0 7 n x 0 01 Example Where n 80 and loH 10 0 mA Total output curr
24. no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product 5 Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems and safety equipment etc Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury artificial life support devices or systems surgical implantations etc or may cause serious property damages nuclear reactor control systems military equipment etc You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application for which it is not intended Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising
25. oduct Refer to 2 1 Port Functions and 2 2 1 Functions for each product in the RL78 G10 User s Manual R01DS0207EJ0100 Rev 1 00 Page 10 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 1 Absolute Maximum Ratings Ta 25 C Parameter Symbols Conditions Ratings Supply Voltage 0 5 to 6 5 Input Voltage 0 3 to Voo 0 3 Output Voltage 0 3 to Von 0 3 Output current high Per pin Total of all pins P40 140 mA POO to P04 Output current low Per pin Total of all pins P40 140 mA POO to P04 100 Operating ambient 40 to 85 temperature Storage temperature 65 to 150 Note Must be 6 5 V or lower Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter That is the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded Remarks 1 Unless specified otherwise the characteristics of alternate function pins are the same as those of the port pins 2 The reference voltage is Vss 2 2 Oscillator Characteristics 2 2 1 On chip oscillator characteristics Ta 40 to 85 C 2 0 V lt Voo lt 5 5 V Vss 0 V Oscillators Parameters Conditions High speed on chip oscillator oscillation clock fre
26. on execution time 0 05 us 20 MHz operation Instruction set Data transfer 8 bits Adder and subtractor logical operation 8 bits Multiplication 8 bits x 8 bits Rotate barrel shift and bit manipulation set reset test and Boolean operation etc Total 8 14 CMOS I O 6 N ch open drain output Vpp tolerance 2 10 N ch open drain output Vpp tolerance 4 CMOS input 2 4 16 bit timer 2 channels 4 channels Watchdog timer 1 channel 12 bit interval timer 1 channel Timer output 2 channels PWM output 1 4 channels PWM outputs 3 Clock output buzzer output 1 2 44 kHz to 10 MHz Peripheral hardware clock fmain 20 MHz operation Comparator 1 8 10 bit resolution A D converter 4 channels 8 channels Serial interface 10 pin products CSI 1 channel simplified C 1 channel UART 1 channel 16 pin products CSI 2 channels simplified lC 1 channel UART 1 channel IC bus zm 1 channel Vectored Internal 8 14 interrupt Sources External 3 5 Key interrupt 6 Reset e Reset by RESET pin e Internal reset by watchdog timer e Internal reset by selectable power on reset e Internal reset by illegal instruction execution e Internal reset by data retention lower limit voltage Note 2 Selectable power on reset circuit Detection voltage 2 0 V 2 4 V 2 7 V 4 0 V On chip debug
27. quency High speed on chip oscillator oscillation TA 20 to 85 C clock frequency accuracy Ta 40 to 20 C Low speed on chip oscillator oscillation clock frequency Low speed on chip oscillator oscillation clock frequency accuracy Notes 1 High speed on chip oscillator frequency is selected by bits O to 2 of option byte 000C2H 2 This only indicates the oscillator characteristics Refer to AC Characteristics for instruction execution time 3 This only indicates the oscillator characteristics R01DS0207EJ0100 Rev 1 00 Page 11 of 28 Apr 15 2013 RENESAS RL78 G10 2 3 DC Characteristics 2 3 1 Pin characteristics Ta 40 to 85 C 2 0 V x Von lt 5 5 V Vss 0 V Parameter Output current high Conditions POO P01 PO2 to P04 P40 Per pin CHAPTER 2 ELECTRICAL SPECIFICATIONS 1 0 gh P40 Total 4 0 V lt Voio lt 5 5 V 10 0 2 7 V lt Voo lt 4 0 V 2 0 2 0 V lt Voo lt 2 7 V 1 5 POO P01 P02 to P04 Total 4 0 V lt Voio lt 5 5 V 50 0 2 7 V lt Voo lt 4 0 V 10 0 2 0 V lt Voo lt 2 7 V 7 5 Note 3 Total of all pins 60 0 Output current low POO to P04 P40 Per pin 20 one a P40 Total 4 0 V lt Voio lt 5 5 V 20 0 2 7 V lt Voo lt 4 0 V 2 0 V lt Voo lt 2 7 V 3 0 3 gt POO to P04 Total 4 0 V
28. time reception tsu DAT 2 0 V lt Voo lt 5 5 V 1 MCK C 100 pF Re 3 kQ 145 Data hold time transmission tHD DAT 2 0 V lt Voo amp 5 5 V 0 Co 100 pF Rb 3 KQ Notes 1 The value must also be equal to or less than fwck 4 2 Set the fuck value to keep the hold time of SCLr L and SCLr H Caution Select the N ch open drain output Vpp tolerance mode for the SDAr pin by using the port output mode register 0 POMO Remarks 1 Rb Q Communication line SDAr pull up resistance Ce F Communication line SCLr SDAr load capacitance 2 r IIC number r 00 3 fuck Serial array unit operation clock frequency Operation clock to be set by the CKSmn bit of serial mode register mn SMRmn m Unit number n Channel number mn 00 R01DS0207EJ0100 Rev 1 00 Page 21 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS Simplified C mode connection diagram Voo Hb SDAO0 SDA SCLOO RL78 microcontroller User s device SCL Simplified C mode serial transfer timing 1 fsc tLow tHIGH SCLOO SDA00 tup DAT tsu DAT R01DS0207EJ0100 Rev 1 00 Page 22 of 28 Apr 15 2013 ztENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 2 6 Analog Characteristics 2 6 1 A D converter characteristics Target ANI pin ANIO to ANIS Ta 40 to 85 C 2 4 V lt Voo lt 5 5 V Vss 0 V Parameter
29. ut level may be generated due to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin All handling related to unused pins must be judged separately for each device and according to related specifications governing the device 3 PRECAUTION AGAINST ESD A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices 4 STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediatel
30. when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 3 When DAPmn 0 and CKPmn 0 or DAPmn 1 and CKPmn 1 The delay time to SOp output becomes from SCKpf when DAPmn 0 and CKPmn 1 or DAPmn 1 and CKPmn 0 4 C is the load capacitance of the SOp output lines Remarks 1 p CSI number p 00 m Unit number m 0 n Channel number n 0 2 fwck Serial array unit operation clock frequency Operation clock to be set by the CKSmn bit of serial mode register mn SMRmn m Unit number n Channel number mn 00 R01DS0207EJ0100 Rev 1 00 Page 19 of 28 Apr 15 2013 RENESAS RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS CSI mode connection diagram SCKOO SCK RL78 S100 SO Users device microcontroller SO00 SI CSI mode serial transfer timing When DAPOO 0 and CKPOO 0 or DAPOO 1 and CKPOO 1 tkcy1 2 tk 1 2 tkH1 2 SCKOO tsik1 2 tksi1 2 al S100 tkso1 2 ge 000 Output data R01DS0207EJ0100 Rev 1 00 Page 20 of 28 Apr 15 2013 RENESAS E RL78 G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS 4 Simplified LC mode Ta 40 to 85 C 2 0 V lt Voo 5 5 V Vss 0 V Parameter Conditions SCLr clock frequency 2 0 V lt Voo 5 5 V Cb 100 pF Ro 3 KQ Hold time when SCLr L 2 0 V lt Voo 5 5 V Cb 100 pF Ro 3 KQ Hold time when SCLr H 2 0 V lt Voo lt 5 5 V Cb 100 pF Ro 3 KQ Data setup
31. y after the power source is turned ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the reset signal is received A reset operation must be executed immediately after power on for devices with reset functions POWER ON OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface as a rule switch on the external power supply after switching on the internal power supply When switching the power supply off as a rule switch off the external power supply and then the internal power supply Use of the reverse power on off sequences may result in the application of an overvoltage to the internal elements of the device causing malfunction and degradation of internal elements due to the passage of an abnormal current The correct power on off sequence must be judged separately for each device and according to related specifications governing the device INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that results from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately
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