COM-842E
Contents
1. CPU Socket 95 00 87 00 4 00 4 00 125 00 7 un DU C i 0 TH Unit mm 00 8L Introduction HEKK This page is intentionally left blank Chapter 2 prere Installation Installation 2 1 What is COM Express With more and more demands on small and embedded industrial boards a multi functioned COM Computer on Module is the great one of the solutions COM Express boa2. CPU Socket D110 wmm DA cuo men C4 8110 4 B1 o MIO man A1 m m Installation 2 4 COM Express AB Connector B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 GND GBEO ACT LPC FRAME LPC ADO LPC AD1 LPC AD2 LPC AD3 LPC DRQOH LPC_DRQ1 EPC CEK GND PWRBTN SMB_CK SMB_DAT SMB ALERTH N C N C SUS STATH N C N C GND N C N C PWR OK N C N
3. BIOS 3 2 8 APM Configuration BIOS SETUP UTILITY Power Management APM Enabled Power Management APM This category allows you to select the type or degree of power saving and is directly related to the following modes 1 HDD Power Down 2 Doze Mode 3 Suspend Mode Video Power Down Mode This option defines the level of power saving mode requires in to power down the video display As a default the video powers down both in suspend mode and standby mode The Choice Enabled Disabled Hard Disk Power Down Mode Power Down Hard Disk in Suspend or Standby Mode The Choice Enabled Disabled 31 BIOS Suspend Time Out Go into Suspend in the specified time The Choice Enabled Disabled Keyboard amp PS 2 Mouse Monitor KBC ports 60 64 Power Button Mode Pressing the power button for more than 4 seconds forces the system to enter the Soft Off state when the system has hang The Choice Delay 4 Sec On Off Advanced Resume Event Controls Resume On Ring An input signal on the serial Ring Indicator RI line in other words an incoming call on the modem awakens the system from a soft off state The Choice Enabled Disabled Resume On PME An input signal from a PME on the PCI card awakens the system from a soft off state The Choice Enabled Disabled Resume On RTC Alarm When Enabled you can set the date and time at which the RTC real time clock alarm awakens the system from Suspe
4. 47 BIOS 3 7 Exit Options Save Changes and Exit BIOS SETUP UTILITY save Changes and Exit save configuration changes and exit setup mA Cancel Pressing lt Enter gt on this item asks for confirmation Save configuration changes and exit setup Pressing lt OK gt stores the selection made in the menus in CMOS a special section of memory that stays on after you turn your system off The next time you boot your computer the BIOS configures your system according to the Setup selections stored in CMOS After saving the values the system is restarted again 48 BIOS Discard Changes and Exit BIOS SETUP UTILITY Discard Changes and Exit Discard changes and exit setup mi Cancel Exit system setup without saving any changes lt ESC gt key can be used for this operation 49 BIOS Discard Changes BIOS SETUP UTILITY Discard Changes Discard Changes Cancel Discards changes done so far to any of the setup questions lt F7 gt can be used for this operation 50 BIOS Load Optimal Defaults BIOS SETUP UTILITY Load Optimal Defaults Load Optimal Defaults Cancel When you press lt Enter gt on this item you get a confirmation dialog box with a message Load Optimal Defaults OK Cancel Pressing OK loads the BIOS Optimal Default values for all the setup questions lt F9 gt key can be used for this operation 51 BIOS Load Failsaf
5. LVDS BO LVDS B0 LVDS B1 LVDS B1 LVDS B2 LVDS B2 N C N C LVDS BKLT EN GND LVDS B CK LVDS B CK CKLVDS BKLT CTRL VCC 7 VCC_5V_SBY VCC_5V_SBY VCC_5V_SBY RSVD VGA_RED GND VGA_GRN VGA_BLU VGA_HSYNC VGA_VSYNC VGA I2C CK VGA I2C DAT TV DAC A TV DAC B 2 98 GND VCC_12V VCC 12V Vern VCC_12V VEG VCC 12V CE VCC 12V VCC 12V GND 14 N C GND PCIE TX2 PCIE TX2 GPI1 PCIE TX1 PCIE TX1 GND GPI2 PCIE TX0 PCIE TXO GND LVDS_A0 LVDS A0 LVDS A1 LVDS At LVDS A2 LVDS A2 LVDS VDD EN N C N C GND LVDS A CK LVDS CK LVDS RC CK LVDS 12C DAT GPI3 KBD_RST KBD_A20GATE PCIEO CK REF PCIEO CK REF GND RSVD B91 RSVD GPOO RSVD RSVD Installation Installation 2 5 COM Express CD Connector D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 GND IDE D5 IDE D10 IDE D11 IDE D12 IDE D4 IDE DO IDE REQ IDE IOW amp IDE 0 GND IDE IRQ IDE A0 IDE A1 IDE A2 IDE CS1 IDE CS3 IDE RESETH PCI GNT3 amp PCI REQ3H GND PCI AD1 PCI AD3 PCI AD5 PCI AD7 PCI C BEOH PCI AD9 PCI AD11 PCI AD13 PCI AD15 GND PCI PAR PCI SERRE PCI STOPH PCI TRDYH PCI PCI AD16 PCI AD18 PCI 0 PCI AD22 GND PCI AD24 PCI AD26 PCI A
6. PEG TX10 PEG TX10 GND PEG TX11 PEG TX11 GND PEG TX12 PEG TX12 GND PEG TX13 PEG TX13 GND PEG_ENABLE PEG_TX14 PEG_TX14 GND PEG_TX15 PEG_TX15 GND VCC_12V VCC 12V VCC 12V VCC 12V 1 VOC 12V GND 16 PEG RX1 TYPETH PEG RX2 PEG RX2 GND PEG RX3 PEG RX3 RSVD RSVD PEG RX4 PEG RX4 RSVD PEG RX5 PEG RX5 GND PEG RX6 PEG RX6 SDVO DATA PEG RX7 PEG RXT GND RSVD PEG RX8 PEG RXS GND PEG RX9 PEG RSVD GND PEG RX10 PEG RX10 GND PEG RX11 PEG RX11 GND PEG RX12 PEG RX12 GND PEG RX13 PEG RX13 GND RSVD PEG RX14 PEG RX14 GND PEG RX15 PEG RX15 GND Installation Installation 2 6 The Installation Paths of CD Driver Windows 2000 amp XP Driver Path CHIPSET CHIPSET INF 9 11 LAN ETHERNET REALTEK 8111_WINXP_5764 VGA IGRAPHICSVNTEL 2K XP 3211432 Windows 7 Driver Path CHIPSET 9 11 LAN Windows 7 built in LAN driver VGA IGRAPHICSWNTEL WIN7 32101930 IGRAPHICSWNTEL WIN7 641930 17 Installation This page is intentionally left blank 18 ter 3 BIOS 3 1 BIOS Main Setup The AMI BIOS provides a setup utility program for specifying the system configurations and settings The BIOS ROM of the system stores the setup utility When you turn on the computer the AMI BIOS is immediately activated The Main displays system overview status Use the left right arrow keys to highlight
7. The following table lists the I O port addresses used 0000h 0000Fh 0080h 009Fh 00COh 00DFh 0020h 0021h 00AO0h 00A1h 0040h 0043h 0044h 0047h 0060h 0064h 0070h 0073h OOFOh 00FFh 01FOh 01F7h 0274h 0277h 0279h OA79h 02F8h 02FFh 0378h 037Ah 03B0h 03BFh 03C0h 03CFh 03D4h 03D9h 03FOh 03F 7h 03F6h 03F6h 03F8h 03FFh 0400h 041F 04DOh 04D1h 0500h 053Fh 0800h 087Fh 0 0060 178 DMA Controller DMA Controller DMA Controller Programmable Interrupt Controller Programmable Interrupt Controller System Timer System Timer Keyboard Controller System CMOS Real Time Clock Math Co Processor Primary IDE ISAPNP Read Data Port ISAPnP Configuration COM 2 If use Parallel Port If use MDA MGA EGA VGA CGA CRT register Floppy Diskette Primary IDE COM 1 If use South Bridge SMB IRQ Edge level control ports South Bridge GPIO ACPI PME 68 Appendix OA10h 0A1 7h Hardware Monitor OCF8h PCI Configuration address OCFCh PCI Configuration Data Appendix B BIOS Memory Map Item Address Description 1 00000h 9FFFFh DOS Kernel Area 2 A0000h BFFFFh EGA and VGA Video Buffer 128KB 3 C0000h CFFFFh EGA VGA ROM 4 DOOOOh DFFFFh Adaptor ROM 5 E0000h FFFFFh System BIOS 69 Appendix Appendix C Interrupt Request Lines IRQ Peripheral devices use interrupt request lines to notify CPU for the service required The following table shows the IRQ used by the devices on board
8. Appendix A I O Port Address Map 68 Appendix B BIOS Memory Map 69 Appendix C Interrupt Request Lines IRQ 70 Appendix D Digital I O Setting 71 Chapter 1 Pert o Introduction Introduction 1 1 Copyright Notice All Rights Reserved The information in this document is subject to change without prior notice in order to improve the reliability design and function It does not represent a commitment on the part of the manufacturer Under no circumstances will the manufacturer be liable for any direct indirect special incidental or consequential damages arising from the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright All rights are reserved No part of this manual may be reproduced by any mechanical electronic or other means in any form without prior written permission of the manufacturer 1 2 Declaration of Conformity CE This product has passed the CE test for environmental specifications when shielded cables are used for external wiring This kind of cable is available from ARBOR Please contact your local supplier for ordering information Test conditions for passing included the equipment being operated within an industrial enclosure In order to protect the produc
9. Level Function IRQ 00 System Timer IRO 01 Standard 101 102 Key or Microsoft Natural PS 2 Keyboard IRQ 02 VGA and Link to Secondary PIC IRO 03 Communications Port COM2 IRQ 04 Communications Port COM1 IRQ 05 PCI Device IRQ 06 Standard floppy disk controller IRQ 07 Parallel Port IRQ 08 System CMOS real time clock IRQ 09 Microsoft ACPI Compliant System IRQ 10 PCI Device IRQ 11 PCI Device IRQ 12 PS 2 Compatible Mouse IRQ 13 PFY exception IRQ 14 Primary IDE Channel IRQ 15 PCI Device 70 Appendix Appendix D Digital I O Setting Below are the source codes written in assembly amp C please take them for Digital I O application examples The default I O address is 6Eh Assembly Code mov ax 402h mov dx ax mov al 00h OUL dx al mov ax 400h mov dx ax mov al Offh out dx ax mov ax 404h mov dx ax mov al 06eh out dx ax mov ax 403h mov dx ax mov al 010h OUL dx ax mov ax 405h mov dx ax mov al Offh out dx ax mov ax 402h mov dx ax mov al 048h out dx ax mov ax 402h mov dx ax mov al 00h OUL dx al clear i2c bus clear i2c bus status Set I2C Device Address 6eh select GPIO 1 index 10h Set all GPIO 1 pin as output start write active clear i2c bus 71 mov mov mov out mov mov mov out mov mov mov out mov mov mov out ax 400h dx ax al Offh dx ax ax 404h dx ax al 06eh dx ax ax 403h dx ax al 020h dx ax ax 405h dx ax al 0ffh dx ax ax 402h
10. dx ax al 048h dx ax Appendix clear i2c bus status Set I2C Device Address 6eh select GPIO 2 index 20h Set all GPIO 2 pin as output start write active mov mov mov out mov mov mov out mov mov mov out ax 402h dx ax al 00h dx al ax 400h dx ax al Offh dx ax ax 404h dx ax al 06eh dx ax ax 403h dx ax al 011h dx ax clear i2c bus clear i2c bus status Set I2C Device Address 6eh select GPIO 1 data register index 11h 72 Appendix mov mov mov out mov mov mov out mov mov mov out mov mov mov out mov mov mov out mov mov mov out ax 405h dx ax al Offh dx ax ax 402h dx ax al 048h dx ax ax 402h dx ax al 00h dx al ax 400h dx ax al Offh dx ax ax 404h dx ax al 06eh dx ax ax 403h dx ax al 021h dx ax ax 405h dx ax al Offh dx ax ax 402h dx ax al 048h dx ax Set all GPIO 1 data high start write active clear i2c bus clear i2c bus status Set I2C Device Address 6eh select GPIO 2 Data register index 21h Set all GPIO 2 data High start write active R Appendix C Language Code Include Header Area N Hinclude math h Hinclude stdio h Hinclude dos h routing sub routing i void main int argc char argv intSMB_PORT_AD 0x400 int SMB DEVICE ADD 0x6e 75111R s Add 6eh int i j Index x0
11. Controller Detects the presence of PS 2 mouse Detects the presence of Keyboard in KBC port Testing and initialization of different Input Devices Also update the Kernel Variables Traps the INTO9h vector so that the POST INTO9h handler gets control for IRQ1 Uncompress all available language BIOS logo and Silent logo modules Early POST initialization of chipset registers Relocate System Management Interrupt vector for all CPU in the system Uncompress and initialize any platform specific BIOS modules GPNV is initialized at this checkpoint Initializes different devices through DIM See DIM Code Checkpoints section of document for more information Initializes different devices Detects and initializes the video adapter installed in the system that have optional ROMs Initializes all the output devices Allocate memory for ADM module and uncompress it Give control to ADM module for initialization Initialize language and font modules for ADM Activate ADM module Initializes the silent boot module Set the window for displaying text information Displaying sign on message CPU information setup key message and any OEM specific information 60 BIOS Initializes different devices through DIM See DIM Code 38 Checkpoints section of document for more information USB controllers are initialized at this point 39 Initializes DMAC 1 amp DMAC 2 3A Initialize RTC date time Test for total memory inst
12. Disk drives Removable Drives Press Enter and it shows Bootable and Removable drives 39 BIOS 3 4 1 Boot Settings Configuration BIOS SETUP UTILITY Quick Boot Enabled Quick Boot Allows BIOS to skip certain tests while booting This will decrease the time needed to boot the system Bootup Num Lock Set this value to allow the Number Lock setting to be modified during boot up LAN Boot Function Set this option to LAN add on Boot ROM function 40 BIOS 3 5 Security BIOS SETUP UTILITY Change Supervisor Password Supervisor Password amp User Password You can set either supervisor or user password or both of then The differences between are Set Supervisor Password Can enter and change the options of the setup menus Set User Password Just can only enter but do not have the right to change the options of the setup menus When you select this function the following message will appear at the center of the screen to assist you in creating a password ENTER PASSWORD 41 BIOS Type the password up to eight characters in length and press lt Enter gt The password typed now will clear any previously entered password from CMOS memory You will be asked to confirm the password Type the password again and press lt Enter gt You may also press lt ESC gt to abort the selection and not enter a password To disable a password just press lt Enter gt when you are prompted
13. more information Restore CPUID value back into register The Bootblock Runtime interface module is moved to system memory and control is given to it Determine whether to execute serial flash The Runtime module is uncompressed into memory CPUID information is stored in memory Store the Uncompressed pointer for future use in PMM Copying Main BIOS into memory Leaves all RAM below 1MB Read Write including E000 and F000 shadow areas but closing SMRAM Restore CPUID value back into register Give control to BIOS POST ExecutePOSTKernel See POST Code Checkpoints section of document for more information System is waking from ACPI S3 state OEM memory detection configuration error This range is reserved for chipset vendors amp system manufacturers The error associated with this value may be different from one platform to the next 56 BIOS 3 9 2 Bootblock Recovery Code Checkpoints The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt The following table describes the type of checkpoints that may occur during the Bootblock recovery portion of the BIOS Note Checkpoint Description Initialize the floppy controller in the super I O Some interrupt EO vectors are initialized DMA controller is initialized 8259 interrupt controller is initialized L1 cache is enabled E9 Set up floppy controll
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15. 8 3 Troubleshooting POST BIOS Beep Codes Number of Beeps 1 20r3 4 7 9 11 Description Reseat the memory or replace with known good modules Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter e If beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem If the system video adapter is an add in card replace or reset the video adapter If the video adapter is an integrated part of the system board the board may be faulty 54 BIOS 3 9 AMI BIOS Checkpoints 3 9 1 Bootblock Initialization Code Checkpoints The Bootblock initialization code sets up the chipset memory and other components before system memory is available The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS Note Checkpoint Before DO DO D1 D2 D3 D4 D5 Description If boot block debugger is enabled CPU cache as RAM functionality is enabled at this point Stack will be enabled f
16. C WDT AC SDIN2 AC SDIN1 AC SDINO GND SPKR 20 CK I2C DAT THRM USB7 USB7 USB 4 5 OCH USB5 USB5 GND USB3 USB3 USB 0 1 OCH USB1 USB1 EXCD1 PERSTH EXCD1_CPPE SYS RESETH CB_RESET GND N C N C GPO1 N C ET GND GBEO MDIS GBEO MDI3 GBEO LINK100 GBEO LINK1000 GBEO MDI2 GBEO MDI2 GBEO LINKH GBEO MDI1 GBEO MDI1 GND GBEO MDIO GBEO MDIO GBEO CTREF SUS S3 SATAO TX SATAO TX SUS S4 SATAO RX SATAO RX GND SATA2 TX SATA2 TX SUS S5 SATA2 RX SATA2 RX BATLOW ATA_ACT AC_SYNC AC_RST GND AC_BITCLK AC_SDOUT BIOS_DISABLE THRMTRIP USB6 USB6 USB 6 7 OCH USB4 USB4 GND USB2 USB2 USB 2 3 OCH USBO USBO VCC RTC EXCDO PERSTH EXCDO CPPEH LDC GND N C N C GPIO D54 N C A1 A2 A3 A4 A5 A6 AT A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 N C GPO2 N C N C GND PCIE RX2 PCIE RX2 GPO3 PCIE RX1 PCIE RX1 WAKEO WAKE 1 PCIE RXO PCIE RXO GND
17. D28 PCI AD30 PCI IRQCH PCI IRQDH PCI CLKRUNH PCI M66EN PCI CLK GND PEG_TX0 PEG TXO PEG LANE PEG gt GND IDE D7 IDE D6 IDE D3 IDE D15 IDE D8 IDE D9 IDE D2 IDE D13 IDE D1 GND IDE D14 IDE I RDY IDE IOR amp PCI PMEH PCI GNT28 amp PCI REQ2H PCI GNT1 PCI REQ1 H PCI GNTO amp GND PCI REQOR PCI RESETH PCI ADO PCI AD2 PCI AD4 PCI AD6 PCI 8 PCI AD10 PCI AD12 GND PCI AD14 PCI G BETH PCI PERRH PCI LOCKH PCI DEVSELH PCI IRDYH PCI C BE2H PCI AD17 PCI AD19 GND PCI AD21 PCI AD23 PCI BE3H PCI AD25 PCI AD27 PCI AD29 PCI AD31 PCI TRQAH PCI IRQBH GND FIXED PEG_RX0 PEG RXO TYPEOH PEG RX1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 C54 C55 D56 D57 D58 D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 D73 D74 D75 D76 D77 D78 D79 D80 D81 D82 D83 D84 D85 D86 D87 D88 D89 D90 D91 D92 D93 D94 D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 PEG TX1 TYPE2H PEG TX2 PEG TX2 GND PEG TX3 PEG TX3 RSVD RSVD PEG TX4 PEG TX4 GND PEG TX5 PEG TX5 GND PEG TX6 PEG TX6 SDVO CLK PEG TX7 PEG TX7 GND IDE CBLIDH PEG TX8 PEG TX8 GND PEG TX9 PEG_TX9 RSVD GND
18. GPIO1x Output pin control Set all pin as output SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x10 0xff SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x20 0xff delay 10 Index x1 GPIO1x Output Data value all low SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x11 0x00 SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x21 0x00 delay 3000 F Index x1 GPIO1x Output Data value all high SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x11 0xff SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x21 0xff delay 3000 p printf Digital I O pin 7 5 3 1 ouput high n Index x1 GPIO1x Output Data value SMB_Byte_WRITE SMB_PORT_AD SMB_DEVICE_ADD 0x11 0xAA SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x21 0xAA delay 3000 j printf Digital I O pin 6 4 2 0 ouput high n Index 11 GPIO1x Output Data value E SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x11 0x55 SMB Byte WRITE SMB PORT AD SMB DEVICE ADD 0x21 0x55 delay 1500 Em Appendix SMB Byte WRITE int SMPORT int DevicelD int REG INDEX int REG DATA outportb SMPORT 02 0x00 outportb SMPORT 00 Oxff delay 10 SMPORT 04 DevicelD outportb outportb outportb outportb NNN SMPORT 03 REG_INDEX SMPORT 05 REG DATA SMPORT 02 0x48 75 clear clear I2C Device Address Register Address in device Data Value write active Appendix This page is intentionally left blank
19. IXED Memory The Choice 64MB 128MB Default 224MB Boot Display The Choice CRT LVDS Default 44 BIOS Flat Panel Type It allows you to select the LCD Panel type as below The Choice 640x480 800x600 1024x768 18bits 1 Default 1280x1024 1400x1050 1400x1050 1600x1200 1280x768 1680x1050 1920x1200 TV Standard The Choice VBIOS Default Spread Spectrum Clock It sets the value of the spread spectrum It is for CE testing use only The Choice Disabled Default Enabled 45 BIOS 3 6 2 South Bridge Chipset Configuration BIOS SETUP UTILITY USB Functions IB USB Ports USB Funtion This item allows you to active USB ports The Choice Disabled 2 USB Ports 4 USB Ports 6 USB Ports 8 USB Ports 10 USB Ports 46 BIOS USB 2 0 Controller Select Enabled if your system contains a Universal Serial Bus 2 0 USB 2 0 controller and you have USB peripherals The Choice Enabled Disabled HDA Controller This item allows you to select the chipset family to support High Definition Audio Controller The Choice Enabled Disabled SLP_S4 Min Assertion Width The item allows you to select the assertion width of SLP_S4 The Choice 4 to 5 Seconds 3 to 4 Seconds 2 to 3 Seconds 1 to 2 Seconds Onboard LAN1 Select Enabled if your system has a LAN device installed on the system board and you wish to use it The Choice Enabled Disabled
20. Wide Operating Temperature COM 842E COM Express CPU Module User s Manual Version 1 1 CE 2011 06 LZ This page is intentionally left blank Index Table of Contents Chapter 1 Introduction 1 1 1 Copyright Notice ri 2 1 2 Declaration of Conformity 2 1 3 About This User s Manual 3 1 4 Warning dinero aperire 3 1 5 Replacing the Lithium Battery 3 1 6 Technical Support 4 1 7 Warranty a n nanana 4 1 8 Packing LIST Lasser 5 1 9 Ordering Information 5 1 10 Specifications us 6 1 11 Board Dimensions 7 Chapter 2 Installation 9 2 1 What is COM Express 10 2 2 06 10130 3111 sai 11 2 3 Jumpers and Connectors 12 2 4 COM Express AB Connector 13 2 5 COM Express CD Connector 15 2 6 The Installation Paths of CD Driver 17 Chapter 3 BIOS 19 3 1 BIOS Main Setup eee eee eee 20 3 2 Advanced Settings 21 3 2 1 CPU Confi
21. a particular configuration screen from the top menu bar or use the down arrow key to access and configure the information below BIOS SETUP UTILITY System Time System Time Set the system time The time format is Hour 00 to 23 Minute 00 to 59 Second 00 to 59 20 BIOS System Date Set the system date Note that the Day automatically changes when you set the date The date format is Day Sun to Sat Month 1 to 12 Date 1 to 31 Year 1999 to 2099 3 2 Advanced Settings BIOS SETUP UTILITY K CPU Configuration AT BIOS 3 2 1 CPU Configuration The CPU Configuration setup screen varies depending on the installed processor BIOS SETUP UTILITY Hardware Prefetcher Enabled Hardware Prefetcher This should be enabled in order to enable or disable the Hardware Prefetcher Disable Feature Enable Enable Hardware Prefetcher Disabled Disable Hardware Prefetcher Adjacent Cache Line Prefetch This should be enabled in order to enable or disable the cache Prefetcher Disable Feature The choice Enabled Disabled PES BIOS Cache L1 amp L2 CPU Internal Cache amp External Cache These two categories speed up memory access However it depends on CPU chipset design Enable Enable cache Disabled Disable cache Max CPUID Value Limit Disabled for Windows XP Vanderpool Technology Enable this item will allow a platform to run multiple virtual opera
22. all termina tions Sn 96 96 5 Ag 3 0 3 5 and Cu 0 5 1 3 About This User s Manual This user s manual provides general information and installation instructions about the product This User s Manual is intended for experienced users and integrators with hardware knowledge of personal computers If you are not sure about any description in this booklet please consult your vendor before further handling 1 4 Warning Single Board Computers and their components contain very delicate Integrated Circuits IC To protect the Single Board Computer and its components against damage from static electricity you should always follow the following precautions when handling it 1 Disconnect your Single Board Computer from the power source when you want to work on the inside 2 Hold the board by the edges and try not to touch the IC chips leads or cir cuitry 3 Use a grounded wrist strap when handling computer components 4 Place components on a grounded antistatic pad or on the bag that comes with the Single Board Computer whenever components are separated from the system 1 5 Replacing the Lithium Battery Incorrect replacement of the lithium battery may lead to a risk of explosion The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer Do not throw lithium batteries into the trash can lt must be disposed of in accordance with local regulations concerning special w
23. alled in the system Also Check for 3B DEL or ESC keys to limit memory test Display total memory in the system 3C Mid POST initialization of chipset registers Detect different devices Parallel ports serial ports and 40 coprocessor in CPU etc successfully installed in the system and update the BDA EBDA etc Updates CMOS memory size from memory found in memory test Allocates memory for Extended BIOS Data Area from 52 base memory Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed 60 Initializes NUM LOCK status and programs the KBD typematic rate 75 Initialize Int 13 and prepare for IPL detection 78 Initializes IPL devices controlled by BIOS and option ROMs 7C Generate and write contents of ESCD in NVRam 84 Log errors encountered during POST Display errors to the user and gets the user response for 85 error 87 Execute BIOS setup if needed requested Check boot password if installed 8C Late POST initialization of chipset registers 8D Build ACPI tables if ACPI is supported 8E Program the peripheral parameters Enable Disable NMI as selected Initialization of system management interrupt by invoking 90 all handlers Please note this checkpoint comes right after heckpoint 20h A1 Clean up work needed before booting to OS 61 A2 A4 AT A9 AB AC B1 00 BIOS Takes care of runtime image preparation for differen
24. aste Introduction 1 6 Technical Support If you have any technical difficulties please do not hesitate to call or e mail our customer service http www arbor com tw E mail info arbor com tw 1 7 Warranty This product is warranted to be in good working order for a period of two years from the date of purchase Should this product fail to be in good working order at any time during this period we will at our option replace or repair it at no additional charge except as set forth in the following terms This warranty does not apply to products damaged by misuse modifications accident or disaster Vendor assumes no liability for any damages lost profits lost savings or any other incidental or consequential damage resulting from the use misuse of or inability to use this product Vendor will not be liable for any claim made by any other related party Vendors disclaim all other warranties either expressed or implied including but not limited to implied warranties of merchantability and fitness for a particular purpose with respect to the hardware the accompanying product s manual s and written materials and any accompanying hardware This limited warranty gives you specific legal rights Return authorization must be obtained from the vendor before returned merchandise will be accepted Authorization can be obtained by calling or faxing the vendor and requesting a Return Merchandise Authorization RMA number Returned g
25. e Defaults BIOS SETUP UTILITY Load Failsafe Defaults Load Failsafe Defaults Cancel When you press lt Enter gt on this item you get a confirmation dialog box with a message Load Failsafe Defaults OK Cancel Pressing OK loads the BIOS Failsafe Default values for all the setup questions lt F8 gt key can be used for this operation 52 BIOS 3 8 Beep Sound codes list 3 8 1 Boot Block Beep Codes Number of Beeps 1 N 9 10 11 12 13 Description Insert diskette in floppy drive A AMIBOOT ROM file not found in root directory of diskette in A Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error Flash Erase error Flash Program error AMIBOOT ROM file size error BIOS ROM image mismatch file layout does not match image present in flash device 3 8 2 POST BIOS Beep Codes Number of Beeps 1 Description Memory refresh timer error Motherboard timer not operational O 0DSIN Processor error 8042 Gate A20 test error cannot switch to protected mode General exception error processor exception interrupt error Display memory error system video adapter 10 AMIBIOS ROM checksum error CMOS shutdown register read write error 11 Cache memory test failed 53 BIOS 3
26. emory and I O decode windows in PCI PCI bridges and noncompliant PCI devices Static resources are also reserved Function 2 searches for and initializes any PnP PCI or AGP video devices Initialize different buses and perform the following functions Boot Input Device Initialization function 3 IPL Device Initialization function 4 General Device Initialization function 5 Function 3 searches for and configures PCI input devices and detects if system has standard keyboard controller Function 4 searches for and configures all PnP and PCI boot devices Function 5 configures all onboard peripherals that are set to an automatic configuration and configures all remaining PnP and PCI devices 63 BIOS While control is in the different functions additional checkpoints are output to port 80h as a word value to identify the routines under execution The low byte value indicates the main POST Code Checkpoint The high byte is divided into two nibbles and contains two fields The details of the high byte of these checkpoints are as follows HIGH BYTE XY The upper nibble X indicates the function number that is being executed X can be from 0 to 7 0 func 0 disable all devices on the BUS concerned 2 funcZ2 output device initialization on the BUS concerned 3 func 3 input device initialization on the BUS concerned 4 func 4 IPL device initialization on the BUS concerned 5 func 5 general device initializa
27. er and data Attempt to read from floppy Enable ATAPI hardware Attempt to read from ARMD and 2d ATAPI CDROM EB Disable ATAPI hardware Jump back to checkpoint E9 EF Read error occurred on media Jump back to checkpoint EB FO Search for pre defined recovery file name in root directory F1 Recovery file not found Start reading FAT table and analyze FAT to find the clusters EE occupied by the recovery file F3 Start reading the recovery file cluster by cluster F5 Disable L1 cache Check the validity of the recovery file configuration to the d current configuration of the flash part Make flash write enabled through chipset and OEM specific FB method Detect proper flash part Verify that the found flash part size equals the recovery file size F4 The recovery file size does not equal the found flash part size 57 BIOS FC Erase the flash part FD Program the flash part The flash has been updated successfully Make flash write EE disabled Disable ATAPI hardware Restore CPUID value back into register Give control to F000 ROM at F000 FFFOh 58 BIOS 3 9 3 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS pre boot process The following table describes the type of checkpoints that may occur during the POST portion of the BIOS Note Checkpoint 03 04 05 06 07 08 CO C1 C2 C5 C6 Description Disable NMI Parity v
28. guration 22 3 2 2 IDE Configuration 24 3 2 3 Floppy Configuration 25 3 2 4 Super IO Configuration 26 3 2 5 Hardware Health Configuration 28 3 2 6 ACPI Configuration 29 3 2 7 AHCI Configuration 30 3 2 8 APM Configuration 31 3 2 9 MPS Configuration 33 3 2 10 USB Configuration 34 3 2 11 Remote Access Configuration 36 3 3 Advanced PCI PnP Settings 37 3 4 Boot Settings 1 ee eee ree eren 39 3 4 1 Boot Settings Configuration 40 35 OC UY i EE EE 41 3 6 Advanced Chipset Settings 43 3 6 1 North Bridge Chipset Configuration 43 3 6 2 South Bridge Chipset Configuration 46 Sf EA OPNING JG 48 3 8 Beep Sound codes list 53 3 8 1 Boot Block Beep Codes 53 3 8 2 POST BIOS Beep Codes 53 3 8 3 Troubleshooting POST BIOS Beep Codes 54 Appendix GR dia 67
29. ideo for EGA and DMA controllers Initialize BIOS POST Runtime data area Also initialize BIOS modules on POST entry and GPNV area Initialized CMOS as mentioned in the Kernel Variable wCMOSFlags Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK Verify CMOS checksum manually by reading storage area If the CMOS checksum is bad update CMOS with power on default values and clear passwords Initialize status register A Initializes data variables that are based on CMOS setup questions Initializes both the 8259 compatible PICs in the system Initializes the interrupt controlling hardware generally PIC and interrupt vector table Do R W test to CH 2 count reg Initialize CH 0 as system timer Install the POSTINT1Ch handler Enable IRQ 0 in PIC for system timer interrupt Traps INT1Ch vector to POSTINT1ChHandlerBlock Fixes CPU POST interface calling pointer Initializes the CPU The BAT test is being done on KBC Program the keyboard controller command byte is being done after Auto detection of KB MS using AMI KB 5 Early CPU Init Start Disable Cache Init Local APIC Set up boot strap processor Information Set up boot strap processor for POST Enumerate and set up application processors Re enable cache for boot strap processor 59 C7 OA OB OG OE 13 20 24 2A 2C 2E 31 33 3 BIOS Early CPU Init Exit Initializes the 8042 compatible Key Board
30. nd mode The Choice Enabled Disabled 90 BIOS 3 2 9 MPS Configuration BIOS SETUP UTILITY MPS Revision MPS Revision Select the operating system that is Multi Processors Version Control for OS The Choice 1 4 1 1 E m BIOS 3 2 10 USB Configuration BIOS SETUP UTILITY USB Mass Storage Device Configuration Legacy USB Support Enables support for legacy USB AUTO option disables legacy support if no USB devices are connected USB 2 0 Controller Mode Configures the USB 2 0 controller in High Speed 480Mbps or Full Speed 12MBPS BIOS EHCI Hand Off This is a work around for OSs without EHCI hand Off support The EHCI ownership change should be claimed by EHCI driver 34 BIOS USB Mass Storage Reset Delay Number of seconds POST waits for the USB mass storage device after start unit command BIOS SETUP UTILITY USB Mass Storage Reset Delay 20 Sec Emulation Type If Auto USB devices less than 530MB will be emulated as Floppy and remaining as hard drive Forced FDD option can be used to force a HDD formatted drive to BOOT as FDD Ex ZIP drive 35 BIOS 3 2 11 Remote Access Configuration BIOS SETUP UTILITY Remote Access Enabled Remote Access Configure Remote Access type and parameters The Choice Enabled Disabled Serial port number Select Serial Port for console redirection Make sure the selected port is enabled The Choice COM1 COM2 Ba
31. oods should always be accompanied by a clear problem description Introduction 1 8 Packing List 1 x COM 842E COM Express CPU Module 1 x Driver CD 1 x Quick Installation Guide If any of the above items is damaged or missing contact your vendor immediately 1 9 Ordering Information TM COM 842E L7500 Intel Core 2 Duo L7500 1 6GHz COM Express CPU Module PBE 1700 COM Express evaluation board in ATX form factor HS 0842 F1 Heat spreader 114 x 95 x 20 8mm CBK 04 1700 00 Cable kit Introduction 1 10 Specifications Form Factor COM Express Type 2 CPU Module Intel Core 2 Duo processor up to 800MHz FSB CPU Intel Celeron M processor with 533 667MHz FSB Chipset Intel GME965 Intel ICH8M 2 x 200 pin DDR2 SO DIMM sockets supporting System Memory 533 667MHz SDRAM up to 4GB BIOS Digital Input Output 8 bit programmable Digital Input Output 1 x PCI Express x16 Expansion Interface 5 x PCI Express x1 4 x PCI Operation Temp 40 C 85 C 40 F 185 F Watchdog Timer 1 255 levels Reset Dimension L x W 125 x 95 mm 4 9 x 3 7 VGA LCD Controller D Intel Graphics Media Accelerator Introduction 1 11 Board Dimensions
32. rd to board connectors consist of two rows of 220 pins each Row AB which is required provides pins for PCI Express SATA LVDS LCD channel LPC bus system and power management VGA LAN and power and ground interfaces Row CD which is optional provides SDVO and legacy PCI and IDE signals next to additional PCI Express LAN and power and ground signals By the way the target markets of COM will be focused on e Retail amp Advertising e Medical e est amp Measurement e Gaming amp Entertainment e Industrial amp Automation e Military amp Government e Security 10 Installation 2 2 Block Diagram Q O 9 O o C O O PCle 16 PCI Bus IDE ATA I F Socket P Intel FSB 533 667 800MHz obile Intel ipa TV Out AC 97 Link LPG I F USB I F Serial ATA I F PCle 1 Connector AB Cle LA ontroller 11 Installation 2 3 Jumpers and Connectors O o DIMM2 9
33. rom this point Early Boot Strap Processo BSP initialization like microcode update frequency and other CPU critical initialization Early chipset initialization is done Early super I O initialization is done including RTC and keyboard controller Serial port is enabled at this point if needed for debugging NMI is disabled Perform keyboard controller BAT test Save power on CPUID value in scratch CMOS Go to flat mode with 4GB limit and GA20 enabled Verify the boot block checksum System will hang here if checksum is bad Disable CACHE before memory detection Execute full memory sizing module If memory sizing module is not executed start memory refresh and do memory sizing in Boot block code Do additional chipset initialization Re enable CACHE Verify that flat mode is enabled Test base 512KB memory Adjust policies and cache first 8MB Set stack Bootblock code is copied from ROM to lower system memory and control is given to it BIOS now executes out of RAM Copy compressed boot block code to memory in right segments Copy BIOS from ROM to RAM for faster access Perform main BIOS checksum and update recovery status accordingly 55 06 07 08 D9 DA DC E1 E8 EC EE BIOS Both key sequence and OEM specific method are checked to determine if BIOS recovery is forced If BIOS recovery is necessary control flows tocheckpoint E0 See Bootblock Recovery Code Checkpoints section of document for
34. se Address IRQ Select Serial Port for console redirection Make sure the selected port is enabled The Choice 3F8 IRQ4 2E8 IRQ3 3E8 IRQ4 2F8 IRQ3 36 BIOS 3 3 Advanced PCI PnP Settings BIOS SETUP UTILITY Clear NURAM Reserved Memory Size Disabled Clear NVRAM Clear NVRAM during System BOOT The Choice Yes No E BIOS Plug amp Play O S No Lets the BIOS configure all the devices in the system Yes lets the operating system configure Plug and Play PnP devices not required for BOOT if your system has a Plug and Play operating system PCI Latency Timer Value in units of PCI clocks for PCI device latency timer register Allocate IRQ to PCI VGA Yes Assigns IRQ to PCI VGA card if card requests IRQ No Does not assign IRQ to PCI VGA card even if card requests an IRQ IRQ3 IRQ15 Available Specified IRQ is available to be used by PCI PnP devices Reserved Specified IRQ is reserved for use by Legacy ISA devices DMA Channel 0 DMA Channel 7 Available Specified DMA is available to be used by PCI PnP devices Reserved Specified DMA is reserved for use by Legacy ISA devices Reserved Memory Size Size of memory block to reserve for legacy ISA devices 38 BIOS 3 4 Boot Settings BIOS SETUP UTILITY Boot Settings Configuration Boot Device Priority Press Enter and it shows Bootable add in devices Hard Disk Drives Press Enter and it shows Bootable and Hard
35. select mode for serial Port2 Parallel Port Address Select an address for the parallel port The choice 3BC 378 278 Disabled Parallel Port Mode Select an operating mode for the onboard parallel port Select Normal Compatible or SPP unless you are certain both of your hardware and software support one of the other available modes The choice SPP EPP ECP ECP EPP Normal Parallel Port IRQ Select an interrupt for the parallel port The choice IRQ5 IRQ7 Restore on AC Power Loss by IO This item allows you to select if you want to power on the system after power failure Fra BIOS 3 2 5 Hardware Health Configuration BIOS SETUP UTILITY System CPU Temperature 1 Displays the current System CPU fan temperature CPU System Fan Speed Shows the current CPU System Fan operating speed Vcore Displays the voltage level of CPU Vcore 5 0V 3 3V 12 0V 5Vsb VBAT Shows the voltage level of the 3 3V 5 0V 12 0V 5V standby and battery 28 BIOS 3 2 6 ACPI Configuration BIOS SETUP UTILITY suspend mode 51 PUS Suspend mode Select the ACPI state used for System Suspend The Choice S1 POS 29 BIOS 3 2 7 AHCI Configuration BIOS SETUP UTILITY AHCI PortO Mot Detected AHCI Port 0 Port 1 Port 2 While entering setup BIOS auto detects the presence of IDE devices This displays the status of auto detection of IDE devices 30
36. t BIOS modules Fill the free area in FOOOh segment with OFFh Initializes the Microsoft IRQ Routing Table Prepares the runtime language module Disables the system configuration display if needed Initialize runtime language module Display boot option popup menu Displays the system configuration screen if enabled Initialize the CPU s before boot which includes the programming of the MTRR s Wait for user input at config display if needed Uninstall POST INT1Ch vector and INTO9h vector Prepare BBS for Int 19 boot Init MP tables End of POST initialization of chipset registers De initializes the ADM module Save system context for ACPI Prepare CPU for OS boot including final MTRR values Passes control to OS Loader typically INT 19h 62 BIOS 3 9 4 DIM Code Checkpoints The Device Initialization Manager DIM gets control at various times during BIOS POST to initialize different system busses The following table describes the main checkpoints where the DIM module is accessed Note Checkpoint 2A 38 Description Initialize different buses and perform the following functions Reset Detect and Disable function 0 Static Device Initialization function 1 Boot Output Device Initialization function 2 Function 0 disables all device nodes PCI devices and PnP ISA cards It also assigns PCI bus numbers Function 1 initializes all static devices that include manual configured onboard peripherals m
37. t from being damaged by ESD Electrostatic Discharge and EMI leakage we strongly recommend the use of CE compliant industrial enclosure products FCC Class A This device complies with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 this device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation RoHS ARBOR Technology Corp certifies that all components in its products are in compliance and conform to the European Unions Restriction of Use of Haz ardous Substances in Electrical and Electronic Equipment RoHS Directive 2002 95 EC The above mentioned directive was published on 2 13 2003 The main pur pose of the directive is to prohibit the use of lead mercury cadmium hexava lent chromium polybrominated biphenyls PBB and polybrominated diphenyl ethers PBDE in electrical and electronic products Member states of the EU Introduction are to enforce by 7 1 2006 ARBOR Technology Corp hereby states that the listed products do not con tain unintentional additions of lead mercury hex chrome PBB or PBDB that exceed a maximum concentration value of 0 1 by weight or for cadmium exceed 0 01 by weight per homogenous material Homogenous material is defined as a substance or mixture of substances with uniform composition such as solders resins plating etc Lead free solder is used for
38. ting systems and applications in independent partitions Core Multi Processing Enabled or disabled the multi processing functionality of the Core processor Intel SpeedStep Tech Maximum CPU speed is set to maximum Minimum CPU speed is set to minimum Automatic CPU speed controlled by Operating system Disabled Default CPU speed 205 BIOS 3 2 2 IDE Configuration BIOS SETUP UTILITY K Primary IDE Master Not Detected Primary Secondary Third IDE Master Slave Select one of the hard disk drives to configure Press lt Enter gt to access its sub menu E m BIOS 3 2 3 Floppy Configuration BIOS SETUP UTILITY 1 44 MB 3 Select the type of floppy disk drive installed in your system The choice None 360K 5 25 1 2M 5 25 720K 3 5 1 44M 3 5 2 88M 3 5 255 BIOS 3 2 4 Super IO Configuration BIOS SETUP UTILITY UnBoard Floppy Controller Enabled Onboard Floppy Controller Select Enabled if your system has a floppy disk controller FDC installed on the system board and you wish to use it If you didn t install an FDC or the system has no floppy drive select Disabled in this field The Choice Enabled Disabled Serial Port1 Port2 Address Select an address and corresponding interrupt for the first and second serial ports The choice 3F8 IRQ4 2E8 IRQ3 3E8 IRQ4 2F8 IRQ3 Disabled Auto 26 BIOS Serial Port2 Mode Allows BIOS to
39. tion on the BUS concerned 6 func 6 error reporting for the BUS concerned 7 func 7 add on ROM initialization for all BUSes 8 func 8 BBS ROM initialization for all BUSes The lower nibble Y indicates the BUS on which the different routines are being executed Y can be from 0 to 5 0 Generic DIM Device Initialization Manager 1 On board System devices 2 ISA devices 3 EISA devices 4 ISA PnP devices 5 PCI devices 64 BIOS 3 9 5 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state The following table describes the type of checkpoints that may occur during ACPI sleep or wake events Vote Checkpoint Description First ASL check point Indicates the system is running AC in ACPI mode AA System is running in APIC mode 01 02 03 04 05 Entering sleep state S1 S2 S3 54 or S5 10 20 30 40 50 Waking from sleep state 51 52 53 S4 or S5 Note Please note that checkpoints may differ between different platforms based on system configuration Checkpoints may change due to vendor requirements system chipset or option ROMs from add in PCI devices 65 BIOS This page is intentionally left blank 66 Appendix Appendix Appendix A I O Port Address Map Each peripheral device in the system is assigned a set of I O port addresses which also becomes the identity of the device
40. to enter the password A message will confirm the password will be disabled Once the password is disabled the system will boot and you can enter Setup freely PASSWORD DISABLED When a password has been enabled you will be prompted to enter it every time you try to enter Setup This prevents an unauthorized person from changing any part of your system configuration Additionally when a password is enabled you can also require the BIOS to request a password every time your system is rebooted This would prevent unauthorized use of your computer You determine when the password is required within the BIOS Features Setup Menu and its Security option If the Security option is set to System the password will be required both at boot and at entry to Setup If set to Setup prompting only occurs when trying to enter Setup Boot Sector Virus Protection Enable Disable Boot Sector Virus Protection AD BIOS 3 6 Advanced Chipset Settings 3 6 1 North Bridge Chipset Configuration BIOS SETUP UTILITY Boots Graphic Adapter Priority PEG PCI Boots Graphic Adapter Priority Select which graphics controller to use as the primary boot device Internal Graphic Mode Select Select the amount of system memory used by the Internal graphics device 43 BIOS Video Function Configuration BIOS SETUP UTILITY DUMT Mode Select DUMT Model DVMT Mode Select The Choice FIXED DVMT Default Both DVMT F
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