29000 MICROPROCESSOR ANALYSIS PACKAGE
Contents
1. 7 15010110 RDD SP SP 10 5 90009 7 15607500 RDD GR96 GR 1 17 00h eeeescse 0000080 JMP I LRO 0009 94 564 1817F IRSLEU 00004 1008h 655 GR 127 00099 88 ROFFOOFS 00009 1 15798814 RDD GR121 LR10 14th 90009 20 16007879 LORD 00 h GR 120 GR 121 00009 24 16007978 LORD 0 3098h GR121 GR 120 99909828 917779FF RND GR 119 GR121 FF amp h 90 194980 917779FF 00009 2 1 008378 5 9 009h LR3 GR120 80000008 1E008378 90009 30 15798818 ADO 08121 1810 189h 90909 34 16007979 LOAD 86 68 121 68121 80000008 16007979 00009E38 16007979 LORD 80 00 h GR 121 GR 121 90008 917879FF RND GR 120 GR 12 1 FF h 99194944 917879FF 80099648 91797701 AND 68121 08119 01 80000008 91797701 90009 44 61797900 CPEQ GR 121 68121 00h 00008 48 9 14 JMPT GR 121 00009E98 h 00099 4 91797780 RND 68121 6811 80h 90009 63797900 Figure 6 6 Cycles Display Window ID Last crm C 22125 18 2 2144 20919 Mnemonic 20089 64 43535653 S Fetch CPNEQ GR121 LR6 GR 121 00011 90999 68 8 904 S Fetch 08121 00009C78 h 00012 9 0009 6 20409101 S Fetch NOP 00014 99909 28 15010110 000024 S Fetch ADD SP SP 10 h 00015 90099 7 15607500 S Fetch ADD GR96 GR 1 17 0028h 00016 99009 80 00980 S Fetch JMPI LRe 00017 99999 84 5641817 OOQQFFFF S2. a 84 000 1 46 1 09 03 0 2 001 _ Ti 45 JO9 05 CHO3 2 002 __ 1 50 409 07 1 2 11 43 09 09 2 2 004 1 39 JO9 11 CHOA4 2 005 11 49 09 13 6 2 006 11 47 09 15 6 2 7 007 12 37 JO9 17 CHO7 2 87 008 11 31 409 19 2 A7 DO9 __ 1 27 09 21 9 1 2 B8 DiO T1 33 J09 23 CHiO 2 8 Di 71 29 1409 25 2 5 5 Table 5 1 Cont d IPGA Signa Cable ___ Channel f Data Pin lof 29000 Conductor Pin CLAS 4000 Bd f 222 9 1012 X 71 37 J10 O3 CHI2 2 1013 T1 35 310 05 2 12 50 410 07 12 48 J10 09 2 46 J10 11 CH16 J J J Ala NIN Aja 17 12 44 J10 13 CH17 72 40 1310 15 CH18 m e 3338833 12 42 12710 19 CH20 10 21 21 10 23 CH22 10 25 CH23 11 03 24 J T J J J J 72 23 1711 05 CH25 J J J J J N 4 41 41 41 4 m N 11 07 11 09 27 11 11 28 11 13 29 411 15 CH30 11 48 H32 03 21 03 23 04 03 CH36 04 05 04 07 04 09 04 11 04 13 04 15 04 17 04 19 04 21 04 23 13 35 1 04 25 13 37 305 03 11 28 J05 05 73 31 305 07 13 33 405 09 13 29 2705 11 12 39 05 13 T3 27 05
3. 8 2 ci 00019 C Sample Address Code Data Status Mneaonic 00009 64 62798679 90009 68 RCOQ7904 090009 80009 6 70400101 99009 79 RSFESOG4F COCO3FFF 000099 78 15010110 990024 90009 7 15607500 09999 880 COOGOQ080 00009 84 5641817F 0809 88 ROFFOOFS SE IC 15798814 90009 20 16007879 00009 24 16007978 00009 28 917779 00009 2 1E008378 00009 30 15798818 00009 34 16007979 00009 38 16007979 00009 917879FF 08009 49 91797701 00009 44 61797900 00099648 RCOO79 14 00029 4 91797780 09009 50 63797900 00009E98 61798600 09099 9 RCO0790R 990909 7040010 09909 844 RSFDGOFE 0089 4 15888801 900006FF CPNEQ GR121 LR6 GR 121 JMPT GR 121 ee esc7esh NOP ADD SP SP 10 ADD 6896 GR 1 17 0083h LRO RSLEU 00004 19085 65 1 68127 RDD GR121 LR10 14 LOAD 9 30h GR120 GR121 LORD GR121 GR 120 RND 68119 GR 121 FFth STORE 0908h LR3 GR 120 ADD 08121 1810 18 h LOAD 0 009h GR121 GR121 LORD 9 0 h GR121 GR 121 AND GR 120 GR121 FF h AND 08121 08119 01 68121 68121 JMPT GR 121 AND 68121 68119 CPEQ GR 121 LRG 00h 5 GR 121 090009 4 N 0000 NAN NANANA NNN NN NNNNA NANN ADD LR8 LR8 0 19h Figure 6 9 No Read Write Data Display Window 6 9 1 171 5 __ gt 21 406 BAC 1 041
4. _ 74 14 4 12 _ 26 A_CHi 26 744 11 CLOCK BD 5 2 5 ev 8 MODEL PART NUMBER CLAS 4808 0192 0351 58 11729789 SHEET 1 OF 2 8 1 D 1 F i T 4 38 29 P4 21 4 22 57 P1 3 4 23 P4 1 BLACKIGND1 1 1 P4 24 P4 2 P4 25 P4 3 P4 26 24 4 H2 1 P4 5 GREENL 5 2V1 1 2 We e P4 6 W2 3 P4 7 7 P4 8 2 28 P2 25 P2 26 4 19 4 20 H1 1 u1 e 1 3 P K4KHYB 02 03 03 04 04 05 5 06 06 IN IN1 1 1 IN INe IN3 IN3 IN4 4 INS 9 ev THRESH 5 GND 22 2 4 2 18 2 28 P2714 2 16 12 2 19 2 8 gt P2 6 P2 4 i Pe e 6 12 MODEL CLAS 4 29000 MAP Multimodule Clock Board Schematic Diagram Sheet 2 of 2 wh GOULD pesien e DHS NO REY 808 8192 8351 18 58 I 17 26 13 5 EA 11 ic T1i6 759 925 84 13 18 3 Ic P15 gt I es 1e eT ic 812 DDE 14 12 16 gt 80 12 13 1c P172 gt _ gt 18 13 ic Lie 75 10 010 T_T e6 Te 1 K16 EA 214 172 ic kiz gt _ gt ei 7e 1c J12 Do gt 47 1c J15 oI of 43 72 1 His CO
5. 1 22 312 19 90 1182 IT7 INTRNO T1 21 311 19 32 2 06 INTRN1 11 05 1 11 21 2 2 T1 03 _ 11 23 34 2 05 INTRN3 71 09 311 25 35 2 08 IBREQ T1 23 706 19 68 1l 09 IREQ T1 17 406 21 6 9 1l 015 _ 2 21 312 21 45 2 04 IBACK 1 04 J06 23 CH70 1 __ 1 06 1712 23 46 T1 1 12 J12 25 CH47 111 13 __ 06 25 71 DY CH91 72 MEN 4 51555 00 jN D 4 i gt D lolo I r r J ain NID joi 2 2 CH73 16 1 T3 16 1 07 07 T12 5 T2 12 J13 03 DS 14 T2 15 1907 09 U16 2 T3 02 307 13 RANT __ 1 14 J07 15 CH78 1 PO3 PWRCLK 71 20 913 05 49 2 R10 __ 2 16 J13 07jCHO0 2 Ui10jPIA 12 02 jJ07 17 CH79 1 4 c 5 7 Table 5 1 Cont d PGA Signal Cable ___ Channel 29000 Conductor Pine CLAS 4000 Bd f IRR VDO NODI RUNE 911 R W T2 04 J13 09 CH5 11 R01 3 01 DAE 113 STATO T2 18 2 25 2 22 2 19 J07 19 CH80 1 24 313 19 1 24 T3 07 J13 23 IRO7
6. 49 T2 1 617 of 1 616 52 7 28 T2 re F17 fF 28 173 16 615 De 46 1e E17 DDED rc d tonto ef 36 18 gt 1c pi gt 75 34 13 1c c12 DD 7 48 72 1c 312 oe 44 78 16 015 gt _ gt 41 Te E 1C a3 198 48 11 21 2 IC C4 132 41 11 21 25 IC C3 191 34 11 Co C seri IC B1 CT 26 71 120 6 82 71 C 47 12 CS Cere TP 43 13 iei 0015 7 1 201 545 IC E1 IC F3 515 2 401 43 2135 oP HE 37 19 63 lt p 1c 62 31 15 61 lt 33 73 C 13s 78 27 53 ss 13 1c k2 C MC 19 15 ixi 125 2 2221 1 3 re i lt P J 17 78 CES Css CC SC 12 13 ice TPB CES C 1034 9209 46 55 11 C seni 1C C6 48 1 1 5 29 39 11 1 6 lt gt 49 11 1 CTE 42 71 Co CT 37 12 10 37 TE 31 71 re a 9 2 27 11 16 98 00 93 T1 1 8 CDE 29 71 9 7 9 CCo HV 35 11 tonio C 58 9 D 48 12 11 Coe 46 2 IC B11 CCo A 44 18 IC 0
7. 90007398 88262403 96007392 0009 90097384 90002 36 90002 36 05 000035 97 900035 0 47 000035 97 000035 47 900274 8 COCBC3 900074 57407 900074EE 82604 000074 1 884406 000974 4 36832003 000074 8 368 1 22 90002 8 D300 0002 936A 000 5 148 900035 148 990049 14 2AS8C3 900049 17 900049 18 80280 0 FETCH FETCH FETCH FETCH MRD MRO FETCH FETCH FETCH FETCH FETCH INC XCHG I NC ROR LDS CRLL m mca Ne Mnemonic BX S11 AL 160E DL AL 3 0324 1 RH DI AX DI DI BL C3 SI 1407 2807 00004917 LOOPZ 4R 00003646 LOOPZ 4A 060003648 SUB RET BL 8 514 31 Figure 3 2 Typical Disassembler Display Window 3 1 Disassembly Processing When the Disassembler Display Window is entered for the first time the contents area of the window is empty and a pause occurs for completion of disassembly processing before the window is filled with disassembled data During this time a Status Box will indicate progress of the disassembly If the user wishes to abort the disassembly hold down the Apple key and type a period The disassembler will present disrupted data on the screen A spinning cursor is displayed to the user while the disassembler is busy decoding the data for display The spinning cursor is
8. CR indicating the end of the record One symbol is used per line for as many lines as are required to express the complete symbol table An example Symbol Table File prepared by the user with standard text in the required format is shown in Figure 2 3 iRddress Symbols E 6 lines inch EE Test Bit Ox 14342 Set Flag OxFFC18338 OxFFFFFFFF Clear Oxffcil9b50 Oxffffffff Get Param 0 19 40 Figure 2 3 Example Symbol Table File Symbois may be used for either the Address Field or Status Field Sample files for each symbol type are included on the diskette that is supplied with the system Address Symbols Figure 2 4 are used to add labels to Disassembler displays as described in Chapter 3 Symbol Table for IAddress Symbols value Test Bit FFC18324 Set Fiag jCleor Rea 19850 Get Peron Figure 2 4 Symbol Table for Address 2 3 Status Symbols may be used to define Trace Control Patterns relative to microprocessor bus cycle types To use this feature the Symbol Table is either entered or loaded in the Channel Setup Symboi Edit Mode for the desired recording i e Next Last or Reference The selection of Next is normally used The desired symbol can then be selected in the Trace Control Pattern Definition window by double clicking the mouse on the Status Patter
9. E WARN dic 1C T85 fep c Lo ase ic 11 55 ui 16 115 1 88421 9 4 1c Ee3 IC M15 IC 12 15 IC U81 IC M983 16 017 10 154 3 CALL ABOVE PINS ARE 5 5 2 IN TARGET SYSTEM NO RESISTOR IN BETWEEN 85 48 T1 58 13 87 88 11 26 11 86 13 1 83 C T 1 18 CL wc 10 011 IC 2154 wc 1 wc CALL ABOVE PINS ARE TIED TO THE GND IN TARGET SYSTEM PIN NUMBER 084 IS THE ALIGNMENT PIN Figure 6 12 29000 MAP Probe Board Schematic Diagram Sheet 1 of 1 Page 6 13 m GOULD DESIGN amp TEST TITLE RMe9808 PROBE BOARD SCHEMATIC MODEL PART NUMBER 0583 8192 8388 ET 5 6 gt
10. 1 Typical MAP Components Included in this manual is a microprocessor to logic analyzer pinout diagram microprocessor to logic analyzer connection data screen displays of preprogrammed menus and screen displays of captured data presented in various disassembled formats HOW TO USE THIS MANUAL The content in this manual is organized to present Standard MAP Features in Chapters 1 through 3 and Unique MAP Features in Chapters 4 through 6 Standard MAP Features The Standard MAP Features Chapters 1 through 3 describe common characteristics of the MAP package which are the same for all microprocessor types The information presented in these chapters is intended to guide the user through the standard operating capabilities of the MAP If specific information is needed for a particular microprocessor type refer to information contained in Chapters 4 through 6 The Standard Features include the following types of information Overview of MAP Hardware and Software Components Chapter 1 Loading and Invoking the Disassembler Chapter 2 1 1 Analyzer Setup Chapter 2 Disassembler Operation Chapter 3 Selecting Format Options Chapter 3 Realignment of Data Screen Chapter 3 Configuration Options Chapter 3 Unloading the Disassembler Chapter 3 Unique MAP Features The Unique MAP Features Chapters 4 through 6 describe microprocessor dependent characteristics of the MAP Package which are different for each microprocessor
11. 15 1 10 775 ERR 17 312 21 CO 12 23 45 es ie MSERR 2 12 797 187 W Pi 28 85 13 p2 16 gt 2 04 CS 7 1 LO EET p 11 318 7 51618 P7 15 315 STATI 25 gt I I 17 519 19 413 1 85 J14 519 112 0 4 1 83 84 CH94 85 84 CH93 T 84 4 CH91 gt 92 04 4 p H 1 REVISIONS sev ECO DESCRIPTION DRHH CHKD APVD DATE 07 712 15V PO4 23 5 E t P84 24 C1 84 25 84 26 2 GAD s 4 22 P CONN 31 214 ALL EVEN PINS 4 19 1 ARE CONNECTED TO GND Figure 6 10 29000 MAP Scrambler Board Schematic Diagram Sheet 1 of 1 Page 6 10 TITLE 29888 SCRAMBLER BD SCHEMATIC MODEL PART NUMBER REV 8192 8436 58 H 1 C D i E 5 id 18 111 18 111 B CH5 B_CH4 1 2 65 o 24 1 B B_CH4 Bana 5 11111 IN 08122 4 045 112 45 3 5 5 1 RE 128 ART gt 24 4 184 1 2 EN 5 D_CH4 IN4 Bem gt J2 4 2 5 1 D_CHS D_CH4 55 5 5 5 5 5 5 5 sev 163 gt gt 7 3 g
12. 15 027 73 48 3333 2 pary par pary par pary pary pary pary par pary pary par 4 4 pee CO I CO N C A A 2 o lt gt 10 O 4 o par 4 lt 1 36 CH38 CH39 CH40 CH41 CH42 CH43 CH44 CH45 CH46 3 47_ 3 49 3 43 3 45 5565 N 4 CH52 CH54 CH55 05 17 05 19 CH57 CH58 o o C lt c 5 6 Table 5 1 Cont d Signa Cable Probe Channe __ Ping CLAS 4000 848 IPinsjof 29000 Conductor PURNENEN NEGERI ORE UNI L1 127 ___ 73 17 305 25 59 1 12 i28 3 15 J06 03 CH60 1 M1 29 3 13 06 05 61 1 M2 130 3 11 J06 07 CH6O2 1 13 09 J06 09 CHES 1l ED BGRT 306 11 64 12 05 J12 07 5 4 eo 12 07 12 09 13 05 _ J12 11 CH40 Sera BREQ T2 13 J12 13 CH41 2 N IN N w 0 220 222212 a gt Tje O lt 1 J06 13 65 EQTO T2 14 06 15 66 T1 T2 08 06 17 CH67 DBACK CH42 13 DERR _ 1 10 J12 17 CH43 __ _ 2 DRDY T1 22 J12 19 CH44 2 IR3_ DRDY
13. 23 3096 gt IRDY P113 25 786 1 4 22 r5 19 293 21 4 a 23 83 pied 199 55 203 34 CO 03 04 pi 3s A es 304 1 36 D ez Je4 pi 3e 5 27 75 89 84 23 47 r 11 384 p3 49 22 I gt 13 304 43 79 419 15 04 p3 45 17 84 p3 39 29 115 19 304 41 21 4 ea o4 p3 35 es Je4 1 gt _ gt es ses P3 31 p3 33 o 2 E 89 195 29 779 120 11 J85 2 39 PP m 13 785 c 5 92 05 4 17 285 07 Jpdessp 5 195052 ot gos 21 p3 17 CO 2 7 25 5 pa isp 58 83 86 p3 13 gt _ 122 p3 11 2 7 e 3es 7 9 7 5 386 18 PEREN 83 87 G PS 2 BE 85 87 P3 16 87 287 2 15 gt 9218 9 07 17 SEIL 7711 307 P3 82 13 702 1 PENN 14 gt 0 15 707 pe o gt _ gt 17 097 P 19 19 702 DIN 21 2807 PIN 7 CONNECTED TO GND 14 CONNECTED TO 45V 1 21 cS IS 19 J11 CO 21 211 1 1858 23 1 9 11 25 11 1 15 2 2 S 16 79 289 P7 fy ES 09 J12 5 y IL P 11 312 pesia S p1 11 79 289
14. Analyzer will then produce data in the appropriate format for display The third method for loading the Disassembler is used when the setup is already compatible with the Disassembler The loading occurs by selecting the Load Utility menu item under the CLAS4000 empty utility menu icon see Figure 2 1 This action downloads the executable code and inserts the disassembler in the setup File Edit Control Transfer Windows II 242 3 Load Utility Figure 2 1 Load Utility Menu Icon 2 1 The fourth method is used to load the Disassembler from the CLAS 4000 Application which is accomplished as follows 1 Select Load from the File menu then select Next Setup 2 Select Load from the File menu then select Last Setup with Data timing labels and transfer 3 Select Load Utility to obtain the Disassembler Files dialog box The Disassembler Files dialog box Figure 2 2 appears after selecting the Load Utility menu item This box identifies all of the disassemblers contained in the currently selected folder x CLAS 4000F older D Disassembler D yyyyy Disassembler D 22222 Disassembler Figure 2 2 Disassembler Files Dialog Box INVOKING DISASSEMBLY PROCESSING The Disassembler is loaded and invoked by selecting the Disassembler filename from the Files dialog box and clicking the mouse on Open or double clicking the mouse on the Disassembler filename The utility
15. TRAP1 1 01 413 25 59 60 14 gt o 141414 41 41 4 4 o TOS WAR T1 07 J 14 03 CH60 EX REPRE 014 ___ 72 qi NECS a es Mialan 12 05 1 GQD ___ 1 40 A17 GND 13 50 15 610 T2 07 MO3 GD 11 26 1 700 T3 06 141 NS IEEE NE PERSE 32 25 28 22 301 TO J14 ALL ODD PINS SHORT TO GND E 27131 Chapter 6 SPECIAL OPERATING FEATURES GENERAL This chapter describes special operating features for the 29000 MAP Disassembler as related to unique characteristics of the AM29000 microprocessor Example screens are provided for Setup Display Windows and Data Display Windows Reference AMD 29000 32 Bit Streamlined Instruction Processor User s Manual INSTRUCTION PROCESSING Branch Instructions The Am29000 calculates branch addresses for direct branches both CALL and JMPx in one of two ways The first method sign extends the concatenated values of the RC and RB instruction fields shifts the whole thing left two bits 32 bit word alignment and adds the result to the current PC The second method zero extends the concatenated values of the RC and RB instruction fields and shifts the whole thing left two bits 32 bit word alignment to produce an absolute addre
16. The format can be modified by the user without affecting disassembly processing but any deletion from the base setup parameters will render the disassembler unusable CLAS 4000 Resource File The Resource File contains all of the Disassembler Specific Macintosh code and resources to initialize the Disassembler Parameters an About Box and an optional Disassembler Parameter Box Sample Files The Sample Files contain examples of recordings that are unique to each Disassembler These files are provided to demonstrate the capabilities and operating features of the Disassembler The Sample Data File contains a recording of state data The associated setup parameters are included to allow the user to manipulate the recorded information The Sample Timing File contains ALL of the available channels from the probe with pin numbers and timing labels e g A7 DACK in place of Status 7 This is an asynchronous recording intended for timing evaluation only and is not used for disassembly The Sample Label File presents a table which contains at least four labels e g Reset Begin Init and Idle for the code address group The Sample Symbol File provides status information decoded for microprocessor cycle periods which can be used for pattern definition Using the Disassembler The disassembler evaluates object code recorded from the target system and displays this information in a pseudo assembly language form The displayed informa
17. VIEW 21 9 6 3 9 9 100 eoo 5 6 6 9 9 9 69 9 9 6 9 6 6 9 6 9 9 9 0 7 44640640606 0 0 0606 9 9 6 8 9 Figure 4 2 29000 Microprocessor Pin Locations 4 3 Chapter 5 INSTALLATION SCRAMBLER BOX TO TARGET SYSTEM CONNECTIONS The 29000 microprocessor chip must be removed from the target system and the Probe Adapter is installed in its place The microprocessor chip is then inserted into the probe adapter via the Zero Insertion Force ZIF socket The Probe Adapter is connected to the Scrambler Box with three attached cables as shown in Figure 5 1 The Probe Adapter contains one jumper connection W1 which is described in Chapter 6 see description of INCLK Signal Loading Procedure Use the following procedure to connect Scrambler Box to the target system 1 Remove the 29000 microprocessor chip from target system socket and install the base of probe adapter into the target system socket Observe the location of pin A1 on probe adapter which must mate with pin A1 on the target system socket for correct alignment of pins 2 Install the microprocessor chip on probe adapter via the ZIF socket Ensure pin locations on the microprocessor chip are aligned with corresponding pins on the probe adapter 3 Verify the three ribbon cables from scrambler box are securely fastened to probe adapter at connectors T1 T2
18. also displayed if a new recording is taken while viewing the current disassembly display The old contents of the screen will remain visible until the screen is updated with the new decoded data To avoid having disassembly processing occur when it is not needed the user can simply close the disassembler window If it is suspected that noise causes errors to occur in a data recording increase or decrease the threshold voltages beyond the noise levels to remove the disturbance The disassembler also disassembles data on the screen when a message is received that the format patterns have been changed This condition would occur after the user loads another symbol table into the Channel Setup Symbol definition screen or when a pattern is edited from the list It precedes the disassembly by downloading the symbol table The disassembler columns may be moved by clicking the mouse on the column heading and shifting in the desired direction However the disassembler columns can not be reordered otherwise this window operates in the same manner as the state display The display pane splitters operate in the same manner as well as the cursors the markers and most of the menu commands Using Disassembier Options Menu When the Disassembler Display Window is entered the Options menu item Figure 3 3 is added to the menu bar The Optlons menu contains choices for selections that are used to manipulate the Disassembler Display Window as described in s
19. are ANDed on the scrambler board for this contingency and the result is available on Channel 93 By ORing this signal with the target system clock the Address Latch signal occurs only during the appropriate part of the address cycle The alternate Clock Setup to recognize Pipeline and Burst access for both Instruction and Data is shown in Figure 6 4 6 4 To use this signal in the clock setup 5 Volts must be supplied to the scrambler board via the attached power cord provided with the MAP Package The 5 Volts can be supplied by the user s power source or by the optional SCSI Port Expansion and MAP Power Module on the CLAS 4000 Additionally the CDA signal is available on Channel 94 for clocking the write cycle to a coprocessor This signal may be either ANDed or ORed with the master clock depending upon how this signal is used in the target system INCLK Signal Loading Some target system configurations may experience input loading of the INCLK signal which is supplied to Analyzer channel 47 of Data Board 2 A single position jumper connection W1 is located on the Probe Adapter Removing this jumper allows the user to disconnect the INCLK signal from the MAP 6 5 EXAMPLE SETUP DISPLAY WINDOWS Example displays for Channel Setup Clock Setup and Trace Setup are presented below Channel Setup 29000 Nexut DONNEES Radix Channels Polarity 7 Clocked by M
20. is used to specify operating modes of the target microprocessor or to provide the value of internal registers which cannot be determined from recorded data This information is described in Chapter 6 when required for a specific Disassembler UNLOADING THE DISASSEMBLER The Disassembler is unioaded by clicking the mouse on the Unload Utility menu item on the icon menu bar See Figure 3 1 This action will cause the Disassembler to unload The Setup information is purged from the CLAS 4000 and the Utility icon becomes grayed to indicate the utility is inactive setup containing a disassembler is loaded on top of another disassembler the old one is automatically unloaded 3 5 Chapter 4 29000 MAP SPECIFICATIONS PHYSICAL DIMENSIONS AND WEIGHT Height Width Depth Cables Weight 2 5 inches 6 4 cm 8 5 inches 21 6 cm 9 25 inches 23 5 cm 13 5 inches 34 cm long 3 4 155 1 5 kg with Probe Adapter and attached cables ELECTRICAL CHARACTERISTICS Loading Signal Inputs Input Impedance Probe load for all signals except DREQN and IREQN is 1 megohm shunted by 8pf Maximum current for signals is 5uA Probe load for DREQN and IREQN is one TTL for each signal Loading Ground Reference Input Input Resistance Ground Difference Immunity POWER Supplied from CLAS 4000 MAP COMPONENTS Less than 1 ohm referenced to target system ground and approximately 18K ohms referenced to logic analyzer grou
21. type Refer to these chapters for detailed information about connections for MAP components microprocessor pin assignments and unique disassembler operations for the microprocessor type The Unique Features include the following types of information MAP Components Chapter 4 MAP Specification Chapter 4 Target System Connections Chapter 5 CLAS 4000 Equipment Connections Chapter 5 Variations in Disassembler Operation Chapter 6 MAP HARDWARE COMPONENTS Hardware interface Requirements The MAP hardware components consist of the Microprocessor Probe Adapter which is used to interface target system pins and MAP Scrambler Box with attached cables which is used to interface CLAS 4000 probe connections to the microprocessor probe adapter These components are used to connect pins on the target system microprocessor to assigned analyzer channel inputs on the CLAS 4000 The MAP hardware interface allows the CLAS 4000 to capture data related to bus activity directly from the target microprocessor pin location SCSI Port Expansion and MAP Power Module The MAP Scrambler Box may require input power supplied from the CLAS 4000 chassis This power interface is provided by the SCSI Port Expansion and MAP Power Module Product No A70042 The SCSI module contains four conditioned 5Volts power output connectors for interfacing the MAP hardware and other accessories The module also allows multiple SCSI devices to be connected in a d
22. 000 Fetch 08121 00012 99099 6 70490101 S Fetch 99914 15010110 000024FF S Fetch SP SP 1091 00015 15607500 Fetch GR96 GR 117 00th 800 16 Co000080 Fetch LRO 900 17 56418 17 Fetch 00004 10095 652 1 6 127 90019 15798814 Fetch GR121 LR10 1485 00020 16007879 Fetch 0 00 GR 120 GR 121 00021 16007978 Fetch 00 h GR 121 GR 120 00022 88009628 917779FF Fetch GR119 GR 121 FFh 00024 9E2C 1 008378 Fetch 0 00 h LR3 GR 120 90026 09009 0 15798818 80000064 S Fetch GR121 LR10 1881 90027 00009 34 16007979 80000064 S Fetch 0 008 GR 121 GR 121 00029 00009738 16007979 00000001 S Fetch 00 h GR121 GR 121 00030 917879FF 00000001 S Fetch GR120 GR 121 00032 99809648 91797701 80000008 S Fetch GR121 GR119 019h 90034 90009644 61797900 80000007 S Fetch GR121 GR 121 80 h 90035 00009 48 914 80000007 Fetch 08121 00009 98 00036 00009 4 91797780 80000067 S Fetch GR121 GR119 80 h 00038 0290009 98 61798600 8000007F 5 Fetch GR121 LR6 00039 00009 9 80002FFF S Fetch GR 121 00009EC4 h 00040 00009 70400101 800 S Fetch 90042 QOOO9EC4 15888801 Fetch LR8 LR8 019h 00043 45798801 Fetch GR121 LR8 0 1th 00044 7906 Fetch GR121 00009DE4 h 90045 99999 00 81798804 Fetch GR121 LR8 0421 90946 63798909 Fetch GR121 LR9 0000060000000 0 006 000 0 ei pras
23. 12 CCo 48 Ic 312 CC A IC 813 lt 42 Te 1 14 C lt es 1e recre 225 10 19 22 IC B14 C E CO 10 13 34 T2 pene 0 13 10 815 lt 22 1c 516 C gt 42 13 cis 21 18 ums aea jester a jode REEL g just pia ESL IC T9 SN 15 T1 IC T8 Sie 19 T1 ic re BREQN 8 1 IC R2 EUR 16 T1 10 2 lt ES 03 73 85 T3 DBREGN IC R9 13 Te DREQN Po 14 12 DREQ 16 012 is 88 DEAK 1 n DERRN 088 C ieri 21 25555 IBREGN 08 23 1 IC U9 REST 12 1 16 015 0 ic u4 Ic u3 D DEREN CMT gt 4 TROY NS ALT 13 1 16 11 C19 4 4 18 ope NS 22 3 IC N16 SEO gt 16 T3 16 12 een aces 12 16 714 IC N834 xir Us gt e4 Ti REVISIONS ETIN ECO DESCRIPTION DRWN CHKD APYD DATE ic uge 14 11 1 oT lia tnm qe To ic ute 522 75 es re 1 881 EET lt 21 13 STATO 1 113 a gt 18 2 IC U14 cA 25 T2 IC R12 SIRE 22 T2 SUP USN 19 IC N82 TESTN 82 T3 po TRAPON L 25 71
24. ASTER CLK irdy 91 drdy 90 _ ae Channels 831 800 855 853 A70 842 880 844 BSI R67 R66 Clocked by LATCH 0 LRTCH 0 LATCH 0 suscik 92 add latch i dreq 93 sysctk 92 Kal B Figure 6 3 Alternate Clock Setup with Values in Status Block 6 6 Channel Setup 29000 Nent Channels 63 832 855 853 870 polaritu Clocked by LATCH 0 syscik 92 add latch i dreq 93 susctk 92 LRTCH 2 MASTER CLK irdy 91 drdy 90 Figure 6 4 Alternate Clock Setup Pipeline Burst Access Mode Trace Control 29000 Neut Seg Tasks Simple Edge Trigger Store filtering input to Until false to true input is zPattern Then store 2048 6 more filtered inputs 2 to 65555 2048 would be 50 percent of 4K memory center trigger Then Stop Look for re entry Edge Trigger of subroutine overwriting pushes trigger 1 point left Increasing Time gt Figure 6 5 Trace Setup Trigger Sequence Display Window EXAMPLE DATA DISPLAY WINDOWS Example displays are presented for All Cycles Deletion of Non Executed Instructions Read Write Only Instructions and No Read Write Instructions Executed Disassembler Last 1125 ample Address Code Data tatus Mnemonic 00009 64 62798679 CPNEQ 08121 186 68121 90090968 8 007904 08121 00009C6C 70400101 NOP RSFES04F
25. FFCO3E28 FFC 3E2C 4048 FFCO3FE8 14420000 F400C001 24620000 492200FF 704900DC 08680003 58400000 143 0024 63FF0028 429 001 08680003 58400000 143F 002C 1 1F0020 17350024 632520030 SC40FFF8 58422000 CBFFFF 8 14420004 1 F4E0600 1 Dee2FFES SC40FFF8 58422020 CBFFFF8D ci o ___ 2 25 2 samples Data DRx CRx Label _ 141 Scode Hai t 14 idie idle idie Idie idle Wait Idle idie idie idie idle Scode Scode Scode Test Bit Scode Scode Scode Set Flag Scode Scode Scode Scode Clear Re Scode Scode Scode Get Para Scode Scode SELECTING DISASSEMBLER CONFIGURATION is Next Mnemonic r2 r 12121212 ri r3 r2 0000 r9 r2 00FF r10 r9 000C 35 r10 Set Flag r2 r0 0000 r1 r31 0024 r31 r31 0028 ri 35 r 10 5 r2 62002 Get Para r1 r31 002C r24 r31 0020 r25 r31 r2 r0 FFF8 r2 r2 2000 FFCO3E24 r2 r2 0004 L7 05 r2 M FCU ED r2 re FFF8 r2 r2 2020 FFCO3E24 Figure 3 6 Symbol Column Insertion in Data Display Window The Disassembler Config menu selection is available when the current disassembler has parameters that will not fit into the choices available above These conditions are defined inside the disassembler resource file and will vary from one disassembler to another Typically this menu
26. Fetch ASLEU 00004 100 h C655 LR 1 GR 12 90019 1 15298814 QGOQGO3FFF S Fetch RDD GR121 LR10 1488 00020 89999624 16007879 Fetch LOAD 9 00 68128 68121 00021 00009 24 16007978 Fetch LORD 00th GR121 GR 120 00022 90009 28 917779FF Fetch AND GR119 GR121 FF amp h 00023 00104980 917779FF Data Rd 00024 0009 2 1 008378 Fetch STORE 9 00 h 83 GR 120 00025 80000008 1 008378 Data Rd 00026 00089 38 15798818 Fetch ADD 68121 018 1881 00027 00909634 16087979 Fetch LORD 9 00 h GR121 GR 121 00028 80900008 16007979 Data 00029 90009638 16007979 Fetch LORD 00 h GR121 GR121 90030 00009E3C 91787SFF Fetch AND GR 120 GR 12 1 00031 068104984 917879FF Data Rd 00032 A 00009E40 91797701 Fetch 08121 GR119 01 h 80933 80000008 91797701 Data Rd 22 00034 00089644 61797900 Fetch CPEQ GR 121 GR 121 00h 90035 99809648 8 007914 Fetch 68121 00009E98 h 00036 20009 4 91797780 Fetch GR 121 GR119 8081 00038 09989698 61799600 Fetch CPEQ 68121 LRG 00h 00039 90099 9 RCOQ790R Fetch 08121 00009EC4 h 00040 99009889 70400101 8 S Fetch NOP 0 0000000000000 0000000 Figure 6 7 Delete Non Executed Instructions Display Window 6 8 1 2125 2144 8 2 1 00019 samples P ample Address Data Status Mnemonic 00010 00009264 62798679 Fetch GR 121 LR6 GR 121 900 11 90909 68 8 007904 990
27. GE FADD DADD FSUB DSUB FMUL DMUL FDIV DDI Reserved Emulation Trap Assert EMULATE Trap Status Messages The Status column messages are interpreted as follows Message U Fetch User U Data U I O UCP U Data U VO UCP S Fetch S Data SVO SCP S Data 510 5 Wr Wr Wr Rd Rd Rd Supervisor Wr Wr Wr Rd Rd Rd SUP US IRDY R W DREQT1 0 lt gt 6 3 gt DREQTO X QOxX ODx x QOxX oOx BURST MODE When the Am29000 is operating in Burst Mode it generates one address and then clocks in one or more data instruction words without changing the address If the disassembler detects Burst Mode operation it artificially generates the missing addresses Artificial addresses are marked as such by an asterisk 7 in the most significant digit The first address of a Burst is not marked in this fashion it is the actual address output by the processor and can be used to obtain the missing digit If a recording begins in the middle of a Burst Mode access the disassembler can not know how many accesses have occurred since the start of the burst therefore the generated address may be incorrect 29000 DISASSEMBLER CONFIGURATION The Am29000 Vector Area Base Register is a 32 bit register in the Am29000 that c
28. NECTIONS Procedure SCRAMBLER BOX CLAS 4000 CONNECTIONS Procedure MICROPROCESSOR PINOUTS TO LOGIC ANALYZER Page A 5 m 1 Li m M M IS IO PO IO TO fo IO IO fo DW WWW CO CONTENTS Cont d SPECIAL OPERATING FEATURES GENERAL INSTRUCTION PROCESSING Branch Instructions Trap Instructions REGISTER ASSIGNMENTS ILLEGAL OPCODE MESSAGES Trap Messages Status Messages BURST MODE 29000 DISASSEMBLER CONFIGURATION 29000 CLOCKING CONSIDERATIONS Simple Access Default Clock Setup Pipeline Burst Access Alternate Clock AR INCLK Signal Loading EXAMPLE SETUP DISPLAY WINDOWS EXAMPLE DATA DISPLAY WINDOWS ILLUSTRATIONS Figure 5 aaa Nao Table 5 1 Typical MAP Components Load Utility Menu Icon Disassembler Files Dialog Box Example Symbol Table File Symbol Table for Address Symbol Selection Table Disassembler Menu Icon for Last Data Recorded Typical Disassembler Display Window Disassembler Options Menu Go to Sample Number Dialog Box Disassembler Specific Format Dialog Box Symbol Column insertion in Data Display Window 29000 MAP Components 29000 Microprocessor Pin Assignments Scrambler Box to Probe Adapter Connections Scra
29. Publication Number 0192 0286 10 Rev A February 1990 CLAS 4000 LOGIC ANALYSIS SYSTEM 29000 MICROPROCESSOR ANALYSIS PACKAGE USER S MANUAL BIOMATION CORPORATION 19050 Avenue Cupertino CA 95014 0718 Telephone 800 538 9320 FAX 408 988 1647 Copyright 1990 No part of this publication may reproduced without written permission from BIOMATION Corporation Printed in U S A PREFACE This manual describes equipment connections and operation of Disassembler Utility software for the Gould Microprocessor Analysis Package MAP The MAP is an accessory tool for the Configurable Logic Analysis System 4000 CLAS 4000 Procedures are included in this manual for connecting MAP hardware components to the CLAS 4000 loading the utility software and invoking the disassembly operation These procedures also describe the use of menu driven display screens to disassemble information recorded by the CLAS 4000 The MAP user should be familiar with basic operating features of the CLAS 4000 driven by the Macintosh computer which uses windows icons and pull down menus to control system operations Refer to the CLAS 4000 User s Manual Publication Number 0192 0225 10 for system operating procedures If you require assistance on this product please call Gould Inc Design and Test Systems Division Customer Service on the toll free hot line number 800 538 9320 then dial 2 to contact the DTD Marketing De
30. Target Head pin connections MAP Scrambler Board pin connections and the corresponding Logic Analyzer channel connections Schematic diagrams for circuit connections are provided in Chapter 6 The following conventions are used in Table 5 1 The abbreviation GND indicates ground The asterisk character following the signal name indicates active low logic level Table 5 1 29000 MICROPROCESSOR TO LOGIC ANALYZER CONNECTIONS Signal Cable Probe Channel __ 29000 Conductor Pin amp CLAS 4000 AGERE A03 P15 A05 12 09 JO1 13 CHO5 R16 13 08 __ 101 15 A07 16 13 12 j J01 19 CHO8 26 ss 5 12 26 01 25 1 16 12 24 __ 02 03 12 12 01 302 05 J17 14 12 47 902 07 915 11 02 J02 09 CHI5 17 17 H16 A18 12 49 1 02 151 0 18 G17 A19 2 30 J02 17 CH19 G16 20 2 28 402 19 20 17 21 13 28 02 21 21 G15 22 T3 46 302 23 22 1 17 23 13 32 902 25 23 1 16 A24 13 24 X JO3 03 CHO4 1 1 F15 25 12 45 303 05 25 1 017 A26 13 36 03 07 1 1 E16 27 T3 30 J03 09 CH27 1 016 28 3 34 1 03 11 10 28 1 17 2 9 T3 40 J03 13 CH29 1 817 0 T3 44 303 15 30 1 A31 __ T2 41 J03 17 CH31 1l ee
31. aisy chain network to the CLAS 4000 chassis The SCSI module is optional equipment and is not included as a component in the MAP package Contact your local Gould Sales office for additional information on this component When required for MAP operation this equipment is described in the Installation Connections section of Chapter 5 1 2 DISASSEMBLER SOFTWARE The MAP software is a Disassembler Utility supplied on a single 3 5 inch diskette which contains seven types of files as follows Disassembler Executable File filename ends in BIN Disassembler Setup File filename ends in Setup CLAS 4000 Resource File filename ends in Disassembler Sample Data File filename ends in Sample Data Sample Timing File filename ends in Sample Timing Sample Symbol File filename ends in Sample Symbols Sample Label File filename ends in Sample Labels Disassembler Executable File The Disassembler Executable File contains the compiled and linked software for disassembly of a specific microprocessor type on the CLAS 4000 The file format is structured so that it can be downloaded to and executed on the CLAS 4000 This file must reside in the Disassemblers folder which is contained within the CLAS4000Folder folder Disassembler Setup File The Disassembler Setup File contains information that is unique to each Disassembler The setup information identifies the base format and clocking setup conditions for the Disassembler
32. and T3 The MAP package is shipped with these cables connected to the probe adapter however they could become loose during transit SCRAMBLER BOX WITH ATTACHED CABLES Figure 5 1 Scrambler Box to Probe Adapter Connections 5 1 SCRAMBLER BOX CLAS 4000 CONNECTIONS The clock interface cables attached to the Scrambler Box must be connected to the CLAS 4000 and input probes for the CLAS 4000 are connected to the Scrambler Box as shown in Figure 5 2 Probe connectors on top of the Scrambler Box are labeled W X Y and Z to identify the location for a corresponding analyzer probe The two Clock Probe Interface Adapters supplied with the MAP package must be installed on the Z Channel connector at Data Boards A and B These adapters are used to connect both the analyzer probe cable and Scrambler Box clock interface cable to the Z connector The two Scrambler Box Clock Interface cables contain16 pin connectors which plug into mating connectors on the Clock Probe Adapters The 100 MHz coaxial cable on the Scrambler Box attaches to a jack on the CLAS 4000 Control Board Panel The 29000 MAP Scrambler Box receives 5 Volts power input from the CLAS 4000 The power is supplied from the SCSI Port Expansion and MAP Power Module Product No A70042 This option must be installed on the CLAS 4000 chassis to power the MAP Scrambler Box for Pipeline Burst Access mode This option is not required for Simple Access mode Procedure Use the f
33. ard disk The main CLAS 4000 Application should already be present in this directory If the CLAS4000Folder already exists the Resource Setup and Sample files must be placed in the CLAS4000Folder directory The Executable file must be placed into the subdirectory of the CLAS4000Folder titled Disassemblers This is necessary because the Disassembler interface routines require a hard coded directory structure The CLAS4000Folder must be in the root directory to work properly If you are a first time user of the CLAS 4000 interfaced to the Macintosh computer refer to the Macintosh User s manual This manual describes procedures for copying files to the hard disk and using folders to organize stored information LOADING THE DISASSEMBLER There are several ways to load the Disassembler utility The first method is to double click the mouse on the Setup File in the CLAS4000Folder while in the Macintosh Desktop Window This action loads the CLAS 4000 Disassembler Setup parameters The second method is to Load the Disassembler with a setup from the CLAS 4000File Menu This should be used if the current setup is not appropriate for the disassembler The channel setup for Address Data and Status fields must be defined in the setup file in the same manner that was shipped with the disassembler otherwise the data display information will be garbled To accomplish this simply load the next setup along with that of the disassembler Running the
34. d The instruction coding for ASEQ xx GR1 GR 1 is generally considered and used as a NOP see Reference Am29000 User s Manual page 7 13 since it does not perform any action GR1 will always be equal to GR1 The disassembler therefore will display the psuedo mnemonic of NOP whenever this instruction encoding is found MESSAGES Trap Messages The messages presented below are displayed in the Comment column for lines that contain either trap instructions or the first instruction of a trap routine The messages are derived from the trap vector list in the Reference Am29000 User s Manual pages 3 45 and 3 46 Trap Message 0 Illegal Opcode 1 Unaligned Access 2 Out of Range 3 Coprocessor Not Present 4 Coprocessor Exception 5 Protection Violation 6 Instr Access Exception 7 Data Access Exception 8 User Instr TLB Miss 9 User Data TLB Miss 10 Super Instr TLB Miss 11 Super Data TLB Miss 12 Instr TLB Prot Violation 13 Data TLB Prot Violation 14 Timer 15 Trace 16 INTRO 17 INTR1 18 INTR2 6 2 Trap Messages 19 20 21 22 23 24 31 32 33 34 35 36 37 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 63 64 255 INTR3 TRAPO TRAP1 Reserved Trap Reserved Emulation Trap MULTIPLY DIVIDE MULTIPLU DIVIDU CONVER Reserved Emulation Trap FEQ DEQ FGT DGT FGE D
35. is automatically loaded into memory and initialized ANALYZER SETUP FOR DISASSEMBLY Setup Requirements The CLAS 4000 is setup for disassembly by loading a Disassembler compatible setup into the application The screens for Channel setup along with the screens for Clock setup and Trace Control are initialized with the unique information for the particular Disassembler that was loaded These screens can be altered by using the CLAS 4000 standard setup method for each screen However accurate disassembly can be assured only when the above screens contain the setup information that was downloaded by the Disassembler Additional columns of information can be appended to the right side of the Setup screen but none can be deleted Loading Symbols Symbols are loaded into the Channel Setup Edit Symbol dialog box The symbols may be either typed or loaded from a file If they are loaded from a file the file must be of standard text using the following formats Symbol String tab gt Value CR Symbol String tab 0X Hex Value tab CR Symbol String tab 0 gt Value tab Care Value CR Where Symbol String Hex Value and Don t Care Value are ASCII representations of standard Hexadecimal numbers which are no greater than the fields where they will be inserted i e 10 8 8 respectively The Care Value is optional and if used must be set to 1 for each Care Bit Each line is followed by a Carriage Retum
36. isplay window can also be manipulated either by using the scroll bars or by dragging the cursor If the display window has been manipulated by the scroll bar and the user wishes to return to the area in the recording where either cursor is located choose the Go to C1 or Go to C2 menu item to accomplish this action Go to Sampie Number Dialog Box The Go to Sample menu selection allows the user to view the display contents beginning with the sample number selected After selecting the Go to Sample item a dialog box Figure 3 4 appears so that the user may select the specific sample number NOTE The function for this selection is independent from the cursor movement merely changes the display to show the information beginning from the selected sample number The cursors remain in their original positions Go to which sample number Figure 3 4 Go to Sample Number Dialog Box The Get C1 or Get C2 menu items position the cursor to the top of the currently displayed area NOTE Entering the sample number for the squares labeled 1 or 2 is another method for repositioning the cursor locations in memory The Clear the marker data command simply clears any search compare or marker information that was previously defined by the user 3 3 The Disassembler Format command allows the user to define his preferences on such things as font size the choice to display step level data and time stamp information This command wo
37. mbler Box to CLAS 4000 Connections 29000 Disassembler Configuration Dialog Box Channel Setup Simple Access Default Clocking Scheme Alternate Clock Setup with Values in Status Block Alternate Clock Setup Pipeline Burst Access Mode Trace Setup Trigger Sequence Display Window All Cycles Display Window Delete Non Executed Instructions Display Window Executed Only Instructions Display Window No Read Write Data Display Window Schematic Diagram 29000 MAP Scrambler Board Schematic Diagram 29000 MAP Multimodule Clock Board Schematic Diagram 29000 MAP Probe Board TABLES 29000 Microprocessor to Logic Analyzer Connections vi 2 oooooo AAA oo 1 t oooo gt 49 fo PPA A 45 0 000 1400 5 5 Chapter 1 INTRODUCTION OVERVIEW This manual describes the Gould Microprocessor Analysis Package MAP The MAP is a tool that expands the test debug capability of the Configurable Logic Analysis System 4000 CLAS 4000 The MAP disassembles captured information to convert executed object code into mnemonic code and display the result on the video screen The MAP contains interface hardware and software components to be installed on the CLAS 4000 by the user Typical MAP hardware is shown in Figure 1 1 POWER CABLE Figure 1
38. mbler Display Mode The display modes are filters that specify what portion of the disassembled data is displayed Typical display modes are as follows Display All Bus Cycles Delete Non Executed Instructions Delete Read Write Data Show Executed Code Only removes both non executed instructions and read write data 3 4 ENABLE SYMBOLS Upon selecting the option for Enable symbols in display Display Window between the Status and Mnemonic column that is titled Labels a column is inserted in the disassembler The first column Address must be in Symbol Display Mode and a Symbol Table must be loaded The symbol is inserted at locations where an address matches a symbol from the Symbol Table or when a decoded instruction references a specific Address see Figure 3 6 NOTE ASample Address Symbol Table is included on the diskette supplied with the system S Disassembler LR 1 Lest Sample C1 00000 00001 88863 80004 89885 00006 00008 00009 00010 00012 00015 00016 000 17 00019 00020 00022 2 00026 5 ee 725 229 2409 404 2906 64466 9 90041 Address DRddress Code 9978 09790 FFC 9794 FFC 18324 FFC 18328 FFC 1A32C FFC 1A338 FFC 1A33C FFC 18340 FFC 18344 19850 19854 19858 FFC 19 40 FFC 19 44 19 48 19 4 19 50 4 FFC04040 FFC04044 24
39. n or using the Edit button to obtain the Symbol Selection Table shown in Figure 2 5 Symbol Selection Table Test Bit set Flag Get OM ES XXXXXXXX XXXXXXXX COTO XXXXXXXX Kd t Figure 2 5 Symbol Selection Table 2 4 Chapter 3 DISASSEMBLER OPERATION DISASSEMBLING THE DATA After loading is completed the empty utility icon is replaced with the Disassembler menu icon Figure 3 1 and its associated menu selections Figure 3 1 Control Transfer Windows Options HHHHH Disassembler ees ecc Reference 0999949990004 099 009000404 000000 000 000 000 000099 990 Unioad Utility Disassembler Menu Icon for Last Data Recorded The Disassembler Display Window Figure 3 2 presents typical disassembled information The display window is entered by selecting either the LAST or the REFERENCE item from the Disassembler menu This selection determines what data is to be disassembled Selecting the Title Choice from the Disassembler Menu displays the revision level of the Disassembler software a File Edit Control L o T Sample EN CM M 00035 90036 00037 00038 99038 00041 90042 09943 00944 00045 00045 90045 00045 90046 90046 90047 90048 90049 89059 9005 1 00052 90053 90053 90054 90054 90055 000030 4 20 160E 16 90097394 1 188 90007398 2403
40. nd 0 25 Volt maximum between logic analyzer ground and target system ground May require SCSI Port Expansion and MAP Power Option to provide 5 Volts DC The 29000 Microprocessor Analysis Package Product No A70043 consists of the following components which are shown in Figure 4 1 29000 Scrambler Box with attached signal cables and power cord Probe Adapter Assembly Two Clock Probe Interface Adapters One 29000 Disassembler Diskette Users Manual 4 1 MICROPROCESSOR CLOCK PROBE PROBE ADAPTER INTERFACE ADAPTER SOFTWARE DISKETTE P N 0192 0380 10 P N 0192 1055 10 P N 0192 0480 10 USER S MANUAL P N 0192 0286 10 Figure 4 1 29000 MAP Components 29000 MICROPROCESSOR PIN ASSIGNMENTS Pin locations for the 29000 microprocessor are shown in Figure 4 2 Signal names for pins may be obtained from the reference manual mentioned below or from Table 5 1 Additional information including cross references for microprocessor machine code and instructions may be obtained by consulting the following reference manuals issued by Advanced Micro Devices 29000 32 Bit Streamlined Instruction Processor User s Manual 29000 Streamlined Instruction Processor Publication No 09075 A B C T U 290 2 09 9 9 90 3 9 6 9 9 41 8 9 51 9 8 e 0 9 9 7 6 9 8 9 19 29000 9 99 9 8 9 9 BOTTOM
41. ng basic operating capabilities Capture of Address Data and Control signals associated with microprocessor program execution and display cycle by cycle or summary by instruction sequences Trigger on combinations of Bus Cycle Types Input Output Memory Read Write Instruction Fetch and Interrupts Display captured information in various listings using manufacturer s software architecture e g generate a listing with non executed instructions deleted or generate a listing with read write status deleted etc 1 4 Chapter 2 LOADING AND INVOKING THE DISASSEMBLER COPYING FILES TO HARD DISK General The CLAS 4000 application is driven by software contained in the folder named CLAS4000Folder This folder is installed on the Macintosh hard disk to implement CLAS 4000 operations The utility diskette supplied with the MAP components contains the CLAS4000Folder with the Executable File Setup File Resource File and Sample Files described in Chapter 1 These files are used to control disassembly processing for the CLAS 4000 These files must be copied to the hard disk as described in the Installation procedure which follows The contents of the diskette must be placed in the correct directories on the Macintosh before the user can boot the application Installation If this is the first CLAS 4000 utility to be installed i e there is no CLAS4000Folder on the hard disk copy the entire foider to the root directory of the h
42. ollowing procedure to connect the the Scrambler Box to the CLAS 4000 1 Ensure AC power is off at CLAS 4000 prior to connecting the Scrambler Box 2 Remove analyzer probe cables from Z Channel location on Data Boards A and B Install a clock probe adapter at each of the Z Channel connectors Connect probe cables to the adapter 3 Connect two clock input signal cables and coaxial cable from Scrambler Box to CLAS 4000 as follows a Locate the clock interface cable which is labeled POWER GROUND THRESHOLD Connect this cable to the mating connector on Clock Probe Adapter at Data Board A NOTE This cable supplies signals that control the synchronization of clocks and must be connected to the adapter at Data Board A b Connect the other clock input cable to Clock Probe Adapter at Data Board B Connect the 100 MHz coaxial cable to one of the CLK OUT jacks on CLAS 4000 Control Panel NOTE The 5 Volt power requirement for scrambler box is determined by the clocking scheme setup Refer to description of 29000 Clocking Considerations in Chapter 6 If power is not required for the user s setup omit Step 4 If power is required perform Step 4 4 Connect the Scrambler Box power cord to one of the 5 Volt SCSI connectors at lower front panel of CLAS 4000 chassis 5 Remove flying leads and grabbers from analyzer probe connectors if attached and connect seven probes W W X X Y Y and Z into corresponding Scrambler Box locations a
43. ontains the upper 16 bits of all trap vector addresses The 29000 Disassembler allows the user to specify the value currently being used by the 29000 processor to allow accurate tagging of trap execution To change from the default trap vector of 0 click the mouse on the Disassembler Configuration menu entry under the Options menu Figure 6 1 when a disassembler window is active Enter the most significant 16 bits of the desired trap vector Note that the lower 16 bits are always zero as indicated by the 4 0 digits to the right of the 6 digit numerical entry field The trap vector value is entered in Hexadecimal notation Am29000 Disassembler Configuration Uector firea Base 10000 Hexadecimal Vector Fetch 9 Direct O Indirect Figure 6 1 29000 Disassembler Configuration Dialog Box 29000 CLOCKING CONSIDERATIONS Simple Access Default Clock Setup The 29000 operates in various modes which may require alteration of the clock setup condition The default setup condition supplied on diskette is intended for simple access for both instructions and data In this default mode all Address Data and Status is latched on the rising edge of the target System Clock Channel 92 and is mastered by ANDing signals for DRDY Channel 90 and IRDY Channel 91 _ Pipeline Burst Access Alternate Clock Setup For Pipeline or Burst access it is necessary to latch the appropriate addresses during the proper IREQ or DREQ cycle These signals
44. partment The content in this manual reflects the MAP software level which was valid at the time of publication but is subject to change without notice Copies of this manual and other Gould Inc Design and Test Systems Division publications may be obtained from the Gould Inc DTD sales office or distributor serving your locality Macintosh is a trademark of Mcintosh Laboratories Inc iii Chapter CONTENTS 1 INTRODUCTION 4 29000 OVERVIEW HOW TO USE THIS MANUAL Standard MAP Features Unique MAP Features MAP HARDWARE COMPONENTS Hardware Interface Requirements SCSI Port Expansion and MAP Power Module MAP DISASSEMBLER SOFTWARE Disassembler Executable File Disassembler Setup File CLAS 4000 Resource File Sample Files Using the Disassembler BASIC MAP OPERATING FEATURES FORDING AND INVOKING THE DISASSEMBLER COPYING FILES TO HARD DISK General Installation LOADING THE DISASSEMBLER INVOKING DISASSEMBLY PROCESSING ANALYZER SETUP FOR DISASSEMBLY Setup Requirements Loading Symbols DISASSEMBLER OPERATION DISASSEMBLING THE DATA Disassembly Processing Using Disassembler Options Menu Go to Sample Number Dialog Box SELECTING THE DISASSEMBLER FORMAT ENABLE SYMBOLS SELECTING DISASSEMBLER CONFIGURATION UNLOADING THE DISASSEMBLER MAP SPECIFICATIONS PHYSICAL DIMENSIONS AND WEIGHT ELECTRICAL CHARACTERISTICS MAP COMPONENTS MICROPROCESSOR PIN ASSIGNMENTS INSTALLATION SCRAMBLER BOX TO TARGET SYSTEM CON
45. rks exactly the same for both the State and Disassembler Windows The Force to object mode command re displays the current data in object format with the smallest instruction per line This is useful when the data has a break in sequence or when the recording did not start on an instruction boundary The Disassemble from top line command re disassembles data from the top display line This is used in conjunction with the Force to object mode command to re synchronize the internal instruction counter with the data flow The last two commands are designed to be used together When synchronization is lost the user should Force data to object mode move down to a probable opcode location and then return to normal disassembly mode using the Disassemble from top iine command The Disassembler is setup to allow the user to do this as many times as needed SELECTING THE DISASSEMBLER FORMAT The Disassembler Format menu presents the Disassembler Specific Format Dialog Box Figure 3 5 This dialog box allows the user to choose the desired Disassembly and Display modes The mode shown in Figure 3 5 is used to display disassembly results Disassembler Specific Format Display Mode O Display RII Bus Cycles Delete Non Executed Delete Read Write Data Show Executed Code Only Enable symbols in display Figure 3 5 Disassembler Specific Format Dialog Box Click the mouse on the assigned button to select a choice for Disasse
46. s follows a Connect W and X probes from Data Board A to corresponding W and X probe locations on right side of Scrambler Box see orientation in Figure 5 2 b Connect W and X probes from Data Board B to corresponding W and X probe locations on left side of Scrambler Box 5 2 Cone Y probe from Data Board A to Y probe location on right side of Scrambler OX d Connect Z probe from clock probe adapter at Data Board A to Z probe location on Scrambler Box e Connect Y probe at Data Board B to Y probe location on left side of Scrambler Box DATA BOARD B CLOCK PROBE ADAPTER DATA BOARD A CLOCK PROBE ADAPTER 4 W X PROBES 027 00 POWER GROUND THRESHOLD CABLE She 2 2 W X PROBES CLOCK SIGNAL DATA BOARD 8 CABLE Figure 5 2 Scrambler Box to CLAS 4000 Connections 5 3 MICROPROCESSOR PINOUTS LOGIC ANALYZER Signals for the following lines 143 total are transferred from the 29000 microprocessor in the target system under test to the Scrambler Box 32 Data Lines 00 031 32 Address Lines A0 A31 32 Instruction Lines 0 131 47 Status and Control Lines These signals are also transferred from the Scrambler Box to the assigned Logic Analyzer channel in the CLAS 4000 The list in Table 5 1 identifies the assigned Signal Name Function for each 29000 pin the
47. se on the selection button next to the desired mode see description of 29000 Disassembler Configuration The disassembler displays the calculated value surrounded by angle brackets if indirect followed by the actual eight bit vector number as a decimal number in parenthesis The Am29000 causes a Protection Violation trap to occur if the processor is in User mode and attempts to execute a trap with a vector number of 0 63 The disassembler marks such trap instructions with an exclamation point prior to the mnemonic 6 1 REGISTER ASSIGNMENTS Registers are identified by the designators IP SP GRxxx and LRxxx corresponding to the 29000 absolute register numbers according to the following table ABSOLUTE IDENTIFIER 0 IP Indirect Pointer 1 SP Stack Pointer 2 63 Global Register 2 63 64 127 GRxxx Global Register 64 127 128 255 LRxxx Local Register 0 127 ILLEGAL OPCODE If the 29000 Disassembler encounters an illegal opcode the message ILLEGAL is displayed in the mnemonic field If the opcode is legal but one or more of the operands is illegal the mnemonic will be displayed along with any operands that were legally decoded If an illegal opcode is encountered the Comment column will contain the message Illegal Operand Instructions that reference Global registers 2 63 unimplemented will correctly display the global register in question but will also be marked Illegal Operan
48. ss value The disassembler displays the calculated value instead of the actual displacement value contained in the instruction Although the Am29000 allows placement of two consecutive branch instructions the delayed branching feature of the Am29000 may produce unexpected results unless the programmer specifically designed the code to take advantage of this feature See pages 7 24 and 7 25 of the Reference Am29000 Users Manual for further information on this effect As an aid to programmers the disassembler places an exclamation point in front of any branch instruction that immediately follows another branch instruction Trap Instructions Trap instructions EMULATE ASxxx contain an eight bit vector number that is used to create a vector address in one of two ways If the Vector Fetch bit in the Configuration Register is set the vector number replaces bits 9 2 of the Vector Area Base register and the result is used to fetch the actual trap vector from memory indirect method If the Vector Fetch bit is reset the vector number replaces bits 15 8 of the Vector Area Base register and the result is used to fetch the first trap instruction from memory direct method The disassembler can not determine the state of the Vector Fetch bit directly so it assumes the bit is cleared Indirect Mode The user may select Direct Mode by first selecting the Disassembler Configuration menu entry from the Options menu and then clicking the mou
49. t J7 5 oO 5 5 GG o 2 9 IN3 ETT gt 6 4 o 5 e 6 3 2 GND P2 151 R9 186116 _ P2 17 22 1880MHZ P2 19 mi 38 11 HERES P2 21f 5 IN R P2 23 m gt 26 5 gt 14 6 J8 2 A_CH4 gt 4 5 3 non 5 2Y c o c c GND 2 GND 22 GND R60 R59 Eu dm R19 e 18811 18811 188 R33 10 111 188 B_CH3 15 8 B_CH3 7 192107 sc ds 7577 10 102 2185107 188187 T gt J7 8 _2 15 27 218 5 8 1 9 CLKIN 24 qum 26 214 28 12 14 2 25 3 RES 22 RS8 2 2 R25 REOS 22 CM 451 T 21 228 278 E Tt 278 1 22811 siaja pa 1 5 2 5 2 5 ev 5 27 5 29 5 8V 7 5 D J6 7 ses 18E111 18E111 2 J4 7 28 gt 6 e7 B_CH1 3 B CHi 2 D_CH1 bem 22 12 7 220 27 13 7 11 p J7 9 gt J6 14 13 4 4 2 p Figure 6 11 29000 Multimodule Clock Board CLCH2 Schematic Diagram Sheet 1 of 2 1 26 36 12 34 19 6 11 8 C_CH1 8 A_CH2 36 11 2 J 9 _ J5 14 15 B_CH2 GOULD DESIGN amp TEST v B CHe 45 13 D 5 9 p
50. tion conforms to the chip manufacturer s mnemonic code for the microprocessor instruction set The displayed information indicates the captured state of external bus activity that occurred at the microprocessor pins The user can manipulate the disassembled information to accomplish selective review for the various disassembly modes The Disassembier evaluates recorded data to identify the processor cycles It then attempts to identify the program flow to decode the instructions The Disassembler assumes the first recorded instruction to be valid and all other instructions to be recorded continuously If the first recorded information is not the start of an instruction or if all available information is not recorded due to selective Trace Control the disassembly may not be entirely accurate In this case it is necessary to re synchronize the Disassembler to obtain the proper display The procedure for realignment of the display is described in Chapter 3 Certain microprocessor types contain internal cache and program memory These features must be disabled to obtain a meaningful display of external microprocessor activity at the assigned pin channel location Other types of microprocessors use the external cache which eliminates the need for user intervention to enable and disable these circuit features When applicable for MAP operation this information is provided in Chapter 6 BASIC MAP OPERATING FEATURES All MAP packages provide the followi
51. ubsequent paragraphs Transfer Windows c to C2 Go to Sample 44544042 949944 924 900 009944 094 509 009 199 990 000 FOS 900000 00904 Get C1 Get C2 Find Compare Clear the marker data Edit Beference 900090580520 090099096 660006 600909004 009 094 046 00090090 0094 Display Setup 00900004 099 600 COR 990 1994900902 Force to object mode Disassemble from top line Disassembler Format Disassembler Config Figure 3 3 Disassembier Options Menu 3 2 Some of the Options Menu commands that available in the State Window display are not available in the Disassembler Window display and vice versa as described below The following commands are available in the Disassembler Window but not in the State Window Force to Object Mode Disassemble from Top Line Disassembler Format Disassembler Configuration when required by the specific disassembler The following commands are available in the State Window but not in the Disassembler Window Find Edit Reference NOTE Despite the fact that Find and Compare commands are not available in the Disassembler Window the results are displayed in the Disassembler Window whenever they are used in the State Window The user can change the displayed area of the Disassembler Window by using the GO 10 cursor menu items The d
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