usart - MICREL
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1. Baud Rate generator USART block diagram Pwo ee ee PRDAT I DATA REGISTER CPU or D STA Transmit Data Transmit Shift a Hardware mn flow i Se z ii il 1 RECEIVER UNIT n AEREE Fre pepe re ere USART INTERRUPT CONTROL RECEIVER CLOCK USART_BRR TE TRANSMITTER RATE CONTROL f 4 0 I 1 2 RECEIVER RATE I RE CONTROL I I CONVENTIONAL BAUD RATE GENERATOR L f _ r gs TRANSMITTER CLOCK USARTDIV DIV_Mantissa USART registers Offset Register 15 8 88 ReRe eeek eeke 9 fz Jw w Jw Status register USART SR Reserved a 5 z e a Reset value 0 0 1 1 0 0 0 0 0 0 Data register USARTDR Reserved Be Reset value 0 010 10 0 0 0 0 0 DIV_Fraction Baud Rate register USART_BRR Reserved DI Menini 3 0 Reset value 010 010 0 010 0 0 0 0 0 0 0 0 0 u w Im Si USART_CR1 lt X lo 5 m Control register 1 0 0 Reserved DE lt 0 5 are I Rese2. TX Procedure 1 Enable the USART by writing the UE bit in USART_CRI register to 1 2 Program the bit in USART_CRI to define the word length 3 Program the number of stop bits in USART_CR2 4 5 Select the desired baud rate using the USART_BRR register 6 Set the TE bit in USART_CRI to send an idle frame as first transmission 7 Write the data to send in the USART_DR register this clears the TXE bit Repeat this for each data to be transmitted in case of single buffer 8 After writing the last data into the USART_DR register wait until TC 1 This indicates that the transmission of the last frame is complete This is required for instance when the USART is disabled or enters the Halt mode to avoid corrupting the last transmission Single byte communication The TXE bit is always cleared by a write to the data register The TXE bit is set by hardware and it indicates e The data has been moved from TDR to the shift register and the data transmission has started e The TDR register is empty e The next data can be written in the USART_DR register without overwriting the previous data This flag generates an interrupt if the TXEIE bit is set RX Procedure 1 Enable the USART by writing the UE bit in USART_CRI register to 1 2 Program the bit in USART_CRI to define the word length 3 Program the number of stop bits in USART_CR2 4 5 Select the desired baud rate using the baud rate register USART_BRR 6
3. USART_IT_TXE ENABLE Enable the USARTy USART_Cmd USART1 ENABLE int main void RCC_Configuration NVIC_Configuration GPIO_Configuration USART_ Configuration USART_SendData USART1 c Sending the character while USART_GetFlagStatus USART1 USART_FLAG_TC RESET while 1 if USART_GetFlagStatus USART1 USART_FLAG_RXNE RESET ived ch USART R iveData USART 1 Receiving the character USART code stm32f10x_it c void USART1_IRQHandler void if USART_GetITStatus USART1 USART_IT_TXE SET write interrupt code here Remember to disable the transmission after the tx of last char if USART_GetITStatus USART1 USART_IT_RXNE RESET Read one byte from the receive data register use the function USART receive data USART_ReceiveData USART1 USART exercises Exercise 1 e Verify the TX and the RX of the char r in the USART1 of the board by shortcircuit between the RX and TX pin Check the docs to decide which pins should be connected toghether Exercise 2 e Repeat exercise 1 using the interrupt TX and RX routine Hint use the debugger and breakpoints Hint 2 implement the two interrupt separately to verify your solution Exercise 3 e Repeat exercise 1 and 2 with TX and RX of the string fyourname instead of the byte r Hint try the function sprint for a compact solution or use a for w
4. include STM32vldiscovery h include stm32f10x_exti h include misc h include stm32f10x_gpio h include stm32f10x_usart h include lt stdio h gt typedef enum FAILED 0 PASSED FAILED TestStatus Private define define RxBufferSize1 128 Private macro define countof a sizeof a sizeof a define PUTCHAR_PROTOTYPE int fputc int ch FILE f Private variables 8 1 RxBuffer1 RxBufferSize1 __ lO uint8_t RxCounter1 0x00 uint8_t NorOfDataToRead1 RxBufferSize1 char c r char received_ch Private function prototypes void RCC_Configuration void void GPIO_Configuration void void NVIC_Configuration void void USART_Configuration void Function and variables prototypes USART code Private void RCC_Configuration void Enable GPIO clock RCC_APB2PeriphClockCmd RCC_APB2Periph_GPIOA RCC_APB2Periph_AFIO ENABLE RCC_APB2PeriphClockCmd RCC_APB2Periph_USART1 ENABLE void GPIO_Configuration void GPIO_InitTypeDef GPIO_InitStructure Configure USARTy Rx as input floating GPIO_InitStructure GPIO_Pin GPIO_Pin_10 GPIO_Ini
5. 01b USART Tx Rx Transmitter The transmitter can send data words of either 8 or 9 bits depending on the M bit status When the transmit enable bit TE is set the data in the transmit shift register is output on the TX pin and the corresponding clock pulses are output on the CK pin Character transmission During a USART transmission data shifts out least significant bit first on the TX pin In this mode the USART_DR register consists of a buffer TDR between the internal bus and the transmit shift register Every character is preceded by a start bit which is a logic level low for one bit period The character is terminated by a configurable number of stop bits The following stop bits are supported by USART 0 5 1 1 5 and 2 stop bits Note 1 The TE bit should not be reset during transmission of data Resetting the TE bit during the transmission will corrupt the data on the TX pin as the baud rate counters will get frozen The current data being transmitted will be lost 2 An idle frame will be sent after the TE bit is enabled Receiver The USART can receive data words of either 8 or 9 bits depending on the M bit in the USART_CRI register Character reception During a USART reception data shifts in least significant bit first through the RX pin In this mode the USART_DR register consists of a buffer RDR between the internal bus and the received shift register Data registers External interface Control registers
6. Laboratorio di Architetture e Programmazione dei Sistemi Elettronici Industriali Prof Luca Benini lt luca benini unibo it gt Simone Benatti lt simone benatti unibo it gt Filippo Casamassimaz lt filippo casamassima unibo it gt 1 USART USART e USART Universal Synchronous Asynchronous Receiver Transmitter gt The USART is the most used serial communication interface eg PC RS232 interface IC communication interface and WiFi module interface FEATURES FLAGS e Full duplex asynchronous communications Receive buffer full e Fractional baud rate generator systems Transmit buffer empty End of Transmission flags common programmable transmit and receive baud rates up to 4 5 e Parity control MBits s Transmits parity bit Checks parity of received data byte e Programmable data word length 8 or 9 bits e Four error detection flags e Configurable stop bits support for 1 or 2 stop bits Overrun error e Transmitter clock output for synchronous transmission Noise error e Single wire half duplex communication Frame error e Configurable multibuffer communication using DMA direct memory Parity error access e Ten interrupt sources with flags Buffering of received transmitted bytes in reserved SRAM using CTS changes centralized DMA Transmit data register empty e Separate enable bits for Transmitter and Receiver Transmission complete Receive data register full Idle li
7. Set the RE bit USART_CR1 This enables the receiver which begins searching for a start bit Single byte communication e The RXNE bit is set It indicates that the content of the shift register is transferred to the RDR In other words data has been received and can be read as well as its associated error flags e An interrupt is generated if the RXNEIE bit is set e The error flags can be set if a frame error noise or an overrun error has been detected during reception e In multibuffer RXNE is set after every byte received and is cleared by the DMA read to he Data Register e In single buffer mode clearing the RXNE bit is performed by a software read to the USART_DR register The RXNE flag can also be cleared by writing a zero to it The RXNE bit must be USART what e wantto use an USART What do I need to know Which bus USARTx are connected to Look at the architecture diagram Which port are we going to use Look at the development board documentation What do need to do with this USART input output Configure for 38400 8 N 1 google this if you want to know more about the configurations USART where e wantto use USART Where can I gather these information The datasheet contains all the information we need Look at the UM0919 User Manual https www1 elfa se data1 wwwroot assets datasheets STM32 discovery eng_manual pdf USART code include stm32F10x h
8. hile loop Exercise 4 e Connect two board Send a value from board 1 to board 2 After second resend the value 1 from board 2 to board 1 After 3 second restart with value 2 etc
9. ne received Overrun error Framing error Noise error Parity error e Multiprocessor communication enter into mute mode if address match does not occur THAC BOLE TRACGED O NITAST m Cortex M3 CPU SERIA JTMSISWOIO A STO 4 Dbus as AF 24 MHz GP DMA lt gt DEE WKUP SL GPIO part A PEE ke Posi 1 75 POE lt gt criopoto EC gt 0 ariopote TS 1 channel 1 compl channel and BEKIN 1 channel 1 compl channel and BRIN S a as AF 4 channels 3 compl channels ETA ande TIM BEIN as MOSI MISD BCR WSS as AF 16 ADC channels ADC nj TINIE aan tl em wem kb el _ T 12 28 A Vop 2 0 to 3 6 Was Flash 126 KB 32 bit NRST VISA osc 1 8V to 36 OUT PER ATC ALARM OUT 4 channels gn as AF 4 channels gn 35 AF n 4 channels i aa gt TIMA 5 CK as a MOSI MISO 4 si T SCK NSS as AF st HOMI CEC RT gt HDMI CEC Ser kb sci sm suna asar cal th gt SCL SDA AF CK as AF 1 24 TIME DAC OUT as ne DACZ_OUT AF ol VDDA ai159
10. t value 010 010 0 0 0 10 010 01 01 01 0 2 Z lt u Ow u 5 STOP 5 USART_CR2 O Z O gt ADD 3 0 Control register 2 0 10 Reserved 1 0 5 16 5 5 5 3 5 j Reset value 010 010 010 0641 0 041 0 0 0 0 1 Io lo lo 2 2 lo lt lt lo a Control register 3 0x14 Reserved 5 le le 0 E je E Reset value 0 010 0 0 0 0 0 0 01 0 USART_GTPR GT 7 0 PSC 7 0 Prescaler register 0x18 Reserved 7 0 7 0 Reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Transmit data register empty pe __ fese _ Tansmisseneomaiae e free _ ECO Over emor tei ORE Pe CN Noise flag Overrun error and Framing error multibutier or ORE or FE communication USART interrupt events are connected to the Same interrupt routine e During transmission Transmission Complete Clear to Send or Transmit Data Register empty interrupt e While receiving Idle Line detection Overrun error Receive Data register not empty Parity error LIN break detection Noise Flag only in multi buffer communication and Framing Error only in multi buffer communication These events generate an interrupt if the corresponding Enable Control Bit is set _ CTS CTSIE USART DLE interrupt IDLEIE RXNEIE ORE RXNEIE RXNE PE PEIE LBD LBDIE USART
11. tStructure GPIO_Mode GPIO_Mode_IN_FLOATING GPIO_Init GPIOA amp GPIO_InitStructure Configure USARTy Tx as alternate function push pull GPIO_InitStructure GPIO_Pin GPIO_Pin 9 INIT fu NIT functions GPIO_InitStructure GPIO_Speed GPIO_Speed_50MHz GPIO_InitStructure GPIO_Mode GPIO_Mode_AF_PP GPIO_Init GPIOA amp GPIO_InitStructure void NVIC_Configuration void NVIC_InitTypeDef NVIC_InitStructure Configure the NVIC Preemption Priority Bits NVIC_PriorityGroupConfig NVIC_PriorityGroup_0 Enable the USARTy Interrupt NVIC_InitStructure NVIC_IRQChannel USART1_IRQn NVIC_InitStructure NVIC_IRQChannelSubPriority 0 NVIC_InitStructure NVIC_IRQChannelCmd ENABLE NVIC_Init amp NVIC_InitStructure USART code void USART_ Configuration void USART_InitTypeDef USART_InitStructure USART_InitStructure USART_BaudRate 9600 USART_InitStructure USART_WordLength USART_WordLength_ 8b USART_InitStructure USART_StopBits USART_StopBits_1 USART_InitStructure USART _Parity USART_Parity_No USART_InitStructure USART_HardwareFlowControl USART_HardwareFlowControl_None 5 InitStructure USART_Mode USART_Mode_Rx USART_Mode_Tx Configure 5 USART_Init USART1 amp USART_InitStructure Enable USARTy Receive and Transmit interrupts INUSART_ITConfig USART1 USART_IT_RXNE ENABLE Interrupt enable use in later exercise IIUSART_ITConfig USART1
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