UM10837 - NXP Semiconductors
Contents
1. ac E 39 38 36 35 VGA2 B 2 1 5 21 e C VGA1 8 o PTN3356 5x5 H V Sync Z 3 5 e DP INTF Nm _ gt b 9 mm in Socket DDC 12C 2 E 0 gt 12C_BUS JTAG DDC _12C CFG Fig 1 Small ULT DP VGA application board block diagram UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 4of18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual Fig 2 PTN3356 application board 2 3 PTN3356 demo board feature list UM10837 Groups of jumpers for pin configuration Other jumpers for test options One reset button Power LED Red HPD LED Green USB 5 V LED Orange USB 3V3 LED Orange One I2C header bringing out I2C pins SCL SDA GND to interface with a I2C Bird dongle to program Flash over I2C and debug One 2C header for DDC control One JTAG for FW download One micro USB connector to bring in 5 V All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 5 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual e Test point for external power supplies 3 3 V 1A e Option to power from DP connect2. NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual Fig 9 ay 2 lt il y Power by external 3 3 V power supply R45 R53 R46 RSI E gt Eg p e amp i ie U CFG2 MS_SDA CFG2 MS_SDA CFG1 MS SCL R43 2 a zZ 6 PTN3356 DEMO a BRD R1 0 P9 TP14 q O48 C44 7 Operation mode The PTN3356 can be operated in two different modes The trade off is power vs BOM cost UM10837 Buck Converter mode saves power while LDO mode saves BOM cost The microprocessor inside the PTN3356 is responsible for switching on the Buck converter This is done after the DP source finishes link training LDO to Buck hand over is done when the voltage set point is higher than that of the LDO LDO pulls up the voltage at its output By switching on the Buck at 1 5 V and lowering the LDO set point to 1 4 V the LDO stops sourcing current hence the Buck takes over All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 14 of 18 UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual NXP Semiconductors VDDA15_DP VDDA15_DP VDDD15 4i DisplayPort Receiver DisplayPort Receiver DAC Digital Logic GND DIEPAD
3. UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual Rev 1 19 January 2015 User manual Document information Info Content Keywords PTN3356 DisplayPort eDP VGA bridge application board Abstract This user manual presents the demonstration application board capability of interfacing an embedded DisplayPort source to VGA output The application board is intended for use as an evaluation and customer demonstration tool as well as a reference design NXP Semiconductors UM10837 Revision history PTN3356 e DP to VGA Bridge IC Application Board User s Manual Rev Date Description 1 20150119 Initial version Contact information For more information please visit http www nxp com For sales office addresses please send an email to salesaddresses nxp com UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 2 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 1 Introduction UM10837 1 1 The PTN3356 is a small package low power DisplayPort to VGA bridge IC optimized primarily for motherboard applications to convert a DisplayPort signal from the chip set to an analog video signal that directly connects to the VGA connector Th
4. content in this document if provided by an information source outside of NXP Semiconductors In no event shall NXP Semiconductors be liable for any indirect incidental punitive special or consequential damages including without limitation lost profits lost savings business interruption costs related to the removal or replacement of any products or rework charges whether or not such damages are based on tort including negligence warranty breach of contract or any other legal theory Notwithstanding any damages that customer might incur for any reason whatsoever NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document including without limitation specifications and product descriptions at any time and without notice This document supersedes and replaces all information supplied prior to the publication hereof Suitability for use NXP Semiconductors products are not designed authorized or warranted to be suitable for use in life support life critical or safety critical systems or equipment nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury death or severe property o
5. es 18 Please be aware that important notices concerning this document and the product s described herein have been included in section Legal information NXP Semiconductors N V 2015 All rights reserved For more information please visit http Avww nxp com For sales office addresses please send an email to salesaddresses nxp com Date of release 19 January 2015 Document identifier UM10837
6. modes e Allow access to test points and jumpers for measurement and configuration purposes e Flash over AUX and MS_12C e Programming and debug test via MS_l2C 1 1 2 Marketing For marketing to demonstrate Ultra small DP VGA features to customers in the field such as e Functional and interoperability test e This board should be connected to a DP or an eDP source e This board can be powered three ways as detailed in Section 6 Power options All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 3 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 1 1 3 Customers For customers to evaluate the PTN3356 and to e Use I2C to change configuration 2 General description 2 1 Layout of the PTN3356 This application board is designed to evaluate the PTN3356 specifically An HVQFN32 socket footprint is reserved in preparation for socket installation to test and program ICs Due to the bulky socket footprint the bulk converter design has to be placed on the back side to be close to the PTN3356 Hence the layout is not optimal as if only the PTN3356 is placed without the socket The placement can be dramatically improved in a real application 2 2 Block diagram Ls TuF GND 4 7uH
7. party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer s NXP does not accept any liability in this respect Export control This document as well as the item s described herein may be subject to export control regulations Export might require a prior authorization from competent authorities Evaluation products This product is provided on an as is and with all faults basis for evaluation purposes only NXP Semiconductors its affiliates and their suppliers expressly disclaim all warranties whether express implied or statutory including but not limited to the implied warranties of non infringement merchantability and fitness for a particular purpose The entire risk as to the quality or arising out of the use or performance of this product remains with customer In no event shall NXP Semiconductors its affiliates or their suppliers be liable to customer for any special indirect consequential punitive or incidental damages including without limitation damages for loss of business business interruption loss of use loss of data or information and the like arising out the use of or inability to use the product whether or not based on tort including negligence strict liability breach
8. sey tna a iia alee aiaa ek 3 ENGING6lS seare nener eet eee eae ae 3 Marketing a20hnar ince nad de ceed 3 Customers 0 00 reeet aaee i 4 General description 0000e00s 4 Layout of the PTN3356 4 Block diagram 0 eee 4 PTN3356 demo board feature list 5 Hardware requirements 5 6 Board specifications 0 6 PCB description 0200000 6 PCB stack UPS 000 00 ee eee eeee 6 Top assembly drawing of the PTN3356 application DOAN ssi eitean ieee teciratdiad A E anaes 7 Bottom assembly drawing of the PTN3356 application board 024 8 Connector specifications 8 Connectors and jumpers 8 Jumper settings 2000 9 T eSt POINntS cc dics ewetespe deed ee bees 9 Cables 2 c 46o0ice0beheeviaeoteteias 10 Power options 2002 02e eee eeee 10 DP 1 0 cable 22 06 e0e08 eae even e bis 11 5 V micro USB 00000 eee 12 External power source 13 Operation mode 0200eeeeeeee 14 Buck converter mode 15 LDO MOJE 22 0 ecb pomp ewe ee eee EE 16 References 20000 eee e eee eee 16 Legal information 000eee eens 17 Definitions 0000 22 cee eee 17 Disclaimers 0 00000 eee eee 17 Trademarks 0 20000 cece eee 17 Content 66 6 isiceeiie ceiewie ede ens eace
9. way selection jumper JP3 and J8 6 1 DP 1 0 cable Set JP3 2 to J8 1 to select DP power UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved Rev 1 19 January 2015 11 of 18 User manual NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual Fig 7 Power by DP 1 0 cable eS 3V3_EXT GND VO0_US 4 r ae yw A use ei rea O uS 014 5 1 k PTN3356 DEMO 22 x MED BRD R10 ary We ys J boc_taq se C 6 2 5 V micro USB Set JP3 pin 2 to pin 1 to select 3V3 from USB source 5 V steps down to 3V3 via U4 UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 12 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual will Ah es TE pE 1 PING356 DEMO j ah BRD Ri 0 EA TP14 Fig 8 Power by micro USB 6 3 External power source Set JP3 pin 2 to pin 3 to select external 3 3 V power supply Clip 3 3 V power lead to TP5 and clip ground lead to GND test point UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 13 of 18
10. A m oo a m aoa ASSEMBLY TOP Fig 4 PTN3356 application board top assembly drawing UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 7 of 18 NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 4 4 Bottom assembly drawing of the PTN3356 application board on s 5 sm Sjo Nj Ra Ske mf SI Cray O ICOS ASSEMBLY BOTTOM Fig 5 PTN3356 application board bottom assembly drawing 5 Connector specifications 5 1 Connectors and jumpers Table 1 Connectors and jumpers list Reference Value Description Manufacturer Manufacturer number J1 DP CONN SINK DP RCPT 20 POS Molex 47272 0001 J12 Micro USB CONN RCPT STD FCI 10103594 0001LF MICRO USB TYPE B J3 J4 VGA_CONN CONN D SUB RCPT EDAC 634 015 274 992 15POS HD R A J5 J57 HEADER 4 CONN HEADER 100 Sullins PBCO4SAAN SINGL STR 4POS J6 HEADER 2x5 CONN HEADER 100 Sullins PBCO5DAAN DUAL STR 10POS J8 J10 J11 J13 CON1 CONN HEADER 100 Sullins PBC01SAAN SINGL STR 1POS JP1 JP3 JP4 JP5 JP7 HEADER 3 CONN HEADER 100 Sullins PBCO3SAAN JP9 JP10 SINGL STR 3POS JP2 HEADER 2 CONN HEADER 100 Sullins PBCO2SAAN SINGL STR 2POS UM10837 All information provided in this document is subject to legal disclaimers N
11. Buck voltage sense input with core supply input functions while in Buck mode 8 References 1 Data Specification PTN3356_CONFIDENTIAL pdf Aug 2014 2 Schematic PTN3356 rev10 pdf 3 BOM PTN3356 REV10 BOM xls 4 AN11590 PTN3356 Layout Guideline rev1 pdf 5 Allegro layout QDS5874_NXP_PTN3356_DEMO_BOARD_REV1_PCB_FINAL 5 brd UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 16 of 18 NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 9 Legal information 9 1 Definitions Draft The document is a draft version only The content is still under internal review and subject to formal approval which may result in modifications or additions NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information 9 2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable However NXP Semiconductors does not give any representations or warranties expressed or implied as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information NXP Semiconductors takes no responsibility for the
12. DD_3V3 TP22 RED 3V3_PWR TP23 RED VDDA_3V3 TP24 ORANGE VBUS_5 UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 9 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 5 4 Cables e DP 1 0 cable to power the application board e DP 1 1 cable for DP communication only e VGA cable e Micro USB cable 6 Power options The PTN3356 application board can be powered by three different methods selected via JP3 and J8 1 Micro USB cable that carries 5 V power 2 External power supplies with 3 3V 1A 3 DP 1 0 cable that carries 3V3 power See schematic below for jumper settings UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 10 of 18 UM10837 NXP Semiconductors PTN3356 e DP to VGA Bridge IC Application Board User s Manual 3V3_EXT VDD_USB DP_PWR 3V3 HEADER 3 ae JB 1 1 L5 R2 3 E Lawon 2 CON1 E3 FB JP3 a a 2 pi E c49 T CS51 C43_ C44 10uF_16V m C48 N C50 w 22uF_10V O1uF o o 01uF 22uF_IBV ej tuF_SOV JP3 2 to J8 1 DP_PWR JP3 2 to JP3 1 USB JP3 2 to JP3 3 EXT PWR Jii r A TP EE t DIA Fig 6 Power 3
13. Fig 10 PTN3356 Buck vs LDO modes 7 1 Buck converter mode Voltage input pin PVDD33 Current output pin SWOUT Buck output pin One 4 7 uH inductor is connected to SWOUT pin Buck out pin is the other end of 4 7 uH which is connected directly to VDDD15 pin SWOUT pin Buck voltage sensing input VDDD15 very important if VDD15 is not connected to the inductor the buck converter cannot work at all It does work fine if either VDDA15 pins aren t connected 1 5 V input pins VDDD15 VDDA15_DP VDDA15_DAC NXP Semiconductors N V 2015 All rights reserved 15 of 18 All information provided in this document is subject to legal disclaimers Rev 1 19 January 2015 UM10837 User manual NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual PWM Vsw MODULATION Because V swout is a 3 3V square wave signal A cap parellel to L will add a big ripple to VDDD15 VDDD 15 is filtered by 4 7uF i capacitor which is charged by l The ripple is lt 5mV in normal conditions i PIRENSSSDIBeCK eh BUN OR a ti SS SS SS l j PVDD33 L V vopp s PTN3355 4 internal circuits lal Me Saas Fig 11 Buck converter operation 7 2 LDO mode Voltage input pin PVDD33 Voltage output pin VDDD15 1 5 V input pins VDDA15_ DP VDDA15_DAC VDDD15 pin is a regulated supply output in LDO mode and it combines the
14. XP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 8 of 18 NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 5 2 Jumper settings Table 2 Jumper settings Jumper Signal names Jumper settings Default setting JP1 3V3_IC 1 2 select external power to measure IC 2 3 2 3 select 3 to 1 power source JP3 amp J8 JP2 HPD_ON 1 2 Enable HPD LED 1 2 OPEN Disable HPD LED JP3 amp J8 3V3_FB 2 1 Select 3V3 from USB source 1 2 2 3 Select external power supply JP3 2 to J8 1 Select DP power JP4 TESTMODE 1 2 HIGH CFG 5 1 JTAG PINS 2 3 2 3 LOW CFG 5 1 CONFIG PINS 12C 40H OPEN CFG 5 1 CONFIG PINS 12C COH JP5 CFG5_TCK 1 2 HIGH 24 MHZ XTAL is used OPEN OPEN 27 MHZ XTAL is used 2 3 LOW 25 MHZ XTAL is used JP7 CFG1 MS_SCL TDI CFG1 CFG2 2 3 11 Compliant HPD behavior MS Bus is used 10 Non compliant HPD behavior JP9 CFG2 MS_SDA TMS _ 01 Non compliant HPD behavior 2 3 00 Compliant HPD behavior MS bus is not used JP10 CFG3 SPARE RESERVED OPEN 5 3 Test points Table 3 Test points listing Test point number Color Signal names J10 HDR_1X1 RST_N J11 HDR_1X1 OSC_IN J13 HDR_1X1 OSC_OUT TP2 YELLOW DP_PWR TP3 ORANGE VSS_USB TP4 WHITE VBUCK_1V5 TP5 RED 3V3_EXT TP6 RED 3V3_IC TP9 RED 3V3 TP10 TP11 TP17 TP19 BLACK GND TP21 RED V
15. e PTN3356 consumes approximately 200 mW of power for video streaming in WUXGA resolution and 410 uW of power in low power mode The VGA output is powered down when there is no valid DisplayPort source data being transmitted The PTN3356 is packaged in HVQFN 32 pin with dimension of 5 mm x 5 mm x 0 85 mm 0 5 mm pitch The PTN3356 is powered from 3 3 V power source and generated 1 5 V through an internal step down switch regulator and buck converter for internal core usage and DAC usage For cost saving the external inductor for the buck converter can be removed the internal LDO can supply 1 5 V for core usage and DAC usage without any re work However using an LDO will consume twice as much power as the buck converter about 400 mW UM10837 provides information including e Overall PCB connectors jumpers and power supplies e Equipment Tools that this board will be interfacing with for board testing e System level connections such as cables and connectors that this board will be plugged into This application board is intended to demonstrate the bridging capabilities of the PTN3356 in a low power DP to VGA conversion application Purposes Engineers For engineers to evaluate the performance of the PTN3356 and to develop firmware including collecting and verifying system level features performances functionalities such as e Verify power management schemes e Power sequence e Power consumption measurement during various operating
16. of contract breach of warranty or any other theory even if advised of the possibility of such damages Notwithstanding any damages that customer might incur for any reason whatsoever including without limitation all damages referenced above and all direct or general damages the entire liability of NXP Semiconductors its affiliates and their suppliers and customer s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars US 5 00 The foregoing limitations exclusions and disclaimers shall apply to the maximum extent permitted by applicable law even if any remedy fails of its essential purpose Translations A non English translated version of a document is for reference only The English version shall prevail in case of any discrepancy between the translated and English versions 9 3 Trademarks Notice All referenced brands product names service names and trademarks are the property of their respective owners NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 17 of 18 NXP Semiconductors UM10837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 10 Contents 5 1 5 2 5 3 5 4 6 1 6 2 6 3 7 1 7 2 9 1 9 2 9 3 10 Introduction 00 cece eee eee 3 PURDOSES chei
17. or need to use DP 1 0 cable e Jumper to select between 3 power sources 3 Hardware requirements e DP sources of Intel AMD Apple VTG5225 DP or DPT 200 DP sources with DP 1 1 or DP1 0 cable DPA 400 AUX analyzer Different native resolution monitors FS2 with 2x5 JTAG connection for FW download 12C Bird with 1x4 header connection for slave 12C OO A wn 4 Board specifications 4 1 PCB description e Layers 4 layers expected trace ground VCC trace e Size 3 5 x 4 5 e Material FR4 e Thickness 62 mil e Impedance 50 ohm single end 75 ohm single end RGB 100 ohm differential on DP and AUX signal pairs 4 2 PCB stack ups Stack Up PCB Stack Up Thickness mil Impedance Single DIFF z 9 55 mils 502 10 TOP copper plating 1 50 mils 3 55 mils 759410 Prepreg 5 50 mils Sa lil ow Freon Il 47 00 mils rae eee Bottom copper plating Som 5 9 5 5 5 9 mils 1002 10 97 26 Q Fig 3 Small ULT DP VGA application board PCB stack up UM10837 All information provided in this document is subject to legal disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 1 19 January 2015 6 of 18 NXP Semiconductors U M1 0837 PTN3356 e DP to VGA Bridge IC Application Board User s Manual 4 3 Top assembly drawing of the PTN3356 application board _ Be ah Hg Oo F D10 1 AD m w o
18. r environmental damage NXP Semiconductors and its suppliers accept no liability for inclusion and or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and or use is at the customer s own risk Applications Applications that are described herein for any of these products are for illustrative purposes only NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products and NXP Semiconductors accepts no liability for any assistance with applications or customer product UM10837 All information provided in this document is subject to legal disclaimers design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned as well as for the planned application and use of customer s third party customer s Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products NXP Semiconductors does not accept any liability related to any default damage costs or problem which is based on any weakness or default in the customer s applications or products or the application or use by customer s third
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