5000-6.4.23 February 1995
Contents
1. Notes 1 The number of elements words in the status file is processor dependent see Logical Addressing for the Status Element section 2 ASCII string floating point and network file types are not available on SLC 500 SLC 5 01 SLC 5 02 SLC 5 03 processors You can address individual bits for the following elements in a data table file by absolute bit number 0 thru 4095 binary control block input image integer output image status SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for the The file for output image elements is file 0 of the data table This file Input Output Image accommodates up to 256 output image elements Elements The file for input image elements is file 1 of the data table This file accommodates up to 256 input image elements Each I O image element consists of one 16 bit word You can address an PO image element in its entirety of you can address any particular input or output bit of an element individually Figure 2 Logical Addressing for I O Image Elements File Separator Word Separator Logical Address Identifier Bit Separator I 12 1 12 O Output I Input T O Slot Number Required only when addressing to the bit level Required only when addressing 24 and 32 bit I O Word Number 0 255 decimal Figure 3 Bit Map of I O Image Element for 8 bit Discrete I O 5 14 B 12 11 10 9 8 7 6 5 4 32. Status Word Number 0 n decimal 0 15 decimal Required only when addressing to the bit level For specific information about status elements refer to the Advanced Programming Software APS User s Manual publication 1747 NM002 Table D Parameters of Status Words Description PLC Data Type Valid Range Status Element signed word 32 768 thru 32 767 Table E Examples for Status Element 3 in the Default File File 2 To address the Use this form Entire Element 5 3 or 52 3 Tenth Data Bit 5 3 9 or 52 3 9 SLC 500 Family of Programmable Controllers Addressing Reference Figure 8 Status file Memory Map for SLC Processors Word Description Description sd 0 Processor Mode Status and Contro 10 CO i oH VT BY Oo ro 11 O Slot Enable Disable Flags word 0 12 O Slot Enable Disable Flags word 1 13 ath Register word 0 14 ath Register word 1 15 Node Address and Bauan IG Test Sing Step Sarat Rung Numer _ IT_ TestSingle Step Sarat Fie Number 18 Test Single Step Sop Before Rung Numer 19 Test Single Step Stop Before Fie Number 20 Test Report FaultPowerdown Rung Number 21 TestReport FaultPowerdown Fle Number 22 aximum Observed Scan Time 23 Average Scan Time 24 ndex Register O Interrupt P ending word 0 25 I 26 O Interrupt P ending word 1 27 O Interrupt Enabled word 0 28 O Interrupt Enabled word 1 29 User Fault R outine File Number TI 7 3 x 5 x
3. wy Allen Bradley SLC 500 Family of Programmable Controllers Addressing Reference Manual Important User Information Because of the variety of uses for the products described in this publication those responsible for the application and use of this control equipment must satisfy themselves that all necessary steps have been taken to assure that each application and use meets all performance and safety requirements including any applicable laws regulations codes and standards The illustrations charts sample programs and layout examples shown in this guide are intended solely for purposes of example Since there are many variables and requirements associated with any particular installation Allen Bradley does not not assume responsibility or liability to include intellectual property liability for actual use based upon the examples shown in this publication Allen Bradley publication SGI 1 1 Safety Guidelines for the Application Installation and Maintenance of Solid State Control available from your local Allen Bradley office describes some important differences between solid state equipment and electromechanical devices that should be taken into consideration when applying products such as those described in this publication Reproduction of the contents of this copyrighted publication in whole or in part without written permission of Allen Bradley company Inc is prohibited
4. Tenth Data Bit B3 2 9 12 SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recommended default file for floating point elements is file 8 of the Floating Point Elements data table This file accommodates up to 256 floating point elements If your application requires more than 256 floating point elements specify one or more files 10 255 in the user defined area of the data table in addition to file 8 Each floating point element consists of two words You must address the floating point element in its entirety Figure 13 Logical Addressing for Floating Point Elements File Separator Logical Address Identifier File Type F Floating Point Figure 14 Bit Map of the Floating Point Element File Number 8 or 10 255 decimal Element Numbe 0 255 decimal 5 Ww B R Uw 3 s 7 6 5 4 3 2 1 0 Word0 s EXPONENT 8 bits MANTISSA 23 bits Word 1 MANTISSA cont Table J Parameters of Floating Point Elements Description PLC Data Type Valid Range Floating Point Element IEEE Float 1 1754944 E 38 thru 028237 E 38 13 SLC 500 Family of Programmable Controllers Addressing Reference Table K Examples for Floating Point Element 9 in the Default File File 8 To address the Use this form Entire Element F8 9 14 SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recom
5. 2 1 0 I O Bit Number X Not Used Figure 4 Bit Map of I O Image Element for 16 bit Discrete I O 4 B 12 11 10 15 9 8 7 6 5 4 3 2 1 0 15 14 13 j m Jiofo e 7 6 5 4 3 2 i o VO 8itnumber SLC 500 Family of Programmable Controllers Addressing Reference Figure 5 Bit Map of I O Image Element for 24 bit Discrete I O 5 MW B 2 11 10 9 8 2 6 5 4 3 2 1 0 I O Bit Number I O Bit Number Word 1 repel A expo op pe bee le u Figure 6 Bit Map of I O Image Element for 32 bit Discrete I O 5 M4 3 22 11 10 9 8 7 6 5 4 3 2 l 0 Word0 15 14 13 12 m 10 s 8 7 6 5 4 3 2 1 0 WOBitNumer Wodl 31 3o 29 27 26 25 24 23 22 21 2 19 18 17 16 yoBitNumber Table B Parameters of I O Elements Description PLC Data Type Valid Range Input Element signed word 32 768 thru 432 767 Output Element signed word 32 768 thru 432 767 Table C Examples for I O Element 3 in Slot 5 To address the Use this form Entire Input Element 1 5 3 Input Bit 6 1 5 3 6 Entire Output Element 0 5 3 Output Bit 6 0 5 3 6 Logical Addressing for the Status Elements SLC 500 Family of Programmable Controllers Addressing Reference The file for status elements is file 2 of the data table The number of status elements in this file n is processor dependent see Figurd Figure 7 Logical Addressing for Status Elements File Separator Logical Address Identifier Bit Separator 5212 712 File Type S
6. 5 03 processors support words 0 82 SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recommended default file for integer elements is file 7 of the data Integer Elements table This file accommodates up to 256 integer elements If your application requires more than 256 integer elements specify one or more files 10 255 in the user defined area of the data table in addition to file 7 Each integer element consists of one 16 bit word You can address an integer element in its entirety or you can address any particular data bit of an element individually Figure 9 Logical Addressing for Integer Elements File Separator Logical Address Identifier Bit Separator U I s 7 123 15 File Type File Number 7or 10 255 decimal Reguired only if addressing to the bit level Element Numbe 0 255 decimal 0 15 decimal Figure 10 Bit Map of the Integer Element 15 14 13 12 ll 10 9 8 7 6 5 4 3 2 1 0 DB15 DB14 DB13 DB12 DB11 DB1O DB9 DB8 DB7 DB6 pes DB4 DB3 DB2 DB1 DBO DB Data Bit SLC 500 Family of Programmable Controllers Addressing Reference Table F Parameters of Integer Elements Description PLC Data Type Valid Range Integer Element signed word 32 768 thru 32 767 DBn 0orl Table G Examples for Integer Element 3 in the Default File File 7 To address the Use this form Entire Elemen
7. File File 4 To address the Entire Structure Enabled Bit Timing Bit Done Bit Preset Value Accumulated Value Use this form AT we we wm wm me 74 3 T4 3 EN or T4 3 EN T4 3 TT or T4 3 TT T4 3 DN or T4 3 DN T4 3 PRE T4 3 ACC SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recommended default file for counter structures is file 5 of the data Counter Structures table This file accommodates up to 256 counter structures If your application requires more than 256 counter structures specify one or more files 10 255 in the user defined area of the data table in addition to file 5 Each counter structure consists of three words You can address a counter structure in its entirety or you can address any particular member of a structure individually Figure 17 Logical Addressing for Counter Structures File Separator Logical Address Identifier Member Mnemonic Separator I di 5 123 ACC File Number Sor 10 255 decimal Reguired only if addressing to the member level Structure Numbej 0 255 decimal File Type See Table N Figure 18 Bit Map of the Counter Structure 15 14 13 12 ll 10 9 8 7 6 5 4 3 2 1 0 Word0 cu co pu ov un va reserven RESERVED bo 009559959 ORE Word 1 Word 2 ACC 17 SLC 500 Family of Programmable Controllers Addressing Reference Table N Mnemonics
8. Throughout this manual we use notes to make you aware of safety considerations circumstances that can lead to personal injury or death property A ATTENTION Identifies information about practices or damage or economic loss Attention statements help you to identify a hazard avoid the hazard recognize the consequences Important Identifies information that is critical for successful application and understanding of the product Data Table Addressing for the SLC 500 Family of Processors Introduction This addressing reference helps you specify data table addresses in SLC 500 fixed and modular programmable controllers It contains information for the following processors all SLC 500 Fixed Programmable Controllers The following SLC 500 Modular Programmable Controllers SLC 5 01 CPU SLC 5 02 CPU SLC 5 03 CPU Locating Addressing Information For information about See page memory maps general format for direct logical ASCII addressing HI logical addressing for I O image elements RI logical addressing for the status elements logical addressing for integer elements MP logical addressing for floating point elements logical addressing for control block structures al oo LEI con Al E oe ro co SLC 500 Family of Programmable Controllers Addressing Reference For specific information about the content of data table files consult the PLC programmer who assigns
9. data to specific memory locations SLC 500 Fixed Hardware Style Installation and Operation Manual publication 1747 NI001 SLC 500 Modular Hardware Style Installation and Operation Manual publication 1747 N1002 Advanced Programming Software APS User s Manual publication 1747 NM002 Important Throughout this publication we use as the logical address identifier This is an entry for INTERCHANGE software It is also an entry for 6200 programming software in sending a message from other stations to a SLC 500 processing station It is not used in 6200 programming software for internal addressing SLC 500 Family of Programmable Controllers Addressing Reference Memory Map Table A shows the logical arrangement of the data table for SLC 500 processors Table A Data Table Memory Map File File Logical Number Type Address Comments 0 0 0 OUTPUT IMAGE 9 0 30 1 0 1 INPUT IMAGE to 1 30 S 0 2 STATUS to See Note 1 S n B3 0 3 BINARY to B3 255 7 4 0 to 4 TIMER T4 255 C5 0 5 COUNTER to C5 255 R6 0 6 CONTROL to R6 255 N7 0 7 INTEGER to N7 255 F8 0 8 FLOATING POINT to See Note 2 F8 255 x9 0 9 NETWORK to See Note 3 x9 255 10 x10 0 thru USER DEFINED to See Note 4 255 x255 255 Notes 1 Address range is processor specific see Logical Addressing for the Status Elements section 2 Only the SLC 5 03 series B processor supports floating point data type Do not use this area for processors t
10. dress Identifier Member Mnemonic Separator I 6 123 ACC i R f File Type File Number 6 or 10 255 decimal Required only if addressing to the member level Structure Numbdi 0 255 decimal See Table P Figure 20 Bit Map of the Control Block Structure 15 14 13 12 ll 10 9 8 7 6 5 4 3 2 1 0 Woed0 en eu on em er w wi ro RESERVED Word 1 LEN i oe 19 SLC 500 Family of Programmable Controllers Addressing Reference Table P Mnemonics used with Control Blocks Mnemonic Description PLC Data Type Valid Range ENO Enabled o w 0orl EU UnloadingEnabled bW 0orl DN Done bit 0orl E StackEmpty bt 0orl ER EFO dt o UL Unbad shiftbitonly bt Oorl IN InhibitComparisons b 0orl FD Found SQCony bW 0orl LEN Length signedword 32 768thru 32 767 POS Poston signedword 32 768thru 32 767 Table Q Examples for Control Block Structure 0 in the Default File File 6 To address the Use this form Entire Structure R6 0 StackEmptyBit R6 0 EMor R6 0EM Inhibit Comparisons Bit R6 0 IN or R6 0 IN Length R6 0 LEN Position R6 0 POS 20 SLC 500 Family of Programmable Controllers Addressing Reference B binary addressing examples 12 bit map 11 parameters 12 bit map binary control block 18 counter integer 9 timer C control block addressing examples 19 bit map 18 mnemonics 19 counte
11. gary e Iceland e India e Indonesia Israel e Italy Jamaica e Japan e J ordan e Korea e Kuwait e Lebanon e Malaysia e Mexico e New Zealand e Norway e Oman e Pakistan e Peru e Philippines e Poland e Portugal e Puerto Rico Qatare Romania e Russia CIS e Saudi Arabia e Singapore e Slovakia e Slovenia e South Africa Republic e Spain e Switzerland e Taiwan e Thailand e The Netherlands e Turkey United Arab Emirates e United Kingdom e United States e Uruguay e Venezuela e Yugoslavia Allen Bradley Headquarters 1201 South Second Street Milwaukee WI 53204 USA Tel 1 414 382 2000 Fax 1 414 382 4444 Publication 5000 6 4 23 February 1995 PN 955118 24 Supersedes Publication 5000 6 4 23 August 1994 Copyright 1995 Allen Bradley Company Inc Printed in USA
12. hat do not support floating point data 3 If non SLC 500 devices exist on the DH 485 link use this area for network transfer You can use either binary B or integer N file types by specifying the appropriate letter for x Otherwise you can use file 9 for user defined files 4 Use this area when you need more binary timer counter control integer floating point or network files that will fit in the reserved files You can use binary B timer T counter C control R integer N floating point F or transfers B and or N file types by specifying the appropriate letter for x You cannot use this area for output image input image and or status files SLC 500 Family of Programmable Controllers Addressing Reference General Format for Logical Figure 1 illustrates the general format for logical addressing in the data ASCII Addressing table Figure 1 General Format for Logical Addressing File Separator Logical Address Identifier Bit Separator if addressing a bit B 123 123 15 File Type File Number A ASCII 0 Output 0 15 decimal B Binary 1 Input C Counter 2 Status D Decimal BCD 3 Binary F Floating point 4 Timer I Input 5 Counter Element or Structure Number N Integer 6 Control Block O Output 7 Integer R Control Block 8 Floating point S Status 10 255 User defined 0 255 for all files except Status ST ASCII String T Timer
13. mended default file for timer structures is file 4 of the data table Timer Structures This file accommodates up to 256 timer structures If your application requires more than 256 timer structures specify one or more files 10 255 in the user defined area of the data table in addition to file 4 Each timer structure consists of three words You can address a timer structure in its entirety or you can address any particular member of a structure individually Figure 15 Logical Addressing for Timer Structures File Separator Logical Address Identifier Member Mnemonic Separator I I T_4 123_ ACC j File Type T Timer File Number 4 or 10 255 decimal Structure Numbej Member Mnemonicf 0 255 decimal See Table L Required only if addressing to the member level Figure 16 Bit Map of the Timer Structure 15 14 13 12 ll 10 9 8 7 6 5 4 3 2 1 0 RESERVED Word 2 ACC 15 SLC 500 Family of Programmable Controllers Addressing Reference 16 Table L Mnemonics used with Timers Mnemonic Description PLC Data Type Valid Range EN Enabled bit 0orl TT Timer Timing bit 0orl DN Done bit 0orl PRE PresetValue signed word Othu432767 ACC Accumulated Value signed word Othu 32 767 1The lower limit of valid range for PRE and ACC is zero not 32 768 even though the PLC data type is signed word Table M Examples for Timer Structure 3 in the Default
14. r bit map 16 mnemonics 17 counters addressing examples 17 D data table memory map B E example addressing binary addressing control block 19 addressing counters 17 addressing ED addressing I O 6 addressing integer 10 addressing status words addressing timers 15 F float addressing examples 13 bit map parameters l I O addressing examples a bit map E parameters integer addressing examples 10 bit map p parameters L logical addressing general format a M memory map data table status file 8 mnemonics control block 19 counter timer P parameters integer status S status addressing examples H parameters status file memory map 8 T timer bit map 14 mnemonics 15 timers addressing examples 15 21 21 Customer Support If you need additional assistance on using your software Allen Bradley offers telephone and on site product support For technical assistance on the telephone first contact your local sales office distributor or system integrator If additional assistance is needed then contact your local Customer Support Center For assistance that requires on site support contact your local sales office distributor or system integrator During non office hours contact the Allen Bradley 24 hour Hot Line at 1 800 422 4913 in the United States or contact your local Customer Support Center outside
15. t N7 3 Tenth Data Bit N7 3 9 10 SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recommended default file for binary elements is file 3 of the data Binary Elements table This file accommodates up to 256 binary elements If your application requires more than 256 binary elements specify one or more files 10 255 in the user defined area of the data table in addition to file 3 Each binary element consists of one word You can address a binary element in its entirety or you can address any particular data bit of an element individually Figure 11 Logical Addressing for Binary Elements File Separator Logical Address Identifier Bit Separator U ri 3 123 15 File Type File Number 3 or 10 255 decimal Reguired only if addressing to the bit level Element Numbe 0 255 decimal 0 15 decimal Figure 12 Bit Map of the Binary Element 15 14 13 12 ll 10 9 8 7 5 4 3 2 1 0 6 DB15 DB14 DB13 DB12 DB11 DB1O DB9 DB8 DB7 DB6 pes DB4 DB3 DB2 DBI DBO DB Data Bit 11 SLC 500 Family of Programmable Controllers Addressing Reference Table H Parameters of Binary Elements Description PLC Data Type Valid Range Binary Element signed word 32 768 thru 32 767 DBn 0orl Table I Examples for Binary Element 2 in the Default File File 3 To address the Use this form Entire Element B3 2
16. the United States Customer Support Center phone numbers Region or Area Customer Support Center Telephone Number 519 623 1810 52 5 259 0400 44 908 838800 33 1 3067 7200 Canada Cambridge Ontario Latin America Mexico United Kingdom Milton Keynes France Paris Germany Gruiten 49 2104 6900 Italy Milan 39 2 939 721 Asia Pacific Hong Kong 852 887 4788 Spain Barcelona 34 3 331 7004 PLC PLC 2 PLC 3 and PLC 5 are registered trademarks of Allen Bradley Company Inc Pyramid Integrator Data Highway Plus DH INTERCHANGE PLC 5 25 SLC SLC 5 01 SLC 5 02 SLC 5 03 and SLC 500 are trademarks of Allen Bradley Company Inc ON kanu Allen Bradley a Rockwell Automation Business has been helping its customers improve A Rockwell Automation productivity and quality for 90 years We design manufacture and support a broad range of Allen Bradley control and automation products worldwide They include logic processors power and motion control devices man machine interfaces sensors and a variety of software Rockwell is one of the world s leading technology companies Sr CITT Worldwide representation mA 7 Algeria e Argentina e Australia e Austria e Bahrain e Belgium e Brazil e Bulgaria e Canada e Chile e China PRC e Colombia e Costa Rica e Croatia e Cyprus e Czech Republic Denmark e Ecuador e Egypt e El Salvador e Finland e France e Germany e Greece e Guatemala e Honduras e Hong Kong e Hun
17. used with Counters Mnemonic Description PLC Data Type Valid Range CU CountupEnabed bl 0orl CD CountDownEnabled bt Ool Do Doe bt 0orl O Oe bl o UN ndewe bt 0orl UAL Update Accumulator bt Ool 32 767 CACC Accumulated Value signedword 32 768thu 32 767 IThis bit available only in SLC 500 fixed style processors equipped with an HSC high speed counter In addi tion the lower limit of valid range for PRE and ACC is zero not 32 768 for these processors Table O Examples for Counter Structure 7 in the Default File File 5 To address the Use this form Entire Structure C5 7 OverfowBit C5 7 0Vor C5 7 0V Update AccumulatorBit C5 7 UA or C5 7 UA Preset Value C5 7 PRE Accumulated Value C5 7 ACC 18 SLC 500 Family of Programmable Controllers Addressing Reference Logical Addressing for The recommended default file for control block structures is file 6 of the Control Block Structures data table This file accommodates up to 256 control block structures If your application requires more than 256 control block structures specify one or more files 10 255 in the user defined area of the data table in addition to file 6 Each control block structure consists of three words You can address a control block structure in its entirety or you can address any particular member of a structure individually Figure 19 Logical Addressing for Control Block Structures File Separator Logical Ad
18. y x x v a 30 STI selectable timed interrupt Time Interval 31 S Word Description O 42 43 Time of Day Seconds Reserved Reserved Reserved File Number Input Slot Mask Compare Value Down Count Return Mask Accumulator Reserved Reserved Last DII ISR Scan Time aximum DII ISR Scan Time rocessor Operating System Catalog Number rocessor Operating System System Series rocessor Operating System Release Number ardware Catalog Number Hardware Series Hardware Revision User Program Type User Program Functional Index 66 Flash EEPROM Size Channel 0 Active Node Channel 0 Active Node 6 Channel 0 Active Node Channel 0 Active Node Channel 0 Active Node Channel 0 Active Node Channel 0 Active Node Channel 0 Active Node Channel 0 Active Node Table word 8 Channel 0 Active Node Table word 9 Channel 0 Active Node Table word 10 Channel 0 Active Node Table word 11 Channel 0 Active Node Table word 12 Channel 0 Active Node Table word 13 Channel 0 Active Node Table word 14 Channel 0 Active Node Table word 15 gt N iw co N co o o oy LI Oi LI Oni Oni Oni Oni OT QUI gt l WI NI PI o ul able word 0 able word 1 able word 2 Table word 3 Table word 4 Table word 5 Table word 6 Table word 7 1 1 1 1 Not all processors support all status words SLC 500 and SLC 5 01 processors only support words 0 15 SLC 5 02 processors only support words 0 32 SLC
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