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1. Figure 7 Threshold Voltage shifts due to SP process as a func tion of stressing time voltage of 2 V and also at a drain Voltage of 4 V The ac celeration integral for the SP process is shown in Figure 4 for 2V Drain bias and Figure 5 for 4V Drain bias At 4V drain bias it is many orders of magnitude larger than at 2V drain bias In Figure 6 the first order component of the electron distribution function is plotted at the node where the SP acceleration integral is a maximum The electron distribution function at 4V drain bias is much larger at higher energies than the equivalent distribution at 2V drain bias The energy threshold in the calculation of acceleration integral is 2 2 eV and clearly the electron distribution function at 4V drain bias is much larger above this energy The simulation was performed with degradation times of 10 milliseconds 100 milliseconds 1 second 10 seconds and 100 seconds The threshold Voltage after each simu lation time was calculated from the Gate bias required to achieve a specified drain current and the threshold Voltage shifts calculated At 2V drain bias there was neg ligible threshold voltage shift and so the calculation was performed with drain biases of 3V and 4V with the re sulting shifts being shown in Figure 7 April May June 2014 Acceleration Integral for MP process Drain Bias 2V Gate Bias 2V lt gt 0 01 02 03 0 4 a 0 7 US 05 1 iran Figure 8 MP Acceleration in
2. T Sakaguchi et al Tu P 59 p 171 ICSCRM 2013 2 M Okamoto et al Mo 1A 4 p 10 ICSCRM 2013 3 F Devynck Thesis Figure 1 4 p 8 2008 4 T Hatakeyama et al Materials Science Forum pp 477 480 Vols 740 742 2013 5 K Matsuda Horiba Technical Reports Semiconductor Impurities and Defects Evaluation by ICTS and DLTS pp 15 26 No 2 January 1991 April May June 2014 Hints Tips and Solutions O Using TonyPlot can I achieve publication quality plots A Yes TonyPlot has many various display and preference settings that users can adjust transforming their simula tion data into a high quality plot for use in publications Example SiC Example 10 SiC MOSFET Breakdown Simulations Silvaco includes examples with every software package One example sicex10 simulates the effect of both layout and trench geometries on breakdown voltage for a 3D SiC MOSFET In short it is found that a rounded layout corner as well as a sloped trench sidewall increases the MOSFET breakdown voltage The resulting output plot ted in TonyPlot is shown in Figure 1 While this plot is perfectly acceptable for display and anal ysis of simulation results a user may want to convert the plot for use in a publication submission TonyPlot has nu merous options that can be modified to increase plot clar ity meeting any given journal s publication standards By performing the simple steps detailed in this tip Fi
3. 2 eV Cathode Ohmic Data from 4H SiC OV 245 str Microns Microns e Bulk Trap condition Z1 Z2 center trap due to the carbon vacancy energy level Ec Et 0 66 eV density 1e13 cmY capture cross section sign 5 6e 14 cm and 5 6e 15 cm degeneracy 1 e Pulse condition pulse voltage OV reverse voltage 8V pulse time 10ms tl 10ms t2 210ms e AC small signal analysis frequency 1e5 Hz Figure 4 shows the structure used for those simulations It is formed by 4H SiC substrate of the depth 12 um with N type impurity of 5e14 cm It has an anode electrode with schottky contact on the top and a cathode electrode with ohmic contact on the bottom The region of 2 um with N type doping of 1e20 1 cm is put on the bot tom Then The bulk trap condition is assumed to be the Z1 Z2 center trap due to the carbon vacancy The energy level the concentration and the degeneracy of the trap are 0 66eV 1e13 1 cm and 1 respectively Data from 4H SiC OV 245 str 1 6 8 Distance along line Figure 4 2D structure of 4H SiC substrate in right side and 1D doping profile in the left side April May June 2014 The Simulation Standard ATLAS OVERLAY Data from multiple files gt 4H SiC_DLTS_280 10g E _ 4H SiC_DLTS_300 log 4H SiC_DLTS_310 log gt 4H SiC_DLTS_320 log a 0 5 0 1 0 2 0 3 0 4 Transient time s Figure 5 Transient simulations of c
4. SN PA A N lt v Y 2 o j f D f Co f f D HA f H j v y O SN 3 sk F f cS e j 4 r S a OA e DO IS DS EIN A Aaa 0 02 0 04 0 06 0 08 0 1 0 12 Position along cutline microns Figure 17 Stress time evolution of donor interface charge and the emission and passivation parameters were set as follows DEGRADATION GF BARREMI 0 775 GF BARRPASS 0 725 GF NUEMI 1 0E12 GF NUPASS 1 0E12 which result in a lifetime associated with the MP process es of approximately 50 seconds in the simulation Other MP process parameters were ELEC MP THRESH 0 5 ELEC MP SIGMA 1 0e 10 ELEC MP POWER 3 resulting in an MP electron integral having a maximum value of over 10 s and a saturated acceptor charge density along a 0 06 microns length of the device This gives the initial en hancement in the current as the negative interface charge is created which persists until approximately 10 minutes The time evolution of the donor traps depends on K SP r and this quantity is shown in Figure 16 The Keldysh parameters used were HOLE SP THRESH 2 3 HOLE SP SIGMA 2 0e 19 HOLE SP POWER 4 and as can be seen from the figure this produces a maxi mum value of K SP r of about 15 s The maximum val ue is away from the interface and on the interface the max imum value is of the order of 1 st but with a significant part of the interface having values down to 10 s which match the maximum ti
5. as introduced by Keldysh in the context of impact ionization rate calcula tions Therefore only electrons with an energy of more than E_ contribute to this integral Analagously the func tion is defined for holes as h o E En dl Osp E E Usp0 K T 5 Continued on page 2 INSIDE Simulations of Deep Level Transient Spectroscopy for 4H SiC Hints Tips and Solutions SILVACO Equation 3 is often referred to as an acceleration integral in the literature although its units are s The MP process involves gradual excitation of the bend ing vibrational quantum states of the bond by less ener getic carriers followed by a thermal excitation from the highest bound state to the transport state of the Hydro gen This thermal emission occurs over a barrier of height E ev with an attempt frequency of v Hz giving an emission rate of P emi V omi EXP E K T 6 where T is the lattice temperature There is also the re verse process for repassivation of the bond where the hydrogen overcomes a barrier of height E to become bonded again The overall repassivation rate is P 7 pass V ass amp XP Es K T The excitation of the bond by numerous cold carriers can be described by a set of coupled differential equations de scribing the occupation density of each level 2 Entering these equations as parameters are P and P which are the probabilities of transition to the next higher vibratio
6. convert the displayed drain current magnitude from Amps to micro Amps 2 Modify Y Axis Label Using Plot gt gt Annotations type a Y Axis label Drain Current lt mu gt A and TonyPlot will convert the bracketed text lt mu gt to the Greek symbol u 3 Adjust X Y Min Max Divisions and Ticks to Fit Datasets Using Plot gt gt Annotations the X and Y axis properties are specified 4 Add Main and Subtitles to the Plot Using Plot gt gt Annotations the title SiC MOSFET Breakdown Simulation and the subtitle Effect of Layout and Trench Geometries are added 5 Turn Off Line Markers Using Plot gt gt Display the plot markers button can be deselected 6 Change All Line Colors to Black Using Preferences gt gt Sequence Colors the 1st 2nd and 3rd sequence colors are all changed to black The Simulation Standard Change Line Types to Differentiate the Curves Using Preferences gt gt Sequence Lines adjust the 1st 2nd and 3rd sequence lines to different line types solid dashed dotted etc and set Preferences gt gt Overlay Options gt gt Display Option to Color Mark Increase Line Thickness Using Preferences gt gt Drawing Options gt gt Graphs increase line widths Modify Plot Fonts Using Preferences gt gt Drawing Options the small medium and large Font style and size can be changed 10 Increase Plot Margins Using Preferences gt gt Plot Options gt gt
7. very small in the ab sence of a significant acceleration integral as it will be a Boltzmann factor with energy of approximately the bind ing energy of the ground state From equations 8 and 9 it is seen that if Ki MP r is greater than the attempt frequency the ratio of P to P is approximately one The spatial distribution of traps depends therefore in a very non linear manner on the acceleration integral The third component of the general framework model is a field enhanced thermal degradation which is mod elled as P therm E Kni exp E K T 14 where K is an attempt frequency and E is the Field dependent Si H bond energy therm P therm has the same time dependence as the SP process and so it is simply added to K de SP r in the calculation of defects after stressing time t Many of the model parameters can be set on the DEG RADATION MATERIAL or MODELS statements For example NTA SP NTA MP NTD SP and NTD MP on the DEGRADATION statement specify N NI NI Na spectively re Calculation of the Carrier Distribution Function Equations 3 and 10 require the anti symmetric part of the carrier distribution function The capability to solve the Boltzmann Transport Equation BTE for the zeroth and first order terms in a Spherical Harmonic expansion of the carrier distribution function has recently been add ed to Atlas The first order term is anti symmetric and is used in equatio
8. 8 09 1 Microns Figure 3 Example structure 0 6 Acceerauon inte ral for SP process Drain Bias 2V Gate Bias UN U gt A n r o m y e GO G1 82 03 0 4 05 06 07 08 09 al Microns Figure 4 SP Acceleration integral at 2V drain bias logarithmic scale Acceleration ingoral for Se process Drain Bias Gate Bias 2 Un U gt ia ia A D e O a Ol 02 03 06 07 08 Of 1 0 4 0 5 Microns Figure 5 SP Acceleration integral at 4V drain bias logarithmic scale are looked at in turn for the case of electrons in this de vice The MP Keldysh cross section O was set to zero a the SP Keldysh cross section was Sel to be 1 0 x 10 2 cm with a threshold energy of 2 2 eV The saturated cane bond density N was set to 4 x 10 cm With a gate bias of 2 V a BTE solution was obtained at a drain The Simulation Standard Page 4 Comparison of first order component in electron distribution function for two different drain bias solutions gt 2V Drain bias AV Drain bias pa 1 1O I j I I UBWNEOODNOUBWNHEOODNOUARWNHO 2 El 31 zi S1 rbit a RRR RRR pp I I fl oo ev Figure 6 First order component of electron distribution function Threshold vage shift obtained by stressing at two 10 ifferent drain biases fa a E pa N Threshold Voltage shift Volts lt Drain Bias 3 100 Stress time seconds
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10. Plot Margins the left right top and bot tom margins can be adjusted 11 Change Plot Window Colors Using Preferences gt gt General Colors gt gt Window the border color can be changed to white 12 Add Gridlines and Modify Gridline Color Using Plot gt gt Annotation the show gridlines toggle but ton is selected Using Preferences gt gt General Colors gt gt Grid the grid color can be changed as well 13 Adjust Which Keys are Shown and their Location Using Preferences gt gt Key Options the Graphs key can be turned off and the location and transpar ency of the Levels key can be changed 14 Modify Level Names Using Plots gt gt Level Names the name of the 3 line traces can be changed Addi tionally the marker toggle button can be deselected to remove markers from the key 15 Add Labels for Emphasis Using Plot gt gt Labels text with arrows can be overlaid on the plot to add emphasis Users can also utilize the File gt gt Save Set Files to save many of the settings for use in other plots The Simulation Standard Call for Questions If you have hints tips solutions or questions to contribute please contact our Applications and Support Department Phone 1 408 567 1000 Fax 1 408 496 6080 e mail support silvaco com Hints Tips and Solutions Archive Check out our Web Page to see more details of this example plus an archive of previous Hints Tips and S
11. Simulation Standard Engineered Excellence A Journal for Process and Device Engineers Generally Applicable Degradation Model for Silicon MOS Devices Introduction The main cause of operational degradation in MOS de vices is believed to be due to the buildup of charge at the Silicon Oxide interface This leads to reduced saturation currents and threshold voltage shifts in MOSFET devices Physics based models of the degradation process typical ly consider the breaking of Si H bonds depassivation at the Silicon Oxide interface to be the main cause of the op erational degradation A new general model of Si H bond breaking has recently been included in Atlas adding to the Silvaco TCAD portfolio of degradation models 1 This article presents the theory of the new model and de scribes its implementation in Atlas The model is then ap plied to a simple MOSFET to illustrate the features of the model Finally it is applied to model a realistic MOSFET for which experimental degradation data are available It is able to simulate reasonably well the unusual behavior of the degradation as a function of stressing time General Framework Model The model is based on a study of Si H trap dynamics in which three bond breaking mechanisms are considered 2 The first mechanism occurs at high electric field which distorts the bond and reduces the amount of thermal en ergy needed to break the bond The second mechanism involves a high ener
12. a 2 3 probe DOS Perp 3 extract init inf total dat extract name total emis max curve elect Wavelength probe DOS Para 2 3 probe DOS Perp 3 extract name light extract eff Sair_ emis Stotal emis The emission power coming out of the device and the total emission power is extracted and saved to the variable air_ emis and total_emis respectively The ratio of these two parameters is the light extraction efficiency which is saved to the variable light_extract_eff Figure 2 shows the light extraction efficiency with different a Alq3 thickness and b ITO thickness after parameter sweeping simulations Given the photoluminescence PL spectrum of the active material the emission spectrum from the device can also be obtained by the same optical simulation The follow ing example demonstrates such a simulation in the same device given in Figure 1 save x 50 y St_alq3 n surf 1 d orient 1 lmin 0 425 lmax 0 795 t init 0 005 t min 0 005 angle out 1 dos maxn 20 opdos ignore yield emis spec dat user spect alq3_ spect spec In the above SAVE statement Imin and Imax defines the wavelength range t init and t min specifies the initial and minimum wavelength step in the simulation respec tively The output angle is set to 1 here therefore the output power will be calculated within 2 around the y axis User defined PL spectrum of Alq3 is given in the file alq3_spect spec and the simulated
13. apacitance sign 5 6e 14 cm The two DLTS signals correspond to the difference of the capture cross sections The left and right signals were calculated with sign 5 6e 14 cm and 5 6e 15 cm re spectively You can find that larger capture cross section makes lower temperatures peak position because the relaxation speed of larger capture cross section becomes faster at a same temperature A DLTS signal of Figure 3 was obtained by 32 transient simulations including the AC analysis which were calculated with different tem peratures by 5 degrees Figures 5 and 6 shows 4 tran sient simulations of the electron emitting process in the temperatures 280 300 310 and 320K You can see that higher temperature makes shorter relaxation time for the electron emitting process from traps The Simulation Standard Data from maltiple files gt DLTS_280 log gt DLTS_300 log gt DLTS_310 log gt DLTS_320 log T 0 0 1 0 2 03 04 0 5 Figure 6 Transient simulations of capacitance sign 5 6e 15 cm 4 Summary We have demonstrated that the DLTS Deep Level Tran sient Spectroscopy signal can be simulated by the device simulator Atlas The DLTS simulation needs the analysis of the very small capacitance difference and Atlas has the function to carry out the transient simulation and the AC small signal analysis simultaneously and accurately References 1
14. cifies an angle with respect to the vertical axis as in dicated in Figure 1 by 0 the output light power will then be calculated from 9 to 0 dos maxn specifies the upper limit of the integral over the normalized wavevector par allel to the x axis By setting dos maxn with a value much larger than 1 total emission power from the dipole will be calculated The simulation result is saved to the file total dat In order to calculate the power emitted out of the device from the same dipole we have to restart Atlas create the structure again and use another SAVE statement but with dos maxn 1 save x 50 y t_algq3 l wave 0 524 n surf 1 d orient 1 angle out 90 dos maxn 1 opdos photon dat Intensity a u PL b Figure 3 a Simulated emission intensity spectrum of the device and b user specified PL intensity spectrum of the Alq3 single ATLAS PL spectrum of Alq3 single layer PL Intensity Wavelength um In this case the integral over the parallel normalized wavevector is limited within 0 1 which means the ver tical wavevector is always real Thus the light will propa gate non evanescently out of the device The simulation result is saved to the file photon dat With the file total dat and photon dat we now can cal culate the light extraction efficiency using several EX TRACT statements extract init inf photon dat extract name air emis max curve elect Wavelength probe DOS Par
15. echanism to consider is the field enhanced thermal degradation The cross sections O and OF were set to zero and the rate K was changed from its default value of 0 to be 1 x 10 s The saturated dangling bond density N was set to 4 x 10 cn1 The gate was biased to 12 V with a drain bias of 0 01 V and the simula tion carried out for the degradation lifetimes as above The interface charge density shown in Figure 12 after 100 s of stressing is much more uniform than in the case of ei ther SP or MP process degradation The threshold voltage shifts typical of this process are shown in Figure 13 Fitting to Experimental Data In an actual MOS device all of the three aforementioned degradation mechanisms may be important In this sec tion results from the model are used to analyze experi mental data for a p channel MOSFET The device struc ture is shown in Figure 14 and the stressing biases are gate bias set to 2 1 Volts and drain bias set to 5 5 Volts Structure of p channel MOSFET with p n junction positions shown Net Doping cm3 N o N 3 gt lt O Figure 14 p MOSFET with net doping shown The Simulation Standard Degradation of current in linear regime Experimental data Change in current 101 10 Stress Time minutes Figure 15 Experimental degradation data Linear drain cur rent with all other contacts grounded At these biases impact ionization is significant and so d
16. ee the Atlas manual 1 for more details on the BTE solver Implementation of the General Framework Model An Atlas device is biased to the stressing configuration using the drift diffusion or energy balance models A SOLVE statement with the flags DEVDEG GEE for elec trons and DEVDEG GF H for holes will solve the Boltz mann transport equation Up to 10 degradation times can be simulated using the parameters TD1 TD10 on the SOLVE statement The interface charge densities are calculated using equations 1 2 12 and 13 for each requested degradation time and the results are written to a structure file For example the Atlas statement SOLVE DEVDEG GF E TD1 1 0e 2 TD2 1 0e 1 TD3 1 0 TD4 10 0 TD5 1 0e2 OUTFILE simstd str will result in files simstd_1 00e 02s str simstd_1 00e 01s str simstd 1 00e 00s str simstd_1 00e 01s str simstd_1 00e 02s str being written out each having an interface charge den sity corresponding to the simulated degradation time Example Simple MOSFET The first example is for the MOSFET structure shown in Figure 3 Each of the three different degradation models The Simulation Standard MOSFET 3 Example N MOSFET structure ee ds A f i f 1a Af fh tk A AARAAAR A i Valea rials Polysilicon Aluminum AAAS Electrodes j UA roo UN NINA NIN i i EL WAN 1i Ii ii MATA j P WAAAY A f t ry yy Vy road evo u E ARAN AAA 0 2 0 3 0 4 05 0 7 0
17. egradation by both elec trons and holes is important Impact ionization scatter ing can be included in the Boltzmann transport solver by specifying BTE IMPACT on the MATERIAL statement The main degradation metric used was the change in cur rent in the linear regime at a fixed gate bias This shows an enhancement at short stressing time and a decrease at longer simulation time as shown in Figure 15 One pos sible interpretation is that some interface acceptor traps are created on a very short time scale with a larger contri bution from interface donor traps occurring over a longer stressing timescale The device stressing was simulated by using the Boltmann transport equation solver for both electrons and holes with simulation times of 1 2 5 10 20 50 100 200 500 and 800 min utes respectively The trap densities were set as follows DEGRADATION NTA SP 0 0 NTA MP 1 8e13 NTD SP 1 0e13 NTD MP 0 0 Plot of SP Hole Acceleration Integral logarithmic scale un U gt A A o D e o huwo Fono KONIC O 0 2 0 3 Microns Figure 16 SP process acceleration integral April May June 2014 Time evolution of donor interface charge density From horizontal cutline along Silicon oxide interface 12 1 minute 10 3 2 minutes 5 minutes gt 10 minutes 20 minutes 50 minutes 100 minutes A A Je 1011 9 Ls 200 minutes YZ Y 8 500 minutes i S 800 minutes 107
18. emission spectrum is saved in emis_spec dat A string ignore is assigned to opdos which means no data will be saved for opdos The resultant emission spectrum is shown in Figure 3 a Us er defined PL spectrum is plotted in Figure 3 b for com parison A direct application of such a simulation is that the electroluminescence EL spectrum can be obtained in combination with an electrical simulation In that case the actual dipole density at a given position will be used to calculate the emission power One should bear in mind that due to the functional limit of the matrix method the pure optical simulation is re stricted to one dimension 1D only Namely no refrac tive index variation along the x axis is allowed in the simulation Reference 1 R R Chance A Prock and R Silbey Molecular fluores cence and energy transfer near interfaces Adv Chem Phys Vol 37 pp 1 65 1978 April May June 2014 Page 15 Call for Questions If you have hints tips solutions or questions to contribute please contact our Applications and Support Department Phone 1 408 567 1000 Fax 1 408 496 6080 e mail support silvaco com Hints Tips and Solutions Archive Check out our Web Page to see more details of this example plus an archive of previous Hints Tips and Solutions www silvaco com The Simulation Standard USA Headquarters Silvaco Inc 4701 Patrick Henry Drive Bldg 2 Santa Clara CA 95054 US
19. gure 2 is obtained In this example a black and white figure format is chosen as this is often the preferred format of many peer reviewed journals and transactions However these 15 modifications are just a few examples of the nu merous options available in TonyPlot For more details consult the TonyPlot Manual or contact your local Sil vaco sales and support office for more information VICTORY Data from multiple files Drain Curent A Gate Voltage V Figure 1 Plot of breakdown voltage simulations from sicex10 using default TonyPlot settings April May June 2014 SiC MOSFET Breakdown Simulation Effect of Layout and Trench Geometries Hump Effect a e m e a m O e Drain Current pA 90 Degree Layout Vertical Trench Rounded Layout Vertical Trench Rounded Layout Sloped Trench 10 Gate Voltage V Figure 2 Plot of breakdown voltage simulations from sicex10 Modifying the TonyPlot settings as described in this document converts Figure 1 into a publication worthy figure In this example the plot is modified in TonyPlot in the following ways 1 Modify Drain Current units from A to uA Us ing Plot gt gt Display gt gt Functions add Drain Current 1e6 to Graph Func 1 click ok Then in the display window deselect drain current from the list of Y Quantities and select Function 1 This will
20. gy hot carrier breaking the bond with a single interaction and the third involves many lower energy cold carriers exciting a vibrational mode to higher and higher energies until the bond breaks These two different carrier mediated processes are necessary in order to explain some aspects of Hot Carrier Degradation 3 Along with that work we refer to the hot carrier pro cess as single particle SP and the cold carrier process as multi particle MP First we describe the single particle process The time evolution of the interface charge is as sumed to be of the form N r t N_ 1 0 exp t K SP n 1 Volume 24 Number 2 April May June 2014 for electrons where N r t is negative interface charge density and P r t N 7 1 0 exp t K SP r 2 for holes where P r t is positive interface charge density The quantities N and N represent the saturated values of negative and positive interface charge density associ ated with the SP process and the time is t in seconds The reaction rate for this process at position r is given by Ky SP r J RE DAD A EJS E E JdE 3 where f E r is the anti symmetric part of the carrier dis tribution function 9 E is the density of states and u is the group velocity For electrons the function O E Ep is defined for E Ey where j EEN Osp E E Opo Cr 4 where the Boltzmann energy K T acts as an energy scale This is known as a soft threshold
21. le value of interface charge density and in Figure 10 itis seen that the maximum of interface charge April May June 2014 Position dependence of MP Acceptor degradation charge along the Si Oxide interface after 100s of stressing gt Mict ne Figure 10 Trapped interface charge density from MP process Threshold Mullen shift obtained by stressing at two Al ifferent drain biases E a N S gt Threshold Voltage Shift Volts WwW Drain Bias 4 V Drain Bias 3 V m S vI AL 0 Stress Time seconds Figure 11 Threshold Voltage shifts due to MP process as a func tion of stressing time density is at the same position as the maximum accel eration integral The simulation was performed with the same degrada tion times as before and for drain biases of 3 V and 4V The resulting shifts in threshold voltage are shown in Figure 11 At a drain bias of 2 V the shifts were negligible Position dependence of SP Acceptor degradation charge ong silicon oxide interface Figure 12 Trapped interface charge density from thermal pro cess The Simulation Standard Threshold YORE shift ACID after stressing at a Gate Voltage of 12 V Threshold Voltage shift Volts ER ER Ww N E AA m ea T i inil S vI 1 0 10 Stress time seconds Figure 13 Threshold Voltage shifts due to field enhanced ther mal process as a function of stressing time The final m
22. mescale of the degradation stress ing Figure 17 shows the evolution with stressing time of the interface charge along a part of the interface The posi tive interface charge generated then reduces the drain cur rent at 5 V with the current reducing with increased stress time The percentage change in current is shown as a func tion of stressing time in Figure 18 This simulation shows good qualitative agreement with experiment April May June 2014 Change in current Degradation of current in linear regime Simulated data 101 102 Stress Time minutes Figure 18 Simulated degradation data Linear drain current References 1 2 3 4 9 Atlas User s Manual Silvaco 2014 C Guerin V Huard and A Bravaix General framework about defect creation at the Si SiO2 interface J Appl Phys Vol 105 2009 114513 Starkov S Tyaginov H Enichlmair J Cervenka C Jungemann S Carniello J M Park H Ceric and T Grasser Hot carrier degradation caused interface state profile Simulation versus experiment J Vac Sci Tech nol B Vol 29 01AB09 1 8 2011 S Reggiani G Barone S Poli E Gnani A Gnudi G Bac carani M Y Chuang W Tian R Wise TCAD Simulation of Hot Carrier and Thermal Degradation in STI LDMOS Transistors IEEE Trans Elec Dev Vol 60 No 2 2013 pp 691 698 D Ventura A Gnudi G Baccarani A deterministic ap proach to the solution of the BTE in se
23. miconductors Rivista del Nuovo Cimento Vol 18 No 6 pp 1 32 1995 The Simulation Standard Simulations of Deep Level Transient Spectroscopy for 4H SiC 1 Introduction Silicon carbide is expected to be an excellent device material as high voltage and low loss power devices Recently SBD Schottky Barrier Diode and MOSFET based on silicon carbide have been realized 1 3 however those devices have some problems for its reliability and control of the IV characteristics The problems are related to defects in the bulk and at the interface of insulator semiconductor The concentration 5e12 cm of the defects is 2 orders higher than that of silicon 4 and so the defects cause degradation of device characteristics The investigation of the defect property is important for the improvement of the device performance The DLTS Deep Level Transient Spectroscopy is one of the method used in measuring material properties such as energy levels and electrons and holes capture cross sec tions The device simulator Atlas can specify an energy level and a capture cross section and then can simulate the DLTS signal So we can calibrate the defect proper ties to the DLTS measurement data accurately and the de rived defect properties can be applied to the simulations of device characteristics In this article we demonstrate device simulations of the DLTS signal for a SBD structure with the Z1 Z2 center trap of carbon vaca
24. n Efficienty 0 1 0 15 0 2 0 25 Alq3 Thickness Micron Figure 2 Light extraction efficiency at a wavelength of 524 nm with different a Alg3 thickness and b ITO thickness Light Extraction Efficienty Flipped OLED structure Microns Micron Figure 1 Scheme of a flipped bi layer OLED layer OLED Figure 1 consisting of a Ag layer a Alq3 layer a hole transport layer HTL an ITO Layer and a glass substrate The device has been flipped up and down with the substrate on the top A dipole located at the HTL and Alq3 interface denoted by the yellow dot in Figure 1 will be analyzed as the light emitting source Note that no electrode specification is needed here Optical output coupling at wavelength of 524 nm 0 1 0 15 0 2 0 25 ITO Thickness Micron ATLAS Emission spectrum of the multiple layer device Emission Yield gn 49 A gt si u c Q Pp a ja O ml Y v a E a Wavelength um layer material After specifying the refractive index of each layer the optical simulation can be run simply using SAVE state ments without any SOLVE statement as follows save x 50 y t_alq3 l wave 0 524 n surf 1 d orient 1 angle out 90 dos maxn 20 opdos total dat where x and y defines the location of the dipole l wave specifies the wavelength in micron n surf specifies the real part of the surface refractive index d orient 1 means a randomly oriented dipole is considered angle out spe
25. nal state and the next lower vibrational state respectively These are modelled by the expressions 8 P V exp ho K T Ky MPX and P Visor Kp MP x 9 where v is an attempt frequency and hw is the vibra phon tional mode energy The acceleration integral is 10 K MP x RE n g E u E o EJE dE mp where f E r is the anti symmetric part of the carrier dis tribution function The cross section o EE is given by the expression eh mp h h E E ot EE 0 EE 11 Because these processes depend on cold carriers the threshold energies are less than the threshold energies in the SP process After some mathematical manipulation and simplification the density of traps created by the MP process is given by 12 NI 1 2 Pai Pe 10 exp Ct P d pass d N r t Ne for electrons where N r t is negative interface charge The Simulation Standard Page 2 density and 2 P x t N NI 1 Be 1 0 exp HP 13 for holes where P r t is positive interface charge density NI is the number of bending mode vibrational levels in the Si H bond Analysis of equations 12 and 13 shows that the time evolution depends only on the emission rate The saturation level depends on the unpassivated bond densities N and N ratio of depassivation rate to passivation rate and the ratio of P to P raised to the power of NI This last ratio will be
26. ncy in the bulk 2 DLTS Measurement The DLTS measurement can be applied to simple device structures like the PN junction device the Schottky de vice and the MOS device as shown in the Figure 1 5 Diode Pulse time t P Pulse voltage gt Depletion region Schottky AY Electron capture Lo Vr Reverse voltage Q Z Z Q 3 y o Metal N Electron emission Depletion region t 0 sec at the start time of OO electron emission Figure 1 DLTS measurement applied to simple device struc tures The Simulation Standard electron DLTS signal Electron O o o 0 capture temperature Y Q Q 3 y O Electron emission C2 F Zoom in t 0 sec at the start time of electron emission Lol Lo Le lelle A UL tl sec t2 sec lejlel Lo LL Figure 2 Procedure to obtain the DLTS signal The Schottky structure is suitable to the investigation of the traps in the bulk semiconductor with an uniform doping The DLTS signal can be obtained by the follow ing procedure 1 A reverse voltage is applied to a device creating a depletion region As a result nearly all traps have emitted an electron 2 OV is then applied to this device for a certain time such that nearly all traps have captured an electron This time is called pulse time 3 Finally the device is biased back in reverse mode in a very short time and this reverse bias is maintained As sho
27. ns 3 and 10 In a similar model Starkov et al 3 used Monte Carlo simulations to estimate the carrier distribution function Reggiani et al 4 used an analytical formulation for the carrier distribution func tion with parameters derived from the Spherical har monic expansion solution to the Boltzmann transport equation This approximation was made to improve calculation speed The Atlas implementation of the BTE solver is sufficiently rapid that a further approximation April May June 2014 Velocity Field curves for Electrons A Results from Boltzmann transport equation solver 107 106 w E y U 9 w gt a Donor concentration Donor concentration Donor concentration 101 102 edt 104 102 Field V cm Figure 1 Homogeneous velocity field curves for electrons of the carrier distribution function is not necessary The BTE solver is based on the formulation of Ventura et al 5 The equation for the zeroth order expansion f of the carrier distribution function is LENE E Z ie CE Eu Exe 3 g E c g E hw Ny f E hw N f E 15 9 E hw No f E N fE hw 0 where E is energy in eV g E is the density of states in meu Fis field in V m T E is a scattering lifetime in sec onds u is the group velocity in m s c is optical phonon scattering coefficient in m J s N is the optical phonon occupation number and the optical phonon energy is hw in eV Nop is the optical phonon
28. occupation number plus one simplified as follows Ny N 1 exp qhw K T N 16 where K is Boltzmanns constant and Tl is the lattice tem perature The first order expansion f is then obtained from f qu E u E F Se 17 The lifetime t E is derived from the carrier scattering mechanisms Scattering mechanisms which are included by default are optical phonon scattering acoustic phonon scattering and ionized impurity scattering Impact ion ization scattering can also be included if required Quan tities such as carrier density drift velocity and energy can be calculated from the carrier distribution functions For example the drift velocities as a function of homoge neous field are shown in Figure 1 for electrons and Figure 2 for holes Results are shown for three different values of dopant concentration April May June 2014 Velocity Field curves for holes Results from Boltzmann transport equation solver Drift Velocity cm s gt Acceptor concentration 1016 cm43 Acceptor concentration 1058 cm43 gt Acceptor concentration 10 cm43 102 3 104 102 Field W cm Figure 2 Homogeneous velocity field curves for holes To initialize Atlas for solving the BTE the flags BTE PP E for electrons and BTE PP H for holes must be set on the MODELS statement After the BTE has been solved for a specific bias set Atlas includes the acceleration integrals when it saves the structure to file S
29. olutions www silvaco com Page 12 April May June 2014 Hints Tips and Solutions Q How can I calculate light extraction efficiency in an OLED or LED with pure optical simulation A Calculation of light extraction efficiency or optical output coupling efficiency is often needed in simulat ing a light emitting device LED such as an organic LED OLED It is best to perform these calculations without running electrical simulation in the device as parameters for new materials are hard to obtain and generally un necessary in calculating light extraction efficiency More over a pure optical simulation will save simulation time and avoid any potential un convergence in the electrical simulation The above mentioned simulation is able to be carried out in Atlas In the simulation complete channels of power dissipation from an electric dipole e g an ex citon are analyzed and the light propagation and dis tribution is determined by a matrix method Ref 1 contains physics details The only required material parameter for the simulation is the complex refractive index at a given wavelength or within a wavelength range of interest Since the light extraction calcula tion in Atlas can only be done on top of the device the device has to be created upside down if the light is collected from the substrate A scheme of a flipped bi Optical output coupling at wavelength of 524 nm _ extract_eff Light Extractio
30. tegral at 2V drain bias logarithmic scale Acceleration Integral for MP process Drain Bias 4V Gate Bias 2 V U gt cceleratio 9 79 0 0 1 0 2 03 04 05 06 07 68 0 9 1 Microns Figure 9 MP Acceleration integral at 4V drain bias logarithmic scale In order to study the MP process in isolation the SP Keldysh cross section O was set to zero and the MP Keldysh cross section O po was set to be 1 0 x 10 cm with default values for other parameters including a threshold energy of 1 eV The default parameters give a value of P of approximately 0 036 second and so at 100 seconds the time evolution will be essentially com plete The saturated dangling bond density N was set to 1 x 10 m With a gate bias of 2 V a BTE solution was obtained at a drain voltage of 2 V and also at a drain Voltage of 4 V The MP Acceleration integral is shown in Figures 8 and 9 for these two bias points There is less difference between the two cases than for the SP pro cess due to the lower threshold energy From Figure 6 it is shown that the distribution functions are very similar up to about 1 5 eV and consequently give similar con tributions to the MP acceleration integrals in this range Because of the lower threshold energy and higher value of cross section the values of the MP acceleration inte gral are much higher than the SP acceleration integral under the same conditions High values are required to give a sizeab
31. wn in Figure 2 electron emission is time dependent and the relaxation process changes the capacitance By measuring the difference of capaci tance between tl and t2 you can measure tempera ture dependence of the capacitance difference That temperature dependence is called DLTS signal 3 DLTS Simulation of a Schottky Structure with a Single Trap in the Bulk The DLTS simulation needs to do transient simulation and AC small signal analysis simultaneously And the ca pacitance difference depends on the trap concentration If the doping of N is 1e15 level and its trap concentration is less than the order of 1e13 1 cm the capacitance dif ference becomes less than the order of 1e 19 F and it is very small This simulation needs to calculate the capaci tance considerably accurately April May June 2014 Temperature dependence of the capacitance difference Data from multiple files XA DLTS_a_5 6e 14 dat A DLTS_a 5 6e 15 dat Difference of capacitance 240 260 280 300 320 340 360 380 100 Temperature K Figure 3 Two DLTS signals Red line sign 5 6e 14 cm Green line sign 5 6e 15 cm Figure 3 shows two results of the DLTS simulation The simulation condition is described as below e Structure Electrode as shown in Figure 4 4H SiC substrate Depth 12um Dopant N type concentration 5e14 cm N type concentration 1e20 cm by distance of 2um from cathode Anode Schottky barrier height 1
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