Wavetek 29 Maintenance Manual
Contents
1.2. PRS m i R o SK4 08 SB 5 5555 sn a m C77 c76 1026 ne y 58855 P Put B R111 Bi cay n c9 scz R141 5 9 P A 2 D O 1027 p o U BUZZ c es AT3Z m z n a s R108 013 B w m 5 S 7 ait E U o ica 1C35 ta EA Re CX TTi rez IN 7 Ge TERI 4 Riaz
3. C104 BEEP L 1 JI xTLI 22P 2 11 22 a3 42 54 63 74 R121 C185 12 Maz CPU AND MEMORY ta fu ARC RS232 INTERFACE Eta 3 4 itis 50y yee 22P BVERU avcPu RAMSEL BUZZ pa Da RAMAG AM PJ1 18 PJI 5 1C36 ni Di RAMA 34 RAMSAVE 1041 Put 11 Put 8 E vee HD64 88 i13 BAY Mines D2 3 RAMA2 QvCPU z eno sa 28 D3 D3 RAMA3 1C34 A BMHZ em BVCPU 18 GND 64 7 BY D4 RAMA4 5 35 ON E BUMGEE DS D5 LCA RAMAS TRA T T PJ SEMI 21d 8 i See ao Sige 24 22 DE D6 84 PLCC RAMAS BVCPU E gg Q TENDO fau 5yCPU T Be Dz xC48B2APCB4 RAMA7 BVCPU 10K 1C35 A g Q prs08 35v cds a Ag 1G1010 RAMAB gg C TEND 32 e M M RAMAS PJ1 7 SC1 21 Heuer j 1 7 Q oreat AVERI 1g Je 128KX8 A A2 RAMDA A3 SE BAN 1C35 8 4B 14 AQ 12 JOND Wa A3 CDC RAMD 48 TXAB AB 15 Ai 11 AB 4 A4 A4 RAMD2 O Af A1 AB RECEIVE IN P313 O 4 Dos 4 PA8 16 Az m iz AB RAMD3 avcPu pcpe A2 i3 A2 AG AG FAMA z 46 17 3 A3 1C34 B cisa A3 A3 A7 DOTE 45 19 A4 8 Ad A7 RAMD5 Ta Qnrsa A4 30 AB
4. RI71 RIBI 5VA Ic2a 4 5VA 13 20K 20K ERAT v7 s RI78 3k3 2 a P POWER SUPPLY s SZ D26 R149 360 cep ae ES z ava E97 8 6 8132 8133 5 12 TLO74 SOEN IBaN TEN R178 IG2N 20K 43K R172 14 SYM 4K7 IC25 C I 3 e La74 ICZSZA y HC4853 Dacste 68 VDD VREF 3 e z eS 12 b 4K7 13 7 Risa Je F HC4053 3 CLK AIENEA 15 AMSQ gt y 15 2s T XT 4 AM RIGS TLA72 o 1024 D ES z DACDAT z a z 4 12 aya E56 ck 2 ES Z he e BL Ne DATA VOUT o BU c Ya R148 RISI LTCI257 13 t4 CLKCAL C6 Riza RBA 16V 18K 33K SINESQ DACLOAD 3 Ya e C58 330P ak 5 VA 13 BP IC25 B AMINTEXT O LOAD UA IE 5 ICI2 D AVA Hc4gs3 l a 22N 52 T 3 x 278 pour GND UDA VDD EEES R129 10K PZE ENA SM GVA SEI Si WAVOFST gt C147 ces ces ce7 cea ces c7e c7 JANE RI62 SER 4 5 SHDa sa 7 2 a 4K7 5 43 18K dez ZVA AMSQ DB REG SHEN E 0 0 0 0 0 0 0 6 X m 6 5VA ic AM v SC31 8 X 33QN es BVA AMSO gt C3 C BVA FB2 16V DS OPJs 2 e Opis 1 C72 a ae
5. DE STRZ M a8 pl IB RIBI S El 8 Ti y sca PJS STR3 u he O C44 3 Rito BATT cza 023 D NAS m PJ7 sk3 R112 gt E u M LK2 a z XTL1 R121 ABS 1c15 5 R115 R114 F B R113 PJ2 R83 HER p n R77 gt 5135 azas R71 z H Le R137 StS d ui R138 cee ii R138 SC15 a 2 a R134 sc17 hi 5 L3 R140 1014 b R135 n i R136 4 sca 5 Ki svcPu scs 1045 0 E E 15v e PEST Ese Lia lt EVA a c Cr r r mr c c E VA 1036 H e n T 5VA o T 1041 15V T MA in p C135 2 z Ep TG1818 MAIN TPOV 4 7 5 35555 2320 MW JT LA are de n 1C19 n RP2 3 n M4 4 PEE N ars E gt 4 1039 STR o m ezas R173 Z R158 R118 a 1c1 RE 028 E 8 R58 R1 La uu x RI R124 5 CX SE M 1 T A T 05 c14 5 z V lo Do no IC13 z lolo Ls R184 p ij E O R178 2 E21 2 n cs 5 A 3 c22 RULES a R157 i C42 RLI o C121 R53 M o u w u LICG R76 E R65 mies 8 z o E R156 N z Y Ss O R62 s u u D R169 R154 5 PJ4 E R R24 R66 E N 8 y 1044 ILES Tez s Ree g 47 pis LR R21 5 28 me REB S p 259 m R17 o al rer B ID NET R m a E B R28 8 ES 5 b n R28 5 u E PIS En FB4 lo RIS pca3 a 2 Ld E34 c17 E 4 T36 5 R176 3 4 m R27 R3 o pn G ce R175 S e R95 o x S Je R37 E 3 w n 1 5 z N R98 5 MULTIPLIER PCB 5 hd cash a EM el llo PJ12 5 S m D in 1011 R168 el N n r N RES R159 Ela a6 m R44 m 1022 D lo 114 S E c120 5i SC34 1C3 unns ty m C52 N U s M Y R37 2 Fas 0 R RB4 T j Ics M 5 y R38 XTL2 5 5 R39
6. pillars 5 When re assembling the instrument ensure that the correct fastenings are used Circuit Descriptions General The following sections should be read with reference to the block diagram and the circuit diagrams A Remote Out O Gontrol GPIB RS232 In Out Square wave Comparator Trig Sweep Out Attenuators DC In Offset Simplified Block Diagram DDS Principles 10 In this instrument waveforms are generated by Direct Digital Synthesis DDS One complete cycle of the waveform is stored in RAM as 1024 10 bit amplitude values As the RAM address is incremented the waveform values are output to a Digital to Analog Converter DAC which reconstructs the waveform Sinewaves and triangles are subsequently filtered to smooth the steps in the DAC output The frequency of the waveform is determined by the rate at which the RAM addresses are changed Further details of how this rate is varied i e how the frequency is changed are given later in the DDS Operation section it is sufficient to know that at low frequencies the addresses are output sequentially but at higher frequencies the addresses are sampled The major advantages of DDS over conventional analog generation are e Frequency accuracy and stability is that of the crystal oscillator e Frequencies can be set with high resolution from mHz to MHz e Low phase noise and distortion e Very wide frequency sweeps are possible e Fast ph
7. pjs 18 D4 FRST2 PROG DONE non mO PI54 B4 D4 DID4 J 44 MA RTRIG 10K z PJ2 28 5 15 32 D3 FRSTT 1C37 E O PJ4 16 PJ6 16 QjnEsET avcPu Pi5 13 O 85 D5 DIOS CELK 7 14 33 PJ4 14 pj amp 14 D2 RL16 BB E 4884EN PJ5 14 O BE D6 DIOS 1 0 BVCPU 8 13 34 PJ4 12 loja 12 2 Di 3k3 GND GND PJS 15 O a 07 B 42 380 04 PIA 10 Da 1 35 A O J PJ6 18 DIO8 LSD _ eis 15 O TER ge o Model 29 Main Pcb Sheer or 3 PJE 25 O Or SHELL 75160 TRIGGER SHELL BVCPU Digital Section and GPIB
8. 7 A4 DOUT RAMD6 RECEIVE OUT PJ1 8 8 AB ya AB W SVeeu 5 51 21 A6 6 AS Q wa RAMD7 VBAT sa M AB 22 7 s 8 A7 Mr Q LIR RAMDB AD Da sg PXA 7 723 AG 2 e roen LORO HDC RAMDS A RAM ot WRAM7 14 14 14 5 ca L zk sc24 67 P B 724 8 26 8 n RAMD1 0 A2 SKXB pa WRAMB T Mes Ya Li TRES BB 3 25 Ala 23 AO PSB RAMD1 1 A3 D3 WRAMB I 1034 1636 AL 1x5 ata ata A4 Da WRAMI a 74HC14 14c89 74HC32 26 Aii 25 Att rogi STNCD WRAM 1 END 14c88 END END 3 Att 27 i2 4 WA PSB2 DACCLK A5 D5 7 7 7 QneseT 12 728 13 za KIA PSB3 AB D6 j BVCPU BVCPU 7 Q BUSACK 13 Mm zg 7413 FPGADAT Pead Bik RAMOS RAMES NE I BUSRO A14 TIE A14 BVCPU pasa RAMWE RAMWE AB WE IC34 C 1C42 A A15 39 HE gt A15 De PSB6 24 A9 cs 12 3 31 2 D R114 A 21 si R112 NK MB zz are 10K PSB7 TRIG TRIGGER WSELO ata DE ia 5 32 A17 n2 HESOS YM WSEL 1 23 1C37 F 10K Ta WAIT M7 Fa ERIT TWER 13 63 PSBB SSPHAHI ooo cs 3 r 9 INTa Ata ME 4 pa 54 FRGATNTT PSB3 INIT TTLOUT TTEOUT WSEL2 A12 GND TRIGGER Q iNTI A18 pi EVENTCLK GATE IC35 C EPIBINT 12 15 DB TIMER GATE EPIBI i C int2 uz DDSCLK 1a 8 8 17 sA MCLK D3 13 ia 57 Ma DONE FPGADONE zje Da 1 D 5yCPU FPGAPROG BVCPU RAMWE 1635 D SB duaur pa 2 ins Mi PROG 38 Df 20 M2 CCLK FPGASTB Hiig RIA 13 11 Dt n2 D6 10K 100K 11 61 38 21 TDA WRAMI 1 NDISE ur ss Qj 02 ig 53 da BE en GER 03 Ta BVCPU Wa TORO 10E D4 5VCPU SPARE GATES RED 63 42 D5 3a 31 GND DDS FPGA AND WAVEFORM LOOK UP RAM naan Ee
9. 8 RAISED CKHDPZ MAINS INLET 20234 0032 SCREW M4 X 25 PNHDPZ ZPST TRANSFORMER 20236 0010 SCREW M4 X 12 TAMPERPROOF EARTH 20661 0272 SPACER RND 21mmlIDx15 8mmL NYL TRANSFORMER 22115 0280 TRANSFORMER 22520 0170 FILTER IEC INLET FUSE 22588 0004 BNC SKT BKHD 50R STANDARD 33331 3570 REAR PANEL PRINTED CASED PARTS 59120 0801 Part Number Description Position CHASSIS EARTH STRIP FEET CHASSIS FRONT PANEL CHASSIS SPACERS PCB SPACERS CHASSIS EARTH STRIP CHASSIS REAR PANEL 23 CASED PARTS 59120 0801 continued Part No Description Position 20063 0010 SCREW NO6 X 3 8 NIB HDPZ ST AB CASE UPPER 20210 0101 NUT M3 ZPST FRONT PANEL EARTH STRIP 20213 0010 CAPTIVE NUT SNU 1219 17 00 CHASSIS 20234 0012 SCREW M3 X 8 PNHDPZ ZPST EARTH STRIP CHASSIS 20234 0027 SCREW M3 X 6 PNHDPZ ZPST CHASSIS SPACERS PCB SPACERS 20234 0029 SCREW M4 X 12 PNHDPZ ZPST FEET 20612 0011 WASHER FIBER M3 PCB SPACERS 20661 0219 SPACER Hex M3 x 15 NPBR 20662 0201 BRACKET PLAS FOOT 3786 7001 20662 0520 FOOT PVC PV2629 BLACK 22315 0232 FUSE 250MA TL HRC S F UK EURO 22315 0233 FUSE 500MA TL HRC S F USA 22491 0010 MAINS LEAD UK 22491 0020 MAINS LEAD EUROPE 22491 0040 MAINS LEAD USA 22575 0202 SKT 2W 156 20AWG YELLOW IDT PJ5 8 9 ON MAIN 22575 0205 SKT 5W 156 20AWG YELLOW IDT PJ7 ON MAIN 22575 0206 SKT 6W 156 20AWG YELLOW IDT PJ4 ON MAIN 31711 0080 BEZEL HALF RACK 3U CASE 33171 0130 SPRING FOOT 33537 0720 CASE UPPER 33537 0730 CASE LOWER 43171 1390 C
10. ZITA BP a NE IC12 C 5 TLO074 AVA C46 IBAN n AIBA FUSIBLE BVA C45 SBE AUX OUT TLA74 2 s AME EVENTCLK Et De E VBE 22P Bie 5 5VA 8 DCOFFSET 3 5 n 8 B mu V1 V2 oo o 15V IC21 FB3 uu z WAVOFST e miu C26 en HCT244 a ii s Eva CS 7885 ey m IBaN pur se ISV R rruour 122 T RAS me C48 SENE DU 3 PP UP ed MA BU cL C4 C28 cs 4K7 e 22P ci e C24 A BV BVA iau iaaN tau 5 14 R86 22P 3 5 TLB74 z 5 12 8 ma A d D P14 2 IBU COMM gt TLO74 BP R68 b d EP aaa m2 Pz 16 R87 35v cz 7 50 LEVEL 2k FL C27 VEE 188 E El 2 FANS OVA RE s BON SYNCO 15 5 BBB 1A au 2 5 15V SVI IC31 4 avcPu Den BVA 7 R68 15V ava E 17 gt 3 R88 IK5 YEB C134 R83 13 7 im cn ls le e RIBS 12a e C24 co T MEN RJE 1 I 3 ava BON CI2 VA R5 750 JAEN R7 an O 6 x 128 GON 7 12K 15V B 12 e UL 3 e EXT T VCCD VCCA Ya 3 3 VA Hb 13 5VCPU 4 RI A u HFSOSYM ES EC PER BVA s ES poscik 2 lag ES ae FUB in bas M 5 no a CZ 5 i 3 R84 x 19 ZA GER T Sn 330 TUN 12a 2020 e 14 PJ8 20 ak EB AVA RLI B 2 T R65 e 34 C25 e YCE 1 ya TRIGGER wramg P pale MSB 4 gt RE 470 4 DON 4 3 L bs wrame RS 2 R58 CI4 CI6 cig cza poz 3 OVER naz RB 3 BR 47P 100P 100P 332 o IEB A VEE 100K WRAM7 u x ES MEW PER NES28 5 7 WRAME m AQUT 39P EE Lap R63 e EJ O ABE PB 5 PM ia A L3 5 2UH L4 4BUH LR 15 4 3uH 470 TE pEr R9 5 R21 R20 12K avcPu WRAM4 OU
11. and in this manual Caution refer to the accompanying documentation incorrect operation may damage the instrument terminal connected to chassis ground mains supply OFF mains supply ON CER alternating current EMC This function generator has been designed to meet the requirements of the EMC Directive 89 336 EEC Compliance was demonstrated by meeting the test limits of the following standards Emissions EN55011 1991 for industrial scientific and medical ISM radio frequency equipment Group 1 Class B limits were applied Immunity EN50082 1 1992 Generic immunity standard for residential commercial and light industry Test methods and limits used were a EN60801 2 1993 Electrostatic Discharge 8 kV air discharge b IEC801 3 1984 RF Field 3 V m c IEC801 4 1988 Fast Transient 1 kV peak Cautions To ensure continued compliance with the EMC directive the following precautions should be observed a connect the generator to other equipment using only high quality double screened cables b after opening the case for any reason ensure that all signal and ground connections are remade correctly before replacing the cover Always ensure all case screws are correctly refitted and tightened C In the event of part replacement becoming necessary only use components of an identical type see the Parts List Installation Check that the instrument operating voltage marked on the rear panel i
12. other than 0 9 are pressed while entering the password the message INCORRECT PASSWORD will be shown Using the Password to Access Calibration or Change the Password With the password set pressing EDIT following by CAL will now change the screen to ENTER PASSWORD When the correct password has been entered from the keyboard the display changes to the opening screen of the calibration routine and calibration can proceed as described in the Calibration section If an incorrect password is entered the message INCORRECT PASSWORD is shown for two seconds before the display reverts to the Main menu With the opening screen of the calibration routine displayed after correctly entering the password the password can be changed by pressing the EDIT key and following the procedure described in Setting the Password If the password is set to 0000 again password protection is removed The password is held in EEPROM and will not be lost when the memory battery back up is lost In the event of the password being forgotten contact the manufacturer for help in resetting the instrument 17 PCB ASSY MAIN 44912 0270 Part Number 20234 0011 20613 9401 20670 0130 20670 0135 20670 0200 20670 0340 22010 0610 22040 0920 22042 0181 22042 0182 22042 0183 22160 0002 22240 0020 22240 0050 22315 0450 22315 0453 22469 0203 22573 0041 22573 0202 22573 0205 22573 0206 22574 0400 22575 0009 22575 0038 22575 0065 22575 0066 22575 0
13. 100 23185 0000 23202 0100 23202 0102 23202 0360 23202 0470 23202 0560 23202 0680 18 Description SCREW M3 X 10 PNHDPZ NPST WASHER TO220 ADHESIVE HEATSINK PCB MTG 25MM HIGH CLIP GP02 FOR PCB MTG H SINKS HEATSINK PCB MTG 50MM HIGH T0220 CLIP ON HEATSINK 29DEG W BATTERY 3V LITH 20MM BUTTON BEAD FERRITE LEADED INDUCTOR 4 3UH INDUCTOR 4 8UH INDUCTOR 5 0UH CHOKE 1 AMP VHF SUPP RELAY TYPE 53 5 24V RELAY TYPE 47 24V FUSE 500Mat SUBMIN PCB MNT FUSE 1 5AT SUBMIN PCB MNT VERO PIN 18 0223K HEADER 2 WAY STRAIGHT HEADER 2 WAY STRAIGHT 156P HEADER 5 WAY STRAIGHT 156P HEADER 6 WAY STRAIGHT 156P SKT 9W R A D TYPE RS232 SHORTING BLOCK RED HEADER 6 WAY STR 0 1P HEADER 20 WAY 2X10 STR SKELN HEADER 40 WAY 2X20 STR SKELN HEADER 34 WAY 2X17 STR SKELN RES ZERO OHM RES 10ROF W25 MF 50PPM RES 10R2F W25 MF 50PPM RES 36ROF W25 MF 50PPM RES 47ROF W25 MF 50PPM RES 56ROF W25 MF 50PPM RES 68R0F W25 MF 50PPM Parts List Position FOR PJ1 FOR SK1 4 SK1 FOR SK1 4 SK2 3 4 FOR Q8 BATT FB1 6 L5 L4 L3 L1 RL1 2 3 RL4 5 FS1 3 FS2 FOR PJ10 LK1 2 PJ5 8 9 PJ7 PJ4 PJ1 FOR BATTERY PJ11 PJ6 PJ2 PJ3 R58 R121 147 R53 56 R37 40 185 R23 32 R39 R36 PCB ASSY MAIN 44912 0270 continued Part Number Description Position 23202 1100 RES 100RF W25 MF 50PPM R2 22 24 45 46 81 82 103 165 167 186 23202 1120 RES 120RF W25 MF 50PPM R85 86 87 88 90 91 97 98 99 159 23202 1150 RES 150RF W
14. 100PPM MRS25 R141 23206 0412 RES 41R2F W60 MF 50PPM MRS25 R51 52 54 55 23206 1200 RES 200RF W60 MF 50PPM MRS25 R47 48 49 50 19 PCB ASSY MAIN 44912 0270 continued Part Number 23206 6100 23222 0047 23301 0435 23301 0443 23427 0268 23427 0325 23427 0357 23427 0374 23427 0385 23427 9205 23427 9206 23427 9210 23427 9218 23427 9221 23461 0020 23557 0530 23557 0550 23557 0612 23557 0647 23557 0664 23557 0673 23557 9122 23620 0236 23620 0242 23620 0246 23620 0249 25021 0901 25061 0200 25115 0907 25130 0903 25131 0224 25131 0226 25174 0222 25336 5590 25341 0214 Description RES 10MOF W60 MF 50PPM MRS25 RES 4R7J W33 MF FUSIBLE NFR25 RES NETWK SIL 1K0 X 5 RES NETWK SIL 22K X 8 CAP 22PG 100V CER NPO P2 5 CAP 10NZ 63V CER HI K P5 CAP 33PG 63V CER N150 P2 5 CAP 100PG 100V CER N150 P2 5 CAP 39PG 100V CER N150 P2 5 CAP 47PG 100V CER NPO P2 5 CAP 15PG 100V CER NPO P2 5 CAP 3P3C 100V CER NPO P2 5 CAP 330PK 100V CER MED K P2 5 CAP 12PG 100V CER NPO P2 5 CAP SM0805 100NZ 50V CER Y5V CAP 100U 16V ELEC RC2 P2 5 CAP 10U 16V ELEC BIPOLAR P2 CAP 1U0 50V ELEC RE2 P2 CAP 10U 35V ELEC RE2 P2 CAP 1000U 35V ELEC RE2 P5 CAP 22U 35V ELEC RE2 P2 CAP 4700U 16V ELEC RE2 P7 5 CAP 1NOK 100V P E 435 1 P5 CAP 22NJ 100V 596 P E P5 CAP 100NK 63V P E P5 CAP 330NK 63V P E P5 DIO 1N4148 B R LED T1 ROUND 3mm RED DIO 1N4002 B R DIO ZEN 5V1 W4 DIO ZEN 18V 1W3 DIO ZEN 6V2 1W3 DIO VARICAP BB909B TRAN PNP BC
15. 23 C R128 3 12M 8 74HC80 R125 1 K as 134 D4 2N 889098 BVCPU ta 74Hcoa CLKCAL 74HCQ28 EXTCLK CLK DDSCLK 15V UT T Q Patt 1 T Q P1112 BVCPU ry PJ11 6 YJ 8 O Patt 4 BVA Q Pitts 15V O Pitts BVA IC14 5VCPU T 16 osz YDD gsl vss R140 TE PJ2 8 PJ2 3 PJ2 5 O PJ2 1 U gt PJ2 6 U gt PJ2 lt O 712 26 vss de 11 pi 4PJ2 40 4094EN BVCPU 15 dn e bd e oe QE 23 13 Ras PJ2 11 LEDLOAD 1 05 ag ee O STR a 14 L O P22 13 SHIFTCLK 3 ES PJ2 24 n a gt 2 PJ2 16 SHIFTDAT ar LS R77 S Bis du ga 4PJ2 25 4 X 682 Model 29 Main Pcb Sheet 3 of 3 Power Supplies and Clock SINE PPULSE MPULSE PRAMP MRAMP SQUARE TRIANG REMOTE OPON SWEEP TRIG AM STAIR GATE FSK ARB K3 5 SZ KB K5 K4 E E E SINE BH E3 TRIAN SQUARE TRIGGER 1 F STO REC RAMP ya PULSE SE L L E E RAMP SYNC Be E PJ8 2 O BUE g 5VCPU k29 K35 k39 K43 K25 k19 K15 kii 7 E E E m ES ES ES E WA mHz X OPON a SYM EBLT SWEEP E E E E L WIDTH d LOCAL m Lk1 PJ8 37 O coL 1 LDI SINE K28 K34 K38 K42 K24 K1B K14 kia O FB 7 m E B Hz Bm ES B oc FA ER 75 2 3 pa CE 1 ARB STAIR FA E E E el da OFFSET el LD2 PULSE dBm F F F gt PJ8 8 p PJB 36 al 4 Y COL LD3 RAMP K27 K33 K37 K
16. 25 MF 50PPM R67 23202 1191 RES 191RF W25 MF 50PPM R176 23202 1220 RES 220RF W25 MF 50PPM R3 113 23202 1270 RES 270RF W25 MF 50PPM R38 168 169 170 23202 1330 RES 330RF W25 MF 50PPM R16 62 23202 1360 RES 360RF W25 MF 50PPM R149 23202 1470 RES 470RF W25 MF 50PPM R44 63 65 23202 1510 RES 510RF W25 MF 50PPM R31 33 23202 1549 RES 549RF W25 MF 50PPM R57 23202 1680 RES 680RF W25 MF 50PPM R21 71 77 89 93 134 140 175 23202 1750 RES 750RF W25 MF 50PPM R15 23202 2100 RES 1K00F W25 MF 50PPM R4 13 61 83 120 152 153 156 158 163 173 174 23202 2137 RES 1K37F W25 MF 50PPM R142 23202 2150 RES 1K50F W25 MF 50PPM R66 23202 2200 RES 2K00F W25 MF 50PPM R68 164 23202 2270 RES 2K70F W25 MF 50PPM R184 23202 2330 RES 3K30F W25 MF 50PPM R35 116 179 23202 2470 RES 4K70F W25 MF 50PPM R34 70 72 73 74 75 154 155 162 166 172 177 178 23202 2820 RES 8K20F W25 MF 50PPM R60 23202 2910 RES 9K10F W25 MF 50PPM R59 130 23202 3100 RES 10KOF W25 MF 50PPM R80 84 101 102 106 109 111 112 114 115 123 124 127 129 143 180 181 23202 3120 RES 12K0F W25 MF 50PPM R17 20 25 27 28 23202 3180 RES 18K0F W25 MF 50PPM R148 23202 3200 RES 20KOF W25 MF 50PPM R132 160 161 171 23202 3270 RES 27KOF W25 MF 50PPM R144 150 23202 3330 RES 33KOF W25 MF 50PPM R151 23202 3430 RES 43K0F W25 MF 50PPM R133 23202 3470 RES 47K0F W25 MF 50PPM R117 118 146 23202 4100 RES 100KF W25 MF 50PPM R14 92 104 110 125 23202 5100 RES 1MOOF W25 MF 50PPM R105 23206 0033 RES 3R3F W60 MF
17. 559C TRAN PNP ZTX214L BC559 PCB Assy Main 44912 0270 continued 20 Position R126 128 R29 30 76 95 96 145 RP1 2 RP3 4 5 C10 39 45 48 64 103 104 C73 75 81 84 92 95 99 121 136 138 C21 32 101 C16 20 62 C22 90 C14 98 149 C63 91 C38 C61 C15 18 SC1 37 C87 C29 56 57 58 148 C105 C1 9 33 34 78 79 80 89 119 120 135 C76 77 C102 C85 C17 C59 C11 13 24 28 35 37 41 44 49 52 54 60 72 88 96 97 117 118 124 127 131 132 134 137 C65 71 147 D3 5 6 8 13 24 26 LED1 D14 21 D1 2 D22 23 D27 D4 Q10 15 20 Q12 Part Number 25380 0229 25380 0230 25386 9300 27103 0040 27106 0513 27106 0517 27106 0606 27106 0628 27106 0633 27106 0634 27151 1000 27153 0080 27153 0180 27160 0009 27160 0012 27160 0013 27160 0020 27160 0440 27239 0000 27239 0140 27239 0320 27239 0510 27239 0530 27239 1000 27239 1010 27239 2440 27239 3730 27253 0020 27253 0050 27253 0060 27256 0020 27400 0130 27403 0010 27412 0030 27412 0040 27413 0080 Description TRAN NPN BC549 TRAN NPN MPS2369 TRAN TIP31A IC NE529N 14 PIN IC LM358N 8 PIN IC NE5532N8 PIN IC TLO72CP8 PIN IC TLO74 14 PIN IC EL2099CT 5 PIN TO 220 IC 2020 8 PIN IC SM HA9P2557 9 IC LTC1257CN88 PIN IC DAC MB4076020 PIN IC V REG 7805 TO220 IC V REG 79L05 TO92 IC V REG 7815 TO220 IC V REG 7915 TO220 IC V REG LM2940CT5 TO220 IC SM 74HC00 IC SM 74HC14 IC SM 74HC32 IC SM 74HC4051 IC SM 74HC4053 IC SM 74HCT244 IC SM 74HC
18. 8 9501 20210 0104 20234 0027 20234 0040 20612 0011 22 Description WASHER M2 5 ZPST WASHER M3 SPRING NUT M2 5 ZPST SCREW M3 X 6 PNHDPZ ZPST SCREW M2 5 X 12MML PNHDPZ ZPST WASHER FIBER M3 Position IC39 BUZZ XTL2 XTL1 S2 Position SW1 K15 K1 14 16 43 LK1 5 8 9 R187 188 R76 78 79 94 131 VR3 LED1 16 PJ8 TO PJ2 MAIN Position J5 PCB J5 J4 52 54 122 123 C32 C31 C33 Position LCD KEYBOARD PCB F PANEL LCD KEYBOARD PCB F PANEL LCD FRONT PANEL ASSY 46912 0610 continued 20030 0263 20030 0266 20037 0301 20038 9501 20062 0700 WASHER M3 ZPST WASHER M4 ZPST WASHER M3 SHK PROOF I T ZPST WASHER M3 SPRING SCREW NO 6 X 3 8 RFLNGPZ ST AB Part Number Description Position 20620 0010 CLIP ENCODER KNOB KNOB 22573 0056 HEADER 16 WAY STR SIL 6 8MM 22219 0050 SWITCH ROCKER DPST SOLDER LUGS 22588 0004 BNC SKT BKHD 50R STANDARD 26100 0160 LCD 20 X 4 BACKLIT 33331 3550 FRONT PANEL 33331 3580 OVERLAY FRONT PANEL MODEL 29 35358 0520 EARTHING STRIP 37151 0320 KNOB ENCODER REAR PANEL ASSY 46912 0600 Part Number Description Position 20030 0263 WASHER M3 ZPST MAINS INLET 20030 0266 WASHER M4 ZPST TRANSFORMER EARTH 20037 0401 SOLDER TAG SHAKEPROOF 4BA EARTH 20038 9501 WASHER M3 SPRING MAINS INLET 20038 9502 WASHER M4 SPRING TRANSFORMER EARTH 20210 0101 NUT M3 ZPST MAINS INLET 20210 0102 NUT M4 ZPST TRANSFORMER EARTH 20213 0010 CAPTIVE NUT SNU 1219 17 00 20223 9001 SCREW M3 X
19. AI K23 K17 Kia gt El O PJ8 5 ES BE E E E kHz E Eg ES FSK 74 5 6 ps ESC 4 LEVEL AM Bo rh b Z OUT ES m LD4 SQUARE mV PJ8 6 LKI PJ8 39 gt l O E coL 3 bie LD5 PULSE K26 K32 K36 K4Q K22 K12 ka Bind ES ES B MHz ES Ej ES T FREQ Ej ES E B BHO 8 g pen CONF 7 pow GATE TRIG dd Ey m z E m LD6 TRIAN EFE PJB 38 y PJB 4 a a e C COL 4 74 LD7 RAMP k2a K21 K30 K31 y PJB I a B lt B B lt se gt CE gt LKA FIELD DIGIT FIELD DIGIT LD15 REMOTE PJB 20 gt l C O oS en d R131 COL 5 588 O O O O O O O O N m N m in y gt om NN pom Y s 18 0 nN oF oF oF oF o x o x o x o x E i 2 0 2 0 2 0 E 2 0 p n c n c n c un fr og og oc 5VCPU PJB 29 R187 R PJ8 32 PIB SE C 3 PJ8 31 CONTRAST PJ8 27 OH vm PJB 33 Model 29 Keyboard Pcb R188 4K7 EUH Sa R PJ8 34 O L 1 un ZVCPU 5VCPU 5VCPU PJB 24 PJ8 23 PJ8 16 PJ8 48 O PJ8 25
20. CBB os R145 s CBi o fe A pa 5 sa N R36 ces z U sa N 7 053 cz R146 c92 ne d a R158 cc m R144 Cad R126 DAN g 1023 OF E ole c93 R125 2 2 a R163 K CT css Oo 3 R33 cst D4 C84 Asa C87 C147 1C12 3 aF E o R52R51 C54 SK1 O z ps ate ase 3 En o R49 Sca m 1C18 sp 585 T bs R4B y na N DS 1C28 R178 R47 52 010 mn n iN sc29 m NE B N D12 2 3 5 s E gt 013 u o SC32 z 4 x ZA 03 n is E B SC27 SC28 miss M e gt ii E 6 a RL3 5 w gt lt DY om m oh a n r a Bza gt Zas E T PJia Nm cog N RZA MAIN OUT DEDDY R133 8 BA CL TETE C134 e e132 IEI R75 pag 25 26 M odel29 Keyboard P cb LI L L016 PJ8 kza Kaa E c a EE 7 fel ajz T 25 fe 5 EE san DISP 2n E K21 K31 R79 Vis sw R84 R131 C K26 R78 K32 K36 k4a K22 Los K23 K27 K33 K37 K41 K16 di LD2 k4 kB O K12 Cu LD12 Loa kia e LKB K28 K34 K38 K42 K24 LD4 K5 ks K17 O Log LD13 Los K2 LK2 Lks 5 LKS K29 K35 K38 K43 Qu O KG kia pL Lota Low LD7 K14 K3 LKI K25 kis LK3 K7 Kit de k19 Loti Lots x Circuit Diagrams 27 PIS 17 FIG 8 PJ5 8 PJB 7 PJ5 6 PJ5 5 PJ5 11 PJ5 10 PJ5 12 PJ5 18 PJ5 19 PJ5 28 PJ5 21
21. NNECTIONS MAIN OUT AUX OUT EXT TRIG Waveform output at 50Q or 6000 selectable impedance Short circuit protection for up to 60 seconds is provided CMOS TTL level signal at the frequency and symmetry of main output Phase relationship between MAIN OUT and AUX OUT is determined by the START STOP PHASE setting External trigger input for Trigger Gate Sweep and FSK operating modes It is also used to synchronize one Model 29 as a slave to another Model 29 as a master Maximum input voltage is 10V REAR PANEL CONNECTIONS CLOCK IN OUT CLOCK IN CLOCK OUT PHASE LOCK VCA IN SYNC OUT TRIG SWEEP OUT INTERFACES The function of the CLOCK IN OUT connector is set from the front panel SYS system menu as follows The connector serves as an input for an external clock This is the default setting The internal clock is made available as an output When two or more Model 29s are synchronized the CLOCK OUT is used as a master to drive the CLOCK IN of the slave units For use as a slave unit phase locked to the master unit Input connector for externally controlled Amplitude Modulation AM Impedance is nominally 6 kQ When two or more generators are syncronized the SYNC OUT connector on the master generator is connected to the EXT TRIG inputs of the slave generators SYNC OUT logic levels are nominally OV and 5V with 50Q output impedance The function of this output is automatically determined by the generator oper
22. ONN ASSY 34W MAIN DISPLAY 43171 1400 CONN ASSY 2W 270MM 48591 0450 INSTRUCTION BOOK MODEL 29 MANUFACTURING CHANGES August 2000 Main PCB becomes issue 4 to accommodate IC2 Multiplier HA2557 in a DIP 24 package on a sub board mounted on a pin header the original surface mount HA2557 is obsolete Details of the change are as follows Add 22575 0038 Header 6 way straight PJ12 35555 3280 PCB Multiplier 27151 0150 IC HA2557 IC2 Delete 27151 1000 IC SM HA9P2557 9 IC2 Note that the following components move to the multiplier PCB FB1 FB5 R45 R46 R165 R167 C30 C31 C117 C118 IC2 omponent Layouts Model29ManPcb
23. PJ5 22 PJ5 23 PJ5 24 PIB 1 PJ5 2 PJ5 3 PJ5 4 PJ5 13 PJ5 14 PJ5 15 PJ5 16 PJ5 25 SHELL or LS161 0000 00000 GPIB INTERFACE PCB 3 1031 SN75182 IC33 GPIB 5VCPU 44912 0259 T gt TN UPD721 m 3 20 25 40 REN REN vec Qr 3 4 19 18 24 2a PJ4 IFE OPJ IFC GND O 4 5 18117 38 NDAC NDAC X4 PJ4 5 6 NRFD 17116 37 CLK 6 7 a 15115 3g NRFD RST Or 7 8 15114 39 DAV DMAAK PJ4 O 8 pei 14113 Ed 9 26 ARO E O ATN ATN SA 11 GPIBINT 9 1a 13112 27 INT OPJI4 O SR SRO se O 5VCPU SC TE DC vcPu BVCPU g RD PJ4 OA RD O 0 1 2 12 1a WR pia Om C122 123 13011 WR Omer O C52 54 cs 59 OP14 182N TRZ O nez 2 A2 Pj4 TRI T O O TE PET 22 A1 P PIA TR3 PE 21 Ad pa oO 1032 TE PE RS O avcPu E 2 19 28 18 D7 PJ4 ON BI pt HO nD10t Msp 0 3 18 29 18 D6 PJ4 HT B D2 HQ D102 O 4 17 38 17 D5 PJ4 83 03 HA 0103 O 5 16 31 16 D4 PJ4 J Bh D4 O D104 HO 6 15 32 15 D3 pJ4 B5 ps HQ 0105 O 7 14 33 14 D2 X pj4 ae era E J a 87 az Quo 2 O B8 pa O n108 LSD O P14 PJ5 26 O SHELL 25 TBH P 25AC CSD Model 29 GPIB Interface Pcb A WN 11 13 15 19 17 20 18 16 14 12 18 5VCPU
24. T2 3 1 3 1 3 1 39P aaa IC9 A 29997 waama 19 7 VRIN 15 PO 29997 NED bd ala ES A25 I2K sg LEVEL 6 a R36 wmamz FH 8 6 6 7 amp IC HA B3 188 F 4R7 E HC4 53 SUP SYM Eb FUSIBLE WRAMI 3 13 2 mi he zm A i a i z ANE 10 pese EE BVA ZVA BVA 14 e o c29 SN e 5 gt 12 CH a iu 4 4 VEE 1axik FE she IC loan MEE C63 c18 Ya IN EASY NA 1022 096 MB40758 ISP 12P BE ION jh R22 VEE trav O PES C38 NDIE a 199 ava 4 e 1022 DG AG 3P3 LI TA E HC244 ET 381 3 104 2 C33 R28 go RADA Fes inm n 12 AMPL e E3 i i HCT4 51 5 12K 9 VER CLK EE 18 nz OP 5 ed Ya 1C9 B 6 14 ASB C 0 C38 I5VOP e 3 z e e TL074 oe cia ze ELE STRI CB4 12 12 E 5038 4 16 R99 22P SOEN 3 R23 ava 5VA 22P EVA 22P R78 5 14 IBZN ei 9 gr 6 2 15 Yi AM Esa 44 en RAE 2 s T ES 2 ILA ciza EH 336 14 13 16 15 gt 5 EXTEDE avcPu 4k7 Ya HC4 51 BU R29 E VDD ZVA VCPU AE 5025 yo RIGA mis ya 7 E 3 IC I B e Ls FUSIBLE 120N R E IC25 D 20K 120 17 3 MULTIPLIER PCB HC4253 2 QVA AVA 3 m cmm 188 PJI2 5 ICB A 1 e 502 BEC wks VSS VEE T g PJI2 B NE5532 BVA d 5 EVA 12 si AVA e O 1 15 AWMGNGFF R32 en so 7 8 e 1 47 sa 7 5029 l 2 REF 15 ay PJI2 2 ISV ta C137 4 EMI RS ae EN HFSQSTM IBaN avcPu IBAN ZVA E Eo e Q LI 5VA BVA E owe RE 14 7 1 15 5VA EB Dia ANA CLKINOUT 3 s gt 1BU ZVA 5VA 4 e j EVA 58 i SC33 SEM C138 z E yA
25. T4051 IC SM 74HC244 IC SM 74HC373 IC SM 64180 IC SM 14C88 IC SM 14C89 IC SM CD4094 IC 27C2001 256Kx8 EPROM IC SM 93C46 1K 64x16 EEPROM IC SM XC4002A 6 IC SM XC2064 50 IC SM 8Kx8 CMOS RAM 15ns Position Q3 7 11 13 14 Q9 Q8 IC6 IC26 IC8 IC31 IC9 12 24 IC10 IC7 46 IC2 IC18 IC1 IC5 IC30 IC28 IC29 IC27 IC23 IC37 IC40 IC3 20 IC11 25 IC21 IC4 IC22 IC19 45 IC36 IC34 IC35 IC14 15 16 17 IC38 IC13 IC41 IC44 IC42 43 21 PCB ASSY MAIN 44912 0270 continued Part Number 27413 0420 28151 0010 28500 1030 28502 0020 31331 9030 35555 2320 Description IC SM 32Kx8 CMOS RAM 70 120ns BUZZER XTAL 27 48779MHZ RESONATOR CERAMIC 12MHZ SCREEN PCB MAIN PCB ASSY KEYBOARD 44912 0260 Part Number 22224 0010 22226 0130 22226 0140 23185 0000 23202 1680 23382 2470 25061 0200 35515 1410 43171 1380 Description ENCODER ROTARY 36 POSITION KEYSWITCH DARK BLUE KEYSWITCH DARK GRAY RES ZERO OHM RES 680RF W25 MF 50PPM RES PS H 5K0 CERMET MIN LED T1 ROUND 3mm RED PCB KEYBOARD CONN ASSY 40W MAIN KEYBOARD PCB ASSY GPIB 44912 0250 Part No 20234 0011 22574 0430 22575 0065 23620 0246 27163 1600 27163 1620 27250 0410 35555 2310 Description SCREW M3 X 10 PNHDPZ NPST SKT 24W R A IEEE HEADER 20W 2X10 STRAIGHT CAP 100NK 63V P E P5 IC 75160 IC 75162 IC UPD7210C PCB GPIB FRONT PANEL ASSY 46912 0610 Part Number 20030 0264 2003
26. UT Frequency meter accuracy will determine the accuracy of the generator s clock setting and should ideally be 1ppm It may be quicker to use an oscilloscope for steps 05 and 15 see next section Calibration Procedure The CALibration procedure is accessed by pressing the blue EDIT key followed by CAL the shifted function of 6 At each step the display changes to prompt the user to adjust the rotary control or FIELD DIGIT keys until the reading on the specified instrument is at the value given The FIELD keys provide very coarse adjustment the DIGIT keys coarse adjustment and the rotary control fine adjustment Pressing ENTER increments the procedure to the next step pressing CE decrements back to the previous step Alternatively pressing ESCAPE exits to the last CAL display at which the user can choose to either keep the new calibration values ENTER return to the old values ESCAPE or restart the calibration procedure CE The first two displays CAL 00 and CAL 01 specify the connections and adjustment method The subsequent displays CAL 02 to CAL 20 permit all adjustable parameters to be calibrated The full procedure is listed below the name of the control signal being adjusted at each step and the default DAC value are shown in brackets The display itself shows a summary of the step adjustment procedure and the actual DAC value CAL 02 Output DC offset zero adjust for OV 5mV DCOFFSET 2060 CAL 03 Output DC offset
27. V WR 56 ME D5 43 DE 1 0 AND CONTROL LOGIC FPGA 1 M2 21 31 43 52 64 76 am gz AW os 41 57 A17 gts BVCPU a lin s 5VCPU O gt ce yee PJ3 34 POWER FAIL RESET AND BATTERY CONTROL LOGIC Da _ 58 M M 32 supa to m BVCPU D24 1N4148 34 DA DIN shoa 7 PJ3 3 PJ3 33 avcPu PF cm T 1037 8 1037 D ER T bl VBAT al ig IEAA sai SHDI CONTRAST Opj3 5 PJ3 32 11 10 13 12 8K FRSTZ gis ac o udi san2 e BACKLIGHT OPJ3 31 PJ3 38 eye KEYBOARD INTERFACE nia R184 Lj ll 1 s C 012 549 D3 f pa SHEN gt SHEN BACKLIGHT PJ3 29 PJ3 28 p RPS IC19 BCE53C 108K SE D4 38 14 DACDAT 6 X BC559C 74HC373 FRST 559 63 D4 DACDAT 55 PJ3 1 PJ3 26 R105 05 705 DACELK es DOCZN PJ3 24 2 oe 1M RIT4 DE de RAMSAVE L 5022 sr 28 EST DACLOAD DACLOAD aVCPU PJ3 22 5 pt R187 Tex nues zg penn ud D7 PJ3 20 8 p2 8 LED 18K SES is piseoga yO Pa 21 DISPO PJ3 18 PJ2 2 a p3 10 N M 3 DISPD OPJ3 23 DISPI PJ3 16 PJ2 37 12 D4 013 B AB ESO DISPD2 O PJ3 25 DISP2 PJ3 14 PJ2 36 15 ps Rigi Bc AG 21 68 A 16 10K 549 se 48 DISPD3 7 O PJ3 27 DISP3 PJ3 12 PJ2 39 L A7 A7 DISPE a Or 11 DISPE PJ3 18 PJ2 38 18 7 LEA DISPRW 5 OPJ3 9 DISPRY PJ3 B PJ2 20 a or L5161 A18 aig BB PLEC DISPRS OP 4 PJ3 7 DISPRS PJ36 4 GRIB INTERFACE PEA 1c31 sN75162 1033 GPIB BVCPU BVCPU M6 AiB XC2064PC68 PJ3 4 Jareda SEOSER 44912 0259 ia Te EREA M7 ES KALIL swerour LL SWEEPOUT 5133 3 za 25 PJ4 6 PJ6 6 22 P35 17 O 131 4 19187 24 Q REN VCC O MARKEROUT MARKEROUT p117 PJ2 21 Pi
28. WAVETEK MAINTENANCE MANUAL Model 29 10 MHz DDS Function Generator 1997 Wavetek Ltd This document contains information proprietary to Wavetek and is provided solely for instrument operation and maintenance The information in this document may not be duplicated in any manner without the prior approval in writing from Wavetek Wavetek Ltd Test and Measurement Division Hurricane Way Norwich Airport Industrial Estate Norwich Norfolk NR6 6JB U K CE Tel 44 1603 256 600 Fax 44 1603 483 670 Manual Issue 1 1 Manual Part Number Specifications Safety EMC Installation General Circuit Descriptions Calibration Parts List Circuit Diagrams Table of Contents 10 15 18 25 Specifications Specifications apply at 18 28 C after one hour warm up at maximum output into 500 WAVEFORMS STANDARD Sine square positive pulse negative pulse multi level squarewave triangle ramp up ramp down DC and pseudo random noise ARBITRARY Sampling Frequency 27 48 MHz Waveform Length 1024 points maximum Vertical Resolution 10 bits FREQUENCY Frequency ranges for standard waveform are listed below In Arbitrary mode all waveform points are output up to approximately 27 kHz beyond which they are sampled Sine Square Positive Negative Pulse Triangle Positive Negative Ramp Multi level square Pseudo random noise Resolution Accuracy Stability Sine Distortion Non harmonic s
29. ase continuous frequency switching e Non standard waveforms such as multi level squarewaves are easily generated e Basic arbitrary waveform capability in the same instrument In addition being a digital technique it is easier to make every parameter programmable from the keyboard or remotely via RS232 or GPIB interfaces The fundamental limitation of the DDS technique is that as the generator frequency is increased each waveform cycle is constituted from fewer samples This is not a problem with sinewaves which because they are filtered can be produced with low distortion up to the frequency limit of the generator With DDS squarewaves and pulse waveforms the 1 clock edge uncertainty sets a practical limit to the upper frequency However on this instrument the generation technique changes at 30kHz but is overridable by the user to use a comparator driven by the DDS sinewave this ensures jitter free squarewaves and pulses up to the frequency limit of the generator Ramp and staircase waveforms are by default unfiltered although filtering can be selected and therefore become degraded above the frequencies indicated in the Specification all waveforms are however available up to the maximum frequency of the generator DDS Operation 10 Bit ADDRESS 7 One complete cycle of the selected waveform is stored in RAM as 1024 10 bit amplitude values As the RAM address is incremented the waveform values are output s
30. ating mode Except in sweep and HOP modes the output is that of the internal trigger generator a fixed amplitude squarewave whose frequency is set in the TRIG of GATE menus The rising edge of the trigger generator initiate trigger gate and burst modes In sweep mode the output is a 3 level waveform changing from high 4V to low 0V at the start of the sweep with narrow 1V pulses at marker points In HOP mode the output goes low on entry to each waveform step and high after the new frequency and waveshape of that step have been set Output impedance is 1kQ Full remote control facilities are provided through RS232 and IEEE 488 GPIB interfaces RS232 IEEE 488 STORED SETTINGS Variable baud rate 9600 baud max 9 pin D connector Conforms with IEEE 488 1 and IEEE 488 2 Up to 9 complete instrument set ups may be stored and recalled from battery backed memory GENERAL Display Size Weight Power Operating Range Storage Range Options Safety EMC 20 character by 4 row alphanumeric display 130 mm height 212 mm width 330 mm depth 9 pounds 4 1 kg 115 V or 230 V nominal 50 60 Hz adjustable internally operating range 14 of nominal 30 VA maximum 5 C to 40 C 20 8096 RH 20 C to 60 C 19 Rack Mount Kit Complies with EN61010 1 Complies with EN55011 and EN50082 1 Safety This function generator is a Safety Class instrument according to IEC classification and has been designed to me
31. cial FB5 IC46 6 13 AL4 A OM IBN o H4B uM X E 5 A A 2028 Ya E ean SZ 20D8 20D8 58 608 j RL5 A IBN i EE 2 3 icia e 13 4 3 4 5 my DUS 348 GATE 52 EL 2088 V R48 5 RL2 A RL2 B 8 5 RL3 A RL3 8 B il VEE e 22N 4 SC37 R38 18 a 18 3 18 13 o P ZVA 1B N AT2 2 ON OFF BVA ico 74HC08 RI67 B 7 T o 278 js n gt Hau z RSI R52 7 s R54 R55 Y g g ja I C3 BVA 6 c7 e re R57 TO MAIN 8 E 15V BVA E YES ciz4 30 IBEN Q 3 au Asa ps d Ws E AWG 545 CSS EE OP 10AN LON e R39 35V 47P OPsia 2 e gt 122 ET R175 55 R37 R53 ASS FBI HA 2557 R176 588 36 C36 4X200 WS 18R2 1872 BVA EW UVA RN D 8 191 pn AVA 127 I9ZN RI53 IK ae S2 152 2 O LU ISV 253 I22N ava ZVA SWEEPOUT e PJ4 3 5VCPU Il R4 MARKEROUT 4R7 SC26 O AU res e FUSIBLE EM UL M ji ZVA 36 R30 ava SKI m TRIB SWEEP DUT IMAN SW25 4 C62 e BVA aan ISV BVA zin 4R7 e ar 28 BVA sy 8 1i58 B AVA l e TE A HSK FOR 100P M VEC 5 NE5532 Icia J RI85 R33 ava 043 1021 Pocas z 36 518 ISBN I5VOP ex e e e e VEE D ICI6 1017 5 Pay id E avena CD4084 su CD4B94 BEN d cia cK R67 a 18 s 12 198N 1 U 150 16 082 16 os2 Fr ae 16v R34 VCPU eve Pr VBR US 93 E EL 5 NO is 3 BP jJ 4K7 5 X NOT FITTED ON TGiglg SC28 SC27 8 5 ava SES 20N T IBAN WSEL2 ava 15V e SEYA PESE EAN 07 AMONOFF y 4 07 4 3K3 Ed BEN 15 12 CLK INOUT 15 12 ASEO BWA DE 4994EN DE GELD UNREG VCPU 13 SINESQ aVCPU i 13 s e e AE e e
32. e e e BVA STR ja AMINTEXT Su gt R pa tao a aan 4 m 3 7 Sus 4 7 RL4 ELA 6 sui B RL3 EE ALI pa RL2 n AL3 nue RL4 D13 ALS VSS VEE a hs C4 BVA 7 8 2D AT2 2 g 3 CURE ava Lt y A Lo LA 4 4 FILT R73 R74 R75 R155 ue SHEED AL oa ATI oa AS BVA ry RL2 4K7 Y RL3 4K7 ry AL4 4K7 m RLS 4K7 A TRE aveo HYVA ASRSTB l 03 Q4 1 HA 05 a6 07 R72 80549 Oy 80549 Oy 80549 Ba BC549 Nha 56548 SHIFTCLK e 4K7 e e e e e VA Model 29 Main PCB Sheet 2 of 3 Analogue Section E99 I FS1 PJ7 Cj ES El UNREG 1C28 15VOP NZ 7815 SK2 5GBmAT a Bid 1N4202 wee Ed DI 1 QN FS 076 E 1000U 35V M BIZIA D15 1N4202 7 lla EJ 77 D27 caa BVA TAN 16001 6v2 tau 35v 1W3 35v I z 17P oP E D16 R147 1N4902 EG SK3 1029 Es cza 4 ta PJ7 3 y EF I 7815 15V BVA BVCPU B BmAT TOR C44 1B8N ls 15VOP kotek D17 E uc 1N4282 BVA IC28 B g LM358 BACKL IGHT 7 R154 PIZ 4 O 2K EUM PF C82 10N SK4 in BYCPU 1N4022 BACKL IGHT PIZ 5 5VCPU 4 XTL2 27 48779 EZ MHz R145 R7 FUSIBLE C88 1gu 16V R146 47K R144 27K mmm C3 5 P L H ag 10N 4700U MPS23898 R163 1K C92 1 N E93 1 N 16V LM294 Q8 TIP31A R141 3R3 5VCPU cas d 18N 1C
33. ed by a 200mA current source Q8 IC26A IC28 and IC 29 provide the analog 15V rails and IC30 the 5V IC5 provides local regulation for the waveform DAC IC1 Digital and analog grounds join at the waveform DAC IC1 PJ11 is a test point for the supply rails Three PCB mounted fuses protect the transformer secondaries under fault conditions Required values measured at PJ11 pin 1 15V 0 6V pin 5 15V 0 6V pin 2 5VA 0 2V pin 6 5VCPU 0 2V pin 4 5VA 0 2V Calibration All parameters can be calibrated without opening the case i e the generator offers closed box calibration All adjustments are made digitally with calibration constants stored in EEPROM The calibration routine requires only a DVM and a frequency counter and takes no more than a few minutes The crystal in the timebase is pre aged but a further aging of up to 5ppm can occur in the first year Since the aging rate decreases exponentially with time it is an advantage to recalibrate after the first 6 month s use Apart from this it is unlikely that any other parameters will need adjustment Calibration should be carried out only after the generator has been operating for at least an hour in normal ambient conditions Equipment Required e 3 digit DVM with 0 25 DC accuracy and 0 5 AC accuracy at 1kHz e Frequency counter capable of measuring 10 00000MHz and 50us 0 1us pulsewidths The DVM is connected to the MAIN OUT and the counter to the AUX O
34. equentially to a Digital to Analog Converter DAC which reconstructs the waveform as a series of voltage steps Sinewaves and triangles are subsequently filtered to smooth the steps in the DAC output The frequency of the output waveform is determined by the rate at which the RAM addresses are changed in a DDS system the address changes are generated as follows The RAM contains the amplitude values of all the individual points of 1 cycle 360 of the waveform each sequential address change corresponds to a phase increment of the waveform of 360 1024 Instead of using a counter to generate sequential RAM addresses a phase accumulator is used to increment the phase 38 Bit RAM ADDRESS PHASE 38 Bit INCREMENT KK REGISTER PHASE ACCUMULATOR On each clock cycle the phase increment which has been loaded into the phase increment register by the CPU is added to the current result in the phase accumulator the 10 most significant bits of the phase accumulator drive the RAM address lines The output waveform frequency is now determined by the size of the phase increment at each clock If each increment is the same size then the output frequency is constant if it changes the output frequency changes but with phase continuity The generator uses a 38 bit accumulator and a clock frequency which is 2 x 10 27 487MHz this yields a frequency resolution corresponding to the smallest phase increment of fcLk 2 0 1mHz Only the 10 mos
35. ess ENTER twice to store new values and exit calibration mode Each adjustment step allows the MCU to calculate a calibration constant which is stored in EEPROM Because each step allows a very wide adjustment range it is possible to stop the instrument functioning completely if this is suspected the default values listed above should be set and a complete recalibration should then be performed When CAL is first entered and the confirmation screen is displayed pressing the CE key will invoke a set of hardware tests Follow the on screen prompts to execute these tests Note The RAM test will not function correctly if SWEEP is active when CAL is entered CALIBRATION PASSWORD V1 6 and later firmware provides for a 4 digit password in the range 0000 to 9999 to be used to access the calibration procedure If the password is left at the factory default of 0000 no messages are shown and calibration is accessed exactly as described in the Calibration section only if a non zero password has been set will the user be prompted to enter the password Setting the Password 16 Press the blue EDIT key followed by CAL the shifted function of 6 to show the opening screen of the calibration routine With this screen displayed press EDIT again to show the password screen ENTER NEW PASSWORD Enter a 4 digit password from the keyboard the display will show the message NEW PASSWORD STORED for two seconds and then revert to the Main menu If any keys
36. et the requirements of EN61010 1 Safety Requirements for Electrical Equipment for Measurement Control and Laboratory Use It is an Installation Category II instrument intended for operation from a normal single phase supply This instrument has been tested in accordance with EN61010 1 and has been supplied in a safe condition This service manual contains some information and warnings which have to be followed by the user to ensure safe operation and to retain the instrument in a safe condition This instrument has been designed for indoor use in a Pollution Degree 1 environment no pollution or only dry non conductive pollution in the temperature range 5 C to 40 C 2096 8096 RH non condensing It may occasionally be subjected to temperatures between 5 and 10 C without degradation of its safety Use of this instrument in a manner not specified by these instructions may impair the safety protection provided Do not operate the instrument outside its rated supply voltages or environmental range In particular excessive moisture may impair safety WARNING THIS INSTRUMENT MUST BE EARTHED Any interruption of the mains earth conductor inside or outside the instrument will make the instrument dangerous Intentional interruption is prohibited The protective action must not be negated by the use of an extension cord without a protective conductor When the instrument is connected to its supply terminals may be live and opening the covers o
37. in the MPU and a programmable divide by 1 10 100 1000 counter in the FPGA IC44 The counter timer produces a squarewave in the range 50kHz to 5Hz and the divider extends this to 0 005Hz Waveform DAC and filter IC1 is a high speed 10 bit DAC whose data is latched on the rising edge of the clock The DAC output is 1Vp p and is referred to the 5VA rail IC1 has an internal 2V reference at pin 16 referred to 5VA L3 L4 L5 and associated components form a 7 stage elliptic filter with sinx x correction The inductors L3 L4 and L5 are factory preset before manufacture and must not be adjusted Relay RL1 allows the filter to be switched in and out Amplifier and Level Shift IC7 is a current feedback amplifier The output of IC7 is approximately 4Vp p and is centered around OVA IC11C selects the waveform source and IC11A selects low pass filter R3 C17 when in noise mode High Frequency Squarewaves Low frequency squarewaves are generated via the RAM and DAC high frequency squarewaves are generated by converting the sinewave to square with comparator IC6 Adjusting the comparator threshold varies high frequency symmetry The comparator output drives IC4 which gives squarewaves above below or about OVA Amplitude Control and Modulation IC2 is a 4 quadrant multiplier Amplitude is voltage controlled via IC8A AM is selected by IC 11B and IC25C The internal squarewave modulation source is generated by IC25B the amplitude is adjusted by var
38. is comprising a 256k byte EPROM IC38 with the top 32k bytes overlaid by SRAM IC39 The MPU selects between the memory devices via a decoder located in the FPGA at IC44 The RS232 interface is provided directly by the MPU and is buffered to the rear panel connector PJ1 by IC34 and IC35 One of the counter timers provides a constant 125us tick to the MPU which is used to time all the housekeeping functions e g keyboard scan knob control as well as some generator functions e g frequency sweep The second counter timer is used by the Trigger generator Keyboard LCD and Leds GPIB The keyboard is interrogated every 10ms This is done by reading the registers in IC19 and IC45 If a key is down then one of the transistors Q15 Q20 will be on and the corresponding bits read from 1C19 1C45 will be high The MPU decodes this to produce a key code which is passed to the software Multiple keys down are ignored IC44 provides the port decode signals for access to IC19 and IC45 The knob is connected directly to the FPGA IC44 This decodes the 4 states of the switches and increments decrements a counter The counter is read and cleared every 10ms and the value and sign passed to the software The 16 leds are driven directly from the latches in the shift registers IC14 and IC15 These latches are updated as required via the FPGA IC44 The LCD is accessed via a bi directional 4 bit port in IC44 The FPGA IC44 provides the port select sig
39. l key Waveform duration can be set from 2 ms to 65 s in input 1 ms increments HOP can be externally triggered from the EXT TRIG AMPLITUDE MODULATION Carrier Frequency Range 100 uHz to the maximum frequency for selected waveform Carrier Waveforms Depth Internal Source External Source External Sensitivity All Typically variable from 0 to 100 in 1 increments 1 kHz fixed sinewave or 5 mHz to 50 kHz squarewave DC to 100 kHz 4 quadrant Approximately 2 Vpp for 50 modulation FREQUENCY SHIFT KEYING FSK Phase coherent switching between two selected frequencies at a rate defined by the switching signal source Carrier Frequency Carrier Waveforms Switch Repetition Rate Switching Signal Source START STOP PHASE 100 uHz to the maximum frequency for selected waveform All dc to 50 kHz internal trigger generator dc to 1 MHz external trigger signal Internal from front panel key or internal trigger generator External from Trig Gate input or remote interface Phase relationship between MAIN OUT and AUX OUT is determined by the START STOP PHASE setting Carrier Frequency Carrier Waveforms Range Resolution TRIGGER GENERATOR 100 uHz to 1 MHz All 0 to 360 degrees 1 degree Internal source 5 mHz to 50 kHz squarewave adjustable in 20 us steps with 3 digit resolution Available for output at the sweep marker connector except during sweep or HOP operation OUTPUTS INPUTS FRONT PANEL CO
40. nals to the GPIB board if fitted The software automatically detects the presence of the GPIB board at power up and allows the user to select it on the REMOTE menu DDS FPGA 12 The FPGA IC41 provides the complete DDS system including 38 bit phase accumulator two 38 bit registers to hold the frequency values for FSK trigger gate control logic 10 bit re loadable burst counter multi instrument phase synchronization logic and an 8 bit 16 port bi directional MPU interface Access is provided to the waveform RAM to allow the patterns to be written and the AUX output signal is generated or selected All internal operations of the FPGA are clocked by the signal DDSCLK Note that if this signal is interrupted it is possible for the FPGA to become non functional requiring that the FPGA be completely reset The clock could be interrupted by a fault condition or by setting the CLOCK BNC to INPUT and then providing an unacceptable clock An unacceptable clock is any signal which overrides the internal clock but produces a replacement which is less than 5MHz or greater than 27 5MHz one way to accidentally accomplish this is to connect a 500 pad across the clock input Pseudo random noise may also be generated by the FPGA Each time the user turns noise ON or OFF the FPGA is re programmed to the required function Note that this also has the effect of completely resetting the FPGA Trigger Generator This is created from the second counter timer
41. ow Mains Earth WARNING THIS INSTRUMENT MUST BE EARTHED Any interruption of the mains earth conductor inside or outside the instrument will make the instrument dangerous Intentional interruption is prohibited The protective action must not be negated by the use of an extension cord without a protective conductor Mounting This instrument is suitable both for bench use and rack mounting It is delivered with feet for bench mounting The front feet include a tilt mechanism for optimal panel angle A rack kit for mounting one or two of these Half width 3U high units in a 19 rack is available from the Manufacturers or their overseas agents General Service Handling Precautions Service work or calibration should only be carried out by skilled engineers Please note the following points before commencing work Most of the integrated circuits are CMOS devices and care should be taken when handling to avoid damage by static discharge Many of the devices are miniature surface mount components with very fine leads on small pitches these components must be removed and replaced with great care to avoid damage to the pcb It is essential that only tools and soldering equipment specifically designed for surface mount components are used The decoupling capacitors associated with the integrated circuits are surface mounted on the solder side of the pcb Dismantling the Instrument WARNING Disconnect the instrument from all voltage sou
42. purs Square Rise Fall Time Square Aberrations Square Symmetry Control Triangle Linearity Error Triangle Symmetry Control Pulse Rise Fall Time Pulse Aberrations Pulse Symmetry Control Multi level Square 100 uHz to 10 MHz 100 uHz to 10 MHz 100 uHz to 10 MHz 100 uHz to 100 kHz 100 uHz to 100 kHz 100 uHz to 100 kHz 30 mHz to 700 kHz 7 digits limited by 100 uHz Typically 10 ppm for 1 year 18 C to 28 C Typically 1ppm per C outside 18 C to 28 C WAVEFORM CHARACTERISTICS lt 0 3 to 500 kHz lt 50 dBc to 1 MHz lt 35 dB to 10 MHz typically 50 dBc to 10 MHz lt 25 ns 596 2 mV 1 to 99 0 1 resolution 100 uHz to 30 kHz 20 to 80 0 1 resolution 30 kHz to 10 MHz lt 0 5 to 30 kHz 1 to 99 0 1 resolution 100 uHz to 100 kHz lt 25 ns 596 2 mV 1 to 99 0 1 resolution 100 uHz to 30 kHz 20 to 80 0 1 resolution 30 kHz to 10 MHz Maximum of 16 steps of discrete amplitude and duration 1 to 1 024 points Allows generating 3 level square staircase multiplexed LCD driver signals etc OUTPUT CHARACTERISTICS Output Impedance Amplitude DC Offset Resolution Accuracy Flatness OPERATING MODES CONTINUOUS 509 or 600Q switchable 2 5 mVpp to 10 Vpp into 500 6000 5 mVpp to 20 Vpp into open circuit 5V limited by offset plus signal peak into 500 6000 10V limited by offset plus signal peak into open circuit 3 digits limited by 1 mV 3 1 mV at 1 kH
43. r removal of parts except those to which access can be gained by hand is likely to expose live parts The apparatus shall be disconnected from all voltage sources before it is opened for any adjustment replacement maintenance or repair Any adjustment maintenance and repair of the opened instrument under voltage shall be avoided as far as possible and if inevitable shall be carried out only by a skilled person who is aware of the hazard involved If the instrument is clearly defective has been subject to mechanical damage excessive moisture or chemical corrosion the safety protection may be impaired and the apparatus should be withdrawn from use and returned for checking and repair Make sure that only fuses with the required rated current and of the specified type are used for replacement The use of makeshift fuses and the short circuiting of fuse holders is prohibited This instrument uses a Lithium button cell for non volatile memory battery back up typical life is 5 years In the event of replacement becoming necessary replace only with a cell of the correct type i e 3V Li MnO 20mm button cell type 2032 Exhausted cells must be disposed of carefully in accordance with local regulations do not cut open incinerate expose to temperatures above 60 C or attempt to recharge Do not wet the instrument when cleaning it and in particular use only a soft dry cloth to clean the LCD window The following symbols are used on the instrument
44. rces before it is opened for adjustment or repair If any adjustment or repair of the opened instrument is inevitable it shall be carried out only by a skilled person who is aware of the hazards involved Remove the six screws retaining the top cover 2 The rear panel may be removed as follows Disconnect the gray ribbon cable from PJ4 on the GPIB pcb and remove the 2 screwjacks which secure the RS232 connector to the rear panel Invert the instrument and remove the three screws securing the rear panel the panel may now be tilted back to allow access If the panel is to be completely removed unplug connectors from PJ4 PJ7 amp PJ8 and the blue and brown wires from the mains inlet filter desolder the blue and brown wires from the mains transformer The panel can now be lifted free of the instrument 3 The front panel assembly may be removed as follows Unplug the connectors from PJ2 PJ3 PJ5 amp PJ6 and desolder the screened cable from PJ10 Remove the nut securing the front panel earthing strap and the four nuts securing the front panel assembly The panel may now be drawn clear of the instrument 4 Main pcb removal Remove all connectors from the pcb and desolder the screened cable from PJ10 Tilt the rear panel back as described in 2 above Remove the pcb fixing screw nearest PJ10 invert the instrument and remove the 5 screws retaining the pcb fixing pillars to the case lower The main pcb can now be lifted free complete with its fixing
45. s O dig 11171 aa Q IC GND PJ4 1 PJG 1 RED 130 Maso ASRSTg L ASRSTB 47K TEX VCPU PJ2 22 O 6MHZ TORO oe 5 6 171181 37 04 NAC CLK Se PIE 2 TORO 22 0 060 FPGADAT REBABDAT PJ2 19 P57 O 161 7 16157 gg AND RST PJ4 3 PJ6 AOS BvCPU MD 370 C52 FPGASTB 4 FPGASTE pua dr Pin 6 O 1778 15114 39 Q DAY DMAAK PJ4 4 PIB 4Q T RD 23 ep FPGAPROG FPGAPROG PJ2 18 O 56 46 1 Ps5 O EDI WW FPGAINIT PJ2 15 8 9 14113 z Q DMARO O wn WART FPGAINIT O 5 R118 eh 3 1a 13121 27 JAN INT PJ4 9 PJ6 a EINT FPGADONE FPGADONE 7k PARA P35 10 O Q sro GPTBSEL IB EPTBSEL PJ2 9 2a sis 42 O BVCPU ped am KROWSEL 2O kROYSEL cba PJS 18 Op 2022 28 ir RD PJA 7 PJ6 O KCOLSEL _ 24 QJkcoLSEL ECS VEC VEC PJ4 PJ6 8 FIR ec IE 1032 Ed LN E PJ4 5 O EPTESEL RUWGEL 30 SU ELT FTDAT avcPu 2 cs PJ6 5 SHIFTD v PJ5 20 O tre ROMCS LDC DOUT SHIFTDAT 188N RAMSEL 12 27 SHIFTELK Pub 21 O GND GND a PJ4 11 PJG 11 A2 O RAMCS M2 LEDLOAD CH 5 O 1 11 TRI TE rae Ae ment to Bip RS1 PJ4 13 pi6 13 At CPUTIMER 66 54 NTER R157 Argg LEDLOAD PJ5 23 O isa AG ki 30PE RGG PJ4 15 PJG 15 AB sMaz qq IMERIN TIMEROUT 1 ik Pet BVCPU CONTRAST QOPJ2 27 PIB 24 O avcru 3 mee Cee e ES 6MHz KNOBA 5 O PJ2 32 KNOBA PJ2 29 PIS Q8 Dr e za Q010 MsD iw ya PJS 18 9 G 5VCPU HDC KNOBB OPJ2 31 KNOBB L OPJ2 30 PJ 7 Ps2 O o m Ey Que PJS 17 ie gg Bvcpu JK O PJ2 33 P53 O 83 D3 D103 PJ4 20 P 6 20 sep 45 PWRDWN MT RDATA PJ2 34 B 16 3 PJ4 18
46. s suitable for the local supply Should it be necessary to change the operating voltage proceed as follows 1 Disconnect the instrument from all voltage sources 2 Remove the screws which retain the top cover and lift off the cover 3 Change the transformer connections as follows for 230V operation connect the live brown wire to pin 15 for 115V operation connect the live brown wire to pin 14 for 100V operation connect the live brown wire to pin 13 4 Refit the cover and the secure with the same screws 5 To comply with safety standard requirements the operating voltage marked on the rear panel must be changed to clearly show the new voltage setting 6 Change the fuse to one of the correct rating see below 230V 115V 100V OV Fuse Ensure that the correct mains fuse is fitted for the set operating voltage The correct mains fuse types are for 230V operation 250 mA T 250 V HRC for 110V 115V operation 500 mA T 250 V HRC To replace the fuse disconnect the mains lead from the inlet socket and release the fuse drawer below the socket pins by depressing both clips together with miniature screwdrivers so that the drawer can be eased open Change the fuse and replace the drawer The use of makeshift fuses or the short circuiting of the fuse holder is prohibited Mains Lead When a three core mains lead with bare ends is provided it should be connected as follows Brown Mains Live Blue Mains Neutral Green Yell
47. t significant bits of the phase accumulator are used to address the RAM At a waveform frequency of fCLK 1024 26 84kHz the natural frequency the RAM address increments on every clock At all frequencies below this i e at smaller phase increments one or more addresses are output for more than one clock period because the phase increment is not big enough to step the address at every clock Similarly at waveform frequencies above the natural frequency the larger phase increment causes some addresses to be skipped giving the effect of the stored waveform being sampled different points will be sampled on successive cycles of the waveform The minimum number of points required to accurately reproduce a waveshape will determine the maximum useful output frequency fmax fCLK No of points For sinewaves the filter permits the waveform to be reproduced accurately up to the Nyquist limit fCLK 2 although in this generator a practical limit of 10MHz is set 11 MPU and Memory The majority of the digital hardware in the instrument is contained in 3 LSI devices these being a MicroProcessor Unit IC36 and 2 Field Programmable Gate Arrays IC41 and IC44 The Z80180 MPU contains an 8 bit Z80 core 2x16 bit counter timers 2x8 bit serial interfaces and a memory management unit The MPU is clocked at 12MHz by XTL1 The MPU provides up to 20 memory address lines but only the lower 18 are used to provide access to 256k bytes of memory Th
48. ve full scale adjust for 10V 20mV DCOFFSET 4000 CAL 04 Output DC offset ve full scale check for 10V 20mV DCOFFSET 0120 CAL 05 Multiplier control zero offset adjust for minimum output AMPL 2060 CAL 06 HF squarewave IC4 grounded note offset CAL 07 Waveform DAC at mid scale adjust for CALO6 value 10mV WAVOFST 1820 CAL 08 Waveform DC offset adjust for OV x 5mV DCOFFSET 2058 CAL 09 Waveform DAC at full scale adjust for 10V 10mV AMPL 0300 CAL 10 HF squarewave full scale adjust for 10V x 10mV SQLEVEL 1100 CAL 11 20dB output attenuator adjust for 1V 1mV AMPL 4000 15 CAL 12 40dB output attenuator adjust for 0 1V 0 1mV AMPL 4000 CAL 13 12dB intermediate attenuator adjust for 1 768VAC 5mV AMPL 0300 CAL 14 20dB intermediate attenuator adjust for 0 707 VAC 1mV AMPL 0300 CAL 15 AM squarewave zero adjust for minimum output AMSQ 2050 CAL 16 AM squarewave full scale adjust for 10V 10mV AMSQ 1000 CAL 17 AM sinewave full scale adjust for 3 54VAC 10mV AMSQ 0650 Check for a good sinewave on the scope CAL 18 HF squarewave symmetry 50 adjust for 50us 0 1us SYM 2060 CAL 19 HF squarewave symmetry 75 adjust for 75us 0 1us SYM 2741 CAL 20 Clock calibrate 10MHz at main and aux outputs or 27 48779MHz at clock in out when set as an output adjust to 1ppm Fail if outside these limits 300 3700 shown on the display 2000 Pr
49. ying the levels that IC25B switches between The internal sinewave modulation source is fixed at 1kHz and is achieved by passing the output of IC25B through a Sallen and Key low pass filter The current output of IC2 is converted to a voltage by R44 giving approximately 900mVp p at maximum output IC46 amplifies this to give approximately 3 6Vp p Output Amplifier and Attenuators IC3 is an intermediate switched attenuator giving OdB 12dB and 20dB IC10 is a current feedback amplifier with a gain of approximately 5 5 and gives 20Vp p at maximum output DC offset control is via R33 and IC8B Relays RL2 and RL3 select 20dB 50Q attenuators Relay RL4 selects 50 or 600 Q output impedance and RL5 output on off DAC and Sample and Holds IC18 is a 12 bit serial DAC with internal 2V reference IC31 provides a bipolar output IC20 multiplexes the DAC output voltage onto the appropriate hold capacitor FET input amplifiers 1C12 and 1C24 buffer the voltages on the hold capacitors The voltage at each sample and hold is controlled by the MCU which calculates each value from a combination of the instrument set up and the calibration constants stored in EEPROM 13 Power Supply 14 The transformer has two separate secondaries one for the digital supply the other for the analog supplies The digital 5V is supplied by low drop out regulator IC27 The display backlight current is sourced from the unregulated side of IC27 The backlight current is controll
50. z into 500 6000 0 2 dB to 500 kHz 1 dB to 5 MHz 2 5 dB to 10 MHz Continuous cycles of the selected waveform are output at the programmed frequency TRIGGER BURST Phase coherent triggering of the programmed number of cycles of the selected waveform Waveforms start and stop at the phase angle specified in the Start Stop phase parameter Trigger Sources Burst Count Trigger Repetition Rate GATE External signal manual front panel key internal trigger generator or remote command 1 to 1023 cycles dc to 50 kHz internal trigger generator dc to 1 MHz external trigger signal Cycles of the selected waveform are continuously output while the trigger signal is present Trigger Sources Trigger Repetition Rate SWEEP Sweep Mode Frequency Range Markers Trigger Sources FREQUENCY HOP External signal manual front panel key internal trigger generator or remote command dc to 50 kHz internal trigger generator dc to 1 MHz external trigger signal Linear or logarithmic single triggered cycle or continuous 100 Hz to the maximum frequency for selected waveform Two variable markers during sweep External signal manual front panel key or remote command Up to 16 different hop waveforms each with independently setable frequency amplitude offset waveform except noise and duration for each waveform Phase continuous switching between frequencies can be executed via software or manually front pane
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