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LED TV SERVICE MANUAL - Pdfstream.manualsonline.com

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1. TOI MESI C lock LG 1 1 54D NVRAM 3 3 NORMAL eos MAIN Clock 24Mhz EEPROM_RENESAS imal C103 10pF es d IC102 i ei gt XIN MAIN 1 24256 5 50 1uF Write Protection C100 len soa r ae Low Normal Operation ERE 2 High Write Protection 5 e x x 1 WP pU N N mas 10pF 2 SCL XO_MAIN R139 33 I2C_SCL5 101 Spa VSS SDA R140 I2C_SDA5 System Clock for Analog block 24Mhz l 7 EB_ADDR 0 14 EMMC_DATA 0 7 7 EB DATA 0 7 Oud X OQ N cm Z mmu Agoda o peo Nae PLL SET
2. e DEMOD1 TS ERROR TU W BR TW CO L6508 1 VW oed 3 TU_Q W_KR JP AU L6508 TU_S N Q W close to TUNER BLMI8PGI21SNID 1 TU_RESETI TU_N M W_CN TW BR CO 6520 as 7 5508 41 TU_W_BR TW CO MW I C6501 1 R6500 1K 1K 5 ee 1 TU 66 55 TU TW BR TU TW BR os qmi es TU_W_BR TW CO TU BR TW CO TU_W_BR TW CO BR TW CO 1000pF W W C6501 cd R6534 1 R6509 1 R6510 1 RER 26506 1 mn 18pF 18pF DOR RF SWITCH 504 MW NW AAA gt seek TS T RF_SWITCH_CTL_TU lt T 6502 R6501 1K 150 300 220 cle pn 0 1uF TU M W BR TW CO CN duni ammi im ms es mn mw Leni eme com ont mm Umi 100 2 Mem gt ap gt TU_M W_BR TW CO CN nee NON_TU_W_BR TW CO R6534 0 3 TO SV
3. 1 33 R3250 HDMI HPD 1 lI VA3215 5V_NORMAL 1 ESD_HDMI BODY_SHIELD 5V_HDMI_4 1C3202 A A TPS2051BDBVR OPT BODY SHIELD R3207 22 GND 5V_HDMI_4 D3206 R3254 S e SDA 1 A MBR230LSFT1G Sun MEL_ON_OFF R3208 22 4 1 16w gt ppc scr 1 5 R3253 30V C3208 5 zx 1 3201 1 Loue DMI_FREEPORWHP DET 33 0 pcm SII9587CNUC 3 DMI FREEPORLHP HDMI_HPD_4 C3205 GND TT o o iuF o 5y 101 x e v 206 EE ARC VA3212 lov 7T m ESD_HDMI 5 GND VA3216 1 16W ESD_HDMI am MA e 5 DDC_DATA E C3202 7 R3222 26 10K MEL_DE 8 1 i SPDIF_OUT_ARC DDC_SDA_4 ser le R3245 o lt e DDC_CLK R3223 22 DDC_CLK 1 1 4 B m VA3213 TUE Eee C L VA3211 RC ESD_HDM O 1uF VA321 ESD_HDMI CE_REMOTE LOY CE_REMOTE ESD_HDM 7 D32r5 CK zi
4. RF_SWITCH_CTL_TU TU T27 TU Korea PI TU 0 T2 S2 jg B1 3 3V_S P N C 1 5V_OR_ 3 3V_SPLIITTER 10uF e e e IE TON 1 RESET RESET Tl e e e TU RESET1 TU 2 rU SCL SCL SCL T I2C_SCL6_TU 3 gt 2C SCL TU TU_SDA SDA SDA_T e e e e lt 112 5 6 TU 4 gt 2C SDAO TU M B1 3 3V 3 Dl FU 6FO e 3 3V_TU 5 LF SSV TU SIF NC 1 e TDSM C651D B e gt TUNER TU 6 LD TUNER SIF TU 8V M B2 1 8V 1 8V_T1 e e e e TU_ 1 8V_TU 7 gt TU_ 1 8V_TU 5 5 5 NC 2 e e e e D TU TU 8 NC 1 F AGC NC 2 NC 3 e e e e F AGC TU 9 NC 2 P NC 3 NC 4 e e e e P 10 NC 3 NC_4 5 11 B3 3 3V 3V_S NC_5 3 3V_T2 Bl 3 3V_D_Demod 12 m B4 1 23V 8V S NC 6 e e e Power D Demod TU 13 2 DEMOD_RESET NC 7 e CN RESET TU 14 E GND GND e e NC 4 ROR ERROR e e gt FE TS ERROR 16 SYNC D SYNC SYNC e e FE DEMOD1 TS SYNC Je VALID ED VALID e gt TS
5. F15 gt M0 DDR A0 F13 m gt M0 DDR A1 Fl 19 gt M0 DDR A2 F 15 gt M0 DDR El gt M0 DDR A4 E18 E gt M0 DDR A5 E gt M0 DDR A6 F18 eke DDR_SAMSUNG DDR_HYNIX MO_DDR_A gt M0 DDR A7 EODD DDR SAMSUNG DDR A gt M0 DDR 500 Rasa on hae 16 MO_DDRAVREFCA HYNIX DDR gt M0 A9 VUDGISUMO KABAG1646B HCKO IC502 1 DDR VREFCA I x MO_DDR_A 10 gt MO_DDR_A10 MO_DDR_CKE K4B4G1646B HCKO MO_DDR_A11 MO_DDR_A 11 E13 _ MO_1_DDR_VREFDQ MO_DDR_A 12 Te M0 DDR A12 R520 D N3 IMO_DDRAVREFDQ Peas E 4 10K MO_DDR_AO A DDR A 13 gt M0 DDR A13 10K _ p7 88 LES M8 D MO_DDR_A14 MO_DDR_A1 Al 7 MO_DDR_A 14 zm P3 0 DDR A1 Al Fl MO DDR A15 DDR RESET 0 DDR A2 A2 MO_DDR_A 15 0 N2 MO_DDR_A2 MO_DDR_A3 VREFDO E 27 2 2 H1 E19 MO_DDR_A3 VREFDQ MO_DDR_BALO Fro mo_ppR_BAO MO_DDR_A4 po 44 VDDC15 WW ama ud GEN MO_DDR_AS5 5 DDR_ MO_DDR_BA 1 Pors
6. A IC100 H13A NON BRAZIL LG1154D_H13D 1009 LG1154D_H13D 3 3V_Bypass 0 75V IC101 p MO 0 E T id LG1154AN 8 VREF AT UA 3 3V NORMAL 1 1V_B ass VREF_M1 0 Sar MO PDR_VREFL rm AVDD33 2 3 yp p A A4 dis N22 1 M0 DDR VREF2 2 AVDD33_XTAL 1 AVDD33_CVBS 2 am VREF_M1_1 A2 N23 VDD33_1 G 1 1V_VDD 74 L209 L216 1222 VDDC11_XTAL M1_DDR_VREF2 4 BLM18PG121 SN1D BLM18PG1LISN1D P16 VDD33_2 G JE BLM18PG121SN1D VBDOS 5 VDD33_3 G CR 26 17 gt 2 g E i J6 2 5 XTAL_VDD 6 3 g ENE 3 5 5 B 5 N26 P18 ANN fa 78 5 5 XTAL_VDDP 7 6 esce En 3 R15 ze VDD33_5 G 5 8 5 J9 g a eum M21 T15 1 1V_VDD VDD33_6 G i 5 5 1 9 A VUDSQT 210 a 2 o VRDS Y30 T22 co VDD33 2 0 pears Lu JEL 9 e AA30 E 123 E J14 4 p a VDD33_3 1 ____ rs e pi AES T24 VDD33_4 2 2 Jr AVDD33_XTAL VDD33 10 G
7. C4400 10uF 10v JK4400 57113262 3 3V_NORMAL A VBUS 4 OCP USB R4500 10K R4501 USB3_DM 10 USB3_DP IC4500 BD82020FVJ 5V_ USB 1 GND 5V NORMAL A i E SSRX USB3_RX0M e STDA_SSRX USB3_RXOP e Qe C4500 C4501 0 1uF GND DRAIN 16V TUUS 10 STDA_SSTX USB_OCD1 USB3_TX0M e STDA_SSTX USB CTL1 e 0583_ e m m N N N 2 E Ww 2 SEA 5 SHIELD S A s lt AS 7 a 4 H E 6 4 m OCP USB2 3 203 USB3 2 0 A MAX 1 0A MAX 1 0A 9 5 3AU048 305 ZC LG 3AU048 305 ZC LG IC4306 JK4302 JK4300 TPS2066CDGNR of A 5V_NORMAL wy 2 5 prt FLT1 5 i USB OCD3 Vere USB_DM3 amp z ice 5 5V_USB_3 z z 16V R lt E ouT1 USB_DP2 USB DP3 p L zi e A
8. 1 AT16 INTR_GB E2 AULT INTR_AFE3C D1 AT17 INTR_AGP A6 AT24 AUD_FS20CL B6 AU24 AUD_FS21CL A5 AT23 AUD_FS23CL B5 AU23 AUD_FS24CL A4 AT22 AUD_FS25CL C4 AUDCLK OUT SU C18 AU36 AUD_HDMI_ A2 AT20 AUD_DAC1_ B2 AU20 AUD_DAC1_SC B1 AT19 AUD 1 LRC C2 AU19 AUD Cl AT18 AUD_DACO_SC D2 AU18 AUD_DACO_LRC B4 AU22 AUD_ADC_LRC A3 AT21 AUD_ADC_SC B3 AU21 AUD_ADC_LRC A7 AT25 BB_SCL B7 AU25 BB_SDA 8 23 BB_TP_CL D8 AR23 BB_TP_ER 22 BB_TP_SO E7 AR22 BB_TP_VA D7 AP21 BB TP DATA7 AR21 BB_TP_DATA6 E6 AP20 5 D6 AR20 BB_TP_DATA4 C6 AP19 BB_TP_DATA3 E5 AR19 BB_TP_DATA2 D5 AP18 _ _ 1 CLK 54M VTT AR18 BB DATAO R467 82 B10 1 16W1 i AU28 CLK_F54M 9 AR24 CVBS_GC2 B9 AU27 GC1 A9 AT27 CVBS_GCO 9 AP24 CVBS_UP x AROS CVBS_DN E to LG1154 B nn uuum a AU29 FSOOCLK A 30 RE AUDCLK_OUT s DAC_START_PULLDOWN 11 lt 27 DAC_START 11 AR27 DAC_DATA4 E10 AP26 DAC_DATA3 D10 AR26 DAC_DATA2 10 25 DAC_DATA1 15 ae DAC_DATAO R451 330 D13 4 D_GC4 C13 AP29 D GC3 E12 AR29 D GC2 D12 AP28 D GC1 AR28 D_GCO C17 AP35 AAD_DATA9 E16 AR35 AAD_DATA8 D16 AP34 _ 7 C16 AR34 AAD_DATA6
9. FILRE AND ELECTRICAL SHOCK HAZARDS rj Copyright O 2013 LG Electronics Inc All rights reserved Only for training and service purposes N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics LG ELECTRONICS A T Lure 38711 QRT12 CI_DATA 0 7 10V 10K 10K C CI OPT OPT JK700 10120698 015LF 5550 _ 1 1 100 FRERES _ CT 2716 2 CI DATA 3 CI 75 DATA 3 3 CI DATA 4 CI 5 TS 4 lt 4 5 CI R706 R708 TS DATA 5 C 5 CI DATA 6 10K 10K AE 6 CI DATA 7 m OPT OPT a cs CI R721 33 R724 a _ 10 TS 7 KJ e d _ A CI_ADDR 10 10K 1 PCM_IORD PCM_CE2 259 8 lt cI_ADDR 10 Ores 3 CI_DATA Z _ 2 R 9 TO Ee PCM IOWR e CI_VS1 lt e PCM OE
10. A CAMERA C4203 4 6 us luF N N gt gt lt st Ke Ke ES x ON sr vd Hew LD N a N W D D 2 Hd Ke 3 3V_NORMAL A CAMERA 0 R4204 DMO DVDD USB2_HUB_IC_IN_DM CAMERA 0 RIZOS SMERA DPO OVCUR3 4208 c USB2 IN DP 0 24206 DM1 a OVCURA gt gt a 3 3V_NORMAL USB_DM3 a A CAMERA CAMERA ppi IC4200 TEST SCL 14200 USB_DP3 GL852G 31 onm AVDD 1 RESET e RST_HUB BLM18PG121SN1D e _ DM2 DP4 E C4201 USB_CAMERA_DM 4209 po DP2 DM4 25V 05 08 USB_CAMERA_DP LE N rd N o 09 x x A A gt gt lt SO 32 From HUB CAMERA P4200 ae USB_Camera 0 1uF O 1luF CAMERA CAMERA CAM SLIDE DET PT X4200 GE 12MHZ X TAL_1 GND_2 3 5V_CAM ES C4215 4 GND_1 al F XjITAL_2 lt e o is 3 C4213 ns dre D lure LN on CAMERA on remm 4 33 CAMERA alles CAMERA 5 O SPON N on S a AUD
11. SPK_WOOFER_ P5701 FW25001 02 SPK 2P SPK_WOOFER_ gt SPK_WOOF WOOFER_L gt SPK_WOOFER_R WOOFER_R 24V_AMP_WOOFER 12V A on AVSS area WOOFER_NON_OLED WOOFER_OLED 15700 15707 e UBW2012 121F UBW2012 121F s roS gt TO ZEN c RETE WOOFER GND 4 2225 a NRS6045T100MMGK Close to Speaker WOOFER clk BN s 15704 C5701 r pM p 10 0uH luF ot J a A e E zi TOOR ER oS 56 24V_AMP_WOOFER NOSED C5709 4700pF 85713 E 59909 A 18 5 WOOFER 5708 R5907 WOOFER op 3 3V_NORMAL e e q e e C5728 05 32 0 047uF 470 WOOFER WOOFER 3 00 al a C5718 C 57201005722 50 WOOFER 50V 0 1
12. 8 I eN ee ee oO OF al a a Of amp 2 gt gt 01 10 11 Internal Test mode y NC ON KO OR p Ov AO rt D A 0 pe KO ip gt Or pe LD A rm N A o M POU O o 125 om d d d 3 3 _ oo QOO O OOF A A d OO O 0 R E HHH A EX x x x x amp ttt tag a 5 H A Oy y uo p fu H H HHA Q H H QUO m 67 AA 4 VVV LW W O O AAA amp O O UO O n n n a MOH HHH HHH R133 33 oe BR Ec 19 De Ue ec gt OU OQ OQ UO 4 H 5 HH HHH MN A zo HEN ade CAS UNE RO OS 15 5 55 o gt Sih gt 1 26 H I AMON M M M I NAN HO ON c QN gt 5 HH nm c 34 0000 Tm M m dd A M od d od d d d od Si
13. Dual Play A N e mmm Set Stand Copyright 2013 LG Electronics Inc All rights reserved 23 LGE Internal Use Only Only for training and service purposes System Configuration
14. TH BMSGSA1J IC8100 1 BA 26 210011 8100 2 ECR C8100 3 2 001 IC8100 4 THG BM5G7A2J BA A3 c8 A4 c9 A4 c9 A4 c9 A4 c9 A e M M F A5 C10 A5 C10 A5 C10 gt B2 11 B2 11 B2 err 5 B3 C12 B3 C12 B3 C12 B DATA LINE 47K PULL UP 3 3V_EMMC B4 CLS B4 SIF B4 A P TET OPEM B5 C14 B5 C14 B5 C14 ae on B6 1 B6 D1 B6 D1 oo o o e D2 D D3 D3 D3 nara E X Xx M6 D4 ie wi M6 D4 M6 D4 M6 D4 dw o 292929 eee EMMC DATA LINE 5 12 95529 SS 22 LOK PULL UP 55 89 5 D na 3 o PN lt FOR M13 D D m m m M om m m EE SS ls Dia c e ed heh IC8100 D14 D14 D14 APE A6
15. THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics T_CON_SYS_POWER_OFF R7216 C7201 C7203 10uF lub 16V 16V OPT LVDS gt LED 41Pin LV P7202 DS OU FI REA41S HF J R1500 Connector LG ELECTRONICS TXCO TXCOP 1 TXC2 TXC2P TXCCLKN TXCCLKP TXC3 TXC3P TXC4 1 TXDON TX17N 1 TXDOP TX17P TXACLKN TXDIN TX16N TXACLKP TXD1P TX16P TXA4 TXD2N TX15N TXA4P TXD2P TX15P TXDCLKN TX14N TXBOP TXDCLKP TX14P TXB1 TXD3N TX13N TXD3P TX13P TXB2 TXD4N TX12N TXB2P P TX12P TXD4 L H13 BALL NAME BSD NC4_HO72 HD DATE BLOCK gvos rwrerracel GHEET LGE Internal Use Only ILOCAL DIMMING 1 To LED DR IVER P7400 12507WR 08L L DIM_OUT 3 3V_NORMAL A gt L DIMO SCLK gt L DIMO MOSI 26 8 T2 2C SDA2 R7401 10K L DIM OUT PULL DOWN
16. 7 eee ees ee ee SECRET Lc ELECTRONICS DATE THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC GElectronics SL LILK GHEE Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Ethernet Block 3 3V_WOL 3 R5215 gt RXER x y o JACK POWER gt A a 3 Place this cap near IC 3 5V_WOL A AY C5208 ET_COL SNI 0 1uF L5200 120 ohm 5200 C5201 5203 16V BLM18PG121SN1D 4 7uF 0 TUE 0 lur 10V 16V 16V L val E E Place 0 11 close to each power pins H e AZ 2 n un S z x mw gt a HB C5206 a als 3 50V x T m A N N N eg Imc gt lt 0 SESS al LA a E a 3 3V_WOL x e A Place this cap near IC C5207 T 2 gt T B B gt e N un 50V gt Fy 5205 T E
17. 9 E 2 o slo 3 NORMAL AREA option2 lio O M oo M M a XN N aN m gt olo x 12507WS 04L Aran mo LN ME a a a ala 1 105 3 s i HON aa Pagi en E X BMT BMT mo am mm 6 LNT OMT mmm Em 1 gt gt 2 EPI selection M OF mm i w a m 2C Jom IH mH nd a 5 1 TE dur 88 EE p z x CD I2C_SCL1 amp SS an t mi fa E lt lt m m m n ae T gt 5 os 2C_SDA_MICOM_SOC D am 2240 le ve ag 9 oe Le iD 2 SCL MICOM SOC lt 1 se W E a gt a BU E Ex s 3 3 NORMAL al Sd x m UART2_RX lt a o 8 E lt 2C_SDA2_SOC A sensus d m m 4 B m S z gt 12C_SCL2_soc m D D H a O a zo oo ad v dod 80 A A oo N o qi zm e lt 2C_SDA4 4 Odo 79 2 2 T so zu m I2C
18. 1 gt IN TS 1 IPO DATA 2 gt IN TS DATA 2 DATA 3 gt CI IN TS DATA 3 TPO DATA 4 gt CI IN TS DATA 4 DATA S P CI IN TS DATA 5 TPO DATA 6 gt CI IN TS DATA 6 7 gt CI TS DATA 7 AR706 Cl 33 CI Gi AR707 AR711 E CI_ADDR 0 lt ADDR O CI ADDR 12 4 ADDR 12 CLK gt ADDR 1 lt EB ADDR 1 13 lt ADDR 13 80 gt NE ADDR 21 lt ADDR 2 CI ADDR 14 4 EB ADDR 14 x CT_IN_TS_SYNC CI ADDR 3 lt lt 1 ADDR 3 PCM REG lt CAM VAL gt IN TS VAL 708 CI_ADDR 4 C EB ADDR 4 AR710 CI_ADDR 5 lt EB ADDR 5 PCM_OE 1 OE CI_ADDR 6 lt lt EB_ADDR 6 PCM lt EB WE N CI ADDR 7 lt ADDR 7 _ EB_BE_N1 PCM_IOWR lt EB_BE_NO 5V_NORMAL A 709 CI_ADDR 8 lt EB_ADDR 8 M CI_ADDR 9 lt lt EB_ADDR 9 CI_ADDR 10 lt EB_ADDR 10 Sex Lex ARZQ2 CI_ADDR 11 C EB_ADDR 11 LOO LEO mU ecM_warT lt WAIT PCM IRQA CI_cb2 2 CI_CD1 e CAM CD1 CI es 6700 6301 0 LUO iur 16v 16V 703 CI PCM INPACK gt gt caM_INPACK_N TS gt DTPI CI TS VAL XOU Orr vaL 704 TS SYNC 12pF 50 ARTOA CI TS DATA 7 7 CI_TS_DATA 6 TPI DATA 6 CI TS DATA 5
19. 26 MO_DDR_DQ26 Et 001261 4 MO_DDR_DQ 27 Fos MO_DDR_DQ27 MO_DDR_DQ28 MO_DDR_DO 28 575 DDR L _ _ 29 Fos MO_DDR_DQ29 MO_DDR_DQ30 MO_DDR_DO 301 MO_DDR_DQ 31 DDR Real USE 1Gbit IC100 H5TO1G63DFR PBC x16 LG1154D_H13D 1 1Gbit 7 6 DDR_SAMSUNG 4Gbit T7 A14 DDR SAMSUNG N6 DD IC501 LES 4B4G1646 0 M1_DDR_VREFCA enl eT M1_1_DDR_VREFCA 1 gt M1_DDR_A1 K4B4G B HCK IC501 1 K4B4G1646B HCKO co L6 i To4G APR A 1 gt M1 DDR A2 J6 3 UE 1 DDR M1_DDR_VREFDQ DDR 4 VDDCA5_M1 M1_DDR_CKE N3 M8 M8 1 VREFDQ p DDR AO 0 Ml DDR AO gt M1 DDR 5 7 T5 CRUE DDR Al sl DDR A1 51 R540 M1_DDR_A2 A2 M1_DDR_A2 71 gt M1_DDR_A7 22 N2 Hl Hi 06 R521 10K M1_DDR_A3 A3 VREFDQ M1_DDR_A3 VREFDO 8 CD M1_DDR_A8 M1_DDR_A4 pe A4 M6 1 MI_DDR_ M1_DDR_A4 gt M1_DDR_AQ 2 DDR_ M1_DDR_AS na 55 Ws Ml DDR A5 1 DDR A 10 M1 DDR A10 R543 _DDR_ js M1 DDR RESET 1 DDR A6 A6 5 M1_DDR_A6 A6 R545 AAA24 0 M1_DDR_A 11 gt M1 DDR A11 ir ag 20 a VDDCA5_M1 ap ioi M1_DDR_A 12 gt _ _ 12 es A nhs DDR_ 15 Ml DDR A8 DDR A8 Mi DDR A 13 A M1 DDR A13 R3 5 2 2 se T M1_DDR_7 M1_DDR_A9 M1_DDR_A 14
20. e North Latin America http aic lgservice com Europe Africa http eic lgservice com Asia Oceania http biz lgservice com Life s Good LED CHASSIS LD34D MODEL 42LA86 42LA86 z CAUTION BEFORE SERVICING THE CHASSIS READ THE SAFETY PRECAUTIONS IN THIS MANUAL Ze P NO MFL67733207 1304 Printed in Korea 5 en nn 2 BARELY PRECAUTIONS ennen de IRIURE 3 SERVICING PR CAUTIONS 4 SPECIFICATION ne ana annee ten 6 ADJUSTMENT INSTRUC TION sens 13 EXPLODED VIENNE aan rae ea ee 23 SCHEMATIC CIRCUIT DIAGRAM 222 1 Copyright 2013 LG Electronics Inc All rights reserved gt LGE Internal Use Only Only for training and service purposes SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by in the Schematic Diagram and Exploded View It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock Fire or other Hazards Do not modify the original design without permission of manufactu General Guidance An isolation Transformer should always be used during t
21. ERR O_DATAO DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 AUDC D DACSLRCH G PCMI3SCK G D PCMI3LRCK G PCM DACCLFCH G IEC DACS DACS DAC DACS AUD_HPDRV_LRCH AUD_HPDRV_LRCK AUD_HPDRV_SCK FRC_LR_O_SYNC_FLAG L_VSOUT_LD DIMO_SCLK DIMO_MOSI DIM1_SCLK DIM1_MOSI PWMO PWM1 PWM2 PWM_IN EPI_EO EPI_VST EPI_DPM EPI_MCLK EPI_GCLK TX GP GP GP GP GP GP GP GP GP GP GP GP 053 052 051 050 058 059 060 061 062 063 048 049 LK_OUT ACLRCH PIO127 PIO112 DACSCK ACLRCK PIO113 I3LRCH PIO126 9580UT UBMCL UBLRC SUBSC UBLRC TESTI TEST2 LOCK Terrae e ee e FE 1 TS DATA 7 A28 TPI CLK B29 28 TPI_SOP gt TPI_ERR TPI_VAL RET TPI ERR B32 TPI DATA O DATA 0 7 C31 DATA 1 B31 TPI DATA 2 A31 TPI DATA 3 C30 TPI DATA 4 A30 DATA 5 B30 TPI DATA 6 C29 DATA 7 D39 TPO_ERR gt TP 4 00 gt D31 TPO_SOP F30 TPO_VA E31 gt _ 0 TPO_DATA 0 TPO_DATA 0 7 F29 _ 1 29 _
22. L CH3 AUAD_L_CH3_IN SCART_FB_DIRECT x AUAD_ 3 55 AUAD_R_CH3_IN R423 100 EEE 0 AUAD 2 AUAD_L_CH2_IN _ _ U SC_FB gt 1 1 AUAD_ 2 AUAD R CH2 IN 10K py AUAD 1 SC_ID 5435 gt SOC 8 v3 H13A SCL H13A_SCL AUAD_R_CH1_ 1 SDA ER vi AUAD_R_REF EU WUNG U H13A SDA AUAD RE ROS NON EU 2 R436 Se AUAD_M_RE AUAD_M_REF 22 RA22 1 75 2 7K 0 AUAD L AUAD_L_REF A R n T REF PO REF PO Close to IC4300 AV1_CVBS_IN_SOC CVBS_IN3 4 N V14 K17 5 SC_CVBS_IN_SOC vis CVBS_1N2 EIS NON TU W BR TW C n TU CVBS SOC CVBS 8487 sie es bags C443 J18 SIF AGC uF CVBS_VCM SC_B RADE 33 Um PEE gt PB SOC R450 68 0 SC_G 3 bs gt Y SOC DTV MNT V OUT SOC U15 U16 GS 0 1uE 0 1luF gt i C428 1000pF In soc edt lt X BUF OUT1 I INCOM os R427 33 C419 0 047uF BUF_OUT2 ADC_I_INP ADC_I_INP 1 SC_R NIE mf gt PR SOC 100pF d v17 E oh in 50 ADC_I_INN ADC I INN E de SS gt gt gt ri Placed as close as possible to SOC F3 o 5 te om aces a Fo 0 C LD LD 2 REFT REFT 01 lt 1 TU W BR IW CO E m 5 V6
23. See Sel a A m m a 1 EPI 5 12 gt AE NN QN QN AN MM o OLED option VPPOT Not Support EST zel ile Al ep AP eee eve S m m m m m m mmm m m m m m m m m HW OPT 4 lt et M KW d od A A Ar U nn T I O d U Oe UY Or Oi OL On U U U U Do Do oO U EPI PANEL version HW en MI NINININI NI NI NIN 0201 D A a Moan MI reserved 33 R105 gt gt gt gt o o gt iK dd a a mn gt 2 HW_OPT_6 lt I2C_SDA_MICOM en I2C SDA MICOM SOC CP BOX 3 3V TU 3 3V TU 2 SCL gt 2 5 SOC D HW_OPT_7 lt 3 3V_NORMAL 3 3V_NORMAL oF e 11 Cj SMEED n I2C SDA2 EXE 12 SDA2 SOC lilo T 3 5 oen lt I2C PULL UP 33 VN R104 8 82 relire SUpport I2C_SCL2 gt I2C_SCL2_soc i 5 ojo B e b 2
24. ppc scr 3 A 92 ESD_HDMI gt D D D DDC_DATA 3 m m m m 5 O O O O T T OUT DDC CLK e e e e 3200 QLVA3201 NC ESD_HDMI ESD_HDMI GND ADJ CE_REMOTE CEC_REMOTE D3209 xd de all zl RES RCLAMP0524PA Bet T 10 C3204 C3206 C3207 gt CK _HDMI3 CK_GND 2 9 am ae gt CK _HDMI3 Lov M 3 8 C3203 10uF H S ue eod 10V C3217 a gt DO _HDMI3 gt a gt a 5 6 107 lu a DO_GND gt D0 _HDMI3 16V HDMI_ESD_SEMTEK J J 0 J 7 4 E S 27 Eni e Ge tei amp 7 5 EDD 2 A A a A 2 A 8 5 GND 03208 gm om 8 TAE NE 524 i 10 220512902727 A A 1 A gt p1 3 Vout 0 8 1 R1 R2 m m T D2 gt D1 _HDMI3 HDMI 4 3 8 D2_GND gt D2 _HDMI3 D2 5 6 gt D2 _HDMI3 5 1 2 5V 3 5V_HDMI_4 A A A HDMI_ESD_SEMTEK R3240 R3238 R3231 R3232 10 10 10 10 JK3201 e 51U019S 312HFN E R B LG 4 1 16W 1 16 1 16W Suus 1 1
25. gt SMARTCARD_DATA SD_EMMC_CLK N sr E o m m m JAPA A PGND XTAL2 EES SMARTCARD_CLK SD_EMMC_DATA 0 JAPAN XTALI 3 e SMARTCARD_DET SD_EMMC_DATA 3 L6300 BLM18PG121SN1D VDDP OFF JAPA e AY 3 1 2 e SMARTCARD_RST SD_EMMC_DATA 2 JAPAN JAPAN C6301 C6303 COS 10uF 0 1uFZE 51 JAPA 0 LUF 10V 16V 8631 WAN e gt SMARTCARD_VCC SD_EMMC_CMD 16V L6301 JAPAN 21 SUB BLM18PG121SN1D 5 gt JAPAN 2 c6302 PRES 6306 2 0 1uF 0 1uF 0 1uF 16V 16V 16V gt En B CAS SLOT CMDVCC m 6300 SECRET LGElectronics PORADJ Place CLK C3 far from C2 C7 C4 and JAPAN R6313 TS 75 ohm in I O is for short circuit Protection RESERVED R6314 1K T3 3 NORMAH N 10K R6312 ZD6300 2 6301 5V JAPAN u LG ELECTRONICS 10057542 1311FLF B CAS Slot MUDEL LE LGE Internal Use Only RF_SWITCH_CTL_50 lt o 0 RESET2
26. 0 5730 H m m 50V 35V 35V d WOOFER 0 47uF L Z 50 WOOFER lt WOOFER 5 737 d d u EH E Al C5729 WOOFER ml Al Al gt Al Ol O gt gt ame 5733 2 15701 gt af al af z um Zj ml ay af o 33 0pF SOU BLM18PG121SN1D 20V 50V 4 PGND_AB_2 D WOOFER C5703 C5704 5196 15 _ PGND_AB_1 WOOFER 1 mm LUF WOOFER OUT_B e NOQRER e L19V enter 18K NC 6 WOOFER 50V 15706 25705 1 0 NC_5 0 033uF 10 0uH e WOOFER C5724 NRS6045T100MMGK WOOFER AUD_MASTER_CLK BST_B R5701 LO BST_C WOOFER_MUTE 7 100 WOOFER g lt NC_4 ne NRS6045T100MMGK C5705 H NC 3 WOOFER H m 5 10 0uH 4 776 ___ e 65725 s 10 5707 PONDUS E WOOFER STEREO 0 1uF PGND_CD_1 6 WOOFER oe ED AUD AS 2 rem WOOFER STEREO AUD SCK 57 34 WOOFER STEREO al al al al vl el al al Nl a WOOFER STEREO lt 5738 AUD LRCH al al al 42882 D 5726 aoe 2200pF 33 R5703 W FER C gt gt OF OF m o H Bm 50V I2C_SDA1 gt gt gt 330pF e a 24V AMP WOOFER WOOFER_STEREO 50V 33 85704 WOOFER al iae 50V C5731 TAC SCH gt al a gt
27. MO_DDR_CKE NET UE K9 c9 nO A20 2 _DDR_ 05 1M0 DDR DOS NO NIE Es La 2 5 2 9 MO_DDR_DQS DDR 0051 DDR 005 DDR DOS N1 gt j 5 M ay _DDR_DOS_ L1M0_DDR_DOS_ C534 214 EI P All oe i 5 RASN MO DDRSODT 23 2 C566 0 14 DDR DOS PE L__ MO_DDR_DQS2 E 1 K3 5535 0 192 MO_DDR_RASN gt 9 1 2 272 DDR 005 N L 1M0 DDR DOS N2 o MO_DDR_CASN H9 C567 0 1uF Pop rum EIUS C10 i 2 MO_DDR_CASN bd 53 re MO_DDR_WEN Lj L3 MO_DDR_DQS DIO 0 DDR DOS E TO LS DDR WEN MO_DDR_DQS_N 1M0 DDR 05 N3 io 5 EN En MO_DDR_RESET_NL 2 4 29 D18 DDR RESET N L_ gt _ 28 DDR L1 c T D M0_DDR_DM1 5 gt MO_DDR_DQS gt MO_DDR_DM2 aes G3 MO_DDR_DQS2 CET DDR DOS NO te 63 gt DM3 DOS N2 522 ot MO_DDR_DQS1 A9 m DDR DQO B7 MO_DDR_DQS3 n e DDR MO_DDR_DQS_N1 7 B3 DEA MO_DDR_DQS_N3 23 MU SDDRADOP 5 MO VDD 15_MO DDR DOS Em por 5 523 DDR HoE VRERDG EER D3 MO_DDR_DM2 27 MO_DDR_DQ4 MO_DDRAVREFDQ M Ae D3 2 B15 LN _DDR_ 2 4 28 2o DDR 005 ate zin EAS A 25 F7 MO_DDR_
28. gt gt E 52 27 WOOFER_STEREO 0 4 7uF WOOFER_STEREO C5727 50V WOOFER STEREO C5739 WOOFER m C5714 gt WOOFER STEREO gt 10 330 5 135 33 5702 0 1uF A e Te ee PES AMP RESET N WOOFER EB 5719 5721 05723 2 50V a 0 LUF UF ml0ur 3 3V_NORMAL E uode 89V Jes 35 LS OS LO WOOE R_STEREO x 4 x1 WOOFER WOOFER d C5706 15702 3 CV e 0 LUF BLM18PG121SN1D L5705 1 50 WOOFER x 10 0uH 25710 NRS6045T100MMGK 0 UE O1 16 WOOFER_STEREO WOOFER P5700 FW25003_03 SPK_WOOFER_R eb 2 3 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELELTRUNILS EV WOOE 5 ER_L gt SPK_WOOFER_L gt SPK_WOOFER_R MODEL DATE BLOCK een SHEET LGE Internal Use Only 12V A En 3 EU AUD OUT gt gt
29. ADCO_OUT_CL SR_AP SR_AM SR_BP SR_BM SR_CP SR_CM SR_CLKP SR_CLKM SR_DP SR_DM SR_EP SR_EM D_DAC1_LRC D_DAC1_LRC D_DACO_LRC K K C K 3 6 5 4 3 2 1 0 H13A_AUDCLK_OUT K STP STP 0_CLK GP 0 SOP GP VAL GP ERR GP DATA GP STPI1_CLK GP STP STP STP STPI 04 04 04 04 04 04 04 04 05 05 1_SOP GP 1_VAL GP 1_ERR GP _DATA GP TP_DVB_CL TP_DVB_SO 3 6 5 4 3 2 1 0 5 4 K P TP_DVB_VAL TP_DVB_ERR TP_DVB_DATAO TP_DVB_DATA1 TP_DVB_DATA2 TP_DVB_DATA3 TP_DVB_DATA4 TP_DVB_DATA5 TP_DVB_DATA6 TP_DVB_DATAT TPI_CL TPI_SO 4H HHH 4 K P TPI_VAL TPI_ERR _DATAO __ 1 _DATA2 _DATA3 _DATA4 _DATAS _DATA6 _DATAT AK35 FE_DEMOD2_TS_CLK AK36 FE_DEMOD2_TS_SYNC AK37 FE_DEMOD2_TS_VAL AJ35 FE_DEMOD2_TS_ERROR 36 FE_DEMOD2_TS_DATA AH35 FE_DEMOD3_TS_CL AH37 FE_DEMOD3_TS_SYNC AH36 FE_DEMOD3_TS_VAL AG35 FE_DEMOD3_TS_ERROR AG36 FE_DEMOD3_TS_DATA AM36 FE_DEMOD1_TS_CLK AL36 FE_DEMOD1_TS_SYNC AL35 3 TS VAL AL lt FE_DEMOD1_TS_ERROR AM35 FE DEMOD1 TS DATA 0 DEMOD1 TS DATA 0 7 AN36 TS DATA 1 AN37 DEMOD DATA DEMOD DATA AR36 SOP VAL
30. AF8 U15 B 5 VDD33_5 3 AVDD33_CVBS at 13 022 5 e VDD33 6 4 Bel 0 VDD33 XTAL G Bene pes 33_7 5 aus AVDD33 CVBS 1 G 2 AK25 U24 ER 616 aazs O gt 2 VDD33_8 6 ms 79 AVDD25 v15 AVDD33 CVBS 2 G j 2s PI V e l ass 2 G D N 1 AVDD33_USB_1 8 VDD25_CVBS_1 G 2 5 Ypass M23 v23 N 3 AVDD33_USB_2 VDD25_CVBS_2 G PL MDD b VDD25 REF N En 4 AFE Power VDDC11 XTAL AK12 esti ur e W22 ANH 25 9 Er AVDD33 USB 2 NU ET z VDD25_VSB_2 G n el M a s L2 TENE em AVDD25 VDD25 REF ES PEEN 24 ep AVDD33_HDMI_2 GEN 55 4 T VDD25_COMP_1 220 Vs 7 77 D L 4 L 5 5 3 lt a 4 VDD25 LTX VDD25 2 BLM18PG121SN1D kn Do e 4 2 SV DEE L am VDD25 AUD VDD25_COMP_3 6 lt 1 cs sop AC15 VDD25_APLL 9 2 E AC24 a 97 L8 c lt 23 AD15 VDD25 AUD 1 G 5 X gt e VDD25 LVRX 1 L z AF23 AD16 VDD ede TK VDD25_AUD_2 G a gt VDD25 LVRX 2 GEE A S de L10 N N 1226 m AE14 AD17 F VTXPHY VDD25 1 b ER E BEL 2 M LS TAT AF14 18 2 1
31. EU 5 5V SYNC_IN OPT SYNC_OUT SYNC_GND RGB_IO e sc R_OUT VA4802 9 ik 5 6v R_GND EU G_OUT G_GND gt SC_R 4803 B_OUT eG AUDIO_L_IN EU B_GND sc AUDIO_GND 4 AUDIO_L_OUT 17280 T5 5V AUDIO_R_IN EU AUDIO_R_OUT e gt sc B 4805 T5 5v DAIRO18H91E BU JK4800 EU gt _ gt SC IN VA4800 Mr 20 EU EU gt SC_R_IN EU VA4806 5 T BLM18PG121SN1D AT L4800 EU EU 4800 1000 50V BLM18PG121SN1D EU 4802 Tes SECRET LGElectronics 24801 T EU EU 1 C4801 1000pF 50V EU C4803 ly Le LG ELECTRONICS DTV MNT_L_OUT DTV MNT_R_OUT BSD NC4_HO48 HD MODEL IDATE 2012 10 31 BLOCK scart HEET _ 7 ___ LGE Internal Use Only Ethernet Block LAN_JACK_POWER A 5100 5101 C5102 C5103 Oc uk ew 0luF O 1luF 0luF 16V 50V 16V 50V JK5100 XRJH 01A 4 DA7 180 LG B PI CT p 22 P2 TD P3 TD P4 RD P5 RD Pe CT VA510 VA510 VA510 VA510 5 5V T 5 5 T 5 5V T 5 5V T SHIELD THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION
32. Sh de 2 al x x al aj a an NES 0 1uF Place this Res near IC ni M gt gt x o m e m NOK al d BAS mae 16V 4 x L 85204 a a m WOL ETH_POWER_ON 2 49K 1 RSET 0 B THERMAL AVDDIOOUT MDIO e TD EPHY_MDIO Route Single 50 Ohm Differential 100 Ohm MDI 0 MDC EPHY MDC EPHY_TDP MDI 0 IC5200 PHYRSTE 33 R5220 RST_PHY from S0C EPHY_TDN RTL8201F VB CG 1 EPHY_RDP EPHY_EN OPT 3 3V_WOL MDI 1 TXD 3 L C5212 33 55251 EPHY_RDN EDID WP PHY reset from MICOM AVDD33 1 TXD 2 0 1uF OPT R5203 RXDV TXD 1 EPHY TXD1 39K al al of H m z of Hl Ali al 5 3 3V_WOL x x gt A 3 3V_WOL al d B AS A Ale 2 he ol 2 E si Sok 92 5 C5211 LO t mM s 0 1uF Gs o 16V faq N N D ol a m 0 H in in o 1 LX e i gt e e T lo oH BS EY m mul og LA 5 o ES H pas 1 1 J WOL POWER ENABLE CONTROL 3 5V_WOL 3 5V_ST A 04301 PMV48XP u R4317
33. KR TW BR CO AU R6509 3 3V_TU 3 I2C_SCL6_TU 3 120 5016 1608 11 1 C6508 33 because of derating NON_TU_W_BR TW CO OPT gt TU KR TW BR CO AU 2 255 16503 4 12 SDA6 TU CI Ld 2 SDAG 270 R6518 GLOBRL 6 7 A LOBAL 6 7 BLMLSEGIZISNUD ttes 268506 33 3 3V_TU close to TUNER 82 R6521 e AR 7er TU_W_BR TW CO JP _0_AUA gt TUNER_SIF 200 200 5 3 3v TU C LL OPT e J cegke 56529 C6530 E C6514 6522 0 1uF 22uF _____ e TD 0 14 us TU_CVBS 167 10V 4 IE 16V luF 16V B OPT E 85C 6 TUNER_SIF_TU gt E 96500 1 1 7A 7 mes ee OA TU W BR IW CO JP Q AU BLM18PG121SN1D A peed MMBIS90 6 NXP GLOBAL 6 7 else 0 7 7 1 TU C aan Q6501 C6554 C6550 1 8V_TU MMBT3906 NXP 100pF 0 1uF 8 TU_CVBS_TU Dov 16 m E close uner TU_9 N Q_T US KR 4w au TU_W_BR TW 9 1 1 R6S0G A 100 _ FEBR C6503 close to Tuner TU S N 0_T US KR TW AU 6503 1 O 1uF 0 1uF 10 EN 16V Rae se TU_O N M W jae NOUS Sn RE 1 should be guarded by ground TU IC6501 3 3V_TU _ I 11 TN 3 Signal Width gt 12113 e Signal to Signal Width 12115 TU_O N M W R6527
34. SERIAL 22 H26M31002GPR A6 E A6 E A6 E xr gt EMMC_DATA 0 7 AR8100 AT E2 A7 E2 A7 E2 R 22 5 5 5 N 1 16W E5 E12 5 E 5 E12 5 R EMMC_DAT 13 A4 c9 E8 E E8 E E8 E E E A5 10 9 14 E9 E14 E9 E14 Dole E F BMG s B2 cra E10 F E10 F E10 EMMC_DATA 4 B3 C12 F10 F2 F10 F2 F10 F2 5 G F EMMC_DATA 5 B4 F3 G3 F3 G3 F3 7 G EMMC_DATA 6 EMMC SERIAL_22 5 C14 G10 F G10 F12 G10 F as E EMMC_DATA 7 22 B6 D1 5 H5 F H5 F H5 F E 1 16 D2 25 F14 25 F14 25 F14 mb K G e D3 K6 G K6 G K6 G E R ns e M6 D4 K7 G2 K7 G2 K7 G2 m R 5 M5 D12 K10 G12 K10 G12 K10 G12 za R 5 G 7 G13 7 G 7 613 5 R HI D14 P10 G P10 G14 P10 G R H A6 E H f H H N H2 A7 E2 M H2 H2 H2 N K5 H3 C5 K5 H3 K5 H3 K5 H3 E5 E12 H12 H12 H12 f 22 SI N f H13 EMMC SERIAL 22 E8 E H13 N H H13 es E9 E14 C6 H H14 C6 H EMMC_CLK N M 7 10 4 Q J M4 J M4 N J EMMC_CMD gt DAT6 N N4 J2 F10 F2 N4 22 UA 22 EMMC_RST gt N J3 G3 F3 P3 23 23 J3 E 5 N G10 F12 5 gt 7 5 212 5 N J H5 F N 2 ae J5 F14 J14 EY J14 gt J14 E eMMC serial 100 ohm option K6 G E6 K E6 K E6 s 50V K7 62 5 lt K2 FS K2 FS 2 m gt K10 612 10 K3 10 K3 J10 3 AR8100 1 AR8101 1 AR8102
35. ET M1_ppR_opt CJ as P sn gt luF gt M1_DDR_RESET_N E 5 5 MI DDRCRASN K3 H9 1 axo nm M1_DDR_RAsN 2 4 eef pE 2 S M1_ ZR 22 3 Lu zi ala EU ed DDR CASN 2 4 DDR CASN gt c552 fo tur ES o F6 240 R501 m S DDR WEN 2 4 2 LE Jl 1 DDR ZQCAL BT ds gt 21 gt 1 2 29 29 E2 uU M1 DDR _RESET_NL gt n M1_DDR_RESET_N gt 005 M1_DDR_DQSO 11 a Li Ml DDR DQS M1_DDR_DQS_NO De M m 2 S E 2 M1_DDR_DOS1 F3 8 F4 DDR 0050 DDR 0082 Ml DDR 005 DDR 008 N1 2 SIS fa Pl M1_DDR_DQS_NO Mi DDR 005 2 1 DDR 005 52 1 DDR 0052 L M1_DDR_DQS_N2 c7 A9 M1_DDR_DQS_N R3 _DOS_ M1_DDR_DOS1 M1_DDR_DOS3 M1_DDR_DOS3 B7 B3 DDR_ B3 _DDR_ BA DDR DOS DDR DOS N3 Ml DDR 005 DDR 005 N3 El DPR_DOS_ El 15 Ml VDDC15 7 G8 G8 G4 DDR DMO gt M1_DDR_DM2 us 0 DDR DMO 4 53 1 g i EE 7 DDR_ M1_DDR_DM DR_VREFD _DDR_ y M1_DDR_DM1 M1_DDRAVREFDQ cod a 98 J8 gt M1_DDR_DM2 A LN E3 M1 M1 P3 id x 1 DDR DQO P7 MS DDR 0016 DDR DM3 Ses DDR DQ1 7 ue EE F2
36. NG 03 01x a 15 Confirm adj ad 00 99 NG 03 02x Fail OK 03 03x Success In case of keeping module is in the circumstance of 0 C it should be placed in the circumstance of above 15 C for 2 Ref ADC Adj RS232C Protocol_Ver1 0 hours 3 Adj order In case of keeping module is in the circumstance of below aa 00 00 Enter ADC adj mode 20 C it should be placed in the circumstance of above 15 xb 00 04 Change input source to Component1 480i amp C for 3 hours 1080p ad 00 10 Adjust 480i amp 1080p Comp1 Caution xb 00 06 Change input source to 1024 768 When still image is displayed for a period of 20 minutes or ad 00 10 Adjust 1920 1080 SCART RGB longer Especially where W B scale is strong Digital pattern ad 00 90 End adj 13ch and or Cross hatch pattern 09ch there can some 3 2 MAC address DIL key D L Widevine key D L ESN key D L HDCP key DIL 3 Automatic Adjustment ring 232C Port PC RS 232C Port ig gt RS ort RS or 3 1 ADC Adjustment Communication Prot connection 3 1 1 Overview ADC adjustment is needed to find the optimum black level and gain in Analog to Digital device and to compensate RGB deviation RS 232C Port 3 1 2 Equipment amp Condition 1 USB to RS 232C Jig Com 1 2 3 4 and 115200 Baudrate 2 MSPG 925 Series Pattern Generator MSPG 925FA Mode check Online Only pattern 65 Check t
37. Sese bve Af VEB VBST THERMAL 9 du LG1154AN 3 3V gt 2 5V gt 1 0V ur C2326 2328 Se luF 3300pF 10V 50V N Gud 2765 XII ERIJXE amp EP2 Switching IHE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4_HO023 HD SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET MODEL DATE ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR rr THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC GElectronics LG ELECTRONICS BLOCK rower SHEET ___ Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes TH Renesas MICOM Debug 3 5V_ST 98 els ix b 7 DEBUG 2 e o Don t remove R3014 a 23000 not making float P40 12507WS 04L 2 5 EN e gt MICOM DEBUG e MICOM RESET a PEE GP4 High MID Power SEQUENCE ER ON OFF VY ER ON OFF2 1 ER_ON OFF2_2 V ER ON OFF2 3 ER_ON OFF2_4 MICOM MODEL 10K 10K 10K 10K 10K MICOM_GED R3006 R3002 MICOM_H13
38. VCC T SS C2343 C2346 C2348 T 46 2327 EN 220208 our ZZ 0 10 R2312 T l0uF 10V 10v lev 10K 10 i GND 3 L2318 Haans POWER ON OFF2 1 5 BLM18PG1215N1D ER 3uH h 12 TO 22305 2300 2 THEBHAD 13 2 NR5040T3R3N 17 Lour 215 C2350 m 16 22 2361 C2362 2 m 159 3 IC2305 DCDC_TI10 22uF 22uF S TPS54319TRE C2359 10v 10v Ay YVout 0 8 14 R1 R2 3A 7 9 Dee IHE 2 i C2364 oS 100pF 0 R1 50V 2 5 R2335 1 16W 330K 5 un 2 2334 C2360 e 15K ES EL tu mt 8 8 el Sj 3 12V 27269 5 50V f OV VDD ii Li 1 gt Sus 2 2 E BLM18PG121SN1D 1 0V_VDD O R F e A 3 0 145 4 Vout 0 827 1 R1 R2 1 521V C2301 imum iti toto 10uF 16V 7 1 IC2303 f DCDC C2300 m TPS54821RHL EP GND TPS54327DDAR EP GND A gt hee R2307 Eu ee em ee R2304 120K RT CLK 1 4 PWRGD POWER_ON OFF2_3 10K EN VIN I I ca amp 1 8 15 1 16W d 1 1V_VDD A A V 2 lt 0 1uF LE 12301 1 GND_1 523428 VEB 2i i VBST C2314 2 mT 3 2 7 5V_NQRMAL NR5040T2R2N 0 1uF L2308 _NQ 12307 GND 2 PH 2 16V luH 2304 5 SW 2 2uH E on 3 e e 3 6 OO Bez EP END a C2324 R
39. 2 F28 TPO_DATA 3 E28 TPO_DATA 4 D28 TPO_DATA 5 E27 TPO_DATA 6 D27 _ 7 AD5 R495 100 495 195 e gt AUD MASTER AD6 R gt AUD LRCH Y6 N En Y7 198 FRC FLASH WP AC6 R 5 498 100 gt AUD SCK R c gt AUD_LRCK tj 6 411 AB7 50V gt OPT AU14 gt SPDIF OUT AA32 AA34 AA33 AB34 3 3 NORMAL 2232 mE 3 R494 AT6 gt TXB4N TXON AU6 gt TXB4P TXOP 5 gt TXB3N TXIN AU5 Aaa TXB3P TX1P gt TXBCLKN TX2N AU gt TXBCLKP TX2P AU3 gt TXB2N TX3 AU2 xA TXB2P TX3P gt TXBIN TX4 1 TXB1P TX4P gt TXBON TX5 gt TXBOP TX5P AP1 gt TXA4N TX6 AP2 AG gt TXA4P TX6P TXA3N TX7N AP3 X TXA3P TX7P gt TXACLKN TX8N AN3 gt TXACLKP TX8P AM4 au gt TXA2N TX9N gt TXA2P TX9P AL4 D TXA1N TX10 AL3 D TXA1P TX10P ARA gt TXAON TX11N H13 Ball Name AK2 gt TXAOP TX11P EPI Output AK4 gt TXB2N TXD4N TX12N AK3 gt TXB2P TXD4P TX12P gt TXBIN TXD3N TX13N TXD3P TX13P o L TXBON TXDCLKN TX14N AH3 gt TXBOP TXDCLKP TX14P AG4 gt TXA4N TXD2N TX15N AG3 gt TXAAP TXD2P TX15P Bo gt TXACLKN TXDIN TX16N gt TXACLKP TXD1P TX16P x gt TXAIN TXDON TX17N FP gt TRALEE TXDOP TX17P gt Txc4 RES gt AD4 TXC3 AD3 gt TXC3P TD TXCCLKN AC3 TD TXCCLKP CD TXC2N AB2 gt
40. Checker board single Sme 20 to 3D Sequential Packing Interleaving Interleaving meme Copyright 2013 LG Electronics Inc All rights reserved 212 LGE Internal Use Only Only for training and service purposes ADJUSTMENT INSTRUCTION 1 Application Range 3 1 3 Adjustment This specification sheet is applied to all of the LED TV with 1 Adjustment method LD34D chassis Using RS 232 adjust items in the other shown in 21207 2 Adj protocol 2 Designation Protocol Set ACK 1 Because this is not a hot chassis it is not necessary to Enter adj mode a 00 OKOOx use an isolation transformer However the use of isolation ne b 00 OKO4x Adjust 480i 1080p 1 transformer will help protect test instrument xb 00 06 _ b 00 Adjust 1920 1080 SCART RGB 2 Adjustment must be done in the correct order Begin adj 3 The adjustment must be performed in the circumstance of Een ddl OKx Case of Success NGx Case of Fail 25 C 5 C of temperature and 65 10 of relative humidity if there is no specific designation main 4 The input voltage of the receiver must keep AC 100 240 ad 00 20 000000000000000000000000007c007b006dx V 50 60 Hz sub Sub 0021 000000070000000000000000007 00830077 5 The receiver must be operated for about 5 minutes prior to MM NG 03 00x Fail the adjustment when module is in the circumstance of over
41. D c M 5 18pF Close to the tuner LNB_OUT 50V TH N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC GElectronics Ed rj ELECTRONICS SHEET Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes TU6702 EDSO H6oLF B TU6703 TDSQ G651D B TU6704 B TIO 34090 TDSN G35I1D TU6700 TDSS H651F B
42. M_REMOTE_RTS KES UART1_RTS PHYO 0 HDMI_RX1 0 M_REMOTE_CTS lt UART1_CTS YO_RX1P_0 HDMI_RX1 TP109 AE35 EEEN eae 1 lt 1RB_SPI_ss IRB SPI 55 rera E _CS0 GPI036 YO_RX2P 0 HDMI_RX2 m 12107 Q 1RB_SPI_MOSI IRB_SPI_MOSI lt SPI 8 YO_RXCN_O aay HDMI_CLK _5 _ 50 IRB SPI MISO CJ epe E DI0 GPIO39 YO_RXCP_O lt 1 HDMI_CLK lt __ ings spi IRB SPI CK lt S SCLK0 GPIOS37 AG34 R32 5 51 HUB_PORT_OVERO AF33 USB_OCD1 HIGH LOW 2633 SP 7 501 E i c ame eum ous nn es on C SPI DIL HUB_VBUS_CTRLO gt USB_CTL1 MODEL 0 Areal Taiwan non Taiwan SPI SCLK1 Model Option 3 3V NORMAL MODEL_OPT_1 FRC 120H No FRC 60H ARTS A 2 6062 2C_SCL1 CT apis SCLO GPI066 MODEL_OPT_2 Panel FHD UD 2C_SDA1 anie 52 0 6 065 I2C_SCL_MICOM SOC 0 SCL1 GPIO64 AP 2 MODEL_OPT_3 OLED OLED I2C_SDA_MICOM_SOC api 5 1 6 1079 ei M By T E Module via vi2 I2C_SCL2_soc C SCL2 GPIO78 Zo lo o o Do 5o 9 Ho AR17 d a a el E A T2C_SDA2_SOC SDA2 GP1077 m MODEL 5 Reserved Default AP 6 H rn d N
43. OPT CI 11 CI_DATA 3 EB_DATA 3 C ADDR 11 5 ON CI 5 DATA 0 7 _IN_TS_ 1 CI_ADDR 2 ADDR 9 A 2 CI_ADDR 8 da doe CI TS R723 R725 4 713 EB DATATA 3 CI ADDRIL C ADDR 13 10K 10K IN 5 DATA DATA 5 EB_DATA 5 4 CI ADDR 14 ADDR 14 CI OPT CI CI_IN_TS_DATA 2 5 Wish Sas CI DATA 6 EB DATA 6 IN TS DATA 3 6 R722 33 e EA RCM CI 7 EB 7 C706 0 1uF 7 C707 OPT i e 1 0 0 1uF 5V CI ON R715 0 8 R718 GT 12 A CI_IN_TS_DATA 4 OPT OPT L x DATA 0 7 o CI_IN_TS_DATA 5 CI_IN_TS_DATA 6 R704 R709 EDUC C1 ADDR 12 ADDR 12 gk m IN_TS_ CI ADDR 7 ADDRIJ 6 CI_ADDR 6 33 CI CI_ADDR 5 PCM_RESET e CI ADDR 5 CI PCM_WAIT lt 22 e ADDR 4 lt _ 4 _ lt 33 TNNT CT_ADDR 3 CI_ADDR 3 R71 0 CI I_ADDR 2 10K PCM_REG e AAA cS CI ADDR 2 OPT CI TS VAL lt CI_ADDR 1 ADDR 1 CI TS SYNC C CI ADDR O CI ADDR O 0 CI_TS_DATA 0 lt _ n CI TS lt CI DATA 1 5V ON 51 CI DATA 2 5 21 lt eo PCM_INPACK CI_CD2 lt R717 100 R719 10K OPT een er R713 9 lt CI_IN_TS_VAL e CI_IN_TS_CLK CI_IN_TS_SYNC C705 12 50V OPT DATA 0 7 CI 701 DATA O gt CI IN TS 0
44. TPI DATA 5 199 CI_TS_DATA 4 TPI_DATA 4 700 CI CI_TS_DATA 3 LP DATA 3 CI TS DATA 2 TPI DATA 2 CI TS DATA 1 TPI DATA 1 100 NP TS DATA O0 _ 0 0 7 EB DATA DATA 0 7 BOD NG4A ILOQO7 ILD MODEL T BLOCK SHEET LGE Internal Use Only PANEL POWER 3 5V_ST Z 12V 12V R2337 nb A 100K 2 3 L2313 UBW2012 121F PD_ 12V PD_ 3 5V R2338 R2300 UM RE
45. ans gt REFB REFB 02 HW OPT 2 87 1 R447 68 C440 0 047uF V7 G3 ADC1_COM 03 HW_OPT_3 10K R448 68 C441 0 047uF 010 G2 R428 4 C420 0 047uF ADC2_COM 04 lt 4 rm 1 Pb EC RTF gt COMP2_PB_IN_SOC 84451 68 C442 0 047uF v12 G 1 H 33 uF S COMP2 Y SOC J ADC3_COM 05 aa W_OPT_ x C429 TO SS nies a dde SC ID SOC ze 561 51 HW_OPT_6 C422 0 047uF SC_FB_soc gt SC1_FB 07 lt 7 COMP1_Pr m oe gt COMP2_PR_IN_SOC us H ol o i n 10 R431 COMP1_PB_IN_SOC PB1_IN 08 HW_OPT_8 lt o A Er V8 93 al a ec PL COMP1_Y_IN_SOC 09 HW OPT 9 2 E E ay X u 5 gt i d 1 Y IN SOC SOY ser GPIO10 HW_OPT_10 U E z d D D 20315 SOC x PRI 11 i 6 COMP2_PB_IN_SOC PB2 GPIO12 011 2 COMP2_Y_IN_SOC gt 2 1 cP1013 7 COMP2_Y_IN_SOC_SOY 5 2 cp1o14 Near Place Scart AMP COMP2_PR_IN_SOC PR2_IN GPIO15 SC BUF am EU EU AN iif gt SCART_AMP_R_FB 10K 25V1uF C6006 R6006 EU EU 2 5V Normal ul 2 es SCART_AMP_L_FB Placed as close as possible to IC4300 luF 25V C6001 R6005 J 3 3V_NORMAL AUDIO IN i AUAD_REF_PO lt TE 1 C447 C455 R418 27K
46. ment ES devices Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity suf ficient to damage an ES device General Soldering Guidelines 1 Use a grounded tip low wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 F to 600 F 2 Use an appropriate gauge of RMA resin core solder composed of 60 parts tin 40 parts lead 3 Keep the soldering iron tip clean and well tinned 4 Thoroughly clean the surfaces to be soldered Use a mall wire bristle 0 5 inch or 1 25 cm brush with a metal handle Do not use freon propelled spray on cleaners 5 Use the following unsoldering technique a Allow the soldering iron tip to reach normal temperature 500 F to 600 F b Heat the component lead until the solder melts c Quickly draw the melted solder with an anti static suction type solder removal device or with solder braid CAUTION Work quickly to avoid overheating the circuit board printed foil 6 Use the following soldering technique a Allow the soldering iron tip to reach a normal temperature 500 F to 600 F b First hold the soldering iron tip and solder the strand against the component lead until the solder melts c Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil and hold it there only
47. 20 ONKIX or NG 2 Check the menu on in start UTT 4 APP History Ver 25682 Eye Q Gain 5000 DB LGD_ALEF 512173 LGE Internal Use Only 4 Manual Adjustment ADC adjustment is not needed because of OTP Auto ADC adjustment 4 1 EDID The Extended Display Identification Data DDC Display Data Channel download 4 1 1 Overview It is a VESA regulation A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input It is a realization of Plug and Play 4 1 2 Equipment Since embedded EDID data is used EDID download JIG HDMI cable and D sub cable are not need Adjustment remote control 4 1 3 Download method 1 Press ADJ key on the Adjustment remote control then select 10 EDID D L By pressing Enter key enter EDID D L menu 2 Select Start button by pressing Enter key HDMI1 HDMI2 HDMI3 HDMI4 RGB are writing and display OK or NG For HDMI EDID DVI D to HDMI or HDMI to HDMI 4 1 4 EDID DATA BC ECC CE EEE EDS EE ooo oo FF er er rr rem se 80 78 4C 99 ze oF so 54 At 00 st 40 45 40 40 71 40 01 01 01 01 O2 80 18 71 38 2D 40 58 2C s o oo oo se fee so s
48. 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes LG ELECTRONICS LVDS FILRE AND ELECTRICAL SHOCK HAZARDS T Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 51Pin LVDS OUTPU LVDS P7201 FI RE51S HF J R1500 Connector RAOP TXAON TX11N RAIN TXAOP TX11P TXAIN TX1ON RA2N TXA1P TX10P UD_OLED R721 3 MW FRE RESET OLED FRC_RESET LVDS_VAL ELVDD_ON OLED 0 12C SCL1 NC OLED R720 I2C_SDA1 7200 0 UD CPBOX Pek ED R7201 0 UD CPBOX i26 R7204 UD gt INV_CTL RS VDS SEL OLED 0 FLASH WP R7213 a IN el 10K ALEF R7215 L DIM_ENABLE TXA2N TXON RA2P TXA2P TX9P GND RACLKN TXACLKN TX8N RACLKP TXACLKP TX8P GND RA3 TXA3N TX7N RA3P TXA3P TX7P RA4 TXA4N TX6N RA4P TXA4P TX6P GND BIT_SEL BIT_SEL RBON TXBON TX5N RBOP TXBOP TX5P RBIN TXBIN TXAN RB1P RB2N TXB2N TX3N RB2P TXB2P TX3P TXBCLKN TX2N TXBCLKP TX2P TXB3N TXIN 1 TXB4N TXON TXB4P TXOP T CON 5 5 POWER OFF R7214 10K LYDS_BIT_SEL_LOW PANEL_VCC
49. 5V_NORMAL 33 5V HDMI 2 e e e HDMI_HPD_2 5V_HDMI_2 A e BODY_SHIELD i x JJ S va3205 E I ESD_HDMI 23200 lt rREEPOR HP DET 2 32049 16v L gt 5 R3209 22 N Ala e 224 DDC_SDA_2 e _ C3225 R3219 ed 0 1uF GND L VA3209 R3217 d alz amalzinmumizinmnm z aa N 16V ESD_HDMI R3210 es 47K 47K R3225 R3228 uo oilajaizimem zin z nmiz nhn DDC_DATA BNN entel i 47K AJAJ ALX XX Kx XxX XxX ALN Sas lt lt als mit ee 3 3V_NORMAL DDC_CLK ESD_HDMI 227083204 LT _5 1 lt ppe_spa_2 Zr ESD_HDMI NC 1 C _5 1 2 T AD Momus 5V NORMAL HDMI2 HDMI 3 5V_NORMAL PR CK _HDMI2 se gt CK _HDMI2 A A Sy_HDMI_4 A is canes E 2 GND Li P gt CK _HDMI2 R1XON 3 R3211 33 5 lt e HDMI2 gt HDMI INT i ET Pu 53201 V lt lt R1XOP 4 I2C_SCL5 ves gt D0 _HDMI2 tc 207 032050 RIXIN 5 R3237 33 GERD D D0 _HDMI2 o s D1 2 I2C SDAS RIXIP R3214 33 E TERM 6 HDMI S W RESET R3218 R3220 R1X2N 7 ES 47K 47K R3226 R3229 D
50. LCD TV connection diagram T Video error Vertical Horizontal bar Check Link Cable LVDS reconnection A10 A10 32 37 42 47 55 residual image light spot condition A11 11 32 AUO Adjustment Test pattern ADJ Key Exchange T Con Board 1 A 1 5 Exchange T Con Board 2 A 2 5 lt Appendix gt 1 Defected Type caused by T Con Exchange LED driver Board PSU A 3 5 pisci M Inverter Module ther Exchange Module itself 1 Exchange Module itself 2 5 5 Continue to next page N O1 ee 2 Standard Repair Process Video error 2012 12 06 First of all Check whether all of cables between board is inserted properly or not Main B D Power B D LVDS Cable Speaker Cable IR B D Cable a A4 Check Back Light Y Check Power Board On with naked eye 12 3 5 etc mA Check Power Board 24v output Repair Power Board or parts Replace Inverter or module Replace T con Board or module And Adjust VCOM A28 Repair Power Board or parts Precaution A7 amp Always check amp record S W Version and White Balance value before replacing the Main Board Replace Main Board gt Re enter White Balance value Standard Repair Process No video No audio Revised date date A Video error ened 12 06 Error pum LCD symptom A4 Check various voltages Check and No Video ole asper replac
51. LRCH 33pF R4212 50 C4214 33 CAMERA CAMER id AUD LRCK 33pF R4213 50v C4212 33 CAME CAMERA POWER ENABLE CONTROL 5V NORMAL 3 5V_CAM A A 50v C4211 3 5V_ST A CAMERA_NON_OLED 04201 UBW2012 121F PMV48XP OLED e CAM_PWR_ON_CMD lt e m ST BY DET CAM 5 lt 4208 4210 e ZA Tur d A 10 84220 gt e CAMERA CAMERA CAMERA_NON_OLED 10K x 0 R4200 0 R4202 Ze e CAMERA gt USB2_HUB_IC_IN_DM USB_DM3 z P M 5 0 R4201 064203 2 LRA4209 USB CAMERA DP e USB2 DP USB_DP3 OS 2 2K CAMERA NON CAMERA CAMERA NON OLED USB_CAMERA_DM e 84207 f MMBT3904 NXP AS CAME RASNON OLED CAMERA_NON_OLED E A p Ga do O SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES HO0OAZ HD SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET MODEL UB DATE ZOE OS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics LG ELECTRONICS BLOCK SHEET Z LGE Internal Use Only Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 5V_USB_1 USBI 3 0 1 2
52. R3003 MICOM_NC4_8PIN R3013 MICOM_PDP R3007 MICOM_TOUCH_KEY R3010 MICOM_LOGO_LIGHT 10K R3007 1 56K R3007 2 22K MW MICOM OLED MAIN MICOM OLED 10K 10K 10K 10K 10K 10K R3000 MICOM_M13 R3005 MICOM_NON_GED R3008 R3001 R3004 MICOM_GP3_12 15PIN R3012 MICOM_LCD OLED MICOM_TACT_KEY MICOM_NON_LOGO_LIGHT rj SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR TH I E CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright O 2013 LG Electronics Inc All rights reserved Only for training and service purposes 2 5 MICOM I2C_SDA_MICOM EDID WP c2 9 PANEL CTL WOL WIFI POWER O IR HDMI CEC POWER ON OFF2 2 POWER ON OFF2 3 EDID WP lt gt ON gt SCART_MUTE gt POWER ON OFF2 Q ST or o 5 n m 3 u a 3000 a p 8 32 768KHz po EE 45 3 5 ST HDMI_WAUP HDMI_
53. TXC2P TXGl AB3 gt TXC1P AAS gt AR5 lt EPI_LOCK6 BSD NC4_H004 HD LGE Internal Use Only IC100 LG1154D H13D
54. Y External Input Component RGB and HDMI DVI by connecting Jig pattern Generator Set top Box etc Standard Repair Process Established EE error Revised date 17 DC Power on 4 Y Replace ns by pressing Power Key On Remote control 19 Stand By Red N Operating white Check Power cord was inserted properly Chose Check ST BY 3 5V A18 Replace Power B D Standard Repair Process Established Error B Power error 12 06 Check outlet Check A C cord Check for all 3 phase power out Fix A C cord amp Outlet and check each 3 phase out Please refer to the all cases which can be displayed on power off mode Off when on off while viewing power auto on off A22 Check Power Off Mode is A19 If Power Off mode is not displayed Check Power B D voltage Caution Check and fix exterior of Power B D Part Power off List E OEE Mi m OFFTIMER EME SLEEPTIMER ERE INSTOP ERE _ ONTIMER POWEROFF RS232C RS232C RESREC POWEROFF RECEND POWEROFF SWDOWN Replace Power B D Revised date date Y Replace Main B D GE N Replace Power B D Replace Main B D Explanation Power
55. gt DVB C Symbolrate 4 0Msymbols s to 7 2 Msymbols s Modulation 16 64 QAM 128 QAM and 256 QAM gt DVB S S2 symbolrate DVB S2 8PSK QPSK 2 45 Msymbol s DVB S QPSK 2 45 Msymbol s viterbi DVB S mode 1 2 2 3 3 4 5 6 7 8 DVB S2 mode 1 2 2 3 3 4 3 5 4 5 5 6 8 9 9 10 input Voltage AC 100 240 V 50 60 Hz Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 5 External input format 5 1 2D Mode 1 Component input Y CB PB CR PR so _ amp oo HDIVIZp usum ao 2 HDMI Input PC DTV om se 99 Tee 3 oo pos 0 3 ma vesaves VESAGSVGN VESA XGA s sra VESASXGA s ame 605 VESAWXGA WUXGACEASGTD HDMI DTV T s 2020 4496 45 1417042 4 25 sw 20 im o zi mia 1417042 w 3 s Copyright 2013 LG Electronics Inc All rights reserved 8 LGE Internal Use Only Only for training and service purposes SDTV 480P HR SDTV 480P SDTV 576P SDTV 576 i HDTV 720P HDTV 720P HDTV 10801 HDTV 10801 HDTV 1080P NEN HDTV 1080P 1080 253 1080
56. gt M0 DDR DE re R542 ONE RS P2 S VDD amp 15 MO DDR BA 2 gt M0 DDR BA2 0 CLK MO_DDR_A6 2126 Wo ODE M R8 ne L8 LN DDR A7 A7 E _DDR_ V B10 Sa So DDR AB EEn as 2 MO_DDR_A7 FY DDR 0 0 de am R3 MO DDR T8 A10 n n A9 9 See al B2 DDR CLKN gt MO_U_CLKN p 17 Mo Dew E 2 e Al 0 DDR A10 A10 AP San L7 D9 MO_DDR_D_CLK f gt M0 D CLK gt D CLKN gt M0 0 R7 Ax e DDR CLKN 219 M0_D_CLKN MO_DDR_A11 11 _DDR_ E F ud por erke M0_DDR_CKE M0_DDR_A12 25 A12 BC MO_DDR_A11 wl MO_DDR_ MO_DDR_A13 s MO_DDR_A12 12 RE PE F21 MO_DDR_A14 ET MO_DDR_A13 13 Vi dr gt 21 pig MO_DDR_A14 14 MO_DDR_RASN gt MO_DDR_RASN MO_DDR_A15 A15 7 N9 oM E20 MO_DDR_A15 15 MO_DDR_CASN 75 gt M0 DDR CASN 1 DDR BA DDR WEN gt M0 DDR WEN ue 22 MO_DDR_BAO BAO RT MO_DDR_BAL BAL PA de Ela VDDC15 MO DDR BA2 DDR 0 DDR RESET gt M0 DDR RESET A DDR_ BA2 4 M M3 FREE Al 7 F9 R500 MO_1_DDR_VREFCA DDR ZQOCAL d REA SERSA A MODS K7 1 MO_U_CLK el 1 MO_D_CLKN 2 K7 20 Te thus MO_U_CLKN MO_DDR_DQS n DDR 0050
57. upgrade the S W or Mechanical noise is a natural provide the description phenomenon and apply the 1st level X f there is a Tak Tak noise from the cabinet refer to the KMS fix information and then proceed as shown in the solution manual For models without any fix information provide the description description When the customer does not agree apply the process by stage Describe the basis of the description in Part related to nose in the Owner s Manual Standard Repair Process F Exterior defect Established 20121206 Symptom Exterior defect Revised date 0000 gt Replace module gt BCR afore A28 Zoom part with exterior damage Replace cabinet Replace remote controller Replace stand Standard Repair Process nn G Network Error an 2012 12 06 Exterordetect Revised date 000000 Check Wired ethernet cable connection Check whether AP has a probelm or not Setting gt Network gt Networ Status Check Network status Check Network connection WiFi N Check Check Replace WES ing S W Version ae Wired Wifi status Main B D Check ethernet Port Cable sub Assy S W Upgrade Check connection with AP or internet WiFi AP Wired ethernet port Standard Repair Process ae eee Check defect CI slot pin Check it s worked Cl 1 2 or 1 3 Setting gt Antenna gt Cl informati
58. 04000 R4002 LIGuiMBT3904 NXP Ei R4001 10K LOGO_LIGHT LOGO_LIGHT 3 5V_ST A e R4008 R4009 10K 10K 5 5 R4006 100 KEY1 lt e RAGOT VA4001 NON_EYE_Q_8P 5 6V a P4002 TT 2 al ae co Quy 12507WR 08L C4001 C4002 0 1 4 O 1uF 4000 5 6V 7 AMOTECH CO ITD es e 3 5V_ST A L400 BLM18PG121SN1D ee arn t C4005 R400 1000prF 10K 50V 5 LOGO_LIGHT_WAFER NON_OLED NON_OLED IR lt e C4006 VA400 100pF 5 6V 50V AMOTECH CO LTD 84011 100 EYE_SCL EYE_Q_10P L va4004 ADMC 5M 02 200L OPT EYE 0 10P P4004 R4010 T00 12507WR 10L EYE_SDA e EYE Q 10P 4 va4003 ADMC 5M 02 200L 3 3V_NORMAL NON_OLED L4002 3 5V_WOL 120 ohm L4000 120 ohm BLM18PG121SN1D gt TE C4004 SMAW200 H128S2 Dos C4007 0 1uF P4003 OLED_DEV 100 3 5V_WOL 3 3V t C4012 USB_DM RTS E For WIFI DM ed 1 y H 1 SJ RX 1
59. 10_XTAL E VDDC10_12 G H7 GEE VDDC10 13 G GEN H8 BR 0l 20 g AVDD10_CVBS G T 78 AVDD10_VSB G SE AVDD10_LLPLL G 2 L7 GEE aus Pci DVDD10_APLL_1 G 8 G 7 L8 DVDD10_APLL_2 G 575 LTX_VDD G VREES i 9 7 G 5210 P11 D hen VSS25_RHF VSS25_REF GN 14 4 B 1 5V_Bypass R7 4 15 Py Pas R8 2 G GN 7 T8 P e 51715 G Ea ee ve R7 ENS O7 1 5V DDR VDDC15_MO VDDC15 MO VDDC15 MO v8 R8 ypass A A W8 x GND G R10 1 0V_VDD VDD10_XTAL VREF 0 VREF_MO_1 A A TT A GND G osu A GE R11 a GND G cT M ET mq mq 1211 lt SUR 8 R13 BLM18PG121SN1D Oe 5 9 B E GND 11 G HA e BLM18PG121SN1D 5 m ty GND_12 G 5 3 5 5 5 oe 3 b o g ma 3 a iu E m GND 13 G EN o gt gt ar E R16 MM RM GND_14 G m E GND_15 G m m m m e GND_16 G e e GND_17 G ae 5 GND_18 G Em ae GND 9 G RB ER G i T10 9 20 G GEEN G T11 G 1 0V_VDD G 12 A 3m P VDDC 15 1 5V DDR VDDC15 M1 VDDC
60. 40 PVINB1_2 ss 1 16W 5 MMBT3906 NXP 507 KL gt e 9 9 ss CTT C7714 C7716 10uF 10uF ZZ10uF 25V 25V 25V a gt 2 55 oO e gt A C7724 7731 R LuF e 33K OPT 0 1uF 25V ns 1 16W 7740 16V VD 1000pF A H_VDD L7703 A om 1 A NR6020T6R8NC a 50V 6 8uH 2 L o T TE od R7729 C7715 7722 TI 2 7K 10uF 10uF 7 1 16W 16 16V 5 Right Source 41PIN LOCATION A s R7772 m 39K gt 7 1 16W 1 ue R7718 luF IAE b ute IC7702 50V 50V us 1 1 7821 7713 7729 1 16W A PANEL 2 2 pe VCC18 A 1 16W BN e VOUT vst A VDD_EPI c A VCOM2 L7704 D7701 R7720 22uH SX34 E 47K Vs C7703 C7702 40 gt O 1uF 0 019 C7723 C7725 C7734 C7738 77 32 50V 50V 1 our S210uF Zo iur 0 1uF 22O lur VENT VINS RTA TO e 25V 25V 50V 50V 50V 100 TOOK VCOM_P MN MN TE AMEN 1 16W 1 16W 1 16W OPT 1 18 471 Z OUT 7 R7765 GET MN gt vcoML_FB 1 16W CLK3 R7766 OPT lt DEVEL BLOCK 1 16 CLK5 PT CIE 27767 1 0 VGH_R R7702 1 16W lt VGH_F 100 TD VGH_ODD CH E R7
61. A1 08 00 31 40 45 40 61 40 Checksum of sent data 30 01 01 01 01 01 01 40 45 00 40 84 63 00 so ro fas 60 53 10 00 4C 47 20 54 A Acknowledge Send JA 00 DD Ack A 00 okDDX RS 232C Command used during auto adjustment RS 232C COMMAND CMD ID wb 00 00 Begin White Balance adjustment wb 00 10 Gain adjustment internal white pattern wb 00 1f Gain adjustment completed E wb 00 20 Offset adjustment internal white pattern wb 00 2f Offset adjustment completed End White Balance adjustment b ff internal pattern disappears Ex wb 00 00 gt Begin white balance auto adj wb 00 10 gt Gain adj ja 00 ff gt Adj data jb 00 so 7r 4 2 White Balance Adjustment 4 2 1 Overview e W B adj Objective amp How it works wb 00 1f Gain adj completed 1 Objective To reduce each Panel s W B deviation wb 00 20 Start wb 00 2f end Off set adj 2 How it works When R G B gain in the OSD is at 192 it wb 00 ff End white balance auto adj means the panel is at its Full Dynamic Range In order to prevent saturation of Full Dynamic range and data one of R G B is fixed at 192 and the other two is lowered to find the desired value 3 Adjustment condition normal temperature 1 Surrounding T
62. C432 4 7uF LUF 10uF SC_L_IN gt AUAD_L_CH3_IN IC400 EU 25V 51K Y oe MM1756DURE m AUAD L REF 1 1 5 exon R457 1 FRE T 51K R419 27K C433 4 7uF 5 SC_R_IN gt AUAD_R_CH3_IN z 1 DT 5 R438 TO T TE DTV MNT_V_OUT_SOC i lt AUAD_R_REF lt 1 DTV MNT_V_OUT LE COMP1 AV1 DVI_L_IN R420 27K C434 4 7uF AUAD_M_REF C_ e gt AUAD_L_CH2_IN 9 R439 10K 1 Li z C456 5 1 R458 arr COMP1 AV1 DVI_R_IN aue ease m EUIS 4 7uF 10V gt AUAD_R_CH2_IN C448 R440 10K 1 4 TuF 107 TU_W_BR TW TU_W_BR TW TU_W_BR TW R443 1 444 1 C436 1 MW MW 100pF 220 220 12V NON_TU_W_BR TW lee R443 C437 s i ADC_I_INN lt 51 0 01uF NON TU W BR TW xo ESS C436 1406 AFE 3CH REF Setting ot To ADC 22pF EU NON_TU_W_BR TW E 3 3V_ NORMAL R444 38 SCART_Lout lt e SCART_Lout_SOC EA ADC NP e IF P m 5 0 01uF Placed as close as possible to IC4300 2 2ur EU SCART_Rout SCART_Rout_SOC Moe uner F Filter Placed as close as possible to IC100 C441 C406 pu gt mm 5 55 2 2uF SC_FB_BUF 0 1uF se re 10V C446 SCART_FB_BUFFER O 1ur Must be used Sc FB HP OUT HP_OUT 3904 NXP 1400 1401
63. C44 0400 BLM18PG121SN1D BLM18PG121SN1D gt REFB HP_LOUT_MAIN IAUDA_OUTL 5 _ _ 7 D up pout 7 gt 0 1uF z mo HP_LOUT_AMP HP_OUT HP_ROUT_AMP HPL OUT C400 C407 C409 SON u p 0 01uF ae 0 22uF 10 10V m zz a di R6451 aa DIMMING 100 Pw HP ROUT MAIN C 1 9 li AUDA_OUTR n Place at JACK 5 DE 10 C401 100 R490 0 01uF PWM DIM2 En BRUT 100 DIM lt 529 PWM2 THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRIC AL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics LG ELECTRONICS L DIMO MOSI 7 Ll L DIMO_VS lt L DIMO_SCLK 16101 1011 5 1 NON BRAZIL
64. CK RCLAMPO524PA D3210 CK_GND 1 10 4 524 z 2 9 gt CK _HDMI4 1 10 CK gt CK _HDMI1 gt gt CK _HDMI4 3 8 9 D0 DO gt CK _HDMI1 AT 4 7 3 8 E DO_GND gt DO _HDMI4 a 4 7 i 5 DO _HDMI4 gt DO _HDMI1 DO DO 5 6 gt 50 _ 1 HDMI_ESD_SEMTEK D1 3 5V_ST HDMI_ESD_SEMTEK D3214 D1_GND D1_GND eee d Bi D1 gt D1 _HDMI4 bee 2 9 55 gt 1 _ 4 es ae m D m ED GEE GB BD 22 3 8 R3247 MMBT3906 NXP a a ap gt 1 HDMI1 E a 7 im R3243 10K 03201 HDMII1 D2_GND 1K 1 zE T D1 _HDMI1 gt D2 _HDMI4 B HOME S W OUTRUT D2 5 6 D2 gt 2 _ 4 TELAM H H H uH Nar en ds UE eis Te 5 3223 5 Re Et dog Soe p2 HDMI_ESD_SEMTEK 0 047uF 8 8 2 8 i m m m m m 25 gt MHL DET MESA ENE OMA ES ake Sel _ an gt V 03200 8 xf 33235332 e 288 JK3202 HDMI ESD SEMTEK 5100195 312HFN E R B LG T MMBT3904 NXP E HDMI4 With MHL 51U0198 312HFN E R ETLG URIS f L HDMII With ARC 5 J ap GE em ou GD us gt 5V_NORMAL R3251 ye
65. Check the Sound from the Speaker or using AV amp Optic TEST program It s connected to MSHG 600 Flow Line Remark Inspect in Power Only Mode and check SW version in a master equipment Cell Line 4 12 Camera Function Inspection 1 Objective To check how it connects between Camera and PCBA normally and their Function 2 Test Method This Inspection is available only Power Only Status 1 Slide Camera Up 2 Camera s Preview picture apeears on TV Set 3 Slide Camera Down e Inspector e BONN Power Power Only Only Slide Up Status Inspector lt Slide Down Status gt Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 21 4 13 Ship out mode check In stop After final inspection press IN STOP key of the Adjustment remote control and check that the unit goes to Stand by mode 4 14 Tool Option selection Method Press ADJ key on the Adj R C then select Tool option 4 15 GND and Internal Pressure check 4 15 1 Method 1 GND amp Internal Pressure auto check preparation Check that Power cord is fully inserted to the SET If loose re insert 2 Perform GND amp Internal Pressure auto check Unit fully inserted Power cord Antenna cable and A V arrive to the auto check process Connect D terminal to AV JACK TESTER Auto CONTROLLER GWS103 4 ON Perform GND TEST If NG Buzzer will
66. E F HDMI 2 C S 8 71 zel zen Bic irt EINER Foo oo ro aa 2 20 oo vo fre zo 20 20 20 20 or er Sralsielrielelalstololete rr fae 10 os 1s os os 02 12 20 25 or so Los s o 20 os 16 20 se m pese NIN LGE Internal Use Only HDMI 3 C S 8 61 4 2 2 Equipment EDID Block 0 Bytes 0 127 00H 7FH 1 Color Analyzer CA 210 LED Module CH 14 1 2 4 5 6 7 2 2 Adjustment Computer During auto RS 232C protocol 00 00 FF FF FF FF FF FF 00 1E 6D 01 is needed 10 01 17 01 03 80 AO 78 OA EE 91 3 Adjustment Remote control 4 Video Signal Generator MSPG 925F 720p 216 Gray Model 217 Pattern 78 Only when internal pattern is not available 50 40 70 36 oo 40 Color Analyzer Matrix should be calibrated using CS 100 4 2 3 Equipment connection MAP Color Analyzer RS 232C Pattern Generator Signal Source If TV internal pattern is used not needed 4 2 4 Adj Command Protocol HDMI 4 C S 8 51 lt Command Format gt CMD LEN Number of Data Byte to be sent 00 00 FF FF FF FF 00 60 oo 7 10 01 17 01 03 80 A0 5A 78 OA EE 91 por hod ata i a 20 50 54
67. E15 AP 33 AAD_DATA5 D15 AR33 AAD_DATA4 C15 AP32 AAD_DATA3 E14 AR32 AAD_DATA2 D14 AP31 _ 1 C14 AR31 AAD_DATAO E13 AP30 AAD_DATAEN B18 AT36 ADCO_OUT_C 12 AT30 SR_APO B12 AU30 SR_AMO 13 AT31 SR_BPO B13 AU31 HSR_BMO A14 AT32 HSR_CPO B14 AU32 HSR_CMO 15 AT33 HSR_CLKPO B15 AU33 HSR_CLKMO A16 AT34 SR_DPO B16 AU34 SR_DMO 17 AT35 SR_EPO B17 AU35 SR_EMO AT14 ee 15 NC ax b e ACT R402 33 ANS R405 33 AR14 R400 33 AP14 AN14 AP13 AF6 lt AF7 PWM2 7 AE6 BPL_IN 5 soc gt gm RT DPM MCLK_soc lt 2 AN SOC lt LGlI154A gt E duce AD LG1154D H13D INTR GBB INTR INTR AGPIO _FS20CL _FS21CL _FS23CL _FS24CL _FS25CL _HDMI_MC D_DAC1_SC D_DACO_SC D_DACO_LR D_ADC_LRC D_ADC_SCK D_ADC_LRC BB_SCL BB_SDA BB_T BB_T BB_T BB_T BB_T BB_T BB_T BB_T BB_T BB_T BB_T BB_T _CLK _ERR _SOP _VAL _DATA _DATA _DATA _DATA _DATA _DATA _DATA _DATA CLK_54M CVBS_GC2 CVBS GC1 CVBS GCO CVBS UP CVBS DN FSOOCLK DAC START DAC 4 DAC DATA3 DAC DATA2 DAC DAC DATAO D GC4 D GC3 D GC2 D_GC1 D_GCO D_DATA9 D DATAS D D_DATA6 D DATAS D_DATA4 D_DATA3 D_DATA2 _ 1 D_DATAO D_DATAEN
68. HDTV 1080P EE 5 2 3D Mode RF Input 3D mode manually 1080 DTV 720 2D to 3D _ 576 Side by Side Half 5761 amp Bottom SD ATV CVBSISCART 2 RF Input 3D eee mode ae Side by Side Half Frame Compatible Top amp Bottom 3 HDMI 1 3 supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 720 576 31 25 SDTV 576P 2D to 3D Side by Side Half Top amp Bottom Checker Board Frame Sequential Row 12807720 45 00 60 00 74 25 HDTV 720 Interleaving Column Interleaving 1280 720 37 500 74 25 HDTV 720P 19201080 3375 60 00 74 25 HDTV 1080 2D to 3D Side by Side Half Top amp Bottom 6 1920 1080 28 125 50 00 74 25 HDTV 10801 192071080 27 00 24 00 74 25 HDTV 1080P __ 2D to Side by Side Half amp Bottom 8 1920 1080 28 12 74 25 HDTV 1080P Checker Board Row Interleaving Column 9 1920 1080 3375 30 00 74 25 HDTV 1080 nterleaving 1920 1080 67 50 60 00 148 5 HDTV 1080 2D to 3D Side by Side Half amp Bottom Checker Board Single Frame Sequential 11 1920 1080 56 250 50 148 5 HDTV 1080P Row Interleaving Column Interleaving Copyright 2013 LG Electronics Inc All rights reserved 9 LGE Internal Use Only Only for training and service purposes 4 HDMI 1 4b 3D supported mode automatically H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 31 460
69. Option2 Tool Option3 Color lemp Tool Option4 Tool Options R Gain Tool Option6 G Gain Tool Option Country Group B Gain Area Option ADC Calibration 20 Point WB m Test Pattern Sub B C Veel Backlight P Gamma Reset Ext Input Adjust Entry method 1 Press the ADJ button on the remote controller for adjustment 2 Enter into White Balance of item 10 3 After recording the R G B GAIN Cut value of Color Temp Cool Medium Warm re enter the value after replacing the MAIN BOARD Standard Repair Process Detail Technical Manual Error A Video error No video Audio Established 2912 12 06 symptom i Revi Check the DC 24V 12V 3 5V 24 Pin ne Board Main Board p ome O fe L DIMO_VS L DIMO MOSI L DIMO_SCLK lt ALL MODELS Standard Repair Process Detail Technical Manual A Video error_Video error video lag stop 2012 12 06 Error symptom TUNER input signal strength checking method 9 658 LG UHF Ch 36 594000 kHz Te AA Signal Strength Signal Quality ONID 0x3211 TSID 0 4 Network ID 0x3211 Code Rate 2 Guard Interval Constellation FFT Mode System Bandwidth 800 MediaCor 801 SNY_SSU 802 Demo 800 Dolby D 5 1 D Service Type 0x1 DTV Service ID 0x8 Error Vers
70. PCBA s CAMERA Port 2 How it works 1 Connect the PCBA like below Picture 2 Send specific RS 232C command for displaying Camera Preview CAMERA need to be status of Slide up DFT Monitor Image Grabber 10 UTT 4 PCBA APP History Ver 25682 Ie Pant POBA 4 5000 L DB LGD_ALEF 512173 XXXXXX 3 RS 232C Command CMD DATA ID 00 23 Function Start ai 00 24 Function Copyright 2013 LG Electronics Inc All rights reserved a 14 LGE Internal Use Only Only for training and service purposes 3 6 Model 4 Serial number Download 3 6 1 Model name amp Serial number D L Press Power on key of service remote control Baud rate 115200 bps Connect RS 232C Signal to USB Cable to USB Write Serial number by use USB port Must check the serial number at Instart menu 3 6 2 Method amp notice 1 Serial number D L is using of scan equipment 2 Setting of scan equipment operated by Manufacturing Technology Group 3 Serial number D L must be conformed when it is produced in production line because serial number D L is mandatory by D book 4 0 Manual Download Model Name and Serial Number If the TV set is downloaded by OTA or service man sometimes model name or serial number is initialized Not always It is impossible to download by bar code scan so It need Manual down
71. Pl M1 DDR 0017 i 0 ca M1_DDR_DQ2 M1_DDR_DQO p F8 P9 M1_DDR_DQ18 55 ES DDR M1_DDR_DQ3 H3 M1_DDR_DQ19 1 DDR m M1_DDR_DQ4 27 M1_DDR_DQ2 5 ee H8 T9 M1_DDR_DQ20 ETT 24 DDR_ 1 3 M1 DDR DQ3 d z G2 M1_DDR_DQ2 A3 DDR DOA M M1 DDR H7 1 DQ22 lt v M1_DDR_DQ7 5 5 Se gt Bl M1 DDR 0023 1 B4 5 6 DDR gt o D7 B9 vsso_l M1 DDR D1 M1_DDR_DQ24 550_2 7 m _DDR_ DDR 55 8 M1_DDR_DQ8 D8 M1 DDR DQ25 3 8 4 Mi 7DDR D3S Ml DDR DQ10 52 0026 VSSQ 4 5 Bir M1_DDR_DQ11 a 3 DDR 0027 880 5 DDR DQ 10 DDR 0010 7 E8 9 zs M1_DDR_DO12 0028 55 6 DDR DQ ll DDR 11 A2 F9 6 _DDR_ d DDR DQ13 DDR 0029 5 7 DDR DQ 12 DDR DQ12 B8 Gl lt E DDR DQ14 DDR 0030 VSSQ 8 DDR DQ 13 DDR 0013 G9 E DDR 0014 M1_DDR_DQ15 M1_DDR_DQ31 veges M1_DDR_D 4 DDR_ ES DDR DQ15 DO 15 5 _DDR_ M1_DDR_DO 16 M1_DDR_DQ16 2 va M1_DDR_DQ17 1 _ 17 Pya DDR_ M1_DDR_DQ 18 M1_DDR_DO18 DO W3 5 DDR 20119 DDR DQ19 l L4 DDR DQ 20 DDR DQ20 1 E rol M1_DDR_DQ21 M1_DDR_DQ 21 M1_DDR_ moe us M1_DD
72. SYMBOL MARK OF THE SCHEMETIC GElectronics LG ELECTRONICS rj BLOCK power _ _ 1 7 11 L Copyright O 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes MODE Setting e Clock for H13A CLK_54M_VT amp Select XTAL I TETE 3 3V_NORMAL A sr MX MAIN Clock 24Mhz 10pF 2l dolle C404 et gt XIN_SUB 5 a e 0 01uF C426 2 2s M 50V o MODE 0 1 SW 2 1 os ang 00 gt Normal Opera
73. T 4 4 7M MHL_DET x N ogs MICOM_RESET_SW GND 5 SW3000 VL e 1P 1127WEM N Ready For Commercial u z 0 1uF 9 amp 3 5V_ST 167 mj 412 2 Pein CO Sam s E 4 Bo N OINI Dn E 5 dia ST BY DET o ST BY DET CAM H A 1 arem x H X x MICOMRESET_330HM 3 5V_ST NN OR NR EA 4 0 HI MI OW O ALN 3 ep 2 dl E sr SP rd gt 2 gt 04 04 a R3021 10K P60 SCLAO P140 PCLBUZO INTP6 P61 SDAAO 1 62 PO1 TO00 RXD1 P63 P130 e P31 TI03 TO03 INTP4 P75 KR5 INTP9 SCK01 SCLO1 P74 KR4 INTP8 SI01 SDA01 lt P73 KR3 SO01 72 2 5021 P71 KR1 SI21 SDA21 1 2 3 4 5 6 7 8 EYE_SDA P70 KR0 SCK21 SCL21 EYE_SCL gt e n P30 INTP3 RTC1HZ SCK11 SCL11 CAM_PWR_ON_CMD e CAM CMD N gt Am gt lt 3 5 5 m MICOM MODEL OPTION _ _0 NON LOGO LOGO For LOGO LIGHT M 4 r 4 ODEL OPT 1 TACT KEY TOUCH KEY Ready for
74. USE CTHS 3 gt C4310 zo gt our 22 uo 52 10v 2 amp FLT2 10V USB CTL2 9 gt USB_OCD2 C4337 C4301 10722 EN e IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4 ee MEME eee MODEL IDATE ESSENTIAL THAT Ont MAIOFATORES PARTS BE seo Fon Fe BLG ELECTRONICS BLOCK vss REN Copyright O 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes Full Scart 18 Pin Gender i 3 3V_NORMAL U 4801 CLOSE TO JUNCTION EU R4802 100 D SC DET V OUT 1 26 VA4801 JL C4804 2 IY e 0 1uF EU gt SC 5 IN 4807 SHIELD EU AV_DET 75 R4800 COM_GND
75. VAL 18 RF S W CTL MCLK D MCLK MCLK SWITCH 50 e e gt FE TS 19 RE RIAL DO DO TU_PIN2 _ _ 0 20 1 I2C_SCL6_TU gt FE_DEMOD1_TS_DATA 1 214 D2 I2C_SDA6_TU e e gt FE DEMOD1 TS DATA 2 22 D3 3 3V_TU gt FE_DEMOD1_TS_DATA 3 23 D4 TUNER_SIF_TU gt FE_DEMOD1_TS_DATA 4 24 D5 TU_ 1 8V_TU e gt 1 TS DATA 5 25 D6 e gt FE TS DATA 6 26 D7 e e gt FE TS DATA 7 27 GND 2 GND 2 GND 3 GND 3 86 1 23 _50 B3 1 23V B5 1 23V SHIELD e e 1 23 D Demod TU 30 A ESET DEMOD_RESET D_RESET x 82 4 B7 3 3V_SD F22_OUTPUT B6 3 3V WN e e 3 3 D Demod2 32 DEMOD_SCL NC_6 U al a e gt LNB TX 33 2 6 D_SCL DEMOD_SDA D_SCL 9 E e e I2C_SCL4_TU 34 5 D D_SDA D_SDA H e I2C_SDA4_TU 35 4 LNB TU 0 2 52 1 SERT a iS LNB_OUT 36 LD GND_4 ee LT D GND_5 L m B1 7 L GND seperation for CHINA tuner 6 Ik TS1_ERROR E a 4 a Zi B4 3 3V E_DEMOD2_TS_ERROR 0 5 5 NC 7 TS1 SYNC D D A gt FE_DEMOD2_TS_SYNC 41 gan s _ 2 TS1_VALID TU_M_CN T 50 RF SWITCH 50 gt FE_DEMOD2_TS_VAL 42 da ele 55 z 25 5 _ 6706 53 TU PIN2 SCL S TS1 MCLK E 52 men eG 2 B SDA_S TS1 DATA e Ed 53 I2C_SDA6_TU gt FE_DEMO
76. d 5 ea 2C_SCL4 lt SCL3 n e 2 ma AR6 Ho em als d MODEL_OPT_6 CP BOX Enable Disable 2C_SDA4 aga 52 3 T J ae D p o B Ax Ax 2C_SCL5 lt SCL4 e N HW_OPT_O lt MODEL 5 Not 5 t Aero E 16 a QURE uner upport ot Suppor 2C_SDA5 SDA4 AH34 OOO On HAH Oo ud O ea its AREA option 2 6 lt S LE Z Z dod L AAAA A H Se 5 Tuner Support Not Support AH33 SES 0 O W Ais OOHH A Aan a FRC option 2C_SDA6 SDA5 SS SS HN OAH HHA 0 0 0 OU Eod ow HW 2 2242424244 IE x gt n 2 lt _ _9 Area2 AJ_JA non AJ_JA lu O0 WVAN HO lh Pannel Resol IN AN H 0 O OH 2 XA ow data 5 x X HM n aan ng O O EH NN AN o A A m m EH m m tn 3 e MODE OCITO 9 9 2 gt 5 9 lt A
77. damage Crosstalk Un repairable Cases In this case please exchange the module Press damage Appendix Exchange the Module 2 P Vertical Block Vertical Line Vertical Block Source TAB IC Defect Source TAB IC Defect Source TAB IC Defect Horizontal Block Horizontal Block Horizontal line Gate TAB IC Defect Gate TAB IC Defect Gate TAB IC Defect Un repairable Cases In this case please exchange the module Horizontal Block Gate TAB IC Defect Standard Repair Process Detail Technical Manual LCD TV symptom Power error _No power Se ed ae _ Buttons Screen INPUT Speakers C gt gt Remote control sensor LG Logo Light Only LAGA 66 Power Indicator Only LAG2 Standard Repair Process Detail Technical Manual B Power error No power date 2012 12 06 Content Check power input voltage and ST BY 3 5V b TT For 10 models there is no voltage out for st by purpose When st by only 3 5V is normally on A18 Check the DC 24V 12V 3 5V 24 Pin 1 Power Board lt gt Main Board SMA Inverter On off on el mom 8 9 L DIMO_VS L DIMO_MOSI FS L DIMO_SCLK Standard Repair Process Detail Technical Manual Error Established symptom B Power error No power Checking method when power is ON Mate OO Check power on is high 2 Inverter
78. for tuner BT 000 un e NOMME AC coupling CAP x E mc ex 2 gt 12 6 5 14 de pee 2 0ocoooono z m gt D Damm ma Place near by LG1154D I2C_SDA5 vas a nnn U o o e e e e DDDD UART2_TX gt I2C SCL5 t AS er A m m M m f m 2 SDA6 SC REED DUO RA gt 12C_SCLE I2C for tuner gt 5 gt gt ccd d d my cep me Um U 9 UI L a THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSDcNGCAX HD SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET DEL 2022 21 14 PES LG ELECTRONICS LOCK Z 86 Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes
79. off by REMOTE CONTROL Power off by OFF TIMER Power off by SLEEP TIMER Power off by INSTOP KEY Power off by AUTO OFF Power off by ON TIMER Power off RS232C Power off by Reservated Record Power off by End of Recording Power off by S W Download POWEROFF UNKNOWN Power off by unknown status except listed case T POWEROFF ABNORMAL 1 Power off by abnormal status except CPU trouble POWEROFF CPUABNORMAL Power off by CPU Abnormal Standard Repair Process Established C Audio error 2012 12 00 symptom audio Normal video rm A25 Check audio B 24V A24 Check user No audio Screen normal Speaker off orma voltage of Power Board 4 Cancel OFF Replace Power Board and repair parts Replace MAIN Board 2 4 Disconnectio Y Replace Speaker disconnection Standard Repair Process Audio error t Wrecked audio discontinuation noise Revised date abnormal audio discontinuation noise is same after Check input signal compared to audio A25 Check and replace speaker and Check audio B Voltage 24 Check input a ana Y External Input Wu signal N Discontinuation Noise only When RF signal is not received Request repair to external Cable ANT provider In case of External Input signal error Connect and check Che
80. path to the chassis the reading must be infinite An other abnormality exists that must be corrected before the receiver is returned to the customer Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes rer Leakage Current Hot Check See below Figure Plug the AC cord directly into the AC outlet Do not use a line Isolation Transformer during this check Connect 1 5 K 10 watt resistor in parallel with a 0 15 uF capacitor between a known good earth ground Water Pipe Conduit etc and the exposed metallic parts Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms volt or more sensitivity Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part Any voltage measured must not exceed 0 75 volt RMS which is corresponds to 0 5 mA In case any measurement is out of the limits specified there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer Leakage Current Hot Check circuit AC Volt meter Good Earth Ground such as WATER PIPE To Instrument s CONDUIT etc exposed METALLIC PARTS 1 5 Kohm 10W When 25A is impressed between Earth and 2nd Ground for 1 second Resistance must be less than 0 1 O Base on Adjustment standard LGE Internal Use Only SERVICING PRECAUTIONS CAUTION Before servicing receivers covered by this service manu
81. sound to inform the operator If OK changeover to I P check automatically Remove CORD A V form AV JACK BOX Perform I P test If NG Buzzer will sound to inform the operator If OK Good lamp will lit up and the stopper will allow the pallet to move on to next process 4 15 2 Checkpoint TEST voltage GND 1 5 KV min at 100 mA SIGNAL 3 KV min at 100 mA TEST time 1 second TEST POINT GND TEST POWER CORD GND amp SIGNAL CABLE METAL GND Internal Pressure TEST POWER CORD GND amp LIVE amp NEUTRAL LEAKAGE CURRENT At 0 5 mArms 5 Audio Audio practical 90 10 0 120 w Measurement condition max Output L R Distortion 10 max Output Vrms Auto Volume Off Audio Off Speaker 8 Clear Voice Off Impedance es Measurement condition 1 RF input Mono 1 KHz sine wave signal 100 Modulation 2 CVBS Component 1 KHz sine wave signal 0 5 Vrms 3 RGB PC 1 KHz sine wave signal 0 7 Vrms LGE Internal Use Only 6 USB S W Download Service only 1 Put the USB Stick to the USB socket 2 Automatically detecting update file in USB Stick f your downloaded program version in USB Stick is Low it didn t work But your downloaded version is High USB data is automatically detecting Download Version High amp Power only mode Set is automatically Download 3 Show the message Copying files from memory TV Software Upgrade Expert Copy the file f
82. 0 60 under 85 and must be non condensing egulation and certification compliance available e Wiki wi CERTIFIED WPS Wi Fi PROTECTED SETUP Contents of LCD TV Standard Repair Process No Error symptom High category Error symptom Mid category A Video error Video error video lag stop fail tunning 3 4 Color error Vertical Horizontal bar residual image light Spot external device color error No power 8 Power error Off when on off while viewing power auto on off No audio Normal video C Audio error Wrecked audio discontinuation noise No response in remote controller key error recording error memory error deve resoontoneror Circuit noise mechanical noise a CE ET M 1 neork mor detect First of all Check whether there is SVC Bulletin in GCSC System for these model Function error 11 12 13 14 Contents of LCD TV Standard Repair Process Detail Technical Manual A Video error_ No video Normal audio EA Power Board voltage measuring method TUNER input signal strength checking method A Video error_ No video Video lag stop Ea LCD TV connection diagram Video error_Color error Check Link Cable LVDS reconnection A10 10 32 37 42 47 55 condition 11 A11 32 AUO Adjustment Test pattern ADJ Key D
83. 1 2 100 100 100 P G K K K K12 K e 5 3 1 16W 1 16W 1 16W P10 G14 H K K 7 od H K14 X K14 zZ 4 z z z H2 c2 E 3 B u i a i K5 H3 L2 H e e U Mi A C8100 nta 8 E E OPT aO LUF E7 H L Z 16v C6 H14 G5 L lt md 3 3V_EMMC 3 3V_EMMC J H10 L14 u f M 72 T 9 2 Tm H P5 212 N2 M3 sr d d d N5 M7 E E m El El 4 8105 C8106 J14 PA M8 a a a a m a a 102 2 2uF EMMC_RESET_BALL 0 16 10 E6 K P6 M9 d gt E 9 K E gt K2 M10 Q gt gt K9 by K12 M12 2 e e C C a K Al M13 E eu EMMC VDDI K14 A2 ums M14 A M c2 L A8 1 x5 8104 B2 A9 N3 C 6 e m H L3 A10 N6 _5 om e 10v 7 112 11 N7 G5 Z A12 52 6 ME C28 H10 DA L14 A13 9 8 C 10 Gus 0 pm K8 T M 14 N10 9 ed C8102 C8103 M2 B1 11 0 10 el 12 m A To 4 N2 M3 B7 ix N12 n 1 CT N 13 13 N5 M7 B8 N13 2 12 N 14 Ou PA M8 B9 14 3 e N CTS Gels e M9 B10 1 4 C_14 C 16 Gs C 16 10 B11 P2 5 15 17 Gc 17 gu M11 B12 P8 6 C 16 18 N
84. 1 0 internal pull up S d 9 a M D P D MIN JO o foo WO o IM IN oO fo LO IN IO WM MIN oO 1 tu I 00 CPU 1200Mhz MO M1 DDR 792 792 Mhz 5 had a Ri E ar RS ina mir Ta DER TET BIN D 01 CPU 1056Mhz MO M1 DDR 672 672 Mhz 4 m ja l Je ft ft ooo Ha Fao o m D no mie le ja ja ja ja gt 10 CPU 1056Mhz MO 1 DDR 792 792 Mhz Pas gt eue ala a ja ja a fa la a la fat Ie ft x 11 960Mhz MO M1 DDR 792 792 Mhz b Or 318 81818 ERIK 9 mma 2 I m m WLP LP pm m m m m m la o o o o o o o E jm jm A A A E A A jm ja R100 33 gt PLLSETI R101 33 gt PLLSETO a e esti ers 00 Normal Mode
85. 1 TS DATA 0 7 TP_DVB_DATAO 7 S2_RESET 4 aMt8 ADIN7 SRV TUNER SIF 5 CVBS N15 CVBS_IN1 H18 AAD_ADC SIF _ PCM 5V CTL _ CI 5V ON ce Power detect 45V ON 45V NORMAL CAM D32 CAM_CD1_N CI_CD1 DET1 E32 CAM CD2 aen DET2 F33 CAM CE1 N CARD EN1 F34 CAM CE2 N CARD EN2 H36 EB_BE_N1 PCM_IORD IORD EEG CI ADDR 0 14 DDR 0 14 SERE UD 0 7 aT TA 0 7 DATAIU 7 G34 CAM RESET _ _ RST CI RESET E33 CAM WAIT CI WAIT PCM INPACK D33 CAM INPACK REG INPACK F32 CAM PCM IHQA J36 EB_OE oe O EN H35 EB WE WR_EN A28 TPI CLK CEK TS OUT CLK CI TS VAL 28 VAL TS OUT VAL CI TS SYNC B29 TPI SOP TS OUT SYNC DATA 0 7 H IN 5_ 0 7 5 Video amp Audio IN Jack Side SOC Side 1 AV1 CVBS AV1 CVBS IN SOC CVBS IN3 COMP1 AV1 DVI IN AUAD L R CH2 IN AUAD L R CH2 IN SC CVBS IN SC CVBS IN SOC CVBS IN2 SC COMP1 PR IN SOC SC COMP1 Y IN SOC SC B COMP1 PB IN SOC SC CVBS IN SOY COMP1 Y IN SOC SOY UM SC FB SC FB SOC 3 SC ID SC ID SOC SC1_SID LG1 1 54AN 5 1 SC L R IN AUAD L R CH
86. 1315 52 31 469 31 5 314601 315 31 469 31 5 59 94 60 54 54 06 Side by side Full SDTV 480P Top and Bottom Secondary SDTV 576P Side by side half Secondary SDTV 576P 50 54 17 18 Frame packing Secondary SDTV 576P Line alternative SDTV 576P 31 25 17 18 Side by side Full SDTV 576P Top and Bottom Primary HDTV 720P pum Side by side half Primary HDTV 720P 1280 720 720 576 148 5 19 Frame packing Primary HDTV 720P Field alternative HDTV 720P 37 500 148 5 Side by side Full HDTV 720P NO lt gt lt gt lt gt A lt gt gt A 2 Frame packing Primary HDTV 720P 89 91 90 59 94 60 148 35 148 5 HDTV 720P 44 96 45 59 94 60 148 35 148 5 Side by side Full HDTV 720P Top and Bottom Secondary HDTV 10801 33 72 33 75 59 94 60 74 18 74 25 Side by side half Primary HDTV 10801 Frame packing Primary HDTV 10801 67 432 67 50 59 94 60 148 35 148 5 ns mus HDTV 10801 33 72 33 75 59 94 60 148 35 148 5 Side by side Full HDTV 10801 Top and Bottom Secondary HDTV 10801 gt diu mem Side by side half Primary HDTV 10801 28 125 50 00 148 5 Side by side Full HDTV 10801 Top and Bottom Primary HDTV 1080P E sem Side by side half Primary HDTV 1080P Frame packing Primary HDTV 1080P 43 94 54 23 97 24 148 35 148 5 Field alternative HDTV 1080P 4 1920 1080 Top and Bottom Primary HDTV 1080P ue mo dini ES Side by side hal
87. 15 1 amp 1l ES T15 Ae VDDC15_M1 T16 L206 2 1 G BLM18PG121SN1D M1 0 VREF_M1_1 GE 06 lt H13A_BRAZIL E IC101 1 018 8 228 6 LG1154AN H13A ISDB T LG1154AN IT G L ans 2 H10 v4 H11 G V16 BLM18PG121SN1D OPT OPT MEE a ta AE G 3 3 m 5 5 A a 4 m E e a m 8 l N p ENG ER e e L ERU ae igh es onc Ss VW Bypass Cap weve Bypass Cap 3 3V_NORMAL 2 57 Normal 2 5V_Normal A VDD33 TA VDD25_XTAL 1 VDD25_LVDS 4 A A A L203 L234 L238 a x z a ro 4 eN 5 NON_LA8600 TS 9 49 gt gt GASKET_8 0X6 0X8 5H f 5 E 4 M200 B E c E xL 4 0 5 P E jut co Ed THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NCA HOO2 HD SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION DATE FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N
88. 16W WIFI_DP ed 4016 C4015 GND TX M REMOTE OPE me 5pF 50V 50V e 9 WOL RESET WOL WIFI POWER ON lt 1 e RFModule RESET e e M_REMOTE_CTS 14003 3 5V_ST BLM18PG121SN1D ndis t ain _ 160055 4008 4009 4013 24014 R4013 5 vE 47 47pF 47 OLED 50V 50V IR V pov a C4010 T 100pF 509 CO LTD For EM OPT N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4_H040 HD DATE SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET LG ELECTRONICS Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 3 3V_NORMAL
89. 2 _HDMI2 ius 47K 47K ji 8 um DDC_SDA_3 DDC_SDA_4 AVDD12 9 4 c gt D1 HDMI2 ee DDC_SCL_4 7 VDD12 10 S I I 9 5 8 7 CNUC EE MHL_DET 122 D1 _HDMI2 ep em HDMI3 R3XCN 44 mm o FHD R3XCP 12 NORMAL gt D2 _HDMI2 CK _HDMI3 pem E R3XON 2 _ 2 LES 3 DO _HDM us R3XOP 0 HDMI3 5 3 R3X1N Device Address 183200 A 5V NORMAL 1 _ gt 5100195 312 R3X1P U019S 312HFN E R B lln 2 D1 _HDMI3 4 HDMI 2 i R3X2N PWRMUX_OUT gt mo D2 _HDMI3 3216 mn mm R3X2P SBVCC5 10 e 2 EIS 5 AVDD12 2 R5PWR5V VGA pE R3252 amp um 2 VDD33_1 DSCL5 VGA 33 0 B RAXCN DSDA5 VGA e 3 A03438 1 03202 C3211 1 VA3202 C3200 C3210 0 1uF RAXCP R4PWR5V F LOUR 0 1uF 16 3209 3215 5V_HDMI_3 ESD_HDMI Tow 167 Le 2 21 83222 SHIELD A 16V 16V E C3212 C3218 2 ey ju our DMI HP_DET R3203 22 IC3200 10V 10 e DDC SDA 3 1117 doc 1 oO a 5V E AZ BH 1 2TRE oO ud sun a R3205 22 lea GND L vA3214
90. 3 VTXPHY_VDD25_2 Lu s T am VDD25_DR3PLL Jo d LLA IL VSS25_REF AD26 AD22 ps 8 J gt 7 115 GPLL_AVDD25 AD23 SDRAM_VDDQ_2 G 1005 size bead Bottom side of chi 1 1V_VDD H10 AD24 pure 4 SDRAM_VDDQ_3 G E p gt SDRAM_VDDQ_4 G 7 1 0_2 L 1 H12 E S SDRAM VDDQ 5 G M L201 0 3 0 4 VDD11_VIXPHY Es 4 R M2 H GEE 4 VDD10_XTAL G Sind 9 E Eu 2 0_5 5 H EE O VDDC10_1 G 2 5V_Normal VDD25_LTX SV Normal VDD25_AUD 2 aja ale VDDC15_MO 2 we M4 A A DR a A 06 VTXPHY_VDD11_1 5 a GBC MODELS G x gt E 0 7 vppii 2 He P M5 _ H17 14 VDDC10 3 G L207 L200 Oee om 0 8 VTXPHY 3 VDDC1 XTAL PTT M9 BLM18PG121SN1D BLM18PG121SN1D 13 H18 VDDC10_4 G MAG TT e AY 9 o lt gt 9 A GE 4 e D N H19 P25 M11 5 E E 0 AVDD11 DR3PLL A e VERE Ue 5 E 5 2 H2 0 AA15 ET AVDD DCO GEEN poe g _ peld Mis 2 H21 ac26 1 1 _ 4 2 15 E 9 VDDC10_8 G a 22 0 Es K ER Mie e e H23 9 P 9 9 H24 0 VDDC10 10 G 0 ANNUI L 3 5 H GEEN pe _ __ 9 VDDC10 11 G 28 0 GEE VDD
91. 3 IN COMP2 PB IN SOC 2 Y IN SOC 2 Y IN SOC SOY COMP2 PR IN SOC JA PB2 Y2 SOY2 PR2 IN Component 1 CQ COMP1_Y Pb Pr Iu le Tuner CVBS TU CVBS ISOC CVBS_IN1 TUNER SIF TU TUNER SIF se DIF P N ADC 1 INP INN AAD ADC SIF ADC INP INN AUAD_L R_CH3_IN 6 AUDIO OUT COMP1 AV1 DVI L IN AUAD L 2 IN AUD SCART OUTL OUTR SC L R IN AUAD L IN H13 TUNER SIF AAD ADC SIF MICOM uU SCART gt Mute i CTRL lt CART_Lout Rou DTV MNT L R OUT AUDIO L R OUT DACSCK 4P wafer Lapins AUD_SCK LRCK LRCH LPF SCLO SDAO scL1 SDA LPF AMP_RESET_N LG1154 LPF AMP_MUTE SIDE HP MUTE q D HEADPHONE AUDA_OUTL PHYO OUT 0 IEC958OUT HP L ROUT MAIN Phone Jack 3 LINE OUT SPDIF OUT SPDIF OUT ARC 7 HDMI 1 4 5V_HDMI_1 4 ELS TMDS Link 8bits CEC REMOTE 1 S W RESET addis DDC 12 2bits 5V HDMI 1 INT SPDIF OUT ARC TMDS Link 8bi H13D CEC REMOTE 1 100 LG1154D HDMI Out put 8bits 2 DDC 12 2665 I2C SCL SDA 5 2bits TMDS Link 8bits CEC REMOTE 3 CEC_REMOTE D
92. 6W 632205 83241 2321954 3239 HDMI 3 25321335 3233 4232145 3234 5 1K sure 5 1K Tiur 5 1K 5 1K 5 5 5 5 emi M 9 THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC GElectronics MODEL cea DATE rj 5 ELECTRONICS BLOCK s SHEET Copyright O 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 3 3V_NORMAL A JK3401 JSTIB15 R3400 33 SPDIF OUT bd VA340 3400 C3402 5 5v 0 LUE 47 T 167 T ois Dil ADUC 55 0 ORSL COMPONENT 1 JACK_PARK JK3400 PEJ038 4G6 5 5 M4 ru ACK gt COMP1_DET EAG61030007 M3_DETECT M1 M6 EAG61030012 i JACK_KSD JK3400 1 KJA PH 1 0177 2 M5_GND 4 M3_DETECT 1_ 1 ui 6 3 5V_ST
93. 707 27768 CILE5 I gt CLK5 VCOM IN NVV gt 1 VGH_EVEN m TENTE gt CLK4 1 16W VGL I CLK3 T 1000 Rad gt CLK3 OPT VST CLK2_I 100 gt CLK2 27769 CRDI RS I E gt CLK1 FB NVV 100 H H H H H H 1 16W __ gt _1 N 40524 503 VCOMI VDD vpp 000001 A RE VGL 87748 1 16W ps TXA4P EP VGL REVERSE gt RoE 9 gt VGL I lt I TXA4N R7749 R7703 47 VGH_R BI SCAN ew TEGN EO_SOC gt EO VGH_R lt 4 REVERSE pue R7741 0 1 16W VGH_F GCLK DISCHG e FROM SOC VGH c az GCLK 5 1 16W TXACLKP C7717 gt MCLK A OPT 15pF VGH_ODD lt MCLK TXACLKN 50V TPS65198 bs EVEN GST 4 VGH_EVEN lt E GST R7735 A IC7701 z5 100 e VST lt EPI R7742 3K TXA1P R7719 0 RESET VSENSE gt RE GIP_RST lt e OPT 1 16 TXAIN R7704 47 1 16W FROM 50657 soc cst pIscHG C END R7736 UD R7743 0 u e Vcore 1 16W 1 16W 55y OPT 1 16W FROM SOC VDD PANEL VCC ST e 7718 VGL ED A R7738 R7747 13K P EPI LOCK3 50V OPT R 17160 1716W 1 16W 1 16W EPI LOCK6 SOURCE OPT R7752 R7754 87721 C7726 15K 15K 1 16W 17168 17168 18 25 16 27705 47 D MCLK_SOC gt MCLK VCOM_P GMA15 1 16W 67741 c7743 FROM SOC luF VCOM_N GMA14 16V 25V VCOM_LOOP C7719 R7731 100 1 15pF 1 16W GMA10 JON 9 2 VD
94. 8 33 25605 n HO p gt oO O Hi Al Al H x I2C_SDA1 E E 3 E 4 05639 33 R5606 a al a 24V_AMP 50V 2200pF 4 Et 0 1uF 2 C5629 50V 5 C5614 gt gt 7 Ala B 33 R5604 lt T x AMP RESET N gt 2 C5619 C3621 ete 5 623 90V LU u u 2 43 3V NORMAL 50V T 35V Se dite 1 LM mS cum md a 5606 15602 3 11 e e vy e e e SPK R Tii BLM18PG121SN1D C561 15603 WOOFER_MUTE 10 0uH d 05610 NRS6045T100MMGK DATE 16v WAFER ANGLE SPK L4 L es SPK R4 ee SPK R es THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE 5 LGElectronics MODEL DATE ELECTRONICS BLOCK SHEET Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes WOOFER R5700 GND 4 separate DGND AND AVSS This parts are Located
95. Broadband Main TCON all in one XXLA960V Zx To LED Driver Chassis LD34D To Woofer To Camera PCB P No EAX65040103 Main processor DDR Memory eMMC Memory Micom for Key IR Logo sensing 0 d A USB 3 0 3 Audio AMP LVDS Wafer To module Front Spk lt Key IR Logo 6 1 H13 Block Diagram External PC Audio L R PC AUDIO eG gt M Remote_Rx Tx DAC DATA AV1 CVBS Motion R C HSR ai __Avi_Audio L R H13 AAD_DATA CVBS LG1154AN TP DATA SPDIF IET f a q a AUD SC CVBS RGB Audio L R H13 SAARE H DTV MNT_LR V_OUT LG1154D Audio ER Line SPK T _ _ Woofer HDMI_CEC Keypad Logo Light IR USB_W iFi Gi USB 2 0 USB 3 0 USB1 USB3 0 Ed Y USB 2 0 USB2 USB2 0 USB3 USB2 0 P USB 2 0 4Gbx2 4Gbx2 4GBx1 1600 1600 2 101154 2 3 3V_NOR 2 SCL1 AR15 SCLO GPIO66 2 SDA1 AP15 SDAO GPIO65 3 3V NOR H13 LG1154D 1C3000 MUN 1 P60 SCLAO I2C SCL MICOM SOC R5F100GEAFB SCL1 GPIO64 RENESAS P61 SDAA0 2 SDA MICOM SOC AP16 SDA1 GPIO79 3 3 NOR AP17 SCL2 GPIO78 I2C SDA2 SOC AR17 SDA2 GPIO77 AP6 SCL3 SDA3 AH34 SCL5 AH33 SDA5 AH32 SCL4 AJ33 SDA4 3 3V_TU 120 SC
96. C 18 E M12 B13 P9 7 19 NC 19 gi Al M13 B14 11 8 DAT3 gt G I C 18 _20 cas NC_20 eu A2 M14 1 P12 9 DAT4 G22 C 19 21 Gc 2l ec A8 N1 P13 a 5 13 20 on gt 6 6 BALL _22 c 10 N6 All N7 c 8 12 N8 13 N9 10 A14 10 1 11 N11 12 o B7 N12 13 B8 N13 14 B9 N14 B10 gl 1 C 16 B11 Re BALL B12 8 r _18 C 5 EMMC_VDDI Don t Connect Power At VDDI A 5 mn mn q C1 9 12 O 5 _21 13 Just Interal LDO Capacitor DATS 0 2953 E Tm gt gt 2 DUMMY 9 DUMMY_10 DU3 DU11 0 4 DUMMY_11 DUA DU12 5 lt x lt DUMMY_12 Z DUMMY_13 Z 0 5 HH DU6 DU14 DUMMY_14 Z DUT 0015 2 U SE DUMMY 15 AE DU16 0 53 DUMMY_16 gt 0 lt T a Ly u N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC SECRET DEL LOKT LGE Internal Use Only LG ELECTRONICS LGElectronics Copyright 2013 LG Electronics Inc All rights reserved Only for traini
97. C4325 22K 4 7uF EPHY REFCLK R4318 2 2K R4316 woL_cTL 3 3K B 04300 MMBT3904 NXP THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4_HO052 HD SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET MODEL DATE ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LG Electronics LG ELECTRONICS BLOCK emmener SHEET Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes R5602 0 Separate DGND AND AVSS This parts are Located 24V 24V_AMP A on AVSS area 15600 UBW2012 121F 29 Al ve ERU Close to Speaker N 5 NRS6045T100MMGK 0 1uF
98. CTRLO USB CTL1 USB DM2 USB2 USB2 1 DMO 9V USE 2 0582 1 USB_DP2 6 92 USB CTL2 USB2 2 0582 2 DPO USB DP3 USB OCD3 8 1090 USB CTL3 USB2 ME WIFI DM USB WIFI USB2 0 DP WIFI DP ms UART1 M REMOTE RX UART1 TXD M REMOTE TX _ GPIO13 M RFModule RESET Motion Remote UART1_RTS 4 REMOTE RTS Receiver UART1 CTS 5 am no LG1154D_H13D ae RENESAS MICOM Interconnection 1 47LA790V ZA Power Board Local key Assy RF Assy WIFI Assy Cables Main LPB 24Pin Local Dimming Cable Main Module EPI Cable 50 amp 50Pin e WiFi 6Pin RF 8Pin Cable e SPK Cable Interconnection 2 47LA790V ZA PCBs Cables e IR to Local Key 3Pin Cable 6 IR to Logo Assy 4Pin Cable Interconnection 1 55LA860V ZA PCBs Main PCB Power Board Local key Assy RF Assy WIFI Assy Camera Assy Cables Main LPB 24Pin Local Dimming Cable Main Module EPI Cable 50 amp 50Pin LED driver PSU 50000060 1 om 12 WiFi 6Pin RF 8Pin Cable SPK Cable Camera Cable Interconnection 2 55LA860V ZA gt T o lt Cables e IR to Local Key 3Pin Cable Interconnection 1 60LA860V ZA T lt 4 6 Cables Local key Assy RF Assy WIFI As
99. D GMAT E D7702 5 0 R7706 47 e RASE 14 GMA4 GCLK SOC GCLK 17165 1 16W ol FROM SOC Ress hed C7744 C7749 TON GMA1 C7720 1 16W 1 16W luF luF 15pF OPT 50V 50V 50V 1 FL8S050HA1 A VGH P7703 A EPI N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes WHEN SERVICING IF 15 SECRET LGElectronics LG ELECTRONICS LOCK HEET LGE Internal Use Only VDD VDD_EPI A C7924 C7928 OuF S 10ur 25V 25V THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4_HO79 HD DATE SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LG ELELTRONIES 3L LILK GHEE T O A Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes
100. D2_TS_DATA 44 m 9 3 3 5 TUNER TS2_ERROR 54 3 3V_TU gt FE_DEMOD3_TS_ERROR 45 NC_8 TS2_SYNC 55 TUNER_SIF_TU gt FE_DEMOD3_TS_SYNC 46 NC_9 52 VALID 56 1 gt FE_DEMOD3_TS_VAL 47 PUN UE xu LNA CTR1 TS2 MCLK 57 FE LNA Ctrl DEMOD3 TS CLK 48 R6705 Teos P 0 1uF LNA CTR2 TS2 DATA caw mE TS DATA 49 i TU W JP 58 FE_LNA_Ctrl2 T 16701 R6706 Bl Al BLM18PG121SN1D TU_PIN2 Trev 3 3V_D_Demod2 lt TO 3 TU OW TU QW TU_RESET2 mb br gt C6700 mi 0 1uF 10uF 0 1uF 10v Ja 1 2 TU MNQW 16700 BLM18PG121SN1D z 3 3V_D_Demod lt TR 3 3V_TU D GB gt GB GB lt GB ED ramon C6703 0 1uF 10uF 10v THE A SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD NC4 H067 EHD I SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION COE SECRET Ls ELECTRONICS DATE THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC GElectronics GHEE MP SEE Copyright O 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes I 52 LNB Part Allegro Option LNB peo mn mr nn gn mn em dm ee Input trace widths should be sized to conduct at least Ouput trace widths
101. DC 12 2bits HDMI 3 TMDS Link 8bits CEC REMOTE DDC 12 2bits HDMI 4 MHL DET 5V HDMI 4 8 Panel Interface Block Diagram H13 IC100 LG1154D TXOP N EPI TX1P N EPI CH2 TX2P N EPI CH3 VCOMLFB RFB VCOM DYN PMIC RESET _ 5042 mc scL2 PANEL Vog VCOM P N VCOM LOOP VGL GIP_RST MCLK vow EO VGH_F R CLK 1 2 3 4 5 6 _4 5 7 12 14 15 TX3P N EPI EPI CH5 TX5P N EPI CH6 TX LOCKN EPI LOCK6 SOURCE 32 31 20 19 14 LEFT LVDS 51PIN Side VCC18 V core H VDD VDD 50 39 15 8L OL GL VL CL OL G ZIGIVIEIL WIND M201 143 9 PMIC amp Level Shift Bloc Diagram PANEL VCC Boost Converter Vdd Buck 1 converter VCC 9 Buck 2 converter Vcore Vcore Buck 3 converter HVdd AE Buck 4 converter VCC18 lt VCC18 E TR VGL Positive Charge Pump Controller CTRLN SWP VGH Negative Charge Pump Controller 2 TR CTRLP Diode 6 Ch Gamma Buffer DAC output GAM4 5 7 12 14 15 VCOM P VCOM N Vcom reference amp gain VCOM LOOP Reset RESET 10 USB WIFI UART USB3_DM USB1 3 0 USB3_DMO 45V USB 1 USB3_DP0 USB3_DP USB3 RXOM USB3 RXOM USB3_RXOP USB3_RXOP 0583 USB3 TXOM USB3_TXOP HUB PORT OVERO USB OCD1 VBUS
102. DD GE FL8SO50HA1 P7702 EPI VCOML FB gt IN GIP_RST VST VGL_I VGH_EVEN VGH_ODD VGH_F VGH_R CLK6 CLK5 CLK4 CLK3 CLK2 CLK1 Z OUT VCC Te R7759 R7760 lt POWER BLOCK gt 1 16W 1 16W gt VCOM P OPT D VCOM 1 16W 97700 MMBT 3904 NXP gt VCOM_LOOP R7728 100K VCC18
103. DQ16 m MO_DDR_DQ ADS MO_DDR_DQ7 m4 x MO_DDR_DQ1 gt MO em DDR Cus DDR DQ8 DDR 002 MO_DDR_DQ17 2 MO_DDR_DQ P Roe F8 MO_DDR_DQ18 D21 MO_DDR_DQ3 DE P9 DDR 57 gt MO_DDR_DQ9 H3 DDR 0019 1 de DDR pud C22 a DDR 005 DDR_ MO_DDR_DQ 11 MO_DDR_DQ11 2 o DDR WO BS Bert H8 T9 DDR DQ 12 DDR 0012 au HY m DDR PE 25 ee DDR DQ13 om n M0 DDR DQ7 DDR MO_DDR_DQ 13 _DDR_ o di 17 MO_DDR_DQ23 MO_DDR_DQT14 J MO_DDR_DQ14 52 NES Bl MO_DDR_DQ 15 DDR 0015 MO_DDR_DQ8 as rie D7 Le C13 M0 DDR DQ9 _DDR_ 2 For MO_DDR_DQ 16 MO_DDR_DQ16 c8 0025 3 3 vote ce MO_DDR_DQ 17 s DDR 2 DDR 0026 VOA 0 2 MO_DDR_DQ18 DOTT c2 MO_DDR_DQ 18 7 MO_DDR_DQ27 VSSQ 5 MO_DDR_DQ19 MO_DDR_DQ12 se AT MO_DDR_DQ 19 2 DDR 0028 925026 DES 0 20 MO_DDR_DQ13 DDR us 50 6 5 MO_DDR_DQ 20 6 B8 DDR 0029 7 DDR 0021 MO_DDR_DQ14 Bi um B8 e DDR DQ 21 DDR 14 DDR 0015 DDR DQ30 550_8 MO_DDR_DQ22 MO DDR A3 G9 DDR DQ 22 Fos DDR Mis BUR DOS Mi MO_DDR_DO 23 MO_DDR_DQ23 MO_DDR_DQ 24 MO_DDR_DQ24 E 001241 012 g M0_DDR_DQ 25 Fos MO_DDR_DQ25
104. E Internal Use Only
105. ED n a B H x AL R134 33 XIN_MAIN bob MAI n3 o ggg 0 HHH GPIO31 CAM SLIDE DET gt OPMO R15 560 B26 im a d d od od dd 2 AM33 XO_MAIN M Kk ow Co p ooo poem om ems B a c e c a A 0 gm I MN AM32 mm A m A A A GPIO29 Heo dH A on AF30 B27 1028 1x34 mm XTAL_BYPASS GPIO27 RST PHY 3 3 NORMAL AT37 AK34 A H13DA_XTAL GPIO26 gt RF SWITCH 3 3V_NORMAL 3 3V_NORMAL AL33 For ISP A A GPIO25 GPIO24 E 519100 aSa o AR9 JTP 1127WEM TNS TANTU DOO MODE BOOT MODE GPIO23 UART2_TX CD UART2 TX 1 nstant boot Q EMMC SOC RESET 2 9929 9 normal Natal MODE X PORES_N GPIO22 UART2_RX SM n 54 54 GPIO21 gt RESET 44 6 AD34 AM7 internal pull down 20 AD33 AL6 gt INSTANT BOOT 9 __ gt BooT_MODE OPMO OPMO cP1019 INSTANT BOOT 8 M DEBUG GP 8 omn AT26 AK6 H13A 1 _ GPIO17 Pars SC_DET local dimming m H13A_SDA H13DA_SDA
106. EU CHINA HOTEL 6000 MAN AZAS8OMTR El 9 EU T c6004 DTV MNT_L_OUT 0 1uF EU c EU SCART AUDIO MUTE C6000 ay 50V C6008 luF 33K R6004 SIGN600002 2 2 25V OUT ES 33p C6003 su luF DTV MNT OUT WU R6008 33K C6005 EU SCART_AMP_L_FB MMBT3904 NXP EU_SCART_MUTE_ISAHAYA gt SCART FB E EU 06002 RT1P141C T112 s SCART_MUTE DD SCART_Lout m CT scart_Rout DTV MNT OUT lt PDTA114ET Q6002 1 C EU R6014 Q6001 B 1K MMBT3904 NXP E EU EU_SCART_MUTE_NXP THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC GElectronics LG ELECTRONICS MODEL BLOCKS SHEET a Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes EARPHONE AMP HP OUT H13 6104 HP OUT C6104 C6100 180pFe OUT luF R6100 R6106 T 105 our 10K 43K HP OUT HP ROUT MAINL HP OUT H13 R6103 43K 1 IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEAT
107. FB A 1 16W 5 7703 VGL FB 1N4148W 17700 CTRIN gt vy 100V VGL 27705 7708 LOM2HPN2R2MGOL 7745 C7747 R7745 0 A our Ciour d ou 352542 sun 10 10 SP st en she St luF25V luF25V 00000550 v a D7705 R7739 1 16W 1N4148W oes 1 5K C7733 R7710 0 Toiy a 0 1UF 1 16 e luF 10uF VCOM_DYN 50V 25V 16v Vcore 1 16W 1 16W A FROM SOC R7725 0 PMIC RESET lt x gt CTRLN 7 LATUS TO SOC OPT Wee gt FB BLM18PG121SN1D er 2 L770 a ata gt SWN LO gt gt OPT C7706 C7709 LOQM2HPN2R2MGOL RES f E 10uF 10uF 2 2uH 10K SA em SWP INSTEAD OF AMCCO209 10 1 16W outa CTRLN gt vcH_FB ER SWB4 VGL E HERMAL ms gt CTRLP D7704 F C7746 C7748 1N4148W 1 Ic7700 SWP dus gt 90 A 2 5 ze VGH luF25V 1uF25V 100v e A SWB2 6 TPS65178RSLR VDD 1 16W tun 2500217 Bed ao TCOMP A VL CRD T 27706 _ ne LUE uF SWBl 18 VL 1N4148W 50V 50V 7707 C7728 SWB1_2 SDA 1007 e LOCK6 R7700 77044 2 7710 7711 cour C7712 2 PANEL VCC e I2C SDA2 m 1 0 1u 10uF 10uF D7700 A 772144 0 1uF NC SCL cc nis C7742 ee 10V 10V luF Q7701 C7754 1 16W 10 1 TER gt 25 0 1uF ae VLU
108. GPIO16 335 1 CVBS DET I2C port GPIO15 AP9 AJ6 TRST_NO TRST_NO GPIO14 COMP1_DET AN9 7 2 apii 50 GP1013 gt M RFModule RESET INSTANT MODEO BOOT_MODEO gt GPIO12 lt HP DET LU crc lu Ed AGT gt TDIO GPIO11 gt FRC RESET emi CT r 2590 22 TU_RESETI amo TRST_N1 GP er S2_RESET Jta I y Main ur fer GB 7 VCOM_DYN aus PEUT RESET 1011 AS RST_HUB 1 gt FE LNA Ctrl2 AL9 AK33 PLLSETI PLLSET1 GP gt TU_RESET2 AL10 AE30 PLLSETO PLLSETO GP gt HDMI_S W_RESET AE34 AD30 _ _ SE AN32 33 GP E gt FE Ctrl1 Y AK eve 33 EXT 1NTR3 6P1070 GP HDMI_INT ate EPHY_INT 135 EXT INTR2 GP1069 edo 3 3 NORMAL TP1 r iem 33 Wis EXT INTR1 GPIO68 _ KE 314659 LOEO sr gt i 33 EXT INTRO GPIO67 DDCDO_DA 2 0 23K oe lt TMSO dio HPDO 1105 lt SOC_RX ae UARTO_RXD Aus soc Tx UARTO_TXD OUT 0 gt SPDIF OUT 1 lt SOC_RESET AU13 AC36 M_REMOTE_RX UART1_RXD PHYO_RXON_O HDMI RX0 22 M_REMOTE_TX lt 1 AC37 3 NORMAL 33pF RT1 TXD HYO_RXOP_O HDMI_RXO A 50V
109. I HF mini LVDS EPI Lock Topology varen OK Yon an Name oee lt Indicates a rising edge of bit clock Always RGB data are transmitted LSB is transmitted at first 7 y V 7 7 7 1 5 joe Kos Kros X soo Xo X 1 RL 1G3 165 167 360 7 7 7 RLV2 182 183 185 186 Protocol Ace oom oom vs n A 7 2 11 254 205 X om X 7 200 2 263 no A Point to Point Data rate 660Mbps Data rate 1 8Gbps External clock Embedded clock Control Features 10bit FHD120 Fewer Lines 12 Merit Simple structure Embedded clock Standardization low EMI Clock skew free Easy to PCB design e Too many lines 36 Clock skew Transmission Overhead Demerit EMI due to clock lines Abit delimiter Bandwidth limit Near field communication Near field communication NFC is a set of standards for smartphones and similar devices to establish radio communication with each other by touching them together or bringing them into close proximity usually no more than a few centimetres Present and anticipated applications include contactless transact
110. ION This is a flammable mixture Unless specified otherwise in this service manual lubrication of contacts in not required 5 Do not defeat any plug socket B voltage interlocks with which receivers covered by this service manual might be equipped 6 Do not apply AC power to this instrument and or any of its electrical assemblies unless all solid state device heat sinks are correctly installed 7 Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead Always remove the test receiver ground lead last 8 Use with this receiver only the test fixtures specified in this service manual CAUTION Do not connect the test fixture ground strap to any heat sink in this receiver Electrostatically Sensitive ES Devices Some semiconductor solid state devices can be damaged eas ily by static electricity Such components commonly are called Electrostatically Sensitive ES Devices Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components The following techniques should be used to help reduce the incidence of component dam age caused by static by static electricity 1 Immediately before handling any semiconductor component or semiconductor equipped assembly drain off any electrostatic charge on your body by touching a known earth ground Alter natively obtain and wear a commercially available d
111. L DIM_OUT_I2C 87411 33 L DIM_OUT_I2C 87412 33 sr P E THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC GElectronics Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes R7403 4 7K gt L DIMO_VS LG ELECTRONICS BSD NC4_HO74 HD MODEL BLOCK LGE Internal Use Only EPI_LOCK6_SOURCE THE 3 3V_NORMAL A e R7758 VCC18 R7756 10K 9 _ gt _ G R7757 e MMBT3904 NXP R7761 10K 07703 10K E OPT G 27755 07702 100 MMBT3904 NXP E THIS IS REVERSE PATTERN Left Source C7701 LOCA C7700 O luF QS 50V 50V VCC18 ON GMA1 GMA3 GMA4 5 GMA7 GMA9 GMA10 GMA12 GMA14 GMA15 GMA16 GMA18 Vcore EPI_LOCK3 TXB2P TXB2N TXBON CH6 FROM SOC CH5 FROM SOC CH4 FROM SOC H_VDD A V
112. L4 D SCL 2 50 4 D_SDA 35 3 3V_TU TU6503 TDSQ G651D TUNER_T2 C S2 2 SCL6 SCL T 3 2 SDA6 SDA T 4 3 3 NOR 2 SCL5 CSCL 2 SDAS CSDA Speed _ 3 Power Block Diagram MICOM _IRAss y Logo Light Ass y o Light 55 Wi FiAss y _ Ethernet PHY 1 5V DDR DDR VDD NET VEE H13 A VDDC10 PANEL VEG ___ H13 A AVDD10 SCARTAMP 8A HDMISW SPDF EMMC VCCQ TUNER 3 3V_ TU HDMI SW CI Slot H13 D VDD25 H13 D AVDD25 3 3V Normal 4 2 5V Normal 1 23V_TU 2A Normal 5A AUDIO AMP 3 3V_S2_DEMOD 32 3 3V_TUNER 5 1 8V_TUNER 7 1 23V_S2 DEMOD 30 S2 F22 OUTPUT 33 LNB 36 152 SCL 34 S2_SDA 35 RESET 2 SLC 3 SDA 4 ERROR 16 SYNC 17 VALID 18 MCLK 19 00 7 20 27 S2_RESET 31 CVBS 8 SIF 6 4 Tuner Cl Block Diagram 3 3V D Demod 3 3V TU 8 TU 1 23V D Demod 3 3V NORMAL 10 TONECTRL 2 LNB 7 SCL 8 SDA LG1154 AP6 SCL3 LNB IC6900 A8303SESTR TB 122 5 4 2 SDA4 AR6 SDA3 RESET1 AG6 GPIO10 IC2_SDA6 AH33 5045 IC2 SCL6 FE DEMOD1 TS ERROR AL37 TP DVB ERR DEMOD1 TS SYN AL36 TP DVB SOP AL35 TP DVB VAL FE DEMOD1 TS VAL AM36 TP DVB CLK FE DEMOD1 TS CLK FE DEMOD
113. LED should be OFF Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 20 4 8 Inspection of light scattering Test Method Power Only Power Only Key Light Scattering 1 Push Power only key 2 Push HDMI hot key 3 Inspect whether light scattering is occurred in internal black pattern or not 4 Push Power only key 4 9 Option selection per country 4 9 1 Overview Option selection is only done for models in Non EU 4 9 2 Method 1 Press ADJ key on the Adjustment Remote Control then select Country Group Meun 2 Depending on destination select Country Group Code 04 or Country Group EU then on the lower Country option select US CA MX Selection is done using or 4 key 4 10 MHL Test 1 Turn on TV 2 Select HDMI4 mode using input Menu 3 Set MHL Zig M1S0D3617 using MHL input output and power cord 4 Connect HDMI cable between MHL Zig and HDMI4 port 5 Check LED light of Zig and Module of Set Result If the LED light is green and the Module shows normal stream OK Else NG LGE Internal Use Only 4 11 HDMI ARC Function Inspection 1 Test equipment Optic Receiver Speaker MSHG 600 SW 1220 1 HDMI Cable for 1 4 version 2 Test method 1 Insert the HDMI Cable to the HDMI ARC port from the master equipment HDMI1 2 Check the sound from the TV Set 3
114. Lo 12 3 3V_TU CJ Ground Width gt 24mils C6540 1 8 n G LUE R6506 1 TU CN BR e PG q GND TU O N M W 16502 5 R6528 13 Power D TU lt W BR TW BLM18PG1218N1D 1 23 D Demod 2 c o 3 11K TU N M sT NN TU Q N M W 1 R1 6502 TU BR 100 Q W KR BR TW CO JP AU R6523 EN ADJ R6529 14 CN RESET TU CJ AAN lt R6502 1 16507 A 1 8V_TU 10K 10K 20 82 MW _ 3 6 1 L 5 BLM18PG121SN1D deet mE VOUT Q N M W 16 0 1uF C6533 TU N M Q W KR CN BR JP AU 16V our FOV NORMAL ZA s 16 1 TS ERROR FE TS ERROR 227 VETRI EE EAN61387601 ore d TS SYNC DEMOD1 TS SYNC TU O N M W 18 FE TS VAL gt FE TS VAL 065338 iur D lt ED GB GB GB GB GB GB GB GB CE GB ED e 19 FE_DEMOD1_TS_CLK FE_DEMOD1_TS_CL is s Global Option Name 1 20700 ne Vout 0 6 1 R1 R2 2 Tuner Name TDS S TDS Q gt FE_DEMOD1_TS_DATA 0 7 r r 21 _ 1_ _ 1 gt 3 Country Name 52 WS BR As PR Re ATR EO ar FE TS DATA I Example of Option EHCDEMOBI TS DETZIS CHB Max mA T2 apply TDSO type tuner and T2 country FE DEMODI TS DATA 3 else Max mA TU M W apply TDSM amp
115. NEC5 28 Connector SC70 Bluetooth Remote control Bluetooth Receiver 4 Function list F Manufacturer Function Voice Motion Gyro Sensor Sensing angular velocity of X Y Z axis angular velocity of X Y Z axis Invensense Accelerometer Sensing device tilt Pitch amp Roll angle Remocon m Wireless communication X tal roman aco aon over Su me US 5 RF Pairing Un pairing Method When do pairing the remote should make pairing request IR signal 0x75 to TV Method When TV receive the IR signal it should send pairing request packet to the RF receiver After pairing success the remote should blink LED for some time and TV send pairing success packet f unpaired just press OK button f paired press OK button after unpairing Method 2 Repairing RF Pairing Press BACK button for 5 sec back to TV When remote try to unpairing it doesn t care about state of receiver stand alone When remote try to unpairing it doesn t care about state of receiver stand alone After unpairing all pairing information should be erased After unpairing LED should be blinked for 3sec The remote just becomes to IR mode Press BACK button and SMART button RF Unpairing at the same time for 5 sec Introductions of 13Y WIFI built in ass y 1 Wi Fi built in Ass y feature 2 Wi Fi built in Ass y specifi
116. O 9 gt SPK_L 50V R5611 C5609 4700pF Q 24V_AMP 18 gt N gt mom C5608 R5609 C5626 ib M 350 5632 65636 0 047uF C5618 C5620 05622 al 0 1uF 50V 3 3 NORMAL m m 50V 35V 35V 4 al ag P 1 C5630 EN IE fy ul A al a al a 0 47uF d d a H H 50V SPEAKER L Al gt odo o gt gt 2 5627 DOS 15601 3 gt m al x al z z m al 5633 2 B aa luF BLM18PG121SN1D Bl se as ee 50 a 4 PGND AB 2 R5612 3 3V NORMAL C5603 C5604 RSA 15K SEL FAULT PGND AB 1 t8 A MCLK OUT_B 10V 16V gt SPK_L 18K OSC_RES NC_6 1 71 5 UE UD R5601 R5607 1 uF TOK DER TE Bem T Loe Oun AUD_MASTER_CLK NRS6045T100MMGK R5603 PDN LO BST C e e p u NRS6045T100MMGK 359 LRCLK NC 4 5602 L 50V C5604 SCLK H NC 3 L5604 R5600 Becks 1000pF 4 7 lt 5607 H TU 10 0uH MUTE 50V SDIN OUT C m 10K MMBT3904 NXP E eo ov Vesp z C56250 eg e e e gt _ SDA PGND_CD_2 lt 5634 wn 5638 AUD_LRCK noS 705 To ilur 2200pF GAs 0 47uF 50V 0 AUD_SCK E 50V 50V 1 Al Af vo mH m A AUD_LRCH 3 Oo al ul zl m o C562
117. On off PWM Dim 2 GND 24V GND L DIMO_VS L DIMO_SCLK Standard Repair Process Detail Technical Manual a 2012 12 06 B Power error when on off whiling viewing Content POWER OFF MODE checking method iba LCD TV lt ALL MODELS gt Adjust Check 2 ADC Data System 1 System 2 System 3 Model Number D L Test Option Spread Spectrum Sync Level Stable Count SDP Server Selection RF Remocon Test Access Code Entry method rower I af 0 POWER_OFF_BY_AUTO_OFF 1 POWER_OFF_BY_REMOTE_KEY 2 POWER_OFF_BY_REMOTE KEY 3 POWER_OFF_BY_REMOTE_KEY 4 POWER_OFF_BY_REMOTE_KEY 5 POWER_OFF_BY_INSTOP_KEY MIS LD 4 15 gt _BY_UNKNOWN 17 POWER _OFF_BY_UNKNOWN 18 POWER_OFF_BY_UNKNOWN 19 POWER_OFF_BY_UNKNOWN 20 POWER OFF BY UNKNOWN 21 OFF BY UNKNOWN 22 POWER_OFF_BY_UNKNOWN 1 DAWER NEE gv LINKNOWN 1 Press the IN START button of the remote controller for adjustment 2 Check the entry into adjustment item 3 A22 Standard Repair Process Detail Technical Manual Error Established symptom C Audio error_No audio Normal video Content Checking method in menu when there is no audio o lt ALL MODELS Sound Out TV Spe ker External Speaker Optical HDMI ARC Vil lt Bey Sound Sync Optical
118. P3400 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics R3404 150 HP LOUT JAGK RARE JACK_KSD 5 1 10W ae JK3403 1 EM 3 3V_NORMAL PEJ038 3B6 KJA PH 0 0177 A 5 R3406 HP_OUT 10K Se gt 4 t 23409 P OUT 100 DETECT 3 HP_DET lt 1 16W 5 R3405 150 _ gt EAG61030009 EAG61030001 1 10W 5 I VA3405 T 5 6V 3 3V NORMAL A R3403 330K R3408 100 LD avi cvBs DET 1 16W 340 53 Lva3402 IU T5 6v 0 1uF JACK_PARK JK3402 for audio Hum no gt EAG61030011 1 VA3403 5 6V KSD JK3402 1 KJA PH 1 0177 1 VA3404 5 6v EAG61030006 COMP1 AV1 DVI_L_IN COMP1 AV1 DVI_R_IN AV1_CVBS_IN LG ELECTRONICS BSD NC4_HO34 HD MODEL zacr BLOCK __________ ___ LGE Internal Use Only Place Near Micom LOGO_LIGHT R4003 33 oS LOGO LIGHT WAFER e 5 LOGO LIGHT B LOGO LIGHT 1K
119. Process Error A Video error es symptom Color error Revised date gt 10 A11 Check and replace Link Cable LVDS and Replace Main B D Replace module contact condition Check color by input External Input COMPONENT RGB HDMI DVI Check error color input mode A12 Check Check Test pattern arnal devi Cable External Input Component external device and cable Check external RGB HDMI DVI error Y Replace Main B D Cable normal device and cable Standard Repair Process Error date symptom Vertical Horizontal bar residual image Revised date light spot external device color error Vertical Horizontal bar residual image light spot 8 gt 10 11 Check color condition by input Check external External Input device Y mene tine Replace Main B D Component connection adjust VCOM RGB condition HDMI DVI Request repair for external device For other panel Check screen condition by input External Input Component RGB HDMI DVI Connect other external device and cable Check normal operation of External Input Component RGB and HDMI DVI by Y connecting Jig pattern Generator Set top Box etc Request repair for external device Replace Main B D Connect other external device and cable Check normal operation of
120. R_DO22 M1_DDR_DQ 22 _DDR_ 2 M1_DDR_DQ23 M1_DDR_DQ 23 M1_DDR_DQ23 Ds M1_DDR_DQ24 M1_DDR_DQ 24 M1_DDR_ ee xe M1_DDR_DO25 M1_DDR_DQ 25 _DDR_ us M1_DDR_DQ26 1 _ 26 gt DDR DDR DQ 27 DDR DQ27 DDR 0028 DDR DQ 28 _DDR_ 7 DDR 0029 M1_DDR_DQ 29 _DDR_ 2 DDR DQ30 DDR DQ 30 _DDR_ DO P4 2 M1_DDR_DQ 31 M1_DDR_DQ31 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC BSD NC4_HOO5 HD MODEL __________ _ 2012 09 14 SECRET LG ELECTRONICS LOCK Z _ LGElectronics Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes TH Ed
121. S 1C2307 RL_ON 10K e 2 7K 0 10K PANEL_VCC 1 5 NCP803SN293 OPT ON 3 3V_NORMAL C2331 A POWER DET 2300 0 1uF SMAW200 H18S1 ROAD 50 02302 gt POWER_WAFER_18PI A03407A vi 5 PD_ 12V 2309 R2326 R 12304 52 V 1 2K 43 5V ST PWR ON 100 INV CTL x C2333 fl E _ A UBW2012 121F 1 run 10uF 2 ce x 2 1 N FT PWM_DIM T 16V mae a 2347 T mms 2307 puo lt DIM2 E E 20 105 0 Lur GND UBW2012 121F A mig T MO 24V AY PD_20_24V 12V B BL oUm 24V R2336 UBW2012 121F C2316 a E 100K A 127 74 e A AX e e luF not to RESET at 8kV ESD 12 50 V V PD 20 24V C2306 12303 BANET CTK B 02301 0 1 GND gt MMBT3904 NXP PD_20V PD_24V sov L R2314 R2327 1 R2327 NCP803SN293 EOK E 5 6K 8 2K gt L DIMO_VS is 1 _ C J L DIMO SCLK e PD_20V PD_24V 2 28 1 R2328 1 3K 1 5K 24V gt 3 48V 1 1 5 200 2452 20V 23 51V POWER WAFER 24PIN 12V gt 3 58V ST_3 5V gt 3 5V ag 2 5V_Normal 2 DDR MAIN 1 5 AP7173 SPG 13 DIODES Free EP 3 3V_NORMAL LG1154D A as POWER_ON OFF2_2 IN OUT 1 8 e e e PES a C2354 MMC POWER 5 H EA FB z 3 5 1 5 5V_NORMAL A oon im d TOY hi 3 3V_NORMAL 3 3 0 1uF
122. SPG 6100 Support HDMI1 4 HDMI mode NO 872 pattern No 83 1 Please input 3D test pattern like below O K 2 When 3D OSD appear automatically then select OK key 3 Don t wear a 3D Glasses check the picture like below Copyright 2013 LG Electronics Inc All rights reserved 19 LGE Internal Use Only Only for training and service purposes 4 6 Wi Fi Test Step 1 Turn on TV Step 2 Select Network Connection option in Network Menu Step 3 Select Start Connection button in Network Connection letwork Connection Start Connection Step 4 If the system finds any AP like blow PIC it is working well Wireless IPTIME_hmhm oh gt Wireless iptime BP Par Wireless 2SIL Wireless uLGE s cuo na 4 7 LNB voltage and 22KHz tone check only for DVB S S2 model Test method 1 Set TV in Adj mode using POWER ON 2 Connect cable between satellite ANT and test JIG 3 Press Yellow key ETC SWAP in Adj Remote control to make LNB on 4 Check LED light ON at 18 V menu 5 Check LED light ON at 22 KHz tone menu 6 Press Blue key ETC PIP INPUT in Adjustment Remote control to make LNB off 7 Check LED light OFF at 18 V menu 8 Check LED light OFF at 22 KHz tone menu Test result 1 After press LNB On key 18 V LED and 22 KHz tone LED should be ON 2 After press LNB OFF key 18 V LED and 22 KHz tone
123. Sound Sync Wireless Checking method 1 Press the MENU button on the remote controller 2 Select the SOUND function of the Menu 3 Change TV Sound Out to TV Speaker Standard Repair Process Detail Technical Manual Error Established LCD TV symptom Audio error No audio Normal video Content Voltage and speaker checking method Revised when there is no audio date aw 6 B GND GND lt ALL MODELS gt GND GND Checking order when there is no audio 1 Check the contact condition of or 24V connector of Main Board 2 Measure the 24V input voltage supplied from Power Board If there is no input voltage remove and check the connector 3 Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the GND and output terminal the speaker is normal Standard Repair Process Detail Technical Manual Error D Function error_ No response in remote controller Established key error date symptom Revised Content Remote controller operation checking method date lt ALL MODELS gt 01 2102 99 6991 7 M TIT ppp Checking order 1 2 Check IR cable condition between IR amp Main board 3 Check the st by 3 5V on the terminal 4 4 When checking the Pre Amp when the power is in ON condition it is normal when the Analog Tester needle moves sl
124. T8289GSP GND C2322 C2341 C2323 01uF PVIN PH 55 GND C2317 4 1 de nn 05 i c2319 E 597 10 gt POST aW 22uF gt 8 ET 0 4 loy me 2204 C2303 PVIN_2 o LE al evec de eu 1 C2310 C2312 C2302 5 1 1 2 S VIN 2330 62334 02336 x luF 3300pF s aL Ziso 5 25 2 5 7 22uF EO 10V 50V ITE m im VIN SS TR 10V 10 6 3 10v E NC_2 GND Switching 2 82316 12V 24V 3 6 e e VSENSE A COMP I POWER ON OEEZ 2 A A Vout 0 765 1 R1 R2 7 8 gt M f 0 12314 12311 4 5 ue C2313 Kon TN 2 L AY BLM18PG121SN1D BAS ag TUE 167 5 OLED NON_OLED ee 2 2 N i N gt C2309 POWER_ON OFF1 C2311 12V O ol 0 1uF A Eso 0 35V 50V R2345 Dec s 10K 3 3V_NORMAL S mS mp e T C2335 A 51K 0 1 4 4 22305 Vout 1 247 0 6 14 16k 15k a 2344 R1 16 BLM18PG121SN1D o R2 e rt Vout 0 6 1 R1 R2 C2329 2304 150pF es LOUE 2 50V 16 TC2301 TPS54327DDAR EP GND En T Vout 1 222 1 R1 R2 R Al 10K EN VIN NS 1 8 POWER UP SEQUENCE SE By m agudo qeu ac tob LA sn
125. TDSW Type Tuner 2 3 FE_DEMOD1_TS_DATA 3 2 a E 2 4 FE_DEMOD1_TS_DATA 4 1 8V TU 3 uner Type for Global i 106503 1 rar 11 T 1 FE_DEMOD1_TS_DATA 6 DS S G501D C Half NIM Horizonta ype RAT SEI OTR TDS Q G501D poc P SS Combo Horizontal type 2 5 FE_DEMOD1_TS_DATA 5 E_DEMOD1_TS_DATA 7 TDS Q G601D T2 C S2 Combo Horizontal Type IN out A TDS Q G651D T2 C S2 Combo Vertical Type 2 6 FE_DEMOD1_TS_paTA 6 gt n TDS M C601D China NIM with Isolater Type ADI GND 1 TDS W J551F Japan Dual NIM i 2 7 FE DEMOD1 TS DATA 7 TDS W B651F Brazil 2Tuner TDS W A651F Taiwan 2Tuner C6546 C6548 TDS W K651F Colombia DVB T2 2Tuner 10uF TU Q W 10v 10v L650 1 23V_D_Demod lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt 18 61215 1 TU 30 1 23V_D_Demod_TU lt v ANM i C6515 lk ee T luF 31 S2_RESET_TU lt TAN Q L 77427 lt 32 3 3V_TU 10 S2_RESET 3 3V_TU 33 LNB_Tx gt A 7 9 Ve 34 so 0 1uF N LNB TX H 35 I2C_SDA4_TU lt TU_Q W_KR BR CO TW JP AU R6503 22 1 T 6542 Y I2C_SCL4 C6531 10uF 0 1uF TU Q W 0 1uF 36 LNB_OUT C6504 u H 10V 18pF 50 TU_Q W_KR BR CO TW JP AU R6504 22 x 2C_SDA4 x J TU
126. URES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 1 SIDE 33K HP_OUT_MTK HP_ROUT_AMP _HP_MUTE SECRET LGElectronics l Te 3 3V_NORMAL OUT C6102 luF 10V HP OUT H13 6109 1 18 TT IC6100 TPA6138A2 yenit INL HP OUT MTK C6109 HP_OUT 180pF HP OUT C6101 R6104 R6101 luF INL HP OUT 43K 10K 10 our e HP_LOUT_MAIN C6106 1 R6102 OUTL 10pF 33K 50V HP OUT MTK HP OUT H13 e gt HP LOUT AMP R6102 1 mus 43K 3 3V_NORMAL 22 A GND_2 16100 120 ohm vb BLM18PG121SN1D HP_OUT tr 6608 C6107 LUE 0 luF 10V 16V LG ELECTRONICS MODEL BLOCK T D ALE HEE 6 2011 09 29 1 LGE Internal Use Only CI POWER ENABLE CONTROL 5V_NORMAL A Dd S AP2151WG 7 5V CI ON C6210 25V CT CI R6219 R6217 TOR 100 CI PCM 5V CTL R6218 10K N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SER
127. VICING IF IS SECRET ee LG ELECTRONICS BLOCK GHEET LGE Internal Use Only MODEL Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes SMARTCARD_PWR_SEL SD_EMMC_DATA 1 RERAN 22 IHE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes B Ce SMART CARD INTERFACE 3 3V NORMAL INT CMDVCC 2 STATUS 3 SVINORMAT tetten deeg A HIGH HIGH CARD PRESENT LOW HIGH CARD not PRESENT SIGN630028 e IC6300 _ TDA8024TT e 5 Zo a CLKDIV1 CLKDIV2 oS 8 a Pa SS SSS SSS SSS it SS SS m 5 5 1 CLKIN CLKDIVI AUX2UC Aw Zo Hos Koc M Hos a a a a a CLKDIV2 AUX1UC Kb E lt HO e Hwa 5V 3V JAPA
128. VREFM 2 3 4 5 6 3 P50 INTP1 SI11 SDA11 POWER_ON WOL ETH P51 INTP2 9011 POWER_DETI P17 TI02 T002 POWER_ON OFF1 C TCS Du R5F100GEAFB MICOM_LEAD_Au 0 ol Qi vA o HIA Ol El zio A AA Ho Al OQ NI OIININI XINI ODO Ol 00 xI MN AININ al HIOIN nm HIN X a HD ol ol OIA HS 0 al OU X Ai Ay A NIN LO A H Ay gt Qu 000000 B 8 B g E we Eo 0 po DES XE ud Capt d E amp m 146 147 18 MODEL1 OPT 5 CAM lt P20 ANIO AVREFP gt POWER ON OFF2 P21 ANI1 AVREFM E P22 ANI2 MODELl OPT 1 P23 ANI3 MODEL1_OPT_4 P24 ANI4 MODEL1_OPT_0 P25 ANI5 e P26 ANI6 MODEL1_OPT_3 P27 ANI7 MODEL1_OPT_2 CAM_CTL For CEC gt SCART_MUTE rower_on oFF2_4 3 5V_ST 83033 R3034 27K 120K 23000 BAT54_SUZHO CEC_REMOTE a HDMI_CEC Q3001 RUEOO3N02 HDMI_CEC_FET_ROHM Q3001 1 QD SI1012CR T1 GE3 HDMI_CEC_FET_VISHAY MODEL BLOCK HEET LG
129. al and its supplements and addenda read and follow the SAFETY PRECAUTIONS on page 3 of this publication NOTE If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication always follow the safety precautions Remember Safety First General Servicing Precautions 1 Always unplug the receiver AC power cord from the AC power source before a Removing or reinstalling any component circuit board mod ule or any other receiver assembly b Disconnecting or reconnecting any receiver electrical plug or other electrical connection c Connecting a test substitute in parallel with an electrolytic capacitor in the receiver CAUTION A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explo sion hazard 2 Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device DVM FETVOM etc equipped with a suitable high voltage probe Do not test high voltage by drawing an arc 3 Do not spray chemicals on or near this receiver or any of its assemblies 4 Unless specified otherwise in this service manual clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner cotton tipped stick or comparable non abrasive applicator 10 by volume Acetone and 90 by volume isopropyl alcohol 90 99 strength CAUT
130. attern Tool Option3 ee Tool Option4 Hum Tool Options Press to i 050 Tool Option6 Ja Tool Option Country Group Area Se ADC Calibration White Balance Test Pattern 10 Point WB Pattern Control 20 Point WB Test Pattern Press to hide OSD im CO gt Ext Input Adjust Test Pattern 4 Pattern Control to hide 050 Press to hide OSD You can view 6 types of patterns using the ADJ Key Checking item 1 Defective pixel 2 Residual image MODULE error ADD BAR SCAN 4 Video error Classification of MODULE or Main B D Appendix Exchange EPI Cable or Main B D 1 Solder defect CNT Broken Solder defect CNT Broken Solder defect CNT Broken Solder defect CNT Broken Solder defect CNT Broken Abnormal Power Section Solder defect Short Crack Abnormal Power Section Solder defect Short Crack Appendix Exchange EPI Cable or Main B D 2 Abnormal Power Section Abnormal Power Section Solder defect Short Crack Solder defect Short Crack lt i k EISA E 8 Abnormal Display GRADATION Noise GRADATION Appendix Exchange LPB LED driver No Light Dim Light E 1 Dim Light Dim Light Appendix Exchange the Module 1 Panel Mura Light leakage Panel Mura Light leakage Press damage Crosstalk Press
131. cation WIFI Built in ass y feature Block diagram LG Innotek T PINEATG 1813001 1210427120 MONET ME MODEL NAME TWFM B0060 FCC 10 BEJTWFMBOO60 INDOOR USE ONLY B0060 944444907438 MADE IN INDONESIA DCDC 1 2V EUP3010 6pin 1 25mm 3 3V 1 2V Switch Antenna gt 2 4G 5G USE DM3030 DP DN BCM43236B RX TX lt gt Switch Antenna DM3030 2 4G 5G Crystal 20MHz WIFI Built in ass y Specification Frequency Band Draft 802 11n Radio 2 4 GHz 802 112 Radio 2 4 GHz 802 11b Radio 2 4 GHz USA Canada IC Europe ETSI Japan STD T66 STD 33 802 11a Radio 5 GHz Operating Channels IEEE 802 1 1b g n compliant 11 channels US Canada 13 channels ETSI 14 channels Japan Transmit Power and Sensitivity TX Output Power Typical Meet emission standard 11b 17 2 dBm llg 14 2 dBm 54Mbps Each chain lin 13 2 dBm Each chain Rx Sensitivity Typical 69dBm at HT20 m7 2 4GHz 87dBm at HT20 m0 2 4GHz 69dBm at HT20 m7 5 0GHz 87dBm at HT20 m0 5 0GHz Modulation DBPSK 1Mbps DQPSK 2Mbp CCK S 5 11 Mbps 2412 2462MHz Ch1 Ch11 2412 2462MHz Ch1 Ch11 2412 2472MHz Ch1 Ch13 2412 2484MHz Ch1 Ch14 BPSK 16 9 Mbps 5 12 12 18Mbps 16 QAM 24Mbps 64 QAM 48 54Mpb and above Current consunption 5V DC Full load 430mA Operating Temperature 0 60 C ambient Storage Temperature 2
132. ck and fix other external device external device 4 Check and fix external device Standard Repair Process D General Function Problem Established LCD TV peurs Remote control amp Local switch checking Revised date 1 Remote control R C operating error Replace Main B D A27 A27 Check RIC itself oil Check B 3 5V Check IR Operation 3 ing On Main B D Output signal Connector solder Check R C Operating When turn off light in room Check 3 5v on Power B D Repair Replace Replace Power B D or IR B D Replace Main B D Power don t have problem If R C operate Explain the customer cause is interference from light in room N Replace R C Standard Repair Process Established D Function error e t Check technical information Fix information ernal Input 2 Component Replace Main B D information S W Version Check and fix external device cable k Replace B D DVI Optical Recognition erre Fix in accordance with technical information Standard Repair Process Established symptom S i i Circuit noise mechanical noise Replace PSU with LED driver Check location centy of noise OR Welle Replace LED driver Check location of noise When the nose is severe replace the module For models with fix information
133. e 206 Gray Standard color coordinate and temperature using CS 1000 over 26 inch Temp LGE Internal Use Only Standard color coordinate and temperature using CA 210 CH 18 4 3 Local Dimming Function Check Step 1 Tum on TV Temp Step 2 At the Local Dimming mode module Edge Backlight moving right to left Back light of IOP module moving 0 271 0 002 0 270 0 002 13000K 0 0000 Bus Co AE Local Dim 0 285 0 002 0 293 0 002 9300K 0 0000 Step 4 Press exit key 0 310 0 002 0 325 0 002 6500K 0 0000 4 2 7 EDGE LED White balance table 1 EDGE LED module change color coordinate because of aging time 2 Apply under the color coordinate table for compensated aging time 3 Normal line Edge Gumi Mar Dec amp Global Local Dimming Demo Edge LED Model 4 4 Magic Motion Remote control test 1 Equipment RF Remote control for test IR KEY Code Remote control for test 2 You must confirm the battery power of RF Remote control before test recommend that change the battery per every lot 3 Sequence test 1 if you select the Start Mute key on the Adjustment remote control you can pairing with the TV SET 2 You can check the cursor on the TV Screen when select the OK key on the Adjustment remote control 3 You must remove the pairing with the TV Set by select OK key Mute key on the Adjustment remote control for 5 seconds 4 5 3D function test Pattern Generator MSHG 600 M
134. e No audio 3 5V 12V 20V or 24V MAIN B D Replace Power Board and repair parts Standard Repair Process symptom Established A Picture Problem E By using Digital signal level meter By using Diagnostics menu on OSD Check RF Signal level Menu Set up Support Signal Test Signal strength Normal over 50 Signal Quality Normal over 5096 Check whether other equipments have problem or not By connecting RF Cable at other equipment DVD Player Set Top Box Different maker TV etc Check RF Cable N Connection Check Use Signal Test 1 Reconnection S W Version Check Signal status 2 Install Booster Contact with signal distributor or broadcaster Cable or Air Check Tuner soldering Main B D Standard Repair Process A Picture Problem DVB S S2 2063905 symptom ymp Tuning fail Picture broken Freezing Revised date m Check RF signal cable DVB satellite signal or not Check whether other equipments have problem or not Check RF Signal level By connecting RF Cable at other equipment Set Top Box Different maker TV etc Check satellite setting Check LNB frequency Check satellite Check Satellite connection DiSEqC motor etc Check Check Replace S W Version Tuner soldering Main B D Contact with signal distributor or broadcaster Cable or Air Standard Repair
135. emperature 25 C 5 C 2 Warm up time About 5 Min 3 Surrounding Humidity 20 80 Copyright 2013 LG Electronics Inc All rights reserved Ar LGE Internal Use Only Only for training and service purposes Adj e oem lower caseASCII Hex Decimal ow ow ET Rean GGan j h 00 J coy Bean j li co Rot RGan 00 col olo Medium 00 CO ROt ecoa Roan j 00 ___ 00 col olo Ret eet D Warm 4 2 5 Adj method 1 Auto adj method 1 Set TV in adj mode using POWER ON key 2 Zero calibrate probe then place it on the center of the Display 3 Connect Cable RS 232C to USB 4 Select mode in adj Program and begin adj 5 When adj is complete OK Sign check adj status pre mode Warm Medium Cool 6 Remove probe and RS 232C cable to complete adj W B Adj must begin as start command wb 00 00 and finish as end command wb 00 ff and Adj offset if need 2 Manual adjustment method 1 Set TV in Adj mode using POWER ON 2 Zero Calibrate the probe of Color Analyzer then place it on the center of LCD module within 10 cm of the surface 3 Press ADJ key EZ adjust using adj R C 9 W
136. f Primary HDTV 1080P Frame packing Primary HDTV 1080P E Line alternative HDTV 1080P 28 12 33 Side by side Full HDTV 1080P N Top and Bottom Primary HDTV 720P Co Side by side half Primary HDTV 720P Frame packing Primary HDTV 10801 5 DES s Field alternative HDTV 10801 26 97 27 23 97 24 148 35 148 5 32 Side by side Full HDTV 1080P Top and Bottom Secondary HDTV 1080P E Side by side half Secondary HDTV 1080P Frame packing Secondary HDTV 1080P 67 432 67 5 29 976 30 00 148 35 148 5 NM De HDTV 1080P 33 716 33 75 29 976 30 00 148 35 148 5 34 Side by side Full HDTV 1080P Top and Bottom Primary HDTV 1080P 99 299 Side by side half Secondary HDTV 1080P Top and Bottom Primary HDTV 1080P Side by side half Secondary HDTV 1080P Copyright 2013 LG Electronics Inc All rights reserved a T LGE Internal Use Only Only for training and service purposes 5 HDMI PC Input 30 30 supported mode manually H freq kHz V freg Hz Pixel clock MHz 3D input proposed mode 1 1024 768 48 36 65 2D to 3D Side by Side half HDTV 768P Top amp Bottom 55 idi 1360 768 47 71 ee IUS HDTV 768P Top amp Bottom 2D to 3D Side by Side half Top amp Bottom Checker Board 3 1920 1080 67 500 148 50 Single Frame Sequential HDTV 1080P Row Interleaving Column Interleaving 640 350 720 400 4 Others 2D t
137. gt M1_DDR_A14 gt M1 D 17 PDR A9 59 P6 M1 DDR A10 A10 AP M1 DDR A10 A10 AP M1 DDR A 15 M1 DDR A15 A R7 G7 E oo M1_DDR_A11 21 M1_DDR_A11 All gt a 22 d uu M1_DDR_A12 A12 BC M1_DDR_A12 A12 BC gt M1_DDR_BAO 2 a o 00 A M1_DDR_BA 0 Fre i M1_DDR_A13 213 NI M1_DDR_A13 13 x z M 1 gt M1_DDR_BA T DbR 2 NI M1_DDR_BA 1 Ws 2 gt D CLKN U CLEN 1 DDR A14 A14 M1 DDR A14 A14 M1_DDR_BA 2 gt M1 DDR BA2 M7 N9 9 N9 a _DDR_ Ml DDR A15 A15 15 15 S R1 R2 a M2 R9 DDR M1 MR HA 0 a di R9 2 DDR Mi N8 9 E PI Ml DDR 1 d DDR M1_DDR_D_CLK 2 9 Ml DDR BA2 BA2 v M1_DDR_BA2 BA2 v M1_DDR_D_CLKN WS D CLKN VDDC15 Ml VDDC15 M1 AL 4 1 2 5 M1_DDR_CKE gt M1_DDR_CKE J7 A8 E CELO M1_D_CLK o 1 DDR VREFCA K7 ci M1_DDRAVREFCA MISD LEN E G6 A 9 co M1_U_CLKN M1_DDR_ODT DDR inane DRE K a co 5 5 es gs m M1 DDR CKE DDR D M1 DDR RASN lt nes D2 D2 M1_DDR_CASN C gt M1_DDR_CASN 22 22 12 2 F _DDR_ x 2 M1_DDR_WEN gt M1_DDR_WEN 1 1 Fl 5 M1_DDR_ODT
138. he servicing of a receiver whose chassis is not isolated from the AC power line Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks It will also protect the receiver and it s components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation If any fuse or Fusible Resistor in this TV receiver is blown replace it with the specified When replacing a high wattage resistor Oxide Metal Film Resistor over 1 W keep the resistor 10 mm away from PCB Keep wires away from high voltage or high temperature parts Before returning the receiver to the customer always perform an AC leakage current check on the exposed metallic parts of the cabinet such as antennas terminals etc to be sure the set is safe to operate without damage of electrical shock Leakage Current Cold Check Antenna Cold Check With the instrument AC plug removed from AC source connect an electrical jumper across the two AC plug prongs Place the AC switch in the on position connect one lead of ohm meter to the AC plug prongs tied together and touch other ohm meter lead in turn to each exposed metallic parts such as antenna terminals phone jacks etc If the exposed metallic part has a return path to the chassis the measured resistance should be between 1 MO and 5 2 MO When the exposed metal has no return
139. he test process DETECT CI Widevine Resolution 480i Comp1 ESN HDCP DTCP 1080P 1 Play START 1920 1080P SCART RGB Result Ready Test OK NG Pattern Horizontal 100 Color Bar Pattern Printer Out MAC Address Label Pattern level 0 7 0 1 Vp p Image ES Copyright 2013 LG Electronics Inc All rights reserved 13 LGE Internal Use Only Only for training and service purposes 3 3 LAN Inspection 3 4 LAN PORT INSPECTION PING TEST 3 3 1 Equipment amp Condition Connect SET LAN port PC LAN Port Each other connection to LAN Port of IP Hub and Jig SET PC IP 192 168 123 254 4 3 4 1 Equipment setting 1 Play the LAN Port Test PROGRAM 2 Input IP set up for an inspection to Test Program Number 12 12 2 2 3 4 2 LAN PORT inspection PING TEST 1 Play the LAN Port Test Program 3 3 2 LAN inspection solution 2 Connect each other LAN Port Jack LAN Port connection with PCB 3 Play Test F9 button and confirm OK Message Network setting at MENU Mode of TV Remove LAN cable Setting automatic IP BET Setting state confirmation E bo f automatic setting is finished you confirm IP and MAC dE J re 4 JIG Ready setting automatic IP 3 3 3 WIDEVINE key Inspection Confirm key input data at the IN START MENU Mode IN START 3 5 Camera Port Inspection 1 Objective To check
140. hite Balance then press the cursor to the right key When right key is pressed 216 Gray internal pattern will be displayed 4 Adjust Cool modes a Fix the one of R G B gain to 192 default data and decrease the others If G gain is adjusted over 172 and and B gain less than 192 Adjust 1 b If G gain is less than 172 Increase G gain by up to 172 and then increase R gain and G gain same amount of increasing G gain c If R gain or B gain is over 255 Readjust G gain less than 172 Conform to R gain is 255 or B gain is 255 5 Adjust two modes Medium Warm Fix the one of R G B gain to 192 default data and decrease the others 6 Adj is completed Exit adjust mode using EXIT key on Remote controller f internal pattern is not available use RF input In EZ Adj menu 6 White Balance you can select one of 2 Test pattern ON OFF Default is inner ON By selecting OFF you can adjust using RF signal in 206 Gray pattern Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 18 CASE Cool First adjust the coordinate far away from the target value x y 1 X gt target i Decrease the R G 2 X y target i First decrease the B gain 3 gt target y target First decrease so make a little more than the target Adjust x value by decreasing the 4 x target gt target i First decrease B so make x a l
141. ing on the circuit board 3 Bend into a U shape the replacement transistor leads 4 Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the U with long nose pliers to insure metal to metal contact then solder each connection Power Output Transistor Device Removal Replacement 1 Heat and remove all solder from around the transistor leads 2 Remove the heat sink mounting screw if so equipped 3 Carefully remove the transistor from the heat sink of the circuit board 4 Insert new transistor in the circuit board 5 Solder each transistor lead and clip off excess lead 6 Replace heat sink Diode Removal Replacement 1 Remove defective diode by clipping its leads as close as pos sible to diode body 2 Bend the two remaining leads perpendicular y to the circuit board 3 Observing diode polarity wrap each lead of the new diode around the corresponding lead on the circuit board 4 Securely crimp each connection and solder it 5 Inspect on the circuit board copper side the solder joints of the two original leads If they are not shiny reheat them and if necessary apply additional solder Fuse and Conventional Resistor Removal Replacement 1 Clip each fuse or resistor lead at top of the circuit board hollow stake 2 Securely crimp the leads of replacement component around notch at stake top Copyright 2013 LG Electronics Inc All rights re
142. ion 4 LE 6 1 41 6 54 0 7 172 16 1 IK 131 MTK000002430 OK OK 02 33 a IG N Null NULI 8 NULL ep x g of l de Press the IN START with the remote controller for adjustment Standard Repair Process Detail Technical Manual i Established symptom A Video error Video error video lag stop Content LCD TV Version checking method 1 Checking method for remote controller for adjustment Adjust Check ADC Data rower UIT Statu System 1 System 2 System 3 Model Number D L Test Option Spread Spectrum Sync Level Stable Count SDP Server Selection Remocon Test Access Code Standard Repair Process Detail Technical Manual Error A Video error _Vertical Horizontal bar residual Established LCD TV SYNPO date Content LCD TV connection diagram 1 lt ALL MODELS gt 9 PCMCIA CARD SLOT Manufactured under license under U S Patent Nos 5 956 674 5 974 380 487 535 amp other U S and worldwide patents issued amp pending DTS the we y trademarks amp OTS TS inc DTS inc All Rights Reserved LNB ANTENNA Satellite IN CABLE IN MCH 5012701 A8 Standard Repair Process Detail Technical Manual Error Established 2012 12 06 LCD TV Sm A Video error Color error EZ ADJUST Option Tool Option2 Test P
143. ions data exchange and simplified setup of more complex communications such as Wi Fi Communication is also possible between an device and an unpowered called 5 From Smart phone to TV au lt gt lt o Samrt phone close to Player choose 71 From TV f to Smart phone Touch the smartphone to the Tag On sticker Using an LG smartphone with the Miracast functions you TV to Phone run the LG TV Remote app on the smartphone Phone to TV view the screen of the smartphone on the TV the connection touch the smartphone to the Tag On sticker again You can also disable Miracast function on the smartphone Main PCB for Broadband Main TCON all in one XXLA790V Zx Chassis LD34D PCB P No EAX65040103 9 Main processor DDR Memory eMMC Memory Micom for Key IR Logo sensing To PSU Audio AMP 9 module Level shifter WIFI BT Front Spk Key IR Logo Main PCB for Broadband Main TCON all in one XXLA860V ZX Chassis LD34D PCB P No EAX65040103 To Camera 9 Main processor DDR Memory eMMC Memory Micom for Key IR Logo sensing To PSU 2 PMIC Bs Audio AMP 9 EPI Wafer To module Q Level shifter 2 WIFI BT 4 BA CODE Front Spk Key IR Logo Main PCB for
144. ischarging wrist strap device which should be removed to prevent poten tial shock reasons prior to applying power to the unit under test Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 2 After removing an electrical assembly equipped with ES devices place the assembly on a conductive surface such as aluminum foil to prevent electrostatic charge buildup or expo sure of the assembly 3 Use only a grounded tip soldering iron to solder or unsolder ES devices 4 Use only an anti static type solder removal device Some solder removal devices not classified as anti static can generate electrical charges sufficient to damage ES devices 5 Do not use freon propelled chemicals These can generate electrical charges sufficient to damage ES devices 6 Do not remove a replacement ES device from its protective package until immediately before you are ready to install it Most replacement ES devices are packaged with leads electri cally shorted together by conductive foam aluminum foil or comparable conductive material 7 Immediately before removing the protective material from the leads of a replacement ES device touch the protective material to the chassis or circuit assembly into which the device will be installed CAUTION Be sure no power is applied to the chassis or circuit and observe all other safety precautions 8 Minimize bodily motions when handling unpackaged replace
145. iton Mode S a xd T32 Debug Mode mmm E 01 gt Internal Test Purpose 10 gt Internal Test Purpose 100 sr DAC START PULLDOWN 11 Internal Test Purpose A e 0PM 0 N N R460 J XTAL SEL 1 0 SW 4 3 100 gt 1 lt XOUT_SUB 00 gt Xtal Input R461 gt XTAL_SEL 0 2042 a A 01 gt CLK 24M from H13D 100 10 gt XTAL Bypass from H13D RAQA gt XTAL_SEL 1 FOR EMI Place JACK Side Place SOC Side IC101H13A_NON_BRAZIL ne LG1154AN_H13A 5 LUE R434 100c424 0 047uF AV1_CVBS_IN e YY e _CVBS_IN_SOC 5 5V C405 C410 R410 D404wy 15 150 275 217 H18 PASO TUE 50V 5 XIN_SUB z XIN SUB AAD_ADC_SI s gt ud TUNER SIF a R 7 rt H XOUT_SUB 184 5 SUB AAD_ADC_SIF 457 L u EA R433 100 C425 0 047 VSB_AUX_XIN eee SC_CVBS_IN Oe IN soc EEEN 42453 2 295 OPT 408 C462 8 Ea N 150pF 50pm SR411 _ 55 AUDA_OUTL gt AUDA_OUTL 5 SC_CVBS_IN_SOY 2 AUDA_OUTR gt AUDA_OUTR aes XTAL_SEL 0 XTAL_SELO AUD_SCART_OUT 2 Too 255 gt scarT_Lout_soc 100 C423 0 047uF XTAL_SEL 1 XTAL_SEL1 AUD_SCART_OUT gt TU_CVBS 5465 gt CVBS soc 100 R480 SCART_Rout_SOC AUAD_L_CH4_ AUAD_R_CH4 OPT R2 5 SOC_RESET PORES_N
146. ittle more than the target Adjust x value by decreasing How to adjust 1 If G gain is adjusted over 172 and R gain and B gain less than 192 Adjust is 2 If G gain is less than 172 increase G gain by up to 172 and then increase R gain and B gain same amount of increasing G gain 3 If R gain or B gain is over 255 Readjust G gain less than 172 Conform to R gain is 255 or B gain is 255 CASE Medium Warm First adjust the coordinate far away from the target value x y 1 X y gt target i Decrease the R G 2 X y target i First decrease the B gain ii Decrease the one of the others 3 gt target y target i First decrease B so make y a little more than the target Adjust x value by decreasing the 4 x target gt target i First decrease B so make x a little more than the target Adjust y value by decreasing Adjustment condition and cautionary items 1 Lighting condition in surrounding area Surrounding lighting should be lower 10 lux Try to isolate adj area into dark surrounding 2 Probe location Color Analyzer CA 210 probe should be within 10 cm and perpendicular of the module surface 80 100 3 Aging time After Aging Start Keep the Power ON status during 5 Minutes In case of LCD Back light on should be checked using no signal or Full white pattern 4 2 6 Reference White balance Adj coordinate and color temperature Luminanc
147. load 1 Press the Instart key of Adjustment remote control 2 Go to the menu 7 Model Number D L like below photo 3 Input the Factory model name ex 47LM960V ZB or Serial number like photo Model Number D L SKJY1107 4 Check the model name Instart menu Factory name displayed ex 47LM960V ZB 5 Check the Diagnostics DTV country only Buyer model displayed ex 47LM960V ZB 3 7 Clt Key checking method Check the Section 3 2 Check whether the key was downloaded or not at In Start menu Refer to below gt Check the Download to Cl Key value in LGset 3 7 1 Check the method of Key value 1 Check the method on Instart menu 2 Check the method of RS232C Command 1 Into the main ass y mode RS232 aa 00 00 A4 Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes 15 2 Check the key download for transmitted command RS232 ci 00 10 CMD Data 0 L 3 Result value Normally status for download OKx Abnormally status for download NGx 3 7 2 Check the method of key value RS232 1 Into the main ass y mode RS232 aa 00 00 CMD 1 Data 0 2 Check the mothed of key by command RS232 ci 00 20 CMD L Data 0 L 3 Result value 101 1d1852d21c1ed5dcx Cl Key Value 3 8 WIFI MAC ADDRESS CHECK 1 Using RS232 Command HfeqkHz Vfeq H ___
148. lovakia Be ralus UK Sweden Denmark Finland Norway Ukraine Kazakhstan Supported satellite 29 satellites 51 75 0E AMOS 4 0W ASIASATS 105 5E ASTRA1LHMKR 19 2E ASTRA2ABD 28 2E ASTRA3AB 23 5E ASTRA4A 4 8E ATLANTICBIRD2 8 0W ATLANTICBIRD3 5 0W BADR 26 0E EU ROBIRD3 33 0E EUROBIRDYA 9 0E EUTELSATW2A 10 E EU TELSATW3A 7 0 EUTELSATWAWT 36 0E EUTELSESAT 16 0E EXPRESSAM1 40 0 140 0E EXPRESSAM33 96 5E HELLASAT2 39 0E HISPASAT1CDE 30 0W HOTBIRD 13 0E INTELSAT10 amp 7 68 5E INTELSAT15 85 2E INTELSAT904 60 0E NILESAT 7 0W THOR 0 8W TURKSAT 42 0E YAMAL201 90 0E Copyright 2013 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Broadcasting system 1 PAL BG DK I I 2 SECAM L L DK BG 3 DVB T T2 C S S2 1 Digital TV VHF UHF C Band Ku Band 2 Analogue TV VHF E2 to E12 UHF E21 to E69 51 to S20 521 0 547 gt DVB T Guard Interval Bitrate Mbit s 1 4 1 8 1 16 1 32 Modulation Code Rate QPSK 1 2 2 3 3 4 5 6 7 8 16 QAM 1 2 2 3 3 4 5 6 7 8 64 QAM 1 2 2 3 3 4 5 6 7 8 gt DVB T2 Guard Interval Bitrate Mbit s 1 4 1 8 1 16 1 32 1 128 19 128 19 256 Modulation Code Rate QPSK 1 2 2 5 2 3 3 4 5 6 Receiving system 5 Coon P i 64 1 2 2 5 2 3 3 4 5 6 256 QAM 1 2 2 5 2 3 3 4 5 6
149. ng and service purposes LG Life s Good 2013 LED LCD TV Engineering guide lt Applicable Model High end Platform gt EPI Interface EPI Embedded Point Point Interface Features Point Point topology Support 2 Pair option CDR Clock Data Recovery Bandwidth up to 1 85Gbps pair at FHD 120Hz 10 bit application Lock signal cascading and feedback to T Con Embedded Control Data Merits Better reliability on common noise No data skew and better EMI margin Fewer lines than mini LVDS Slim PCB design LOCK Figure1 Topology Table 1 Example of FHD 120Hz TV FHD 10bit 960Ch EPI 240HZ Transmission Line Bandwidth 0 84Gbps 168Gbps 1 68Gbps EPI Interface mini LVDS vs EPI Comparison What to change HF mini LVDS HE mini FHD E X Obit LVDS 240Hz 60pin 60pin 80pin Difficult to upgrade bandwidth limit Multiple number of wires needed for higher bandwidth LCM T con to S Driver IC EHD 120Hz EPI Embedded clock P to P Interface FHD 10bit E NN No of Signal 32 m pin 70pin Better reliability on common noise No data skew Better EMI margin Lower cost Cable Connector Slim S PCB design 14mm gt 10mm helps slimmer TV FHD 120Hz Bandwidth Capability FHD 120Hz 10Bit 594Mbps 36Lines 1 65Gbps 12Lines FHD 240Hz 10Bit 594Mbps 72Lines 1 25Gbps 32Lines EPI Interface mini LVDS vs EP
150. o 3D 640 480 800 600 1152 864 6 Component Input 3D 3D supported mode manually 6 10300 2812 so 74 25 ____ 2D 103D Side by Side Top amp Bottom HDTV 1080 6750 60 ____ 48 50 20100 Side by Side Top amp Bottom HDTV 1080P _ 6742 sos 148 052 ___ 2D 10 3D Side by Side Top amp Bottom HDTV 1080P _ 2700 24 000 7425 2D 103D Side by ide Top amp Bottom HDTV 1080P _ Copyright 2013 LG Electronics Inc All rights reserved 11 LGE Internal Use Only Only for training and service purposes 7 USB DLNA Movie 30 30 supported mode manually H V freq pre Pixel 3D proposed mode sx Under 704x480 2Dt03D Over 704x480 2D to 3D Side by Side Half Top amp Bottom interlaced 2D to 3D Side by Side Half Top amp Bottom Checker Board 50 60 Over 704x480 Row Interleaving Column Interleaving Frame Sequential progressive 2D to 3D Side by Side Half Top amp Bottom Checker Board others Row Interleaving Column Interleaving 8 USB DLNA Photo 3D 8D supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 9 USB DLNA 3D 3D supported mode automatically Resolution H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode Side by Side Half Top amp Bottom Checker m CS me Board MPO Photo JPS Photo Side by Side Top amp Bottom
151. of each products is marked by models 4 Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM 5 The receiver must be operated for about 20 minutes prior to the adjustment 4 Model General Specification DTV amp Analog Total 37 countries DTV MPEG2 4 DVB T 30 countries Germany Netherland Switzerland Hungary Austria Slovenia Bul garia France Spain Italy Belgium Russia Luxemburg Greece Czech Croatia Turkey Moroco Ireland Latvia Estonia Lithuania Poland Portugal Romania Albania Bosnia Serbia Slovakia Be ralus DTV MPEG2 4 DVB T2 8 countries UK Ireland Sweden Denmark Finland Norway Ukraine Kaza khstan Russia DTV MPEG2 4 DVB C 37 countries Germany Netherland Switzerland Hungary Austria Slovenia Bul garia France Spain Italy Belgium Russia Luxemburg Greece Czech Croatia Turkey Moroco lreland Latvia Estonia Lithuania Poland Portugal Romania Albania Bosnia Serbia Slovakia Be EU PAL Market 36Countries CIS ralus UK Sweden Denmark Finland Norway Ukraine Kazakhstan 1 Market Morocoo Africa DTV MPEG2 4 DVB S S2 30 countries Germany Netherland Switzerland Hungary Austria Slovenia Bul garia France Spain Italy Belgium Russia Luxemburg Greece Czech Croatia Turkey Moroco Ireland Latvia Estonia Lithuania Poland Portugal Romania Albania Bosnia Serbia S
152. on Check CI CAM status Version Cable sub Assy CAM S W Upgrade By OTA Check damage of CI slot pin Replace Or damage of CI CAM Main B D Or Download Cl Key Old version of Cl 1 2 CAM is not worked atthe TV that is supported Cl 1 3 gt Check SVC Bulletin Check status of Key in the Check In start menu CAM S W Wired Wifi status Replace Main B D Contents of LCD TV Standard Repair Process Detail Technical Manual Continued from previous page Check front display LED Check power input Voltage amp ST BY 3 5V Checking method when power is ON POWER BOARD voltage measuring method Power error_Off when on off while POWER MODE checking method viewing a error Off when on off while POWER BOARD PIN voltage checking method Checking method in menu when there is no 24 audio DO DO DO DO CO B Power error_No power 29 26 27 8 2 Audio error_No audio Normal video Voltage and speaker checking method when there 15 no audio C Audio error_Wrecked Voltage and speaker checking method in audio discontinuation case of audio error D Function error_ No response in Remote controller operation checking method remote controller key error D VCOM Adjustment sequence of the Vcom adjustment 29 30 31 32 Standard Repair Process Detail Technical Manual LCD TV mI Video error No video Normal audio EZ ADJUST Tool Option Tool
153. other than IC Pins This technique involves the installation of a jumper wire on the component side of the circuit board 1 Remove the defective copper pattern with a sharp knife Remove at least 1 4 inch of copper to ensure that a hazardous condition will not exist if the jumper wire opens 2 Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly con nected to the affected copper pattern 3 Connect insulated 20 gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side Carefully crimp and solder the connections CAUTION Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges LGE Internal Use Only SPECIFICATION NOTE Specifications and others are subject to change without notice for improvement 1 Application range 3 Test method This specification is applied to the LED TV used LD34D 1 Performance LGE TV test method followed chassis 2 Demanded other specification Safety CE IEC specification IEC 2 Requirement for Test Wireless Wireless HD Specification Option Each part is tested as below without special appointment 1 Temperature 25 C 5 C 77 F 9 F CST 40 C 5 C 2 Relative Humidity 65 10 3 Power Voltage Standard input voltage AC 100 240 V 50 60 Hz Standard Voltage
154. owly and defective when it does not move at all Standard Repair Process Detail Technical Manual Error Established 2012 12 06 LCD TV sen D VCOM Adjustment Sequence of the Vcom adjustment Nate A8 1 LCD module change board change 2 Equipment Service Remote controller 3 Adjust sequence Press the adj key ll select V COM As pushing the right or the left button on the remote controller And find the V COM value Which is or minimized the Flicker If there is no flicker at default value Press the exit key and finish the VCOM adjustment Push the OK key to store the value Then the message Saving OK is pop Press the exit key to finish V COM adjustment V Com T 440 Saving OK Press to save
155. rom the Memory Do not remove the USB from the port Do not unplug 4 Updating is starting TV Software Upgrade TV Software Upgrade UPGRADING COMPLETED Tm 33 Do not unplug The TV will restart automatically in Iseconds 5 Updating Completed The TV will restart automatically 6 If your TV is turned on check your updated version and Tool option explain the Tool option next stage If downloading version is more high than your TV have TV can lost all channel data In this case you have to channel recover if all channel data is cleared you didn t have a DTV ATV test on production line After downloading have to adjust Tool Option again 1 Push IN START key in service remote control 2 Select Tool Option 1 and push OK key 3 Punch in the number Each model has their number Copyright 2013 LG Electronics Inc All rights reserved 22 Only for training and service purposes LGE Internal Use Only EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by in the Schematic Diagram and EXPLODED VIEW It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X RADIATION Shock Fire or other Hazards Do not modify the original design without permission of manufacturer
156. sample set 2 E amp A aN Oo oz x xX ODEL 2 LCD OLED PDP Need to Assign ADC port MINI ALN ajaja gt gt a ODEL_OPT_3 IR_wafer 12 15 IR_wafer 10pin Ready for sample set ODEL_OPT_4 ODEL_OPT_5 NON_GED SECRET LGElectronics P60 SCLAO P61 SDAAO P62 P63 31 03 003 4 P75 KR5 INTP9 SCK01 SCLO01 P74 KR4 INTP8 SI01 SDA01 P73 KR3 S001 P72 KR2 8021 P71 KR1 SI21 SDA21 P70 KRO SCK21 SCL21 P30 INTP3 RTC1HZ SCK11 SCL11 1 2 3 4 5 6 7 8 LES OOOH 1 P130 P20 AN P21 AN P22 AN P23 AN P24 AN P25 AN P26 AN P27 AN LOOGEAFB 30 MICOM_LEAD_Cu oja lt 4 z 2 o u u lt ONE O TOS jo ale HH KIO HOI MIN HS HO A A occ 0 OW ONES A A HN X a HD nu H am x QN on a H n a LG ELECTRONICS P140 PCLBUZO INTP6 POO TIOO TXD1 PO1 TO00 RXD1 0 AVREFP 1 A
157. served Only for training and service purposes 3 Solder the connections CAUTION Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or lift off the board The following guidelines and procedures should be followed whenever this condition is encountered At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board Use this technique only on IC connec tions 1 Carefully remove the damaged copper pattern with a sharp knife Remove only as much copper as absolutely necessary 2 carefully scratch away the solder resist and acrylic coating if used from the end of the remaining copper pattern 3 Bend a small U in one end of a small gauge jumper wire and carefully crimp it around the IC pin Solder the IC connection 4 Route the jumper wire along the path of the out away copper pattern and let it overlap the previously scraped end of the good copper pattern Solder the overlapped area and clip off any excess jumper wire At Other Connections Use the following technique to repair the defective copper pattern at connections
158. should be sized to conduct at least 2A 12V 2A D6904 1 1 3A 40 LNB_SX34 Y D6902 LNB D6904 40V LNB_SMAB34 6909 10uF C6905 C6906 25V 10uF 10uF LNB al if 25V LNB LNB LNB LNB EN e 5 H close to Boost 1 90 e Cm a close to VIN pin 15 Caution need GND 2 2 FH EHE 2 86904 A C6910 ES 0 1uF Nr LNB D6901 MBR230LSFT1G ERMAL A_GND LNB_OUT lt 21 CHED GHD comm SUY i LNB IC6900 R6903 C6900 C6901 R6900 39K 8pF Jp 2 2K LNB LNB 6900 1W C6902 C6912 1 16W LNB LNB 0 22uF 1 LNB 557 LNB 775 SX34 0 1uF ED a 40V 4 lt of al al 5 H e a CT t T u ose GND GND N Surge protectioin 0 E Os e LNB BO NACE BO NAE LNB LNB TX st A N H 12 50 4 SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics Copyright
159. sy Camera Assy Main PSU 18Pin Main T con LVDS Cable 41 amp 51Pin LED driver 14 Pin cable WiFi 6Pin RF 8Pin Cable SPK Cable Camera Cable Local Dimming cable Interconnection 2 60LA860V ZA Cables IR to Local Key 3Pin Cable 6 IR 8 Pin Cable Interconnection 1 47LA960V ZA OOO0000 Cables Local key Assy Assy WIFI Assy Camera Assy Main PSU 18Pin Main T con LVDS Cable 41 amp 51Pin LED driver 14 Pin Cable WiFi 6Pin RF 8Pin Cable SPK Cable Camera Cable Local Dimming cable Interconnection 2 47LA960V ZA Cables IR 5 Pin Local Key 3 Pin Cable e Woofer Cable Introductions of 13Y ass y Magic Remote control System Remote Buttons MR13 Block Diagram Function List Pairing Un pairing Method 1 System UART USB RF Receiver Remote Pairing Information Transmission Send to TV after Paired Static Calibration Data Bypass only Remote FW ver Save also in Receiver e BD ADDR Save also in Receiver Pairing Information Transmission Sequence When it is paired the remote sends packets pairing success F W version BD ADDR to the receiver The receiver sends the pairing success packet to TV directly version and BD ADDR packets are just saved on the receiver The receiver sends F W version BD ADDR packet to TV when it is required Mo
160. t 40 70 36 00 40 63 00 00 00 00 FD xe ss 10 20 20 20 20 20 2 01 29 co 15 07 50 09 57 07 0x02 oxo3 OES 05 02 18 71 40 s 26 20 63 00 00 01 1D 80 18 2 81 oo e 20 ce oxo7 oo 00 oo 00 00 Reference HDMI1 HDMI4 In the data of EDID bellows may be different by S W Input mode Product ID MODEL NAME HEX EDID Table DDC Function HD FHD Model 0001 01 00 Analog Digital 6 Serial No Controlled on production line Month Year Controlled on production line ex Monthly 01 01 Year 2013 17 Copyright 2013 LG Electronics Inc All rights reserved Only for training and service purposes Model Name Hex LGTV Cf TV set s model name in EDID data is below MODEL NAME MODEL NAME HEX LG TV 00 00 00 FC 00 4C 47 20 54 56 0 20 20 20 20 20 20 20 LG TV Checksum LG TV Changeable by total EDID data Boko 42 _ 23 Block 1 Vendor Specific HDMI INPUT MODEL NAME HEX HDMI 78030C001000801E HDMI2 78030C002000801E check sum Hex 1 EDID HDMI 1 C S E8 81 EDID Block 0 Bytes 0 127 00H 7FH __ 1 2 3 4 5 6 7 9 A B C D
161. tion Data Transmission e Period 7 5 Motion Data gyro accelerometer Voice Data Transmission Period 10msec Voice sampling 16khz 16bit 2 Remote Buttons vs MR13P o 55 BUTTON ETC IR_CODE RF_CODE repeat POWER noe v Roy Bk oge vem SMART oc o ow oe Y 1 o oo voce ow Y START s ow 0 c o vos o oe Y 0 ow o oe Y arowak x oc VOICE START x o o VOICE STOP oo x oe x lt lt lt lt lt Phsical Buttons lt lt lt lt lt lt lt lt Logical Buttons M4 Remote MR13P Remote 3 MR13P Block Diagram MPU 6150 I2C ch1 Gyro ACC Invensense Key Button _ U P 4x4 IR Emitter1 69 IR Em itter2 63 Voice Scene IR BCM20702M BROADCOM Bluetooth 4 0 S12Kbit Serial Flash XM 8950 t Wolfson X tal Codec ADC 20 MHz Knowles 4 mode Only UART Power Management AA x 2 Battery 2 8V LDO PO108
162. until the solder flows onto and around both the compo nent lead and the foil CAUTION Work quickly to avoid overheating the circuit board printed foil d Closely inspect the solder area and remove any excess or splashed solder with a small wire bristle brush LGE Internal Use Only IC Remove Replacement Some chassis circuit boards have slotted holes oblong through which the IC leads are inserted and then bent flat against the cir cuit foil When holes are the slotted type the following technique should be used to remove and replace the IC When working with boards using the familiar round hole use the standard technique as outlined in paragraphs 5 and 6 above Removal 1 Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts 2 Draw away the melted solder with an anti static suction type solder removal device or with solder braid before removing the IC Replacement 1 Carefully insert the replacement IC in the circuit board 2 Carefully bend each IC lead against the circuit foil pad and solder it 3 Clean the soldered areas with a small wire bristle brush It is not necessary to reapply acrylic coating to the areas Small Signal Discrete Transistor Removal Replacement 1 Remove the defective transistor by clipping its leads as close as possible to the component body 2 Bend into a U shape the end of each of three leads remain

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