SERVICE MANUAL
Contents
1. 1 1 1 1 1 1 1 1 1 Illumination power control output System power control output Not used Open gt ANTREM 0 ANTREMOTE power conti up SSCS 0 cm p 0 Loading mowr control ouput Loading direcion SS 5 Loading movor contol output Ejeet destin INSWIPHI VSS SELF SW IN SW Disc self store detection input 24 CDX C4840R C4850R 11 12 13 14 15 16 17 18 10 6 7 8 e Refer to page 51 for IC Block Diagrams 4 7 SCHEMATIC DIAGRAM CD MECHANISM SECTION Refer to page 32 for Waveforms 95 6 SELECT SWITCH R47 220k TP4 01 28J204 T1B LB ON SWITCH CXA1782BQ RF AMP SERVO CONTROL 28B1197K T 146 Q L8 BRIVE FOCUS BIAS SERVO BOARD 1 N PP 0 z jojo N ZIEJEJOJO gt gt gt lt o 9 9 9 9 Q0 C P E T 1 FLEXIBLE BOARD TRACKINGE FOCUS A OPTICAL PICK UP 55 521 Pf LS a p NIVN SELF SW WFCK 0 LBON FOK IN_SW SBSO SERVO 5V SERVO 5V CLOK25 GNB XLAT25 BCK BOUT BATA25 PCMB XRSTO LRCK MB2 SENS GND MB SQCK MB 8V REV LOAD SCOR FWD EJECT EXCK CTL2 C16MIN CTLI 2 L2. 2 MDS 4 LOCK 5 I SEQUENCER CPU INTERFACE 1 TEST 6 45 5850 FIL S EFM SCOR eco S DEMODULATOR 2 VSS WFCK 40 AVSS 11 p 12 i di D A DIGITAL T 39 oov RAS 38 C4M DAN 1 4 S G FSTT ASYO i RAM CORRECTOR S ASYE 18 66 136 XTSL 9 XTAI WDCK 19 U 83 20 21 22 23 24 0506 27128 29 30 31 92 oL x CO 2332385588252 IC3 BA6796FP T1 2 y x B xw es 28 27 26 25 24 22 Q1 19 YD THERMAL SHUT DOWN CH1 DRIVE DRIVE DRIVE BUFFER 602 5 6588 118 IIC BUS SLAVE PAUSE Pant INTERFACE AFIN 3 DETECTOR DETECTOR g REGISTER 4 TRANSCEIVER 10 SCL 9 SDA _ RDS RDBS__ RDS RDBS 8 DAVN VDDA 14 COMPARATOR DEMODULATOR DECODER 7 d 19 POWER SUPPLY 6JVSSD MPX Da AND RESET OSGILLATORJ 53050 VREF AND CLOCK f 4 OSC0 sth ORDER t SCOUT 18 BAND PASS CIN 19 N I CH1 2 7 7 DRIVE BUFFER BUFFER BUFFER rp lt lt a y OPOUT CH4 IN gt NE DRIVE ib 8 9 51 CH5
3. DRIVE DRIVE BUFFER BUFFER C DRIVE i DRIVE BUFFER A ABUFFER 44 I I T CONTROL 3 TCON _ MULTI PATH DETECTOR a MPTH MRO IC2 CXA1782BQ FEBIAS 87 amp PHD2 PHDI X X PHD LD 3 RF O xX FOK 8 RFI 8 CP lt LEVEL IIL DATA REGISTER x DFCT INPUT SHIFT REGISTER ADDRESS DECODER OUTPUT DECODER BAL1 3 x 52 RE TOG1 3 51 4 61 2 1 7 51 4 1 SENS TTL 03 C OUT TTL ar T XRST DATA XLT 4 CLK 8 VCC D ise TRACKING HPF COMP LPF COMP PHASE COMPENSATION TM6 TG1 _ 4 2770 5 FCS PHASE Foo COMPENSATION 4 4 TM3 lt FS1 t Tx TW FS2 s R 4 5 bd 8X9 10 E 9 2 LL LL TAM 401 TDA7462 PAUSE DETECT TREBLE BASS CONTROL CIRCUIT FRONT VOICE BANDPASS FADER FADER REAR FADER LOUDNESS VOLUME SEIL 1 ox CONTROL SEIR 2 LS CIRCUIT CIRCUIT Lu MD 9u MD Na CDL m lt CDL CDR 22 FI COMPANDER CDR PDGND DE PDL cu SE2L 12 0 LOUDNESS CONTROL BD CIRCUIT DIGITAL CONTROL
4. VREF inpurof AL SSS ws 5 i Ni f 5 2 ON 23 24 25 2 28 29 Go e 31 22 33 29 36 Go Go N 39 40 N 22 5 3 S METER 54 55 NS MASK B AMPON O Powerampliferpowerconmolouput SSS Resetoutputto _ VOLATT Fleas volume mute contolouput lt 59 IL named One CATT 0 Systematenuate convolouput SSS TUMT O 6 VS Om 7 amp Nt Noted Ope 5 TUON O no xa 0 Subceramie oscillator ouput GR n I atenuate Tuner stereo signal detection input forced monaural output SEKOUT SSCS SPIN O WIDE select oupur Notwedinihisset IN ETE ma pec ER 0 Main ceramic oscillator ouput 419 9 Ni I EA EN EN EE La IN ceramic oscillator input 4 19 AREAI Destination select input 1 Fixed at L in this set AREAS Destination select input 2 Fixed at L AEP UK model or H German model in this set Fixed at L in this set Fixed at H in this set o _ 105 Flash write input Fixed at H in this set
5. gt No E JO Q N 40066 SI CXB2507AQ BIGITAL SIGNAL PROCESSOR SW RETURN SL SP SL L MOTOR FLEXIBLE BOARD eO ea ci i p 9 9 9 0 83 rs gt B t SW3 LIMIT M902 SLED SUB BOARD M901 SPINDLE Impossible to measure under no signal conditions Voltage and waveforms are dc with respect to ground no mark CD PLAY Note 36 R49 18 4 7k FOCUS TRACKING COIL MOTOR BRIVE 35 SELF SW 04 Q SW RETURN SW RETURN M903 LOABING IN SW BOARD BOARD 5 m SW4 DOWN Sw2 SELF SVI 8150 IN CDX C4840R C4850R 4 9 SCHEMATIC DIAGRAM MAIN SECTION 1 3 Refer to page 53 for IC Block Diagrams 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 MAIN BOARD 1 3 CD TEXT BUS AUDIO IN C4850R C4840R L8 L 8701 202 146 12703 LC89170M TLM D CNP700 30P SELF SW WFCK IN _5 5850 JR710 0 R130 230 24k C4840R 47k C4850R c D N SERVO 5V SERVO y 3 CLOK25 ON OK XLAT25 Ts 0007 25 ELECTRONIC VOLUME A C4850R ND EV FS LRCK MB2 CNI NIN NIN N x 2 4 SERVO BOARB F G 540
6. COM B 10V L 3 9 Leo cur 9 E amp lt 59 2 la Todes Wk LL S LI KEY INO e Reik O S E ii REO o lt Fis R814 1k G arseLay Boara ___ O CNP502 Page 47 SIRCS RB63 Ik Io D O D co G lt 40 gt 9 EST L2 7 R899 ou c RS a 3 3 3 g 3 lt 41 PULL_UP5V R844 100 lt 42 RC_INI __ dq Jg 97 CNP802 REMOTE IN 8823 UBZ TE 17 6 8B 087 17 6 8 RC INO R845 100 C803 BUS INTERFACE K BUSI 2 2 SS 801 45 46 Note Voltage is dc with respect to ground under no signal detuned condition no mark FM MW gt PLAY CDX C4840R C4850R 4 12 SCHEMATIC DIAGRAM DISPLAY SECTION 14 13 12 11 10 LIQUID CRYSTAL DISPLAY PANEL Voltage is dc with respect to ground under no signal Note 1 1440 14IHS 1 2 Na ox 2 7 2 2 2 2 2 2 i inu 224861 124861 824861 644861 e co SIL PIT O O O O amp Ox FEN oz SSN ON kk nw M_ n CY 11 2 11 82 454005 Ad ASSI 19 61 12 2 2 DN 105831 205831 z MS 1 xul ME Sa M o SD nz INNI EM EM 11 62 11 82 11 83 94 lt 61 12 94 4661 12 94 4661 12 81 5 21 31 780 k
7. FM MW gt PLAY di 42 CDX C4840R C4850R 4 10 SCHEMATIC DIAGRAM MAIN SECTION 2 3 Refer to page 51 for IC Block Diagrams 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 NAIN BOARB 1 3 Page 41 1 2 3 gt 4 gt 5 gt 6 7 a gt 9 10 gt 1 gt 12 gt 13 gt 14 gt 15 gt 16 gt 17 gt 18 gt 19 gt om N N bd E Hs EE gt i Cee ETE _ eee II oc I ______ CB11 CB23 CB25 861 220 R851 100 R862 220k Reen R832 100k R826 100 R828 100k R825 100k N 4 E 5 y 16902 2 8999 DS 3 5 5 m 34 gt 601 TUNER UNIT Po ojo Voga Lo N gt c o N A 1 EZ TUX 013 0 ANT AM La LTT i EB H a E G gt PT 5 Qr 560 _____ a Thu _6 MEM Gab esas so I he da dg TER yoo 5 1 5 aer PS 05 15 15 e B S METER 15_
8. me 05041 05831 605831 1058 hx oS oc tox 59 ID le mx n EN O O O O GNNOS x Sal 25 DNN Bo 2 0 2 2 2 0 pre 55 Nin LARA 925861 46851 Y GMST 9 Bor E e 0 CE nel Sale na S n LN co S 5 Nin Bec GF ro De Viz gt 2 7 2 7 116851 216861 16861 TRI Sla DS DE LN o 0 n Y 9 s 7 E O I 2 7 2 2 2 2 2 2 e u in 61657 125861 da NE Inc N pod NE cc O O O EE BS 4 2 N o LO mM in M 16 61 116861 i no gt E n NS de ue SE AI G 41 31 Zan 2058 ID 4 lt LSW523 172 SOURCE R521 560 1 1 172 LSW522 172 OFF 15 511 82 9 41 31 7080 3056 8279 41 31 780 9058 INI 433 DISPLAY BOARD 1 1 mn 038 iE s Ln 34 IDA oc lt 2 2 2 gt ui 2 iyi 1 lt 5 02 gt gt gt Uto 2 coz Ci MAIN BOARD 3 3 CNP800 Page 46 A B D E F G H detuned condition no mark FM 48 47 IC Block Diagrams IC1 CXD2507AQ je FOK 1
9. CDX C4840R C4850R SERVICE MANUAL AEP Model UK Model a Ti WE d CI Photo CDX C4850R Model Name Using Similar Mechanism CD Drive Mechanism Tvpe Optical Pick up Name CD plaver section Svstem Compact disc digital audio svstem Signal to noise ratio 90 dB Frequency response 10 20 000 Hz Wow and flutter Below measurable limit Tuner section FM Tuning range 87 5 108 0 MHz Aerial terminal External aerial connector Intermediate frequency 10 7 MHz Usable sensitivity 12 dBf Selectivity 75 dB at 400 KHz Signal to noise ratio 65 dB stereo 68 dB mono Harmonic distortion at 1 KHz 0 8 stereo 0 696 mono 35 dB at 1 KHz 30 15 000 Hz Separation Frequency response MW LW Tuning range MW 531 1 602 kHz 153 281 kHz Aerial terminal External aerial connector Intermediate frequency 10 7 MHz 450 kHz Sensitivity MW 30 LW 50 MICROFILM SPECIFICATIONS Power amplifier section Outputs Speaker impedance Speaker outputs sure seal connectors 4 8 ohms Maximum power output 40 W x 4 at 4 ohms General Outputs Tone controls Power requirements Dimensions Mounting dimension Mass Supplied accessories Line outputs 2 CDX C4850R Line output 1 CDX C4840R Power aerial relay control lead Power amplifier control lead Telephone ATT control lead CDX C4850R Bass 8 dB at 100 Hz Treb
10. CIRCUIT CREF IC702 PCM1717E ST2 INPUT INTERFACE MODE CONT ROL 53 REAR FADER s FADER SUBWOOFER OUT BUS POWER SUPPLY IC901 BA4903 REGULATOR THERMAL VREF SHUT DOWN OVER VOLTAGE PROTECT AMP AMP GND VCC OUT SESL SESR MUTE SDA SCL PAUSE OUT FL OUT FR OUT RL OUT RR SUBOUT SUBOUT VDD GND LP FM LP HC LP AM V REF MONO OSCIN OSCOUT IF AM IC601 TDA7427AD1TR 3 4 INLOCK DETECTOR PORT EXTENSION 16 BIT PROG COUNTER REF OSCILLATOR BUS INTERFACE 14 BIT PROG COUNTER TIMER SWITCH 14 11 21 BIT PROG COUNTER IC703 LC89170M T TIMING amp SYNCHRONIZATION SIGNAL PROTECTION CONTROL 28 LPOUT 27 VDD2 26 GND AM 11 BIT PROG COUNTER SWITCH SWITCH SWM DIR SWM DIR 6 BIT PROG PRE COUNTER COUNTER 32 33 SWITCH AM FM SUPPLY amp POWER ON RESET SWITCH OUT 25 AM IN 24 FM IN 23 NC 02 GND D 21 VDD1 20 ADDR 19 HFREF 18 AMOSC 17 DOUT INLOCK 11 SCLK 10 SW2 9 SWI 8 TEST 16 SSTOP 15 IF FM IC803 BA8270F E2 BUS ON SWITCH RESET SWITCH DATA IN DATA OUT
11. FW R405 0 SCL 8213 N N 7146 4 7k A e e o Page 36 CTL2 plenty R705 220 CTL1 0401 402 MUTE CONTOROL C201 0 0018 B R202 10k 9912 9912 8V REG 2502394 6 8 124 CONTROL T146 R911 14 2 ty 470 DA 0 R908 T146 lt 5 8 gt 220 C4850R CONTROL x 0908 eu 8 0919 DTCIZZERA S 124 51146 MIZJ T 77 9 1A MIZJ T 77 9 1A 0913 919 0904 0906 8V REG CONTROL BACK UP CHECK 0101 201 MUTE C408 C409 I 3300 15V FL 9408 7 3 MIZJ T 77 16B U PENOS I i lt e i 7 3 MIZJ T 77 16B ANT REM FR rN FR 00 y 8410 9 M4 9 MIZJ T 77 16B BE BEEP M R128 24k R228 24 i ee ee 8 DNO 2 m 8 SUA wit amp 5 to Aan m a ni a gt e o L T R919 b wo 10k 9916 QST N INVERTER 532 3 100 IM ARA e in o SM m 2 p m M 04 lr gi _ Y Y Y YY Y YY Y Y Y Y Y NAIN BOARD 2 3 NAIN BOARD 3 3 Page 44 Page 46 Note Voltage is dc with respect to ground under no signal detuned condition no mark
12. le 8 dB at 10 KHz 12 DC car battery negative ground Approx 178 x 50x 185 mm w h d Approx 182 x 53 162 mm w h d Approx 1 2 kg Parts for installation and connections 1 set Front panel case 1 Design and specifications are subject to change without notice FM MW LW COMPACT DISC PLAYER SONY B SECTION 4 DIAGRAMS 4 1 IC PIN DESCRIPTION e 801 MB90574APMT G 199 BND SYSTEM CONTROL 0 2 2 O Cv sina processing _ NEST O Resetouiputto Nor used Comerio rondini D m 7 NCC Powersuppivpin sv O LED serial LbCKO o s BEP Beep 7 6 NL 7 Ni Comestio aromdinthisset SSS SQCKO O _ O O 2 n UNISO o BUS system serial Ni Connect to SS o 7 CD signal processing serial clock oupot _ O Swmmempu 7 DEMPH De emphasisoupat SSS O Powerampliferatenuato conto oupa MON O CD mechanism power contr pi _ women E ONO O Ni o Powerconrol output of ND conero OT BV veer SS F Ground NIE Ned ANGE 0 LOD view angle alignment output Notwedinihisset _ ANC
13. u 5 19 FLS SI NOSE1 NIL 39 gt f LCB SO FLS 80 cadi nu _FHZAMLIF 21 Hecke m LCB CKO 1C801 pasy MB90S7AAPHT 0 BU_IN 76 2 o G 5 1 NNI D ta alka U 8051 09 0 0 g alid UNI SI SCL 0605 9604 605 8952 2 4 5 R871 100 SDA RBS POWER BUS4 4 9 609 RBS DECODER H BF 41 gt i 5 A RI R624 1k SBA 42 gt 4 6 R625 550 DAWN naso AU TF 17 43 gt 44 gt 45 gt 46 POWER S Sola TUNER POWER 5 CONTROL P 5 RE CONTROL L 47 gt Note Voltage is dc with respect to ground under no signal detuned condition no mark FM MW lt gt dic AA CDX C4840R C4850R 4 11 SCHEMATIC DIAGRAM MAIN SECTION 3 3 Refer to page 53 for IC Block Diagrams 1 2 3 4 5 6 7 8 9 10 NAIN BOARB 1 3 Page 42 A A A A A A MAIN BOARD 3 3 SR 55 2 5 GEW m IC901 cem sn LLL lt 28 0903 lt 9305 CONTROL 0 0940 0905 gt lt 30 2 470 lt 31 int R NT Da 0302 2924 lt 33 51146 0925 X35 E Q924 925 R834 ANT POWER CONTROL lt 36 D pu p 9914 915 qois KEY ACTIVE lt D NI CNP800 E 12P NOSE a
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