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HK 990/230 - Quality & Performance
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1. E BE SE 5 22K DSP 33V EEE 5 epp 552 Se Sk ui ka 2 OE ETT ES seee ds a pan Z ER 53 38 Eri 8 Dir oz 1D E H ZERRI 2 S8 8 2D H 20 24 EXTAM 3858 398 ss sm 5888 388 8 95 3 8 Roa G 48 s 8 EXTAT s DS1818 o g E 0 611 EXTATE DSP 12V DSP_3 3V ze ze 3 285 sis 3 55 5 Le abc EXTAT 288 ele 15 1 1 Qu RIZ 33 a e t 4 TIREN 4 8 EXTAEN 2 4 GND mE I I I Ur SES eh SBE BEYOND G20 0N SOS ENE SERE EEZOGEEOSNEDSOS2808520EQENZ DSP 33V resernose el Toga Q X cog 253 25 9233 2
2. LT 14 5 FB 0805 1 Y 4 45V 474 25 li 21 5 T lI d 13 c2 47uF16V mem 3 100nF R33 R63 U7A 612 47uF16V 1 78K196 7 5 1 NJ M2068 R6 Wana A 2 2uF IC R71 18K1 aa 680R ise BEE 88 H gt a LOIN 2370 amp A 40 i gt P 2 L INI 51 LOUT 1 41 R36 5 47uF 16V PM L INIq uN ROUTI 10K E 5 ho Sa 38 PRIM 10K LIN3 LOUT2 102 25 gt Lins ROUT2 5 2 122 gt UNS 36 R11 0 4 HPL 5 9 1K196 100nF 18K196 HPR e 47 48 ROPIN 37 RISEL MUTET gt R INI 52 c5 4 KUNI nDv RINI R141 gt s RIN2 ISVA gt s RIN3 13 6112 to RIN4 OLRCKA a gt ca gt RINS ILRCKA I dod S22 RING BICKA E 10 SDTOA C53 R46 R66 LRCKB 29 47uF16V 1 78K196 7 5 1 7 i7 5 UE R68 37 SDTOB 5 2 7 pd 4 SDTIB SDTIA3 NJ M2068 c38 2 out L P 2 P 2 SRC_AESOUT lt Saal RX0 TX SPDIF_RECORD 2 R43 47uF16V gt RXI 8 WK ogg e t R70 P lt 2 vour x a R12 gt 38 102NPO 6BOpF NPO 12 1 57 R143 4 R 26 SCL 5V Pp E OSDA 5V PD 100R P 9 coo P L2 CLK 24MHZ MCLK2 1 TT aoo 116 17 _ INT InT _ AK4683 P
3. 2X 0 10 SEE DETAIL B Le E NET C I N 2 2 Bi A _ D 1 A 0m 1 2X 2 TIPS SEATING M PLANE B SEE DETAIL P d 0 08MM 0 0031 WITH PLATING 452555555554 b1 BASE METAL R c e 2 4 GAUGE PLANE B y 0 L 0 25MM 0 0098 BSC PARALLEL TO C X SEATING PLANE L X AORB NOTES Jedec MO 142 D DD N CONTROLLING DIMENSIONS ARE IN MILLIMETERS mm DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14 5M 1982 Symbol MIN NOM MAX A 155 PIN 1 IDENTIFIER FOR REVERSE PIN OUT DIE UP Ai loos 015 PIN1 IDENTIFIER FOR REVERSE PIN OUT DIE DOWN INK OR LASER MARK A2 0 95 1 00 1 05 AN BE DETERMINED AT THE SEATING PLANE C THE SEATING PLANE IS DEFINED AS THE PLANE OF 61 0 17 020 0 23 CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT b 0 17 022 027 HORIZONTAL SURFACE 030 016 A DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION ALLOWABLE MOLD PROTUSION IS 030 021 0 15mm 0059 PER SIDE D 19380 20 00 2020
4. 27 1005 555 13 R125 AV6 8 4 13 EC 220R mE 117 P 3 SPDIF P 3 24 7 4 SDATA_ADC O ANALOG IN 3 REC out 1 3 IN P 4 NJU7313 SCK 4 14 2x4P 2 0 90 gt SRC_AESOUT gt ADC gt LRCLK_ADC P 1 118 45V LARA FB 0805 C63 CDR OUT SEL 100 15 2x13P2 0 90 45V 45V E 4 CINT 4683 2j OANALOGIN R51 R55 21 9 n EN NUR 13 14 OIN R P 1 3 gt NJU7313_SDO 2 17 211 2 s 21 1 A D gt NJU7313 CS 25 26 E DSCLSV C121 47uF 16V 09 9555 14 als lt lt 1 516 R58 3K9 R60 3K9 K1C RC 27F 1005 M 555 K2C RC 27F 1005 M 555 K3C RC 27F 1005 M 555 RC 27F 1005 M 555 K5C RC 27F 1005 M 555 K6C RC 27F 1005 M 555 K7C RC 27F 1005 M 555 RC 27F 1005 M 555 K9C RC 27F 1005 M 555 OOVFL 55361 CS5361 gt RST_CS5361 gt 5 4683 P 3 RL PROCESSOR RL CD RL TUNER RL_CDR RL_TAPE RL_AUX RL TV RL PHONO XLR TO XLR BORD 2 NC
5. uj Lu 1 t EMU 0 1 ee DSP 33V DSP 12V 2XTP PH2 54 PIN 180 9 EMUL 4 c18 20 cat c24 26 coe 24 29 cao c33 C34 cas Cae cas cao ca2 cas cas 10063 o tUF O 1UF o tuF o tuF O 1UF O 1UF o tuF o tur 0 1UF 4 4 4 t 4 4 4 4 4 4 VII 33 C34 104 104 LTV817A TO Preamp TO MCU BOARD MCU 5V REMOTE DGND RX TX IR IN OUT BOARD SII 1 1 on mx 9 ob 2P 2 5 C1815 2P 2 5 A9225MI2S 012 gj A9225MI2S DC12 024A C1815 DC12 0 24A Q3 10K TO TEMP SENSOR TO TEMP SENSOR QH 28C2073 R71 1 7 25 2073 470 15K d 7805 470 FAGND JY103M X1 400V Y2 300V FAGND RAYI CN6 100R1 4W LED SV MCU S5V 7 6 S RELAY 4 JQX 115F 12V DC GND 3 2 U 5 lt 77 47K 1N4148 9 C24 7P 2 0 NNN 220 10 101G RF 0 22 0 25W 7 2 7 92 DWIZN WX C43 HZ7B2ST 10 16 25792 FHI 2 ZN RF1 0 25W DB101G 100 16 104 e e 0
6. Ve gt 3 25 9 5 8 88 5 88 9 _ 2 Yaa Og BIE o 59 00 lt lt a7 a7 m gt gt v Sooo 77757 S 9 Q 999 5 5 255 2 4 ZE m 0560 9 x P Figure 2 2 144 Pin Low Profile Quad Flatpack RFP Suffix Top View Device Overview Submit Documentation Feedback 29 Aureus TMS320DA708 TMS320DA708B TMS320DA788B Texas Floating Point Digital Signal Processors INSTRUMENTS www ti com SPRS297E JULY 2005 REVISED JULY 2007 5 3 PowerPAD Plastic Quad Flatpack Mechanical Data Drawing RFP DA708 B DA788B Device Specific RFP S PQFP G144 PowerPAD PLASTIC QUAD FLATPACK bsq E Q sfoM YS 0 5 50 All linear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion The package thermal performance may be enhanced by bonding the thermal pad to an external plane This pad is electronicaly and thermally connected to the backside of the die and possibly selected leads Actual size 5 4 mm x 5 4 mm E Falls within JEDEC MS 026 Mechanical Data Submit Documentation Feedback 30 hyuix 64Mb Synchronous DRAM based on 1M x 4Bank x16 I O Document Title 4Bank x 1M x 16bits Synchronous DRAM Revision History
7. SE 7 EM AB DSP_TDI 8 8 ew ath sz 2 22 3 EMUN DVDD 4 0 A 31 EM EMAZ 25 A1 6 30 ENS 2 IL nn EM AS 291 22 _ _______L Ad AFSRO 1 AHCLKRO AHCLKR1 vss 28 4 ACLKR 1 i XRUIBVAXRTISVSPII SONI 6 AXRO T4JAXRA 1 RXRU SVAXRTHAJSPTI SIMO 585 XAXROLTSUAXRZIO 8 7 10 9 106 9 e ROLTSUAXRATOT 16 14 18 AXRO 1 1VAXR1 2 AXRO TZJAXFCU 18115 1517 9 AFSXO 22120 8 3 Hi AHCLKOUT ACLKXO 24 23 24 20 2 AXRO 2 T 26 56 25 EM 8 280827 AMUTE1 20 30 2 iiid 15 A16 32 32 31 21 Hau BYTER ENCATT A13 vss 2X16P PH2 54 PIN 180 12 DO15 A 1 Ha a 0914 2X Das DSP_3 3V ere Ha 0013 EXTATS 9 ato Das us 8 39 3 3 DSP 1 2 3 3 EM WEN Wee 0012 aa EM_D4 6 FAN1112 O FB VDD 33V RESET DSP ME E 1006 4 2 Vout Vin 3 9 anc pan h 3 tvou 2 I Rveve Z 24 02 omm g mwe H EM 01 EIE bai 321 DSP TMS 1 DSP_TRST_N c16 c15 EM 28 EM DO 5 1006 3 EMAS Ax 088 28 EM_OE_N DSP TDI TS EMAZ 27 ee 1006 3 ENCAT 22 cee 6 EM_CS2_N ee 5 23 c17 232 100 1 9 DSP
8. DAL E TAS 4 1 HSS6IQV 158 VIVAS ONS WIL OWS gt DUT gt gt gt LSY cp ZHN vC 7 lt 7 vC lt lt ZHW vC 4 56 4 ocn 10001 AC e TAS ddV L lt SO 1 55610 SO lt T 5561 SO MOS no ALAW sns lt NALSIT ALAW x ova OAY wold OAY gt aX OM EI vlvas ody wapa LOVSO6ESSOI 5 SUH 5 3 OPLEWM lt 6 9 ssetav LNO 541 LITISINV sin 10001 692 ASC dnLy l1nOSgV OWS gt sol pr EOT HOT HOT 6 84 AST VASI WASI Kod aut 880 Kod ut 0012 L 505440 gcn 812 g 9 viva 9 xo HOLVTO dsVHd vivax asa asa Oris asa ONJZ oas 2 OS gt SS61AV 80 gt Y A WEE ZHW vC AINO XON gin 5905440 A 11 60 SEOTVST SEOLWST 82
9. k N N N A NNO NJL1302D 2SA1837 MJE15033 2SA1869 2SC4793 2SC4935 MJL3281A NJL3281D MJE15032 MJD253 2SC3138 2SA1312 MJD243 2SC3324 BCP56 16 2SA1255 HF 115F 048 1ZS3B CWF51 104J 3951 100K 2K2 IW 150R 3W 22K 3W 10K 3W 0 33R 5W 5R6 IW 5R5W IR5W 30K 3W 6K2 1 2W 10K 1206 0 22R RF 2W 1K 1206 22K 1206 1M 1206 10R 1206 4K3 1206 1K8 1206 150R 1 4W 1 3K 1206 39R 1206 12K 1 4W 1 180R 1206 330R 1206 300R 1206 3224W 200R BOURNS 6K2 1206 10K 1 4W 1 Q3 Q6Q11 Q7 Q8 09018 010 012013 015 016 014 017 020 Q38 021 040 041 042 044 022 023 024 026 027 028 029 039 025 030 31 033 034 035 Q36 Q37 Q32 Q43 RL4 RTI R24 RI R2 R23 R3 R13 R15 R4 R16 R5 R6 R7 R8 R9 R17 R18 R19 R20 R21 R10 RII R12 R14 R22 R25 R30 R60 R61 R62 R78 R79 R82 R89 R94 R26 R27 R28 R42 R44 R58 R70 R90 R29 R57 R59 R95 R31 R32 R33 R34 R35 R36 R37 R84 R85 R86 R87 R88 R38 R40 R41 R74 R83 R39 R75 R43 R76 R45 R46 R69 R71 R72 R47 R73 R48 R66 R49 R50 R51 R63 R64 R52 R53 R54 R55 130 1191 3020 1210 1111 8370 0130 1181 5033 1220 1111 8690 0100 1134 7930 0000 1134 9350 0120 1183 2810 1200 1193 2810 1210 1181 5032 1220 1180 2530 1200 1133 1380 0121 111131200172 1180 2430 1200 1133 3240 0717 1185 6160 1400 1111 2550 0101 4712 1150 0600 1609 1070 0601 2401 5222 2200 2413 0721 5108 2413 0722 2310 2413 0721 0308 2413 1023 38
10. SRCA392 is MASTER both PORTA andPORTB USA 74LCX125MTC lt RST_SRC FB5 FB0805 C111 47uF 25V FB9 FB0805 0805 6 9 1 TOSLINK HR610675 Hanrun R24 2K7 HR610675 Hanrun T2 SPDIF3 S gic AV2 8 4 14 EC gt SPDIFA 1 6 3 6 AV2 8 4 14 EC 3 4 gt 100nF gt SPDIFA 74LCX139TTR ADC_LRCLK ADC_BITCLK 4 5 SRC_LOCK gt LRCLK A SCLK A SDIN A SDOUT A GPO2 GPO3 GPO4 LOCK MUTE RDY C37 D lH 100nF 9 SRC4392IPFBT AES_OUT TX TX SYNC BLS RXCKO RXCKI MCLK LRCLK B SCLK B SDIN B SDOUT B CS A0 CCLK SCL CDOUT SDA INT CPM SRC is an open drain active LOW output SRC AESOUT SRC LRCLK gt SRC SRC 5 gt U4A 74LCX125MTC U4C 741 125 OE2 1 2 U4D 74LCX125MTC 08 AMSI117 1 8 c4 A7uF 25V a RI9 HR610675 Hanrun 2K7 DNE SUB Trig 1 OUT 13 3 2 E ANN 558550 1 CKX 3 5 12A C112 VW 100nF SUB Trig_2 OUT J7 FSMD010 1206 r O1 03 USC
11. JK1 Volume AV2 8 4 14 EC R36 100R ANS R105 100K L ca L cas RI 100PF 100 T 100PF ig OUT lOuF 50V x P 47uF 16V K3A JRC 27F 005 M 555 100uF 16V For audio C49 C10 10uF 50V gt gt U4 NJW1159M KIA Output to class ABL amplifier JRC 27F 005 M 555 i RI9 lt C53 E 8 p 100uF 16V For audio JRC 27F 005 M 555 lt 7 220PF Mylar VvV 100uF 16V HP_DETECT lt AMP_FAULT FB0805 HEAD PHONE SPEAKER gt SPEAKER B gt n TRIG 7PQ 0 15 lt 31 47uF 16V c6 2204 25 220uF 10V 4TuF L6V JRC 27E 005 M 555 2 56 SS gt gt 100uE 16V For audio 100R us 47K Output to class ABR amplifier C24 10uF 50V p 474816 15 2 028 220425 SSS L 1008 10 N R7 C8 13K 220PF Mylar LM337IMP ANALOG DIGITAL SRC AESOUT CLK_24MHZ gt BITCLK ADC LRCLK ADC SDATA ADC SPDIF REC C Nra 5 2 J6 MUTE_OUT CDR_SEL
12. DCR DCR Number Bandwidth MHz uH Min ohm Max uH Min ohm Max EM X E II LC cH RCM 521 2 605 lt 100 7 030 70 X oo vs os ozo ss 0200 peo eorom ose s _ a1 02 3 os orso 25 ous Schematics 6 5 4 O 1 2 5 1 Mechanical Dimensions 020 0 005 j 0 100 Typ P Loe noc I 0 200 0 200 0 310 Mox SUGGESTED PCB LAYOUT Port No Unless otherwise specified Tol DRWN Dimensions in inches 0 010 Page 1 1 APPD h 0700 2121067 2121679 0700122121005 EM 1h Q Lh EXAS INSTRUMENTS 1 www ti com Second Generation Aureus DSPs 1 1 Features DA708 B DA788B 32 64 Bit 250 266 2 Floating Point DSP Upgrades to C67x CPU From DA6xx Family 2X CPU Registers 64 General Purpose New Audio Specific Instructions Compatible With the DA6xx C67x CPU Enhanced Memory System 256K Byte Unified Program Data RAM 768K Byte Unified Program Data ROM Single Cycle Data Access From CPU Large Program Cache 32K Byte Supports RAM ROM and External Memory External Memory Interface EMIF Supports 100 133 MHz SDRAM 16 Bit Async NOR Flash SRAM 8 or 16 Bit NAND Flash 8 or 16 Bit Enhanced System High Performance Crossbar Switch Dedicated McASP DMA Bus
13. 65 ee g N a 18 gt gt o g g 2 gt gt gt lt Special Handling Instructions Special handling is required for Flash Memory products in FBGA packages Flash memory devices in FBGA packages may be damaged if exposed to ultra sonic cleaning methods The package and or data integrity may be compromised if the package body is exposed to temperatures above 150 C for prolonged peri ods of time December 17 2004 529410150 00 5294106 38 Preliminary SPANSION un Pin Configuration A0 A19 20 addresses 200 0014 15 data inputs outputs DQ15 A 1 0015 data input output word mode A 1 LSB address input byte mode BYTE Selects 8 bit or 16 bit mode CE Chip enable OE Output enable WE Write enable RESET Hardware reset pin RY BY Ready Busy output Vcc 3 0 volt only single power supply see Product Selector Guide for speed options and voltage supply tolerances Vss Device ground NC Pin not connected internally Logic Symbol DQ0 DQ15 1 WE RESET RY BY 29AL01D 39 S29AL016D_ 00 A2 December 17 2004 SPANSION Preliminary u Physical Dimensions TS 048 48 Pin Standard TSOP 5294106 9980150 00 A2 December 17 2004 40 Preliminary SPANSION 2x STANDARD PIN OUT TOP VIEW A 0 10 2X N 2 TIPS 0 10 REVERSE PIN OUT TOP VIEW
14. 890 AOL vv 94 VAST c vien poa 06 41 61 AS Godau L Godau 789 L 505440 80 D 74089 74089 OTIA cord cont NW AS OdN du001 OdN 4u001 912 999 AW 110 dH ONHZ 4H v Lv as I1nO wd 4403198 1110 AY381281 Tavivas NXIOGA SS6IAV 158 gt DAML 62 S08084 rad AST asa IOs asa was ova 11001 80 OSLITISAV ods 2 NS gt HI 55610 sO A XON 4 goin 1 505440 VAA 9L SEOTVST SEOLWST 184 T vein 819 Soa 06 41 wee 222 90 so 74089 74089 64 588 psa VLVGW dH VIVGT 4H V Lv as Wd 4403198 XION HHPTIOWT LSA suvss6layv TIVLVdS gt gt gt SS6IAV 158 gt ue A9LAnLE S08084 6012 TASOVa ZS R25 2K7 HR610675 Hanrun HRS Link d 4 E RJ45 10 8 24 MHZ 55 0805 C24 100nF
15. I e 0200 ss NI AA 9 is ap 2 Lo 9 i ols oi Z AN 8 09 22 i a A Si m ages e O Darts YT LOONA 25 icum I Ly Bea Dip ar T gt PO tee 1 0 TINIE Eum lip pr je er Yo 7 lt 565 7656 QQ 666 OOO 2 999 8 e 001 DSP amp Oscillator DSP amp Oscillator WM BITCLK SDATARI WM SDATA WM WDCLK I2C SCL SDATAL2 SDATALI SDATAR2 SRC SDATA BITCLK SRC BITCLK SRC LRCLK 2 SDA DACL SRC AESOUT ADC LRCLK ADC BITCLK ADC SDATA CS ADI955 14 CS ADIO955 2 CS_WM8740 MUTE_OUT SDO SCK DAC_R I2C SCL I2C SDA RST_SRC RST_AD1955 MUTE_LISTEN CLK 24 MHZ 4 CLK 24 MHZ 2 CLK 24 MHZ 3 CLK 24 MHZ 5 SRC_LOCK SUB SEL RST_SUB SRC_INT TAPE_SEL TAPE_SEL DAC DAC SCK SDATAR2 WDCLK CS_AD1955_2 SDO CLK 24 MHZ 2 BITCLK SDATALI SDATAL2 CLK 24 MHZ 3 CS
16. unique input stage has ultralow input bias current and ultralow input current noise Signals that go to either rail on this high performance input do not cause phase reversals at the output These features make the AD825 a good choice as a buffer for MUX outputs creating minimal offset and gain errors AD825 is fully specified for operation with dual 5 V and 15 V supplies This power supply flexibility and the low sup ply current of 6 5 mA with excellent ac characteristics under all supply conditions makes the AD825 well suited for many demanding applications REV Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices 22 CONNECTION DIAGRAM 8 Lead Plastic SOIC R Package NC NO CONNECT Figure 1 Performance with Rail to Rail Input Signals One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1999 ire S FAIRCHILD SSS See SEMICONDUCTOR July 2008 NPN Epitaxial Silicon Transistor Features Complementary to TIP32 TIP32A TIP32B
17. 150R 1 4W 1 220 100 20 la7nF 100v DL4148 c16 1 4 4 47nF 100v 416v 025 460v R38 R39 FB7 BAS20 4K3 1 Q37 BDS 3S5 R7O 25 3324 D22 t t t 7 1 W Duas T m m 922 936 933 1 Q13 Q12 Q14 1415 015 016 25 1312 25033244 25c3324 MJ D253 D18 MJ L3281A MJ L3281A NJ L3281D MJ L3281A MJ L3281A M pias 918 t 4 Q23 D21 R66 2564793 lt MN M he a 2SA1312 E al 2 4148 V R72 180R n m n n D 39R Q10 mom m M s aoa r 5 8 8 1 Q31 Q30 1 Q11 25 4935 M a a a a 2563324 25033244 2SA1837 1 917 m m a m m iy P MJE1502 m az 8 a E 2 4148 Y m m ac m gt D15 m R65 R64 R63 BAS20 270R a 50 3308 4 4 TP1 2 9 SENSE 8 n N R73 R53 gt R18 R17 R20 R21 Uil 1 12K 1 4 1 C26 1 t 0 33R 5W 0 33R 5W 0 33R 5W 0 338 5W 0 338 5W 817 2x22mA 47nF Mylar 10 S S CI 1 S am g nee lea wy INPUT gt gt IH 4 5 4 T 5 R48 c25 Q8 R6 R5 R7 R8 R9 12K 1 4W 1 27 5 Q32 1 25 1869 t 0 33R 5W 0 33R 5W 0 33R 5W 0 33R 5W 0 33R 5W m 56 16 R41 R51 R50 L 1 4 bi R52 R49 T5 16 b gt sense 330R 330R 300R 180R 4 214 C70 D12 BAS20 47nF Mylhr 1096 n i n n a 9 2 4148 V R47 Mylar Cay 5 ys
18. N DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION ALLOWABLE DAMBAR PROTUSION SHALL BE Di 18 30 18 40 18 50 0 08 0 0031 TOTAL IN EXCESS OF b DIMENSION AT MAX MATERIAL CONDITION MINIMUM SPACE 11190 1200 1210 BETWEEN PROTRUSION AND AN ADJACENT LEAD BE 0 07 0 0028 e 0 50 BASIC THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0 10MM 0039 AND L 0 50 060 070 0 25MM 0 0098 FROM THE LEAD TIP 0 m 8 LEAD COPLANARITY SHALL BE WITHIN 0 10mm 0 004 AS MEASURED FROM THE SEATING PLANE R 008 020 9N DIMENSION e IS MEASURED AT THE CENTERLINE OF THE LEADS N 48 3355 16 038 10 For reference only BSC is an ANSI standard for Basic Space Centering December 17 20042941010 00 A S29ALO 6D 41 3 TEXAS INSTRUMENTS www ti com FEATURES Operates From 1 65 V to 3 6 V Inputs Accept Voltages to 5 5 V Max tpa of 7 9 ns at 3 3 V Typical Vo Output Ground Bounce 0 8 V at Voc 3 3 V T 25 C Typical Output Vor Undershoot 22 Vat Vec 3 3 V T 25 C Supports Mixed Mode Signal Operation on Ports 5 V Input Output Voltage With 3 3 V Voc Supports Partial Power Down Mode Operation Latch Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 2000 V Human Body Model A114 A 200 V Machine Model A115 A 1000 V Charged Device Model C101 DESCRIPTION ORDERING INFORMATION This 9 bit bus interface
19. css wr KI X M M amp 2005 Microchip Technology Inc Advance Information DS39663A 49 Note the following details of the code protection feature on Microchip devices Microchip products meet the specification contained in their particular Microchip Data Sheet Microchip believes that its family of products is one of the most secure families of its kind on the market today when used in the intended manner and under normal conditions There are dishonest and possibly illegal methods used to breach the code protection feature All of these methods to our knowledge require using the Microchip products in a manner outside the operating specifications contained in Microchip s Data Sheets Most likely the person doing so is engaged in theft of intellectual property Microchip is willing to work with the customer who is concerned about the integrity of their code Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code Code protection does not mean that we are guaranteeing the product as unbreakable Code protection is constantly evolving We at Microchip are committed to continuously improving the code protection features of our products Attempts to break Microchip s code protection feature may be a violation of the Digital Millennium Copyright Act If such acts allow unauthorized ac
20. Rch Positive Analog Output Pin 42 DAC ADC Common Voltage Output Pin 2 2uF capacitor should be connected to AVSS2 externally 43 AVDD2 DACPowerSupplyPin 45V 5 5V j 44 AVSS2 DACGroundPin OVO 45 LISEL O Lch Feedback Resistor Output Pin 46 LOPIN Lch Feedback Resistor Input Pin 0 5 x AVDDI 47 ROPIN O Rch Feedback Resistor Input Pin 0 5 x AVDDI RISEL O Rch Feedback Resistor Output Pin 48 49 ADC Ground Pin 0V 50 ADC Power Supply Pin 4 5V 5 5V 51 Lch Input 1 Pin 52 Rch Input 1 Pin 53 Lch Input 2 Pin 54 Rch Input 2 Pin 55 Lch Input 3 Pin 56 Rch Input 3 Pin 57 Lch Input 4 Pin 58 Rch Input 4 Pin 59 Lch Input 5 Pin 60 Rch Input 5 Pin 61 Lch Input 6 Pin 62 Rch Input 6 Pin 63 PLL Ground pin 64 External Resistor Pin 12kQ 1 resistor should be connected to P VSS externally Z 2 E Z z Z z m 2 e 2 2 mmj 2 DID A A b N N 2 d n Note All input pins except internal biased pin RX0 and analog input pins LIN1 6 RIN1 6 should not be left floating m Handling of Unused Pin The unused I O pins should be processed appropriately as below Analog RX0 LOUT1 2 ROUT1 2 LIN1 6 RIN1 6 These pins should be open INT XTO MCKO VOUT DZF OVF SDTOA B These pins should be open CDTO Digital
21. A7 Al 24 31 A6 A2 25 30 A5 A3 26 29 M VDD 27 28 1 VSS Rev 1 5 Feb 2005 3 33 PI N DESCRI PTI ON Synchronous DRAM Memory 64Mbit 4Mx16bit HY57V641620E L S T P xl Series SYMBOL TYPE DESCRI PTI ON CLK Clock The system clock input All other inputs are registered to the SDRAM on the rising edge of CLK Clock Enable Controls internal clock signal and when deactivated the SDRAM will be one of the states among power down suspend or self refresh CS Chip Select Enables or disables all inputs except CLK CKE UDQM and LDQM Selects bank to be activated during RAS activity PADS BAI Bank Address Selects bank to be read written during CAS activity 11 Address Row Address RAO RA11 Column Address CA7 Auto precharge flag A10 Row Address Strobe r EU E RAS CAS WE Column Address Strobe RAS CAS and WE d fine the operation Refer function truth table for details Write Enable UDOM LDQM Data Input Output Mask m output buffers in read mode and masks input data in write 000 0015 Data Input Output Multiplexed data input output pin VDD VSS Power Supply Ground Power supply for internal circuits and input buffers VDDQ VSSQ Doe UE Power supply for output buffers Ground NC No Connection No connection Rev 1 5 Feb 2005 34 Synchronous DRAM Memory 64Mbit 4Mx16bit hyuix
22. Output jacks for two subwoofers Q Digital coaxial output jack for digital record ing Also permits digital recording of analog sources Preamplifier output jacks Analog output jacks for tape recording Analog output jacks for CD Recorder analog recording AUX input jacks suitable for analog signals from video games video recorders etc TV input jacks for analog sound input from your TV TAPE input jacks for analog tape replay CDR input jacks for CD Recorder analog replay Balanced analog inputs XLR for use with all Signal sources that output balanced signals Available via the CD Input function only as an alternative to the unbalanced RCA jacks Input 60 Pin configuration for the XLR Inputs Pin 1 is Ground Pin 2 is Plus Hot Pin 3 is Minus Cold D Left Loudspeaker output System 2 Left Loudspeaker output System 1 Power lead AC input TUNER analog Input jacks 5 PROCESSOR Analog Inputs These Inputs go directly to the power amplifier section of the HK 990 bypassing the Volume and Tone Control Here you can connect the Front Channel Pre Out L R signals from an external surround processor to benefit from the superior power of the HK 990 and control volume from the processor NOTE Only use the Processor Input with a device that has its own volume control 6 CD analog Input jacks You can select either this Input or the Balanced Input as analog Input in the CD In
23. 6 20 SMDE CAP 5X5 4 C10 2320 0121 1138 1 47UF 6 3V 20 SMDE CAP 5X5 4 C11 2340 0111 1138 3 100UF 6 3V 20 SMDE CAP 6 3X5 4 C14 C15 C18 2311 0110 2138 133 N e N N N lt 2 16 2 54 180 2 7P 2 54 180 FB 0805 2 2K 0603 33Q 0603 3 3K 5 0603 1 5 0603 4 7K45 0603 SN74LVC823APW TSSOP24 TI TMS320D708E001BRFP LPQF 144 TI HY57V64162OETP 7 TSOP54 HNNIX S29ALO16D70TFIO2 TSOP48 SPANSION FAN1112S SOT 223 FAIRCHILD DS1818 SOT 23 DALLAS NC7WZ07P6X_NL SC 70 FAIRCHILD HK990 PART LIST P N 0099 1031 0000 Used N 9 N 59 N N e m 0 10 50 10 4TuF 10Vx2096 E CAP 100uF 10V 32096 E CAP 5P 2 0 SOCKET 3P PLUG TO HOUSING2468 26X3C 2 0 L 150MM IN4148 K1010 817 DIP4 COSMO MAX232 SOP16 MAXIM DB9 CKX3 5 12A 3 5mm SK 22H03G6 RS 10uH 2SA1015 TO 92 TOSHIBA 3 9KOQ1 8W 5 10 01 8 5 22 1 8 5 47KQ1 8W45 10Q1 8W 5 471 8W X596 7501 8W 5 2 7001 8W 3596 HK990 PART LIST P N 0099 1121 0000 Used 2 1 2 DB101G 220uF 10V 420 E CAP 100uF 16V 20 E CAP 2 J3 L1L3 3113 0516 6872 3102 1007 5802 1852 0120 9100 2401 1222 2203 R2 R3 R4 R5 R7 R8 R9 RIO R11 R12 R13 R14 2401 1223 3003 R15 R16 R17 R18 R19 R20 R21 R22 R23 R29 R30 R31 R32 R33 R34 R35 R36 R37 R24 R25 R26 R27 R28 R44 R38 R41 R39 R40 Ul U2 U3 U4 U5 U6 U7 Designa
24. A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors Unlock Bypass Program Command Reduces overall programming time when issuing multiple program command sequences Top or bottom boot block configurations available Compatibility with J EDEC standards Pinout and software compatible with single power supply Flash Superior inadvertent write protection Performance Characteristics High performance Access times as fast as 70 ns m Ultra low power consumption typical values at 5 MHz 200 nA Automatic Sleep mode current 200 nA standby mode current 9 mA read current 20 mA program erase current W Cycling endurance 1 000 000 cycles per sector typical W Data retention 20 years typical Package Options m 48 ball FBGA W 48 pin TSOP 44 SOP Software Features Common Flash I nterface compliant Provides device specific information to the system allowing host software to easily reconfigure for different Flash devices m Erase Suspend Erase Resume Suspends an erase operation to read data from or program data to a sector that is not being erased then resumes the erase operation m Data Polling and toggle bits Provides a software method of detecting program or er
25. Deterministic Performance dMAX Dual Data Movement Accelerator Memory to Memory Transfers Memory to Peripheral Transfers Packing Unpacking Delay Data Circular Addressing Non Sequential Addressing for Reverb Three Multichannel Audio Serial Ports Transmit Receive Clocks up to 50 MHz Five Clock Zones and 16 Serial Data Pins Supports TDM 125 and Similar Formats DIT Only McASP2 Two 10 MHz SPI Ports With 3 4 and 5 Pin Options Two Inter Integrated Circuit I2C Ports Real Time Interrupt Counter Watchdog Oscillator and Software Controlled PLL Commercial or Extended Temperature 144 0 5 mm PowerPAD Thin Quad Flatpack RFP Suffix Security Features Available PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters Aureus TMS320DA708 TMS320DA708B TMS320DA788B Floating Point Digital Signal Processors SPRS297E JULY 2005 REVISED JULY 2007 E TEXAS INSTRUMENTS TECHNOLOGY Applications AN and DVD Receiver Multizone A V Receiver HDD Jukebox Navigation Systems High Speed Encode With Simultaneous Multichannel Decode Software Support Dolby Digital Dolby Digital EX Dolby Digital Plus Dolby TrueHD Dolby Pro Logic IIx Dolby Headphone
26. x D CDR in R VY XX A X A N V I gt Tape gt R I gt lt gt PHONO_R gt lt E DXLRR O lt DATA lt 1 CLK lt ST NJU7313 P 2 NJU7313 SCK NJU7313 CS 2 30 15 0805 L5 100uF 16V 100uF16V FB 0805 L6 100pF 100pF 100pF 15VA R88 330K 120 15VA C114 PAS 4A7uF 16V 100R 62 SNS 100nF v C25 R64 DR INI 47 1 USA LOuF 50V NJ M2068 R78 287 R15 330K SNC 1K1 C102 3 3nFM 15 R146 100R 117 NNN 100 47uF 16V t C8 R65 DL INI 47K196 10uF 50V U8B NJ M2068 R14 R16 DE 1K196 C103 3 3nFM 121 IN MM LC R69 R29 10R 10R cis 1 220uF 16V 12VAL M q JE T 2 19 R28 220uF 16V 4K71 560R1 R107 R106 R119 2 7 1 2 7 1 47081 10uF 50V 950 25 3324 946 en 2563324 1 25 3324 R121 1 1 1 954 470K 2SA1312 R13 R120 101 12081 gt 1 Q60 R85 R84 T t
27. 1 Mbit Flash Microcontrollers with nanoWatt Technology Special Microcontroller Features Operating voltage range 2 0V to 3 6V 5 5V tolerant input digital pins only On chip 2 5V regulator Low power high speed CMOS Flash technology C compiler optimized architecture Optional extended instruction set designed to optimize re entrant code Priority levels for interrupts 8 x 8 Single Cycle Hardware Multiplier Extended Watchdog Timer WDT Programmable period from 4 ms to 131s Single Supply In Circuit Serial Programming via two pins In Circuit Debug ICD with three Break points via two pins Power Managed modes Run CPU on peripherals on Idle CPU off peripherals on Sleep CPU off peripherals off Flexible Oscillator Structure Two Crystal modes up to 40 MHz 4x Phase Lock Loop PLL Two External Clock modes up to 40 MHz Internal 31 kHz oscillator Secondary oscillator using Timer1 32 kHz Two Speed Oscillator Start up Fail Safe Clock Monitor Allows for safe shutdown if peripheral clock stops Peripheral Highlights High current sink source 25 mA 25 mA PORTB and Four programmable external interrupts Four input change interrupts Two Capture Compare PWM CCP modules Three Enhanced Capture Compare PWM ECCP modules One two or four PWM outputs Selectable polarity Programmable dead time Auto Shutdown and Auto Restart Two Master S
28. 330pF 1206 10uF 1206 47uF 1206 2 2uF 1206 100nF 1206 MUR2020 GBU8D ZMMI6ST 16V BAS20 014148 WCB 403025 M382 T 250 TERMINAL 7P 2mm 2 2uH MJL1302A D4 IC5 104 R3 R7 R8 R9 RIO R11 R12 R13 R14 R25 R26 R32 R4 R18 R23 R24 R1 R2 R15 R31 R17 R19 R20 R29 R30 R28 R22 RELAYI Q2 Designator Description C6 C9 C10 C16 C17 C2 C18 C3 C4 C12 C13 C5 C8 614 5 67 C19 C20 C21 C22 C32 C34 C23 C24 C35 C25 C70 C26 C27 C28 C30 C29 C31 C37 C33 C36 D1D2 D4 DS D3 D6 D26 D7 D8 D14 D15 D25 D27 D9 D10 D11 D12 D13 D16 D17 D18 D19 D20 D21 D22 D23 D24 FB1 FB2 FB3 FB4 FB5 FB6 FB7 FB9 FB10 11 2 JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP10 Q1 Q2 Q4 Q5 129 1311 1414 8000 1031 2068 1300 1061 2020 6138 2403 1216 5203 2401 1221 0203 2401 1222 2203 2401 1221 0303 2401 1221 0003 2401 1222 7303 2401 1224 7303 2401 1221 0103 2401 1221 0403 2401 1222 0103 4712 2027 0006 1132 1200 0162 Part number 2217 3473 0243 2321 0810 5093 2362 1410 9093 2223 3103 0400 2312 0810 7073 2103 5105 0150 2115 5473 0150 2103 5271 0155 2217 3473 0243 2103 5399 0155 2103 5331 0150 2103 5106 0150 2115 5476 0150 2103 5225 0150 2103 5104 0150 1360 0202 0000 1361 3000 0080 1301 6002 0100 1340 0200 0100 1310 4414 8000 1874 0302 5382 2932 5000 2500 3100 4070 0200 1832 2000 0001 1191 3020 1200 N Ne e Ne me N NY
29. AMS1117 1 8 SOT 223 AMS 51117 3 3 SOT 223 AMS AMS1117 5 0 SOT 223 AMS OR 5 0805 1K 5 0805 film capacitor 52 WIMA 2 2K 5 0805 2 7K 5 0805 RO VY NN P 3 3 5 0805 3K 5 0805 12 10K 5 0805 10R 5 0805 22K 5 0805 10 24K 5 0805 6 27R 5 0805 17 47 5 0805 19 47Rx596 0805 75R 5 0805 100 5 0805 150 5 0805 300 5 0805 330 5 0805 470 5 0805 560 5 0805 680 5 0805 FSMD010 1206 HR610675 Wideband RF transformer Hanrun 24 576MHz CS5032 FN N N e e N PHONES BOARD PART LIST P N 0099 1171 0000 Used CK 6 35 02 JACK 4P 2 0mm SOCKET 5P2 5mm SOCKET 10uF 16V 20 E CAP 47 50 5 X7R 0603 MLCC 100uF 25V 22096 E CAP 0 1uE 50Vx596 X7R 0603 MLCC 150 50 5 X7R 0603 MLCC 330 50 5 X7R 0603 MLCC 470 50 5 X7R 0603 MLCC 0 04 TuF 50V 5 X TR 0603 MLCC N N N UU e U6U7 0405 U10 U19 U23 U8 U15 U11 R14 R60 R81 R91 R99 R116 R80 R90 R98 R115 1004 0520 4913 1074 1250 1915 1074 1392 0815 1001 9550 0414 1011 7180 0156 1011 7330 0128 1011 7500 0128 2401 8200 0400 2401 8210 2400 2401 8222 2400 R79 R82 R19 R21 R24 R25 R86 R89 R93 R97 R10 2401 8227 2400 R104 R114 R118 R84 R94 R102 R119 R15 R18 R30 R33 R61 R71 R78 R106 R107 R108 R109 R110 R112 R113 R122 R123 R6 R7 R8 R9 R34 R37 R87 R105 R3 R4 R38 R41 R42 R45 R47 R50 R51 R54 R62 R63 R66 R67 R68 R69 2401 8233 2400 2401
30. necessarily include testing of all parameters 13 Burr Brown Products from Texas Instruments SRC4392 SBFS029B DECEMBER 2005 REVISED APRIL 2006 Two Channel Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver and Transmitter FEATURES Two Channel Asynchronous Sample Rate Converter SRC Dynamic Range with 60dB Input A Weighted 144dB typical Total Harmonic Distortion and Noise THD N with Full Scale Input 140dB typical Supports Audio Input and Output Data Word Lengths Up to 24 Bits Supports Input and Output Sampling Frequencies Up to 216kHz Automatic Detection of the Input to Output Sampling Ratio Wide Input to Output Conversion Range 16 1 to 1 16 Continuous Excellent Jitter Attenuation Characteristics Digital De Emphasis Filtering for 32kHz 44 1kHz and 48kHz Input Sampling Rates Digital Output Attenuation and Mute Functions Output Word Length Reduction Status Registers and Interrupt Generation for Sampling Ratio and Ready Flags Digital Audio Interface Transmitter DIT Supports Sampling Rates Up to 216kHz Includes Differential Line Driver and CMOS Buffered Outputs Block Sized Data Buffers for Both Channel Status and User Data Status Registers and Interrupt Generation for Flag and Error Conditions User Selectable Serial Host Interface SPI or Philips 2C Provides Access to
31. 0099 1011 0000 Used Part Type 2 30 50 10 4 0 1uF 50V 10 4 0 1uF S50V 5 0603 2 10uF 10V 20 E CAP 1 10 16 20 E CAP 2SC2406R SC 59 Panasonic BSS123 SOT23 1 3 5 0805 1 5 0805 RF0 22R 0 5W 5 2 4 5 0805 2 7 5 0805 4 7 5 0805 5 6R 5 0805 10 5 0805 22 5 0805 27R 5 0805 47 5 0805 75Rx596 0805 100 5 0805 100R 2596 0805 150 5 0805 220R 2596 0805 4128 1 0805 4708 5 0805 6808 5 0805 6808 1 0805 9108 5 0805 TSAB 3 H 5mm PUSHBUTTON AD825AR SOICS Analog Device LM317EMP SOT223 National Semiconductor LM317T ADJ TO 220 National Semiconductor LM337IMP 807223 National Semiconductor LM337T ADJ TO 220 National Semiconductor NJW1159M DMP16 JRC PIC18F66J10 TQFP64 Microchip Technology ULN2003AD SOL160 P 150 1 27 TEXAS Q1 Q3 Q4 Q5 Q6 012 013014 015 017 010020 R5 R7 R19 R20 R38 R50 R51 R59 R40 R41 R42 R30 R37 R54 R61 1132 4060 5000 1180 1230 1011 2401 8221 3204 2401 8210 2400 2406 0422 2815 2401 8224 2400 2401 8227 2400 R29 R32 R33 R34 R39 R47 R52 R56 R57 R58 R60 2401 8247 2400 R62 R90 R23 R24 R9 R10 R27 R48 R49 R53 R65 R66 R69 R70 R71 R72 R73 R74 R75 R76 R80 R83 R84 R85 R87 R88 R89 R91 R92 R94 R98 R99 R103 R104 R106 R108 R67 R68 R95 R96 R78 R79 R81 R82 R15 R16 R64 R77 R86 R97 R13 R14 R45 R46 R101 R102 R105 R107 R1 R2 R3 R8 R11 R12 R35 R36 R43 R44 R55 R63 R100 R17 R25 R28 R31 R21 R93 R18 R26 R22 R4 R6 S
32. 1 0 0 1 Yes 120 Complete IBM PC serial port 242 5 2 2 4 0 1 Yes v 200 Separate shutdown and enable 243 5 2 2 4 0 1 200 Open line detection simplifies cabling 244 5 8 10 4 1 0 120 High slew rate 245 5 8 10 0 Yes v 120 High slew rate int caps two shutdown modes 246 5 8 10 0 Yes v 120 High slew rate int caps three shutdown modes 247 5 8 9 0 Yes v 120 High slew rate int caps nine operating modes 248 5 8 8 4 1 0 Yes v 120 High slew rate selective half chip enables 249 5 6 10 4 1 0 Yes v 120 Available in quad flatpack package AVLAZCLAM Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Dallas Direct at 1 888 629 4642 or visit Maxim s website at www maxim ic com 59 5V Powered Multichannel RS 232 Drivers Receivers 45VINPUT c3 TOP VIEW W LTAGE DOUBLER MAX220 MAX232 5 TTL CMOS RS 232 INPUTS OUTPUTS DIP SO CAPACITANCE uF 0 05 85 232 DEVICE C1 C2 C3 C4 C5 INPUTS MAX220 47 47 10 10 47 232 10 10 10 10 10 MAX232A 01 01 01 01 01 Figure 5 MAX220 MAX232 MAX232A Pin Configuration and Typical Operating Circuit TOP VIEW Che 10V C1 VOLTAGE DOUBLER C2 doy T0 40V C2 VOLTAGE INVERTER 5 MAXIM n EXCEPT MAX220 MAX222 gt Tou C TIN MUS TIL CMO
33. 1024 2048 words of 8 bits each The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential The AT24C014 02 04 08 16 is available in space saving 8 lead PDIP 8 lead JEDEC SOIC 8 lead MAP 5 lead SOT23 AT24C01A AT24C02 AT24C04 8 lead TSSOP and 8 ball dBGA2 packages and is accessed via a Two wire serial inter face In addition the entire family is available in 2 7V 2 7V to 5 5V and 1 8V 1 8V to 5 5V versions 8 lead TSSOP 8 lead SOIC H H V Table 1 Pin Configuration 1 8 O vcc 11 8 Pin Name Function 2 12 fa A2 03 6 1 SCL A2 3 6 SCL 0 A2 Address Inputs GND O 4 5 15 GND 4 5 SDA SDA Serial Data SCL Serial Clock Input 8 ball dBGA2 8 lead MAP WP Write Protect VCC Ao A0 NC No Connect a is WE je SCL A2 GND Ground SDA 9 GND SDA GND VCC Power Suppl i pply Bottom View Bottom View 8 lead PDIP 5 lead SOT23 1 8 0 VCC SCL 1 Ai 2 75 wpe GND A2 3 6 O SCL SDA 4 GND 4 5 SDA AIMEL 53 Two wire Serial EEPROM 1K 128 x 8 2K 256 x 8 512 x 8 8K 1024 x 8 16K 2048 x 8 AT24C01A 24 02 24 04 AT24C08 24 16 Note 1 This device is not recom mended for new designs Please refer to AT24C08A This device
34. 1U 275VAC X2 f C45 7 2 5 C27 C46 NNN 100 50 SS 104 12K 100 63 ZNDW2 NX C28 100 63 TO DISPLAY BOARD F TO TRANSFORMER 77 HZ38 3ST 38V m 3 R1 5 white H5mm R1 5 white H5mm LED amp VOL D1 19 5F 24 W RI22ECA 15 OANALOGIN L P 2 R1BY 100 15 R139 e t R90 R79 100R c29 cio 220R 100R 47uF16V 100nF lt C16 E R72 R10 AD825AR 100nF R73 R109 012 1 AV4 8 4 13 EC R76 J RC 27F 1005 M 555 oR 100R oR 100R 1 6 C73 9 3 1m A 3 AD825AR 330P Y LA pn
35. 2 selectors in the Off position output is supplied only to headphones When using the automatic loudspeaker setup and calibration system EzSet EQ plug the microphone in here Volume Control Turn to raise or lower output volume Remote Sensor Window The sensor behind this window rectives infrared signals from the remote control Aim the remote at this area and do not block or cover it unless an external remote sensor is installed Enter Button Press to select a parameter for adjustment and to confirm Main Information Display This display delivers messages and status indications to help you operate the amplifier Connections ATTENTION IMPEDANCE DES HAUT PARLEURS 4 MINSYSTEM 1 00 2 8 Q MINSYSTEM 1 H 2 CAUTION SPEAKER IMPEDANCE 4 MINSYSTEM 1 OR 2 8 Q MINSYSTEM 1 amp 2 WARNING TO REDUCE THE RISK OF FI ELECTRIC SHOCK DO NOT EXPOS TO RAIN OR MOISTURE SERIAL NO AC INPUT AC 2304 5082 MODEL NO HK 990 harman kardon NORTHRIDGE CALIFORNIA USA MADE IN OPTICAL 1 OPTICAL 2 COAXIAL 1 4 COAXIAL 2 L BALANCED INPUT LEFT SPEAKER sus 1 5082 Right Loudspeaker output System 2 Right Loudspeaker output System 1 RS 232 connector for possible future PC update Update Switch Input jacks for or two subwoofer signals from external surround processor i
36. ADCs DSPs SACD decoders external digital filters AES EBU receivers and continued on page 12 One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 Analog Devices Inc 2002 AD1955ARS ABSOLUTE MAXIMUM RATINGS PACKAGE CHARACTERISTICS Parameter Min Max Unit Package Typ Unit DVpp to DGND 0 3 6 M Oja Thermal Resistance 109 0 C W AVpp to AGND 0 3 6 V Junction to Ambient Digital Inputs DGND 0 3 DVpp 0 3 V Thermal Resistance 39 0 C W Analog Outputs AGND 0 3 AVpp 0 3 V Tunction to Case AGND to DGND 0 3 0 3 Reference Voltage AVpp 0 3 2 Soldering 300 10 Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ORDERING GUIDE Model Temperature Package Description Package Option AD1955ARS 409 to 85 C 28 Lead SSOP RS 28 AD1955ARSRL 40 to 85 C 28 Lead SSOP RS 28 on 13 Reels EVAL AD1955EB Evaluation Board RS Shrink Small Outline Package PIN CONFIGURATION DVDD 1 LRCLK EF_WCLK 2 BCLK EF_BCLK 3 SDATA EF LDATA 4 EF
37. ADIO955 14 SDATARI DAC R RST_AD1955 BITCLK DAC_L SCK SDO RST_AD1955 WDCLK Digital Inputs Digital Inputs SRC_INT 24 MHZ 4 RST_SRC 126 SCL SRC SDATA SRC_LOCK SRC LRCLK SRC BITCLK ADC LRCLK ADC BITCLK 1206 SDA ADC SDATA SRC AESOUT CLK 24 MHZ 5 Subwoofer DAC Subwoofer DAC SDO SCK CS_WM8740 CLK 24 MHZ 4 RST_SUB WM BITCLK WM LRCLK WM SDATA MUTE OUT MUTE OUT MUTE_LISTEN SUB_SEL Ot 28 NMO Suonoeuuo VIVAS WA 2 tWvlvds lt Tavivqs lt 1 lt YDM SSELAVO suono uuoo InOXIOHV caxv 0 caxv sr ouxv Taxy otlouxv TAXY rrjosxv TAXY z1louxv TAXY etlouxv 0 OUXV OUXV OX V ORLOINV NATO Llouxv 9louxv slouxv plouxv ONIS 114 t raxy 6 0 INOS 114 s TAXY 8 owxv TOY 0454 VAS 1241 0145 0241 5 0145 ONIS 0145 TOS 004 0146 TOS 1040 SOS 0145 dSd N 18544 081 1939oS MOY UIML c bs cd9T c u g D TOS vas 2 2 060024 G K P T VASI DAS
38. ANALOG_IN_L DAC_L DAC_R ANALOG_IN_R TAPE_SEL CDR_SEL lt 7313 5 350 SCK CS_AD1955_2 TAPE_SEL MUTE_LISTEN SUB MUTE OUT 65 ADI955 14 CS_WM8740 REC OUT L REC OUT R REC OUT L REC OUT R DINR INT1 5V INT2 DC SCL DC SDA gt 3 3V 3 3V lt 5V lt eeeeeeeeeeee 15 lt 9 eeeeeeeeeeeeee 15 lt DC SDA 05 2502406 JRC 27F 005 M 555 JRC 27F 005 M 555 lt NJU7313 CS R34 m 4K7 C58 Q14 g 2902406 10UF 16V 3285 0805 3 lt NJU7313 SDO FB0805 HEADPHONE_MICRO FB4 FB0805 5VSTBY A R103 10K R94 10K 015 25 2406 5VSTBY A 5 GPIO FAV 3 3 433V SS e R98 1 Q12 2562406 10K a e INT1 lt NJU7313_SCK lt NJU7313_SDO_ 4 007313 CS INT2 lt AMP_FAULT lt HP_DETECT AK4683 DC SCL GPIO BUTTON GPIO FAV R81 DC SDA A NI 8 4 SZ Standby from front MCU TxD from front MCU RxD to front MCU Oswi 5mm
39. C7 R3 E C20 R30 TT 10000F 100V gt 22K 3W E 10K it 4 2 w 7 1 45 52 bi o 1 R28 5 192 MUR2020 MUR2020 ee 1 lt 15v Faston 6 3 v R97 2K42W t x 1 4 60 R27 T ur 7 Faston 6 3 OQ22R RF 2W Q20 RS exe SS MJD253 16 460v Ji R57 c28 ar 7P 2mm 22 R94 R58 10K 11 1 2 2 7 Bn i gt gt INPUT Q43 4 4 4 FAULT 2SA1255 R12 RL3A 5 1R 5W 90 RS OUTPUT gt 7 33K 33K RL3C 115 048 1253 ROL R11 D27 33K 942 R81 5R 5w 8 R B s20 10 d b 25C3138 amp SENSE RISB pos 02 R24 817 A y 4 D24 c10 c9 RL4A 2K21W 2 DL4148 47nF 100 47nF 100V R90 Q44 isl cas R226K212W R10 2563138 2 2uF 5R61W Pa E s R95 D23 22K DL4148 RL4B J I 416v 77 amp SENSE T EGND 100nF 360v R80 Qai R83 390R RLAC 2503138 4 3 P 115 048 1253 1 58 in 520 10 dP R77 d R79 68K 10K EAE R60 Q40 D16 10K R1 2563138 148 2 2 1 R78 D19 _ 10k DL4148 27 6 R28 Q21 Ts T 4 2 2563138 1 c37 cai TLOG1CD m 47UF 47 5 R61 RTL R29 10k 51 104 3951 100K 22 1 7 1 1 1 9 1 10 LOI 80 R23 R71 R69 R76 c18 150R 3W
40. Dolby Virtual Surround DTS 5 1 DTS ES 6 1 DTS Neo 6 DTS 96 24 DTS ES 96 24 DTS HD DA788B only MPEG 2 AAC LC Decode MPEG 4 AAC LC Encode Decode THX Select 2 THX Ultra 2 Neural THX Surround MP3 Encode MP3 Decode WMAS Encode WMA9 Decode HDCD Decode ATRAC3plus Encode ATRAC3plus Decode Audyssey MultEQ XT MultEQ PrevEQG 2EQ SRS Circle Surround CS II Bass Boost Perfect Playback Compressed Audio Enhancer TI Virtualizer Headphone Effects Library TI DSD to PCM Decode TI Filter Library Performance Audio Framework TIDSP BIOS Chip Support Library and DSP Library Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document Copyright 2005 2007 Texas Instruments Incorporated Aureus TMS320DA708 TMS320DA708B TMS320DA788B Texas Floating Point Digital Signal Processors INSTRUMENTS SPRS297E JULY 2005 REVISED JULY 2007 www ti com 1 2 Trademarks Aureus Perfect Playback DSP BIOS PowerPAD 5320 6000 C6000 Code Composer Studio XDS TMS320 TMS320C62x and TMS320C67x are trademarks of Texas Instruments Audyssey MultEQ XT MultEQ PrevEQ and 2EQ are registered trademarks of Audyssey Laborato
41. EN AV6 8 4 13 EC R99 R41 S e lt 220R 47K co 47uF 25V 47uF 16V R26 i K R82 anriev T ione U4 10K ae C75 008 20007 s 47uF16V j lt 100nF x a c97 p eem K4B 24 15 R124 Tor FILT OVFL 12 oon 220R RET IRE 27 1005 555 x lt ISVA XE RST P2 68K XN 7 REFGND S LJ vy 13 7 BVA C95 2 L R5 55 M S Gl LCDR inL 330R1 vw HPF HPF CS5361 P2 PR R2 T ig R gt in R JRC 27F1005 M 555 10K196 C96 1uF 25V 16 MI 6 10 1 8 pu 102 AINL MDIV J2A 330P 1 22 AV4 8 4 13 EC R101 Fat R8 10 1nFM 17 9 x 220R cs vits AINL SDOUT SDATA_ADC 2 1 1 100R 1 100pF 100pF T 3 ms esx co 2 swe LRCK 47uF16V 100nF d 4 3 t KSB NJ M5532M SRI SCLK BITCLK_ADC 8 RC 27F1005 M 555 RA J Em M Es 10 1 ues R9 20 AR 8 8 CK 24MHZ 5 c83 DE a i t 2 2uF 50V o R22 47R 330P p i O 30onr Lp Tape in L 4 Le 15VA ISVA o 6 WIMA MKS 2 reus 194 gt in 4 27 1005 555 100nF R31 136 47K C20 L 470 16 coo AV6 84 13 EC R122 its cx 220R 70 16 100nF 100nF 100nF 4 100nF R123 220R N K7B NV _ J 27 1005 555 9 9 13 Or Lorine pa 4 2
42. FUNCTIONAL BLOCK DI AGRAM 1Mbit x 4banks x 16 1 Synchronous DRAM Self refresh Internal Row logic amp timer Counter CLK Row ow Active Pre x Decoder J AA cS 5 9 t lt RAS E CAS WE Column Pre U LDQM Decoder Column Add Counter Address Register Register Register sJejng ss ippv Rev 1 5 Feb 2005 35 1Mx16 BANK 3 Jepooeg x Jepooeg x Burst Counter CAS Latency HY57V641620E L S T P xl Series 1Mx16 BANK 2 1Mx16 BANK 1 1Mx16 BANK 0 9168 1 39 dl dv 55155 21601 9 Y Decoder Pipe Line Control Data Out Control S29ALOJ6D 16 Megabit 2 x 8 Bit 1M x Bit CMOS 3 0 Volt only Boot Sector Flash Memory Data Sheet N SPANSION PRELIMINARY Distinctive Characteristics Architectural Advantages Single power supply operation Full voltage range 2 7 to 3 6 volt read and write op erations for battery powered applications Manufactured on 200nm process technology Fully compatible with 0 23 Am29LV160D and MBM29LV160E devices Flexible sector architecture One 16 Kbyte two 8 Kbyte one 32 Kbyte and thirty one 64 Kbyte sectors byte mode One 8 Kword two 4 Kword one 16 Kword and thirty one 32 Kword sectors word mode Sector Protection features
43. Mechanical Data Maximum Ratings Q 25 C unless otherwise specified High Drain Source Voltage Rating vm kos e Case SOT 23 Molded Plastic e Case material UL Flammability Rating 94V 0 UK Moisture sensitivity Level 1 per J STD 020A e Terminals Solderable per MIL STD 202 m OUR we Method 208 e Terminal Connections See Diagram S Marking K23 See Page 3 e Ordering amp Date Code Information See Page 3 Weight 0 008 grams approx Source Ce BSS123 N CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR SOT 23 Dim Min Max A 0 37 0 51 B 1 20 1 40 2 30 2 50 D 0 89 1 03 0 45 0 60 G 1 78 2 05 H 2 80 3 00 J 0 013 0 10 K 0 903 1 10 L 0 45 0 61 M 0 085 0 180 0 8 All Dimensions in mm Characteristic Symbol BSS123 Units Drain Source Voltage Vpss 100 V Drain Gate Voltage Ras lt 20 100 V Gate Source Voltage Continuous Vass 20 V Drain Current Note 1 Continuous Ip 170 mA Pulsed 680 Total Power Dissipation Note 1 Pa 300 mW Thermal Resistance Junction to Ambient Note 1 Rosa 417 C W Operating and Storage Temperature Range TsrG 55 to 150 C Note 1 Part mounted on FR 4 board with recommended pad layout which can be found on our website at http www diodes com datasheets ap02001 pdf
44. N N N A N C R65 R56 R67 R80 R81 R68 R77 R91 R92 R93 R96 R97 U2 U1 U3 U4 Designator Description CNI C17 C19 C63 C72 C62 C71 C58 2402 0912 7105 2402 0913 9105 2402 0918 2005 2402 0916 8305 2402 0913 3305 2413 0622 4213 1000 8170 5501 1002 1340 0738 1000 0610 6138 Part number 3100 4030 0200 2103 5220 0140 2342 3106 6000 2342 4105 5000 2310 0310 1015 C10 C11 C12 C24 C30 C38 C40 C45 C55 C64 C74 2310 0610 1015 C3 C6 C9 C13 C31 C34 C41 C73 C43 C44 C48 C1 C2 C4 C5 C14 C15 C16 C18 C22 C25 C27 C29 2340 0310 1015 2340 0410 1015 2103 5101 0140 2103 5104 0140 C32 C35 C37 C51 C57 C65 C68 C69 C75 C77 C81 C82 C49 C52 C53 C56 C42 C46 C47 C7 C8 C36 C39 C20 C23 C21 C26 C28 C33 C50 C54 2 4 D5 D6 D7 FB1 FB2 FB3 FB4 FB5 FB6 FB7 15 16 18 19 J14 J11J13 J12 IC2 K1 K4 Q2 Q7 Q8 Q9 Q18 Q19 131 2311 0310 1025 2311 0310 1015 2203 2221 0244 2321 0410 1015 2321 0410 1015 2341 0510 3015 1310 0030 0401 1340 0161 0100 1361 3000 0806 1852 0120 9100 3107 0404 6602 3102 0926 6802 3107 0412 6662 3102 0928 6802 3106 0506 0802 3100 4040 0200 3100 5050 0200 3100 4060 0200 3100 4070 0200 2910 2191 0200 1007 8050 7027 1001 1085 0800 4712 0000 2700 1110 0310 6000 1110 0320 6000 1111 0350 1101 32 ON e N o 2 Ni HK990 PART LIST P N
45. O O OUTPUT GENERAL DESCRIPTION NJ U 7 31 3 ANALOG FUNCTION SWITCH PACKAGE OUTLINE The NJU7313A is dual 4 channel and quad 2 channel analog function switch especially suitable for input selector of audio equipments The high break down voltage analog switch controlled by 14 bit serial data based on logic operating voltage 5V can ON and OFF of 15V signal The analog switch is realized superior linearity of on resistance in all voltage range wide dynamic range low distortion and Furthermore the both of single and dual power supply application provides easy designing W FEATURES Analog switch dual 3 channel and quad 2 channel High Break Down Voltage Low Distortion THD 0 002 Superior Linearity of ON Resistance Serial Data Control Package Outline SDIP 28 DMP 30 C NOS Technology BLOCK DIAGRAM 15V typ NJUT313AL NJU7313AM PIN CONFIGURATION L1 gt lt po R1 Ver N 30 23 Vn L1 L2 QR2 L2 C3 28 EI R2 L3 44 27 F3 R3 L3 I pdt R3 L4 4 L COMI cs 25 3 R COMI gt lt L5 2 47 ad L COM 1 N L COM2 49 22 R COM2 o R COM 1 L7 21 R7 L8 H 11 R8 L5 RS L COM3 12 19 23 R COM3 NC NC L6 ORG ST Ci 17 DATA Vss 15 16 CK NJUT313AM 6 23 ANALOG DEVICES Dual Bipolar JFET Audio Operational Amplifier 0P275 PIN CONNECTIONS 8 Lead
46. P Product Enhancement tested 80 dB ripple rejection Output is short circuit protected Typical Applications 1 2V 25V Adjustable Regulator 1 117 Vin gt 28V DS009063 1 Full output current not available at high input output voltages Needed if device is more than 6 inches from filter capacitors TOptional improves transient response Output capacitors in the range of 1 uF to 1000 pF of aluminum or tantalum electrolytic are commonly used to provide improved output impedance and rejection of transients R2 TtVour 1 25V 1 lapJ R2 LM117 Series Packages Part Number Design Suffix Package Load Current K TO 3 1 5A H TO 39 0 5A T TO 220 1 5A E LCC 0 5A S TO 263 1 5A EMP SOT 223 1A MDT TO 252 0 5A SOT 223 vs D Pak TO 252 Packages ind nnn 507 223 70 252 DS009063 54 Scale 1 1 1999 National Semiconductor Corporation DS009063 www national com 1 18 ejqeisn py ZLeW1 VZLEWT LLLIWT L7805CV ABSOLUTE MAXIMUM RATINGS Vi DC Input Voltage for Vo 5to 18V 35 V for Vo 20 24V 40 V imited Output Current Internally limited Power Dissipation Internally limite Top Operating Junction Temperature Range for L7800 55 to 150 for L7800C 0 to 150 Storage Temperature Range 65 to 150 THERMAL DATA Rthj case Ther
47. PUSHBUTTON GPIO BUTTON 3 3V 3 3V FB1 FB0805 C41 FB2 0805 C73 a 4TuF 25V C68 100nF 4TuF 25V 4 100 50 017 PIC18F66J10 VDD MCLR AVDD RAO ANO RAI ANI RA2 AN2 Vref RA3 AN3 Vreft RA4 TOCKI RAS AN4 VDDCORE VCAP RBO INTO FLTO RB2 INT2 RB3 INT3 RB4 KBIO 5 RB6 KBD PGC RB7 KBI3 PGD RCO T1OSO T13CKI RCI TIOSI ECCP2 P2A RC2 ECCP1 P1A RC3 SCK1 SCL1 RCA SDII SDA1 RCS SDOI RC6 TXI CK1 RC7 RX1 DT1 OSC1 CLKI OSC2 CLKO ENVREG VDD VDD RDO PSPO RDI PSP1 RD2 PSP2 RD3 PSP3 RD4 PSP4 SDO2 RDS5 PSP5 SDI2 SDA2 RD6 PSP6 SCK2 SCL2 RD7 PSP7 SS2 REO RD P3D REL WR P2C RE2 CS P2B RE3 P3C RE4 P3B RES PIC RE6 P1B RE7 ECCP2 P2A RGO ECCP3 P3A RGI TX2 CK2 RG2 RX2 DT2 RG3 CCP4 P3D RG4 CCP5 P1D RF1 AN6 C20UT RE2 AN7 C1OUT RF3 AN8 RF4 AN9 RES ANIQ CVREF RFG ANIL RF7 SSI CS ADI955 18 gt CS ADI955 2 gt CS WMS87408 gt SDO SCK CS gt RELAY MC MM4 RELAY MIC PREOUT RELAY DIRECT ANALOG 015 ULN2003AD 5VSTBY A K4C ij JRC 27F 005 M 555 RL_MIC T6 PREOUT RELAY JRC 27F 005 M 555 K3C JRC 27F 005 M 555 RL DIRECT HEADPHONE_MICRO gt TO IR PCB 3P 2 0 MUTE_LISTEN gt SPEAKER gt SPEAKER B TRIG 5VSTBY 99 284103
48. RDATA 5 AD1955 CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the WARNING lt AD1955 features proprietary ESD protection circuitry permanent damage may occur on devices Sept ESD subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality SENSITIVE DEVICE REV 0 Advanced AMS1117 Monolithic IA LOW DROPOUT VOLTAGE REGULATOR Systems FEATURES APPLICATIONS e Three Terminal Adjustable or Fixed Voltages e High Efficiency Linear Regulators 1 5V 1 8V 2 5V 2 85V 3 3V and 5 0V Post Regulators for Switching Supplies e Output Current of 1A e 5V to 3 3V Linear Regulator Operates Down to 1V Dropout e Battery Chargers Line Regulation 0 2 Max 9 Active SCSI Terminators Load Regulation 0 4 Max e Power Management for Notebook e SOT 223 TO 252 and SO 8 package available e Battery Powered Instrumentation GENERAL DESCRIPTION The AMS1117 series of adjustable and fixed voltage regulators are designed to provide output current and to operate down to 1V input to output differential The dropout voltage of the device is guaranteed maximum 1 3V at maximum output current decreasing at lower load currents On chip trimming adjusts the reference volt
49. RX1 3 CSN CCLK CDTI MCLK2 7 These pins should be connected to DVSS OLRCKA ILRCKA BICKA SDTIA1 3 LRCKB BICKB SDTIB MS0427 E 01 2005 11 66 F ws sss CIRRUS LOGIC Leading fhe Digital Entertainment Revolution 0955561 114 dB 192 kHz Multi Bit Audio AID Converter Features e Advanced Multi bit Delta sigma Architecture e 24 bit Conversion 114 dB Dynamic Range 105 dB THD N S ystem Sampling Rates up to 192 kHz 135 mW Power Consumption High pass Filter and DC Offset Calibration S upports Logic Levels Between 5 and 2 5 V e Differential Analog Architecture e Overflow Detection e Pin compatible with the 55381 VQ REFGND OVFL General Description The CS5361 is a complete analog to digital converter for digital audio systems It performs sampling analog to digital conversion and anti alias filtering The CS5361 generates 24 bit values for both left and right inputs in serial form at sample rates up to 192 kHz per channel The CS5361 uses a 5th order multi bit delta sigma modulator followed by digital filtering and decimation This removes the need for an external anti alias filter The ADC uses a differential architecture which provides excellent noise rejection The CS5361 is idealfor audio systems requiring wide dy namic range negligible distortion and low noise These applications include A V receivers DVD R CD R digital mixing consoles and effect
50. Revision No History Draft Date Remark First Version Release 1 0 1 Changed tOH 2 0 gt 2 5 Nov 2004 tCK 7 amp 7 5 CL3 Product 1 Changed Input High Low Voltage Page 08 2 Changed DC characteristics Page 09 IDD2NS 18mA gt 15mA 1DD5 210 195 180mA gt 170 160 150mA D ec 2004 Speed 200 166 143 133MHz Changed Clock High Low pulse width Time Page 11 Changed Time 11 Changed Time 12 1 1 Corrected Revision No 2 0 1 1 Deleted Remark at Revision History Corrected AC OPERATING CONDITION 12 CL 50 gt 30pF Dec 2004 4 Changed DC OPERATING CONDITION VIH VDDQ 2 0 gt VDDQ 0 3 and Typ 3 3 gt 3 0 VIL MIN VSSQ 2 0 gt 0 3 Q Ne Un amp w 1 3 1 Modified note for Super Low Power in ORDERING INFORMATION Jan 2005 1 4 1 Corrected PIN ASSIGNMENT A12 to NC Jan 2005 1 5 1 Corrected comments for overshoot and undershoot Feb 2005 This document is a general product description and is subject to change without notice Hynix does not assume any responsibility for use of circuits described No patent licenses are implied Rev 1 5 Feb 2005 31 a Synchronous DRAM Memory 64Mbit 4Mx16bit hyuix HY57V641620E L S T P xl Series DESCRI PTI ON The Hynix HY57V641620E L S T P series is a 67 108 864bit CMOS Synchronous DRAM ideally suited for the memory applications w
51. TIP32C TO 220 1 Base 2 Collector 3 Emitter Absolute Maximum Ratings 1 25 C unless otherwise noted Symbol Parameter Value Units Collector Base Voltage TIP31 40 V TIP31A 60 V TIP31B 80 V TIP31C 100 V VcEO Collector Emitter Voltage TIP31 40 V TIP31A 60 V TIP31B 80 V TIP31C 100 V VEBO Emitter Base Voltage 5 V lc Collector Current DC 3 A lcp Collector Current Pulse 5 A lg Base Current 1 A Pc Collector Dissipation 25 40 Collector Dissipation T 25 C 2 Tj Junction Temperature 150 C Storage Temperature 65 150 C 2008 Fairchild Semiconductor Corporation www fairchildsemi com TIP31 TIP31A TIP31B TIP31C Rev A 23 JojsisueJ 4 OLEdIL GLEdIL IVLEdIL LEdIL ire S FAIRCHILD ESS SS SEMICONDUCTOR July 2008 PNP Epitaxial Silicon Transistor Features Complementary to TIP31 TIP31A TIP31B TIP31C TO 220 1 Base 2 Collector 3 Emitter Absolute Maximum Ratings 25 unless otherwise noted Symbol Parameter Value Units Collector Base Voltage TIP32 40 V TIP32A 60 V TIP32B 80 V TIP32C 100 V VcEO Collector Emitter Voltage TIP32 40 V TIP32A 60 V TIP32B 80 V TIP32C 100 V VEBO Emitter Base Voltage 5 V lc Collector Current DC 3 A lcp Collector Current Pulse 5 A lg Base Current 3 A Pc Collector Dissipation 25 40 Col
52. TSSOP16 PHILIPS SRC4392IPFBT TQFP48 ICS XWMS740EDS SSOP28 Wolfson 2 16P2 54 2 Twin Row Socket 180 Designator Description Part number C55 2103 5479 0140 C53 C54 2103 5100 0140 C1 C35 C66 C86 2103 5106 0140 C76 C93 2103 5221 0140 C70 C81 C87 C99 2217 3221 0243 CIO C11 2103 5330 0140 C71 C82 C88 C100 C14 C15 C25 C26 2217 3332 0243 C115 C116 C117 C118 2103 6104 1645 C2 C5 C8 C18 C19 C21 C22 C23 C24 C28 2103 5104 0140 C29 C32 C33 C34 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C49 C51 C56 C57 C59 C61 C62 C65 C67 C69 C72 C73 C74 C75 C79 C80 C83 C84 C89 C90 C9 C92 C95 C97 C98 C101 C102 2217 3102 0243 C105 C112 C113 C114 C78 C96 2207 4105 0100 C77 C94 2340 0310 0009 C64 C68 C85 C103 C104 C106 2340 0310 1015 C107 C4 C7 C9 C12 C13 C16 C27 C30 C31 C48 C50 C58 C60 C63 C108 109 C110 C111 C119 C120 2340 0410 1015 2 FB3 FB4 5 6 1852 0120 9100 FB7 FB8 9 FB10 12 2910 2322 2141 291042112131 1317 2801 1335 1203 15 3102 1008 4802 J6 3102 1028 4802 14 2807 0345 0000 111213 1882 2019 0101 Q5 Q6 Q7 Q8 11110350 1101 Q4 1180 1230 1011 Q1Q2 1150 3430 0341 Q3 1310 8008 5502 U13 1083 9052 0615 0102 1341 1621 0100 DI 1301 4148 1500 U3 1031 2068 1300 017 022 1000 2750 0413 0161021 1002 1340 0738 020 1009 5540 4915 09 1004 3920 0726 U12 1008 7400 6714 U18 3102 1016 5802 127 74 4052 S016 PHILIPS 741 125 TSSOP14 ST 74LCX139TTR TSSOP 16 AD1955ARS SSOP28 Analog Device
53. channel e Input data word 16 to 24 bit e Hardware or SPI compatible serial port control modes The internal digital filter has two selectable roll off e Hardware mode mute de emphasis audio format characteristics A sharp or slow roll off can be selected control dependent on application requirements Additionally the Serial mode mute de emphasis attenuation 256 internal digital filter can be by passed and the WM8740 steps phase reversal used with an external digital filter e Fully differential voltage outputs The WM8740 supports two connection schemes for audio DAC control The SPl compatible serial control port APPLICATIONS provides access to a wide range of features including on e CD DVD audio chip mute attenuation and phase reversal A hardware Home theatre systems controllable interface is also available Professional audio systems BLOCK DIAGRAM MODE ML I2S MC DM1 MD DMO DIFFHW MUTEB CSBIWO ZERO MODE8X AGNDR AVDDR 1 4 10 9 O O O O 27 WM8740 11 VMIDR SCLK 5 12 VOUTRP O 13 VOUTRN BCKIN 3 SERIAL DIGITAL LRCIN 1 INTERFACE FILTERS SIGMA 17 VOUTLP DELTA DIN 2 MODULATOR 16 VOUTLN 18 VMIDL O mE 15 8 20 19 14 7 AVDD DVDD AVDDL AGNDL AGND WOLFSON MICROELECTRONICS LTD Advanced Information data sheets contain Lutton Court Bernard Terrace Edinburgh EH8 9NX UK preliminary data on new products in the Te
54. compensation making them virtually blowout proof against overloads The LM137 LM337 serve a wide variety of applications in cluding local on card regulation programmable output volt age regulation or precision current regulation The LM137 LM337 are ideal complements to the LM117 LM317 adjustable positive regulators Features m Output voltage adjustable from 1 2V to 37V m 1 5A output current guaranteed 55 C to 150 C m Line regulation typically 0 01 V Load regulation typically 0 3 Excellent thermal regulation 0 002 W 77 dB ripple rejection Excellent rejection of thermal transients 50 ppm C temperature coefficient Temperature independent current limit Internal thermal overload protection P Product Enhancement tested Standard 3 lead transistor package Output is short circuit protected LM137 Series Packages and Power Capability Rated Design Device Package Power Load Dissipation Current 1 5A 0 5A 1 5A LM137 337 TO 3 K TO 39 H 20W 2W 15W TO 220 T LM337 SOT 223 2W 1A MP Typical Applications Adjustable Negative Voltage Regulator LM137 VIN LM337 Vour 00906701 Full output current not available at high input output voltages R2 Vout 125V 1 lapy X R2 QUT AD 1 pF solid tantalum or 10 aluminum electrolytic required for stability C2 1 pF solid tantalum is required only if regulator is more than 4 from power su
55. filter capacitors in which case an input bypass is needed An optional output capacitor can be added to improve transient response The adjustment terminal can be bypassed to achieve very high ripple rejection ratios which are difficult to achieve with stan dard 3 terminal regulators Besides replacing fixed regulators the LM117 is useful in a wide variety of other applications Since the regulator is floating and sees only the input to output differential volt age supplies of several hundred volts can be regulated as long as the maximum input to output differential is not ex ceeded i e avoid short circuiting the output Also it makes an especially simple adjustable switching regulator a programmable output regulator or by connecting a fixed resistor between the adjustment pin and output the LM117 can be used as a precision current regulator Sup plies with electronic shutdown can be achieved by clamping the adjustment terminal to ground which programs the out put to 1 2V where most loads draw little current For applications requiring greater output current see LM150 series 3A and LM138 series 5A data sheets For the negative complement see LM137 series data sheet Features Guaranteed 1 output voltage tolerance LM317A Guaranteed max 0 01 V line regulation LM317A Guaranteed max 0 3 load regulation LM117 Guaranteed 1 5A output current Adjustable output down to 1 2V Current limit constant with temperature
56. g g J e 39R Q7 2 EA 2 2 a 1 Q28 Q26 1 Q9 MJ E15033 a a a a m 25 1312 25 1312 2564793 5 5 z 2 m 5 a D10 mw 1 Q35 m m DLa148 V ed 25C3324 Q27 4 D13 1 Q6 Ww Ww Ww i ace 2521312 J W 74148 25 1837 Q34 Q29 1 Q25 Q2 Qi Q3 4 Q5 2563324 2SA1312 D243 lt MJ L1302A MJ L1302A NJ L1302D MJL1302A c MjL1302A lt em stil R44 m b Dii Ak i 214148 7 2 1 R74 R75 1 Q24 1 8 25 1312 FB1 t Y t ka BDS 3S5 D7 16v m BAS20 T 7 c27 iev Tev 3 9 5 R46 R45 DL4148 R43 3K 3K 150R 1 4W 1 c2 ci c6 22 1 47nF 100 47nF 100v 4 4 4 4 4 80V 10K 1 4 1 R2 4 150R 3W R56 SUN 2SA1255 amp 25C3138 SOT 23 270R 1 C24 2SA1312 amp 25C3324 SOT 23 47nF ca 2504935 amp 2SA1869 TO 220 R31 N 4 25 4793 62541837 TO 220 OP E MJ D243 amp MJ D253 DPACK 2 M 6 7 038 MJ E15032 amp MJ 15033 TO 220 OPA2134UA R32 OPA2134UA NIM lt NJ L3281D amp NJ L1302D TO 264 L M MJ L3281A amp MJ L1302A TO 264 gt gt OUTPUT
57. gt CSNL MCKOL SDTIA1 a a Dvss SDTIA2 SDTIA3 SDTIBL B Compatibility with AK4588 DAC ADC Asynchronous operation NOT Available Available DAC ch 8ch 4ch HP Amp 2ch ADC Input selector 6 1 MS0427 E 01 2005 11 64 ASAHI KASEI AK4683 PIN FUNCTION Pin Name PLL Power supply Pin 4 5V 5 5V Receiver Channel 0 Pin Internal biased pin Internally biased at PVDD 2 Control Mode Select Pin L 4 wire Serial H PC Bus Receiver Channel 1 Pin Receiver Channel 2 Pin Receiver Channel 3 Pin 9 Interrupt Pin VOUT V bit Output Pin for Receiver Input Zero Input Detect Pin DZF When the input data of DAC follow total 8192 LRCK cycles with 0 input data this pin goes to H And when RSTNI bit is 0 PWDA bit is 0 this pin goes to H OVF Analog Input Overflow Detect Pin This pin goes to H if the analog input of Lch or Rch overflows 10 CDTO O Control Data Output Pin in Serial Mode and I2C pin L LRCKB I O Channel Clock B Pin 11 BICKB Audio Serial Data Clock B Pin 12 1 SDTOB O Audio Serial Data Output B Pin OLRCKA I O Output Channel Clock A Pin 3 14 ILRCKA Input Channel Clock A Pin BICKA I O Audio Serial Data Clock A Pin SDTOA O Audio Serial Data Output A Pin 17 MCKO O Master Clock Output Pin 18 Output Buffer Power Supply Pin 2 7V 5
58. operate down to 1V input to output differential The dropout voltage of the device is guaranteed maximum 1 5V at maximum output current decreasing at lower load currents On chip trimming adjusts the reference voltage to 1 Current limit is also trimmed minimizing the stress under overload conditions on both the regulator and power source circuitry The AMS1085 devices are pin compatible with older three terminal regulators and are offered in 3 lead TO 220 package 3 and 2 lead TO 263 Plastic DD and TO 252 D PAK package 1085 LOW DROPOUT VOLTAGE REGULATOR APPLICATIONS High Efficiency Linear Regulators Post Regulators for Switching Supplies e Microprocessor Supply e Battery Chargers e Constant Current Regulators Notebook Personal Computer Supplies e Portable Instrumentation ORDERING INFORMATION PACKAGE TYPE OPERATING JUNCTION 3 LEAD 220 2 amp 3 LEAD TO 263 TO 252 TEMPERATURE RANGE AMS1085CT AMS1085CM AMS1085CD 0 to 125 C AMS1085CT 1 5 AMS1085CM 1 5 AMS1085CD 1 5 0 to 125 C AMS1085CT 2 5 AMS1085CM 2 5 AMS1085CD 2 5 0 to 125 C 51085 2 85 51085 2 85 AMS1085CD 2 85 0 to 125 C AMS1085CT 3 0 AMS1085CM 3 0 AMS1085CD 3 0 0 to 125 C AMS1085CT 3 3 AMS1085CM 3 3 AMS1085CD 3 3 0 to 125 C AMS1085CT 3 5 AMS1085CM 3 5 AMS1085CD 3 5 0 to 125 C AMS1085CT 5 0 AMS1085CM 5 0 AMS1085CD 5 0 0 to 125 C TO 252 FRONT VIEW PI
59. pins 22 Quiescent Voltage Output Filter connection for the internal quiescent reference voltage REF GND 23 Reference Ground nput Ground reference for the internal sampling circuits FILT 24 Positive Voltage Reference Output Positive reference voltage for the internal sampling circuits DS467F2 68 NJM2068 LOW NOISE DUAL OPERATIONAL AMPLIFIER m GENERAL DESCRIPTION PACKAGE OUTLINE The NJM2068 is a high performance low noise dual operational amplifier This amplifier features popular pin out superior noise performance and superior total harmonic distortion This amplifier also features guaranteed noise performance with substantially higher gain bandwidth product and slew rate which far exceeds that of the 4558 type amplifier specially designed low noise input transistors allow the NJM2068 to be used in very low noise signal processing NJM20880 NJM2068M applications such as audio preamplifiers and servo error amplifier m FEATURES lt Operating Voltage 4 18V 4 Low Total Harmonic Distortion 0 00196 typ NJM2068V NJM2088L Low Noise Voltage 0 56 LV typ e High Slew Rate 6V us typ Unity Gain Bandwidth 27MHz f 10kHz Package Outline DIP8 DMP8 SIP8 SSOP8 Bipolar Technology PIN CONFIGURATION PIN FUNCITON 1 A OUTPUT 2 A INPUT 3 A INPUT 4 V 5 B INPUT 6 B INPUT 7 B OUTPUT NJM2068L 8 V NJM2068D NJM
60. power supply and processor to stabilize PIN ASSIGNMENT BOTTOM VIEW TO 92 PACKAGE See Mech Drawings Section On Website 1 2 TOP VIEW SOT 23 PACKAGE See Mech Drawings Section On Website PIN DESCRIPTION TO 92 1 RST 2 Vec 3 GND SOT 23 1 RST 2 Vec 3 GND Active Low Reset Output Power Supply Ground Active Low Reset Output Power Supply Ground The DS1818 also monitors a pushbutton on the reset output If the reset line is pulled low a reset is generated upon release and the 051818 output will be held in reset output low for typically 150 ms 44 041002 NC7WZ07 March 1999 Revised February 2005 TinyLogic UHS Dual Buffer Open Drain Outputs General Description The NC7WZ07 is dual buffer with open drain outputs from Fairchild s Ultra High Speed Series of TinyLogic in the space saving SC70 6 lead package The device is fab ricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad operating range The device is specified to operate over the 1 65V to 5 5V range The inputs and outputs are high imped ance when is OV Inputs tolerate voltages up to 7V independent of Vcc operating voltage Features W Space saving SC70 6 lead package W Ultra small MicroPak Pb Free leadless package Ultra High Spe
61. 0123 1402 0705 0006 4 1 22001 8 5 R122ECA D1 19 5F 24 W HK990 PART LIST Analog P N 0099 15 10 0000 Used 14 OV N N N N N N N N Part Type 47uF 16V DIP 100uF 16V DIP 1uF 25V DIP 47uF 25V DIP 330pF 50V C 0805 2 2uF 50V DIP MKS2 10uF 50V DIP 220pF 100V DIP 1000pF 100V DIP 3300pF 100V DIP 0 11 50 0805 100 5 0805 100 50 0805 1000pF 50V NPO C 0805 150 50 0805 0 01uF 50V C 0805 1uF 50V C 0805 2 2uF 50V C 0805 680pF 50V NPO C 0805 9P 2 0 JACK 4 2 0 JACK BAS16 SOT23 OR R 0805 1 1 0805 1 0805 1 78 1 0805 2 4 0805 LD1117S5 0 SOT 223 NJU7313AM SDMP30 JRC AV4 8 4 13 EC RCA JACK AV6 8 4 13 EC RCA JACK 2x4P2 0 90 JACK 2x13P2 0 90 JACK R17 R18 R63 R64 Designator Description 2401 0222 2111 4401 2211 9524 Part number C24 C26 C27 C38 C53 C108 C109 C110 C111 C11 2340 0310 1015 C113 C114 C115 C116 C117 C4 C11 C41 C44 C45 C100 C120 C121 C42 C56 C64 C96 C21 C36 C82 C91 2311 0310 1015 2319 0410 1015 2340 0410 1015 C72 C73 C74 77 C78 679 C80 C84 C85 C86 2103 5330 0140 C87 C88 C89 C13 C98 C1 C8 C25 C104 C105 C106 C107 C14 C28 C22 C37 C52 C59 C102 C103 C118 C119 2207 4224 0100 2310 0610 1015 2217 3221 0243 2217 3102 0243 2217 3332 0243 C2 C7 C9 C15 C16 C17 C19 C20 C23 C29 C31 C322103 5104 0140 C33 C34 C40 C43 C49 C50 C57 C
62. 0222 Z 5 Z 5 corr c gt z 02 22 gt n LL LL O NC No internal connection symbols 71 072 each amplifier OFFSET N1 074 each amplifier IN IN OUT OUT OFFSET 2 EXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 78 6L 2SA1298 PNP 2SA1312 PNP DTC343TK NPN 28C3324 NPN 28C3265 NPN 2SC1035 NPN 1 Emitter 2 Base U U 3 Collector 2 1 3 Pin Regulaeor IC LD1117S5 0 GND VOUT VIN SOT 223 mO tl nan O 55 XS T Mer 80 NC Le eee oon o m Lue 9 CO Oo 6 9000 O O 0 0 0 0 o ee 9 o Z po lt 0000000000000 5555262 SKK xxx COU OOO 2 5 0000 1211 6600 N d QN ZN 05 01 80 SGT 991 066 PA VI E 22 3 CZ NI Bw m0 ecc m pu harman kardon HK990 Power board 6 O O oo n 9 E NI EN EE la E E S 5 iei A __ eie O Is le e iug
63. 05 100R R 0805 NJM5532M DMP8 JRC Designator Description C2 C3 CA C13 C14 C6 C7 C9 C10 C5 C8 C11 C12 CNI JR1 JR2 R1 R2 R6 R7 R3 R4 R5 R8 U1 U2 PLUG TO PLUG 2547 28X4C amp 2468 26X3C 2 0 Lz120mm 2 5GND1346 139 2402 0911 0305 2401 2210 0500 2402 0912 2005 2401 2239 3500 2401 2239 0500 2402 0914 7005 2401 2247 0500 2401 2282 3500 2401 2210 4500 2401 2210 1500 2401 2212 4500 2402 0911 2005 2401 2222 1500 2401 2230 1500 2402 0913 3105 2401 2233 1500 2401 2247 4500 2402 0914 7005 2402 0915 6005 1061 0672 1801 3604 6043 5032 Part number 2103 5104 0140 2103 5330 0140 2340 0310 1015 3100 4090 0200 2990 3330 0320 2401 8247 3400 2401 8210 1400 1031 5532 1300 3309 0504 0574
64. 0530366 Rev 3 2 10 BSS123 www diodes com Integrated ICS83905 1 Low Skew 1 6 CRYSTAL INTERFACE TO LVCMOS LVTTL Fanout GENERAL DEscRIPTION FEATURES L The ICS83905 is a low skew 1 to 6 6LVCMOS LVTTL outputs Fanout Buffer and a member of the E HiPerClockS family of High Performance Clock Solutions from ICS The ICS83905 single ended Output frequency range 10MHz to 50MHz clock input accepts LVCMOS or LVTTL input lev Crystal input frequency range 10MHz to 50MHz els The low impedance LVCMOS LVTTL outputs are designed to drive 500 series or parallel terminated transmission lines The effective fanout can be increased from 6 to 12 by utilizing 5V tolerant enable inputs the ability of the outputs to drive two series terminated lines Crystal oscillator interface Output skew 10ps typical e Synchronous output enables The ICS83905 is characterized at full 3 3V 2 5V and 1 8V e Operating supply modes Full 3 3V 2 5V and 1 8V mixed 3 3V 2 5V 3 3V 1 8V and 2 5V 1 8V output operating mixed 3 3Vcore 2 5V or1 8V operating supply and supply mode Guaranteed output and part to part skew char mixed 2 5V core 1 8V operating supply acteristics along with the 1 8V output capabilities makes the ICS83905 ideal for high performance single ended applica tions that also require a limited output voltage 0 C to 70 C ambient operating temperature L
65. 08 2401 5225 6900 2412 1025 0910 2412 1021 0910 2413 0723 0310 2413 0426 2211 2402 0911 0305 2410 0622 2815 2402 0911 0205 2402 0912 2205 2402 0911 0505 2402 0911 0005 2402 0914 3205 2402 0911 8205 2402 0311 5111 2401 0823 0204 2401 2239 0500 2402 0311 2311 2402 0911 8105 2402 0913 3105 2402 0913 0105 4402 3324 2000 2402 0916 2205 2402 0311 0011 270R 1206 390R 1206 82R 1206 68K 1206 33K 1206 2K4 2W PC817A OPA2134UA TLO61CD N N O e t N Preamp PART LIST P N 0099 1290 0000 Used 3P 2 0mm Socket 2200PF 50V 5 X7R 0805 MLCC 4700uF 16V 420 E CAP 4700uF 25V 420 E CAP 10UF 16V 20 E CAP 10UF 50V 20 E CAP 47uF 16Vx2096 E CAP 474 25 20 E CAP 100PF 50V 5 X7R 0805 MLCC 0 1uF 50V 5 X7R 0805 MLCC 915 NY N 100uF 16V For audio 20 E CAP 100UF 16V 20 E CAP 220PF 100V 5 Mylar CaP 220uF 10V 20 E CAP 220uE 25V 20 E CAP 470uF 35 V 20 E CAP 30BQ040TRPbF SMC IRF BAS16 SOT23 GBU806 Rrectifying Diode FB 0805 1210 TB20129Z601 EMI 100MHz 600R 2 4P2 0 180 Twin Row Socket 2 13P2 0 180 Twin Row Socket 2 12P2 0 180 Twin Row Socket 2 14P2 0 180 Twin Row Socket 6P 2 5mm 180 Single Row pin 4P 2 0mm Socket 5P 2 5mm Socket 6P 2 0mm Socket 7P 2 0mm Socket AV2 8 4 14 EC L7805CV 220 1085 TO 220 JRC 27F 005 M 555 TIP31C TO 220 FAIRCHILD TIP32C TO 220 FAIRCHILD 2SA1035R SC 59 Panasonic A e e Q Lm N e 9 N N
66. 0823 0204 2401 8210 3400 2401 8210 0400 2401 8222 3400 2401 0824 0204 2401 8227 0400 R16 R17 R31 R32 R39 R40 R43 R44 R46 R48 R49 2401 8247 3400 R52 R53 R83 R92 R101 R117 R1 R2 R23 R26 R36 R55 R56 R57 R58 R59 R64 R65 R70 R72 R73 R74 R75 R76 R77 R20 R22 R12 R27 R35 R28 R29 R96 R121 R10 R88 R111 R85 R95 R103 R120 T1 T2 T3 T4 Y2 Designator Description CN12 C38 C40 C41 C31 C9 CIO C2 C3 C5 C35 C36 C42 C32 C29 C30 C7 C4 128 2401 8247 0400 2401 8275 0400 2401 8210 1400 2401 8215 1400 2401 8230 1400 2401 8233 1400 2401 8247 1400 2401 8256 1400 2401 8268 1400 2410 0901 0205 1061 0672 1801 2105 2457 6026 Part number 2822 2200 0100 3100 4040 0200 3100 5050 0200 2310 0310 1015 2103 5470 0130 2311 0410 1015 2156 1040 0130 2103 5151 0130 2103 5331 0130 2103 5471 0130 2115 6473 0130 Se n N Q e 99 IN4148 NJM2068M SOIC8 JRC TPA6120A2 DWP 20 Texas Instrument 1 65K 1 0603 1K 5 0603 2 2K 5 0603 10 5 0603 106 5 0603 27K 5 0603 47K 5 0603 100R 2596 0603 100k 5 0603 200R 2596 0603 JRC 27F 012 M 555 28C2120Y TO 92 TOSHIBA HK990 PART LIST L amp R Power amplifier board PN 0099 1070 0000 Used eme NY NR Ne Wa P 12 10 4TnF 100V 220uF 100V 6800uF 80V 10nF 250V 1000uF 100V 1uF 1206 47nF 1206 270 5 1206 47nF Mylar 1046 3 9pF NPO 5 1206
67. 1 0 0 02001 Fairchild Semiconductor Corporation 57 cosmo High Reliability Photo Coupler K1010 1577 Fiia Ska E 169580 VOE 0884 10080 0605 File No 101347 Features Outside Dimension Unit mj 1 Current trangler ratio i i mE 50 al Irs5mA Vees5V 2 High isolation voltage between input and output iu Viso SOOO Vis 3 Gompact dual in lina packaga 4 peckage DIF SMO H Applications Registers copiars gutcmatic vending machines System appliances measuring instrumenta 3 Computer terminals programmable controllers 4 Communicabons belaphona esc 5 Electric home appliances such as fan heaters Microwave oven SChematic Top View Washer Refrigerator Alr conditioner etc TOLERANCS 07mm B Medical inairuments physical and chemical equipment 1 T Signal transmission between circuits of diferent potentials and 4 2 Cathode irpedanoes 9 3 3 Emitter 4 Collecinr Facsimile equipment Audio Video 8 Switching power supply Lager beam printer Absolute Maximum Ratings Wee 20 CTR rated wor SV so Risa a iV le 2mA Ru 100Ghm E Versa kam 58 19 4323 10 8 01 5V Powered Multichannel RS 232 General Description The MAX220 MAX249 family of line drivers receivers is intended for al
68. 103 5100 0150 2310 0310 1015 2310 0610 1015 2103 6221 1620 2217 2182 0200 2321 0310 1015 2321 0410 1015 2341 0310 3025 2103 5331 0150 2331 0410 1015 2217 2681 0243 1403 0100 0007 1300 0850 0101 1301 2555 0100 1043 0317 0861 1000 3370 4361 1000 2010 3160 3102 1024 4802 2910 4011 0510 2910 1321 1003 4712 0000 2700 1111 2980 0101 1111 3120 0172 1133 3240 0717 1133 2650 0141 1150 3430 0341 2401 0920 0005 2402 0911 5205 2402 0911 0205 2401 2210 2500 2401 2212 5500 2402 0912 7005 2401 2222 2500 2401 2224 2500 2401 2227 2500 2401 2239 2500 2402 0914 7105 2402 0916 8205 2402 0917 5005 6 10R1 R_1206 R7 R9 R11 R13 8 IOR R 1206 R21 R24 R26 R29 R54 R61 R62 R69 4 22RI9 R 1206 R6 R8 RIO R12 2 39K R 1206 R130 R131 4 39R R 1206 R134 R139 R140 R145 2 47 1 1206 R2R4 4 47R R 1206 R30 R31 R75 R82 2 82K R 1206 R57 R65 2 100K R 1206 R32 R156 1 100R R 1206 R14 2 120K R 1206 R58 R66 4 120 1 1206 R112 R114 R118 R120 2 220R R 1206 R34 R35 1 300 1206 R15 8 330 1 1206 R72 R73 77 R78 R79 R80 R84 R85 4 330R R 1206 R132 R133 R152 R153 2 470 1206 R115 R121 4 470 1 1206 R111 R113 R117 R119 4 560R1 R_1206 R20 R23 R25 R28 1 HR610675 Wideband RF transformer 1 4P PLUG TO PLUG1533 28X2C 2 0 L 350MM 2 4GND HK990 PART LIST Symmetric PCB P N 0099 1080 0000 Used Part Type 0 1uF 50V C_0805 330pF 50V C 0805 47uF 16V DIP 9P 2 0 JACK LX 1604HP 3 JACK 47 08
69. 2 733 z CERE E bind SN 25 B 255 4 5 vecenp H EXTAEN R 33 AIDE 55 Ess 3 5 je ke c10 gz gg gg e 258 EA I AMUTE1 55 EX 55 kk HE N AUF bur pur pur pur AUF 2263 e VERAS lt lt DVDD NC7WZ07 9 A ACLKX1 R3 33 zg W 88 EM RW 0 1UF AHCLKOUT R33 33 1 1 EM CS2 N 4 iB 4 4 8 ys RESET_N AFSX1 R3 4 33 VSS EM RAS N 414 5 EM CSUN Lt EM CS 0 EMBAT 507 4 77 DS vee vss 54 EM 015 SP0 sommo son 31529 11 1 4 x x 14 EM Dao 0015 14 Ed 1 TMS320DA708 2 3 NT PER BR AAS DVDD 001 l EN BI 215973 DQ2 DQ13 Dens 5 vssa vcca 38 4 E pis Ser 22 21 21 TTO 0912 4 _ 12 ROG 24 25 22 DSPSTRSTEN 2 Das amp por me 6 26 25 2 46 281 E oscvss Ww 4 EM_D10 SPD ENAIZCI SDA 30 25 27 59 OSCIN d 45 EMEDI E OSCOUT Das Das 2 52 31 b wr OSCVDD EM 54 D7 ssa ENDS 1 vss 44 007 2X16P PH2 54 PIN 180 PLLHV vss WE DOMO N 151 29 8 ceu us EM 18 021 gt 59 EM WE c F EM CAS N 17 Cas 4716 3 vss ENLAI EM RAS N 18 6 KTS EM CRE VSS EM_CSO_N 19 55 gt WS CVDD 77 EM 11
70. 2068M NJM2068V m EQUIVALENT CIRCUIT 1 2 Shown V INPUT INPUT OUTPUT 4 8 6 New Japan Radio Co Ltd 69 NJM3332 HIGH PERFORMANCE LOW NOISE DUAL OPERATIONAL AMPLIFIER m GENERAL DESCRIPTION PACKAGE OUTLINE The NJM5532 is a high performance dual low noise operational amplifier Compared to the standard dual operational amplifiers such as the NJM 1458 it shows better noise performance improved output drive capability and considerably higher small signal and power band widths This makes the device especially suitable for application in high quality and professional audio equipment instrumentation control Msn circuits and telephone channel amplifiers The op amp is internally compensated for gains equil to one If very low noise is of prime impor tance version be used which has guaranteed NJM5532DD it is recom D mended that the noise specifications f 1 m FEATURES m Operating Voltage 3V x 20V NJM5532L Small Signal Bandwidth 10MHz typ Output Drive Capability 6000 IOVrms typ Input Noise Voltage 5nV 4 Hz typ Power Bandwidth 140KHz typ Slew Rate 8V us typ Package Outline DIP8 8 SIP8 e Bipolar Technology PIN CONFIGURATION PIN FUNCTION 1 A OUTPUT 2 A INPUT 3 4 V 5 B INPUT 6 B INPUT 7 B OUTPUT 8 Vt 3155321 NJM5532M m EQUIVALENT CIRCUIT ve 1 2 Shown INPUT O INPUT
71. 20k Hz 2200 Signal to noise Ratio Reference rated power output A WTD Tuner CD 100 dB Phono MC 75 dB Input sensitivity Impedance Tuner CD 350 mV 43k Ohms Phono MM 10 mV 47k Ohms Phono MC 1 mV 100 Ohms Overload Tuner CD 2 8V Phono MM 85 mV Phono MC 8 5 mV Tone control range Bass 100 Hz Treble 10 kHz 10 dB 10 dB Power supply AC 230V 50 Hz Power consumption 1000 W Standby power consumption 1W Dimensions Width x Height x Depth 440 x 160 x 444 mm Depth includes Volume Button and Loudspeaker Terminals Weight 24 kg harman kardon H A Harman International Company 250 Crossways Park Drive Woodbury New York 11797 www harmankardon com Harman Consumer Group International 2 Route de Tours 72500 Ch teau du Loir France 2008 Harman Kardon Incorporated Part no 8509 9012 0000 Controls and Functions harman kardo Power Indicator This LED will illuminate in amber when the unit is in the Standby mode to signal that the unit is ready to be turned on When the unit is in operation the indicator will turn white System Power Control Press this button to turn on the HK 990 press it again to turn the unit off to Standby Entering Standby also saves all Setup parameters Speaker 1 2 Selectors Press to select Speaker pair 1 or 2 or both or neither head phone output only Record Out Selector First press shows the record source pres
72. 20uF 25V DIP 470uF 16V DIP 330pF 50V R 1206 330uF 25V DIP 680pF 100V DIP LED rouge 1206 BAS85 SOD80C PHILIPS BZV55 C12 12V SMD LM317EMP SOT223 LM337IMP SOT223 NJU201AM DMPI6 JRC 24P 12 x 2 x 2mm 90 JACK AV4 8 4 13 EC JACK AV 8 4 8 ES JACK JRC 27F1005 M 555 Relay 2SA1298 SOT23 Toshiba 2SA1312 SOT23 Toshiba 2SC3324 SOT23 Toshiba 2sc3265 SOT23 Toshiba DTC343TK SOT23 ROHM OR R_1206 1 5K1 R_1206 1K1 R_1206 1K R_1206 1M2 R_1206 2 7K1 R_1206 2K2 R_1206 2K4 R_1206 2K7 R_1206 3K9 R1206 4K7 1 R_1206 6 8K1 R_1206 7 5K1 R_1206 C51 C53 C54 C56 C65 C67 C68 C70 C58 C60 C48 C50 CNI C2 C37 C39 C40 C42 C30 C34 C61 C64 C6 C7 C10 C11 C52 C55 C66 C69 C88 C89 C38 C41 C57 C59 C5 C8 C9 C12 C15 C16 C17 C18 C90 C91 C76 C77 C23 C24 C25 C26 C31 C32 C43 C44 C45 C46 C71 C72 C73 C74 C47 C49 D1D2 D5 D6 D7 D8 D3 D4 D9 D10 IC2 IC3 ICI 1518 12 055 056 Q2 Q4 05 07031 032 035 036 039 040 043 044 047 049 052 054 057 059 Q1 Q3 06 Q8 033 034 037 038 Q41 042 045 046 048 050 051 053 058060 Q61 062 011 012 013 014 R138 R144 R38 R122 R125 R126 R129 R98 R104 R55 R56 R59 R60 R63 R64 R67 R68 R99 R105 R146 R151 R123 R124 R127 R128 R96 R97 R100 R101 R102 R103 R106 R107 R136 R142 R36 R37 R5 R22 R27 R16 R17 R18 R19 R33 R108 R109 R149 R74 R76 R81 R83 138 2103 5105 0150 2217 3182 0243 2217 3472 0243 3100 4040 0200 2103 5103 0150 2
73. 25 3324 t 330R196 330R196 AN 94 a N1210X226KCTxSR 5 4 R129 2SA1312 R10 R83 oR 1 2281 7 5 1 cai ave ie JRC 27F1005 M 555 34 R82 am gto D2 R3 10nF 6 10uF16V 47R gt LED rouge 10R196 al 4 519 i 6 8K1 EES Q38 Q37 R128 R144 R145 4 IN MC LO 2563324 2563324 1 2 398 R66 c32 c36 R4 R27 RES 120K 330pF i 1 c50 R131 R142 4781 1 So R68 R67 39K 2 2 R12 1K1 1K1 25 3324 2281 T 10 R105 R151 TESTPOINT 1 1 ii 4 4 N 10R1 N 1004 16 D PHONO 1 A 1 1 C49 PH R143 10uF16V R104 680P FM DNE c63 cn Q7 R63 R64 Ride 1 5K1 2 7nF Kk 25 1312 1K1 21 1K1 t E 8K1 c59 180pFM E hoonr NC R127 R141 R140 61 Q35 Q36 1M2 Sa DNE 39R 7 R18 R25 10uF 50V 2SA1312 2SA1312 then co 4K7 196 560R 1 470uF 16V 220uF 16V in R81 R126 S 2 T 7 5 1 OR R26 R79 R80 us 330R196 330R196 1 Q59 er R118 bo 25 1312 120R196 953 R116 2503324 NC Q44 2SA1312 2SA1312 1 945 25 2 1 R102 R103 2 7 1 2 7K1 R17 cao IC2 47081 10pF 317 H 4 it ISVA 15V IN T 3 2 220 F 16V R62 VIN VOUT doe lt R34 220R 1 12VAL ds coo 2 TP6 C89 C87 220uF 25V t amp TESTPOINT 0 R36 10uF 50V ceo c74 10uF 50V 330uF 25V gt 1uF 4 D10 R37 330uF 2
74. 40 22001 8W 15540 47001 8W X596 100Q1 8W 5 2 200 5W 45 RF11 4W 454 RF0 221 4W 45540 115 12 DC EI 28 Transformer EI 57Transformer Toroidal Transformer THERMISTANCE 02DSBJ WITH LEAD AND 2P2 5mm FAN A9225 125 DC12V 0 24 FUSE HOLDER FUSE COVER HK990 PART LIST P N 0099 1191 0000 Used Part Type 1 0 1uF 50V 410 4 LEDIL0445W31BOLG201 C26 C21 C22 C44 C46 C52 C47 C27 C28 C45 C23 C20 CN16 CN17 CNI8 CN19 CN7 CN8 CN9 CN10 CN6 D2 D1D3 DWI DW2 FHI 104 IC7 Q1 016 015 03014 012013 R12 R69 R73 R78 R83 R91 R74 R79 R72 R77 R71 R80 R10 R82 R84 R75 R76 R70 R81 R90 R14 R13 R11 RAYI TI T2 T3 T4 Designator Description C10 LED2 LED3 LED4 LEDS 135 2341 0410 1015 2115 6104 0123 2340 0610 1010 2311 0610 1015 2311 0710 1015 2210 3104 0600 2210 3103 0600 3100 5020 0200 3100 0702 0050 3100 4070 0200 3100 5070 0200 1311 1414 8000 1360 1400 1005 1300 5660 0200 1303 8002 0200 1601 0515 0120 1019 7805 0800 1132 1200 0162 1132 2350 6000 1132 4580 0172 1110 9500 0162 1132 0730 7000 1131 8150 0172 2401 0221 0211 2401 02212211 2401 02247211 2401 0221 0311 2401 02212311 2401 02215311 2401 02222311 2401 02222111 2401 02247111 2401 02210111 2406 4222 2900 2406 3210 9000 2406 0322 2815 4712 1211 5006 4070 1285 0000 4090 1575 0003 4090 1015 0001 1609 0282 0070 9105 2518 7242 1601 0001 0000 1608 0001 0000 Part number 2115 6104
75. 5 018 25 1035 019 25 1035 SUB MUTE OUT Q8 25 1035 Chassis screwed transformer 4 4 wi A RF0 22R 0 5W R41 lt D7 GBU806 L7805CV 102 JUU AMS1085CT 3 IN 2 4 7mF 16V RFO 22R 0 5W TO FUSE BOARD R42 RFO 22R 0 5W A D6 GBU806 e 4 7 25 cn C63 4 7mF 16V C82 R21 412R 196 C38 R22 10UF 50V 680 1 D2 100 30BQ040PbF 4 100 50 39 220uF 10V 5 220uF 25V C50 4700F 35V LowESR 10uF 50V Ca TERMINAL ERTH 4 C62 4 7mF 25V C54 470uF 35V LowESR C55 C57 Lour sov SN 100nF Q7 TIP32C C40 lOuF 50V 5 5 TERMINAL 033 220uF 25V D4 30BQ040PbF LM337T ADJ TII 104 DGND NC PGC PGD GND T3 3V RESET 6 2 5 TO FUSE BOARD 7 2 0 1 9 RELAY MCU 5V LED 5V 7 LED 5 TO MCU BOARD STBY 5V GPIO FAV 16 BT 151GINK MCU MCLR K no 04 1 1 2 6P 2 0 CN4 5V gt 9 TO LED amp VOL w DGNDDGND C9 104 102 121117533 VIN V OUT 8 C14 47U10 V DGND DGND 3 o 16 BT 151
76. 5 ANALOGIN_R PD n P 2 3 Ral RIN C28 KIA 2 15 RA jd J RC 27F 1005 M 555 Z20pFM R107 E 1008 T Zier M 68K 8 1K R138 1K R140 c74 4 4 t ROL To 100R NES I 4 IN R 223 cing m c31 SR cno 19 220R 5 1 R80 47uF16v 100nF 47uF16V R108 100nF Ces bas t t K2B 360R 1 100nF 220R R74 J RC 27F 1005 M 555 I eus L Y 1 332M O Gl pCDinL FT R J bCD im R P4 fac ne oe n RC 27F1005 M 555 47K1 7 R75 470K196 15 R106 5 47R1w HA R93 AV4 8 4 13 EC 220R 4 R3 R113 t T K3B 470K196 amas NC _ R100 J RC 27F 1005 M 555 100uF 16v 100nF LD111755 0 SOT 223 AV4 8 4 13 EC 220R R83 5 28 i ATO 13 2 VOUTD L p Tuer i L R25 9 t K3A 330R196 num oka PTwerin R J RC 27F1005 M 555 A wer eee 8 AT 47uF 25V t Y R98 R27 R38 e 220R 6 1K c34 1 VA 4 10K1 10K1 HH 100nF WIMA MKS 2 css c37 E ER K6B cia TE R39 1nFM 8 7 852 J 27 1005 555 2 2uF 50v R24 Pl 220R ass 27K1 10K1 ree 9 U3A 5532 WK NJ M5532M C120 M5532M 018 3308196 47uF 16V OH net Y pAuxinL 4 4 4 HE 4 Vices gt Aux in R el 3 O 100 in J RC 27F1005 M 555 L1 100R 4 br b R147 J3B 68K 8 4 greens
77. 5 5 gt 55955656 5 gt lt lt Qo Roo SS oz S lt lt lt Li x x r Z lt oE z lt lt lt 55 lt lt a 5 Note 1 The ECCP2 P2A placement depends on the setting of the CCP2MX configuration bit DS39663A page 2 Advance Information 52 2005 Microchip Technology Inc Features Low voltage and Standard voltage Operation 2 7 2 7V to 5 5V 1 8 1 8V to 5 5V Internally Organized 128 x 8 1K 256 x 8 2K 512 x 8 4K 1024 x 8 8K or 2048 x 8 16K Two wire Serial Interface Schmitt Trigger Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 100 kHz 1 8V and 400 kHz 2 5V 2 7V 5V Compatibility Write Protect Pin for Hardware Data Protection 8 byte Page 1K 2K 16 byte Page 4K 8K 16K Write Modes Partial Page Writes Allowed Self timed Write Cycle 5 ms max High reliability Endurance 1 Million Write Cycles Data Retention 100 Years Automotive Grade Extended Temperature and Lead free Halogen free Devices Available 8 lead PDIP 8 lead JEDEC SOIC 8 lead MAP 5 lead SOT23 8 lead TSSOP and 8 ball dBGA2 Packages Die Sales Wafer Form Waffle Pack and Bumped Wafers Description 24 01 A 02 04 08 16 provides 1024 2048 4096 8192 16384 bits of serial elec trically erasable and programmable read only memory EEPROM organized as 128 256 512
78. 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F66J15 96K 49152 3936 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F67J10 128K 65536 3936 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F85J10 32K 16384 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F85J15 48K 24576 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F86J10 64K 32768 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F86J15 96K 49152 3936 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F87J10 128K 65536 3936 66 15 2 3 2 Y Y 2 2 2 9 Y Pin Diagrams 64 Pin TQFP b d a amp QA m 9210 x3 omonmoOon n n nnn Nanrron 00000 O e n D DE Dc QN c gt 10 ON tC C c cm c c W gt gt K m s m 885 8 9 8 iui RE1 WR P2C 1 48 1 RBO INTO FLTO REO RD P2D 2 47 7 RB1 INT1 3 46 1 RB2 INT2 RG1 TX2 CK2 4 45 1 RB3 INT3 RG2 RX2 DT2 5 44 1 RB4 KBIO RG3 CCP4 P3D 6 43 L 1 RB5 KBI1 MCLR 7 42 L 1 RB6 KBI2 PGC RG4 CCP5 P1D 8 PIC18F6XJ10 41 vss Vss 9 PIC18F6XJ15 40 L 1 OSC2 CLKO VDDCORE VCAP 10 39 L 1 OSC1 CLKI RF7 SS1 11 38 3 RF6 AN11 12 37 L 3 RB7 KBI3 PGD RF5 AN10 CVREF 13 36 1 RC5 SDO1 RF4 AN9 14 35 1 RC4 SDI1 SDA1 RF3 AN8 15 34 1 RC3 SCK1 SCL1 RF2 AN7 C1OUT 16 33 1 RC2 ECCP1 P1A O QN sx LO O N ON NNN QN CO CO CO Z 5 2
79. 5V BZV55 C12 97274 2K4 100 50 cas col de css 220uF 25V 100nF 1 1 1 1 R35 c46 D4 220R 330uF 25V 275 BZV55 C12 Les 18VA 15V m 2 8 3 c55 VIN VOUT 100 50 cas R133 056 330uF 25V ur 330R 251298 103 3 7X TP4 LM337IMP lt L 12VAL D6 585 J8A AV4 8 4 13 EC 15V R61 10R c16 220uF 16V 4 T R17 R23 2204 16 4K71 560R1 R101 R100 R113 cao c7 2 71 2 7K1 470R196 104 50 enl a Q6 of Q48 2563324 Q42 of Gar K 2SC3324 et i 1 2503324 2963324 dis E 1 25 1312 R9 R114 1081 120R196 Q58 R78 R77 2563324 3308196 330R1 N 2 al N1210X226KCTx5R 5 2SA1312 R6 R76 BERI OR 1 22R196 K1B 7 5K1 cas m JRC 27F1005 M 555 R75 ma R108 22 Di 10uF16V 47R enl 6 8K1 m 7 LED rouge 13 ELCO 9 1 R124 R138 R139 gt 5 3324 2563324 1 2 395 R57R58 cai C35 R22 82K 120K 330pF i C20 lt pF R130 R136 4781 R60 R59 4 7nFM 39k 2 2 Q R8 1K196 Toon 1K196 TP7 25 3324 22R196 T TESTPOINT R99 R146 N 1K1 lt R7 C75 C47 C30 TORI 100aF16V 4 cu
80. 5V Digital Ground Pin 0V Digital Power Supply Pin 4 5V 5 5V X tal Input Pin O X tal Output Pin When DIT bit 1 Internal DIT Output Master Clock Input Pin Power Down Mode amp Reset Pin When L the AK4683 is powered down all registers are reset And then all digital output pins go L The AK4683 must be reset once upon power up E MEM RE Transmit Channel Output pin O When DIT bit 0 RX0 3 Through I Control Data Input Pin in Serial Mode and I2C pin L Control Data Pin in Serial Mode and 126 pin H 1 Control Data Clock Pin in Serial Mode and I2C pin L Control Data Clock Pin in Serial Mode and I2C pin H Chip Select Pin in Serial Mode and I2C pin L This pin should be connected to DVSS in Serial Mode and 120 pin H I I SDTIA1 I Audio Serial Data Input Al Pin I 29 30 SDTIA2 Audio Serial Data Input A2 Pin 31 SDTIA3 Audio Serial Data Input A3 Pin 32 SDTIB Audio Serial Data Input B Pin HVDD HP Power Supply Pin 4 5V 5 5V HVSS HP Ground Pin 0V 34 35 36 7 HPR HP Rch Output Pin HPL 36 HP HP Lch Output Pin HP Common Voltage Output Pin MUTET luF capacitor should be connected to HVSS externally MS0427 E 01 2005 11 65 ASAHI KASEI AK4683 39 ROUT2 DAC2 Rch Positive Analog Output Pin 40 10011 O DAClLchPosiiveAmalogOuputPin xU U 4 4 4 4 4 4 4 4 41
81. 61 C62 C65 C68 C69 C70 C75 C81 C83 C90 C92 C93 C94 C99 C101 C122 C123 C124 C63 C47 C55 2103 5101 0145 C3 C10 C30 C35 C48 C58 C66 2103 5101 0140 C60 C67 2103 5102 0145 C39 C51 2103 5151 1400 C95 C97 2103 5103 0140 C5 2103 5105 0140 C12 2103 5225 0140 C46 C54 2103 5681 0145 CNI 3100 4090 0200 CN2 3100 4040 0200 D1 D2 D3 D4 D5 D6 D7 D8 D9 1340 0161 0100 R45 R47 R49 R50 R72 R73 2401 8200 0400 R15 R16 2401 8110 2400 R27 R28 R107 R111 2401 8210 2400 R33 R46 2403 0817 8804 R57 R59 2401 8224 2400 1011 1751 1428 IC2 1007 3130 3160 J2 2910 4011 0510 J3 2910 6011 2031 J4 3102 1008 4802 J5 3102 0926 7802 136 9 JRC 27F1005 M 555 K2 K4 K5 K7 K8 K9 4712 2027 0006 5 FB L 0805 L2L3L5 L6 L7 1852 0120 9100 2 3K9 R 0805 R58 R60 2401 8239 2400 2 5 1 1 0805 R34 R48 2403 0815 1204 2 5 R R 0805 R13 R29 2401 0825 1904 2 7 5 1 0805 R63 R66 2402 0817 5904 2 9 1K1 R_0805 R37 R44 2403 0819 1204 18 10 1 0805 R2 R30 R32 R35 R38 R39 R42 R102 R103 R1142401 8110 3400 R115 R116 RII7 R118 R119 R120 R121 10 10 0805 R36 R43 R69 R70 R26 R51 R54 R55 R62 R67 2401 8210 3400 1 12 1 0805 12 2402 0811 2304 2 18 1 0805 R6 R11 2402 0811 8304 2 27 1 0805 R4 R24 2402 0812 7304 4 47 1 0805 R21 R64 R65 R113 2414 0847 1004 6 47 0805 R17 R18 R19 R20 R31 R41 2401 8247 3400 1 47R 1W DIP R106 2401 0524 7012 1 47R R 0805 R22 2401 8247 0400 14 68K R 0805 R74 R75 R76 R77 R83 R84 R85 R86 R8
82. 7 R94 R95 2401 8268 3400 R96 R97 R104 20 100 0805 8 R10 R79 R80 R82 109 R137 R138 R139 140 2401 8210 1400 R141 R142 R143 R144 R145 R146 R147 R148 R149 R150 2 220 0805 R81 R110 2401 8222 4400 14 220R R 0805 R89 R90 R91 R92 R93 R98 R99 R100 R101 R105 2401 8222 1400 R122 R123 R124 R125 2 330K R 0805 R78 R88 2401 8233 4400 4 330 1 0805 R5 R9 R23 R25 2402 0813 3104 2 360R R 0805 108 R112 2401 0823 6104 2 470 1 0805 R3 R40 2401 8147 4400 2 680R R 0805 R68 R71 2401 8268 1400 2 ADS825AR SOIC8 Analog Device 010012 1000 8250 0438 1 AK4683EQ LQFP64 AKM U2 1004 6830 0526 1 CS5361 SOIC24 U4 1053 6121 4101 2 NJM2068M DMP8 JRC U7U8 1031 2068 1300 4 NJM5532M DMP8 JRC U1 U3 U6 UII 1031 5532 1300 1 PCA9555 TSSOP24 Philips U9 1009 5550 4915 HK990 PART LIST Phono PCB P N 0099 1210 0000 Used Part Type Designator Description Part number 2 4TuF 16V DIP C27 C28 2340 0310 1015 15 0 1uF 50V C_1206 C4 C13 C14 C19 C20 C21 C22 C33 C81 C82 C83 2103 5104 0150 C84 C85 C86 C87 2 100uF 16V DIP C29 C75 2311 0310 1015 2 2700 50 1206 C62 C63 2115 5272 0150 2 5 1206 C35 C36 2103 5109 0150 137 N N N T N N QN N N N N 18 18 N A N N A N 1 50 _1206 1800pF 100V DIP 4700pF 100V DIP 4P 2 0 JACK 0 01uF 50V R 1206 10 50 1206 10uF16V DIP 10uF S0V DIP 22uF 10V ELCO C_1210 180pF 100V DIP 220uF 16V DIP 2
83. 74LCX125MTC USD 741 125 C7 47 25 JSR1162 002 USB 741 125 JSRI162 002 lt RST SUB lt WM LRCLK lt WM WM SDATA lt 24 MHZ 4 lt MUTE_LISTEN lt SDO lt SCK lt CS WMS7408 5 43 3V 287 108 47uF 25V FB2 H FB0805 3 C59 100nF C108 47uF 25V C49 C56 100nF 4 J 11 012 XWM8740EDS RST LRCLK SDATA MCLK MODESX MUTE DIFFHW CSBIWO MISO DMO SCK DMI CS DS MODE 4TuF 25V C50 47uF 25V 064 470 16 R30 4TuF 25V 4TuF 25V R33 C119 RIO 4TuE25V 470R Subwoofer OUT L C107 4TuF 16V U3B NJM2068M 4TuF 25V 4 RS 7 01 DTC343TK SUB MUTE OUT C120 4 C9 Subwoofer IN R a 4TuF 25V C12 gt gt AV4 8 4 13 EC 47uF 25V gt SUB SEL 4 470R Subwoofer OUT R Q DTC343TK SUB OUT 4 8 4 13 TO Pamp PCB CN13 HP DETECT K HP L GND 4 2 0 HEADPHONE_MICRO 15V 15V MIC OUT 100U25 C9 5 10K NJM2068 IC4B TPA6120A2 ZD4 IN4148 RELAY1 JRC 27F 012 M 555 C31 5 NJM2068 LIN CK 6 35 02 2 mS 8
84. 92 kHz Multibit Sigma Delta Modulator with Perfect Differen tial Linearity Restoration for Reduced Idle Tones and Noise Floor Data Directed Scrambling DAC Low Sensitivity to Jitter Supports SACD Playback with Bit Expansion Filter Differential Current Output for Optimum Performance 8 64 mA p p Differential Output 120 dB SNR DNR not muted at 48 kHz Sample Rate A Weighted Stereo 123 dB SNR DNR Mono 110 dB THD 110 dB Stop Band Attenuation with 0 0002 dB Pass Band Ripple 8x Oversampling Digital Filter On Chip Clickless Volume Control Supports SACD Mute Pattern Detection Supports 64 128 fa DSD SACD with Phase Mode Internal Digital Filter Pass Through for External Filter Master Clock 256 fs 512 fs 768 fs Hardware and Software Controllable Clickless Mute Serial SPI Control for Serial Mode Number of Bits Sample Rate Volume Mute De Emphasis Mono Mode Digital De Emphasis for 32 kHz 44 1 kHz and 48 kHz Sample Rates Flexible Serial Data Port with Right Justified Left Justified IS DSP Modes 28 Lead SSOP Plastic Package APPLICATIONS High End DVD Audio SACD CD Home Theater Systems Automotive Audio Systems Sampling Musical Keyboards Digital Mixing Consoles Digital Audio Effects Processors REV 0 Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of paten
85. C3 1001 8662 1326 1 KS 803LM 90 IRI 1304 0008 0300 1 LED Y amp W LEDI 1402 1203 0015 14 TSHC 78A 5 0 K2 K4 K5 K7 K8 K9 K10 K11 4502 4007 8100 K14 3 2SC2406 SC 59 PANASONIC Q7 Q8 Q9 1132 4060 5000 3 2SC1815 TO 92 TOSHIBA Q2 Q4 Q6 1131 81500172 1 25 2458 TO 92 TOSHIBA 010 1132 4580 0172 1 25854950 TO 92 TOSHIBA 018 11109500 0162 1 1 018 5 R7 2401 0221 0511 1 4 7KQ1 8W 5 R16 2401 0224 7211 25 10 01 8 5 R4 R5 R15 R19 R29 R31 R32 R33 R34 R35 R36 2401 0221 0311 R37 R38 R40 R41 R44 R45 R46 R47 R57 R58 R59 R60 R61 R62 5 10KQ 5 0603 39 42 65 67 85 2401 1221 0303 3 4 7K 2x596 0603 R43 R66 R68 2401 1224 7203 1 27 0 5 0603 R6 2401 1222 7303 2 1001 8 5 R2 2401 0221 0011 2 27Q1 8W 5 R30 R49 2401 0222 7011 1 27KQ1 8W 5 R6 2401 0222 7311 2 39 1 8 5 R54 R55 2401 0223 9311 1 4701 8 5 R56 2401 0224 7011 2 100 1 8 5 R52 R53 2401 0221 0411 3 10001 8Wzx596 R3 R50 R51 2401 0221 0111 1 470Q1 8W 5 R21 2401 0224 7111 1 56001 8 5 R20 2401 0225 6111 1 16 15 VFI 1521 6151 0101 1 24 576MHZ HC 49S 71 2705 2457 6026 HK990 PART LIST DSP PCB P N 0099 1280 0000 Used Part Type Designator Description Part number 41 0 1UF 50V 5 0603 C2 C3 C4 C5 C6 C7 C8 C9 C12 C13 C16 C17 C19 2156 1040 0130 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 1 10UF 6 3V 20 SMDE CAP 4X5 4 231001000138 1 22
86. C42 104 Phones board 901 R96 16VDC rails current 1 0 2mA for TL061 2 4mA for OPA2134 4mA for input stage HF 115F 048 1ZS3B x d 4 SPEAKER 2 7 HF 115F 048 1753B 115 048 1253 x 4 SPEAKER 2 7 HF 115F 048 1ZS3B 180v 939 ev 195 2KA2W MJ D243 Faston 6 3 2 diodes mounted on heatsink R26 4 3 a 2 j ha 4 15 1 8 55 D4 460v 0 22R RF 2 R89 lt Faston 6 3 2 MUR2020 MUR2020 gau 4 aac ee e S a Cn R15 5 ca2 R82 c15 c14 c12 R16 22K 3W aur 10k 10nF 250v 10nF 250v 6800uF 80V T T 6800uF 80V gt 10K 3W 4 1000uF 100V 45 C34 5 1 4 b 10 Faston 6 3 P 1 4 4 gt D26 2 3 4 4 li 2 JP6 T 7 D3 Y cio D6 Faston 6 3 c5 GBUSD iw Lr 10nF 250V c3 R4 45 10 250 6800uF 80V T T 6800uF 80V gt 10K 3W 5
87. CONNECT Figure 1 8 Lead Plastic SOIC R Package NC 1 e 16 NC Nc 2 Hs Nc NC Fa 2 0825 5 INPUT 5 Moro Seid 12 OUTPUT vs 6 11 NC NC 10 NC NC s 9 NC 00876 E 002 NC NO CONNECT Figure 2 16 Lead Plastic SOIC R 16 Package 00876 E 003 Figure 3 Performance with Rail to Rail Input Signals One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 O 2004 Analog Devices Inc All rights reserved ASAHI KASEI AK4683 AKM AK4683 Asynchronous Multi Channel Audio CODEC with DIR T The AK4683 is a single chip CODEC that includes two channels of ADC and four channels of DAC The ADC outputs 24bit data and the DAC accepts up to 24bit input data The ADC has the Enhanced Dual Bit architecture with wide dynamic range The DAC introduces the new developed Advanced Multi Bit architecture and achieves wider dynamic range and lower outband noise The also has digital audio receiver DIR and transmitter DIT compatible with 192kHz 24bits The DIR can automatically detect a Non PCM bit stream such as Dolby Digital AC 3 The AK4683 has a dynamic range of 100dB for ADC 106dB for DAC and is well suited for digital TV and home theater system Dolby Digital AC 3 is a trademark of Dolby Laboratories ADC DAC part Asynchronous ADC DAC Operation 6 1 Input Selector with Pre amp 2ch 24bit ADC 64x
88. EMPILARHS 27 514910500000 LEFTHEATSINK 534910140000 PCBBRACKET 122 29 534910240000 HEATSINK FRONT BRACKET 2 30_ _5349 19240000 HEATSINK REAR BRACKET 2 0099 1121 0000 5349 105A 0000 _ PCB BRACKET rw 0099 12800000 DSP PCB eae 0099 1510 0000 6 0099 12100000 7 DIGITAL 8 41 6349 101 0000 COVER 7548 10500000 SPEAKER BRACKET 43 SPEAKER JOINT BOARD 5149 106D 0000 RIGHT HEATSINK 126 Digital BOARD PART LIST P N 0099 1160 0000 Used A FY FN 20 e N A A WO e e N N N N 4 7 50 5 X7R 0805 MLCC 10pF 50V 5 X7R 0805 MLCC 10uF 25V 10 Y5V 0805 MLCC 220pF 50V 5 NPO 0805 MLCC 220PF 100V 5 Mylar CaP 330pF 50V 5 X7R 0805 MLCC 1000PF 100V45 Mylar CaP 3300PF 100V 5 Mylar CaP 0 1uF 10V45 NPO 0805 MLCC 0 1uF 50V 45 X7R 0805 MLCC luF 50V 5 Metalized polyester 4TuF 16V Tan 545 47uF 16V 20 E CaP 47uF 25V 20 FB 0805 1210 TB20129Z601 EMI 100MHz 600R AV2 8 4 14 EC 4 8 4 13 3 5 12 3 5mm DC JACK 2 4P2 0 90 Twin Row Pin 2 14P2 0 90 Twin Row Pin RJ45 10 8 22uH 1812 2SA1035R SC 59 Panasonic BSS123 SOT23 Fairchild DTC343TK SOT23 ROHM SS8550 SOT23 ICS83905AGT TSSOPI6 ICS JSR1162 002 LL4148 NJM2068M DMP8 JRC OP275GS SOICS Analog Device OPA2134UA SO 8 Burr brown PCA9554APW
89. GINK PIC 18F66J10 10 19 3 3 C37 NN 100U16 C36 104 V DGND DGND 7 2801406 18F66J10 Vddcore Vcap AVDD VDD VDD VDD RA4 AVSS CLKO OSCI Q9 25 2406 5 2406 R39 R65 10K 10K 5V V ICI DGND AT24C02 C38 R34 10K OK R36 10K DGND DOND C40 104 NCY 104 V DGND 104 standby RC4 SDA1 RC3 SCL1 CLKI OSC2 RAO RAI 30p 24 576 495 y DGND 23 81 30p 3 3V 5V V DGND 10001604696 1040408 RTUOT RIIN TIN no Cl C2 33 1 6 MAX3232CDR NC 13 2 2 6 104 5 6 7 8 9 V V DGND DGND 10 4 speaker2 K3 1 arrow left enter K12 O O O V V DGND DGND DGND CNI3 C17 L 470 A KS 90 lcu 104 e 2 10 4 LED 5V CI815p ND 2 REMOTE 5V 1 MCU SV 5 2 0 TO IR BOARD 2862458 2 5P 2 54 90 IDC NC DSP 33
90. MM MC BESTE L C24 330pF C23 330pF J5B AV4 8 4 13 EC LA G2 CDR OUT RA TAPE OUT J5A AV4 8 4 13 EC 12 AV 8 4 8 ES 100nF HR610675 S PDIF OUT R15 300R 123 DEEEF R14 R5 100R C84 100nF 2K7 C13 100nF C14 100nF JR1 LX 1604HP 3 Q 2 JR2 LX 1604HP 3 Q 2 124 900000000 9P 2 0 LIN GND LIN RIN GND RIN 15 GND 15 ANALOG I O BORD a N YK AN 4 fa LASN 4 2 IN 7 X NZ QHA 990 Explode List 1 654910140000 VOLUMEKNOBCOVER 1 2 74481020000 VOLUMEKNOBLENS 11 3 7548101C0000 VOLUMEPASTEM sar oom 3 7348 101A 0000 POWER KNOB 10 7549101 0000 DISPLAY BRACKET 11 0099 1011 0000 DISPLAY PCB N 2 1521 6151 0101 13 009912100008 PHONEBOARD Cd 14 7349101A0000 FUNCTIONKNOB 15 754910280000 LAMPSHADE 0099 1191 0000 Lc 8 7948 1010 0000 j ir al 20 6449102 0000 RIGHTSIDEPANEL 22 409010150000 TOROIDAL TRANSFORMER 02000 23 790000400000 8 PILLAR 14 4 0099 1070 0000 POWER PCB 5 5349 1060 0000 BOLT Br 7 26 790000700000 _ PAST
91. N CONNECTIONS Ds p OUTPUT I E FIXED VERSION ADJUSTABLE VERSION 1 Adjust 2L TO 263 FRONT VIEW 2 Vour 2 Vour TARTS 3 3 Vw 3 Vw OUTPUT 2 1 Advanced Monolithic Systems Inc 21 TO 220 FRONT VIEW 2 1 3L 263 FRONT VIEW 3 8 OUTPUT 2L J CC 15 6680B Sierra Lane Dublin 94568 Phone 925 556 9090 925 556 9140 ANALOG DEVICES Low Cost General Purpose High Speed JFET Amplifier 0825 5 High Speed 41 MHz 3 dB Bandwidth 125 V s Slew Rate 80 ns Settling Time Input Bias Current of 20 pA and Noise Current of 10 2 Input Voltage Noise of 12 nV VHz Fully Specified Power Supplies 5 V to 15 V Low Distortion 76 dB at 1 MHz High Output Drive Capability Drives Unlimited Capacitance Load 50 mA Min Output Current No Phase Reversal When Input Is at Rail Available in 8 Lead SOIC APPLICATIONS CCD Low Distortion Filters Mixed Gain Stages Audio Amplifier Photo Detector Interface ADC Input Buffer DAC Output Buffer PRODUCT DESCRIPTION AD825 is a superbly optimized operational amplifier for high speed low cost and dc parameters making it ideally suited for a broad range of signal conditioning and data acquisition applications The ac performance gain bandwidth slew rate and drive capability are all very stable over temperature The AD825 also maintains stable gain under varying load conditions
92. Narrow Body SOIC S Suffix FEATURES Excellent Sonic Characteristics Low Noise 6 nV Hz Low Distortion 0 0006 High Slew Rate 22 V s Wide Bandwidth 9 MHz Low Supply Current 5 mA Low Offset Voltage 1 mV Low Offset Current 2 nA Unity Gain Stable SOIC 8 Package PDIP 8 Package APPLICATIONS High Performance Audio Active Filters Fast Amplifiers Integrators GENERAL DESCRIPTION The OP275 is the first amplifier to feature the Butler Amplifier front end This new front end design combines both bipolar and JFET transistors to attain amplifiers with the accuracy and low noise performance of bipolar transistors and the speed and sound quality of JFETs Total Harmonic Distortion plus Noise equals that of previous audio amplifiers but at much lower supply currents A very low l f corner of below 6 Hz maintains a flat noise density response Whether noise is measured at either 30 Hz or 1 kHz it is only 6 nV Hz The JFET portion of the input stage gives the 275 its high slew rates to keep distortion low even when large output swings are required and the 22 V us slew rate of the OP275 is the fastest of any standard audio amplifier Best of all this low noise and high speed are accomplished using less than 5 of supply current lower than any standard audio amplifier Protected by U S Patent No 5 101 126 REV C Information furnished by Analog Devices is believed to be accurate and reliable However no respons
93. ON PACKAGE OUTLINE NJW1159 is a two channel electronic volume IC It is included output buffer amplifier and also resistor lt e output terminal for using external amplifier to lt lt customize for your application These functions are us 1 controlled by three wired serial data And the chip selector is available for using four chips on same serial bus line It s available for two channel stereo NJW1159V NJW1159M NJW1159D and or multi channel audio volume FEATURES Operating Voltage 4 5 to 7 5 Three Wired Serial Data Control Chip Selector available for using four chips on same serial bus line Volume 0 to 95dB 1dBstep MUTE 9 Bi CMOS Technology Package Outline SSOP16 DMP16 DIP16 BLOCK DIAGRAM INL CEO 3 Wired Control Data New Japan Radio Co Ltd 17 National Semiconductor LM137 LM337 November 2004 3 Terminal Adjustable Negative Regulators General Description The LM137 LM337 are adjustable 3 terminal negative volt age regulators capable of supplying in excess of 1 5A over an output voltage range of 1 2V to 37V These regulators are exceptionally easy to apply requiring only 2 external resistors to set the output voltage and 1 output capacitor for frequency compensation The circuit design has been opti mized for excellent regulation and low thermal transients Further the LM137 series features internal current limiting thermal shutdown and safe area
94. OT616 1 Standard packing quantities and other packaging data are available at www standardproducts philips com packaging 12 is a trademark of Philips Semiconductors Corporation SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips 12 patent 2004 Sep 30 Philips Semiconductors Product data sheet 16 bit 2 and SMBus port with interrupt PCA9555 PIN CONFIGURATION DIP SO SSOP TSSOP PIN CONFIGURATION HVQFN 5 01438 5001683 Figure 1 Pin configuration DIP SO SSOP TSSOP Figure 2 Pin configuration HVOFN PIN DESCRIPTION SYMBOL FUNCTION DIP SO SSOP TSSOP interruptoutput open drain 050205020000 output Interrupt output open drain 40 drain x Z s p gt sms 74 2004 Sep 30 Philips Semiconductors 16 bit 2 and SMBus port with interrupt BLOCK DIAGRAM Product data sheet PCA9555 PCA9555 2004 Sep 30 5 05 CONTROL FILTER READ pu POWER ON RESET NOTE ALL I Os ARE SET TO INPUTS AT RESET INPUT OUTPUT PORTS INPUT OUTPUT PORTS LP FILTER Figure 3 Block diagram 75 5001439 NJU201A QUAD SPST ANALOG SWITCH GENERAL DESCRIPTION PACKAGE OUTLINE The NJU201A is
95. On Chip Registers and Data Buffers Dolby is a registered trademark of Dolby Laboratories I2C 125 are trademarks of Koninklijke Philips Electronics N V All other trademarks are the property of their respective owners PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters 14 Digital Audio Interface Receiver DIR PLL Lock Range Includes Sampling Rates from 20kHz to 216kHz Includes Four Differential Input Line Receivers and an Input Multiplexer Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs Block Sized Data Buffers for Both Channel Status and User Data Automatic Detection of Non PCM Audio Streams DTS CD LD and IEC 61937 formats Audio CD Q Channel Sub Code Decoding and Data Buffer Status Registers and Interrupt Generation for Flag and Error Conditions Low Jitter Recovered Clock Output Two Audio Serial Ports Ports A and B Synchronous Serial Interface to External Signal Processors Data Converters and Logic Slave or Master Mode Operation with Sampling Rates up to 216kHz Supports Left Justified Right Justified and Philips 125 Data Formats Supports Audio Data Word Lengths Up to 24 Bits Four General Purpose Digital Outputs Multifunction Programmable Via C
96. Oversampling Sampling Rate up to 96kHz Linear Phase Digital Anti Alias Filter Single Ended Input SI N D 90dB Dynamic Range S N 100dB Digital HPF for Offset Cancellation Channel Independent Digital Volume 24 103dB 0 5dB step Soft Mute Overflow Flag 4ch 24bit DAC 128x Oversampling Sampling Rate up to 192kHz 24bit 8 times Digital Filter Single Ended Outputs SI N D 90dB Dynamic Range S N 106dB Channel Independent Digital Volume 12 115dB 0 5dB step Soft Mute De emphasis Filter 32kHz 44 1kHz 48kHz Zero Detect Function Stereo Headphone Amp with Volume 50mW at 16ohm Click noise free at Power on off High Jitter Tolerance MS0427 E 01 2005 11 ASAHI KASEI AK4683 E Ordering Guide AKA4683EQ 20 85 C 64pin LQFP 0 5mm pitch AKD4683 Evaluation Board for AK4683 W Pin Layout L 551 LIN6 RIN5 LIN5 L RINA RIN3 LIN3 L RIN2 LIN2 L RIN1 L LIN1 2 a E PVDD 1 48 RISEL 2 47 ROPIN 46 4 45 _ LISEL 5 44 Avss2 43 _ AVDD2 INTC 7 42 0 VCOM AK4683EQ m ROUTE 9 Top View 40 0 LOUT2 LRCKB 10 39 ROUT2 BICKB 11 38 _ LOUT2 SDTOB 12 37 MUTET 13 36 HPL ILRCKA 14 35 HPR 15 34 71 HVSS SDTOA 16 33 HVDD 18 PDN CDTI_ N
97. Press this button to start playback of a CD or Tape If the CD drawer is open the drawer closes and play begins Pressing the Play Button again pauses play momentarily same as the Pause Button 10 and 10 When playing CD press the 10 Button to skip 10 tracks forward and the 10 Button to skip 10 tracks backward from the track you are playing M ore presses again skips 10 more tracks If there are less than 10 tracks to the end or start of the CD the last or first track is played Folder and Folder When playing a CD with MP3 files these buttons move to the next or the previous folder with material Repeat When playing a CD pressing this but ton once repeats the current track shown as Rep 1 in the CD player s display Pressing once more repeats the entire CD shown as Rep AII in the CD player s display Third press exits repeat play Repeat A B When playing a CD press once to establish a starting point shown as Rep A in the CD player s display and a second time to establish an end point shown as Rep A B in the CD player s display The music between these two points is repeated as a loop until you press the button a third time returning to normal play Open Close Opens the CD drawer when it is closed and closes it when it is open The drawer may also be closed by pressing Play Random When playing a CD press this button to play all tracks in random order AMP Adjustment Iding Adjustme
98. QA m 9210 x3 omonmoOon n n nnn Nanrron 00000 O e n D DE Dc QN c gt 10 ON tC C c cm c c W gt gt K m s m 885 8 9 8 iui RE1 WR P2C 1 48 1 RBO INTO FLTO REO RD P2D 2 47 7 RB1 INT1 3 46 1 RB2 INT2 RG1 TX2 CK2 4 45 1 RB3 INT3 RG2 RX2 DT2 5 44 1 RB4 KBIO RG3 CCP4 P3D 6 43 L 1 RB5 KBI1 MCLR 7 42 L 1 RB6 KBI2 PGC RG4 CCP5 P1D 8 PIC18F6XJ10 41 vss Vss 9 PIC18F6XJ15 40 L 1 OSC2 CLKO VDDCORE VCAP 10 39 L 1 OSC1 CLKI RF7 SS1 11 38 3 RF6 AN11 12 37 L 3 RB7 KBI3 PGD RF5 AN10 CVREF 13 36 1 RC5 SDO1 RF4 AN9 14 35 1 RC4 SDI1 SDA1 RF3 AN8 15 34 1 RC3 SCK1 SCL1 RF2 AN7 C1OUT 16 33 1 RC2 ECCP1 P1A O QN sx LO O N ON NNN QN CO CO CO Z 5 2 5 5 gt 55955656 5 gt lt lt Qo Roo SS oz S lt lt lt Li x x r Z lt oE z lt lt lt 55 lt lt a 5 Note 1 The ECCP2 P2A placement depends on the setting of the CCP2MX configuration bit DS39663A page 2 Advance Information 16 2005 Microchip Technology Inc NJW1159M 2 CHANNEL ELECTRONIC VOLUME GENERAL DESCRIPTI
99. RI 47uF16V xL 10K1 R30 21 DC XTI R119 9 RAR A 10K196 2 x 222 22 p S omsr AK46834 P Tide S lt lt EA R45 M 104 50 DPHONO L Pu u2 m Jl 35 4683 NC NJ M5532M pes cu R115 1 Bue ican J RC 27F 1005 M 555 VW 10uF SOV 10K196 10K196 12C pin Cortrd mode sdectpinL 4 wire serial H 12C 271005 555 9 gt 13 R49 GND 10K1 8 11 TO t yi DPHONO R Pu i fo Lo 4 ms 0 C39 NC a RIN CN2 x 150pF 1 lt GND 2 m EM K9A KoB N 3 9 ISVA J RC 27F1005 M 555 J RC 27F1005 M 555 C105 4 El GND cus P2 INL PHL2JIN R 9 i 10uF 50V O 2 15 r DXLRR PIH 4P 2 0 35 47uF16V C104 gills 1 R20 R120 100 50 10K196 XLR L R18 U11B 47K NJ M5532M R121 10K1 R117 V 10K1 R42 10K1 C51 119 S S Y Y S S CDinL Tuner in 1 lt 1 Aux inL L lt Tape 1 lt 1 L L 4 XLR L 102 NJU7313AM 0 T 7 SR CD iR X 3 V XK B V XX qo p 13 V Leve Shifter Latc li Y X XX Be y APA L V B cb Control Circuit lt p n gt VDD VEE Latch D gt Tuner in R I gt _ R
100. S RS MAX242 232 INPUTS 400k EXCEPT MAX22 OUTPUTS T20U TTL CMOS RS 232 OUTPUTS INPUTS RIQUT DIP SO SSOP ARE FOR MAX222 ONLY PIN NUMBERS IN TYPICAL OPERATING CIRCUIT ARE FOR DIP SO PACKAGES ONLY Figure 6 MAX222 MAX242 Pin Configurations and Typical Operating Circuit MAXIM 60 19 2862073 2562406 11 Blake F Caiana 1 BASE 2 COLLECTOR 3 EMITTER 2561815 2SA950 2562458 28562235 25862120 1 EMITTER 1 EMITTER 1 EMITTER 1 EMITTER 1 EMITTER 2 COLLECTOR 2 COLLECTOR 2 COLLECTOR 2 COLLECTOR 2 COLLECTOR 3 BASE 3 BASE 3 BASE 3 BASE 3 BASE ANALOG DEVICES FEATURES High speed 41 MHz 3 dB bandwidth 125 V us slew rate 80 ns settling time Input bias current of 20 pA and noise current of 10 fA Hz Input voltage noise of 12 nV VHz Fully specified power supplies 5 V to 15 V Low distortion 76 dB at 1 MHz High output drive capability Drives unlimited capacitance load 50 mA min output current No phase reversal when input is at rail Available in 8 lead SOIC APPLICATIONS CCDs Low distortion filters Mixed gain stages Audio amplifiers Photo detector interfaces ADC input buffers DAC output buffers GENERAL DESCRIPTION The AD825 is a superbly optimized operational amplifier for high speed low cost and dc parameters making it ideally suited for a broad
101. URES SUPERIOR SOUND QUALITY ULTRA LOW DISTORTION 0 00008 LOW NOISE 8nV VHz TRUE FET INPUT I 5 HIGH SPEED SLEW RATE 20V us BANDWIDTH 8MHz HIGH OPEN LOOP GAIN 120dB 6000 WIDE SUPPLY RANGE 2 5V to 18V SINGLE DUAL AND QUAD VERSIONS APPLICATIONS PROFESSIONAL AUDIO AND MUSIC LINE DRIVERS LINE RECEIVERS MULTIMEDIA AUDIO ACTIVE FILTERS PREAMPLIFIERS INTEGRATORS CROSSOVER NETWORKS OPA134 Offset Trim In V Output NC Out A InA 8 Pin DIP SO 8 OPA2134 DESCRIPTION The 134 series are ultra low distortion low noise operational amplifiers fully specified for audio appli cations A true FET input stage was incorporated to provide superior sound quality and speed for excep tional audio performance This in combination with high output drive capability and excellent dc perfor mance allows use in a wide variety of demanding applications In addition the OPA134 s wide output swing to within 1 of the rails allows increased headroom making it ideal for use in any audio circuit OPA134 op amps are easy to use and free from phase inversion and overload problems often found in com mon FET input op amps They can be operated from 2 5V to 18 power supplies Input cascode cir cuitry provides excellent common mode rejection and maintains low input bias current over its wide input voltage range minimizing distortio
102. V30 LD1117S30C LD1117D30C LD1117DT30C LD1117V30C LD1117S33 LD1117D33 LD1117DT33 LD1117V33 LD1117S33C LD1117D33C LD1117DT33C LD1117V33C LD1117S50 LD1117D50 LD1117DT50 LD1117V50 LD1117S50C LD1117D50C LD1117DT50C LD1117V50C LD1117S LD1117D LD1117DT LD1117V ADJUSTABLE FROM 1 25 TO 15V 3 18 56 Dod FAIRCHILD E SEMICONDUCTOR www fairchildsemi com KA78XX KA78XXA 3 Terminal 1A Positive Voltage Regulator Features Description Output Current up to 1A The KA78XX KA78XXA series of three terminal positive Output Voltages of 5 6 8 9 10 12 15 18 24V regulator are available in the TO 220 D PAK package and Thermal Overload Protection with several fixed output voltages making them useful in a Short Circuit Protection wide range of applications Each type employs internal Output Transistor Safe Operating Area Protection current limiting thermal shut down and safe operating area protection making it essentially indestructible If adequate heat sinking is provided they can deliver over 1A output current Although designed primarily as fixed voltage regulators these devices can be used with external components to obtain adjustable voltages and currents TO 220 1 Input 2 GND 3 Output Internal Block Digram INPUT SERIES OUTPUT PASS 1 ELEMENT CURRENT SOA GENERATOR PROTECTION STARTING REFERENCE ERROR CIRCUIT VOLTAGE AMPLIFIER THERMAL PROTECTION GND Rev
103. WI U2 U3 US U6 U8 U9 U4 U17 U15 7P PLUG TO PLUG 2468 26 5 amp 2547 28X1C 2 0 L 180MM 6P PLUG TO PHOUSING 2468 26X6C 2 0 L 380MM 5P PLUG TO PLUG 2468 26X5C 2 5 L 300MM PLUG TO PLUG2468 26X4C 2 0 L 60MM 3P PLUG TO HOUSING2468 26X3C 2 0 L 60MM Designator Description C18 C19 C3 C5 C2 C9 C36 C38 C7 C50 C16 132 2401 8256 9400 2401 8210 3400 2401 8222 3400 2401 8227 0400 2401 8247 3400 2401 8275 0400 2401 8210 4400 2401 8210 1400 2401 8215 1400 2401 8222 1400 2414 0841 2104 2401 8247 1400 2401 8268 1400 2414 0868 0104 2401 8291 1400 4502 4000 3100 1000 8250 0438 1043 0317 0861 1000 3170 5427 1000 3370 4361 1000 3370 4349 1001 1590 3130 1001 8662 1326 1002 0030 6138 3307 0504 0282 3306 0504 0385 3304 0505 0302 3304 0504 0064 3303 0504 0063 Part number 2115 6300 0123 2115 6104 0123 2156 1040 0130 2310 0210 1015 2310 0310 1015 2 47JuF 10V 20 E CAP 4 2340 02100015 2 100uF 16V 20 E CAP C12 C37 2311 0310 1015 1 7P PLUG TO HOUSING2468 26X7C 2 0 L 300MM CNI 3307 0704 0335 1 4P HOUSING TO HOUSING2468 26X4C 2 0 LZ60MM CN4 3304 0504 0064 1 5P PLUG TO HOUSING2468 26X7C 2 0 L 300MM CN13 3304 0505 0302 1 6P PLUG TO PHOUSING 2468 26X6C 2 0 L380MM CN2 3306 0504 0385 1 1 6 2 5 902 CN14 3100 0506 0802 1 134148 D4 1311 1414 8000 1 AT24C02 SOP8 ATMEL 1002 4010 6620 1 1011178533 SOT 223 ST IC2 1054 1117 2800 1 PIC18F66J10 TQFP64 Microchip Technology I
104. Y L L H HIGH Logic Level L LOW Logic Level Connection Diagrams Pin Assignments for SC70 Top View Pin One Orientation Diagram Top View 4 Pin One AAA represents Product Code Top Mark see ordering code Note Orientation of Top Mark determines Pin One location Read the top product code mark left to right Pin One is the lower left pin see diagram Pad Assignments for MicroPak s CN Top Thru View www fairchildsemi com 46 FAIRCHILD ee SEMICONDUCTOR w www fairchildsemi com FAN1112 1A 1 2V Low Dropout Linear Regulator Features Low dropout voltage Load regulation 0 05 typical Trimmed current limit On chip thermal limiting Standard SOT 223 and TO 252 packages Three terminal fixed 1 2V Applications Post regulator for switching supplies Supply for low voltage processors Typical Application 3 3 10uF Z Description The FAN1112 is a 1 2V low dropout three terminal regulator with 1A output current capability The device has been optimized for low voltage where transient response and minimum input voltage are critical Current limit is trimmed to ensure specified output current and controlled short circuit current On chip thermal limiting provides protection against any combination of overload and ambient temperatures that would create excessive junction temper
105. a quad break before make SPST analog switch protected up to 44V operating voltage switches are controlled by TTL or C MOS compati ble input The low on state resistance about half compare with the NJU7301 The NJU201A is functionally and compatible with SILICONIX DG201A NJU201AD NJU201AM FEATURES PIN CONFIGURATION High Break Down Voltage 44V Low On state Resistance Package Outline DIP DMP 16 0 05 Technology TRUTH TABLE Logic In EQUIVALENT CIRCUIT 13 S 3 14 11 6 Low IR D LEVEL een 1 16 9 8 WT SHIFTER L L D o 2 15 10 7 GND 5 v 4 Logic input threshold voltage Vru is about V x 0 128 V When the designing enough margin is required New Japan Radio Ca Ltd 6 1 76 071 TLO71A 0718 TLO72 072 0728 074 TLO74A 0748 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS 5080800 SEPTEMBER 1978 REVISED AUGUST 1996 Low Power Consumption Low Noise EN Wide Common Mode and Differential Vn 18 nV VHz Typ at f 1 kHz Voltage Ranges 9 High Input Impedance JFET Input Stage Low Input Bias and Offset Currents Internal Frequency Compensation Output Short Circuit Protection Latch Up Free Operation Low Total Harmonic Distortion 9 High Slew Rate 13 V us 0 003 Typ Common Mode Input Voltage Range Includes descr
106. able Power No of Nominal SHDN Rx Part Supply RS 232 No of Value amp Three Active Data Rate Number V Drivers Rx Ext Caps pF State SHDN kbps Features 220 5 2 2 4 0 1 No 120 Ultra low power industry standard pinout 222 5 2 2 4 0 1 Yes 200 Low power shutdown 223 MAX213 5 4 5 4 1 0 0 1 Yes v 120 241 and receivers active in shutdown 225 5 5 5 0 Yes v 120 Available in SO 230 MAX200 5 5 0 4 1 0 0 1 Yes 120 5 drivers with shutdown 231 MAX201 5 and 2 2 2 1 0 0 120 Standard 5 12V or battery supplies 7 5 to 413 2 same functions MAX232 232 MAX202 5 2 2 4 1 0 0 1 o 120 64 Industry standard 232 5 2 2 4 o 200 Higher slew rate small caps 233 MAX203 5 2 2 0 o 120 No external caps AX233A 5 2 2 0 o 200 No external caps high slew rate 234 MAX204 5 4 0 4 1 0 0 1 o 120 Replaces 1488 235 MAX205 5 5 5 0 Yes 120 o external caps 236 MAX206 5 4 3 4 1 0 0 1 Yes 120 Shutdown three state 237 MAX207 5 5 3 4 1 0 0 1 120 Complements IBM PC serial port 238 MAX208 5 4 4 4 1 0 0 1 o 120 Replaces 1488 and 1489 239 MAX209 5 and 3 5 2 1 0 0 1 120 Standard 5 12 or battery supplies 7 5 to 13 2 single package solution for IBM PC serial port 240 5 5 5 4 1 0 Yes 120 DIP or flatpack package 241 MAX211 5 4 5 4
107. able the l Os as either inputs or outputs by writing to the I O configuration bits The data for each Input or Output is kept in the corresponding Input or Output register The polarity of the read register can be inverted with the Polarity Inversion Register All registers can be read by the system master Although pin to pin and 12C address compatible with the PCF8575 software changes are required due to the enhancements and are discussed in Application Note AN469 The PCA9555 open drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed The power on reset sets the registers to their default values and initializes the device state machine Three hardware pins AO A1 A2 vary the fixed address and allow up to eight devices to share the same I C SMBus The fixed 20 address of the PCA9555 is the same as the PCA9554 allowing up to eight of these devices in any combination to share the same 12 5 5 U ORDER CODE TOPSIDE MARK DRAWING NUMBER 24 Pin Plastic DIP 40 C to 85 24 Pin Plastic SO 40 C to 85 PCA9555N PCA9555 SOT101 1 PCA9555D PCA9555D SOT137 1 24 Pin Plastic SSOP 40 C to 85 PCA9555DB PCA9555 SOT340 1 24 Pin Plastic TSSOP 40 C to 85 C PCA9555PW PCA9555 SOT355 1 24 Pin Plastic HVQFN 40 C to 85 C PCA9555BS 9555 S
108. age to 1 Current limit is also trimmed minimizing the stress under overload conditions on both the regulator and power source circuitry The AMS1117 devices are pin compatible with other three terminal SCSI regulators and are offered in the low profile surface mount SOT 223 package in the 8L SOIC package and in the TO 252 DPAK plastic package ORDERING INFORMATION PACKAGE TYPE OPERATING JUNCTION 252 5 223 8L SOIC TEMPERATURE RANGE AMS1117CD AMS1117 AMS1117CS 40 to 1259 AMS1117CD 1 5 AMS1117 1 5 AMSI117CS 1 5 40 to 1259 AMS1117CD 1 8 1117 1 8 AMSI117CS 1 8 40 to 1259 AMS1117CD 2 5 AMS1117 2 5 AMS1117CS 2 5 40 to 1259 8L SOIC Top View AMS1117CD 2 85 AMS1117 2 85 AMS1117CS 2 85 40 to 1259 AMS1117CD 3 3 AMS1117 3 3 AMS1117CS 3 3 40 to 1259 GND ADJ E AMS1117CD 5 0 AMS1117 5 0 AMSI117CS 5 0 40 to 1259 For additional available fixed voltages contact factory Vovr N C PIN CONNECTIONS SOT 223 Top View 3 PIN FIXED ADJUSTABLE T0232 FRONT VIEW VERSION 15 OUTPUT 1 Ground Adjust 2 Vour 3 Vx Advanced Monolithic Systems Inc www advanced monolithic com Phone 925 443 0722 Fax 925 443 0723 NEW PRODUCT DIODES Features Low Gate Threshold Voltage Low Input Capacitance Fast Switching Speed Low Input Output Leakage TOP VIEW
109. ase operation completion Hardware Features m Ready Busy pin RY BY Provides a hardware method of detecting program or erase cycle completion Publication Number 52941060 00 Revision 36 Amendment 2 Issue Date December 2004 Preliminary SPANSION u Connection Diagrams A15 1 48 A16 A14 2 O 47 BYTE A13 3 46 Vss A12 4 45 DQ15 A 1 A11 5 44 DQ7 A10 6 43 DQ14 A9 7 42 DQ6 A8 8 41 DQ13 A19 9 40 DQ5 NC 10 39 DQ12 WE 11 38 DQ4 RESET 12 Standard TSOP 37 Vcc NC 13 36 DQ11 NC 14 35 DQ3 RY BY 15 34 DQ10 A18 16 33 DQ2 A17 17 32 DQ9 A7 18 31 DQ1 A6 19 30 DQ8 A5 20 29 DQ0 A4 21 28 OE A3 22 27 Vss A2 23 26 CE A1 24 25 A0 RESET 1 44 WE A18 2 1 43 A19 A17 3 42 8 A7 4 41 A9 A6 5 40 A10 A5 6 39 11 A4 7 188 A12 A3 8 2137 A13 A2 9 J 36 14 A1 10 35 A15 11 Standard SOP 34 A16 CE 12 33 Vss 13 32 Vss 14 31 DQ15 A 1 DQO 15 l 30 007 008 16 29 DQ14 DQ1 17 28 DQ6 DQ9 18 27 0013 DQ2 19 26 DQ5 DQ10 20 25 0012 003 21 24 004 0011 22 23 Vcc 6 529 0160 92940180 00 A2 December 17 2004 37 Preliminary SPANSION k Connection Diagrams FBGA Top View Balls Facing Down A16 BYTE DQ15 5 9 gt j x z 4 8 2 9 8 amp 8 5 2 o GE 800 o I 2 z O gt o
110. ation is current as of publication date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet Copyright 1993 2005 Texas Instruments Incorporated SN74LVC823A 9 BIT BUS INTERFACE FLIP FLOP Texas WITH 3 STATE OUTPUTS INSTRUMENTS SCASS3051 MARCH 1993 REVISED FEBRUARY 2005 DESCRIPTION ORDERING INFORMATION CONTINUED A buffered output enable OE input can be used to place the nine outputs in either a normal logic state high or low logic levels or the high impedance state OE does not affect the internal operations of the latch Previously stored data can be retained or new data can be entered while the outputs are in the high impedance state Inputs can be driven from either 3 3 V or 5 V devices This feature allows the use of these devices as translators in a mixed 3 3 V 5 V system environment This device is fully specified for partial power down applications using lo The Io circuitry disables the outputs preventing damaging current backflow through the device when it is powered down To ensure the high impedance state during power up or power down OE should be tied to Vcc through a pu
111. atures Unlike PNP type regulators where up to 1046 of the output current is wasted as quiescent current the quiescent current of the FAN1112 flows into the load increasing efficiency The FAN1112 regulator is available in the industry standard SOT 223 and TO 252 DPAK power packages FAN1112 Vour 1 2V at 1 m 22 REV 1 0 1 9 27 01 47 PRODUCT SPECIFICATION FAN1112 Pin Assignments Front View Tab is Vout Front View 3 IN Tab is V 2 OUT OUT 1 GND GND OUT IN 4 Lead Plastic SOT 223 3 Lead Plastic TO 252 Ojo 15 C W Ojo 3 C W With package soldered to 0 5 square inch copper area over backside ground plane or internal power plane can vary from 30 C W to more than 50 C W Other mounting techniques may provide better thermal resistance than 30 C W Absolute Maximum Ratings Parameter Min Max Unit VIN 18 V ViN Vout louT See Figure 1 Operating Junction Temperature Range 0 125 Storage Temperature Range 65 150 Lead Temperature Soldering 10 sec 300 1 2 1 0 _ 0 8 lt 5 0 6 0 4 0 2 0 0 2 4 6 8 10 12 14 16 18 20 Vin Vour V Figure 1 Absolute Maximum Safe Operating Area REV 1 0 1 9 27 01 48 MICROCHIP PIC18F87J10 Family Data Sheet 64 80 Pin High Performance 1 Mbit Flash Microcontrollers with nanoWatt Technology K
112. cerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet PRODUCTION DATA information is current as of publication date Copyright 1996 Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters EXAS POST OFFICE BOX 655303 DALLAS TEXAS 75265 77 071 071 TLO71B TLO72 072 0728 074 TLO74A 0748 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS 510580800 SEPTEMBER 1978 REVISED AUGUST 1996 TL071 TLO71A TLO71B D JG P OR PW PACKAGE TOP VIEW OFFSET 1 1 8 NC IN 2 7 3 6 our Vcc 4 5 OFFSET TL072 072 TLO72B D JG P OR PW PACKAGE TOP VIEW 074 074 TLO74B D J OR PW PACKAGE TL074 W PACKAGE TOP VIEW 71 072 074 FK PACKAGE TOP VIEW TOP VIEW TOP VIEW z O O z opz b 20999 20995 Li L JL JL JL JL 3 3 2 1 NC 4 NC 11 te 4IN 321 1 17 20UT 1711 NC 18 NC 16 NC 160 Vcc 17 1IN 17 15 2IN NC 15 NC NC 16 NC NC 18 14 NC 2IN 14 3IN NC B NC 0 2
113. cess to your software or other copyrighted work you may have a right to sue for relief under that Act Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates It is your responsibility to ensure that your application meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS OR WAR RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORY OR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITS CONDITION QUALITY PERFORMANCE MERCHANTABILITY FITNESS FOR PURPOSE Microchip disclaims all liability arising from this information and its use Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip No licenses are conveyed implicitly or otherwise under any Microchip intellectual property rights QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV 50 T5 16949 2002 Trademarks The Microchip name and logo the Microchip logo Accuron dsPIC KEELoQ microID MPLAB PIC PICSTART PRO PowerSmart rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U S A and other countries AmpLab FilterLab Migratable Memory MXDEV MXLAB PICMASTER SEEVAL SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technolo
114. conductors Product data sheet 16 bit 20 and SMBus port with interrupt PCA9555 FEATURES Operating power supply voltage range of 2 3 V to 5 5 V 9 5 V tolerant I Os 9 Polarity inversion register 9 Active LOW interrupt output 9 Low stand by current 9 Noise filter on SCL SDA inputs 9 No glitch on power up 9 Internal power on reset 9 16 I O pins which default to 16 inputs 9 0 kHz to 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22 A114 200 V MM per JESD22 A115 and 1000 V CDM per JESD22 C101 atch up testing is done to JESDEC Standard JESD78 which exceeds 100 mA 9 Five packages offered DIP24 SO24 SSOP24 TSSOP24 and HVQFN24 ORDERING INFORMATION DESCRIPTION The PCA9555 is a 24 pin CMOS device that provide 16 bits of General Purpose parallel Input Output GPIO expansion for 12 5 applications and was developed to enhance the Philips family of 12C I O expanders The improvements include higher drive capability 5 V tolerance lower supply current individual configuration and smaller packaging 1 expanders provide a simple solution when additional I O is needed for power switches sensors pushbuttons LEDs fans etc The PCA9555 consist of two 8 bit Configuration Input or Output selection Input Output and Polarity inversion Active HIGH or Active LOW operation registers The system master can en
115. e inverted with the Polarity Inversion register registers can be read by the system master The system master can reset the PCA95544A in the event of a timeout or other improper operation by utilizing the power on reset feature which puts the registers in their default state and initializes the I C SMBus state machine The PCA9554A open drain interrupt INT output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed INT can be connected to the interrupt input of a microcontroller By sending an interrupt signal on this line the remote can inform the microcontroller if there is incoming data on its ports without having to communicate via the I C bus Thus the PCA9554A can remain a simple slave device The device s outputs latched have high current drive capability for directly driving LEDs and low current consumption A Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet UNLESS OTHERWISE NOTED this document contains Copyright 2006 2007 Texas Instruments Incorporated PRODUCTION DATA information current as of publication date Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not
116. ead Free package fully RoHS compliant Pin compatible to MPC905 Industrial version available upon request BLock DIAGRAM ASSIGNMENT BELKO XTAL OUT 1 IN ENABLE 2 2 ENABLE 1 GND 3 BCLK5 BCLK1 BcLKo 4 Vppo 5 BCLK4 BCLK1 6 GND 7 BCLK3 BCLK2 8 Vpp ICS83905 16 Lead SOIC 3 9mm x 9 9mm x 1 38mm body package M Pacakge BCLK4 Top View ENABLE 1 SYNCHRONIZE ICS83905 16 Lead TSSOP 4 4mm x 3 0mm x 0 92mm body package G Pacakge ENABLE 2 SYNCHRONIZE Top View BCLK5 ENABLE2 L XTAL OUT lt 1 GND 11 ICS83905 5 6 2 20 Lead VFQFN 14 1 Vono 4mm x 4mm x 0 9mm BCLK0 body package 130 BCLK4 120 GND 4 K Package 11L GND BCLK1 5 Top View 8 9 6 7 2 2 3 0 m e x a BCLK2 B The Preliminary Information presented herein represents a product in prototyping or pre production The noted characteristics are based on initial product characterization Integrated Circuit Systems Incorporated ICS reserves the right to change any circuitry or specifications without notice 83905AM http www icst com products hiperclocks html REV A JANUARY 20 2005 11 Offset Trim BURR BROWN 52220 Se s OPA134 OPA2134 OPA4134 lt High Performance AUDIO OPERATIONAL AMPLIFIERS FEAT
117. ed tpz 2 3 ns Typ into 50 pF at 5V Voc High lo Output Drive 24 mA 3V Voc W Broad Vcc Operating Range 1 65V to 5 5V Matches the performance of LCX when operated at 3 3V W Power down high impedance inputs outputs W Overvoltage tolerant inputs facilitate 5V to 3V translation W Patented noise EMI reduction circuitry implemented Ordering Code d Pack Product Cod Order toduet Code Package Description Supplied As Number Number Top Mark NC7WZ07P6X 07 6 Lead 9070 9088 1 25mm Wide 3k Units on Tape and Reel NC7WZO07P6X NL 07 Pb Free 6 Lead 9070 EIAJ 9088 1 25mm 3k Units on Tape and Reel Note 1 Wide NC7WZO07L6X D3 Pb Free 6 Lead MicroPak 1 0mm Wide 5k Units on Tape and Reel Pb Free package per JEDEC J STD 020B Note 1 NL indicates Pb Free product J STD 020B Device is available in Tape and Reel only TinyLogic is a registered trademark of Fairchild Semiconductor Corporation MicroPak is a trademark of Fairchild Semiconductor Corporation 2005 Fairchild Semiconductor Corporation DS500218 www fairchildsemi com 45 sindino 1940 1 jena SHN Z0ZMZON NC7WZ07 Logic Symbol IEEE IEC X j Y Pin Descriptions Pin Names Description Ao Data Inputs Y Yo Output Function Table Y A Input Output A
118. eft Right Clock nput Output Determines which channel Left or Right is currently active on the serial audio data line SCLK 4 Serial Clock Input Output S erial clock for the serial audio interface MCLK 5 Master Clock Input Clock source for the delta sigma modulator and digital filters VD 6 Digital Power Input Positive power supply for the digital section GND 7 18 Ground nput Ground reference Must be connected to analog ground VL 8 Logic Power nput Positive power for the digital input output SDOUT 9 Serial Audio Data Output Output Output for two s complement serial audio data MDIV 10 MCLK Divider Input Enables a master clock divide by two function HPF 11 High pass Filter Enable Input Enables the Digital High P ass Filter 26 0 12 Serial Audio Interface Format Select Input Selects either the left justified or 125 format for the SAI MO 13 Mode Selection nput Determines the operational mode of the device M1 14 OVFL 15 Overflow Output open drain Detects an overflow condition on both left and right channels AINL 16 Differential Left Channel Analog Input nput Signals are presented differentially to the delta sigma AINL 17 modulators via the AINL pins VA 19 Analog Power nput Positive power supply for the analog section AINR 20 Differential Right Channel Analog Input nput Signals are presented differentially to the delta sigma AINR 21 modulators via the AINR
119. ently selected in the display Pressing on the the Source selectors El within few seconds after pressing El changes the record source Exit this function by pressing E again or wait for a few seconds until exit takes place automatically CONTROLS AND FUNCTIONS Input Source Selector Select input source for listening by pressing one of the Source but tons repeatedly to scroll through all the Inputs either forwards or backwards until the display shows the desired source Input Setup Button Press this Button to enter exit the Input Setup Mode Here you can select the physical connection for each source Analog Digital etc as well as Gain Bass Treble etc Refer to the Setup section of this manual Speaker Setup Selector Press this But ton to enter the Speaker Setup Menu where you can switch subwoofers on and off select crossover frequency run automatic speaker setup EzSet EQ etc Refer to the Setup section of this manual Up Down Arrow Buttons Press to scroll through various options for adjustment in a menu t Left Right Arrow Buttons Press to increase decrease a parameter or to select between parameters after selecting a menu for adjustment with the Up Down Arrow Buttons Level Settings Button Press to enter exit the Balance left right adjustment for the speakers as well as subwoofer level Headphone Jack Setup Microphone Input Plug in headphones if desired With both Speaker 1 and
120. er frequency stations Also see the Owners Manual for your harman kardon tuner Volume Press to adjust the HK 990 vol ume up or down Select When listening to a tuner press this but ton to alternate between Auto Tune Manual Tune or Preset Tune Pause When playing a CD press this button to momentarily pause the disc Press again to resume play REMOTE CONTROL DEVICE ON OFF harman kardon SYSTEM ON PROC CD PHONO BAND FM MODE AUTO CLEAR CHECK PROG Speaker Setup Input Setup EQ Preset Level Settings ENTER SCROLL VOLUME STOP PLAY gt gt REPEAT REPAB RANDOM Mute Press this button to momentarily silence the HK 990 Muted flashes in the front panel display Press again to re activate sound output gt Search Buttons Press one of these buttons to search fast forward or back ward on a CD or Tape You can hear intermittent sounds from the CD while searching Normal playback resumes when you release the button lt lt and gt Skip Buttons Press one of these buttons to move to the next track or to the previous track on a CD or Tape Repeatedly pressing one of the buttons skips more tracks On a CD pressing Skip Forward while playing the last track skips to track 1 and pressing Skip Back while playing track 1 skips to the last track Stop Press this button to stop play of a CD or Tape Play
121. flip flop is designed for 1 65 V to 3 6 V Vec operation SN74LVC823A 9 BIT BUS INTERFACE FLIP FLOP WITH 3 STATE OUTPUTS SCAS305I MARCH 1993 REVISED FEBRUARY 2005 WAO SN74LVC823A is designed specifically for driving highly capacitive or relatively low impedance loads It is particularly suitable for implementing wider buffer registers ports bidirectional bus drivers with parity and working registers With the clock enable CLKEN input low the nine D type edge triggered flip flops enter data on the low to high transitions of the clock Taking CLKEN high disables the clock buffer latching the outputs This device has noninverting data D inputs Taking the clear CLR input low causes the nine Q outputs to go low independently of the clock ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP SIDE MARKING Tube of 25 SN74LVC823ADW SOIC DW LVC823A Reel of 2000 SN74LVC823ADWR SOP NS Reel of 2000 SN74LVC823ANSR LVC823A SSOP DB Reel of 2000 SN74LVC823ADBR LC823A 40 to 85 C Tube of 60 SN74LVC823APW TSSOP PW Reel of 2000 SN74LVC823APWR LC823A Reel of 250 SN74LVC823APWT TVSOP DGV Reel of 2000 SN74LVC823ADGVR LC823A 1 A Package drawings standard packing quantities thermal data symbolization and PCB design guidelines are available at www ti com sc package PRODUCTION DATA inform
122. gt IN R t t 680P R137 lOuFl6V R98 DNE C62 R156 1 Q5 R55 R56 15K196 579 2 7nF 100K t 1 25 1312 1K1 21619 1K1 uc 180pFM 10 c 576 R123 R135 R134 ce 2 470uF16V 1 2 c92 DNE 39R R16 R20 10uF 50V 25 1312 NC c5 4 71 560R1 220uF 16V R74 R122 12VAR 7 5K1 OR R21 R72 R73 10R 330R1 330R1 1 Q57 R112 of 25 1312 120R196 1 1 951 R110 of 2563324 NC Q39 Q40 2SA1312 2SA1312 Q47 D7 25 1312 585 15V q 12VAR R96 R97 e E 2 7K1 2 7K1 R111 C37 3 4 w 470R1 10pF NZ lt R152 Q61 C66 25 3265 2 C67 4 6 t 10uF 50V 330uF 25V C15 220uF 16V R54 10R cn 330uF 25V uF Bzvssicl2 4 n 4 4 c53 D3 330uF 25V 1uF BZVSSICID AY c52 10uF 50V C51 R132 055 330uF 25V 330R 25 1298 3 x 2 TP3 T X L I2VAR 55 585 1 22 TO ANALOG I O BOARD CNI O gt PHONO IN L PHONO IN R jn 4P 2 0 17 24P 12 x 2 x 2mm 90 1 3 TAPE SEL 5 C33 100nF Q14 4 75 DTC343TK 7 2 I CDR SEL C13 100nF 15 R30 47R C14 100nF C27 C28 15V R31 47R T 34 134 M7uF16V 47uF16 REC outL 9 REC out R 18 4 6 8 L 10 L 16 18 20 aH 18 1C J RC 27F 1005 M 555 PHONO
123. gy Incorporated in the U S A Analog for the Digital Age Application Maestro dsPICDEM dsPICDEM net dsPICworks ECONOMONITOR FanSense FlexROM fuzzyLAB In Circuit Serial Programming ICSP ICEPIC MPASM MPLIB MPLINK MPSIM PICkit PICDEM PICDEM net PlICtail PowerCal Powerlnfo PowerMate PowerTool rfLAB rfPICDEM Select Mode Smart Serial SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U S A and other countries SQTP is aservice mark of Microchip Technology Incorporated in the U S A All other trademarks mentioned herein are property of their respective companies 2005 Microchip Technology Incorporated Printed in the U S A All Rights Reserved Printed on recycled paper Microchip received ISO TS 16949 2002 quality system certification for its worldwide headquarters design and wafer fabrication facilities in Chandler and Tempe Arizona and Mountain View California in October 2003 The Company s quality system processes and procedures are for its 8 bit MCUs KEELOQ code hopping devices Serial EEPROMs microperipherals nonvolatile memory and analog products In addition Microchip s quality system for the design and manufacture of development systems is ISO 9001 2000 certified DS39663A page ii Advance Information 2005 Microchip Technology Inc MICROCHIP PIC18F87J10 FAMILY 64 80 Pin High Performance
124. harman kardon Service Manual HK 990 230 2x 200W INTEGRATED STEREO AMPLIFIER harman kardon Released EU2009 harman kardon Inc Rev 0 03 2009 250 Crossways Park Dr Woodbury New York 11797 CONTENTS 15 ODI CHIC All OMe EE 1 2 Front panel Information heen uuu uu um ERU Re CO n 2 3 Rear panel informiatODosccs ss eise teinte ive UP NER dee qospa apa p PESE MORET EQ 3 4 Remote control INTORMIA TONS E PP 4 5 AMP 5 Ma 6 cuu Em 7 79 8 Printed cire ltiboardssc 80 99 9 Schematic dIagEalmi iunc 100 124 10 Exploded VIEW aad int 125 126 11 Electrical parts ed ante 126 139 Specifications NOMINAL Continuous Average Power Per Channel FTC 8 Ohms 150 Watts 0 0396 THD 20 Hz 20 kHz both channels driven 4 Ohms 300 Watts 0 396 THD Dynamic Power IHF 1 kHz Tone Burst 8 Ohms 220 Watts 4 Ohms 440 Watts High instantaneous current capability HCC 3200 Amps Power Bandwidth 9 Half Rated output 80 20 Hz 100 kHz Frequency response 9 1W 0 3dB 5 Hz 120 kHz Damping factor 20Hz
125. hich require wide data 1 0 and high bandwidth HY57V641620E L S T P is organized as 4banks of 1 048 576x16 HY57V641620E L S T P is offering fully synchronous operation referenced to a positive edge of the clock All inputs and outputs are synchronized with the rising edge of the clock input The data paths are internally pipelined to achieve very high bandwidth All input and output voltage levels are compatible with LVTTL Programmable options include the length of pipeline Read latency of 2 or 3 the number of consecutive read or write cycles initiated by a single control command Burst length of 1 2 4 8 or full page and the burst count sequence se quential or interleave A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or write command on any cycle This pipelined design is not re stricted by a 2N rule FEATURES e Voltage VDD VDDQ 3 3V supply voltage Auto refresh and self refresh All device pins are compatible with LVTTL interface 4096 Refresh cycles 64ms 54 Pin TSOPII Lead or Lead Free Package Programmable Burst Length and Burst Type All inputs and outputs referenced to positive edge of 1 2 4 8 or full page for Sequential Burst system clock 1 2 4 or 8 for Interleave Burst Data mask function by UDQM LDQM uM Programmable CAS Latency 2 3 Clocks nternal four banks operation Burst Read Sing
126. ibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use No license is granted by implication or oth erwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners 72 8 Lead PDIP P Suffix Improved dc performance is also provided with bias and offset currents greatly reduced over purely bipolar designs Input offset voltage is guaranteed at 1 mV and is typically less than 200 pV This allows the OP275 to be used in many dc coupled or sum ming applications without the need for special selections or the added noise of additional offset adjustment circuitry The output is capable of driving 600 Q loads to 10 V rms while maintaining low distortion THD Noise at rms is a low 0 000695 The 275 is specified over the extended industrial 40 C 85 C temperature range OP275s are available in both plas tic DIP and SOIC 8 packages SOIC 8 packages are available in 2500 piece reels Many audio amplifiers are not offered in SOIC 8 surface mount packages for a variety of reasons however the OP275 was designed so that it would offer full performance in surface mount packaging One Technology Way PO Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 2004 Analog Devices Inc All rights reserved Philips Semi
127. iption The JFET input operational amplifiers in the TLO7 series are designed as low noise versions of the TLO8_ series amplifiers with low input bias and offset currents and fast slew rate The low harmonic distortion and low noise make the TLO7 series ideally suited for high fidelity and audio preamplifier applications Each amplifier features JFET inputs for high input impedance coupled with bipolar output stages integrated on a single monolithic chip The C suffix devices are characterized for operation from 0 C to 70 C The I suffix devices are characterized for operation from 40 C to 85 C The M suffix devices are characterized for operation over the full military temperature range of 55 C to 125 C AVAILABLE OPTIONS PACKAGE CHIP CERAMIC CERAMIC PLASTIC PLASTIC TSSOP FLAT AT25 C OUTLINE CARRIER DIP PACKAGE PACKAGE FK TLO71CD TLO71CP TLO71CPWLE TLO71ACD TLO71ACP TLO71BCD TLO71BCP TL072CD TL072CP TL072CPWLE TL072ACD TLO72ACP TLO72BCD TLO72BCP TLO74CD TLO74CN TLO74CPWLE TLO74ACD TLO74ACN is TLO74BCD TLO74BCN TLO71ID TLO71IP TLo72ID TLO72IP TLO74ID TLO74IN mc TLO71MFK TLO71MJG 2 TLO72MFK TLO72MJG TLO72MP TLO74MFK TLO74MJ s TLO74MN TLO74MW TTheD package is available taped and reeled Add the suffix R to the device type 0 TL071CDR The PW package is only available left ended taped and reeled e g TLO72CPWLE Please be aware that an important notice con
128. is not recom mended for new designs Please refer to 24 16 0180T SEEPR 12 04 1977 01117 SERIES LOW DROP FIXED AND ADJUSTABLE POSITIVE VOLTAGE REGULATORS LOW DROPOUT VOLTAGE 1V 2 85V DEVICE PERFORMANCES SUITABLE FOR SCSI 2 ACTIVE TERMINATION OUTPUT CURRENT 800mA FIXED OUTPUT VOLTAGE OF 1 8V 2 5V 2 85V 3 0V 3 3V 5 0V ADJUSTABLE VERSION AVAILABILITY Vret 1 25V INTERNAL CURRENT AND THERMAL LIMIT a AVAILABLE IN 1 AT 25 C AND 2 IN FULL TEMPERATURE RANGE SUPPLY VOLTAGE REJECTION 75 dB TEMPERATURE RANGE 0 TO 125 DESCRIPTION The LD1117 is a LOW DROP Voltage Regulator able to provide up to 800mA of Output Current available even adjustable version Vretr21 25 V Concerning fixed versions are offered the following Output Voltages 2 5V 2 85V 3 0V 3 3V and 5 0V The 2 85V type is ideal for SCSI 2 lines active termination The device is supplied in SOT 223 DPAK SO 8 and TO 220 The SOT 223 and DPAK surface mount packages optimize the thermal characteristics even offering a relevant space saving effect High efficency is assured by NPN BLOCK DIAGRAM YOLTAGE GENERATOR CURRENT GENERATOR THERMAL THERMAL COMPENSATION PROTECTION 3008251 March 2001 e SOT 223 TO 252 DPAK pass transistor In fact in this case unlike than PNP one the Quiescent Current flows mostly into the load On
129. ith TTL and CMOS technologies The ULN2002A is specifically designed for use with 14 to 25 V PMOS devices Each input of this device has a zener diode and resistor in series to control the input current to a safe limit The ULN2003A has a 2 7 kQ series base resistor for each Darlington pair for operation directly with TTL or 5 V CMOS devices The ULN2004A has a 10 5 kQ series base resistor to allow its operation directly from CMOS devices that use supply voltages of 6 to 15 V The required input current of the ULN2004A is below that of the ULN2003A and the required voltage is less than that required by the ULN2002A logic symbolt logic diagram 9 De com 1 16 1B 1C 2 15 2B e 2C 3 14 3B e 3C 4 13 4B e 4C 5 12 5B e 5C This symbol is in accordance with ANSI IEEE Std 91 1984 b and IEC Publication 617 12 6 11 6B D e 6 7 10 7B e 7C PRODUCTION DATA information is current as of publication date Copyright 1993 Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments i standard warranty Production processing does not necessarily include testing of all parameters EXAS POST OFFICE BOX 655303 DALLAS TEXAS 75265 25 Wide Band RF Transformer for Set Top Box and Cable Modem Applications Hanrun Electronics Company Limited Electrical Specification 225 C PIN1 3 6 4 Part d F Schematic
130. l 44 0 131 667 9386 preproduction phase of development Fax 44 0 131 667 5176 Supplementary data will be published at a Email sales wolfson co uk later date http www wolfson co uk 62000 Wolfson Microelectronics Ltd 15 PIC18F66J10 FAMILY Program Memory MSSP 5 s SRAM Data CCP 55 Device Flash Single Word Memory VO A p ch ECCP spit Master E bytes Instructions bytes PWM rom ig Fo 8 9 ul PIC18F65J10 32K 16384 2048 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F65J15 48K 24576 2048 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F66J10 64K 32768 2048 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F66J15 96K 49152 3936 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F67J10 128K 65536 3936 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F85J10 32K 16384 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F85J15 48K 24576 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F86J10 64K 32768 2048 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F86J15 96K 49152 3936 66 15 2 3 2 Y Y 2 2 2 3 Y PIC18F87J10 128K 65536 3936 66 15 2 3 2 Y Y 2 2 2 9 Y Pin Diagrams 64 Pin TQFP b d a amp
131. l EIA TIA 232E and V 28 V 24 communica tions interfaces particularly applications where 12V is not available These parts are especially useful in battery powered sys tems since their low power shutdown mode reduces power dissipation to less than 5uW MAX225 MAX233 MAX235 and MAX245 MAX246 MAX247 use no external components and are recommended for appli cations where printed circuit board space is critical Applications Portable Computers Low Power Modems Interface Translation Battery Powered RS 232 Systems Multidrop RS 232 Networks Drivers Receivers Features Superior to Bipolar Operate from Single 5V Power Supply 45V and 12V MAX231 MAX239 Low Power Receive Mode in Shutdown MAX223 MAX242 Meet EIA TIA 232E and V 28 Specifications Multiple Drivers and Receivers 3 State Driver and Receiver Outputs Open Line Detection MAX243 Ordering Information PART TEMP RANGE PIN PACKAGE MAX220CPE 0 C to 70 C 16 Plastic DIP MAX220CSE 0 C to 70 C 16 Narrow SO MAX220CWE 0 C to 70 C 16 Wide SO MAX220C D 0 C to 70 C Dice MAX220EPE 40 C to 85 C 16 Plastic DIP MAX220ESE 40 C to 85 C 16 Narrow SO MAX220EWE 40 C to 85 C 16 Wide SO MAX220EJE 40 C to 85 C 16 CERDIP MAX220MJE 55 C to 125 C 16 CERDIP Ordering Information continued at end of data sheet Contact factory for dice specifications Selection T
132. le Write operation ORDERI NG I NFORMATI ON Part No Clock Frequency Organization Interface Package HY57V641620E L S T P 51 200MHz HY57V641620E L S T P 61 166MHz 4Banks x 1Mbits x16 LVTTL 54 Pin TSOPII HY57V641620E L S T P 71 143MHz HY57V641620E L S T P HI 133MHz Note 1 HY57V641620ET xl Series Normal power Leaded 2 HY57V641620ELT xl Series Low power Leaded 3 HY57V641620EST xl Series Super Low power Leaded 4 HY57V641620ETP xl Series Normal power Lead Free 5 HY57V641620ELTP xl Series Low power Lead Free 6 HY57V641620ESTP xl Series Super Low Power Lead Free Rev 1 5 Feb 2005 32 Synchronous DRAM Memory 64Mbit 4Mx16bit hynix HY57V641620E L S T P xI Series PIN ASSI GNMENTS g 5 54 D vss 000 2 53 0015 VDDQ 3 52 VSSQ DQl 4 51 0014 002 5 50 0013 VSSQ 6 49 VDDQ DQ3 7 48 DQ12 004 8 47 0011 VDDQ 9 46 VSSQ DQ5 10 45 DQ10 DQ6 11 44 009 VSSQ 12 24 Pin TSOPII H VDDQ DQ7 13 400mil x 875mil 42 008 VDD 14 0 8mm pin pitch A VSS LDQM 15 40 NC WE 16 39 UDQM CAS O 17 38 CLK RAS 18 37 1 CKE 5 19 36 NC BAO 20 35 All 1 21 34 9 2 33 8 AO O 23 32
133. lector Dissipation T 25 C 2 Tj Junction Temperature 150 C Storage Temperature 65 150 C 2008 Fairchild Semiconductor Corporation TIP32 TIP32A TIP32B TIP32C Rev A 24 www fairchildsemi com JojsisueJ uooijs 3 dNd OZEdIL AZEdIL IVZEdILIZEdIL ULN2001A ULN2002A ULN2003A ULN2004A DARLINGTON TRANSISTOR ARRAYS SLRS027 DECEMBER 1976 REVISED APRIL 1993 HIGH VOLTAGE HIGH CURRENT DARLINGTON TRANSISTOR ARRAYS 500 Rated Collector Current D OR N PACKAGE Single Output TOP VIEW High Voltage Outputs 50 V Output Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications Designed to Be Interchangeable With Sprague ULN2001A Series description The ULN2001A ULN2002A ULN2003A and ULN2004A are monolithic high voltage high current Darlington transistor arrays Each consists of seven npn Darlington pairs that feature high voltage outputs with common cathode clamp diodes for switching inductive loads The collector current rating of a single Darlington pair is 500 mA The Darlington pairs may be paralleled for higher current capability Applications include relay drivers hammer drivers lamp drivers display drivers LED and gas discharge line drivers and logic buffers For 100 V otherwise interchangeable versions see the SN75465 through SN75469 The ULN2001A is a general purpose array and can be used w
134. llup resistor the minimum value of the resistor is determined by the current sinking capability of the driver FUNCTION TABLE EACH FLIP FLOP INPUTS OUTPUT OE CLR CLKEN CLK D Q L L X X X L L H L T H H L H L T L L L H H Qo H LOGIC DIAGRAM POSITIVE LOGIC uo amp ic ES or ar Y Y elennsrio 3 43 0 DAL SEMICONDUCTOR 051818 3 3V EconoReset with Pushbutton FE ATURES Automatically restarts a microprocessor after power failure Monitors pushbutton for external override Maintains reset for 150 ms after Vcc returns to an in tolerance condition Reduces need for discrete components Precision temperature compensated voltage reference and voltage sensor Accurate 5 10 or 2096 power monitoring Low cost TO 92 or space saving surface mount SOT 23 packages available Efficient open drain output with internal 5 5 pull up resistor Operating temperature 40 to 85 DESCRIPTION The DS1818 EconoReset uses a precision temperature compensated reference and comparator circuit to monitor the status of the power supply Vcc When an out of tolerance condition is detected an internal power fail signal is generated which forces reset to the active state When returns to an in tolerance condition the reset signal is kept in the active state for approximately 150 ms to allow the
135. ly a very common 10uF minimum capacitor is needed for stability On chip trimming allows the regulator to reach a very tight output voltage tolerance within 196 at 25 C The ADJUSTABLE LD1117 is pin to compatible with the other standard Adjustable voltage regulators maintaining the better performances in terms of Drop and Tolerance nm 1 18 54 LD1117 SERIES ABSOLUTE MAXIMUM RATINGS Storage Temperature Range 40 to 150 Operating Junction Temperature Range 0 to 125 Absolute Maximum Ratings are those value beyond which damage to the device may occur Functional operation under these condition is not implied Over the above suggested Max Power Dissipation a Short Circuit could definetively damage the device THERMAL DATA unit Rthj case Thermal Resistance Junction case 15 20 3 C W Rthj amb Thermal Resistance Junction ambient 50 C W APPLICATION CIRCUIT 5207821 2 18 55 LD1117 SERIES CONNECTION DIAGRAM AND ORDERING NUMBERS top view GND Your Vin 11520 PC11610 SOT 223 SO 8 51 al aN Your PC11630 PC12078 TO 220 101117518 101117018 LD1117DT18 LD1117V18 LD1117S18C LD1117D18C LD1117DT18C LD1117V18C LD1117S25 LD1117D25 LD1117DT25 LD1117V25 101117525 LD1117D25C LD1117DT25C LD1117V25C 101117528 101117028 LD1117DT28 LD1117V28 101117530 101117030 LD1117DT30 LD1117
136. mal Resistance Junction case Max 3 3 5 4 C W Rthj amb Thermal Resistance Junction ambient 62 5 50 60 35 C W CONNECTION DIAGRAM AND ORDERING NUMBERS top view gt OUTPUT OUTPUT OUTPUT GND gt sROUND GND INPUT dul INPUT PC11920 5 255913 5 2568 1 TO 220 amp TO 220FP TO 220 TO 220FP Output Voltage 5V L7805 L7805T L7805C L7805CV L7805CD2T L7805CP L7805CT 5V L7852C L7852CV L7852CD2T L7852CP L7852CT 5 2V L7806 L7806T 6V L7806C L7806CV L7806CD2T L7806CP L7806CT 6V L7808 L7808T 8V L7808C L7808CV L7808CD2T L7808CP L7808CT 8V L7885C L7885CV L7885CD2T L7885CP L7885CT L7809C L7809CV L7809CD2T L7809CP L7809CT 9V L7812 L7812T L7812C L7812CV L7812CD2T L7812CP L7812CT L7815 L7815T L7815C L7815CV L7815CD2T L7815CP L7815CT L7818 L7818T L7818C L7818CV L7818CD2T L7818CP L7818CT L7820 L7820T L7820C L7820CV L7820CD2T L7820CP L7820CT L7824 L7824T L7824C L7824CV L7824CD2T L7824CP L7824CT AVAILABLE IN TAPE AND REEL WITH TR SUFFIX 2 25 20 Advanced Monolithic Systems FEATURES e Three Terminal Adjustable or Fixed Voltages 1 5V 2 5V 2 85V 3 0V 3 3V 3 5V and 5 0V e Output Current of Operates Down to 1V Dropout e Load Regulation 0 1 e Line Regulation 0 015 e TO 220 TO 263 and TO 252 packages available GENERAL DESCRIPTION The AMS1085 series of adjustable and fixed voltage regulators are designed to provide output current and to
137. n OPA134 series op amps are unity gain stable and provide excellent dynamic behavior over a wide range of load condi tions including high load capacitance The dual and quad versions feature completely independent cir cuitry for lowest crosstalk and freedom from interac tion even when overdriven or overloaded Single and dual versions are available in 8 pin DIP and 5 8 surface mount packages in standard con figurations The quad is available in 14 pin DIP and SO 14 surface mount packages All are specified for 409 to 85 operation A SPICE macromodel is available for design analysis OPA4134 14 Pin DIP 8 Pin DIP SO 8 SO 14 International Airport Industrial Park Mailing Address PO Box 11400 Tucson AZ 85734 Street Address 6730 S Tucson Blvd Tucson AZ 85706 Tel 520 746 1111 Twx 910 952 1111 Internet http www burr brown com FAXLine 800 548 6133 US Canada Only Cable BBRCORP Telex 066 6491 FAX 520 889 1510 Immediate Product Info 800 548 6132 1996 Burr Brown Corporation PDS 1339C Printed in U S A December 1997 12 X PCA9554A TEXAS REMOTE 8 BIT PC AND SMBus EXPANDER INSTRUMENTS WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS www ti com SCPS127A SEPTEMBER 2006 REVISED FEBRUARY 2007 FEATURES 2 to Parallel Port Expander Power Up With Channels Configured as Open Drain Active Low Interrupt Output Inputs e Operating Power S
138. nt Precaution for handling measuring instrument The ground side of the measuring instrument to be connected to the speaker terminal of this unit must be kept in floating condition because this unit is equiped with the floating balanced power amplifier Condition Start adjustment 5 minutes or more after the power is turned on Non loaded condition Idling Adjustment Adjust R53 so that the DC voltage of TP1 becomes 38 o Tdi m r 564 sH 0 0099 1070 0000 aa 554 841 Lal O Sai O O 228 Power Cord in 11 Sp1 Sp1 Sp2 5 2 Sp1 Sp1 5 2 5 2 Speaker Board Seaker Board Preamplifer Board Fuse Board CN12 CN13 Head Phone Display Board Led Board ANALOG DEVICES High Performance Multibit gt DAC with SACD Playback AD1955ARS FEATURES 5 V Power Supply Stereo Audio DAC System Accepts 16 18 20 24 Bit Data Supports 24 Bit 192 kHz Sample Rate PCM Audio Data Supports SACD Bit Stream and External Digital Filter Interface Accepts a Wide Range of PCM Sample Rates Including 32 kHz 44 1 kHz 48 kHz 88 2 kHz 96 kHz and 1
139. o 8 OO 1 JaMOd O uopsey uewJey 84 Doo 9 C28 8 08 9 U6 R28 2 55 C71 62 41 R42 R40 050000 Z lt 065 Q PN 0099 Q4 R R 2 t C36 3 R 2 ae c82 7 B 12 Lo 1 6 R103 R OS 294 oon R97 85 87 88 252292299494 R41 R35 U N qe o LI 5 m e m 90 m I gt 1 8 h 2 4 0000 IZ L1 6600 N d C LJ A Z2 eJ I 95 lt O m sd 2 Z 53 XSM 06 01 8002 81 0 0000 1061 6600 2 4Sf X0665IH A TIA NOX 0664H Uopaex ueulieu x Ry s S Qo ePi iG MC 7 O 4
140. ontrol Registers Extensive Power Down Support Functional Blocks May Be Disabled Individually When Not In Use Operates From 1 8V Core and 3 3V Power Supplies Small TQFP 48 Package Compatible with the SRC4382 and DIX4192 Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet Copyright 2005 2006 Texas Instruments Incorporated wolfson ao WM8740 24 bit High Performance 192kHz Stereo DAC Advanced Information July 2000 Rev 1 7 DESCRIPTION FEATURES The WM8740 is a very high performance stereo DAC 1200 SNR A weighted mono 48kHz THD N 1040 designed for audio applications such as CD DVD home FS theatre systems set top boxes and digital TV The WM8740 e 117dB SNR weighted stereo 48kHz THD N 104dB supports data input word lengths from 16 to 24 bits and FS sampling rates up to 192kHz The 8740 consists of a e Sampling frequency 8kHz to 192kHz serial interface port digital interpolation filter multi bit sigma e Selectable digital filter roll off delta modulator and stereo DAC in a small 28 pin SSOP e Optional interface to industry standard external filters package The WM8740 also includes a digitally controllable Differential mono mode needing no glue logic mute and attenuator function on each
141. pply filter capacitor Output capacitors in the range of 1 UF to 1000 of aluminum or tantalum electrolytic are commonly used to provide improved output impedance and rejection of transients Comparison between SOT 223 and D Pak TO 252 Packages E T0 252 00906731 507 223 Scale 1 1 2004 National Semiconductor Corporation DS009067 www national com 18 1 ejqeisnfpy 1 11191 6 Z IW1ZSLNT August 1999 National Semiconductor LM117 LM317A LM317 3 Terminal Adjustable Regulator General Description The LM117 series of adjustable 3 terminal positive voltage regulators is capable of supplying in excess of 1 5A over a 1 2V to 37V output range They are exceptionally easy to use and require only two external resistors to set the output voltage Further both line and load regulation are better than standard fixed regulators Also the LM117 is packaged in standard transistor packages which are easily mounted and handled In addition to higher performance than fixed regulators the LM117 series offers full overload protection available only in IC s Included on the chip are current limit thermal overload protection and safe area protection All overload protection circuitry remains fully functional even if the adjustment termi nal is disconnected Normally no capacitors are needed unless the device is situ ated more than 6 inches from the input
142. put Setup Mode Phono Input for record player with Moving Magnet high output and high impedance or High Output Moving Coil cartridge Phono Input for record player with Moving Coil low output and low impedance car tridge If your record player has a separate Ground wire attach it here to avoid hum noise Connect the trigger Input if available on one or two subwoofers to these trigger ON OFF output jacks When you switch ON the HK 990 it sends a trigger signal which Switches ON the subwoofer When switching OFF the HK 990 the subwoofer also switches OFF HRS High Resolution Synchronization Input Use the included HRS cable to connect the HD 990 CD player or other similarly equipped player for optimum sound quality Optical Digital Inputs TOS Link Connect any digital device with Optical Digital Output to one of these Inputs Push the Optical Jack through the hinged door that covers the Input until it clicks into place Coaxial Digital Inputs Connect any digital device with Coaxial Digital Output to one of these Inputs Usually Coaxial Digital transmis Sion is preferred to Optical given a choice Remote IN To control your HK 990 with an external infrared remote sensor connect the wire from the remote sensor here Remote OUT Connect other Harman Kardon devices you may also experiment with other brands that you wish to control with the HK 990 Remo
143. range of signal conditioning and data acquisition applications The ac performance gain bandwidth slew rate and drive capability are all very stable over temperature The AD825 also maintains stable gain under varying load conditions The unique input stage has ultralow input bias current and input current noise Signals that go to either rail on this high performance input do not cause phase reversals at the output These features make the AD825 a good choice as a buffer for MUX outputs creating minimal offset and gain errors The AD825 is fully specified for operation with dual 5 V and 15 V supplies This power supply flexibility and the low supply current of 6 5 mA with excellent ac characteristics under all supply conditions makes the AD825 well suited for many demanding applications Rev Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners 62 Low Cost General Purpose High Speed JFET Amplifier AD825 CONNECTION DIAGRAMS TOP VIEW Not to Scale OUTPUT 00876 E 001 NC NO
144. ries SRS is a registered trademark of SRS Labs Inc in the U S and selected foreign countries Circle Surround ll is a trademark of SRS Labs Inc DTS ES DTS Neo 6 DTS 96 24 DTS ES 96 24 and DTS HD are trademarks of Digital Theater Systems Inc DTS is a registered trademark of Digital Theater Systems Inc Dolby and Pro Logic are registered trademarks of Dolby Laboratories Philips is a registered trademark of Koninklijki Philips Electronics N V HDCD is a registered trademark of Microsoft Corporation in the United States and or other countries ATRAC3plus is a registered trademark of Sony Corporation in Japan and or other countries territories THX is a registered trademark of THX All trademarks are the property of their respective owners Second Generation Aureus DSPs Submit Documentation Feedback 28 Aureus TMS320DA708 TMS320DA708B TMS320DA788B Texas Floating Point Digital Signal Processors INSTRUMENTS www ti com SPRS297E JULY 2005 REVISED JULY 2007 2 13 Pin Maps Figure 2 2 shows the pin assignments on the 144 pin RFP package 69 196 ros M3 3 13 Md 99 Q gu Ve 59 z OMIe 01942 2_0192 o VG aa 8 0 ORXA E Ve S OAXA Ve NORXA 12 0AXA 2 a OAXA 12 5 0AXA VO aa Ve VG aa A A VO aa Ve VO aa Ve AJSHORXA VG
145. s processors ORDERING INFORMATION CS5361 KSZ 10 to 70 C 24 pin SOIC Lead Free CS5361 KZZ 10 to 70 C 24 pin TSSOP Lead Free CS5361 DZZ 40 to 85 C 24 pin TSSOP Lead Free CDB5361 Evaluation Board SCLK SDOUT FILT 4 Voltage Reference LP Filter DAC LP Filter CIRRUS LOGIC http www cirrus com Copyright Cirrus Logic Inc 2005 All Rights Reserved 4 RST Serial Output Interface q 155 1 5 Digital High HPF Decimation Pass MDIV Filter Filter Digital High Decimation Pass MODEO Filter Filter 9 MODE1 FEB 05 DS467F2 67 CIRRUS LOGIC 055561 2 0 PIN DESCRIPTIONS mE N RST 1 2411 FILT M S 12 23 1 REFGND LRCK 13 22 VQ SCLK 14 2111 AINR MCLK 15 20 1 AINR VD 16 19 3 VA GND 07 18 GND VL 18 17 O AINL SDOUT 19 16 AINL MDIV 110 15 1 OVFL HPF 111 14 1 M1 251 112 13 1 0 Pin Description RST 1 Reset nput The device enters a low power mode when low 5 2 Master Slave Mode Input Selects operation as either clock master or slave LRCK 3 L
146. te Control to this Output CONNECTIONS Remote Control Band Switches between frequency bands on a Tuner FM Mode Switches between Stereo and M ono on a Tuner Auto Switches between Automatic and M anual tuning on a Tuner Mem For memorizing a radio station in the Pre set Memory of a Tuner Clear Clears the memory of a CD CDR or clears a preset from Tuner station list Check Press this button to check the order of tracks programmed into a CD player s memory Prog Press this button to begin the process of programming a CD player to play the tracks of a disc in a specific order Speaker Setup Press to enter the HK 990 Speaker Setup functions See below for explana tion of the Speaker Setup process Input Setup Press to enter the HK 990 Input Setup functions See below for explanation of the Input Setup process Arrow Buttons gt lt v This round but ton is used to navigate within the menus of the HK 990 EQ Preset Press to enter the HK 990 Equalizer Preset functions See below for explanation of the EQ Presets Level Settings Press to enter the HK 990 Level Setting functions See below for explanation of the Level Setting process Enter Press to confirm a selection within a HK 990 setup procedure or to switch between selections See under each Setup process for fur ther explanations Scroll When listening to a Tuner press to tune to higher frequency stations and to tune to low
147. tor Description C4 C8 C15 C30 C33 C34 C35 C48 C49 C32 C31 CN12 5 D5 D6 IC5 IC8 JK3 JK2 K16 111213 Q5Q17 R27 R87 R86 R88 R89 R24 R26 R22 R23 R25 R28 Designator Description 24 25 53 134 2401 1223 3203 2401 12210203 2401 1224 7203 1074 8230 6115 1032 0700 6158 1057 6410 8942 1029 0162 0742 1011 1200 1961 1001 8180 1356 1000 7070 1965 Part number 2115 6104 0123 2340 0210 0015 2311 0210 1015 3100 4050 0200 3303 0504 0063 1311 1414 8000 1022 8170 7012 1000 2320 3613 2806 0590 0000 2801 1335 1203 4200 2200 0500 1881 0002 0000 1111 0510 0712 2401 0223 9211 2401 0221 0311 2401 0222 2311 2401 0224 7311 2401 0221 0011 2401 0224 7011 2401 0227 5011 2401 0222 7111 Part number 1361 3011 0100 2321 0210 2015 2311 0310 1015 N N N KF N N Gb N NNN N N KF KF NO n t LV 470uF 25V 20 E CAP 0 10 50 10 474 50 20 E CAP 100uF 50V 20 E CAP 100uF 63V 20 E CAP 0 1uF 275VAC X2 JY103M X1 400V Y2 300V 2P 2 5 SOCKET 3P 3 96 SOCKET 2 0 SOCHET 7 2 5 SOCKET IN4148 IN4001 HZ7B2ST HZ38 3ST FUSE T5AL 250V KA7805 TO 220 FAIRCHILD 2562120 TO 92 TOSHIBA 2562235 TO 92 TOSHIBA 2562458 TO 92 TOSHIBA 2SA950 TO 92 TOSHIBA 28C2073 220 MOSPEC 2SC1815 TO 92 TOSHIBA 1K1 8W 45 1 2K1 8W45 4 7K1 8W45 10K1 8W 45 12K1 8W 45 15K1 8W 45 22 1 8 355
148. ts or other rights of third parties that may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices FUNCTIONAL BLOCK DIAGRAM DSD MASTER CONTROL BITSTREAM CLOCK INPUT DATA INPUT INPUT AUTO CLOCK DIVIDER DIGITAL SUPPLY SPI CONTROL DSD FILTER DIGITAL EXTERNAL FILTER I F FILTER ENGINE ANALOG SUPPLY NOISE SHAPED MULTIBIT X A ZERO SCRAMBLING MODULATOR FLAGS 16 20 24 BIT AUDIO DATA EXTERNAL DIGITAL FILTER INPUT SERIAL DATA INTERFACE RESET MUTE VOLTAGE I DAC a REFERENCE L CH R CH DIFFERENTIAL CURRENT OUTPUT PRODUCT OVERVIEW The AD1955 is a complete high performance single chip stereo digital audio playback system It is comprised of a multibit sigma delta modulator high performance digital interpolation filters and continuous time differential current output DACs Other features include an on chip clickless stereo attenuator and mute capability programmed through an SPI compatible serial control port The AD1955 is fully compatible with all known DVD audio formats including 192 kHz as well as 96 kHz sample frequencies and 24 bits It is also backward compatible by supporting 50 us 15 us digital de emphasis intended for redbook compact discs as well as de emphasis at 22 kHz and 48 kHz sample rates The AD1955 has a very flexible serial data input port that allows for glueless interconnection to a variety of
149. upply Voltage Range of No Glitch on Power Up 2 3 V to 5 5 V Latched Outputs With High Current Drive e 5 V Tolerant I Os Maximum Capability for Directly Driving LEDs e 400 kHz Fast Bus e Latch Up Performance Exceeds 100 mA Per e Three Hardware Address Pins Allow up to JESD 78 Class Il Eight Devices on the 12C SMBus ESD Protection Exceeds JESD 22 2000 V Human Body Model A114 A 200 V Machine Model A115 A 1000 V Charged Device Model C101 Input Output Configuration Register Polarity Inversion Register e Internal Power On Reset DB DBQ DGV DW RGV PACKAGE RGT PACKAGE OR PW PACKAGE TOP VIEW TOP VIEW TOP VIEW A0 A1 A2 P1 P2 P3 GND DESCRIPTION ORDERING INFORMATION This 8 bit expander for the two line bidirectional bus 12 is designed for 2 3 V to 5 5 V Vcc operation It provides general purpose remote I O expansion for most microcontroller families via the interface serial clock SCL serial data SDA The PCA9554A consists of one 8 bit Configuration input or output selection Input Output and Polarity Inversion active high or active low registers At power on the I Os are configured as inputs with a weak pull up to Vcc However the system master can enable the I Os as either inputs or outputs by writing to the I O configuration bits The data for each input or output is kept in the corresponding Input or Output register The polarity of the Input Port register can b
150. ynchronous Serial Port MSSP modules supporting 3 wire SPI all 4 modes and 2 7 Master and Slave modes Two Enhanced Addressable USART modules Supports RS 485 RS 232 and LIN 1 2 Auto Wake up on Start bit Auto Baud Detect 10 bit up to 15 channel Analog to Digital Converter module A D Auto acquisition capability Conversion available during Sleep Self calibration feature Dual analog comparators with input multiplexing External Memory Bus PIC18F8XJ10 8XJ15 only Address capability of up to 2 Mbytes 8 bit or 16 bit interface 12 bit 16 bit and 20 bit Addressing modes 2005 Microchip Technology Inc Advance Information DS39663A page 1 PIC18F87J10 FAMILY Program Memory MSSP 5 s SRAM Data CCP 55 Device Flash Single Word Memory VO A p ch ECCP spit Master E bytes Instructions bytes PWM rom ig Fo 8 9 ul PIC18F65J10 32K 16384 2048 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F65J15 48K 24576 2048 50 11 2 3 2 Y Y 2 2 2 3 N PIC18F66J10 64K 32768 2048
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