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1. MJ 3A Regulator Control Service Manual Page 3 29 3 Troubleshooting Procedures 3 5 1 1 Current Transformer Interface 3 5 1 1 1 Actual troubleshooting of circ itry 15 performed at section 3 4 3 gt Ifthis section has led youtohere it has been determined that this isolated section of the circuitry is defective POSSIBLE CAUSES 9 Continuity s lacking between C2 of the PDS PIN 6 of J2 or Contirf ity is lacking between of Page 3 30 RDS and PIN 5 of J2 tightened or making firm contact Cold solder joints on connector Wire from PDS TEST REFERENCES 3 4 1 3 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 2 Potential amp Utility Winding Interface F2 0 4A RLY13 P2 M1 5 14 HIN GO SLO BLO FL11 RLY13 5 4 MOV12 MOV11 2012 BN LENS FL12 F1 4 02 N1 QHO 02 3 5 1 2 1 If you were led here due to a lack of P T voltage in section 3 4 2 then the fault has been isolated to thisicircuit Ensure test jumpers arevinstalled for both points referenced By block 1 MJ 3A Regulator Control Service Manual EXT SOURCE TEST REFERENCES 3 4 1 5 3 4 2 SW11 NORM 3 5 1 2 2 Verify continuity fuse F2 I FL11or FL12 is blown
2. YE IW SC 33 D1 D2 D3 D4 DS 16 10 ue 8 4 e Swl UPPER VLC 16 8 4 Swe LOWER VLC e i d VLC ENGAGE NOTES 1 ALL DIODES ARE IN4148 12 8164 3 ALL RESISTORS ARE 174W S lt lt S xipuaddy 531 6VDC De D5 D6 VRC REMDUTE DFF LDCAL 6VDC LR 226 16 13 112 111 Do D De D P DA Vpp Reser B a 1 10 8 1 04 cL Q 13 28 6VDC 6VDC 7 vis 14 AC HCPL 3700 15 sf AC ICS NOTES oo 2 1 ALL DIODES ARE 1 414856 5 Bur m 12648 81 09 3 ALL RESISTORS 1 4W 57 4 C5 ADDED TO LATER REVISIONS 1 c5 jJ 0 10 uf endix C MJ 3A Regulator Control Service Manual REF 26 Appendix D Parts e REF 27 MJ 3A Regulator Control Service Manual Appendix D Parts List APPENDIX D 1 Control Panel PC Board 1 119111 EslsTOR 510K OHM 812115 RESISTOR 470OHM _ V4W CARBON 5 4 85 065 14 o w RESISTOR zttOOHM a 1101830400001 IR15 24 AA RESISTOR 10KOHM 1 4WCARBON _ 5954 7 0185 097 12 T RESISYOR 39KOHM _______ 1 4 45 DI RSCACNO87 R17 1818
3. 7 3 z EE EREEE Ek 5 3 Sill jas 4 ve n a e a 1 ALL NPN TRANSISTORS ARE UNLESS OTHERWISE SPECIFIED 2 ALL SIGNAL DIODES ARE JN414BA UNLESS DTHERWISE SPECIFIED 3 ALL RESISTORS ARE 25W 5 UNLESS OTHERWISE SPECIFIED lt lt lt t w X a gt hb 85 8 s t S 3 z 3 8 t 8 MJ 3A Regulator Control Service Manual REF 23 Schematics Appendix C Data Pak PC Board Option APPENDIX C 4 DijD8 D3 D4 100pf 27 28 29 30 1 36 4 8 1 Bj Be usc DISP u Swi 105 9 1 04 3 e 15 14 XRESET 1 37136 5 6 7 3413513213119 11 129 30127 26 13114 115124125123122117 18 19 20121 RI 5 NOTES THESE GATES BELOW ARE USED ONLY ON BN EARLY PRODUCTION DATA PAK BOARDS 4 27 1 SWI PIN OUT P N Al 201 216 08 007 5 1 01 SVDC TO 91 3 DSPI 1 40 T poes 1284C 1 ALL DIODES ARE 144148 6 zozo 0 3 3 ALL RESISTORS ARE 5 12 Jd TO DPI 1 5 4070 5 Regulator Control Service Manual REF 24
4. 3 70 9 Power Monitor Circuits esee 3 66 9 5 4 0 4 0 44 2 3 62 9 ResetCircuit 3 68 Switch Decoding 3 70 Circuits transformer board fault detected CT transformer T3 A9 3 60 9 Power transformer 3 58 PT transformer T4 aea Z 3 59 9 Sensing Transformer 2 3 57 Current does not appear to be sensed 17 u 3 24 Current is sensed incorrectly 3 49 Communications option boards appear defective 3 74 Data Pak not properly o rating 7 l u 3 76 DRAG HANDS reset function does not operate 3 33 NEUTRALITE does operate 41 14210000 2041 029 40 000000 2004004040180 00 0 444 3 32 Operations counter do S not operate 3 34 Switchesfcontrol panel do not operate correctly l 3 55 Switches interface board d
5. 3 70 3 5 3 8 4DatayPak Interface Logic 3 70 3 5 3 9 Control Panel Bus Arbitration 3 72 39593 10 Control Panel Communications Interface 3 74 3 5 4 Data Pak Option Board Fault Verified or Suspected 3 76 3 5 5 Voltage Limit Control Option Fault Verified or Suspected 3 78 3 5 6 VRC Voltage Reduction Control Option Fault Verified or Suspected 3 80 MJ 3A Regulator Control Service Manual Contents 3 TABLE OF CONTENTS SECTION 4 MJ 3A Detailed Theory of Operation 4 1 System Top Level 42 4 1 1 Level Overview 4 2 4 1 2 Top Level Detailed a onanan aaa a a A Aa 4 2 4 2 Electrical si roo 242 W 4 3 42 1 Electrical I O Overview 722 4 3 4 2 2 Electrical I O Detailed 27 4 3 4 2 2 1 Control Panel Board Electrical Portion 4 37 44 4 2 2 1 1 PDS Connector A 2 4 4 4 2 2 1 2 Individual Circuits 1 22 4 5 Current Transformer Interface 7 4 5 Potential amp Utility Winding interface 4 5 NEUTRALITE interface 49 46 DRAG HANDS reset interface gt 46 Operations Counter interface 2 46 Raise Lower Moto interface 46 4 2 2 2 Transformer Board a
6. LIT 40352 Mur T pagn y 023 8022 4 n D Poa iss zo 2 12 Y NAT 3 m yo ____ _ qn 2 por ADORE 1 Hr 5 id nuandnna mil vog 7 26 RE OPTIONAL MJ 3A Regulator Control Service Manual REF 21 Appendix Schematics APPENDIX C 2 Transformer PC Boa N N ISDLATIDN Je SHORTING BAR OPTIONAL N SOURCE SELECT m TBI T 1 2 0 15 Jn java 111 IX T 9 6 Ya 8 0 oflo AUX lin 5 128 1 5 li Ce 20 79 ee 1000 D s 3 V T 5 6 1 PHwER TRANSFORMER 17 ZERO CROSS ISQ POWER n 1e 115 w 69 TAP INHIBIT 1 e AA 1 REF 22 MJ 3A Regulator Control Service Manual Appendix Schematics APPENDIX C 3 Interface PC Board Option
7. 00 HEADER D1 CNM S00 004 HEADER D1 CNM S00 004 HEADER D1 CNM S00 004 SOCKET D1 SKC K00 003 HEATSINK 1 5 002 00 631 133 040 00 655 017 018 MJ 3A Regulator Control Service Manual REF 35 Appendix D Parts List APPENDIX D 4 Data Pak PC Board Option lt lt 2 8500 Crur N lt ROW pet DE z RESISTOR RESISTOR RESISTOR RESISTOR RESISTOR RESISTOR CAPACITOR 10 MFD 25V CAPACITOR 100 PFD 500V CAPACITOR 0 1 MFD 63V DIODE DIODE DIODE DIODE LED LED DISPLAY TRANSISTOR TRANSISTOR IC IC IC SWITCH HEADER MJ 3A Regulator Control Service Manual DT RSC ACN 087 DA RSC ACN 087 D1 RSC ACN 105 D1 RSC ACN 057 D1 RSC ACN 057 D1 RSC ACN 105 D1 CR2 CT1 J10 D1 CRL BTJ P 10 D1 CRF BD2 L10 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 100 02 4 001 D1 100 024 001 1 051 00 001 D1 TSS NPA 001 D1 TSS NPA 001 D1 ICD CJ0 001 D1 ICD MCO 001 D1 ICD DC0 001 D1 100 02 4 005 D1 CNM S00 004 REF 36 Appendix D Parts List APPENDIX D 5 VLC PC Board Option 2 RESISTOR 1 4 W CARBON D T RSC ACN 105 G RESISTOR 1 4 W CARBON D1 RSC ACN 087 H RESISTOR 1 4 W CARBON 01 5 087 F RESISTOR 1 4 W CARBON D1 RSC ACN 059 F RESISTOR 1 4 CARBON D1 RSC ACN 059 2 RESISTOR 1 4 W CARBON D1
8. 4 7 4 2 2 21 Power Transf rmer TE 4 7 4 2 2 2 2 Potential Transform rT2 4 7 4 2 2 2 3 Current Transformer 13 4 8 4 2 2 2 4 Cross Transformer TA 4 8 4 3 Control Panel PC Board Electronic 4 8 4 3 1 Control Panel Electronic Overview 4 8 4 3 2 Control Detailed 4 9 4 3 2 4Po er Supply 49 Low Voltage Power Supply Rectification 49 Microcomputer Logic Voltage Reference 4 10 Microcomputer A D Voltage Reference and Bias 4 10 4 3 2 2268 Microcomputer Support Circuits 4 10 Oscillator Support Circuit 4 11 System Mode Circuitry 4 11 System Reset 4 11 4 3 2 3 Microcomputer Interface Circuitry 4 11 Low Level Signal Conditioning 4 11 Signal Conditioning 4 11 PT Zero Cross Detection Circuit 4 12 PT Magnitude Input Circuit 4 13 Signal Conditioning 4 13 Zero Cross Detection Circuit 4 14 C T Magnitude Input Circuit 415 Contents 4 MJ 3A Regulator Control Service Manual TABLE OF CONTENTS High Voltage Level Interface Circuits
9. Ce 1 60 0 H MINE oe in 5 00e 5 1 00e 4 wL A Seconds 1 E 3WL 3530534 5 60 0 3 Waveform 4 80e 0 4 00e 0 3 20e 0 2 40e 0 1 60e 0 8 00e 1 0 00e 0 8 00e 1 N 10105 9 ERES LL 5 00e Seconds 606 2 Page 3 54 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures was detected at the cathode the diode is 7 bad replace it If the continuity test fails both times the switch appears bad If traces appear broken on the PC board replace the switch v If you are here because of improper switch actuation or want to test any control panel switch continue Repeat for each dip switch position aad Procedure 3 5 1 18 2 will test switche in tegrity Procedure 3 5 1 18 3 will test the polarity switches SW8 and 68HC11 and support circuits 3 5 1 18 3 3 5 1 18 2 To understand which witch 19 activated per a particular microcomputer address refer to the previouS chart Switch testing This test will verify the integ rity of an individual switch v For a detailed explanation of the see the theory of operation in section 4 For testing purposes will only be con cemed with the signals
10. of connector J2 at the transformer board as shown in Figure 3 2 f waveform is absent g to 3 4 2 4 f waveform appearspfault has been isolated to defective transformer board Refer to Section 3 5 2ee Jransformer Board Sens ing Transformer 3 4 2 4 Verify that th connector from control panel board isnot causing the problem MJ 3A Regulator Control Service Manual Connect a scope or DVM to pin 2 of connector J2 as done in 3 4 1 3 but this time at the control panel board waveform is still absent go to 3 4 2 5 If waveform appears fault has been isolated to defective connector or solder connection Repair it and continue with 3 322 4 3 4 2 5 gt Verify that power isggetting to the control panel board Connect a 5 DVM to PDS con nector inp ts omthe control panel board between P2 and ground signals waveform is still absent go to 3 42 6 If waveform appears fault has been isolated to defective control panel board electrical section Refer to section 3 5 1 2 Potential amp Utility Wind ing Interface E 3 4 2 6 Find out why PDS connector is not getting power It appears that either the excitation source is turned off or is malfunctioning and this is beyond the scope of this manual Page 3 23 3 Troubleshooting Procedures Reference for test Reference for test instrument ground to be made at
11. 4 16 Relay Driver Circuits 4 4 16 User Interface lt 4 17 Circuit Annunciation Logic 4 17 Operator Setpoint Switch Logic 4 17 MJ 3A Detailed Theory of Operation 2 1 4 19 68HC11 RESET 27 4 19 SYSTEM RESET 4 19 44 Interface PC Board Option oaoa aaa aaa a e N Rany 4 21 4 4 1 Interface PC Board Overview 4 21 4 4 2 Interface Board Detailed amp 4 21 4 4 2 1 8035 Microcomputer 5 1 7 4 21 44 2 2 Oscillator Circuit 2 4 21 4 4 2 3 Power Supply Sma QA 4 22 4 4 2 4 Microcomputer Memory Management 4 22 Program Memory 2 4 22 Data Memory 4 3 4 24 4 4 2 5 Power Monitor Circuits 4 24 Power Down STORE F ncti n 4 25 Power Up 4 25 4 4 2 6 Reset Circu 4 27 4 4 2 7 Port 2 Arbitration Logic 4 28 Switch Decoding 2 4 28 Data Pak Interfac logic 4 29 4 4 2 8 Control PanehData Pak Communications Logic 4 29 4 4 2 9 Control Panel Bus Arbitration
12. 4 30 4 4 2 10 Gontrol Panel Communications Interface 4 31 4 5 Data Pak Display Optio 4 32 4 5 1 4 32 4 5 2 Data Pak Display Detailed 4 32 4 6 Voltage Limit Control Option 4 34 4 61 4 34 4 4 34 4 7 Voltage Reduction Control 4 36 497 1 4 36 4 7 2 VRC Detailed 4 36 MJ 3A Regulator Control Service Manual Contents 5 TABLE OF CONTENTS APPENDIX A Circuit Board Layouts Control Panel with Options REF 22 APPENDIX Control Panel PC Board A REF 3 APPENDIX 2 Transformer Board 9 1 REF 4 APPENDIX Interface PC Board 2 REF 5 APPENDIX A 4 Data Pak Option Qa REF 6 APPENDIX A 5 VLC Voltage Limit Control Option 4 7 REF 7 APPENDIX 6 VRC Voltage Reduction Control Options REF 8 APPENDIX B Block Diagrams Control Level Block Diagram REF 10 MJ3A Control Panel Interconnection Block Diagram REF 11 APPENDIX B 1 Control Panel PC Boa
13. ID1HBNEOOOO1 FUSE 7 4AMP125VOLT 4 1 ID1TSGFBOOO1 3 9 PCBDMT 2REQD _ 01 001__ FLI2 23 Fa WIRE rusBiEUNK 30 AWG SOLID 12 LONG DrwGPX30007 2 MFIATCABLE 8COND HEADER 01100024003 J3 42 narcau 12COND HEADER 00024004 HEATSINK roRTO3DEVICES 1 1 DIHSH P00002 NT ax e32 REQ D 00631 133040 tokwasHER INTERNALTOOTH 6 2REQD 00655047060 socer 0 5 400002 lsockET Reay o J prskmi0002 sockr T SKRLO0 002 Y SOCKET INTEGRATED CIRCUIT 48 PIN DIP DI1SKCKOOO02 BOARD WITH RELAYS ON COMPONENT SIDE BOARD WITH RELAYS ON SOLDER SIDE BEGAN WITH S N mj303S 30000 REF 31 MJ 3A Regulator Control Service Manual Appendix D Parts List APPENDIX D 2 Transformer PC Board 1 4W CARBON D I RSC ACN 073 TRANSFORMER POWER D1 100024016 ______ 01 100 024015 It 24 RESISTOR RSC R2 24 RESISTOR LOKOHM 1 4WCARBON 5 1 5 73 RESISTOR IR4 135 K RESISTOR 1 4W CARBON ___ 32 k RESIOR ZEROOHM J 44 Y 18560 00001 CAPACITOR TANTALUM 133MFD 25V 01 2 12433 c2 32 N CAPACITOR IFILM 0 33 MFD 630Vj ___
14. C11 O 1uf 1000V TO 12 LN OPERATION COUNTER 3 5 1 5 1 3 5 1 5 2 When an external request for operations If counter appears defective first verify counter update is requested that voltage potential is between A amp B The closure of the button amp results in hen Duron ds pressed 120VAC potential across points and B If potential exists and counter does not The counter 1 2position on ap update replace counter plication of ground at U 10 and 1 2 po If counter needs replacing look for any sition at removal ofground Counter will sign of damage on C11 Replace it if any advance position count of 2 with sign exists application and r moval of ground This can be simulated by jumpering U10 with PDS connector E Page 3 34 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures H 3 5 1 6 Raise Lower Relay Interface 3 5 1 6 1 gt you were led here due to the 4 proper or K response put SW12 in manual position and test J amp K response 120 VAC with respect to terminal E is at J or K with switch SW13 held in appropriate position f operable then go 16 3 5 1 6 2 f inoperable verify continuity of JP14 JP15 JP 16 PTZand SW13 3 5 1 6 2 If amp resporises work manually 9 verify the presence of jumpers 14 15 16 and 175See reference block 1
15. 25 POSITIONS X GRNDOT swe 29 FASPOSITIONS GRNDOT 01100024012 sw7 i IN ITOGGLE 4 seor D1 SWwTPotoOO1 SW8 22 IN switcH 2 SPOT DrswrPoro0 swo 32 N ISWiCH DIPROCKER JS BPOSITIONS PIANO STY D1 SWD R00 002 Iswio 31 2 RTANG pOt SwPBooo05 lsw11 4 lswrcH v otrswreo200 8412 15 G swrcH tocak DPDLCO lp1 swrPo2003 swi3 111 o IToeMGMMENTARY 5 0159 1003 SW14 119 SWTCH PUSHBUTTON IDtSwPBOO004 RLY12A 19 L RELAY 5 MT leVDCCOIL IDtRUMNOOO04 IRUY13A 6VDCCOIL DIRLM N00 004 3 15 L _______5 D1 RLMNOOOO4 RLY12 18 fL RELAY 019650001 IRIY13 11 L RELAY 0195250001 IRUY14 _ 14 L REAY IDpi RlGPsOoO1 RLY12 18 L FOR RELAYS 018 00001 _ 11 fL J FORREAYS 018 01 RLY14 14 1 RETAINER IFORRELAYS DIRIACOOOO1 INLT 191 soeker FORBLPINLAMPS 09100001 INT G ____ AMBER __ __
16. 3 Troubleshooting Procedures THIS PAGE INTENTIONALLYELARS lt 5 29 RN Page 3 26 Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 Isolating Trouble to a Circuit Section 3 3 helped determine if there was a fault based on operating characteristics It has then led youto here directly orvia section 3 4 where the fault was narrowed downtoacircuitboard Based on the analysis of the fault found you are guided to the circuit most suspected of causing the fault lf after going through the procedure for the circuit in which you are directed you still do not find the faulty component go backto the area in section 3 3 and refer to the next suggested circuit Y 9 lt 2 MJ 3A Regulator Control Service Manual Page 3 27 3 Troubleshooting Procedures 3 5 1 Control Panel Board Fault Verified or Suspected REFERENCE RE RESET un L C w 30 OPERATION COUNTER 3 5 1 5 U6 3 5 1 6 Notes 1 AlLresistors are 25w 5 unless otherwise noted 2 All diodes are 1n4002 unless otherwise noted Page 3 28 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures MISC REFERENCES
17. a 3 33 3 32 9 Operator Setpoint switch logic a 3 55 9 interface aaa 3 34 saus E 3 39 Potential amp Utility winding interface eec 3 31 9 Power Supply low voltage rectification 3 36 Power Supply low voltage logic reference 3 37 9 Power Supply low voltage A D referenceb 3 38 PT Magnitude input circuit an 3 45 Zero Cross detection circuit aaa 3 42 Relay Driver Circuits ra nq 3 50 ME ies NN 3 40 9 Raise Lower relay interface aaa 3 35 REF 44 MJ 3A Regulator Control Service Manual Appendix Fault Symptoms Guidance SECTION PAGE Circuits interface board fault suspected 9 Data Pak interface logic aaa 3 70 9 Control Panel Bus Arbitration 3 72 9 Control Panel Communications Interface eee 3 74 Memory Management sssssssssssccssssescsssseessssneesssscesssssecssseecsenseesessnseessse 3 64 OscillatOF 3 61 9 Port 2 Arbitration Logic
18. endix B Block Diagrams APPENDIX B 1 Control Panel PC Boa Low Voltage Rectification Oscillator Power Supply Circuitry Logic Reference Reset nad Power Supply A D References Relay Driver Circuitry Microcomputer Motorola 68HC11 Potential Transformer Zero Crossing Reference Potential Trans ormer Magnitude Reference Annunciation Logic Setpoint Switch Logic Current Transformer Zero Crossing Reference Current Transformer Magnitude Reference REF 12 MJ 3A Regulator Control Service Manual Appendix B Block Diagrams APPENDIX B 2 Transtormer Boar Control Panel PC Board Connector J2 Connector J3 Connector J2 to onnector 3 t Jumper Block TB2 Jumper Block TB1 Auto Inhibit VRC Activate Current Loop Sense Transformer Reyerse Power Jumper Selection F Opis nl MJ 3A Regulator Control Service Manual REF 13 Appendix B Block Diagrams APPENDIX B 3 Interface PC Boa Data Pak Switch Decode Interface Logic Oscillator Port 2 Circuitry Arbitration be Control Panel Communications Microcomputer Intel 8035 VLC VRG Interface Interface Reset Circuitry Power Monitor Circuits Control Panel Memory aye Management Bus Arbitration REF 14 MJ 3A Regulator Cont
19. going into trans flow as designated by the dot convention forn er T3 primary on terminal J2 5 as noted on the drawing The secondary voltage waveform illustrated reference YES Verify that reference block 2 block 2 Ifwaveform is there fransiormer waveform appears on secondary of is OK if not there replace transformer transformer NO Verify that contacts are touching on connector Look for broken solder traces Verify that power source exists on the front panel board Page 3 60 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 Interface Option Board Fault Verified or Suspected 10000001 i LL REFERENCE d zie REP n c r S36 j Ay f 4333 gi desc RC gt E ER x ITT rr EP REFERENCE 25 8 535 H 554 H H amp H TAN Ll MJ 3A Regulator Control Service Manual Page 3 61 3 Troubleshooting Procedures 3 5 3 1 Oscillator TEST REFERENCES 3 3 2 52 7 EJ 25312 Connect a scope with a low capacitance The microcomputer U1 should have a 5
20. 0 0 1 Bandwidth Setting SW3 Page 4 17 Jenuew 043400 40je n823 VE IW 8L p 33ed 91 21801 YOUMS 1uiodjes 61 euni MUX 1 ENABLE 1 0 ADDRESS 3 1 0 ADDRESS 1 0 ADDRESS 0 LEVEL SETTING RESPONSE TIME DELAY BANDWIDTH ALIWIOd 4 6 a dvi oiy 10 _ dde OPTIONAL jo pA VE IW t 4 MJ 3A Detailed Theory of Operation VLOGIC 011 2 gt lt R3 2N2222A 510K VLOGIC 518 TP10 RN TIS un 3 3K T LM139 VLOGIC 6 TP9 7 lt C29 RESET 99 Z 5 ii 2N2222A C7 R66 R36 1 v L ors 1OK R38 _ TOK igure 4 0 1 0 Resistance Line Drop Compen sation Switch SW5 amp Polarity switch SW7 R 0 1 10 Reactance Line Drop Compen sation Switch SW6 and Polarity switch SW8 X SIDE PANEL ACCESS switches 1 0 0 Configuration ID switch 48 spst DIP switch SW8 9 1 0 1 Operator Nullsrotary switch SW4 9 1 1 0 Optional featutessswitch SW 16 The following switches are individually scanned when PB4 is high whi haddfesses remote switches on option board via the remote 3 8 mux inputs and pins TOpand 9 The required output code from ports PB1 and
21. 3 5 6 VRC Option Page 3 17 3 Troubleshooting Procedures 3 3 2 72 NOTE Test procedures 74 100 are reserved Turn both accessory toggle switches to OFF Set rotary switch to 1096 Set VLC LOWER to 115V VLC UPPER to 125 volts 3 3 2 101 Adjust voltage until Data Pak reads about 120 volts Turn on both VLC and VRC to Phase 1 Determining Trouble Symptoms LOCAL setting Is the light on has been concluded YES Goto 3 3 2 73 Turn off power 9 NO If you have not discover d a problem it is ACTION possible that the problems may have been mis reported due to the mis un Refer to section derstandings of how thejsystem should op 3 5 5 VLC option erate If you are COnvinced that there is problem or w nt further verification sec 3 5 6 VRC Option tion 3 5 contains each circuit path and key m input output signals 3 3 2 73 Adjust the voltage such that the it goes below 115 volts Is the J light on YES Go to 3 3 101 NO ACTION Referto section 3 5 5 VLC option e 3 5 6 VRC Option Page 3 18 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 4 Localizing Trouble to a Functioning Module or Sub system This section should be used only if directed specif ically by another section The fault will have been identified in the determining troubl
22. Data is directed to the Data Pak from the interface board via J5 pins 10 thru 13 P20 thru P23 Monitor each of these four lines to verify port activity reference block 7 pro vides a sample snapshot of activity Do you verify this YES Verify that the PROG line reference block 4 is actively selecting the Data Pak for data transmission Monitor also ad dress and chip select lines J5 connector pins 3 4 5 for activity similar to reference block 3 Pin 15 should have similar activity to indicate a proper data enable to U2 If so transmission to Data Pak appears OK if notthen see note below e NO Check these same port lines on the same pins as above but look at the inter face board instead Verify that the connec tor is tight If data transmission fails to materialize refer to section 3 5 3 6 verify that the switch is being selected by the interface board gt Monitor port 2 on each cathode banded ends of the diodes thru 04 lf activity similar to reference block 7 does NOT appear diode is suspected to be defective v Does the turning rotary switch to each position Cause different LCD mes sages to appear YES toXall above checks Switch is pr bably OK If you wish a more de tailed test refer to section below Monitor reference block 6 to ver ify that the switch is being selected by the interface board If waveform is pres ent switch may be def
23. sensing transformer terminal strip PB to 20 P14B to 20 P14A to 25 PA to 20 Remove the jumper which had been con nected from P to P14 This configuration tests the sensing transformer by introducing no correction for f6rward power flow and a minus 5 volt correction for reverse power flow vw X transformer board turn system power Verify flow is in mode Apply c rrent magnitude at maximum level Using thevoltmeter measure and compare the voltage between the test terminals and the incoming voltage on PDS connector P2 to 45 it true that there is NO difference in voltage YES Go to 3 3 2 23 9 NO VERIFY MJ 3A Regulator Control Service Manual The correct jumper configuration has been installed Thatthe RPF light is NOT on The switch 48 switch status is COCCCCOC per 3 3 1 ACTION Referto section 3 5 2 1 Sensing Transformer 3 3 2 23 Putpower flow to reverse setting Using the voltmeter measure Compare the volt age between 4hle test terminals and the in coming voltage on RDS connector U2 to E gt Is there 5 yoltadifference between the two readings YES Go to 3 3 2 24 NO gt VERIFY The correct jumper configuration has been installed 9 That the RPF light is The switch 8 switch status is COCCCCOC per 3 3 1 AC
24. zero cir cuitry confirmed Proceed to 3 5 1 14 2 NO Verify that jumper JP13 is installed If this still does not correct problem then return to 3 4 2 as level at this point should have been confirmed NO Resistor 25 R26 appear defective gt continuity and replace as necessary 35 1142 gt Observe U14 pin 10 Does waveform appear as illustrated reference block 4 with a positive going level of about 600 millivolts peak and a negative going level of about 200 millivolts peak YES Proceed to 3 5 1 14 3 15 the positive going potential much greater than 600 nfillivolts peak Le 1 5 volts peak or the negative going potential muchagreate han 400 millivolts peak i e 700 millivolts peak f error is ompositive level replace diode 015 if is on negative level replace diode D16 MJ 3A Regulator Control Service Manual Page 3 47 3 Troubleshooting Procedures TEST REFERENCES 3 5 1 15 Magnitude 332333217 Input Circuit TO 91 37 J3 6 AND JP13 8 7 9 10 5 N12 V 5K 0 5 5 5 5k 0 5 VLOGIC a So D19 68HC11 1N4002 i S 2 13 3 12 RN12 RN12 18 48 5K05 5 0 5 3188 0 01gf EN 018 2 4 L o 20 40 3 9 9 20 5 3 48 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedu
25. Page 4 30 RESET CL DA DB Pee COMMUNICATIONS INTERRUPT FUTURE CIRCUIT SOCKET MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation 4 4 2 10 Control Panel Communications Interface The control panel address selection of 0 0 0 on inputs A B and C selects output O pin 13 on the 3 to 8 decoder U10 This occurs when a data buffer transfer is requested from the control panel board It enables the transfer of data into the D flip flop U6 via the 68HC11 PROG data strobe Italso interrupts the 8035 microcomputer and alerts it to prepare for a pending control panel data transfer via the 8035 interrupt input pin 6 The 8035 responds to this interrupt by enabling the U6 D latch outputs via its select 3 to 8 decoder U7 output 0 pin 13 The 68HC11 PROG line is used to inform the 8035 that data has been latched and is awaiting transfer via the U1 T1 input pin 39 The pulse width of the 68HC11 PROG data strobe line is lengthened by monostable multivibrator U15 to 27 microseconds to ensure capture of the data by the 8035 at the T1 input When actual data is sent from the control panel board the PROG line is pulsed to a logi low J1 pin 2 This triggers the following events first the data present at the D flip flop inputs DO D3 is clocked into latch via the 68HC11 PROG strobe at U6 pin 7 Second the 68HC11 PROG d ta strobe from the control panel is routed to the 803
26. yselect decoder 010 This action will in force the associated Port 2 input lines P20 amp P24 low through isolation diodes 01 thru 010 fer any switch contact that is connected to the switch common pin C Likewise for any switch contacts not shorted to the common pin the assOciatedPort 2 input will be pulled low but willremain t a logic high It is in this manner that the switch positions are then decoded by reading the resulting binary code via the Port 2 input lines of the control panel microcomputer Similarly the presence of the VLC module and its activation via the ON OFF switch SW3 is sensed using the 1 4 line on J6 pin 6 When the VLC module is attached to the J6 connector diode 011 is used by the control panel microcomputer logic to determine if a VLC module is present If a VLC module has been attached this will result in the Port 2 input P20 being pulled to a logic low level through isolation diode D11 when the 1 4 line is selected If the microcomputer logic does not sense the presence of the VLC module via this mechanism the VLC option function will remain inactive inde pendent of the position of the VLC ON OFF switch SW3 Once the microcomputer logic has deter mined that the VLC module is present it will then test the Port 2 P21 input line for the position of the VLC ON OFF switch If the switch is in the ON position then P21 willbe pulledto a logic low level via isolation diode 012
27. 1 5 1 3 3 Component Replacement 1 6 Integrated Gircuits Testing Removal Installation 1 6 Replacing Resistors 1 7 1 8 1 4 Modifications and Repair for Printed Circuit 1 8 1 5 Handling of Static SensitiveComponents 1 8 1 6 Conversion Chart Average Rms Peak and Peak to peak Values 1 9 MJ 3A Regulator Control Service Manual Contents 1 TABLE OF CONTENTS SECTION 2 Configuring amp Calibrating the MJ 3A 2 1 Control Panel Board 222 2 1 1 Setting the 8 position DIP 2 2 2 1 2 Setting the Basic Functions 7m 2 2 2 2 Transformer Board 2 3 2 3 Interface Option Board 2 17 2 3 2 3 1 Data Pak Current Display Settings 4 a n 2 3 2 3 2 Setting Data Pak Configuration 2 2 3 2 4 Setting the Accessory Functions 2 2 4 2 4 1 Voltage Limit Control 27 2 4 2 4 2 Voltage Reduction Control 7 2 4 SECTION 3 Troubleshooting Procedures 3 1 Bench Setup for MJ 3A Troubleshooting E A 3 2 3 2 MJ 3A Troubleshooting Strategy 41 1 3
28. 10 25 CAPACITOR CERAMIC O1MFD 5OV DLCRCAW2LIO CAPACITOR CERAMIC 01 50 01 2410 CAPACHOR ELECTROLYTIC 3300MFD 25V ID1CRACI3G33 MDIQDE _______80 1N5818 D1 DDH AA0 001 Dia DIODE RECTIFIER _ 100PIV TAMP 1N4002 ID1DDSABOOO1 DIODE RECTIFIER LAMP 1N4002 DtDDSABOO0 016 DODE DIODE DIODE DIODE DIODE DIODE DIODE Q ho Zt N ojo REDS RO jun IODE 018 IODE DIODE 10244 N DIODE 1025 DIODE SMALLSIGNAL 100PIVO2 AMP _ 1N4148 DIODE SMALLSIGNAL 100PIV0 2 DIODE SMALLSIGNAL 100PIVO2AMP _ 1N4148 Di DDFABOOO 2 SMALL SIGNAL REF 29 MJ 3A Regulator Control Service Manual Appendix D Parts List APPENDIX D 1 Control Panel PC Board N4148 SMALL SIGNAL 100 0 2 D1 DDF ABO 001 N4148 D4 DDF ABO 001 SMALL SIGNAL 100 0 2 SMALL SIGNAL 100 0 2 N4148 DDF ABO 001 SMALL SIGNAL 100 0 2 N4148 D1 DDF ABO 001 D 3 SMALL SIGNAL 100 PIV 0 2 N4148 D1 DDF AB0 001 SMALL SIGNAL 100 PIV 0 2 AMP N4148 D1 DDF ABO 001 SMALL SIGNAL 100 PIV 0 2 N4148 D1 D
29. 2 Configuring amp Calibrating the MJ 3A 2 2 Transformer Board The sensing transformer provides a jumper terminal strip for compensating the regulator to which it is attached As the MJ 3A to be troubleshot has al ready been configured in the field for a particular regulator it is not possible for this manual to de scribe how the you are currently using is configured A complete description on the proce dure for installing these jumpers can be found in the instruction manual For troubleshooting purposes you will be instructed to configure the jum pers for specific tests The transformer board also includes provisions for three auxiliary connections The troubleshooting instructions in section 3 will inform you when to install or remove these jumpers for testing pur poses Automatic Tap change Inhibit The clo sure of an external contact across the AUTO terminals will prevent auto matic only operation of the control This represents the highest level of command in the priority of automatic operation Voltage Reduction Control TheClosure of an external contact across the VRC termi nals will cause the regulatof to to activate one of two VRC modes by the percentage which has been preset on th accessory component Referdo Instruction Manual 21 115527 004 for more de tails The toggle switch on the component must also have beenjset to REMOTE 9 Current Pransformer Secondary
30. Ole 5 42 t u Figure 4 16 Magnitude Detection 22 7 MJ 3A Regulator Control Service Manual Page 4 15 4 MJ 3A Detailed Theory of Operation High Voltage Level Interface Circuits Relay Driver Circuits The Motor Lower RLY14 Motor Raise RLY12 and Source RLY 13 relays are con trolled by microcomputer ports PD3 pin 45 PD4 pin 46 and PD5 pin 47 respectively Relays RLY14 RLY12 and RLY13 all incorporate 150 ohm coils and are powered via the 6VDC regulated voltage source VRELAY Each relay is driven from PNP transistors Q14 Q13 and Q12 respectively n order to supply the current necessary to energize them Resistors R54 R55 and R56 provide the proper base biasing to the transistors to ensure relay turn on under a worst case transistor gain Resistors R53 R57 and R58 provide the necessary biasing to ensure relay turn off when ports and PDS are biased off Diodes D25 D24 and D23 provide relay coil voltage clamping when the relays de energized A separate relay coil ground return path is incorporated to shunt the potentially high circulating relay coil currents away from the more sensitive digital and analog ground returns The P T select relay RLY13 coil Voltagesis brought out to J3 pins 8 amp 9 These pins go to the transformer board where the P Tz compensation relay if installed will also activate This wi
31. Se FRONT PANEL BD al 2 SILKSCREEN COMP SIDE amp 72 01 400 016 415 v 8888 33 E XC MJ 3A Regulator Control Service Manual REF 3 Appendix Circuit Board Layouts APPENDIX A 2 Transformer Boar ABCDEFGHIJKLMNDBDPQORSTUV Ul n a lt e 2 z e 2 o 2 1 m REF 4 MJ 3A Regulator Control Service Manual Appendix Circuit Board Layouts APPENDIX Interface PC Board 4 a 8 6 6 7 6 W 3 R 08 14 5 w m 30 S 3179 30 lt eo lt m gt MJ 3A Regulator Control Service Manual REF 5 Appendix A Circuit Board Layouts APPENDIX A 4 Data Pak Option 90 7 9 9 e 98 NM 9 39 REF 6 MJ 3A Regulator Control Service Manual Appendix Circuit Board Layouts APPENDIX Option z lt lt q o lt m 9 gt MJ 3A Regulator Control Service Manual REF 7 Appendix A Circuit Board Layouts APPENDIX A6 VRC Voltage Reduction Control Option 1 z 3 4 7 9 cw 3 3379 39 REF 8 MJ 3A Regulator Control Service Manual Appendix Block Diagrams A MJ 3A Regulator Control Service Man
32. question address test Connect a scope gt Close the switch continuity If to the switch mux address pins none try again on the cathode side of the PBO PB1 or PB2 The waveforms diode If not evid nt on the anode side but should resemble the illustration ref block 5 Control inputs t IC U17 Outpuf port 3 5 1 18 3 2 9 ee SELECT 5 enabled Support circuit test Verify their signals to 225 test operation of switch 017 m 0 0 0 0 0 Switch address enable logic to mul 0 0 0 1 1 tiplexer Connect a scope to the 5 switch mux outputs YO Y7 U17 0 0 1 0 2 pin 7 9 11 12 13 10 14 and 15 0 0 1 1 3 Waveforms should resemble the 0 10 0 4 if not seen an 0 101 3 5 1 18 3 1 was successful 0 1 1 0 0 1 1 1 7 1 xxx don t care none MJ 3A Regulator Control Service Manual Page 3 55 3 Troubleshooting Procedures 3 5 2 Transformer Board Fault Verified or SHORTINI Suspected IG BAR DPTIONAL gt SOURCE SELECT POWER TRANSFORMER 10 115 ZERO 55 150 POWER 12 115 Page 3 56 8 5 2 8 5 gt 4 3 5 2 3 3 5 2 4 J3 4 10 6 4 1 71 MJ 3A Regulator Control Service Ma
33. 21 1155 27 004 for configuration details TB2 provides for three different functions 1 If the AUTO INHZ automatic tap change inhibit terminals are j mpered tap commands to relays RLY14 and RLYA2 fromrthe control panel logic will be inhibited jumper will however have no effect whem W 2 is in the MANUAL position 72 The contacts on TB2 allow the Voltage Reduction Control module to be activated by remote control when the contacts are closed provided the VRC option is installed AND the control switch on the VRC option module is in the remote mode 3 The C2 and C connection points on TB2 allow for the series connection of auxiliary current sensing apparatus to the nominal 200 mA secondary of the regu lator CT These terminals are shorted at the factory Four transformers provide voltage current refer ences to the control panel board MJ 3A Regulator Control Service Manual Power Transformer T1 9 Potential Transformer T2 Current Transformer T3 PT Zero Cross Transformer T4 4 2 2 241 Transformer The power transf rmer provides the low voltage power Supply source for the MJ 3A control panel controls Excit tion for the primary pins 1 and 4 is obtained from the PDS U2 terminal depending on the position of the control panel External Interna power switch SW11 as previously described The two TT secondaries are connected in paralle
34. 24 x RESISTOR 39KOHM 1 4W CARBON 4 Z RESISTOR 3 9KOHM 1 4WCARBON go 12 R RESISTOR 39KkOHM V4W CARBON 51596 0186 087 R21 12 RESISTOR 10kOHM _______ 1 4 CARBON R23 11 v RESISTOR y4AW CARBON 5 D1 RSCACNO87 IR25 15 R RESISTOR M AWPCARBON 5 166 073 Qe 115 R RESISTOR 1 4 CARBON 1598 01856 121 7 e RESISTOR 2 5 025 _ DI SH AKF001 28 5 R RESISTOR 100OHM 4 swwwiREWND 0 25 D1 RSHLAKFOO1 R29 26 RESISTOR 470 LU AW CARBON 5 7 1 5 65 R32 12 REITOR 510 1 4W CARBON 595 D1LRSCACN 138 R35 _ 20 P RESISTOR 27KOHM 1 4WLCARBON 5 5 07 TOKOHM OHM 1 0K OHM R43 1 0K OHM 1 0K OHM IR46 3 RESISTOR 1 0KOHM RA7 15 jRESIIOR 27KOHM 1 4W CARBON _ 5 ID1 RSCACN 107 15 RESISTOR 100KOHM 1 AW METFILM R50 19 RESISTOR 499 1 4WLMETFILM 1 01885 356 _ R52 4n Y RESISTOR ztROOHM X 01880 00001 R53 2 w RESISTOR 3 9KOHM 1 4WLCARBON 595 ID1 RSC ACNO87 1 AW CARBON 5 R56 14 X RESISTOR 39KOHM
35. 42 MJ 3A Regulator Control Service Manual Appendix Fault Symptoms Guidance APPENDIX G Fault Symptoms Guidance MJ 3A Regulator Control Service Manual REF 43 Appendix Fault Symptoms Guidance Fault Symptoms Lookup Chart This appendix lists fault symptoms in alphabetical order for quick identification Locate the fault symp tom experienced and proceed to the section and page shown SECTION PAGE Alert code message on Data Pak Faulty switch voltage level time delay bandwidth compensation 3 55 Faulty switch VRC Faulty switch VLC upper VLClower x 3 79 3 82 Faulty microprocessor 3 45 9 Line current problems M 3 49 9 Sensed voltage problems eerte 3 42 P T phase input 3 46 Automatic control does not operate manual control 3 05 Circuits control panel board fault suspected Annunciation Mon 3 52 T Magnitude input 2 2 1 4 0 9700022 3 48 9 Zero Cross detection 3 46 9 Current transfornfer ihterface 3 30 DRAG HANDS reset interface
36. Set SW9 DIP switch located on the panel board to its initial Starting conditions Attach the voltmeterto thetestleads Rotate the Operator calibration switch on the side panel until the voltage on the Data Pak and the woltage measured at the test terminals are thesame within 1 8 125 volts of each other Ns the calibration LED illuminated YES Go to 3 3 2 55 NO VERIFY The Data Pak is at the volts set bd bd Option Board section 3 5 6 Refer to section 3 5 3 10 Control Panel Commu nications Interface 3 5 3 9 Control Panel Bus Arbi tration 3 5 3 10 5 XMIT LED Circuit ting ACTION 9 Refer to section 3 5 1 18 Operator Setpoint Switch Logic Page 3 13 3 Troubleshooting Procedures 3 3 2 55 Doesthe Data Pak appear to be operating Correctly YES Go to 3 3 2 56 NO VERIFY The cable from the interface board to the Data Pak is correctly installed ACTION Refertosection 3 5 4 Data Pak Option Board 3 3 2 56 Setthe following DIP switches on the inter face board CT ratio switch 5 to CCOCC set for 200A CT primary rating AMP SWITCH 7 VOLT SWITCH 6 and PF SWITCH 8 all are set to COCC Set power flow for forward Apply full current magnitude Do COMP VOLTS and VOLTS display the same valu
37. and the other a sync output to maintain the phase relationship between the two signals The generator needs to output both sinus oidal and square waves with amplitdde of atleast 5 volts and be adjustable from 0 40 100 Hz minimum Make certain that the generator has Some form of blocking capacitor to isolatewthe Output circuit from the DC voltages that the circuit If the generator does not have blocking capaci tor connect 01 between the generator s output dead and the point of injection into the circuit 1 2 5 Miscellaneous Tools amp Accessories Soldering Iron 9 tip must be grounded and have a 1 8 inch to 3 16 inch chisel point preferably variable power from least 25 to 75 watt Solder Rosin core with a 60 40 tin lead content DO NOT USE ACID CORE SOLDER Hand Tools 9 Long nose pliers Diagonal Cutters 1 8 and 1 4 inch blade screwdrivers 1 16 inch hex Allen wrench 3 8 inch nut driver Miscellaneous Vacuum desoldering tool Desoldering braid utility knife magnifying glass Assortment of test leads and clips DIP test clips rosin flux remover aerosol spray 4 jumpers consisting of 2 5 to 3 of 20 to 26 gauge insulated wire with each end stripped about 1 4 inch 2jumpers consisting of 2 to 2 5 of 16 to 18 gauge insulated wire with each end stripped about 1 8 inch Wire Strippers Regulator Cont
38. connector the presence of diode D 5 is used by the control panel microcomputer logic to determine if a VRC module is present If a VRC module has been attached this will result in the Port 2 input P27 being pulled to a logic low level through isolation diode D5 when the 1 4 line is selected If the microcom puter logic does not sense the presence of the VRC module via this mechanism the VRC option func tion will remain inactive independent of the posi tion of the VRC LOCAL OFF REMOTE switch SW2 Once the microcomputer logic has deter mined that the VRC module is present it will then test the Port 2 P26 input line for the status of the VRC LOCAL OFF REMOTE switch If the switch is in the LOCAL position then P26 will be pulled to a logic low level via isolation diode D6 when the 1 4 select line is activated as previously described If SW2 is in the OFF open position P26 will remain pulled to a logic high when the switch status is read by the microcomputer When SW2 is placed in the REMOTE position OPTO COUPLER U2 will con trol the sensed status of the REMOTE VRC input located on the transformer board Refer to Trans former Board section 4 2 2 2 for more detailed ex planation of the remote VRC input When the REMOTE VRC inputs are shorted on the transformer board OPTO COUPLER U2 is activated through current limiting resistors R2 and R3 and filter itor Capacitor C2 provides additional acafilter ing fo
39. inverters that swing between ground and V with an output resistance of about 2K ohms The input to the inverter is switched between two signals so that the segment driver output is the same as the backplane when LCD segment is to be turned OFF and is BACKPLANE when the LCD segment is to be turned ON The segment and backplane drivers are designed to have equal rise and fall times so that the average DC component across the LCD is less than 25 millivolts The operation of the Data Pak module was briefly discussed in the discussion of the interface board because it is from there that the module receives all its instructions The port 2 arbitrator circuitdiscussed the scanning of switches using the decoder IC U7 Output 4 of this decoder selects the rotary switch on the control of the Data Pak module SW1 to decide what function the user desires to be dis played When selected X O4 on connector J5 pin MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation 9 is low This effectively places the common of the switch at ground potential as well asanylineswhose switches are closed The switch reading is then detected on the port 2 lines throughisolation diodes D1 D2 D3 and D4 in the same manner as the DIP switches on the interface board are read The D flip flop U2 provides logic for additional features on the Data Pak for both updating the power factor LEDs and also for decimal point con trol for the LC
40. observe MOV11 MOV12 MOV13 and MOV 14 for damage Ensure switch is in correct position and provides continuity between contacts Verify that RLY13 is operational Verify con tact continuity is maintained when contacts close Page3 31 _ 3 Troubleshooting Procedures 3 5 1 3 Neutralite Interface TEST REFERENCES e 3 3 2 6 E J 3 5 1 3 1 When the NEUTRALITE is externall ti vated If 120 VAC potential appea R11 but NLT is not glowing t e place the neon light With power off test ce of R63 Replace if resistance is larger than about 21K XN 2 Page 3 32 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 4 Drag Hands Reset Interface PDS 3 5 1 4 1 gt When the DRAG HANDS RESEM is activated 9 The closure of the button results in 120VAC potential on terminal U 14 Ground reference at E MJ 3A Regulator Control Service Manual TEST REFERENCES 3 3 2 8 DRAGHAND 5 N O L 50 If DRAG HANDS reset appears defective first verify that voltage potential is at U11 when button is pressed f potential exists then fault lies external to PDS connector If no potential exists place jumper across SW14 to verify switch integrity Page 3 33 3 Troubleshooting Procedures B TEST REFERENCES e 3 3 27 3 5 1 5 Operations Counter Interface
41. probe to pin 3 reference block 1 volt logic level provided on pin 40 If this ground reference at negative end of is not the case go to 3 5 3 2 itor C2 Does the clock frequency appear clock period is approximately 254 Turn offthesystem Putan ohmmeter across the crystal to ensure there is no short YES If the crystal frequency is displayed gt Verify that the crystal XTAL1 C16 and C17 on the scope then this requirement is are properly soldered and have continuity met f you wete directed here from section 3 3 3 4 then return to next Re verify 3 5 3 1 1 If no frequency yet ap item in currentChecklist pears go to 3 5 3 1 3 NO If clock frequency does not exist go to 3 5 3 12 EJ 35323 Replace XTAL1 Re verify 3 5 3 1 1 After re placement verify that section 3 5 3 1 is sat isfied If not replace microcomputer Page 3 62 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 2 Power Supply TEST REFERENCES 3 3 2 52 6V DC 16 V DC 5VDC 5 VOLT REGULATOR 013 MJ 3A Regulator Control Service Manual Page 3 63 3 Troubleshooting Procedures Connect a scope DVM to reference block 4 ground reference at negative end of C2 There should be a 5 volt reference minus the diode D1 drop Is logic level present YES Verify also that voltage level exists at reference blo
42. 1 If wav formiis absent go to 3 4 1 4 9 waveform appears fault has been isolated to defective transformer board Refer to section 35 2 1 transformer board l 3 3 4 1 4 Verify that from board is not causing the problem Connect a scope or DVM to pin 4 of connector J2 as done in 3 4 1 3 but this time at the control panel board MJ 3A Regulator Control Service Manual f waveform is still absent go to 3 4 1 5 f waveform appears fault has been isolated to defective connector OF solder connection Repair it and continue with 3 3 2 1 3 4 1 5 gt Verify that power is getting to the contro panel board Connect a scope PDS con nector inputs on the control panel board 5 between U2 E ground signals f waveformMais still absent go to 3 4 1 6 If waveform appears fault has been is lated to defective control panel board electrical section Refer to section 3 5 1 2 potential amp utility wind ing interface 3144 6 Kind out why PDS connector is not getting power It appears that either the excitation source is turned off or is malfunctioning and this is beyond the scope of this manual Page 3 21 3 Troubleshooting Procedures Reference for test instrument ground to be made at connector Reference for test instrument ground to be made at connector
43. 2 19 REF 34 APPENDIX D 3 Interface PC Board Option 3 4 REF 35 APPENDIX D 4 Data Pak PC Board Option 22 REF 36 APPENDIX D 5 VLC Voltage Limit Control Board Option REF 37 APPENDIX 0 6 Voltage Reduction Control PC Board Option REF 38 APPENDIX Data Pak Option Alert Codes Alert Code Definitions REF 40 APPENDIX Troubleshooting with the4Operational Simulator Operational Simulat6r Initial Setup REF 42 Operational Simulator Notes 42 APPENDIX Fault Sympt ms Guidance Faul Symptoms Lookup Chart REF APPENDIX H Diagnostic Quick Reference Test Point Quick Reference Table REF 48 MJ 3A Regulator Control Service Manual Contents 7 TABLE OF CONTENTS Introduction Introduction Purpose of Manual The intent of this manual is to enable troubleshoot ing and repair of the MJ 3A regulator control in the most effective manner possible Supplemental sec tions provide detailed information regarding circuit operation to provide detailed information at every level The systematic strategy used in this manual provides procedures for analyzing trouble symp toms localizing faulty circuits and isolating defec tive components This fault finding strategy starts with what you know a symptom and it
44. 3 36 3 5 1 8 Power Supply Low Voltage Logic Reference 7 3 37 3 5 1 9 Power Supply Low Voltage A D Reference 22 1 3 38 3 5 1 10 Oscillator ym 3 39 3 5 1 11 Reset Circuit 3 40 3 5 1 12 P T Zero Cross Detection Circuit 4 3 42 3 5 1 13 Magnitude Input Circuit 3 44 3 5 1 14 Zero Cross Detection Circuit ee 3 46 3 5 1 15 Magnitude Input Circuit L 2 3 48 3 5 1 16 Relay Driver Circuits 7 3 50 3 5 1 17 Circuit AnnunciationLogic 3 52 3 5 1 18 Operator Setpoint Switch ogic 2 3 54 3 5 2 Transformer Board Fault Verified orSuspected 3 56 3 5 2 1 Sensing Transformer 2 2 3 57 3 5 2 2 Power Transformer T1 4 3 58 3 5 2 3 Zero Cross 14 3 59 3 5 2 4 CT Transformer T37 23 3 60 3 5 3 Interface Option Board Fault Verified or Suspected 3 61 3 5 3 1 Oscillator Microcomputer Modes 3 61 3 5 3 2 Power amp 3 62 3 5 3 3 Microcomputer Memory Management 3 64 3 5 3 4 Power 3 66 3 5 3 5 Reset 3 68 3 5 3 6 PortZ Arbitrdtion Logic 3 70 3 5 3 7 Switch
45. 4vith power turned off verify that no continuity exists at the following normally open contact terminals 4 amp 5 of RLY144 MJ 3A Regulator Control Service Manual TEST REFERENCES 3 3 2 11 3 3 2 12 3 3 2 13 3 3 2 15 3 5 1 6 3 Verify contacts 4 amp 5 of RLY12 close when that relay activation is requested Replace relay if defective 3 5 1 6 4 Verify contacts 4 amp 5 close when RLY14 activation is requested Replace relay if defective 35165 Test resistance of R12 and R13 Replace if not per rated value Ensure C12 and C13 do not appear damaged replace if necessary Page 3 35 3 Troubleshooting Procedures 3 5 1 7 Power Supply Low Voltage Rectification 3004 53006 3 5 1 7 1 gt Connect a scope tof DYM to location pointed to by test points TP15 Ground TPG Is there a rectified signal of about 13 to 18 V DC present at this point YES 4f the voltage level is observed at 5 VREcT then this test passes Re tojnext item in current checklist e was previously established that AC volt ge is present at location pointed to by reference block 43 on preceeding page Verify before proceeding to sec ti n 3 5 1 7 2 9 If AC is not present then go back to 3 4 1 1 otherwise proceed to 3 5 1 7 2 Page 3 36 TEST REFERENCES
46. 5 1 17 Circuit Annunciation TEST REFERENCES Logic 3 3 2 2 3 3 2 3 3 3 2 5 3 3 2 9 3 3 2 10 3 3 2 17 3 3 2 54 49 RN13 WATCHDOG 1K 5W amp 5 97 LED13 2 1 4 19 pag LED14 PA6 5 io LOW cs 1K 5W Pas 2225 ro PA4 6 LED17 Page 3 52 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 17 1 3 5 1 17 3 Doyou wish to verify that a LED is turned VERIFICATION OF LED IN ON STATE OFF or ON Each of the seven LEDs LED11 LED17 OFF Goto 3 5 1 17 2 have their anode side tied directly to the VRECT volt supply Thus when one of ON Go to 3 5 1 17 3 these LEDs is activated ON the other side of the LED cathode side shodld be at 0 3 5 1 17 2 volts For verification purposes this implies VERIFICATION OF LED IN OFF STATE pu river must be at low state All of the seven LEDs LED11 LED17 0 volts if the LED driver must be at a low have their anode side tied directly to the state 0 volts if the LED isto be ON volt supply Thus when one of these LEDs is de activated OFF the other side of the LED cathode side should also be at bd 15 the U18 driver output for the LED question at a fogielow 0 volt potential the appropriate logic high reference YES Verification
47. Control Service Manual Appendix D Parts List APPENDIX D 3 Interface PC Board Option 1 T RESISTOR 1 4 CARBON 1 5 107 RESISTOR 1 4W D1 RSF ACH 289 R RESISTOR 1 4W MF D1 RSF ACH 388 L RESISTOR 1 4W CARBON D1 RSC ACN 073 L RESISTOR 1 4W CARBON D1 RSC ACN 107 L RESISTOR 1 4W CARBON D1 RSC ACN 107 M RESISTOR 1 4W GARBON D1 RSC ACN 073 J RESISTOR 1 4W CARBON D1 RSC ACN 133 J RESISTOR 1 4 D1 RSC ACN 087 L RESISTOR 1 4W GARBON D1 RSC ACN 133 K RESISTOR 1 4W GARBON D1 RSC ACN 133 K RESISTOR 1 4 CARBON D1 RSC ACN 122 M RESISTOR 1 4W D1 RSF ACH 331 K RESISTOR 1 4W MF D1 RSF ACH 331 K RESISTOR 1 4 MF D1 RSF ACH 388 RESISTOR 1 4 CARBON D1 RSC ACN 039 G RESISTOR 1 4W CARBON D1 RSC ACN 073 K RESISTOR 1 4W CARBON D1 RSC ACN 129 H RESISTOR 1 4 CARBON D1 RSC ACN 097 G RESISTOR 1 4W CARBON D1 RSC ACN 097 J RESISTOR 1 4W CARBON D1 RSC ACN 087 H RESISTOR 1 4W CARBON D1 RSC ACN 097 G RESISTOR 1 4W CARBON D1 RSC ACN 133 E RESISTOR 1 4W CARBON D1 RSC ACN 087 H RESISTOR 1 4W CARBON D1 RSC ACN 097 1 RESISTOR 1 4 CARBON D1 RSC ACN 049 G RESISTOR D1 RSO A00 001 G RESISTOR D1 RSO A00 001 G RESISTOR D1 RSO A00 001 G RESISTOR 1 4W CARBON D1 RSC ACN 057 P RES NETWORK SIP D1 RSF FCJ 099 G RES NETWORK SIP D1 RSF FCJ 099 N CAPACITOR 220 MFD 25V D1 CRA CT2 H22 M CAPACITOR 10 MFD 25V D1 CR2 CT1 J10 S CAPACITOR 10 MFD 25V D1 CR2 CT1 J1
48. DIODE SMAUESIGNAL ______ 100 0 2 N4148 DIODE _____ SIGNAL ______ 100 PIV 0 2 AMP N4148 DIODE 4TSMAtESIGNAL 100PIVO2AMP 4148 D1 DDF AB0001 D60 DIODE 5 ____ 100 2 1 4148 D1 DDFABO001 10661 392 DIODE 4 SMALLSIGNAL 100PIVO2AMP 1N4148 Di DDFABOO0 gt 1062 32 ___ C a SMALLSIGNAL 100PIVO2AMP 1N4148 _ jDt DDFABOOO 063 32 DIODE ISMALLSIGNAL ____ 100PIVO2AMP _ 1 4148 2 064 32 7 99 SMALLSIGNAL 100PIVO2AMP 1N4148 Dt DDFABOOO i 100 PIV 0 2 AMP 06 32 5 000 SMALLSIGNAL _____ 100 PIV 0 2 100 PIV 0 2 069 132 215 M4DIGDE _ SMALLSIGNAL 100PIVO 2AMP 1N4148 DI DDFABOOO D70 132 DIODE 5 SIGNAL 100PIVO 2AMP D71 42 DIODE ____ 100PIVO2AMP 1N4148 DI DDFABOO0 432 a LED RED RIGHTANGEE 010018 0004 12 37 887 ILED REDLHIINTENSITY J 01100024001 ILED13 00 D YELHIINTENSITY 0100024002 ILED14 3 CC up 0110002401 ItED15 31 BB LED REDHIINTENSITY j 1 1100024001 ItED16 9 up REDLHIINTENSITY 101100024001 a 31 ip REDHIINTENSITY __ Ipt iooo24001 4 R BRIDGERECTIFIER 100PIV2AMP 01884000
49. DVM with ground reference at J2 7 that the incoming AC voltage waveform reference block 1 ap pears going into transformer T1 primary on terminal J2 4 YES Verify that waveform at refer ence block 2 ground reference at J3 2 appears on secondary of transformer v Page 3 58 TEST REFERENCES 3 4 1 Note that secondary is 10 115 of the primary If waveform is there transformer is OK NO Verify that contacts are touching on connector Look for broken solder traces Verify that power source exists on the control panel board MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures TEST REFERENCES 3 4 2 24 3 4 4 ZERO 55 150 POWER 12 115 AUTO TAP INHIBIT UA 5 3 5 2 3 Zero Cross then verify the raw is entering If it Transformer T4 is yet there is no rectified output replace BR1 otherwise continue Ensure that voltage on Data Pak display or AUTO NH opto isolator verification Ver on voltage test terminals 45 120V ify that terminal J3 pin 10 is at 6 volt DC rms potential reference ground at OC 1 opto isolator 1 pin 4 When the TB2 AUTO INH contacts are jumpered 0 volts should be seen at terminal 10 If itis still at 6 VDC then replace OC 1 bd Verify on scope or DVMa with ground reference at J2 7 thatthe incoming waveform refer
50. F ACTION Press control panel reset button SW10 If light remains on then fault has been isolated to defective control panel board Refer to section 3 5 1 17 Circuit Annunciation Logic e 3 5 1 11 Reset Circuit MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3323 Is the alert light illuminated YES Go to section 3 3 2 4 NO VERIFY The CT magnitude was discon nected per initial setup in 3 3 1 and appendix F ACTION Press control panel reset button SW10 located on the right side of and behind the control panel If light remains on then faulthas been isolated to defective control panel board Refer to section 3 5 1 17 Circuit Annunciation Logic e 3 5 1 14 Zero Cross Detec tion Circuit 3 5 1 12 Zero Cross Detec tion Circuit e 3 5 1 11 Reset Circuit 3 3 2 4 gt Is voltage present at the voltmeter test ter minals on control panel YES to 3 3 2 5 NO VERIFY Jumper P 14 loose or not in stalled on transformer board ACTION 9 trouble Symptom has been identi fied next step is to localize the fault to functioning module pro ceed to 3 4 2 3 32 5 Make necessary adjustments such that the measured voltage voltage level read from the voltage test terminals or read from the Data Pak is 3 4 volts less than the setting on the voltage le
51. It is highly recommended that this sec tion is read before any troubleshooting is attempted regardless of your level of experience because of the variety of voltage levels present on the MJ 3A control of which you must be aware Section 2 provides key switch setting configura tions as well as calibration procedures This section is used when troubleshooting to verify that the system is properly configured as well as providing information on re calibrating after repairs have been made Section 3 is a systematic and logical approach for locating specific faults in the MJ 3A control by ob serving the symptoms This section ensures that before any troubleshooting is begun a strategy is used which will enable you to pinpoint the faults most efficiently Oscilloscope wave forms are pro vided to verify proper performance at key nodal points This section is designed to provide the most efficient techniques to trap faults quickly regardless of your level of understanding of MJ 3A circuit operation Section 4 describes the entire circuit operation for maximum troubleshooting effectiveness Each cir MJ 3A Regulator Control Service Manual cuit is individually described in detail Reading this section will provide a greater understanding of the data observed in section 3 and provide the trouble shooter with a greater insight of MJ 3A operation Appendix Sections This section contains the most used references needed in all other section
52. PB2 necessary to select a particdlar switch is listed adjacent to the following switch f nctions using the convention PB2 PB1 PBO REMOTELY ACCESSED option module switches 1 0 1 VRC percentage switch 0 0 1 Upper VLC limit control switch 0 1 0 Lower VLC limit control switch MJ 3A Regulator Control Service Manual 7 T9 022 144002 6 27K 2 5 U14 LM139 4700 SW10_ 2 MANUAL RESET e MRECT s 1 510 C32 Ge 0 11 2 9 170 0 toggle switches for and VLC MJ 3A Detailed Theory of Operation 68HC11 RESET Function The 68 11 microcontroller contains on chip logic to automatically detect system RESET conditions The RESET pin on the 68HC11 provides an active low bidirectional control signal to initialize the microcontroller to a known startup state during power up or detection of a system failure The bidirectional RESET signal is significantly different from RESET signals used in earlier microcontrollers since it can be activated either from external RESET logic or its internal RESET system Under normal operating conditions the RESET input pin 39 is held at a high 5vdc logic level by pull up resistor R34 Transistor 015 provides an open co lector input to allow either an external logic reset or an internal self generated 68HC11 reset Should an internal 68HC11 reset condition occur it will not propagate to the board SYS
53. a safe operating level puts the NOVRAM jfito a RECALL state when first applying power to the system POWER DOWN STORECEUNCTION The powe down STORE function is activated by a logic high to low falling edge transition at the B pin 11 of the monostable multivibrator 014 This trigge action will only either the 5VDC logi referenc 6n 16VDC low voltage threshold detec tion logic senses a low system voltage condition This4forces the normally high QZ pin9 of the multivibratorto go low for the duration determined by C15 and R25 1ms thereby triggering an auto matic NOVRAM store operation the ERAM STORE output signal The resulting pulse is at least IO times the necessary pulse width required by the NOVRAM for a store operation 16VDC SVBC Dee Rel JNSB18 i R14 uo 2741 ner 5 5 107 1 220K igure 4 24 Power MJ 3A Regulator Control Service Manual VRAM fae VRAM 330K 1453B 014 oe 9 cp VRAM RECALL R25 ERAM 7 auf 10k TOR NOVRAM onitor Circuits Page 4 25 4 MJ 3A Detailed Theory of Operation POWER UP RECALL FUNCTION The power up RECALL function is triggered by a logic low to high rising edge transition at the A pin 4 input of the monostable multivibrator U14 This trigger action will only occur when both the 5VDC logic refer ence and the 16VDC low voltage detec
54. and figure 1 2 on the next page Occasionally a precisi n or power resistor may have the value stamped letter Kor M may be used at timesato signify a decimal point K 1000 000 000 for multiplier PrecisionZresistors may be marked with a J G F D C Or Bas the last character This indicates the tolerance and is per the chart below Figure 1 1 Resistance Color Code Chart MJ 3A Regulator Control Service Manual Page 1 7 1 General Information Replacing Capacitors hen you install a polarized capacitor always iden ify the markings near the leads One lead will have a positive mark or a negative mark near it Be sure to install the positive lead in the positive marked hole or the negative lead in the negative marked hole Be careful as only one lead may be marked Capacitors will be called out by their capaci tance value in pF microfarads nano farads pF picofarads and type ceramic Mylar or any other plastic material electro lytic etc The last character coded on the ca pacitor refers to its tolerance and can be found in the tolerance chart shown in figure 13 Figure 1 2 Resistor Tolerance Chart 10 pf ORMLESSN OVER 10 0 apf 0 25 0 5pf 1 0pf 1 2 0pf 2 3 5 10 20 Figure 1 3 Capacitor Tolerance Chart Page 1 8 1 4 Modifications and Repai
55. ground and 5 volts DC exist YES Monitor collector of transistor Q2 If it is a steady state 5 volts then either R6 or Q2 is defective If the square wave appears here too then either LED2 or R7 is de fective O If sections 3 5 10 1 thru 3 5 10 4 have been verified yet there is no output on P14 then replace U1 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 4 Data Pak Option 3 3 2 55 3 3 2 57 3 3 2 59 Board Fault Verified or Suspected Jo 3 85 8 1 5 v 2 dam ere Dc a a cr c nc pal Pel Y DGP PAS 1 Ps k f le 5 2 2 p ON EARLIER REVISIONS Mme en runde T 1 Sw PIN TO Ul 1 1 amp 0 4 ALL MOIES ARE jM414B 4 3 ALL RESISTORS ARE 1 4V 51 mi ues 2093 DP 649 SEC ELLA emus de See 3 5 3 9 2 1 11 10 9 3 0 0 10 2 04 oe 10 SEC MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 354 1 3 5 4 3 Verification of rotary switch operation Monitor reference block 6 waveform to v Verification data transmission to Data Pak bd
56. heading eals with the other two modes which haven t as ztyet been discussed The first topic deals with decod Xing switch settings on the interface and Data Pak boards which use the Port 2 lines in their quasi bi directional mode The second and third topics Data Pak interface logic and control panel commu nications logic respectively use the port expander mode Switch Decoding DIP switches SW5 SW6 SW7 and SW8 are located on the Interface PC board and serve as config ra tion inputs for the Data Pak CT Ratio Volts Amps and Power Factor display functions The Data Pak rotary switch informs the microcomputer of desired display function The SW4 pushbutton performs a Data Pak Drag Hands reset function thereby clearing previously saved min max values in NOVRAM All these devices are selected by a CMOS decoder U7 Port lines 11 P12 R13 and P17 determine which device has access to the Port 2 bus at the appropriate point switches are time multiplexed into Port 2 one switch device will be selected at a time and no device will be selected if the inhibit INAYine ts high The outputs of the switthes are diode isolated and wire ORed to Port isolation diodes D2 through 019 When the appropriate switch address is se lected via U7 o tp ts O through 7 the common to the switch will ground potential Any closed switch will orce the appropriate Port 2 P20 thru P
57. increments The lower VL Gset point range is from 105 to 120 volts rmssim onegvolt increments Both switches are binarylencoded type switches 4 6 2 Detailed Schematic e AppendixC page REF 25 As discussed briefly in the Operator Setpoint Switch Logic section of the Control Panel PCB section the reading of the VLC setpoint switches and control of the upper lower limit LEDs are controlled via the Gontrol Panel PCB microcomputer U1 program logic The interface board 3 to 8 decoder U10 is used to select each switch and the D latch U1 on the VLC module in the same manner as described for the Control Panel setpoint switches The control Page 4 34 panel microcomputer via Port 1 selects the specific device at the appropriate time by applying the necessary binary code to the I O select decoder U10 inputs and C pins 11 10 and 9 This action will then activate the specified output of the decoder 010 which is then routed to the proper I O device For the VLC module four select outputs are used for control offthe VLC indicators and reading of the 5 The VLC UPPER SW1 LOWER SW 2 switches are enabled the O1 and 1 O2 lines respec tively These lines are routed to the VLC module via connector J6 pins 4 5 The specific switch information is read bythe micr computer by driving their common switch inputs pin C to ground po tential low the
58. nce block 1 appears going into transformer 74 primary on ter minal J2 4 VRC opto isolator verification Verify that YES WVerify that reference block 2 terminal J3 pin 12 ata 13 to 18 VDC potential reference ground at negative ground reference at J3 3 appears end of C2 on control panel board When secondary f transformer Note that dar is 12 115 of the pri if the TB2 VRC contacts are jumpered the 12 13 to 18 volt DC level can be seen at waveforms are there transformer is terminal 11 of J3 If not then replace OK if not replace transformer 4 2 e NO Verify that contacts are touching connector Look for broken solder traces Verify that power source exists on the front panel board and on trans former T1 Verify that the rectifier for the opto isola tors is operating correctly If 20 volts DC does not appear at the output of BR1 MJ 3A Regulator Control Service Manual Page3 59 3 Troubleshooting Procedures TEST REFERENCES 3 43 Je J3 15 3 5 2 4 Transformer Note The secondary is the same magnitude and the same phase as the Ensure that incoming current level is set for primary thesame magnitude because the 200mA transformer ratio is 1 to 1 and the same gt Verify that theincoming AC waveform ref phase because of the direction of current erenc block
59. of LED in ON state VRECT For verification purposes this im confirmed plies that the output of U18 of the associ e If the potential of the driver output ated LED driver must be at a high state if 16 volts then the LED is the LED is to be OFF being directed to deactivate If you be Is the U18 driver output for the LED in this to be correct then go to question at a logic high potential 3 5 1 17 2 If you believe this to be YES Verification of LED in OFF state incorrect operation then continue The LED is being told to illuminate due to confirmed the 68HC11 directing it to do so or else NO If the potential of the driver output a fault exists most likely with the U18 was low 0 volts then the LEDgis output driving it or a defective LED being directed to activate If yos be lieve this to be correct then g t 0 3 5 1 17 3 If you believe this to be incorrect operation then continue the respective output port of the gt The LED is being told to illuminate Dy the 68HC11 PA4 PAS PA6 PB7 and 68HC11 or else a fault exists most likely PB8 at a logic high high 5 volts with the 018 output driving it YES This is as it should be for an ON state If LED is not illuminated then 3 5 1 17 2 1 verify series resistor R38 R44 pullup o resistor network RN13 in question or Is the respective portOf the68HC11 replace U 18 driver because
60. or a falling edge trigger to occur on the monostable m ltivibrator B pin 11 NOVRAM STORE input When the input voltage at the PDS 02 input goes above the maximum threshold point typically greater than 85 the voltage appearing nonsnverting comparator input pin 5 is greater than the 5VDC applied to the non inverting input This results in the compara tor output pull d high via resistor R21 It should be noted thatthe low voltage detect minimum maxi mum thresholds Will fluctuate slightly with the level of loading the 16VDC supply The45VDC logic reference threshold detection logic consists of transistors Q3 Q4 and Q5 resis tors R16 R17 R19 R20 R26 zener diode D23 and capacitor C11 When the system is initially powered p zener diode 023 is not conducting because its voltage potential is less than 4 5 volts formed by the 3 9 volt zener plus the emitter base voltage of 0 6 volts This biases transistor Q4 out of conduction and transistors Q3 and Q5 in conduction via R17 R19 and R20 forcing the RECALL input to the NOVRAM at ground This action forces the NOVRAM in a recall mode thereby inhibiting any STORE inputs during power up As the 5 volt supply begins ramping above 4 5 volts zener diode D23 will begin to conduct biasing transistor Q4 into conduction This will turn offtransistor Q5 releasing the RECALL line Conversely when the 5VDC logic supply falls below the 4 5 volt thresh
61. pin 5 and 8 thru 11 P20 thru P24 Monitor each of these four lines to verify port activity reference block 7 from section 3 5 4 provides a sample snapshot of activity Do you verify this YES Verify that the PROG line reference block 4 in 3 5 3 10 is actively selecting the VLC for data transmission and that reference block 3 waveform exists to en able the data going into U1 9 NO Check these same port lines on the same pins as above but look at the inter face board instead Verify that the connec tor is tight If data transmission fails to materialize refer to section 3 5 3 6 3 5 5 2 Verification of LED operation Complete 3 5 5 1 before proceeding with this section as it is assumed that VLC data trans mission has been verified LEDs can be tested by putting the rotary switch into a voltage level setting higher than the actual measured voltage lower limit LED active orlowerthan the actual measured voltage upper limit LED active Doing so will ensure that ofthe lights will be on the other off The easiesbway to test the LEDs is to verify thatsene LED is lit then change to the voltag condition and verify that the opposite LED state is now true Does each light performgas described YES Verification ef LED operation com plete NO Did at least one LED illuminate YES Go t0 3 5 5 2 1 02 be defective if neither LED willlight Input to tran
62. set of TB1 jumpers The resolution of the compensation wind ings at 120 volts is in 1 volt increments over a 7 volt rms range with the corrected P T voltage ap pearing at the Volt Test terminals located on the control panel The voltages appearing at the 4 7 4 MJ 3A Detailed Theory of Operation JP11 TO 91 19 Zero Cross Detection Circuit Zero crossing information is derived via scaling transformer T4 transformer board for processing by the microcomputer input IC1 pin 6 The zero cross signal is routed through currentlimiting resistor R16 bipolar diode clamps 127 1912 and zero crossing comparator 714 The diode clamps 011 and 012 limit th maximum input excursions applied to the 014 input to within 1 volt peak 011 0 5 peak 012 over the entire T4 output operating Voltage range of 13 to 26 VAC Diode D12 is a Schottky type to ensure that the negative voltage excursions are limited to a maximum of 0 5 volts This is necessary to guarantee proper peration i e no phase rever sals of comparator 014 the presence of negative input voltages below its negative power rail This clamping technique minimizes zero cross phase error resulting fromthe offset threshold uncertainty of comparator 074 by clamping the output signal without sacrificing its effective rate of change value as it crosses zero The inh
63. square root of the squared sums bd Observe U15 9 Does illuStrated reference block 6 waveform appear Thisvalue is now directly related tothe true rms current circulating through the C2 C YES Proceed to 3 5 15 3 terminals of the transformer board see NO Replace RN12 015 Equationin section A X 3 5 1 15 3 form appear as illustfated feference block 3 with a half wave rectified level of about 1 8 volts peak YES Proceed t 3 5 1 15 4 NO Possiblebad diode 017 or IC U15 With power off do continuity test on 0177 bad replace it If OK then sus U 15 MJ 3A Regulator Control Service Manual Page 3 49 3 Troubleshooting Procedures 3 5 1 16 Relay Driver Circuits TEST REFERENCES 3 3 2 13 3 3 2 14 3 3 2 15 3 3 2 18 PDS U1 68HC11 PD4 3 5 1 16 1 Note Normally open normally closed Do you wish to verify that a relay is turned OFF or ON OFF Goto 3 5 1 16 2 ON to 3 531 163 3 5 1 16 2 VERIFICATION OF RELAY IN OFF STATE gt the three relays RLY12 RLY13 RLY T4hav a common side of the coil tied to analog ground Thus when a relay is de activated OFF the other side of the coil should also be at O volts For verifica tion purposes this implies that the cath odes banded sides of the associated flyback diodes must be at O volts if the relay is to be OF
64. switch operation Follow same procedure as in 3 5 5 3 Verify activity on J6 pin 6 for toggle switch monitor 3 5 5 5 Verification of VLC being actively selected Ensure diode 011 is OK otherwise the control panel board will not recognize the existence of the VLC option board being installed MJ 3A Regulator Control Service Manual Procedures 3 Troubleshootin swa REMOTE DFF LDOCAL 6YDC N N m e uJ 2 prag uJ a 1 ALL DIODES ARE 1N4148 s 2 GRIGSBY SWITCH 5 12C48 uw 3 ALL RESISTORS ARE 1 4 5 0 4 CS ADDED TO LATER REVISIONS 200 5 7 252 2E 220 gt cu 2 9 gt J Page 3 81 MJ 3A Regulator Control Service Manual bd Verification data transmission to Data is directed to the VRC from the interface board via J7 pins 4 thru 7 P20 thru P23 Monitor each of these four lines to verify port activity Reference block 7 from section 3 5 4 provides a sample snapshot of activity Do you verify this YES Verify that the PROG line J7 pin 9 reference block 4 in 3 5 3 10 is actively selecting the VRC for data transmission and that reference block 3 exists to enable the data going into U1 NO Check these same port lines on the
65. test procedure Fora quick test of the logic for these circuits verify the waveforms as illustrated For a through test of this circuitry refer to the following circuits Control Panel Communications Interface 3 5 3 10 VIC Voltage Limit Control 3 5 5 VRC Voltage Reduction Control 3 5 6 Page 3 74 Regulator Control Service Manual 3 Troubleshooting Procedures H TEST REFERENCES e 3 3 2 53 3 5 3 10 Control Panel Communications Interface TD FRONT PANEL BUS TO RORY BUS TD OUTPUT SELECT LINE OF UIO 3 pero 1 FUTURE INTERRUPT EXPAND 8022 2 EXPANDED BUS MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 10 1 When the control panel communicates with the interface board it first sends a request for a data buffer transfer on U6 pin9 This wave form is illustrated in reference block 3 Can you see its presence on flip flop U6 YES Go to 3 5 3 4 2 NO If you do not see at U6 but you see it at U11 pin 3 then replace U11 If you see it at U11 but you don t see it at U10 pin 13 on page 3 86 then verify that reference block 2 on same page exists on U10 inputs 9 10 and 11 Also verify waveform on U10 pin6 reference block 1 If seen at only U10 inputs then replace U10 If not then verify goo
66. the following signals as a minimum Line voltage potential 110 to 130 volts rms at U2 and P2 inputs of PDS connector No input to C2 input on PDS con nector When current flow is re quired input must be applied Page3 5 3 Troubleshooting Procedures Note Without a simulator you may not be able to complete many observations and operations directly However you may be able to improvise 3 3 2 Fault Symptom Verification Section 3 3 2 leads you through the necessary steps to determine not only the faulty circuit board but in most instances what circuit sub system is defec tive as well This procedure can be used as both an initial fault verification as well as a final inspection once the board has been fixed to ensure fault correction If you do not know the specific fault or are unsure that one exists then proceed with this section If you are aware of a specific fault then instead of starting at the beginning of section 3 3 2 look up the fault in Appendix which lists them alphabetically There you will find a section number that go directly to in this manual When this section is completed one of two things will be true 1 a fault was NOT verified because an essential operating requirement was overlooked thus nodault exists or 2 fault was verified which will be iso lated in later sections if the failure mode crosses more than circuit board or can be
67. the inputs of U8 to verify where signal is blocked Replace either U8 or U9 if signal is blocked MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Test References e 3 3 2 59 3 5 3 4 Power Monitor Circuits TD RESET CIRCUIT 16VDC 5VIC ERAM RECALL ERAM ERAN fro NOVRAM oo 20 30 40 40 3 3 MJ 3A Regulator Control Service Manual Page 3 67 3 Troubleshooting Procedures 3 5 3 4 1 gt Under normal operating conditions are the Transistor Q4 is biased on when there is areas pointed to by reference block 4 at a logic high as shown YES There are no apparent problems with the logic but due to the fact that the circuit is not activated until voltage is ramped up or down a problem could be hidden If Data Pak circuit drag hands behavior ap pears abnormal then continue with proce dure NO Go to 3 5 3 4 2 3 5 3 4 2 Comparator input pins monitor the 5 volt logic reference and a derived reference of roughly 8 volts as illustrated by reference block 2 If about 8 volts is not observed then verify components R13 R14 R15 and D22 When the supply voltage is lost the 16 volt supply ramps downward while the 5 volt sup ply remains constant at least for some milli seconds When the input reference on U12 pin 5 is less than 5 volts then the output pin 7 will be low Does this hap
68. the voltage level or voltage level switch such that the measured voltage is at least 4 volts lower than the voltage setting Wait for J light to illuminate 30 seconds then return the voltage level setting to within 1 5 volts of the measured voltage y Provide low current less than 2 mA on terminal 2 by turning the current magni tude potentiometer on the simulator counter clockwise This will cause the ALERT light to illuminate Ensure that the measured voltage is at least 4 volts less than the voltage setpoint Wait 30 seconds Is it true that neither the J light or the K light came on YES Go to 3 3 2 20 NO VERIFY 9 Position 2 of the 8 position DIP switch is closed ACTION 9 Referto section 3 5 1 18 Operator Setpoint Switch Logic Regulator Control Service Manual 3 Troubleshooting Procedures 33220 _ Reopen SW9 switch position 2 2 of th the 8 position DIP switch Did the J light turn on YES Goto 3 3 2 21 NO VERIFY The conditions per 3 3 2 19 have been met ACTION Referto section e 3 5 1 18 Operator Setpoint Switch Logic 2 3 3 2 21 Turn power OFF to all of the system Is arelay installed in RLY 1 of the transformer board YES Go to 3 3 2 22 NO to 3 3 2 24 3 3 2 22 Re configure the jumpers on the 12
69. when the 1 4 line is acti vated as previously described Otherwise P21 will remain pulled to a logic high when the switch is in the OFF open position The D latch U1 allows for control of the VLC upper lower LEDs The two latched U1 outputs QO pin 3 and Q1 pin 4 are used to turn off on the LOWER LIMIT and UPPER LIMIT LEDs respectively The outputs are always in an active logic state as a result of the output enable lines QB pin 2 and QA pin 1 being tied to their active state The D latch MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation inputs are enabled via the I O3 line routed from J6 pin 12 and attached to the DA pin 9 latch enable line As previously described is controlled by the control panel microcomputer Port 1 logic and is enabled only at the appropriated time Resistor R1 provides the necessary pull up biasing for DA when 01 has been deselected via O3 Once the D latch has been selected the desired LED on off status presented at the DO pin 14 and 01 pin 13 inputs by the microcomputer is then clocked into the D latch inputs via the clock pulse generated from the PROG line of the control panel microcomputer The PROG pulse is routed from connector J6 pin 14 to the D latch clock input CL pin 7 This accordingly sets the outputs of the D latch and 1 Resistors R3 and R4 provide proper biasing of transistors Q2 and Ql which in turn satisfy the drive require
70. which are pin compatible to the 8035 but as the greatest numberof interface boards produced use the 8035 the 8048 8748 will be referenced 4 4 Interface PC Board only in specifi amp instances Option The 8035 is configured in 40 pin Dual In Line Pack age DIP contains 8 bit CPU central process 0 9 62 bytes of RAM memory 27 I O lines an internal 8 bit timer and operates on a single 5 volt 4 4 1 Inte rface PC Board 7 powersupply The 8035 relies external program erview memory whereas the 8048 has 1K 1024 bytes of int rnal ROM read only memory and the 8748 has 1K of internal EPROM electrically programma ble ROM Circuit Board Layout The interface board uses the microcomputer in its Appendix A page REF 5 expanded mode to operate with external memory In this application the program memory is stored in Block Diagram EPROM U2 System parameters are stored in a special type of nonvolatile RAM called NOVRAM Appendix B pages 14 U3 and U4 This topic will be discussed in detail under the Microcompter Memory Management The interface board is so named because it inter heading faces the control panel withthe option mod ules The bus port can operate in three different modes as a latched I O port as a bi directional bus port Data Pak Display as a program memory address output when external memory is used The bus port lines are either active Volt
71. 0 M CAPACITOR 2200 MFD 25V D1 CAA CTO G22 Q CAPACITOR 2700 PFD 500V D1 CRL BT N27 T CAPACITOR 0 1 MFD 50V D1 CRC AW2 L10 M CAPACITOR 1 0 MFD 100V D1 CRF BD6 K10 M CAPACITOR 1 0 MFD 100V D1 CRF BD6 K10 K CAPACITOR 0 1 MFD 25VDC AT CRC LHW MO1 L CAPACITOR 10 MFD 25V D1 CR2 CT1 J10 F CAPACITOR 0 1 MFD 25VDC A1 CDC LHW MO1 CAPACITOR 0 1 MFD 25VDC A1 CDC LHW M01 N CAPACITOR 10 MFD 25V D1 CR2 CT1 J10 G CAPACITOR 0 1 MFD 50V 1 2410 0 1 50 D1 CRC AW2 L10 CAPACITOR 20 PFD 500V D1 CDF XEG HO2 CAPACITOR 20 PFD 500V D1 CDF XEG H02 K CAPACITOR 0 1 MFD 25VDC A1 CDC LHW M01 MJ 3A Regulator Control Service Manual REF 33 Appendix D Parts List APPENDIX D 3 Interface PC Board Option 2 CAPACITOR CAPACITOR CAPACITOR CAPACITOR DIODE DIODE DIODE DIODE DIODE DIODE 20000 DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE DIODE m m m DIODE DIODE DIODE DIODE LED LED TRANSISTOR TRANSISTOR TRANSISTOR TRANSISTOR r zzz z rz TRANSISTOR TRANSISTOR IC IC IC IC IC IC REF 34 0 1 MFD 25VDC 0 1 MFD 25VDC 0 1 MFD 25VDC 0 1 MFD 25VDC 30 PIV 1 AMP D 1 DDH AA0 001 D1 DDF ABO 001 D 1 DDF ABO 001 D1 DDF AB
72. 01 23 MOV SURGEPROTECTOR 150VRMS 0150 00005 2 24 SURGEPROTECTOR 150 8 5 ____ 0150 00005 13 25 SURGEPROTECTOR 150VRMS 0160 00005 4 126 MOV SURGEPROTECTOR 150VRMS 0150 00005 24 TRANSISTOR NPN 2R2222A D1 TSSNPAOO1 01 155 001 MJ 3A Regulator Control Service Manual REF 30 _ Appendix D Parts Lisf oo APPENDIX Di C Control Panel P Panel PC Board 4 a 10 Y IANSISTOR IPNP 2529074 21 15 10 z ANSISTOR _ IPNP _ 2 29074 01488 015 26 IANSISTOR INPN 2N2222A SM TSSNPAOO1 jun e hc X VOLTAGEREC 6VOLT 17806 Bh 1 ICL Gv0 002 D HCLGLOO01 ura 12 fic QUAD COMPARITOR 439 DIICLBD0001 015 2 c f DHCLADOO0 fis microprocessor 7 JeencHgP 01 100 021 517 017 s 7 74 38 D1dCD HtO003 pi 122 CRYSTAL J 49152 gt 01 5000001 119 v IBCD 29POsTIONS WHTDOT 01 100024010 _ SWITCH SW3 le v 584 ___ 33 fQ BCD RIGHT ANGLE ie POsuioNs DtSWRTOOO004 sws 6 IN
73. 1 4WCARBON _ 5 5 87 REO 15 JAA RESISTOR 1OKOHM _ 1 4WCARBON 5 DtRSCACNOS7 R62 12 RESISTOR 510 1 4WCARBON 5 10185 138 15 RESISTOR 120 1 2WCARBON 5 DtRSCADNM 104 666 127 RESISTOR 10KOHM 1 4WCARBON 5 0185 097 4 67 23 RESISTOR 7 ________ CARBON 59 D1 RSCACN113 Regulator Control Service Manual REF 28 Appendix D Parts List APPENDIX D 1 Control panel PC Board IJP11 RESISTOR ZEROOHM 4 BF RS0A00001 RESISTOR ZEROOHM DtR 0 A00001 JP13 86 IT ESISTOR 50 00007 pia 13921 eso ____ 2 25 1850 00001 Pis 2 fi ESISTOR 72 2 1850 00001 prie 132 __ ____ 7 0180400001 geiz s ESISTOR zRoOHM 44 7 01850 00001 P19 ESISTOR ZEROOHM bho 01850 00001 jo ESISTOR j otRS0A0000 IRN11 18 0 RESNETWRK 7zxsokOHM 7 05 D1 RSEEAGOO1 IRN12 27 0 RESNETWRK 7XSOKOHM 19 055 ID1 RSEEAGOO1 HRN13 144 ju RESNETWRK 9X3 3KOHM 4 7 2 ID1RSFFCHO85 1 14 19 AA RESNETWRK 9X47KOHM secs D 7 29 ID1 RSFFCH113 jc H CAPACITOR ID1iCAFCBOL10 1213 17
74. 2 3 2 1 Summary 4 4 3 2 3 2 2 Definition of the Systematic bogical Procedure 3 3 3 3 Determining Trouble Symptoms 3 5 3 3 1 Initial Settings 6f Operator and Simulator Controls 3 5 M 3A ontro lt 5 3 5 JumperConnections 3 5 InitialSimulation 3 5 3 3 2 FaultSympto m Verification 3 6 3 4 Localizing Trouble Functioning Module or Subsystem 3 19 3 4 14No apparent power to control panel 3 20 3 42 sensing 3 22 3 4 3 sensing 3 24 3 5 Isolating Troubleto a Circuit 3 27 3 5 1 Control Panel Board Fault Verified or Suspected 3 28 3 5 1 1 Current Transformer Interface 3 30 3 5 1 2 Potential amp Utility Winding Interface 3 31 3 5 1 3 Neutralite 3 32 Contents 2 MJ 3A Regulator Control Service Manual TABLE OF CONTENTS 3 5 1 4 Drag Hands Reset Interface 3 33 3 5 1 5 Operations Counter Interface 3 34 3 5 1 6 Raise Lower Relay Interface A 3 35 3 5 1 7 Power Supply Low Voltage Rectification
75. 2 resistors 18 14 R15 R18 R21 Schottky diode D22 and capacitor C10 The 16VDC is fed C10 022 These components form p w r up delay filter to allow stabilization ofthe internal dc supply voltages prior to releasing the microcomputer from a RESET state Diode 022 provides a rapid discharge path around R13 to allow quick response to decaying 16VDC supply voltages Resistors R13 R14 R15 and R18 establish the low voltage detect threshold at the non inverting U12 input pin 5 as compared to the 5VDC voltage input applied to U12 s inverting input pin 6 Resistor R18 provides positive feed the comparator and establishes the hysteresis voltage window for the low voltage de tection circuit Under normal operating system volt age levels the output of voltage comparator U12 pin 7 will be high This is a result of the voltage level present on the non inverting input pin 5 being Page 4 26 greater than the voltage level signal present at the inverting input pin 6 When the input voltage falls below the minimum threshold point typically lower than 80 VAC at the PDS 02 input or power is removed from the system the 16 volt supply ramps down discharging C10 rapidly through D22 This results in the noninverting input falling below the 5 volt reference of the inverting inputgWhen this happens the output of U12 is forced low causing high todow transition
76. 27 line to Which it is connected to ground poten tial otherwise the line will be biased high via the intetr al 50K pullups provided by the 8035 When any switch is actively being processed all other d vices are disabled so the microcomputer sees only the active selected device 1 5yDC PV 0 JS i 20 D3 Stoe D2 oy Di 3 90 Do Ri tat A TO EXPANDER BUS GND RESET CL DA 93 Figure 26 Port 2 Arbitration Logic 23 22 Page 4 28 MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation Dats Pak Interface 4 4 2 8 Control Panel 5 Data Pak Communications The rotary switch on the Data Pak is decoded by Logic the method just described However the method of E both sending data to the Data Pak and enabling it The control panel Data Pak communications uti utilize the port expander method The Data Pak lizes the expanded mode as well Decoder U7 discussion will provide comprehensive details on selects the D flip flop U6 when ata Rak data is to this topic be transferred from the control panel to the interface board When the micr Comp ter wants to read the data on the Port 2 lines a PROG pulse is generated which enables the outputs of U6 The data from U6 isthen read intothe 8035 via P20 thru P23 T
77. 3 Study the circuit being serviced before making any test connections Try to match the capabilities of the test instrument to the circuit being serviced It is recom MJ 3A Regulator Control Service Manual mended that section 4 be read for understanding of operational theory 14 Donotremove components while the unit is plugged in 12 Recommended Troubleshooting Test Equipment This section discusses test equipment used in trou bleshooting the MJ 3A control It is absolutely essen tial that you become thoroughly familiar with your particular test instruments which can only be gained through actual practice It is strongly recommended that you establish a routine operating procedure or sequence for each item of troubleshooting equip ment This will save time and familiarize you with the capabilities and limitations of your particular equipment thus eliminating false conclusions based on unknown operating conditions This sec tion highlights features desired in test equipment used in MJ 3A troubleshooting 1 2 1 Operational Simulator The operational simulator is available througly Sie mens Section 3 2 describes the recommended testing procedure which is dividedsinto four discrete phases All of these phases but most nota bly phase 1 Determining Trouble Symptoms is best performed with the use of an Operational simulator As the to be repaired is no longer in service the use of the simulator i
78. 3 4 1 3 3 2 1 3 5 1 7 2 If signal is not present at test point TP15 VRECT then replace bridge rectifier BR11 After repair go to 3 5 1 7 1 to verify requirement is satisfied MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 8 Power Supply Low Voltage Logic Reference 3 5 1 8 1 gt Connect a scope or DVM fr m to U1 pin 48 Is a 5 5 VDE logic level present YES Supply appears NO Go to 3 5 1 8 2 3 5 1 8 2 gt Observe UT1 pin 1 TP15 VRECT Is there 43 to 18 VDC level present YES Go to 3 5 1 8 3 to section 3 5 1 7 3 5 1 8 3 With signs of to U11 or either the filter or bypass capacitors C16 C27 or C37 of Vrect replace them After replacement verify section 3 5 1 8 1 is satisfied Ensure correct re installation of polarity sensitive parts C16 C27 and C37 MJ 3A Regulator Control Service Manual TEST REFERENCES 3 4 1 1 U1 68HC11 3 5 1 8 4 gt Connect scope or DVM from TPG to 16 Is there 6 5 volt DC logic level present Yes the 6 volt level exists then supply appears OK No If 6 volt level does not exist go to 3 5 1 8 5 3 5 1 8 5 gt If U12 appears defective replace it If there are signs of damage to bypass capac itors C17 or C21 then replace as well Af
79. 40 25 3 Figure 3 2 No apparent sensing Transformer board receiving power from electrical portion of control panel 3 4 2 NO apparent board due to bad connection Defective Electronic Section of control sensing panel board i e P T magnitude cir cuitry PDS connector not receiving proper sig POSSIBLE CAUSES nals Control panel board notreceiving power from transformer board due to bad con nection Transformer board malfunctioning Page 3 22 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Verify if the control panel board is receiving AC power from the transformer board Connect a scope or DVM from ground to pin 5 of connector J3 as shown in Figure 3 2 f waveform is absent go to 3 4 2 2 f waveform appears fault has been isolated to defective control panel board Refer to section circuit e 3 5 1 13 Magnitude Input Circuit 3 4 2 2 Verify that the connector from transformer board is not causing the problem Connect a scope or DVM to pin 5 of connector J3 as done in 3 4 2 1 but this time at transformer board f waveform is still absent go to 3 4 2 3 If waveform appears fault has been isolated to defective connector or solder connection Repair it and continue with 3 3 2 4 3 4 2 3 gt Verify if the transformer board 15 malfunctioning Connect a scope or
80. 5 to ensure it acts on the data immediately Third the latched data is then accessed via the Port 2 input lines P10 thru P13 by enabling the Dlatc outputs QO thru Q3 via the 8035 PROG datastrobe which is controlled by the 8035 portarbitration logic Each data transfer sequence involves 62 transfers of 4 bit data nibbles Once the I channel is established by interrupting the 8035 via its INT input pin 6 it remains active until theentitestransfer sequence has been initiated Should the data transfer become disrupted the 1914 monestable one shot will time out releasing theQ8035 interrupt input 6 thereby allowing the 8035 to resume its normal program opefation MJ 3A Regulator Control Service Manual Page 4 31 4 MJ 3A Detailed Theory of Operation 4 5 Data Pak Display Option 4 5 1 Data Pak Overview CE Circuit Board Layout Appendix A page REF 6 E Block Diagram Appendix B pages REF 15 The Data Pak located on the MJ 3A control panel provides a liquid crystal display readout of 9 Present power factor with LEDs to indi cate leading or lagging power factor 9 Present Current Reading Present Voltage Reading Compensated Voltage Reading Reads effect of voltage with line drop compen sation factored in Drag Hands Digital readout that indi cates lowest voltage highest voltage maximum current Most leading power factor most lagging power factor since las
81. 8 MJ 3A Regulator Control Manual Siemens Energy amp Automation Electrical Apparatus Division P O Box 6289 Jackson MS 39288 6289 601 939 0550 ACCUJ STAT DATA PAK and NEUTRALITE are trademarks of Siemens Energy amp Automation Inc The information in this manual is intended to assist p rsonnel by providing information on the character istics of equipment of this type It does not relieve th user of responsibility to use sound engineering practices in the maintenance of the particular equipment purchased If drawings or other supplementary instructions for specific applications are forwarded with the manual or separately they take precedence over any tonflicting or incomplete information in this manual
82. CARBON 1 4 W CARBON D1 RSC ACN 105 D1 RSC ACN 063 D1 RSC ACN 063 D1 RSC ACN 087 D1 RSC ACN 059 1 4 W CARBON D1 RSC ACN 105 10 MED 25V D1 CR2 CT1J10 10 MFD 25V D1 CR2 CT1 J10 0 1 MFD 63 01 2 1 01 0 1 MFD 63V D1 CRF BD2 L01 100 PIV 0 2 AMP 100 PIV 0 2 AMP 100 PIV 0 2 AMP 100 PIV 0 2 AMP 100 PIV 0 2 AMP D1 DDF ABO 001 D1 DDF AB0 001 D1 DDF ABO 001 D1 DDF AB0 001 D1 DDF AB0 001 100 PIV 0 2 AMP D1 DDF ABOO01 D1 100 024 001 D1 TSS NPA 001 D1 ICD MCO 001 D1 IST ROO 001 BCD D1 100 024 007 SPDT CO D1 SWT P01 002 D1 CNM S00 004 0 01 MFD 50V D1 CRC AW2 M10 REF 38 Appendix E Data Pak Option Alert Codes APPENDIX Data Pak Option Alert Codes MJ 3A Regulator Control Service Manual REF 39 Appendix E Data Pak Option Alert Codes UH 82 BO B3 B2 Bi BO B2 BI BO H3 H2 BO Alert Code Definitions CHARACTER TODE ALERT O FAULTY VOLTAGE LEVEL SWITCH FAULTY TIME DELAY SWITCH FAULTY BANDWIDTH SWITCH FAULTY COMPENSATION SWITCH FAULTY X COMPENSATION SWITCH FAULTY VRC SELECTOR SWITCH FAULTY LOWER LIMIT SWITCH ON VLC FAULTY UPPER LIMIT SWITCH ON VLC NOT USED MICROPROCESSOR PORT 1 FAULTY MICROPROCESSOR PORT 2 LINE CURRENT gt 350 OF PRIMARY CT LINE CURRENT 2 OF CT RATING
83. D The outputs are never tri stated in this circuit because the output disable lines pins 1 amp 2 are tied to ground The input disable is con trolled by 2 on the J5 connector pin 15 Proper biasing is provided by resistor This input is enabled by the port2 bus arbitrator circuit via output 2 of U7 on the interface board Thus only when the 8035 on the interface board places the appropriate output code will the data lines be enabled to U2 When a clock pulse is generated by the PROG from the 8035 the data available is clocked into U2 and accordingly sets the outputs Whether the PROG pulse strobes data into the D flip flop for LED decimal point control or to the actual LCD depends entirely on which one is en abled via 01 or 02 when the PROG occurs This accordingly sets the outputs of the D latch QO thru Q1 Resistors R1 and R2 provide proper biasifig of transistors Q2 and Q1 which in turn satisfy the drive requirements of the status indicators LED2 and LED1 Resistors R4 and R5 provide the necessary current limiting for the LED indicators to typically 15 mA Capacitor C3 and C1 provide decoupling for the 6VDC supply R6 provides additional pull up biasing for the incoming RESET line Control of the LCD decimal points DP2 and COLON segments is accomplished via the exclusive OR function of 93 Decimal point DP2 and COLON segments are forced off by driving these segment inpu
84. DF ABO 001 D 3 SMALL SIGNAL 100 PIV 0 2 N4148 D1 DDF ABO 001 IODE SMALL SIGNAL 100 PIV 0 2 AMP N4148 D1 DDF ABO 001 SMALL SIGNAL 00 PIV 0 2 AMP N4148 DDF ABO 001 1 D IODE SMALL SIGNAL 00 PIV 0 2 AMP N4148 D1 DDF ABO 001 IODE SMALL SIGNAL 100 0 2 AMP N4148 D1 DDF ABO 001 SMALL SIGNAL 100 2 N4148 D1 DDF ABO 001 SMALL SIGNAL PIV 0 2 1N4148 D1 DDF ABO 001 D D D 1 SMALL SIGNAL 100 PIV 0 2 N4148 D1 DDF AB0 001 1 1 1 1 1 1 IODE SMALL SIGNAL 100 0 2 1 4148 1 DDF ABO 001 1 1 1 1 1 1 1 1 IODE SMALL SIGNAL 00 PIV 0 2 AMP 1N4148 DDF ABO 001 IODE SMALL SIGNAL 0 2 1N4148 1 DDF ABO 001 IODE SMALL SIGNAL 100 PIV 0 2 AMP N4148 DDF ABO 001 m SMALL SIGNAL 100 0 2 4148 D1 DDF ABO 001 NIN o o o o Io I Q Ga Qo NIN IN IN IN O IO O o 1 SMALL SIGNAL 100 0 2 AMP N4148 D1 DDF ABO 001 1 00 PIV 0 2 N4148 D1 DDF ABO 001 SMALL SIGNAL 2 SMALL SIGNAL 1 SMALL SIGNAL 100 PIV 0 2 AMP N4148 ___ D1 DDF ABO 001 SMAL SIGNAL 100 PIV 02 N4148 DDF ABO 001 1 D 3 SMALL SIGNAL 00 0 2 4148 D1 DDF ABO 001 DIODE DIODE IDIODE _ DIODE DIODE SMATESIGNAL 100PIVO 2 AMP 1 4148 DIODE SMALLSIGNAL 100PIVO 2AMP N4148
85. F Page 3 50 relay contact states should be verified with relay de energized Contact welding may occur resulting in improper motor control operation Is the cathode of the flyback diode for the relay in question at a ground potential TP12 TP13 amp 14 YES Verification of relay in OFF state confirmed This can be further verified by ensuring that the normally open and normally closed contacts are in force 9 NO If the potential of the cathode was near 6 volts then the relay is activating If this is correct then go to 3 5 1 16 3 If this is incorrect then continue The relay is energized either by the 68HC11 or a fault exists most likely with the transistor driving it i e Q12 Q13 Q14 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Is the respective port of the 68HC11 the latter is the case replace 68HC11 PD4 or PD5 high 5 volts microcomputer YES This is correct for an OFF state If relay is energized then replace respec tive defective transistor driver 3 5 1 16 4 PRELIMINARY SETUP FOR VERIFICA This is the wrong logic for an OFF TION OF AUTO INHIBIT FUNCTION condition Fither the 68HC11 is OK and the operation misunderstood or the output port is defective If the latter is the case replace the 68HC11 micro bd bd Setthe MJ 3A control panel Voltage Level set to 120 the time delay sett
86. FRONT PANEL BUS TD PURT 2 BUS TU DUTPUT SELECT LINE u10 EXPANDED BUS Controi Panel Communications Logic 23 MJ 3A Regulator Control Service Manual Page 4 29 4 MJ 3A Detailed Theory of Operation The 8035 is informed that data is available at U6 via interrupt circuitry Data is then clocked into U6 via the control panel 68HC1 1 PROG strobe A detailed explanation is given under the Control Panel Com munications Interface heading 4 4 2 9 Control Panel Bus Arbitration The control panel bus consists of P20 thru P27 on connector J1 These lines come directly from the 68HC11 microcomputer on the control panel board and are not to be confused with the port designators for the 8035 The portion of the control panel bus which is used for arbitration are lines P20 P21 P22 and P23 These lines are directed to the VRC module VLC module and also to U11 which is used for data communications from the control panel to the interface board It is the eontrol panel board which determines which by selecting the appropriate the decoder 010 A detailed explanation of the control panel communications is in the next topic of discussion Later topics describing the VR VLC option modules describe their operation ifr detail as well MUX JEN
87. ING THE SPECIFIC TROUBLE Although this troubleshooting step refers only to locating the specific trouble it includes a final anal ysis of the complete procedure and the use of repair techniques to remedy the trouble once it has been located The final analysis will enable you to deter mine whether some other malfunction caused the component to become faulty or whether the ponent located is the actual cause of the trouble An oscilloscope is used to observe waveforms meter is used to measure voltages and make resis tance and continuity checks in order to pinpoint the defective component After the trouble is located a final analysis of the complete troubleshooting pro cedure should be made to verify the trouble The trouble should be then be and the equip ment checked out for proper operation When making repairs it isssuggested that you use only replacement parts obtainedsthrough Siemens in order to ensure that meet the high quality levels initially designed into the MJ 3A Page 3 4 Section 3 3 is used for phase 1 as it helps to determine trouble symptoms If the fault symptom is obviously related to a specific circuit board then it will reference you to section 3 5 phase 3 amp 4 directly Isolating trouble to a Circuit and Eocating the specific trouble If however the fault is of a broader nature it may be necessaryito first localize the problem to a circuit Boardy module first I
88. INPUT VOLTAGE lt 64 VOLTS NO C T OR P T PHASE INPUT NOT USED REF 40 MJ 3A Regulator Control Service Manual Appendix F Troubleshooting with the Simulator APPENDIX Troubleshooting with the Operational Simulator MJ 3A Regulator Control Service Manual REF 41 Appendix F Troubleshooting with the Simulator 29 Simulator Initial Setup If you are using a simulator for testing set the adjustments on it as follows Power Switch off Sand L variacs at about 8096 point Power flow off High power factor Straight regulator off Current magnitude potentiometer fully clockwise Operational Simulator Notes For the duration of troubleshooting the SSPT switch will 5 the Straight Inverted switclmWill ALWAYS be in a straight position During the testing process s ou Wwill often be asked to provide a voltage differential between the mea sured voltage and the Woltage level setting As the simulator provides both source and load variacs the differential can be Satisfied via these adjustments This would be the pr ferred method If the neither simulator or variac Wer available it would be nec essary to provide a differential by raising lowering the voltage Setpoint itself Although this would work adjusting the actual voltageis much preferred as it better simulates actual operating conditions REF
89. Information f possible do the repair a workbench which provides both a grounded work surface and a grounded floor mat floor mat should be grounded through a 1M ohm resistor Ground all metal equipment such as test equipment solder iron stands and ESD damage may be the cause ofa sighificant fraction fixtures of costly electrical component failure ESD protective and preventative measures are fairly simple to imple Tieall grounded leads to a single common ment but won t succeed unless heyare Coupled with ground continued static awareness When handling ICs you should avoid clothing coming in contact with compo nents and their assemblies 3 Package parts properly for storage and transportation 1 6 C nversion Chart for Use antistatic tubes or conductive foam Average Rms Peak and to store or transport ICs Pealcto peak Values Pack ICs securely to prevent motion which can generate static Multiplying Factor to Get GIVEN VALUE Figure 1 4 Convert Average Rms Peak amp Peak to Peak MJ 3A Regulator Control Service Manual Page 1 9 1 General Information THIS PAGE LE Qu BLANK lt 2 Page 1 10 MJ 3A Regulator Control Service Manual 2 Configuring amp Calibrating the MJ 3A SECTION 2 Configuring amp Calibrating the MJ 3A MJ 3A Regulator Control Service Manual Page 2 1 2 Configuring amp Calibratin
90. MJ 3A is to disassemble it removing all printed circuit boards Lay them out on your workbench in a way that the control panel board cables attaches to the trans former board and the option modules if available also connect to the control panel board The oper ational simulator if available should then be in close enough proximity to the setup such that the PDS connector from the control panel board mates to the simulator In the process of disassembling the it is necessary to remove the power and sensing fuses which are attached to the control panel For tro ble shooting purposes only solder a jumper wire from 1 2 and M1 M2 to bypass the fuses REMEMBER TO DISCONNECT THE JUMPERS WHEN TROU BLESHOOTING HAS BEEN COMPLETED Suggestion 1 In the event the MJ 3A unit you are troubleshooting does NOT have an interface PCB Printed Circuit Board with Data Pak option BUT you do have access to them it is highly recommended that you use them for troubleshooting purposes Using the Data Pak which requires the interface board to operate makes troubleshoot ing much easier Suggestion 22 Use the table of con tents to locate Specific sections which are referenced in the test procedures This is byfaf easier than trying to find a section by randomly looking through the pages Suggestion 3 The remainder of this section assumes the availability of an oscilloscope to monitor waveforms If one is n
91. Magnitude Input Circuit 3 5 1 9 Power Supply low volt age A D reference Place the MANUAL AUTO toggle switch to MANUAL Toggle the TAP RAISE switch Did the J light on the simulator illumin ate is 120V present at J on the PDS connector without the simulator YES Go to 3 3 2 12 NO VERIFY 9 PDS Connector is making good con tact ACTION Referto section 3 5 1 6 Raise Lower relay inter face MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 3 2 12 Toggle the LOWER switch Did the light on the simulator illuminate or is 120V presentat k on the PDS connector without the simulator YES Go to 3 3 2 13 NO VERIFY PDS Connector is making good con tact gt ACTION 9 Referto section 3 5 1 6 Raise Lower relay inter face Toggle the AUTO MANUAL switch back to AUTO light is not on wait about 30 seconds After thirty seconds is K light on YES Goto 3 3 2 14 NO VERIFY 9 Switch 2 of Control Panel C nfigu ration Switch SW9 is in open posi tion per 3 3 1 Response timer is not set for tore than 30 seconds ACTION Refer to section 3 5 1 6 Raise Lower Relay inter face 3 5 1 16 Relay Driver Circuits 3 5 1 18 Operator Setpoint Switch Logic 3 3 2714 gt Slowly turn the voltage level or
92. O 001 D1 DDF AB0 001 D1 DDF AB0 001 100 PIV 0 2 AMP 100 PIV 0 2 100 PIV 2 100 0 2 100 PIV 0 2 AMP D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 100 0 22AMP D1 DDF ABO 001 D1 DDF AB0 001 D1 DDF ABO 001 D1 DDF ABO 001 D 1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 D1 DDF ABO 001 100 PIV 0 2 AMP 100 PIV 0 2 AMP D1 DDH AAO 001 D1 DDZ AA0 004 D 1 DDF ABO 001 D 1 DDF ABO 001 1 100 024 001 1 100 024 001 D1 TSS NPA 001 D1 TSS NPA 001 D1 TSS NPA 001 D1 TSS NPA 001 D1 TSS NPA 00 1 D1 TSS NPA 001 D1 100 024 031 D1 100 02 1 512 D1 ICM GCO 002 PROGRAMMED 64x4 D1 ICM GCO 002 D1 ICD FCO 001 D1 CD MCO 001 14 1 001 14 0 0 002 64 4 D1 ICD ECO 001 D1 ICM FCO 001 D1 ICD ECO 002 D1 ICL BW0 001 D1 ICL Gx0 003 MJ 3A Regulator Control Service Manual Appendix D Parts List APPENDIX D 3 Interface PC Board Option 3 F MONOSTABLE 102 R MONOSTABLE 044 0 0 001 103 H CRYSTAL 3 93216 MHZ D1 CYS 000 003 104 H SWITCH SPDT D1 SWP 800 003 105 E SWITCH SPDT RTANG D 1 SWP BOO 005 D1 SWD ROO 003 SWITCH 5 POSITION SWITCH 4 POSITION DT SWD ROO 004 SWITCH 4 POSITION DT SWD ROO 004 SWITCH 4 POSITION D1 SWD R00 004 CABLE ASSY D1 100 021 511
93. PDS connector when the simulator is not present YES Go to 3 3 2 9 NO VERIFY PDS Connector is making good con tact ACTION 9 Referto section 3 5 1 4 DRAG HANDS reset in terface 3 3 2 9 Slowly turn the voltage level the simu lator or voltage level switch such that the measured voltage and the voltage setting are within 1 0 volt of each other Is the IN band lamp on YES Go to 3 3 2 10 NO VERIFY 9 Pressing control panelfresetbutton should illuminatehis LED while but ton is held in Control panel switch settings are per instructed in section 3 3 1 ACTION 9 Refer to section 3 5 1 17 Circuit Annunciation Logic e 43 5 118 Operator Setpoint Switch Logic 95 355 1 13 Magnitude Input Circuit 3 5 1 9 Power Supply low volt age A D reference E 3 3 2 10 Slowly turn the voltage level on the simu lator or voltage level switch such that the Page 3 8 measured voltage is 3 4 volts higher than the switch setting Is the HIGH band lamp on YES Go to 3 3 2 11 NO VERIFY Pressing control panelw set button should illuminate thistkED While but ton is held in 9 Control panel switch settings are instructed in sections3 3 1 ACTION Refer O se tion 3 5 17 Circuit Annunciation Logic 3 5 1 18 Operator Setpoint Switch Logic 3 5 1 13 P T
94. RSC ACN 105 Y CAPACITOR 10 MFD 25V D1 CR2 CT1 J10 0 1 MFD 63V D1 CRF BA2 L10 X DIODE 100 PIV 0 2 D1 DDF ABOO01 J DIODE 100 PIV 0 2 D1 DDF ABO 001 K DIODE 100 0 2AMP D1 DDF ABO O01 M DIODE 100 0 2 D1 DDF AB0 001 N DIODE 0 2 AMP D1 DDF ABOO01 X DIODE O0 PIV 0 2 AMP D1 DDF ABO 001 J DIODE 100 PIV 0 2 AMP D1 DDF ABOO01 L DIODE 00 PIV 0 2 AMP D1 DDF AB0 001 M DIODE 100 PIV 0 2 AMP D1 DDF AB0 001 N DIODE 100 PIV 0 2 AMP D1 DDF ABO 001 DIODE 100 PIV 0 2 AMP D1 DDF ABOO01 1 DIODE 100 PIV 0 2 AMP D 1 DDF ABO 001 G LED D1 100 024 001 G LED D1 100 02 4 001 D TRANSISTOR D1 TSS NPA 001 D TRANSISTOR D1 TSS NPA 001 K IC D1 CD MCO 001 SWITCH BCD D1 100 02 4 009 Q SWITCH BCD D1 100 024 009 F SWITCH SPST D1 SWT PO1 001 AA HEADER D1 CNM S00 004 REF 37 MJ 3A Regulator Control Service Manual Appendix D Parts List APPENDIX D 6 VRC Voltage Reduction Control PC Board Option RESISTOR RESISTOR RESISTOR RESISTOR RESISTOR RESISTOR CAPACITOR CAPACITOR CAPACITOR CAPACITOR lt 11 T DIODE 12 U DIODE 13 DIODE 14 X DIODE 15 X DIODE 16 N DIODE 17 H LED 18 G TRANSISTOR 19 M IC 20 N IC 21 X SWITCH 22 F SWITCH 23 AA HEADER 24 J CAPACITOR MJ 3A Regulator Control Service Manual 1 4 W CARBON 1 4 W CARBON 1 4 W CARBON 1 4 W
95. S reset interface PDS DRAGHAND RESET U11 N O L C 514 Figure 7 Draghands Reset Interface When pushbutton SW14 physically mounted on the control panel board is pressed voltage is ap plied to the 011 terminal resulting in thefr setting of the remote position indicator drag hands 4700 C2 MAN AUTO JP17 Page 4 6 Operations Counter interface C11 015 1000V igure 4 5 Operations Counter interface Voltage appearing on terminal 10 resulting from the closure of the operations counter contact switch within the regulator increments the operations counter located on the control panel every other tap change High frequency voltage spikes are snubbed by capacitor C11 when the counter sole noid de activates The operations counter is hard wired to the control panel assembly at points and as shown in figure 4 7 Raise bower Motor interface Refer to figure 4 8 The transfer switches SW12 and SW13 configure the manner in which the RAISE J LOWER K motor windings are activated When switch SW12 is in the manual position the RAISE J LOWER motor windings are activated directly by the momentary action of switch SW13 in the tapraise taplower positions When switch SW12 is in the auto position the RAISE J LOWER K motor windings are controlled by MJ 3A relays RLY12 and RLY 14 driven by the microcomputer If MJ 3A Regulator Control Service Man
96. TEM RESET on the MJ 3A control panel at J1 pin 33 For detailed description of 68HC11 system RESET logic refer to Motorola 68 11 Reference Manual M68HC11RM AD Page 4 19 4 MJ 3A Detailed Theory of Operation srem RESET Logic In conjunction with the internal RESET logic function contained within the 68HC11 microcontroller the control panel also incorporates external reset logic to provide a SYSTEM RESET function The SYSTEM RESET is comprised of three separate cir cuit functions that contain logic for manual reset loss of ac detection and low operation voltage detection The outputs of these separate reset func tions are effectively ORed together to form a com posite active high SYSTEM RESET output at J1 pin 33 anual resetting of the control logic is accommo ated via the Manual RESET switch SW10 located by the operator the voltage level applied to the non inverting input on comparator U14 pin 5 is forced to a level below the inverting input pin 4 This action will force the output of U14 pin 2 low The output of U14 pin 2 is then routed to the external interrupt request input pin 40 on the microcontroller This signal is then used by the 68HC11 to anticipate a SYSTEM RESET condition and initiate reset housekeeping functions prior to the RESET input pin 39 going active low The delaying action between the external reset request XIRQ and actual hardware reset is req
97. TING IC S For troubleshooting the most convenient way is to test is in circ it because the power source is available and have to unsolder the IC As the MJ3A uses double sided PCBs it is difficult to unsolder an IG without an expensive solder vac uumingedevice Without it is very easy to damage the circuit board traces You must measure the DC voltages applied at the 1 terminals to make sure that they are available and correct If the voltages are absent or abnormal this i a good place for troubleshooting With the power sources established the in circuit IC is tested by applying the appropriate input and monitoring the output In some cases it is not necessary to inject an input because the normal input is supplied by the circuits ahead of the IC One drawback to testing an IC in circuitis that the circuits before input and after output the IC may be defective This can lead you to believe that the IC is bad The fault finding techniques used in section 3 5 of providing key waveforms will aid you in such an instance REMOVING IC s As previously mentioned without a vacuum dering device it is very difficultto remove a soldered IC without damaging plated thru holes and the circuit board traces so use extreme caution All the printed circuit boards in the MJ 3A control panel use double sided PC boards so solder must be removed from both sides Start by c
98. TION Refer to section 3 5 2 1 Sensing Transformer Page 3 11 3 Troubleshooting Procedures 3 3 2 24 bd Turn OFF the power switch to the system If you modified any jumper settings in 3 3 2 22 remove them now replace the jumper on P to P14 bd Put a jumper across the AUTO INH termi nals on the transformer board bd Turn the power switch back ON bd Put voltage level switch to 106 volt setting Put power flow in forward mode Wait at least 30 seconds Are both the J and K lights off YES Go to 3 3 2 25 NO VERIFY The AUTO INH jumper is providing good continuity ACTION Refer to section e 3 5 2 3 Zero Cross Trans former bd 3 3 2 25 Remove the AUTO INH jumper Does K light illuminate YES Go to 3 3 2 26 NO VERIFY The AUTO INH jumper 5 definitely removed ACTION Refer to s ction 3 5 23 Cross Trans former Page 3 12 Verify that curren mode Open switch SW9 position 8 of the 8 position DIP switch Does reverse power light illuminate after 5 seconds YES Go to 3 3 2 51 NO VERIFY 9 is connected OW Alert light ACTION RefertoSection 35 1 18 Operator Setpoint Switch Logic This coneludes testing of the control panel board NOTE
99. The nominal 200 mA secondary of the regula CT is rout d through these terminals Jhese terminals are shorted at the factory and must remain shorted except as they areused to accommodate auxiliary appa ratus such as a current demand meter MJ 3A Regulator Control Service Manual 2 3 Interface Option Board 2 3 1 Data Pak Cuwrent Display Settings Controls equipped with Data Rak accessory require the correct CT ratio be sinput to the control to provide the correct Utrent display This is accom plished by the 5 position DIP switch SW5 located onsthe interface board Set the 5 position DIP switch in accordance with the Figure 2 2 to provide proper multiplier for the curr ntadisplay on the Data Pak See nameplate of the regulator for CT primary rating 2 3 2 Setting Data Pak Configuration Setting Integration Time for Voltage Current amp Power Factor Accu Stat MJ 3A controls will display voltage cur rent and power factor as a time integrated readout The time intervals selected can be set independently of each other via three 4 position DIP switches SW6 Volts SW7 Amps SW8 Power Factor Position 4 on switches 6 7 and 8 relates to present value parameters on the Data Pak Set closed for instantaneous response Set open for lagged re sponse If 4 is set open integration periods will then be selected by positions 1 2 and 3 Factory set closed Positions 1 2 and 3 selec
100. U5 outputs until ALE goes high again While the address for the memory location to be accessed is available on the outputs of U5 they are also made available to inputs AO thru A7 of U2 Both U3 and U4 the 5 are disabled because the RD and WR pins are high thus deselecting them When the PSEN line goes low step 3 the EPROM U2 outputs are enabled As SW1 is forced in the external EXT position by R30 the EA line will be high All instruction fetches including internal addresses will be forced to be external by activating the EA pin high level of the 8035 Unless the microcomputer used is 8048 8748 where SW1 may be in the internal position EA pin will always be pulled high 5 volts This high level on RSSSEYSUPRSE TO STORE RECALL LOGIC icrocomputer MJ 3A Regulator Control Service Manua Page 4 23 4 MJ 3A Detailed Theory Operation the input of inverter U9 forces a low output through R28 thus enabling the chip select CS pin of U2 Since U2 is now selected with the address on the inputs and the outputs enabled the appropriate data is now available on outputs OO through O7 The output lines when tri stated are pulled high by resistor network RN1 They are also routed to the expander bus connector J8 and the micro data bus DBO thr
101. When using the Data Pak In the following steps with the simulator the actual power factor reading on the Data Pak can vary slightly due to component tolerances in the simulator MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Do you have both an interface module and Data Pak option YES Goto 3 3 2 52 NO Do you have either a VLC VRC option module 9 YES Goto 3 3 2 67 NO Go to 3 3 2 101 3 3 2 52 Is the Interface Board Watchdog light flash ing at about a 6 8 Hz Rate YES goto 3 3 2 53 NO VERIFY Cable is correctly attached ACTION Referto section e 3 5 3 2 Power Supply 3 5 3 1 Oscillator 3 5 3 5 Reset circuit watchdog circuit 3 3 2 53 Is the Interface Board Transmit Light back side of MJ flashing about every halfsecond YES Goto 3 3 2 54 NO VERIFY Conditions in 3 3 2 52 have been met ACTION 9 Shut of f p wer and disconnect Data P k option board Turn on poweta lf 3 3 2 53 is now satisfied then problem exists with this mod ule turn off power again and replace the Data Pak Try the same approach with the VRC and VLC modules as well If problem is tied to option module refer to trouble shooting for that module Data Pak Option Board section 3 5 4 VLC Option Board section 3 5 5 MJ 3A Regulator Control Service Manual 3 3 2 54
102. __ FM ID1CAFCBOL1O 1 14 22 aa CAPACITOR SILVERMICA 1 20980 500 ____ IDICRLBTHR20 ici 12 Z __ 2 0 25 IDICR2CT1JO jcz 13 2 __ TANTALUM 33470 25 101 82 1233 HC18 8 W __ TANTALUM 25 01 2 1110 jcio 2 __ CERAMC __ Pa 01 50 01 2410 021 13 __ 0 ______ 24 1 102 0 X CERAMIC A sv 2 103 __ 50 ______ 01 2410 104 20 S CAPACITOR FILM a 001 MFD 1007 D1 CRFBD2JM10 1225 CAPACITOR o1MrD sov ID1 RCAW2110 1026 CAPACITOR FEM 25 7 0 01 MFD 100v _ 2 1027 CAPACITOR ______ 3300 MFD 257 __ D1CRACT3G33 CAPACITOR coo CAPACITOR CERAMIC 01 50 01 240 jG CAPACITOR 0 DI CRFBD6K10 CAPACITOR CERAMIC 50 ID1CRCAW2 LO CAPACITOR CERAMIC 01 MFD 50v 8 DrtcRCAW2L00 CAPACITOR TANTALUM
103. ___ 01 33 _ Movi Jio SURGE PROTECTOR 150VRMS 10150 00005 2 114 SURGE PROTECTOR 150VRMS 5 p1 sUMvoo005 14 SURGE PROTECTOR 350 57 DtsUMvooo0s mova 31 fs SURGE PROTECTOR 95VRMS 10150 00003 Movs 21 SURGE ___ 25 5 0150 00003 Mov 10 56 MOV SURGE PROTECTOR 25 VRMS DtsuMvoooo3 BR1 17 fs BRIDGE RECTIFIERS gt IA D1RESLDooo1 O 44355 01451800002 E 4 35 01451400002 _ 5 222 25 221 TRANSFORMER CT AUX Of 1100024014 TRANSFORMER RLZERO ISOPOWER 012100024013 SOCKET F R REAY 1016 8 400001 HEADER LDIPSIRIP 8 POSITION DtCNM S0000 HEADER DisrRI i2POSITION __ TERM STRIP 3 POSION 4REQD D1TBM BOO0O6 TERM STRIP 2 REQ D 01 18 800006 SHORTING BARD FORC 2 DrTBA000003 WASHER FLAT 4 6REQ D 00651007042 WASHER 8 REQ D NUT Hx 440 6 00631109104 SCREW 1632 X 0 50 WASHER REQD 00651007059 __ INTERNALTOOTH ____ 6 4REQ D 00655047060 TRANSFORMER _ P T AUX SHORTING HEX 6 32 4 REQ D 00 631 109 106 REF 32 MJ 3A Regulator
104. ac loss time constant The ac power loss logic will typically issue a reset for loss of ac greater than one cycle The 5REF voltage applied to U14 pin 6 determines the loss of ac threshold level Resistor R32 provides necessary positive feedback input threshold hysteresis During pow rloss the rectified voltage stored by will discharge through R47 When this voltage levelidecays below the inverting input threshold On 1014 pin 6 the output of U14 pin 1 goes active low This signal then forms one of the three possible sources for SYSTEM RESET and similarly is routed to the external interrupt XIRQ input tothe 11 and reset delay circuit The low voltage detection logic monitors the unreg ulated dc supply voltage VRECT on the front panel board As previously described this voltage is di rectly relatedito the input ac source voltage applied to the MESA control panel the PDS U2 input Theunregulated supply voltage VRECT is fed directly to R51 and C34 These components form a4power up delay filter to allow stabilization of the internal dc supply voltages during power up prior to releasing the microcontroller s RESET input Resis tors R51 R50 R49 and R62 establish the low voltage detection threshold at the non inverting inputto 014 pin 5 This threshold is compared the 5REF voltage input threshold applied to the asso ciated non inverting 014 input pin 4 Resistor R62 provides the necessary posit
105. age LimitControl VLC high active low or high impedance floating Voltage Reduction Control VRC The lower half of Port 2 can be used in three different ways as an quasi bi directional static port as a port As the interface board contains the necessary sup expander and to address external program mem port circuitry for the option modules the interface ory In all cases outputs are driven low by an active board option is required if ANY option modules are device and driven high momentarily by an active used device and held high by a 50K resistor to 5 volts The port may contain latched I O data prior to its use in another mode without affecting operation of either If lower Port 2 P20 P23 is used to output address for an external program memory fetch the I O information previously latched will be automatically MJ 3A Regulator Control Service Manual Page 4 21 4 MJ 3A Detailed Theory of Operation removed temporarily while address is present then restored when the fetch is complete However if the lower Port 2 is used to communicate to another device in the expanded mode previously latched information will be removed and not restored 4 4 2 2 Oscillator Circuit The 8035 has a built in crystal oscillator that requires only the connection of a parallel resonant crystal for operation Internally the 8035 divides the crystal frequency by two to derive its basic cycle time In this application the chosen crystal
106. al Simulator This appendix is of interest only to those who have a simulator Throughout the trouble shooting session in section 3 various tests require excitation signals which must be directed into the for observing circuit If you have access to a simulator the effort involved in each test setup is greatly simplified This section is referenced by the troubleshooting section Section 3 and steps you through the nec ssary configuration of the simulator Appendix G Fault Symptom Guidance A com prehensive listing symptoms and references the manual to where they are addressed This appendix provid s a starting point for troubleshoot ing when aifault symptom is known Appendix H quick reference for initial isolation oftproblems This appendix contains a lis of the 16 most primary test points and the pages where they are referenced Test points will appear on units s n MJ303S 40000 and above Note All illustrations in this manual which depict circuits are labeled with location identifiers After the name of a circuit illustration will be a reference to the appendix page where it can befound with its X Y coordinates Example 20 A10 designates page REF gQ Appendix C X coordinate is and Y coordinate is 10 Any circuit discussed can be quickly tied to its loca tion using this approach Introduction 3 Introduction Applicable Documents It is recommend
107. ary switch to each position cause different control panel LED band conditions to occur When VRC is enabled with a high percentage dialed in while the control panelshas a low bandwidth setting and an in b nd condi tion the VRC activation will immediately upset the in band condition YES to all above checks Switch is probably OK Formore detailed testing refer to section below e NO Monito 11 reference block 1 on conn ctor of interface board to ver ify thattthe switch is being selected by the interface board If waveform is pres ent switch may be defective If incor rect readings occur verify that diodes Dthr 04 are OK Also Verify the Switch in section 3 5 3 7 3 5 6 4 Verification of toggle switch operation Put VRC switch in local position Verify continuity from U2 pin 5 to the anode of D6 If switch closure does not pro vide continuity check diode and toggle switch for faults After test is made check continuity of toggle in the re mote position verification of output U2 pin 6 will be made in 3 5 6 6 3 5 6 5 Verification VRC being actively se lected Ensure diode 05 is OK if bad the con trol panel board will not recognize the VRC option board 3 5 6 6 Verification VRC being actively se lected remotely Short VRC terminals on the transformer board If waveform at U2 pin 4 refer ence block 2 is present and VRC will not ac
108. ated from the PROG line of the control panel microcomputer The PROG pulse is routed from connector J7 pin 9 to the D latch clock input CL pin 7 This accordingly sets the output of D latch QO pin 3 R sistor R5 provides proper biasing of transistor C 1 4which turn satisfies the drive requirements of the status indicator LED 1 Resistor R7 provides the necessary current limiting for the LED indicator to typically 15 mA Capacitors C1 and C4 provide decoupling for the 6VDC supply Resistor R8 provides additional pull up biasing for thesincoming RESET line 4 37 THIS LEF K NTIONALY X f lt Page 4 38 MJ 3A Regulator Control Service Manual Appendix A Circuit Board Layouts lt o SO Circuit Board Layouts 2 A MJ 3A Regulator Control Service Manual REF 1 Appendix A Circuit Board Layouts Control Panel with Options VRC OPTION VLC OPTION PC BOARD PC BOARD DATA PAK OPTION PC BOARD TRANSFORMER PC BOARD 6 CONTROL PANEL PC REF 2 MJ 3A Regulator Control Service Manual WVOANDUAWNE Appendix A Circuit Board Layouts PPENDIX A 1 Control Panel PC Boar ABCDEFGHIJKLMNOPQRSTUVW X ZAABBCCDDEE 24 288 gt c a MWIZI 8 E R K 5 RN12 3 SIEMENS MJ 3A IDE
109. cal portion Potential amp Utility Winding Refer to figure 4 4 The Potential Transformer sec s ondary and Utility Winding interfaced to he control panel board PDS connector termi nals P2 and U2 respectively Fuse F1 amp F2 provides protection against P2 to U2 shorts resulting from component failure welding and or ing The 2 2 inputs are surge protected by MOV11 amp 12 amp MOV14 respec tively 4When the External Internal power switch SW11 istin thevEXT position the MJ 3A is powered fromthe externally applied source the EXTERNAL SOURCEbanana jacks on the MJ 3A control panel When SWTI is in the NORM position however the Ontroller will be powered from the U2 input termi nal Current Transformer Interface J2 PDS o Figure 4 3 Interface 20 63 4 4 VVinaing interface MJ 3A Regulator Control Service Manual Page4 5 4 MJ 3A Detailed Theory of Operation NEUTRALITE interface This circuit provides a neon light NLT which glows when the contact switch of the regulator indicates that the tap changer is in the neutral position Resis tor R63 provides current limiting to the neon light Resistor R11 ensures the neon lamp will remain off in the presence of high impedance leakage currents that may be present at the U12 terminal DRAG HAND
110. ck 3 waveform If it is not present check that connector J1 is tight Go to 3 5 1 8 If both reference blocks 3 and 4 exist then verification is complete NO If voltage does NOT exist go to 3 5 3 2 2 Observe the input to U13 pin 1 reference block 1 Is there a 13 to 18 VDC level pres ent YES Go to 3 5 3 2 3 e NO The voltage mustenter here from the control panel board Do not continue until this is confirmed 3 5 3 2 3 U13 appears defective replace it f there are any signs of damage to any filter eapaci tors C2 or then replace them as well Ensure that C2 are inserted corectly as they are polarity sensitive Verify that voltage waveform appears at refer ence block 2 If it appeared here but not at reference block 4 thenWreplaee diode D1 Page 3 64 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 3 Microcomputer Memory Management S 575 J8 nem Isle a 2 zi S ELA EEEEEE y 20100000 STORE RECALL LOGIC 6 10 3 3 0 4 0 5 MJ 3A Regulator Control Service Manual Page 3 65 3 Troubleshooting Procedures 3 5 3 3 1 For a detailed explanation of 68HC11 ports see section 4 Theory of operation It is im portant that waveforms are similiar to th
111. ck of proper switch actuation or want to verify the integrity of control panel switch the following procedure will help to verify it Procedure 3 5 3 7 2 will verify the integrity of the switches whereas procedure 3 5 3 7 3 will verify the microcomputer operation support circuits 3 5 3 7 2 as used on the control For a logic table of the switches it selects nefer to section 3 5 1 18 Switch continuity testing Jrhis test will verify the integrity of an individual switch Put all switches to their open positions Turn powef OFF to system Looking at the illustration 3 5 3 7 deter mine the ommon for the questionable switch the negative black lead of an ohmm ter at this common point on the appropriate pin of U7 Putthe positive red lead ofthe ohmme t r on the anode side of the diode for the binary switch position in question Close the switch to test for continuity If it is absent try again on the cathode side of the diode If continuity was lacking on the anode side but seen on the cathode then the diode is bad replace it If the continu Page 3 72 ity test fails each of the two tests then the switch appears bad If no traces appear broken on the PC board re place the switch 3 5 3 7 3 Support circuit test Refer to first note under 3 5 3 7 2 for reference to deeodenlC Switch address enable logic to
112. connection to control panel Defective Electronic Section of control panel board i e watchdog annunciation circuitry PDS connector not receiving proper sig POSSIBLE CAUSES nals Control panel board receiving power from transformer board due to bad con nection 9 Transformer board malfunctioning Page 3 20 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Verify if the control ariel board is receiving AC power from the transformer board Connect a scope or DVM from ground to pin 1 of connector J3 as shown in Figure 3 1 f waveform is absent go to 3 4 1 2 9 f waveform appears fault has been isolated to defective control panel board Refer to section circuit 3 5 1 8 power supply logic refer ence 3 5 1 17 circuit annunciation logic 3 5 1 10 oscillator 3 5 1 11 reset circuit 3 4 1 2 Verify that the connector from transformer board is not causing the problem Connect a scope DVM to pin 1 connector J3 as done in 3 4 1 1 but this time at transformer board f waveform is still absent gd to 3 4 1 3 If waveform appears fault has been isolated to defective connector or solder connection Repair continue with 3 3 2 1 3 4 1 3 Verify if the board is malfunctioning Connect a scope oriDVM to pin 4 of connector J2 af the transformer board as shown in Figure 3
113. connector instrument ground to be made at connector o 20 3o 40 Figure 3 3 No apparent sensing Transformer board malfunctioning C C2 jumper missing or defective trans former 3 4 3 Transformer board not receiving power from electrical portion of control panel sensing board due to bad connection Defective Electronic Section of control panel board ie C T magnitude cir gt POSSIBLE CAUSES cuitry Control panel board not receiving power connector receiving proper sig from transformer board due to bad con nection Page 3 24 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures Verify if the control panel board is receiving AC power from the transformer board Connect a scope or DVM from ground to pin 6 of connector J3 as shown in Figure 3 3 f waveform is absent go to 3 4 3 2 f waveform appears fault has been isolated to defective control panel board Refer to section circuit e 3 5 1 15 CT Magnitude Input Circuit 3 4 3 2 Verify that the connector from transformer board is not causing the problem Connect a scope or DVM to pin 6 of connector J3 as done in 3 4 3 1 but this time at transformer board f waveform is still absent go to 3 4 3 3 f waveform appears fault has been isolated to defective connector or solder connection Repair i
114. ctor Calculated values are compared to the refer ence values which have been selected by operator settings on the control panel Results of the compar ison form the basis for output commands of the control Optionally the interface board can be added which then permits attachment of the Data Pak Display Option Voltage Limit Control Option VLC and Voltage Reduction Control Option VRC Any or all of the three options can be added but as shown in the top level and interconnection block diagrams page REF 10 and REF 11 the interface PC board must first be added 4 1 2 Top Level Detailed A detailed discussion of the MJ 3A regulator control at the top level will be limited to the mention of a more detailed block diagram of the entire system this one showing the major interconnect lines see Appendix B page 11 For further details referto the appropriate module which follows MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory Operation 4 2 2 Electrical I O 4 2 Electrical Detailed 4 2 1 Electrical Schematics Ove Control Panel Board Electrical Portion Appendix C 20 Circuit Board Layout ires to PDS Control Panel Board Appendix A page Connector REF 3 Transformer Board Appendix A page Connector to REF 4 nter ace Option Board Control Panel Block Diagrams PC Board Overview Appendix B pag
115. d termined immediately if iso lated to one board NOTE St ps 3 3 2 3 3 2 50 are reserved for troubleshooting the Control Panel board however not all steps have been utilized The purpose the Watchdog light on the control panel is to determine if the panel is function ing normally Accordingly this indicator will be the basis of troubleshooting 3 3 2 1 gt Isthe Control Panel Watchdog light flashing at about a 6 8 Hz Rate Page3 6 YES Go to 3 3 2 2 NO VERIFY Control Panel Switch SW11 lower left coner of control panel NORMAL position Jumpers 1 2 4 1 2 have been added to COntrol panel test board as instructed Cables from connectors J2 and J3 are attached to transformer board PDS conmectorlssattached to excita tion source Excitation power source to PDS con LED Ras not broken loose ACTION 9 item ofthe verification process caused the watchdog to begin flash ing then proceed to 3 3 2 2 If watchdog indicator light is still not flashing after the verification pro cess then a trouble symptom has been identified The next step is to localize the fault to a functioning module Proceed to section 3 4 1 3322 Is reverse power flow light off YES Go to 3 3 2 3 NO VERIFY The CT magnitude was disconnected per initial setup in 3 3 1 and appendix
116. d con nection with control panel board 3 5 3 10 2 The same request line in 3 5 3 4 1 is also routed to the 8035 on T1 pin 39 Pulse extended via U15 the conditioned waveform is per reference block 1 Is this waveform evident YES Go to 3 5 4 3 NO Replace U15 Go back to 345 3 1071 3 5 3 10 3 When actual data is sent from the control panel board the PROG line is pulsed J1 pin 2 per reference block 4 waveform 15 it there YES Go to 3 5 3 10 4 seen at input 1911 pin 5 then replace U11 Otherwise verify that con nector J2 is tight and providing the signal from control panelboard Page 3 76 3 5 3 10 4 Lookforreferenceblock 2 waveform atthe input to Ut pin 6 This ensures that the 8035 will communicate with the control panel board for the duration of the buffer transfer Is this waveform s en YES Go to 3 5 3 10 5 NO Check existence Of waveform at nodes between 1and the monostable multivibrator U15 Replace the compo nent where th waveform is viewed as an input output Replace either R27 inverter U9 or U15 3 5 3 10 5 MERIFIGATION OF COMMUNICATIONS LED XMLDI LED2 not shown on 3 5 3 10 illustration sathe LED2 flashing at a 2 Hz rate YES Verification of communication cuit complete NO Monitor microcomputer U1 out put pin P14 Does a 1 2 second square wave alternating between
117. e 20 00 SIEMENS Service Manual Operational Theory ACCU STAT MJ 3A Trouble Shooting Regulator Control AcesSories Siemens Energy amp Automation Inc Electrical Apparatus Division P O Box 6289 Jackson MS 39288 6289 444 Highway 49 South Greenway Industrial Park e Richland MS 39218 e 601 939 0550 Fax 601 932 9911 94 445507 ndn SIEMENS ens Energy amp Automation Inc Electrical Apparatus Division P O Box 6289 Jackson MS 39288 6289 444 Highway 49 South Greenway Industrial Park e Richland MS 39218 e 601 939 0550 Fax 601 932 991 1 TABLE OF CONTENTS Section Page Introduction Purpose of Manual Kg 2 Organization of Manual 2 Applicable Documents 2 4 SECTION 1 General Information 1 1 Safety Precautions when servicing MJ 3A 1 2 1 2 Recommended Troubleshooting Test Equipment 15 my ee 1 3 1 2 1 Operational Simulator 2 gt 1 3 1 2 2 Oscilloscope 40 3 1 3 1 2 3 Analog and Digital Meters 1 4 1 2 4 Signal Generator 4 N cooo eeaun anaa 1 4 1 2 5 Miscellaneous Tools amp Aecessories7 1 4 1 3 MJ 3A Troubleshooting Guidelines 1 5 1 3 1 General guidelines 1 5 1 3 2 Soldering Techniques
118. e YES Go to 3 3 2 57 NO VERIFY 9 Control Panel Switches accor dance with 3 3 1 ACTION 3 5 37 Interface Board Switch Decoding e 3 54 Data Pak Option Board Page 3 14 3 3 2 57 Does display a very high slightly less than 999 power factor and does AMPS display a reading greater than 150 YES Goto 3 3 2 58 NO VERIFY Data Pak Correct set tings is attached ACTION Refer t section 3 5 3 7 Board Switch Decoding e 35 4 Data Pak Option Board 8 tenti meter on the simulator counter clock wise Verify that the ALERT lightilluminates Turn the Data Pak selector to the ALERT position verify the existence of the code should be 5000 With the Data Pak selector set to amps rotate the current magnitude potentiometer clockwise until a reading of 1or2 appears Turn the Data Pak selector to the ALERT position verify the existence of the code should be 1000 Press andrelease the resetbutton SW3 on the interface board Does the display momentarily read zero as switch is released YES Go to 3 3 2 59 NO VERIFY The reset button is SW3 The other pushbutton is the DRAG HANDS reset SW4 ACTION Refer to section 3 5 3 5 Interface Board Reset Circuit MJ 3A Regulator Control S
119. e Refer to section power flow switch the simUlator4o OFF Set the RESISTANCE VOIFS n the control panel to 6 volts with th polarity switch in the position Set the REACTANCE VOLTS the control panel to 8gvolts with the polarity switch in the 44position Turn the Data Pak to COMP V OFTS 3 5 1 18 Operator Setpoint Switch Logic gt Adjust the voltage level setting such that the setting _iS withi 1 5 volts of the measured valueZThe IN BAND indicator LED will be activated4 gt Connect C24With maximum current and for ward power flow ls LOW indicator LED on Does COMP VOLTS read at least 1 volt less than the measured input voltage YES Go to 3 3 2 61 9 NO VERIFY MJ 3A Regulator Control Service Manual Page 3 15 3 Troubleshooting Procedures 3 3 2 62 3 3 2 65 Switch to reverse power flow mode Wait Leaving switch 1 open open switch posk at least 5 seconds Is RPF light now on tion 45 1s power factor now 2 to 30 Does the power factor remain as in leading 3 3 2 61 YES Go to 3 3 2 66 YES Go to 3 3 2 63 NO NO ACTION gt VERIFY Refer to section 3 5 1 18 Operator Setpoint Switch Logie Control panel DIP switches are set in accordance with 3 3 1 gt ACTION 9 Referto section 3 5 1 18 Operator Setpoint Switch Logic 3 3 2 66 Open switch position 6 Is power factor now 95 to
120. e eyClelhe store operation will be completed in 10 msvor less A store operation has priority over RAM read write operations If STORE is asserted during a read operation the write will be immediately termi nated and the store performed The data at the RAM address that was being written will be unknown in both the RAM and E2PROM The RECALL input when low will initiate the trans fer of the entire contents of the E2PROM array to the RAM array The transfer of data will typically be completed in 1 microsecond or less An array recall haspriority over RAMread write operations and will terminate both operations when RECALL is as serted RECAIT low will also inhibitthe STORE input The actual logic which controls the store recall logic is discussed in the POWER MONITOR CIRCUITS which follows MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation 4 4 2 5 Power Monitor Cir cuits The power monitor circuitry provides two basic functions power up RECALL and the power down STORE Each of these functions has two discrete purposes Power Down STORE Function Purpose puts the reset line to the microcomputer low in reset state when logic voltage drops below a safe operating level 9 puts the NOVRAM into a STORE state when powering down a system Power Up RECALL Function Purpose forces the reset line to the microcom puter low in reset state unfil the voltage rises to
121. e grounded If you work with ene hand away from the equipment and stand on a properly insulated floor Yeu will lessen the danger of electri shoek 6 Remember 5 with broken insu lation pose thesadditional hazard of high voltages appearing at exposed points along the leads Check test leads for frayed or broken insulation before work ing with them 7 l ssen the danger of accidental shock disconnect test leads immediately after the test is completed 8 Remember that the risk of severe shock is only one possible hazard Even a minor shock can place you in danger of more serious risks such causing you to touch a source of higher voltage 9 Guard continuously against injury and do not work on hazardous circuits unless another person is available to assist you in case of accident 10 Even if you have had considerable experience with test equipment used in troubleshooting always study the service literature of any instrument with which you are not thoroughly familiar 11 Use only shielded leads and probes Never allow your fingers to slip down to the metal probe tip when the probe is in contact with a hotcircuit Be sure thatyou do not short any terminals to ground when you make voltage measurements If the probe should slip for example and short out a voltage source you could damage one or more components 12 Avoid vibration and rough treatment Most electronic test equipment is deli cate 1
122. e 8 position DIP switch starting nearest bottom of PCBoard where C closed and O open if Data Pak is present set to VOLTS Regulator Control Service Manual SetNormal External source switch on MJ control to normal MJ 3A Jumper Connections Onthe 12 point terminabstrip TB1 the transformer board connect a jumpe between the P and P14 points the tw bottom points This should be the jumper connected on that strip for start of the test 9 To the six point terminal strip TB2 on the transformer board Connect ajumper C2 to e Be certain there is not a jumper at he presence or absence of a relay at RLY T position is not important at this time f Interface Option Board and Data Pak Option Board are both attached set po sition 4 on switches 6 7 and 8 on the Interface Option Board CLOSED This will ensure instantaneous response settings for voltage current and power factor displayed on the Data Pak option board f VRC Voltage Reduction Control op tion is attached turn toggle switch to OFF position f VLC Voltage Limit Control option is attached turn toggle switch to OFF position 4 3 3 1 2 Initial Simulation Setup Do you have an operational simulator YES Review Appendix F set up simula tor then proceed to 3 3 2 No The MJ 3A should be provided with
123. e REF 11 Control Panel Board Appendix B page Transformer REF 12 PC Board Transformer Board Appendix B page Figure 4 1 MJ 3A Control Rear View shown w o REF 13 options Because devices at different physical locations COm prise this particular discussion block diagram page Transformer board App REF 21 REF 11 is referenced The PDS connector s rves as the input output connection with the t gula tor that it is controlling It is herethat all interconnec tions to voltage and current transfotmers re made is also via the PDS that the regulator receives the actual tap raise lower excitati n from the controller and for drag hand reset The Mj 3A controller like wise receives excitation from the regulator via this connector for Neutralite indication and for updat ing the operations cotter The electrical O section consists of Control Panel Board Electrical Portion Transformer Board The transformer board is essentially an extension of the control panelfboard and that is how it is de scribed in the discussion Per REF 11 and REF 12 incoming signals from the PDS connector via the control Panel PC board are directed to the trans former board from the voltage and current trans formers at the regulator These signals are applied t the transformer board then re directed to the electronic portion of the control panel board The transformer board provides for proper scaling selec tion a
124. e illustration ref block Page 3 66 I 3 5 3 3 3 68HC11 memory support test NOTE Do not proceed with these tests until section 3 5 3 3 2 is verified To test the support circuitry itisnecessary to have the correct 68 1 Toutput signals This section assumes they are correct gt Observe U5 5 5 017 08 These ad dress both data andyprogram memory When clocked by ALE and should resem ble ref blo k 72 not verify power supply to IC 05 clock should have been 3 5 3 3 2 If no signals appear here but do appear on inputs replace U5 gt Monitor pin 15 This outputs data from memory to the 68HC11 If the line ap pears dead verify inputs to U2 U4 Verify that the CS signal is recieved If above conditions are met but with no Output on the data lines replace appropri ate IC U2 U3 or U4 Maximum input should be 5 volts If not verify that resistor network 1 is properly installed Replace if 5 volts cannot be attained The EA line was verified above to be in a continually high state Thus the output of U9 pin 12 should be low and force the chip enable CE of U2 pin 18 low Verify this is so The RD and WR lines are connected to a pair of inverters and a NOR gate When the output of the NOR gate U8 pin 1 is low a read or write occurs Verify that the output of U8 pin 1 resembles ref block 9 If not then goto
125. e quad comparator U14 and repeat section 3 5 1 11 MJ 3A Regulator Control Service Manual Page 3 41 3 Troubleshooting Procedures TEST REFERENCES 3 3 2 3 3 3 2 16 3 3 2 17 3 5 1 12 Zero Cross Detection Circuit JP TO J1 U1 68HC11 3 9K 011 1N4002 P T ZERO CROSS 3 3 42 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 12 1 3 5 1 12 3 Adjust voltage at voltage test terminals Observe U14 pin 9 on scope and compare Data Pak if so equipped for 120 V rms to illustration reference block 2 Does Observe test point TP5 with a scope with the waveform look similar ground reference attached at TPG 18 YES Verify R17 is properly attached there a 5 volt peak to peak square wave at and is connected to 5 logic level the output of U14 If it appears OK then 14 is defective replace it YES zero circuitry appears OK Go to next item in checklist NO Resistor R20 and possibly R21 appear defective Verify continuity an 9 NO Proper signal does not appear replace as necessaty i Look at input voltage from JP11 to ver ify the presence of about a 20V p p level as illustrated reference block 1 Does it appear 9 YES Problem with P T zero cir cuitry confirmed Proceed to 3 5 1 12 2 NO Verify that jumper JP11 is in stalled If this still does no
126. e resistor R19 and go to 3 5 1 10 4 Page 3 39 3 Troubleshooting Procedures 3 5 1 11 Reset Circuit 1 1 1 1 13 1 TEST REFERENCES 3 4 1 1 3 3 2 2 3 3 2 3 1 10 1 F 1 05 1 SER ss sm E ooet 7 E ERES e 9 50e 0 0 00 40 00e 2 2Ne 2 VLOGIC em A luf 022 154002 g ND 27k 5 I LM139 914 22 LM139 4700 SW10 lt 29 5 VRECT I out Rez cols 49 9K 17 634 10 1 510K C33 10uf VLOGIC 632 8 47K V 0 1 47K 10K 3 5 1 11 1 The 68HC11 is in a non reset state when operating normally Accordingly pin 39 the 68HC11 TP9 should be high 5 VDC potential Is this true YES If the watchdogfs also flashing on the interface option board if so equipped then th 68HCT reset cir cuit and the syst m reset circuits ap pear to be operating OK in the non reset state NO 3 5 1 1422 Page 3 40 3 5 1 11 2 Depress manual reset button SW10 on side of control panel Accordingly pin 40 of 68HC11 TP10 should go to a logic low logic state O VDC potential 9 Yes Goto 3 5 1 11 3 No Failure of transition to a low logic state on TP10 may be the result of the IC U14 quad comparator being defec tive or loss of continuity through R50 R49 or reset switch SW10 First verify with SW10 bein
127. e symptoms of section 3 3 or a known fault would have been looked up in the cross reference section of Appen dix G This section helps to determine when a problem is related to the 1 electrical portion of the control panel board 2 transformer board 3 electronic portion of the control panel board Due to the nature of how the transformer board is electrically daisy chained into the control panel board it is not immediately apparent where the specific fault lies This section helps to isolate faults to not only the particular board buf also to the particular circuit on the board aswell This section will accomplish tw purposes it will establish which ciredit board is caus ing the fault it will provide clues of which circuits particular appear to be causing the prob lem and reference you to that appropri ate circuit section 3 5 Proceed with the suspected circuits in the order shown until the actual circuit has been isolated MJ 3A Regulator Control Service Manual Page 3 19 3 Troubleshooting Procedures Reference for test Reference for test instrument ground to be instrument ground to be made at connector d made at connector 40 40 xt 35 x 3 Figure 3 1 No apparent pow r to control panel 9 Transformer board not receiving power from electrical portion of control panel 3 4 1 No apparent power board due to bad
128. ections and insert the description of the transformer board between them The schemate ics in Appendix C are consistent with this approach and in doing so provide for a clearer understanding of the system Other than this one exception every thing else will be discussed on a board board approach This theory of operation section is Comprised of the following sections System Top Level 9 Electrical encompasses Control Panel Board el ctrical section and the transformer board Control Panel PG Board remaining elec tronic portion jnter dce PC Board Option Data Rak Option Module Voltage Limit Control VLC Option Mod ule Voltage Reduction Control VRC Option Module Page 4 2 4 1 MJ 3A System Top Level 4 1 1 Top Level Overview Circuit Board Layout Appendix A page RER 2 Block Diagram Appendix REF 10 The M 3A regulat r control its minimum config uration consists of the control panel board trans formemboardandPDS connector See Appendix B pages the system is the control panel board which directly or indirectly connects to everything else tincludes an A D input section to convert analog system information from the instrument transformers into a digital code which can be pro cessed by the microcomputer Digital information is then used to calculate voltage current and power fa
129. ective If incor rect readings occur verify that diodes D1 thru D4 are OK Also Verify the 3 5 4 2 Verification of LED operation switch in section 3 5 3 7 E 3 5 4 4 gt Complete 3 5 4 1 before proceeding with this section Test LEDs by putting the switch into the PF position In this position onesof the lights will be on the other off exact sequence depends on the power the unit under test The easiest way to test the LEDs is to verify that 45 Tit then change to the opposite power factor and verify that the opposite LEDystat is now true Does each light perform as described YES LED test operationicomplete 9 NO Did at least one LED illuminate YES Go 933 54 2 1 2 may be defective if neither RED will light If power factor is se lected and LCD is displaying the powerfactor yet neither pin 4 or 5 of U2 i high then replace U2 Input to transistors Q1 and Q2 are high when respective transistor is active If re placement of IC does not solve prob lem then proceed to 3 5 4 2 1 3 5 4 1 If one of the ports is high check the collector of the appropriate transistor If it is high then transistor suspected bad if low then suspected LED or series resistor defective Page 3 78 Verification of LCD driver and LCD oper ation Put rotary switch into volts operation Verify reference block 8 waveform exists to determ
130. ed you obtain the following docu ments as references are made to them throughout y this manual Contact your local Siemens representa tive Siemens Accu Stat MJ 3A Instruction lt Manual part number 21 115527 004 21 115527 003 Siemens Accu Stat Series Regulator Control Operational Performance Evaluation part Q Modification and Repair for Printed sara ead Assemblies IPC R 700B Institute for ing and Packaging Electronic Circuits e from IPC 1717 Howard Street Evanston ILL 60202 2 Introduction 4 MJ 3A Regulator Control Service Manual 1 General Information lt SU SECTION Gener formation Me xS 29 A MJ 3A Regulator Control Service Manua Page 1 1 1 General Information servicing As many different voltage levels are present in the circuitry you must exercise caution during troubleshooting sessions It is also necessary to observe certain precautions during operation of the electronic testequipment used during troubleshoot ing Some of the precautions are designed to pre vent damage to the test equipment or to the circuit where the troubleshooting operation is being per formed Other precautions are to prevent injury to the troubleshooter Where applicable special safety precautions are noted throughout this manual 1 When troubleshooting be especially careful of areas where AC line voltages will be
131. erent high open loop gain of the voltage comiparator provides the necessary signal condition irig to Convert the relatively slow changing 60 50Hz input signal into a square wave This is required to minimize the phase uncertainty as the input signal crosses the zero voltage threshold The square wave output of the comparator is also more suitable for the processing of phase information by the micro computer The rising edge of the comparator output pin 14 is used by the microcomputer s IC1 input pin 6 as the phase angle time reference for both power factor and power flow derivation Also the time Page 4 12 U1 68HC1 1 IC1 difference between the IC1 rising edges is used to derive the power system frequency by the 68HC11 microcomputer The rising edge was used to mini mize component tolerance effects of R17 R20 and R21 on the comparator zero cross threshold which is determined by the bias voltage on noninverting input pin 9 of U14 With the output of the com parator at ground the bias hyteresis voltage at the noninverting input is forced to the analog ground reference or zero volis When the output of the comparator is high resistors R20 and R21 form a voltage divider with the VLOGIC supply reference This divider determines the resulting feedback volt age at the noninverting input The resistor network comprised of R20 and R21 connected to the non inverting inputs provide positive feedback and the necessary inpu
132. ervice Manual 3 Troubleshooting Procedures z 9 is attached 3 3 2 59 Yawa ACTION Record the readings for the LOW VOLT o EE HIGH VOLT MAX LEAD PF and LAG pae nene OE PF 3 5 1 1B Operator Setpoint Switch Logic bd Turn system off for 30 seconds then turn it back on 3 5 37 Interface Board Switch gt Are the values the same as those before you Decoding shut off the power While observing each one of the readings again press the Data Pak Drag Hands reset button Do at NOTE Test procedures 61 thru 67 test for least some of the values reset to another the DIP switches on thecontfol panel board value It is much easier to testwhen using the YES Go to 3 3 2 60 Interface amp Data Pak option modules NO VERIFY 9 The DRAG HAND reset button is 3 3 2 61 SW4 The other pushbutton is the SW3 gt adjustments RESISTANCE V LTSwndREACTANCE VOLTS both back ACTION to zero Refer to section Set conditions for Forward Power Flow e E maximum current and lagging power factor Is the LED off Is the power factor about 3 5 3 3 Microcomputer Mem 700 to 800 lag oiy Management YES Go to 3 3 2 62 3 5 3 7 Interface Board Swit h NO Decoding 3 5 4 Data Pak Option Board VERIFY Power factor is lagging ACTION Disconnect current to C2 by turning th
133. es are encoded via nine switches SW1 through SW9 whose outputs are diod isolated and wire ORed to Port C via diodes 1227 through D63 Refer to section 2 for switch definitions These local on board switches are indi vidually addressed via a CMOS 3 to 8 decoder U17 and Port B through software control Bus expansion is provided through the PCB edge connector J1 to Regulator Control Service Manual 11 allow for voltage reduction control and VLC voltage limit control as well as communications to the Data Pak display option All MJ 3A option inter faces are implemented in CMOS to minimize load ing on Ports B and C and to maintain a reasonable margin of environmental noise immunity The 47K ohm pull up is provided for Port C input bias require ments Additionally the use of pull ups will be pro vided on the option boards due to the increased source current requirements and EMI RFI suscepti bility The following switches are individually scanned when PB4 pin 17 is low This enables able addressing switches local to the control panel via the U17 inputs 0 1 and 2 pins 1 2 and 3 Therequired output code from ports BO B1 and B2 necessary to select a particular switch is listed adja cent to the following switch functions using the convention B2 B1 BO Standard CONTROL PANEL ACCESSED rotary and toggle switches 0 0 0 Voltage Level Setting SW1 0 0 1 Time Delay SW2
134. f the MJ 3A at the circuit board level though this section will aid in fault finding as much as possible it is strongly advised that you read section 4 of this manual operational theory and find out how each circuit works when operating MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures normally In this way you will know in detail how the system should work This will enable you to better understand why a waveform you monitored in a particular circuit deviates from the desired one illustrated in this section and thus better understand the nature of the problem SUGGESTION If time does not permit you to read section 4 in its entirety you can proceed with step 3 until you find out the malfunctioning module involved At this point read section 4 as it relates only to that module STEP 4 A systematic logical procedure must be instituted in order to locate the trouble This is the purpose of section 3 By following the systematic approach the trouble can be quickly located Basi cally there are four major approaches this manual uses to troubleshoot the MJ 3A They are 1 determine trouble symptoms 2 localizing trouble to a functioning mod ule 3 isolate the trouble to a circuit and 4 locate the specific trouble probably to a specific part STEP 5 You must be able to perform complet checkout procedures on the repaired equipment One major reason for the checkout is that the
135. g depressed that U14 pin 5 is less than 1 VDC Yes Replace quad comparator U14 This assumes that the analog supply voltage at U14 pin 3 and the 5 Ref voltage at U14 pins 4 and 6 are present If not repeat sections 3 5 1 7 3 5 1 8 and 3 1 5 9 No Check resistors R50 R49 R48 and R51 for proper continuity Replace as necessary With SW10 depressed the voltage at capacitor C34 should be at a logic low state MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 11 3 3 5 1 11 4 The RESET line on the 68HC11 pin 39 When in a reset state the external reset pointed to by TP9 should transition to a signal at 1 33 should be at a logic logic low state delayed after the transition high level 5 VDC Is this true of TP10 to a logic low state This delay is Yes The system active reset circuits typically in the range of 25 to 5 seconds appear to be operating pr perly Pro Is this true ceed to 3 5 1 11 5 9 Yes Go to 3 5 1 11 4 No Verify proper continuity of R33 9 No Verify quad comparator output and R31 and that sufficient supply U15 pin 7 is within 3 volts of the supply base bias of approximately voltage typically 10 VDC is This true 40 6 VDC exists replace 011 a appropriate 9 Yes Verify proper continuity of R66 and that a sufficient base bias of approximately 0 6 VDC exists at 15 If not replace R66
136. g the MJ 3A 2 1 Control Panel Board 211 Setting the 8 position DIP switch The Accu Stat control must know certain de tails concerning desired operating mode regula tor design and power system arrangements This information is programmed into the MJ 3A through the 8 position DIP switch located at the lower part of the slot found on the right side of the control The functions of each switch are as follows Opening Switch 1 advances the current 90 Set closed for all single phase regulators Set closed on three phase regulators with single phase CT Set open on three phase regulators with phase to phase connected CT s Closing Switch 2 will prevent any tap change if current is less than 2 percent the C T Primary rateing To enable low current tap change Switch 2 should be open With Switch 4 the closed position thef ontrol panel senses true RMS voltage and current4hn the open position the control will sense averaged de rived RMS values the same as sensed in previous analog controls Any difference the values is attributable to harmonic distorti n Factory setting is closed Switch 5 should be clos d on regulators on wye connected systems and open on reg ul ators on delta connected syst ms Switch 6 should be closed on lagging regulators on delta systems and should be open on leading regulators on delta systems Switch 6 has no effect when switch Sis setfo
137. hing the power flow switch to forward creating a forward power flow Did ALERT light go out YES Go to 3 3 2 17 NO VERIFY 9 There are still other alert codes set see Appendix E be greater than 2 mA PDS Connector is making good con tact ACTION Referto section Refer to section that Alert Code Logic Refers you to If due to f Alert code indicates a C T problem determine which mod ule Proceed to section 3 41 3 m 3 3 2 17 Transfer power How to reverse power flow After a 5 second delay did the RPF light come on YES Goto 3 3 2 18 NO VERIFY Using a scope that and are outtof phase ACTION wReferdo section 35 1 12 Zero Cross Detec tion Circuit e 3 5 1 14 Zero Cross Detec tion Circuit 3 5 1 17 Circuit Annunciation Logic 3 5 1 15 CT magnitude Page 3 10 Current level provided to C2 must 3 3 2 18 Temporarily remove or lower the PDS terminal P2 voltage by lowering the load variac on the simulator Did the ob served voltage stay the same YES Go to 3 3 2 19 NO VERIFY RPF light is illuminated if not refer to 3 3 2 17 ACTION 9 Refert section e 3 5 1 26 Relay Driver Circuits 3 3 2 19 Put powerflow in forward position Close position 2 of SW9 the 8 position DIP switch Slowly turn
138. ial was Verify continuity thru RN13 pins 1 near vols then tha gy an atf VERIFICATION OF AUTO INHIBIT FUNC condition or no bias voltage exists TION Verify continuityOf R52 If this is true then go to 3 5 1 16 2 4 this is incor Place a jumper across the transformer ter rect then continue minal strip terminals P and P14 The tap light on the simulator should t The relay is de energized by the 68HC11 uA acer dg indicating that the tap change has been bd or a fault exists most likely with the transis inhibited tor driving 012 Q13 or 014 Verify mn the continuity OF R52 ree ne light go off when the jumper gt 4 respective port of the 68HC11 RODEO PD PDS low 0 volts YES Tap inhibit circuit is OK e YES This is as it should be for an ON NO state If relay is de energized then re Recheck settings listed in place respective transistor driver be 3 5 1 16 4 and start over cause it is defective with DVM check for a voltage This is the wrong logic for an ON reading of O V on pin 8 of U1 The condition Either the 68HC11 is OK jumper is still installed If volts and the how it operates is misunder appears but K light is still on re stood or the output port is defective If place the microprocessor MJ 3A Regulator Control Service Manual Page 3 51 3 Troubleshooting Procedures El 3
139. ifier input of Ul5atan input current level of 700 mA to within 20 volts P P This voltage is then fed intoa precision full wave bridge rectifier similar to the rectifier composed of RN12 U15 and D17 The reason an active filter is used over a diode type rectifier is to reduce the size requirements of the C T when used with the rectifier scheme The problem with a passive diode rectifier is that at low current levels a significant portion of the C T current may be shunted through the magnetizing reactance of the C T due to the blocking effect of the diodes forward voltage drop in the bridge circuit The output of the rectifier is then fed into the 68HC11 s AN1 analog input through a clamping network formed by R29 and diodes D18 and D19 The 68HC11 will then obtain an average derived or true rms value of the incoming rectified voltage signal in a fashion similar to that employed forthe rectified signal Refer to P T ircuit description The rectified rms voltage at the 68HCT T s A D input ANT is directly related to the current circulat ing through the C2 C terminals TB2 s n the trans former board The relationship between the circulating C T current and the voltage appearing at the U1 pin 18 AN1 analog input is given by the turns ratio of the T3 auxiliary transformer the burden resistor R28 and the fullwave rectifier gain Le C2 C AN1 100hms x 0 5 A simple tech nique f
140. ine that the LCD driver IC is functioning properly verifing internal oscil lator operation Does waveform exist YES Verify that waveforms on refer ence blocks 9 10 and 11 appear at points shown and also on the A thru G segment drivers inputs of the LCD Check that the waveforms on reference blocks 3 and 4 exist to ensure that the LCD is being properly addressed If not go to section 3 5 3 6 Verify that waveforms at reference blocks 1 and 2 are true for the DP1 DP2 and inputs in the volts set ting If these signals are seen but refer ence blocks 9 10 and 11 are not then replace U3 If all the drive signals are present to the LCD but it does not light replace the LCD 9 NO If itis not first verify that the chip is receiving proper voltage to pins 1 and 35 Ifso replace U1 After replacement go back to 3 5 4 4 MJ 3A Regulator Control Service Manual jonuo 21A lt lt 9 d InueW 3O AJSS VE IW 6VDC NHT 1 ALL DIODES ARE 41487 GRIGSBY SWITCH 1e 816 4 64 a8eqg p o dsn 10 uon jur lt ONES Vos 3 ALL RESISTORSQARE 1 4 57 gt 14 Sunootso qnoa 3 Troubleshooting Procedures 3 5 5 1 gt Data is directed to the VLC from the interface board via J6
141. ing at 10 seconds and the bandwidth of 4 0 V computer U1 gt On the simulator turn the voltage magni tude knob fully clockwise create an 3 5 1 16 3 overvoltage situation This should cause the band indicat t high light to come on VERIFICATION OF RELAY IN ON STATE y bd Does the K light on the simulator come Each of the three relays RLY12 RL13 and on after 10 Seconds RL14 have a common side of the coil tied YES to 355 1 16 5 to analog ground Thus when a relay is activated ON the other side of the coil 9 that the above settings are should be at 6 volts For verification pur correct poses this implies that the cathodes banded sides of the associated flyback diodes must be at 6 volts if the relay is to Using a DVM or scope verify that a be ON 2 gt Isthe cathode of the flyback diode for the YAR T Or ON TUBES SIUE OLN relay in question at 6 volts DC TP12 Does this voltage exist on both sides TP13 amp TP14 YES Proceed to 3 5 1 16 6 YES Verification of relay in ON state is NO confirmed Further by ensuring that the normally open and normally and 10 If none replace resistor closed contacts are the inverse Ifthe RN13 relay is not energizing then vefif again TA the 6 volt potential across the coil If so Go to sections 3 5 1 7 and 3 5 1 8 then the relay is faulty replace it NO If the potent
142. input to U1 is not at 5 volts reference block 1 then replace U9 NO Verify that pressing reset button SW3 causes this line If not do continuity check on SW3and replace if necessary Go 2 5 3 5 4 Page 3 70 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures H 3 5 3 6 Port 2 Arbitration Logic TESTREFERENCES 2 3 3 2 55 thru 3 3 2 60 3 5 3 7 Switch Decoding 3 5 3 8 Data Pak Interface Logic 1 05 DRAGHAND 04 RESET AMMETER INTEGRATED DEMAND TIME CONST EXPANDER MJ 3A Regulator Control Service Manual Page3 71 bd bd bd 3 Troubleshooting Procedures 3 5 3 6 1 The portion of circuitry contained in this sec tion is utilized in many circuits The specific portions of the port 2 arbitration logic which is used by a specific circuit will be tested in that specific circuit test procedure For a quick test of the logic for these circuits verify the waveforms as illustrated For a through test of this circuitry refer to the following circuits Switch Decoding 3 5 3 7 Control Panel Bus Arbitration 3 5 3 9 Control Panel Communications Interface 3 5 3 10 Data Pak Option Board 3 5 4 3 5 3 7 1 INTERFACE BOARD SWITCH DE CODING If you were led here due to the la
143. it 02 04 O6 10 Sec MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 5 1 3 5 3 5 4 Themicrocomputer U1 non reset state Place jumper across LED1 short it out when operating normally Accordingly pin 4 Does reference block lappear as of U1 reference block 2 should be high 5 illustrated VDC as illustrated Is this true e YES Replace watchdog LED YES the watchdog is also flashing on e NO Verify that referehice Dlock 3 ap the inter ace option board then the reset pears at the base of Q1 I n t replace circuit appears to be operating OK Other R5 U1 If it does apBear check the wise go to 3 5 3 5 2 collector of Q1 If n evident waveform 9 NO Go to 3 5 3 5 2 is apparent ther replace Q1 if wave form is there then Verify components 3 5 3 5 2 020 021 4 CT Theinput of 012 pin 3 should be about 1 volt as illustrated by reference block 4 Verify this is so YES Go to 3 5 3 5 3 e NO If the voltage measured here is incor rect verify resistors R10 R11 and R12 are correct values color bands 3 5 3 5 3 Verify waveform on U12 input pin 2 is per reference block 1 YES Signals into U 12 are correct Ifutput signal logic low appears at U127 pin J then reset circuit appears OK signal is observed at U12 pin 1 then replace U12 If U12 pin 1 islogic low b tthe reset
144. it is defec PA4 PAS PA6 PAZ PB6 or PB7 at a logic tive low 0 volts bd NO This is then the wrong logic for an ON YES This it sh uld be for an OFF condition Either the 68HC11 is OK and state If lit then replace U18 the logic of how it operates is misunder driver because it is defective stood or the output port is defective If the NO Thidtis then the wrong logic for an latter is the case replace 68HC11 micro condition Either the 68HC11 is OK computer U1 and thef logic of how it operates is misunderstood or the output port is defective If the latter is the case re place 68HC11 microcomputer U1 MJ 3A Regulator Control Service Manual Page 3 53 3 Troubleshooting Procedures TEST REFERENCES 3 3 2 5 3 3 2 9 3 3 3 3 2 13 3 3 2 15 3 3 3 3 2 60 thorough 3 3 2 66 3 5 1 18 Operator Setpoint Switch Logic 2 10 2 19 1 6 40040 Waveform 5 60e 0 8 zi 4 80e 0 rr 8 5 a Ne Pd ee Tor gt 2 40680 eben toes L 8 006 1 5 0 00e 0 T efo a 0 00e 0 1 00e 2 2 00e 2 e a qum e 1 60e 0 Wavefora 90 PHASE SHIFT MIN 8 00e 1 5 60040 NU T ens 4 80640 4 0 00040 1 006 5 4 Seconds 4 3 20 0
145. itry For this reason an entire section of this manual is devoted to explaining operational theory at the circuit board level to provide an in depth understanding of the MJ 3A control Although the troubleshooting section provides a step by step approach where an in depth understanding is not mandatory maximum effectiveness at fault finding is attained by a better understanding the details of the system Introduction 2 Using this manual you will be able to troubleshoot 2 the MJ 3A control with much greater efficiency and a much better chance of success Whether you re interested in intricate details of the operation with the time to test and replace components at the board level or one who simply wants to get the system fixed as soon as possible and desires to find faults only at the module level this should help you do the job well and quickly Organization of Manual This manuah js divided into four major sections followed by a series of appendices Each section and appefidix can be easily located by the large number ontheoutsidepage column referencing It is highly recommended that you be aware of these sections cohtentsS so the appropriate information can be found quickly when needed The most accessed references are located in the appendices Section 1 provides information on safety precau tions specific to the MJ 3A recommendations for test equipment and a summary of troubleshooting techniques
146. ive feedback for input threshold hysteresis When the input supply voltage falls below the minimum threshold point typically lower than 80 vac the output of the low voltage detect comparator U 14 pin 2 is forced to an active low As previously described this output action forms the third source for SYSTEM RESET This same logic also supports with the Manual Reset function When the input ac voltage at the PDS U2 input goes above the low voltage threshold point typi Cally greater than 85 vac the comparator output is then forced to an active high state after the power up delay established by R51 and C34 Note that the low voltage power detect minimum maximum thresholds will fluctuate with the level of loading place on the VRECT power supply Specifically if any option modules are attached to the MJ 3A front panel the threshold voltage window will increase slightly depending on the type and number of op tion modules installed Under worst case loading the maximum power up threshold should shift up ward to no more than 90 vac i e the minimum specified MJ 3A operating voltage MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory Operation 4 4 2 Interface PC Board Detailed Schematic Appendix C page 23 4 4 2 1 8035 Aidroeomputer The interface board uses n Intel 8035 at the heart of its system Provisioris on the interface board have also been made t accommodate the 8748 and 8048
147. ive voltage excursions to within 0 5 volts of the ground referefice Thi is necessary to guarantee proper operation phase reversals of comparator U14 of negative input voltages below it negative power rail This clamping technique fninimizes zero cross phase error resulting fromthe offset threshold uncertainty of comparator 414 by clamping the output signal withoutSacrificing its effective rate of change value as it crosses Zero The inherent high open loop gain of the voltage comparator provides the necessary signal condition ing to convert the relatively slow changing and low level 60 50Hz input signal into a square wave Ihis is particularly necessary at very low levels of line current in order to minimize the phase uncertainty as the input signal crosses the zero current thresh old The square wave output of the comparator is Page 4 14 U1 68HC11 alsowmiore Suitable for the processing of phase infor matjon by the microcomputer The rising edge of the U14 comparator output pin 13 istused by the microcomputer s IC2 input pin 7 40 determine the phase angle time difference from the P T voltage zero cross rising edge time reference applied to IC1 via U14 pin 14 This measured time difference is used for the basis of both power factor and forward reverse power flow derivation Similarly the rising edge is used to mini mize component to
148. l time delayed sweep equipped with external trigger input Use only low capacitance probes to ensure that circuitry being analyzed is not loaded by the probes such that the circuit operation is affected or the measured waveform is distorted As an oscilloscope provides a means of visualizing time varying voltages or signals it is a perfect trou bleshooting tool for the MJ 3A which has a basic control function based on incoming time varying signals Because the heart of the is micro computer the controlling waveforms can best be viewed using the digital scope Section 3 requires the use of a scope to enable comparisons against illustrated waveforms to provide fault detection in a circuit It is assumed that the troubleshooter has some experience with the use of an oscilloscope and this manual will not attempt to teach the basics of operating one Page 1 3 1 General Information 1 2 3 Analog and Digital Meters The most obvious advantage of using the scope is that it shows waveform frequency and or time duration and phase simultaneously with the voltage being measured If however the only value required when troubleshooting is voltage or current use the meters because of its simplicity in readout as well as its desired form of readout rms or average This form of readout is desirable for example when wanting to find the accuracy of the voltage and current magnitude circuits on the control panel b
149. l to provide maximum control panel output power pins 6 5 8 and 7 ataturns ratio of 115 10 They are then routed directly to the output connector J3 pins 1 and 2 where the control panel board receives a nominal 10 VAC source at a 115 VAC input for later rectification T1 is a split bobbin coil design to provide maximum isolation and to minimize RFI coupling 4 2 2 2 2 Potential Transformer T2 The sensing transformer is fused by F2 and surge protected by MOV11 amp 13 both located on the control panel PCB Additional voltage surge protec tion is provided by snubber C2 and R4 during source select relay transitions The Potential trans former is configured via the jumpers on TB1 men tioned previously The primary of T2 pins 1 and 2 is connected to the nominal 120 load side voltage of the regulator via TB1 terminals P and P14 when the compensation relay RLY1 is not installed The reverse power flow TB1 compensation jumpers are labeled PA and P14A and and P14B and are active when the compensation relay is installed Transformer T2 secondary pins 4 and 5 provides the magnitude reference to the MJ 3A control ler The turns ratio of T2 is set at exactly 128 5 Included in the T2 transformer design are correction windings to compensate for P2 or U2 voltages not at the reference value Any deviation is calibrated out at the factory when the MJ 3A controller is attached to a particular regulator via a
150. lerance effects of R23 R25 and R26 on the comparator zero cross threshold which is determined by the bias voltage on noninverting input pin 11 of U14 With the output of the comparator at ground the bias hyteresis voltage at the noninverting input is forced to the analog ground reference or zero volts When the output of the comparator is high resistors R25 and R26 form a voltage divider with the VLOGIC supply reference This divider determines the resulting feed back voltage at the noninverting input The resistor network comprised of R25 and R26 connected to the noninverting inputs provide positive feedback and input hysteresis The actual threshold voltage depends on the output state as previously described in the C T zero cross description Without hystere sis noise voltages may cause multiple switching to occur on slow and low level input transitions i e less than 2 of rating It is desirable to set the total hysteresis voltage larger than the expected magnitude of noise Capacitor C23 provides supply decoupling at the U14 power inputs pins 3 and 12 MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation C T Magnitude Input Circuit The second analog processing path routes the scaled secondary current of T3 into a precision shunt resistor R27 amp R28 where it is converted into a voltage The value of R28 was chosen to limit the maximum input seen by the rect
151. lipping all the IC pins going into the IC body Heata pin on the foil side forabout 3 seconds While the solder at the pin is melted use the desoldering tool to force the molten solder from the plated through hole If you are unsuccessful then re solder the pin and try again Do the same for every pin MJ 3A Regulator Control Service Manual 1 General Information After the holes on the foil side look relatively clean using the desoldering braid remove excess solder from each of the circuit side IC pins while at the same time trying to force the IC pin towards the center of the hole This step accomplishes two purposes First it removes additional solder which was not removed during the desoldering from the foil side Second it detaches the pin from being attached to the plated thru hole Use extreme caution notto damage traces on either the top or bottom of the PC board in the process Also when removing IC pins from the PCB holes be careful not to damage the plated thru hole itself If itis ever necessary to remove an IC from its socket use an IC puller or a small blade screw driver Push the end of the IC puller or screwdriver blade be tween the IC and the socket and carefully lift the IC free If any IC pins become bent straighten them carefully When using a screw driver to remove an IC be careful not to damage any PC board traces INSTALLING IC s Take special care in installing any IC as they may be damaged o
152. ll correct the sensing transformer for Rorward and Reverse power flow conditions Refer to Siemens Instruc tion manual P N 21 115527 001 for further de tails PAO TAP INHIBIT pos U1 68HC11 PD4 PD3 3 9K igure 4 17 Relay Driver Page 4 16 2N2907A rcuits N21 MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation NUL 16 R38 S 5 ALERT 2012 1 580 lt R39 CHDOG Kaw 1 4 UV LED13 TSW LOW Eva 4 2 Circuit Annundation Logic ser Interface Circuits Circuit Annunciation Logic A high current 500 mA Darlington driver IC U18 is used as an interface between the 68 Ports thru PB7 and LED11 thro gh TED 12 respec tively Pullup resistors fromyresistor network RN13 connected on each of the inp t pins of 018 ensure that the associated Darlington driver will be biased on turning on the LEDs when the microcomputer port is turned off Resistors R38through R44 provide the necessary current limiting for their associated LEDs Operator Setpoint Switch Logic Setpoint the MJ 3A is made via stan dard control panel rotary switches control panel toggle switches and by setpoint switches accessed from the right side panel of the MJ 3A These setpoint parameter switch
153. ments of the status indicators LED2 and LED 1 Resistors R6 and R7 provide the necessary current limiting for the LED indicators to typically 15 mA Capacitor C2 and C1 provide decoupling for the 6VDC supply Re sistor R8 provides additional pull up biasing for the incoming RESET line MJ 3A Regulator Control Service Manual Page 4 35 4 MJ 3A Detailed Theory of Operation 4 7 Voltage Reduction Control VRC Option 4 7 1 VRC Overview Circuit Board Layout 9 Appendix A page REF 8 Block Diagram 9 Appendix pages 17 The VRC is an optional feature that can be added to the MJ 3A to allow for local or remote voltage reduction control upon demand The VRC hardware resides on a PCB that connects to the interface board via J7 It incorporates a local remote switch function SW2 for enabling either externally or locally the VRC setpoints and a VRC status indicator LED1 The VRC set point range is selectable from 0 to 10 percent in 1 percent increments and incor porate a binary encoded type switch SW1 Operating Modes Two operating modes are possible witb the VRC on an Accu Stat MJ 3A 1 Activation either by local switch or re motely fofa period of three seconds or more will cause the regulator to lower the output Voltage by the preset percentage This reduction will be maintained for as long aS VRC is activated NOTE This mode of operation is identical to that of previous
154. move a solder bridge hold the circuit board foil side down and hold the soldering iron tip between the two points that are bridged The solder will flow down the soldering iron tip to clear the bridge After any soldering repair ensure that the area repaired is cleaned with rosin flux remover Locating and Repairing poor solder joints The low voltages in solid state equipment make them vulnerable to poor solder joints cold solder joints When there is no obvious cause for a low voltage at some point in the circuit or there is an abnormally high resistance look for cold solder or printed circuit defects Use a magnifying glass to locate defects in printed wiring Minor breaks in printed wiring can sometimes be repaired by apply ing solder at the break however the entire board should be replaced if there is more than one Cold solder joints can sometimes be found with an ohmmeter Remove all power Connect the ohm meter across two wires leading out of the suspected cold solder joint flex the circuit and note any change in resistance Look for resistance indications that tend to drift when the ohmmeter is returned to a particular scale If cold solder joint is suspected reheat the joint with the soldering iron then recheck the resistance Page 1 6 1 3 3 Component Replacement Re apply conformal coating to any area f the board which had been modified Integrated Circuits Testing Removal Installation TES
155. multi plexer test Connect a scope to the mux 92 9 Verify the wave form see to that of the illustration in reference block 1 waveform 9 If nactiVity appears on U1 port lines then go to sections 3 5 3 1 and 3 5 3 2 Verify that U7 is enabled reference block 1 and that the mux output is activated any outputs of U7 Replace 7 if inputs are detected but there are no outputs enabled 3 5 3 8 1 A detailed test procedure for the Data Pak is conducted in section 3 5 4 The specific areas of the interface board which are required for Data Pak operation will be tested in that section Fora detailed explanation of the Data Pak operation refer to section 4 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 9 Control Panel Bus Arbitration 24 e 30 3 TEST REFERENCES 6 3 3 2 53 1 Mise 5 P27 P26 9 G Pes 3 2 pea gt Pee pee 6 Pet 3 P20 peo 1 4 TEN 22 30 705 1 04 MJ 3A Regulator Control Service Manual 10 FUTURE SOCKET TO COMMUNICATIONS INTERRUPT CIRCUIT 3 Troubleshooting Procedures tion is utilized in many circuits The specific portions of the control panel arbitration logic which is used by a specific circuit will be tested in that specific circuit
156. n this case you are directed tO section 3 4 phase 2 which will determine the cifcuit board then lead you to the specifi circuitin section 3 5 Yowwill be eventually led to section 3 5 which will illustrate the circuit in question and provide a procedure to verify its operation Go to the circuit mentioned first in the Action list If it appears OK then go down the list of each of the mentioned circuits until the fault is found MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures E TART OF TROUBLE YMP ANALYSIS 3 3 Determining Trouble Symptoms 3 3 1 Initial Settings of Operator and Simulator Controls Set the controls to the settings listed below Doing so will ensure consistency with the routines fol lowed in this manual Reading the Siemens MJ Operational Performance Evaluation P N 21 115527 003 manual will be very helpful in under standing the organization and approach used in the troubleshooting section of this manual This is espe cially true with reference to the initial setup pro ceedures and terminology Also this manual contains the same settings that will be us d in the troubleshooting section of this manual B 3 3 1 1 MJ 3A Control S ttings Refer to control overlay MJ 3A 9 Manual auto switd h off 9 Bandwidth 6 Voltage Level 120V Time Delay 30 seconds Resistance volts 0 polarity 9 Reactance volts 0 polarity SW9 th
157. n a LOCAL set ting Does the light illuminate as soon as the VRC is activated without regard for time delay setting YES Go to 3 3 2 68 NO gt VERIFY 9 Switch on VRC is in a detent position ACTION Refer to section 3 5 6 VRC option bd bd 3 3 2 68 PutVRC switch into REMOTE switch setting Does the K light immediately off and stay off when the transition is made YES Go to 3 3 2 69 NO ACTION Refer to section e 3 5 6 VRGoption MJ 3A Regulator Control Service Manual 3 3 2 69 While the system is powered momentar ily touch the two VRC contacts on the trans former board with a jumper wire then remove Does the K light illuminate when the jumper makes contact and immediately go off when the jumper is rem ved YES Go to 3 3 2 70 NO VERIFY 9 The VRC are shorting to gether ACTION Refer to Section 97 3 5 2 35 Zero Cross Trans former 14 3 5 6 VRC Option L I 3 3 2 70 gt Do you have a VLC option module NO Go to 3 3 2 101 YES Turn toggle switch on VLC to ON position Go to 3 3 2 71 Set the VLC UPPER volts to a setting less than the actual voltage Do all band indicators extinguish them selves Does the K light illuminate im mediately YES Go to 3 3 2 72 NO ACTION 9 Refer to section 3 5 5 VLC option
158. n96 leading YES 33 2 67 3 3 2 63 e NO Revert to Forward Power Flow Wait 5 sec mA CTION onds for response Set control panel DIP switch position 7 to the closed posi COCCCCCC Is the RPF light on Does the power factor remain as in 3 3 2 61 YES Go to 3 3 2 64 NO VERIFY Control panel DIP switch 8 9 Refer to section 3 5 1 18 Operator Setpoint Switch Logic NOTE Test procedures 67 69 test the VRC option procedures 70 71 test the VLC option and procedures 72 73 test both If you do not have either of these option modules then proceed to 3 3 2 101 position 7 is firmly in a closed posi tion ACTION Refer to section 3 5 1 18 Operator Setpoint Switch Logie 3 3 2 64 Set DIP switch position 1 open Is power factor now leading YES Go 0 3 3 2 65 ACTION 9 Refer to section 3 5 1 18 Operator Setpoint Switch Logic Page 3 16 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 3 2 67 Ensure that control panel board 8 position DIP switch is set to its initial condition per section 3 3 1 COCCCCOC Do you have a VRC option module NO Goto 3 3 2 70 YES Proceed Set the voltage switch such that it is within 1 5 volts of the measured voltage and the in band light illuminates Set the VRC switch to 596 setting Turn on VRC by putting the switch i
159. nd isolation of the incoming voltage and current signals MJ 3A Regulator Control Service Manual Page 4 3 4 MI 3A Detailed Theory of Operation 4 2 2 1 Control Panel Board Electrical Portion Reference Appendix C page REF 20 Figure 4 2 PDS Connector 4 2 2 1 1 PDS Connector The Control Panel Board interfaces with the outside world via the PDS polarized disconnect switch and is attached to the control panel board The PDS attaches to a stationary female section mount d at the regulator All electrical interfaces from th lator to the are made via this c nnector assembly The electrical connections from left to right Terminal 012 Terminal from contact switch of regulator to indicate that tap changer is neutral position This in turn activates th amp F TRALITE on the control panel of the Terminal P2 Output frompotential voltage transformer winding This voltage reference pro vides the source for the regulating reference signal to the MJ 3A if 9 thecontrolpan l External Internal Power switch SW is in the NORMAL posi tionJAND relay RLY13 contact pins 5 4 closed Terminal 2 Output from current transformer This input provides the reference to the for determining the load current and its phase relation ship to the voltage input within the power system Terminal E AC voltage common retu
160. ns over the entire oper ating temperature range The overall absolute value rectifier is 0 5 Therefore with the given T2 turns ratio of 128 5 the peak output oftthe absolute value rectifier should approach but not exceed the maximum A D input of 5 voltspwithta maximum P T input of 180 volts rms The outp t of the rectifier is fed directly into the microcomputer s ANO 17 analog input via dlamp network consisting of diodes D13 and 074 68 1 1 will then calculate either an average derived or true rms value of the incoming rectified Voltage signal by very rapidly sampling the waveform ver 50 msec sampling period threeseycles at 60 Hz two and one half cycles at 50 Hz Thefdecision to execute either an average derivederms algorithm or a true rms algorithm b made via the I D configuration DIP switch SW9 4 see section 2 for configuratio information During the sample inter val the digitized analog magnitude samples are either c ntindously integrated summed for the average derived algorithm or a continuous sum of the squares operation on the digitized analog sam ples is performed over the 50 msec period for the true rms algorithm At the end of the sampling p riod the 68HC11 will contain a digital count that is either directly proportional to the true average val e of the incoming magnitude or that is directly proportional to the square of the true
161. nt by applying the necessary binary code to the I O select decoder U10 inputs and C pins 11 10 and 9 This action will then activate the specified output of the decoder 010 which is then routed to the proper I O device For the VRC module three select outputs are used for control of the VRC indicator and reading of the VRC switches The VRC setpoint switch SW 1 is enabled via I O select line 1 05 This line is routed to the VRC module via connector J7 pin 11 The specific switch information is read by the microcomputer by driving the common switch input pin C to ground potential low via the I O select decoder 010 on the interface board This action will in turn force the associated Port 2 input lines P20 P24 low through isolation diodes D1 thru D40 for any switch con tact that is connected to the switch common pin C Likewise for any switch contacts not shorted to the common pin the associated Port 2 input will not be pulled low but will remain at a logic high It is in this manner that the switch positions are then de coded by reading the resulting binary code via the Port 2 input lines of the control panel microcom puter MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation Similarly the presence of the VRC module and its activation via the LOCAL OFF REMOTE switch SW2 sensed using I O select line 1 04 on J7 pin 13 When the VRC module is attached to the J7
162. nual 3 Troubleshooting Procedures TEST REFERENCES 3 42 2500 ISOLATION ea SHORTING BAR OPTIDNAL SOURCE SELECT SS OPTIONAL 40 3 3 5 2 1 Sensing I ransformer T2 Note that secondary is 5 128 of the primary If waveform is there transformer is OK if not there replace transformer Ensure that voltage on Data Pak display or 2 or voltage test erminals set for 120 rms Verify on scope DVM with ground reference at 2 3 that the incoming AC 9 NO Verify that jumper from P to P14 waveform Areference block 1 appears is installed Verify that power is entering going int transformer T2 primary on ter transformer board from control panel minal J2 1 board see section 3 4 1 YES Verify that waveform at refer Verify that when RLY13 on the control ence block 2 ground reference at J3 panel board activates the PT compensa 3 appears on secondary of tion relay energizes If it does not energize transformer when 6 volts appear across the coil re place Rly13 Verify flyback diode D1is OK also If 6 volts does not appear across the diode then replace D1 MJ 3A Regulator Control Service Manual Page 3 57 3 Troubleshooting Procedures POWER TRANSFORMER n 10 115 3 5 2 2 PoWer Transformer T1 Ensureithat voltage Data Pak display or on voltage test terminals is set for 120V rms Verify nm SCope or
163. o not operate correctly 3 70 Switches 0 Data Pak do not operate correctly 3 79 3 80 Voltage not present at TEST TERMINALS 3 22 Voltage is not correctly sensed 3 45 VLC Voltage Limit Control Option not operating properly 3 79 VRC Voltage Reduction Control Option not operating properly 3 82 Watchdog lite control panel doesn t flash 3 20 Watchdog lite interface board panel doesn t flash 3 68 MJ 3A Regulator Control Service Manual REF 45 Appendix Fault Symptoms Guidance PAGE LEFT pos REF 46 Regulator Control Service Manual Appendix H Diagnostic Quick Reference APPENDIX Diagnostic Quick Reference MJ 3A Regulator Control Manual Ref 47 Appendix H Diagnostic Quick Reference Test Point Quick Reference Table The following table is appended for the convience of quickly determining the pri mary test points and quickly locating the pages where these test pointsrare men tioned XTAL U1 PIN 30 MOTOR RAISE RELAY 1 PIN 1 3 50 3 51 PT SOURCE RELAY 1 PIN 1 3 50 3 51 Ref 4
164. oard At times the meter is simply more conve nientto use when reading AC DC levels or checking resistance You will need a high input 1 M ohm or greater VOM volt ohm meter DVM digital voltmeter or VTVM vacuum tube voltmeter to make resistance and voltage tests It is preferred that the voltmeter be a true rms reading type however if the meter is one which displays an average voltage with an rms correction as for most common dial point meters it will suffice Note For convenience a reference chart for en verting rms average peak and peak to peakwolt ages is provided at the end of this chapterin Section 1 6 1 2 4 Signal Generator Recommended if operational simulator is NOT available Note Section 3 assum s the presence of a simula tor therefore references to simulator useage will be impossible Usedto emulate th voltage and current amplitude and frequency ignals the operational simulator would normally provide Two signal generators are required for optimum testing basic function of the MJ 3A is to provide control based on the incoming voltage and current signals these signals must be simulated to verify the MJ 3A is functional Page 1 4 For the testing of any power factor other than unity separate signal generators are required for voltage and current In this manner any phase condition can be simulated At least one of the generators needs to have a trigger input
165. of 3 93216 MHZ yields an instruction cycle time of 3 75 microsec onds Capacitors C16 and C17 help to prevent thefinternal clock oscillator from operating at any harmonics of the crystal used To accomplish this two 20 pico farad capacitors are connected fr m ground to both leads of the crystal 14 15 1 10 pe f Jl 16VDE 5VDC Figure 4 22 Power Supply 123 886 4 22 bus feature of the microcomputer 4 4 2 3 Power Supply The unregulated 16VDC volt supply from the con trol panel board is available at connector 1 on pins 12 and 13 The interface board locallyegulates this 16 volt level for both 5 volt logic reference 5VDC and for 5 volt NOVRAM feference This is accomplishedgvia 5 volt regulator U13 Capacitors and C2 provide filtering and decoupling Schottky diode D1 acts as a barrier to isolate the 5 volt logic reference from the NOVRAM reference ensuring thatthe 5 volt logic reference will not drain the NOVRAM reference voltage The storage capacitor G4 is large enough to provide an adequate NOVRAM bias duration in the event of power failure At thexmicrocomputer C12 and provide added d coupling and reduced noise sen sitivity referto 23 23 U36 for placement provides decoupling of the 6 VDC supply on the interface board 4 4 2 4 Microcomputer Mem ory Management Program Memory Program memory is accessed using the BUS da
166. old transistor QA is biased off thus forcing Q3 into conduction This results in a high tolow edge trigger at the multivibrator s B input therefore activating a NOVRAM STORE sequence as previously de scribed Capacitor C11 reduces the response sensi tivity of the circuitto any noise that may exist on the 5VDC supply MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation 4 4 2 6 Reset Circuit The reset circuit consists of a watchdog charge pump circuit C7 C8 020 D21 Q1 R4 R5 LED1 and a self arming watchdog timer comprised of voltage level comparator circuit U12 U9 R8 R9 R10 R11 R12 C9 which provides a simple and reliable means of automatically resetting the micro computer should it become lost Under normal operating conditions a 8 Hz square wave will ap pear at the output of the 8035 U1 P10 output pin 27 This signal is directed to the base of transistor Q1 turning it on This periodic signal at the collector of Q1 will maintain a voltage level at the negative input of U12 pin 2 greater than the positive input voltage threshold via the charge pumping action through C7 C8 D20 and D21 As a result the output of U12 will be forced to a low level Should the normal program execution flow become dis rupted the high voltage level stored on C7 will discharge thru R8 below the positive threshold causing the output of U12 to go high This level is directed to the J8 bus f
167. oper control settings For this reason it would be desirable to determine first the nature of the problem firsthamdWandMyerify the defective claims made PHASE 2 LOCALIZING TROUBLE TO FUNC TIONING MODULE OR SUBSYSTEM The MJ 3A regulatorgcontrols can be subdivided into modules circuit boards that have a definite purpose function Block diagrams of the MJ 3A Appendix B shoWathe functional relationship of all major sections in the Complete assembly and are the most logical Source of information to use when localizing trouble to a functional module Initially the schematics will be used only for referencing waveforms at key areas Actual component references will for the most part not be made during this phase The MJ 3A is divided into several functioning units consisting of discrete circuit board assemblies with well defined input output functions These are 1 control panel PCBoard Printed Circuit Board 2 transformer PCBoard 3 interface PCBoard 4 Data Pak display option PCBoard 5 VLC option PCBoard and 6 VRC option PCBoard When simulating the operation of the MJ 3A the module most believed to need attention is often found in phase 1 determining trouble symptoms If that is the case then you can proceed directly to the verification of trouble relating to that module The completion of the determining trouble symp toms step will not isolate the trouble to a defective component that comes later in the tro
168. or Q15 i appropriate gt This test verifies proper operation of the loss detection logic associated with the resetlogic Improper operation could result false reset state No Verify proper continuity of R67 R36 R37 R35 and C29 Re place as necessary component continuity exists verify voltage at with the control panel activated verify U15 pin 6 Inverting input is that filtered full wave rectified signal lower than U 15 pin 5 non invert appears at quad comparator U14 pin7 in ing input bs this true the range of 13 to 18 VDC Is this true 2 Yes This should force the output of cum 5 pcequad compar U14 pin1 to an off state This is not easily verified since a second U14 out No Verify levelet put at pin 2 is logically ORed with the R36 and repeat section pin 1 output If improper operation of 3 5 1 11 2 U14 pin 1 is suspected replace U14 9 No Verify continuity of diodes 021 and D22 If shorted or open replace Verify continuity of R46 Replace if defective Remove AC power from control panel Verify that pin 40 of the 68HC11 TP10 immediately goes to a logic low 0 VDC active reset state Is this true Yes Loss of AC detection logic ap pears to be operating properly Reset verification complete No Verify voltage at U14 pin7 drops to below 5 Ref at U14 pin 6 within 2 60Hz cycles If not replace R 47 If true then replac
169. or determining the true rms voltage of 4he rectified waveform at AN1 using a standard true rms responding 4 1 2 digit DVM is given byahe follow ing 1 measure the dc rms voltage Component of AN1 2 measure the ac rms voltage component of AN1 3 square both values and stim and finally 4 take the square root of the squared sums This value is now directly related to thejtrueirms current circu lating through the C2 Caterminals by the described relationship above of 0 5 or better should be a 4 mA to 640 mA rms input signal tange Other components used in the C T magnitude sig nal conditioning circuit serve to protect the micro computer from noise and transients Bypass capacitor G26 is used as a filter for high frequency noise orrthe analog input and for decoupling of he sample hold switching action within the 68L1C117A D section Resistor R29 provides cur rent limiting to the 68HC11 analog input port and diode clamps D18 and D19 Diode clamps prevent any voltage level transients greater than 6 6 v and less than 0 6 volts from appearing at the input of the 68HC11 Capacitor C25 provides supply decou pling at the U15 power inputs pins 4 and 11 TO 91 37 43 6 AND JP13 6 10 5 IRN12 5 0 5 5K 0 5 5 0 5 4 11 s Ph due 68HC11 NC Ww 21812113 31212 D17 im 5 0 5 5 0 5
170. or reset detection as well 45 to the input of inverter U9 The output of U9 pin 15 isthen forcedtoa low logiclevel which will reset the microcomputer Should normal program execu tion fail to reoccur C7 will then recharge via R8 and R9 to a potential higher than the positive input threshold thus allowing the watchdog to self arm itself and automatically re initiate another reset pulse This action will continue indefinitely or until normal program execution is reestablished The watchdog LED flashes at the8 HZ rate to visually indicate that the microcOmputer is operating su cessfully It is turned en whefr Q1 conducts off when Q1 is biased P10 The manual reset pushbutton forces the input to ground which turn will reset the micro computer s previously described 16VDC MANUAL RESET To Circuit MJ 3A Regulator Control Service Manual Circuit Monitor 15 Page 4 27 4 MJ 3A Detailed Theory of Operation 4 4 2 7 Port 2 Arbitration Logic As mentioned in the 8035 Microcomputer head ing the lower half of Port 2 can be used in three different ways as an quasi bi directional static port as a port expander and to address external program memory The interface board logic utilizes all three of these modes Addressing external memory using Port 2 was discussed previously in the microcom puter memory management heading This
171. ore convenient Transistors canib tested using small voltage scales to detect small differences in the emitter to base junction As it must be forward biased to get current flow in theWPNP transistor the base must be more negative than the emitter and in the NPN the base must be more positive When you install a diode always match the band on the diode with the band mark on the circuit board The circuit will not work properly if a diode MJ 3A Regulator Control Service Manual 1 General Information is installed backwards If the diode has a solid body the band is clearly defined If the diode has a glas body do not mistake the colored end inside the diode for the banded end Look for a band painted on the outside of the glass The printed circuit boards used the are sprayed with conformal coating and s such acts as an insulator When probing signal ensure that you break thru the conformal coating layer otherwise the expected signal will not be evident 1 3 2 Solderifig T chniques A good solder Connection will form an electrical connection between two parts such as a compo nent lead andhaa circuit board foil A bad solder connection 001 prevent an otherwise well re from operating properly It is easy to good solder connection if you follow few sirple rules Use the right type of soldering iron 25 to 75 watt pencil soldering iron
172. ose illustrated Section 3 5 3 3 2 will test the 68HC11 ports and section 3 5 3 3 3 the asso circuitry Ground scope or DVM to TPG gt 68HC11 port test Check signals to ensure proper 68HC11 operation Replace 68HC11 if input voltage and clock references are good yet fails the following tests BUS lines DBO thru DB7 are both address and data lines and forms a synchronous bi directional read write port Waveforms should be similiar to ref block 1 ALE address latch enable port test This signal occurs once each cycle The negative edge strobes addresses into external memory Connect scope to pin 11 the wave form should resemble ref blocks RD port test This output stfobe 15 activated during BUS read When low it is used as a strobe to external data memory Connect a scope to U1 pin 8 The waveform should resemble ref block 3 WR port test This 6utput strobe is activated during a BUS write When low it is used as awrite strobe to external data Memory Connect a scope to 01 10 The waveform should resemble ref block 4 PSEN test This active low output occurs durifigea fetch to external pro gram memory Connect scope to U1 pin 104 waveform should resem ble tef block 5 EA porttest Forces program memory fetches to reference external memory This active high input SHOULD AL WAYS BE HIGH Connect scope to U1 pin 10 Verify the waveform you see to that of th
173. ot available the DVM refer enced in section 1 3 can be used Page 3 2 3 2 Troubleshooting Strategy 32 Summary The troubleshooting the MJ 3A is to be most efficient in locating and correcting a particular de fedt to do this a logical step by step ap proach is required STEP 1 You must be able to use test equipment and pr per tools to repair defective circuitry As a mini mum for electronic repair you must be able to use the test equipment and tools mentioned in section 1 2 STEP 2 You must become familiar with the opera tion of the regulator control This includes the functions of all MJ 3A controls and adjustments and how to manipulate them It is difficult if not impossi ble to check out an without knowing how to set its controls To do a truly first rate job of deter mining trouble symptoms you must have a com plete and thorough knowledge of the normal operating characteristics of the MJ 3A In addition you must be able to determine the symptoms in order to decide whether the equipment is perform ing normally or abnormally when using the control panel controls This manual guides you along on a step by step approach but does require a basic understanding of the system and its terminology For a better understanding of both refer to Siemens Accu Stat Instruction Manual P N 21 115527 004 STEP 3 You should become familiar with the oper ation o
174. ough The interface board requires it to remember Data Pak drag hand parameters These are low voltage high voltage maximum Amps leading poWer factor and lagging power factor This is accomplished with the nonvolatile static RAM NOVRAM comprised of ICs U3 and U4 When ever a read or write to the NOVRAMs is required either the KD or WR drop low respectively Either one will cause the output of the NOR gate U8 pin 1 to go low This low logic enables the chip select CS of the NOVRAMs The WE input of the Page 4 24 NOVRAM determines if either a read or write oper ation is about to occur when the CS line is enabled If a read operation should occur the logic high the WR output of U2 will force the NOVRAMs in a read mode If a write operation isto be performed a low logic level on the WR output will pullup of RN2 and force the NOVRAMs into a write mode The purpose of the NOVRAMsstore recall logic is to STORE dump the contents of static RAM into the array for safe keeping when 5 from the system Or RECALL dump the contents of pre Viously Saved array into static RAMbupon applying power to the system The STOREinput when low will initiate the transfer ofthe entire contents of the RAM array to the E2PROM array internal to the NOVRAM The WE and RECALL inputs are inhibited during the stor
175. pen YES Go to 3 5 3 4 3 NO input references to U1 2eare there but output pin fails to go low during above scenario replace U12 3 5 3 4 3 low when output pin 7 12 is low YES Go to 3 5 3 4 4 NO Replace 014 Page 3 68 greater than 7 volts at the base This only happens if zener diode D23 conducts which requires 3 9 volts to do so When power is first applied to th system the 5 volt supply ramps to 46 volts when QA first conducts Fromathatpoint 04 remains in reference block is not a logic low then look at the base voltage of Q4 is greater than 7 volts then replace Q4 If ibis not greater than 7 volts then ensure that D 23 has 3 9 volt drop iCdoesn t then verify resis tors R26 and RT6 If they are OK replace D23 Verify that resistors R17 thru R24 are OK When transistor Q4 is out of conduction during initial power up transistors and 05 are conducting which causes the ERAM RECALL to go high and pulse ex tended via U14 If either of these lines fail to go to ground upon power up then re place Q3 or Q5 Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 3 5 Reset Circuit TEST REFERENCES 3 3 2 52 3 3 2 53 3 3 2 58 O2 04 06 10 o 00 200 300 EC 1K WATCHDOG LED 1 MANUAL RESET To Circuit Monitor Circu
176. present the PDS connector the transformer board the lower half of the control panel board 2 Be careful when using more than AC source at the test station as various outlets may be wired to differentphases 3 Many troubleshooting instruments housed metal cases These cases connected to the ground ofgthe internal circuit For proper operation the ground terminal of the test instrument should al ways be connected to the ground of the equipment being S rviced If you are test ing the with it assembled make certain that the chassis of the MJ 3A being serviced 5 at ground If there is any doubt connect the equipment being ser viced to the power line through an isola tion transformer 4 Remember that troubleshooting equip ment that operates at hazardous voltages is always dangerous Therefore you should familiarize yourself thoroughly with the equipment being serviced before troubleshooting it bearing in mind that high voltage may appear at unexpected points in defective equipment Reading the operational theory section 4 is rec ommended prior to troubleshooting Page 1 2 5 It is good practice to remove power before connecting test leads to high volt age points It is preferable to make all troubleshooting connections with the power removed If this is impractical be especially careful to avoid accidental con tact with equipment and objects that ar
177. present Compl te both 3 5 1 18 3 1 and 3 5 1 18 3 2 The waveforms may not be those illustrated but they should similar Activity appears on theselines at least every 500 ms v Turn rotary switches to lowest settings compensation polarity switches to their settings and switches to their off Open positions The rotary switches are binary en coded When counter clockwise the switch is OFF In this setting there are no activated switch con tacts Each position increases the binary count by a factor of 1 ex ample When counterclockwise and turned two positions clock bd 3 5 1 18 3 1 he bi d ld b 68HC11 port verification Verify these sig MES 12022 nals to test the 68HC11 The 68HC11 is acit d s open possibly defective if any test fails 9 STRB port test Connect a scope to Turn power OFF to system the STRB port line U1 pin 28 the gt Using illustration 3 5 1 18 find amp the waveform should resemble the common for the switch in question Put illustration ref block 3 the negative black lead of an ohrameter PROG port test Connect a scope to this common point to the PROG port PB5 U1 pin gt Put the positive red lead of the hmme 11 the waveform should resemble ter on the anode side of the diode for the the illustration ref block 4 binary switch position
178. put port and diode clamps D13 and 014 Diode clamps prevent any voltage level transients greater than 6 6 v and less than 0 6 volts from appearing at the input of the 68HCT 1 C T Signal Conditioning The CT signal conditioning circuitry consists of a scaling and isolation transformer T3 zero cross sig nal and conditioning circuit and a precision full wave bridge rectifier The C T scaling transformer receives excitation directly from the C T signal as previously described refer to Transformer Board theory of operation The signal conditioning circuitry is designed to operate linearly over a dynamic range of 296 to 32096 of a nominal 200 mA rms 50 60 Hz input Page 4 13 4 MJ 3A Detailed Theory of Operation TO 91 38 C T ZERO CROSS D15 1N4002 D16 1N C T Zero Cross Detection Circuit In the zero cross signal path the scaled secondary current from T3 is converted to a voltage via shunt resistors R27 amp R28 Reference page 22 4 center The zero cross signal is routed through current limiting resistor R24 bipolar diode clamps 015 and 016 and zero crossing comparator U 14 The diode clamps 015 and 016 limit the maxi mum input excursions applied to the 4014 comparator s inverting input to within 1 volt peak 015 and 0 5 peak 016 over thesentire CT output operating current range 6f 40 640 mA Diode 016 is a Schottky type ensure that the negat
179. r for Printed Circuit Boards This topic is beyond the scope of this manual butis very important to understand when using this man ual An excellent reference for PC board repair is listed in the Introduction seetioniunder Applicable Documents 1 5 Handling Static Sensitiv Components Static electricity is an electric charge at rest on a sufface WWhen the charge becomes sufficiently large an electrostatic discharge ESD takes place When a charged person touches a part a charged part touches another conductive surface People carry 1000 to 5000 volts with out ever feeling the sensation of a discharge The semiconductor material used in compo nents can be ESD sensitive within this voltage range To avoid potential problems proper handling pro cedures of ESD sensitive components must be es tablished The establishment of an ESD prevention strategy should revolve around the following basic guidelines 1 Treat all electronic parts and as semblies as potentially static sensi tive Always handle ICs by the body not by the leads Keep all ICs in their original containers until ready for use When handling ICs it is highly recom mended that you be grounded with a wrist or heel strap through a 1 Meg ohm resistor Do notslide ICs over any surfaces 2 Handle all ESD sensitive parts and assemblies at a statically safe work station MJ 3A Regulator Control Service Manual 1 General
180. r a wye system See appendix Il of the Accu Stat Instruction manual for description of how to determine the leading and lagging regulators on an open delta system The relative polarity of the utility tertiary winding and the current transformer must be established for the MJ 3A Switch 7 shifts the current signal 180 degrees if open The correct switch setting is estab lished by examination of the utility winding diagram and knowledge of the regulator design Page 2 2 Switch 8 is to be closed for straight design single phase regulators and for all three phase regulators Set this switch open for inverted design regulators See appendix of the Accu Stat Instruction manual for description of how to determine if a given regulator is of the straight or inverted design based upon nameplate information 2 1 2 Setting the Basic Functions Accu Stat MJ 3A control panels perform the basic control functions as 4hey ate influenced by the desired voltage level voltagebandwidth time delay and line drop compensation settings Settings are accomplished via ineremental switch points using rotary switches on the face of the control No locking of the knobssis required For detailed information on the various settings as the regulator they are controlling refepto the Accu Stat Instruction Manual Figure 2 1 8 POSITION DIP SWITCH SUMMATION MJ 3A Regulator Control Service Manual
181. r destroyed if installed incorrectly Make sure the pins are straight The pins the IC s may be bent out at an angle so they do net easily line up with the holes in the IC socket In the event pin gets bent out of alignment bend carefully If it appears that the bend was severe enough to possibly cause the pin to break when it is inserted apply a very thin coating of solder to it to give it more structural stability Dometgse more than a very thin coating howev r ortthe IC pin will become too large to fit in the PGboard hole When you install integrated circuits position them so that the flat side is over the flat of the outline on the circuit board place while you turn the board over At first solder only two pins at diagonally opposite corners of the IC When the solder cools checkWto make sure the IC is tight against the circ it board If not reheat the pins while you press against the IC to reseat it Then solder the remaining pins t the foil Replacing Resistors Resistors are identified in the schematics appendi C and parts list appendix D by their resistanc value They are identified by a color code of four or five color bands where each color represents a number These colors are given in th steps in their proper order except the last which indicates a resistor s tolerance For conveni nc the color code and tolerance charts are provided in figure 1 1 below
182. r older MJ transformer designs that did incorporate an on board OPTO COUPLER When activated the OPTO COUPLER s output pin 6 will track its GND 5 input hetefore if the OPTO COUPLER has been activatedyvia a remote VRC input and the REMOTE OFE LOCAL switch is in the REMOTE position the Port 2 P26 input will be pulled to a logic lowJ vel when the 1 4 input is activated by the control panel microcomputer This will then alert theamicro omputer logic that a remote VRC signal has been sensed The D latch U1 allows for control of the VRC status LED The latched U4 output QO pin 3 is used to turn the ENGAGED LED The outputs are always an active logic state as a result of the output enable lines QB pin 2 and QA pin 1 being tied to their active state The D latch inputs are enabled via the l O6 select line routed from J7 pin 8 and attached to the DA pin 9 latch enable line As previously described O6 is controlled by the control panel microcomputer Port 1 logic and is enabled only at the appropriate time via the I O select decoder U10 located on the interface board Resistor R1 provides the necessary pull up biasing for a logic high when U1 is de selected MJ 3A Regulator Control Service Manual Once the D latch hasbeen selected the desired LED on off status presented at DO pin 14 by the computer is then clocked into the D latch inputs Via the clock pulse gener
183. rd REF 12 APPENDIX B 2 2 REF 13 APPENDIX B 3 Interface REF 14 APPENDIX B 4 Data PakOpti n REF 15 APPENDIX 5 VLC Voltage Limit Control Option REF 16 APPENDIX B 6 VRG Voltage Reduction Control Option REF 17 APPENDIX Schematic Diagrams APPENDIX part 1 Control Panel PC Board Electrical Portion REF 20 APPENDIX C 1 part 2 Control Panel PC Board Electronic Portion REF 21 APPENDIX C 2 Transformer PC Board REF 22 APPENDIX Interface PC Board Option REF 23 APPENDIX 4 Data Pak PC Board Option REF 24 APPENDIX C 5 VLC Voltage Limit Control PC Board Option REF 25 APPENDIX 6 VRC Voltage Reduction Control PC Board Option REF 26 Contents 6 MJ 3A Regulator Control Service Manual TABLE OF CONTENTS APPENDIX D Parts List APPENDIX D 1 Control Panel Board 1 7 REE 28 APPENDIX D 1 Control panel Board 2 89 REF 29 APPENDIX D 1 Control Panel PC Board 3 E REF 30 APPENDIX D 1 Control Panel Board 4 4 2 31 APPENDIX 0 2 Transformer Board 32 APPENDIX D 3 Interface PC Board Option 1 REF 33 APPENDIX D 3 Interface PC Board Option
184. re may be more than one problem Without the checkout you may have assumed that you have fixed the problem when in reality you may h ve part of it It is also possible that some initial problems were masking others not yet found 3 2 2 Definition of the Systematic Logical The systemati approach discussed in step 4 is by far the most complex step and this is where the emphasis is placed in this section The four major phases of MJ 3A troubleshooting are summarized as follows PHASE 1 DETERMINING TROUBLE SYMPTOMS This phase involves determining what is supposed to do when it is operating normally and in recognizing improper operation when that nor MJ 3A Regulator Control Service Manual mal job is not being done This symptom determin ing phase involves noting both the normal and abnormal performance indications manipulating the equipment s operational controls to gain further information and correlating the symptoms At the end of this phase you will know that something is wrong and have a fair idea of what the trouble is but you do not know just what area of the MJ 3A is faulty This is established in phase 2 It is assumed at this point thatthe is believed to be defective and is removed from service Th nature of the problem is probablysvaguely define Be aware that it is always possible for an operator to report a trouble actually the result of impr
185. res 3 5 1 15 1 Adjust input for 200 mA Adjust volt Observe waveform at cathode of D17 age at voltage test terminals or Data Pak if reference block 5 Does waveform ap so equipped for 120 V rms pear gt Observe TP8 with a scope Is there a 9 YES CT Magnitude circuitry con rectified voltage level of about 1 3 Volts firmed Go to 3 5 1 15 5 peak as shown NO Either resistor R29 isiopemot diode YES magnitude circuitry appears 019 or D18 is shorted Determine if OK either one is defective Ifithey appear OK then look for possible cold solder NO Proper signal does not appear joints or bad circulates Look at input voltage from R28 to verify the presence of the ac waveform as illustrated reference block 1 Does it 3 5 1 15 5 appear VOLTAGE ACGURACY AT AN1 9 YES Problem with magnitude circuitry confirmed Proceed to A simpl technique for determining the 351 152 tru rms voltage of the rectified waveform i ee at ANT sing a standard true rms respond NO Verify that there is 2 volts rms ing 4 1 2 digit DVM is given by the follow across resistor R28 or R27 If there ing is not 2V then R28 or R27 is sus pected bad as signal to this point measure the dcrmscomponentof AN1 should have been confirmed in sec measure the ac rms voltage component tion 3 4 2 of AN1 square both values and sum and finally 3 5 1 15 2 take the
186. rms value of the incoming magnitude for the aver age derived or true rms algorithms respectively MJ 3A Regulator Control Service Manual The rectified rms voltagex t the 68HC11 s A D input ANO is directly related to the voltage appear S ing at the control panel VOLTAGE TEST banan jacks The relationship between the two voltages i given byAhe turns ratio of the T2 potential trans former and the fullwave rectifier gain i e VOLTAGE TEST 128 5 x 0 5 A simple technique for determining the true rms voltage of the rectified waveformp at using a standard true rms re sponding 4 1 2 digit DVM is given by the following measure the dc rms voltage component of ANO 2 measure the ac rms voltage component of ANO 3 square both values and sum and finally 4 take the square root of the squared sums This value is now directly related to the true rms voltage at the VOLTAGE TEST terminals as described by the above relationship Typical accuracies of 0 596 or better should be observed over 90 to 145 volt rms input signal range Other components usedin the P T magnitude signal conditioning circuit serve to protect the microcom puter from noise and transients Bypass capacitor C24 is used as a filter for high frequency noise on the analog input ANO and decoupling of the sam ple hold switching action within the 68HC11 A D section Resistor R22 provides current limiting to the 68HC11 analog in
187. rn Page 4 4 Terminal E1 Current transformer return This point is physically tied to E both by a shorting bat on the PDS connector as well as a shorting trace n the control panel PCB Terminal U2 Output from utility tertiary wind ing This voltage input provides the control panel AC power source and the voltage phas reference for extracting system power fact r and power flow information if 9 the control panel External Iriternal Power switch SW11 is inthe NORMAL posi tion It will also provide th Woltage reference excitation for the potential transformer to the MJ 3A under certain power flowandicontrolpanel configurations when relay REYT3 contact pins 3 and 4 closed Terminal the RAISE motor winding Voltage to this terminal is either by automatic control as determined by the MJ 3A regulator if the control paneltransfer switch SW12 is in the AUTO position or by manual control if the transfer switch SW12 is in the MANUAL position AND the momentary SWitch SW13 is in the RAISE position Terminal K To the LOWER motor winding Voltage to this terminal is either by automatic con trol as determined by the MJ 3A regulator if the control panel transfer switch SW12 is in the AUTO position or by manual control if both the transfer switch SW12 is in the MANUAL position AND the momentary switch SW13 is in the LOWER position Terminal 010 Terminal from contact
188. rol Service Manual Troubleshooting Guidelines 1 3 1 General guidelines Follow the instructions in the troubleshooting sec tion carefully Read the entire step before you perform each operation Verify that the power is removed from the MJ 3A when making repairs This is very importantto verify because signal sources can be coming from more than one power cord signal generators simulators Turn off EVERYTHING connected before making repairs Not only can you be injured by not doing so it is also possible to damage circuitry as well as the test equipment itself Do not under any circumstances insert or remove any component especially an IC or transistor with the low voltage power supply energized Doing so can cause damage to the semiconductor material due to transients An IC is easily damaged intermittently looses its ground potential When injecting a signal into a circuit signal generator make sure there is a blocking capacitor the signal generator output to prevent circuit damage see section 1 2 4 undersignal generators As troubleshooting will be conducted at the compo nent level defects will bevlocated in circuits by measuring and analyzing volt ges at the elements of active devices This can be done with the circuit operating and without disconnecting any paris Once defective part can be discon nected and t sted or substituted whichever is m
189. rol Service Manual Appendix B Block Diagrams 2 APPENDIX B 4 Data Pak Option Interface PC Board Connector J5 Connector 5 E MJ 3A Regulator Control Service Manual REF 15 Appendix B Block Diagrams APPENDIX B 5 VLC Voltage Limit Control Option Interface PC Board Connector J6 Gonnector J6 REF 16 MJ 3A Regulator Control Service Manual Appendix B Block Diagrams APPENDIX B 6 VRC Option Interface PC Board Connector J7 7 MJ 3A Regulator Control Service Manual REF 17 Appendix B Block Diagrams THIS PAGE LEFT BLANK INTENTIONALLY NN f oe A REF 18 MJ 3A Regulator Control Service Manual Appendix Schematics A MJ 3A Regulator Control Service Manual REF 19 Appendix C Schematics APPENDIX C 1 part 1 Control Panel PC Board Electrical Portion O P CHASSIS SW11 NORM DRAGHAND RESET U11 C SW14 S C11 0 1 1000V U10 B OPERATION 019 ro COUNTER SW12 2 J AUTO _JP16 C12 Ps AUTO JP17 CO 00 REF 20 MJ 3A Regulator Control Service Manual Appendix C Schematics APPENDIX C 1 part 2 Control Panel PC Board Electronic Portion 4 2 14 x 9 40 IRL AT Dur 23 K nt num 16 zs iC
190. s 4 9152 MHZ YES If you were directed hefe from section 3 3 or 3 4 then return to ext item in current checklist NO Goto 3 5 1 10 2 3 5 1 10 2 An earlier step verified thatthe 5 volt logic level was provided 48 If this is not the case go 10 3 5 1 8 Turn system off With a DVM check for short across XT shorted locate origin Replace R3Q and C14 if necessary Verify R30 and C14 C15 op tional properly soldered and have con tinuity Re verify43 5 1 10 1 If no frequency yet appears go to 3 5 1 10 3 Replace crystal X11 Rewerify 3 5 1 10 1 After replacement verify that section 3 5 1 8 2 is satisfied If not replace micro computer MJ 3A Regulator Control Service Manual OPTIONAL 4 9152 MHz XTAL MODB Ud 68HC1 1 AXIAL MOBA Note lf you notice frequencies other then appearing on the clock signal replace filter C14 and optionally add C15 3 5 1 10 4 Connect scope Doesavoltage level of 5 volts 596 exist YES TP1 is functioning properly NO Verify with DVM that resistor R18 has a resistence of 3 9K ohms if not replace resistor R18 3 5 1 10 5 Connect scope to TP2 Doesa voltage level of 5 volts 596 exist YES TP2 is functioning properly NO Verify with DVM that resistor R19 has a resistence of 3 9K ohms if not replac
191. s desirable to emulate the problem reported bysth joperator so you can see it first hand The simulator contains all I O signals required to test the Without a simulator you are forced into providing your own excitation signals to the control using other equipment which takesyconsiderably more effort and makes fault detection e nsiderably more complex than it would be otherwise If you do have access to a simulator Appendix F contains guidelines that will help simplify the troubleshooting procedures in section 3 If you do nothave accessto the simulator then several observations described in section 3 will not be possible as written These will be obvious at the appropriate time MJ 3A Regulator Control Service Manual 1 General Information 1 2 2 Oscilloscope The oscilloscope is mandatory for any level of de tailed troubleshooting It may be possible to deter mine trouble symptoms and perhaps l calize the problem to a functioning module Withoutone if your only intent is to replace de fective module but anything more detailed dictates the use of one Beyond section 3 4 this manual assumes the avail ability of one The specifications of th escill6scope are not critical but for maximum effectiveness it is recommended that the scope used have the following features digital storage with full analog capabili ties minimum of 100 MHz real time bandwidth dual channe
192. s in one convenient place Appendix A through Appendix D are coded in such a manner that each level of the appendix corresponds with the same level as an other appendix For example if you were interested in the transformer board the transformer board circuit layoutis in Appendix A section A2 the block diagram is in Appendix B section B2 the schematic in Appendix C section C2 and the parts list in Appendix D section D2 Appendix Circuit Board Layouts The is shown pictorially with all the available options refer enced The succeeding layouts depict each printed circuit board individually with X amp Y coordinates labeled for component referencing Appendix B Block Diagrams This provides a top level modular look at the MJ 3A main and secondary subsystems Referring to the block diagrams will provide a better understanding of the schematics which follow in the next section Appendix C Schematics Provides detail the component level of each of the modules shown in the block diagrams above Appendix D Components part list for each module in the For convenience each component listed is identified by where it an be found on the actual circuit board layout Appendix A MJ 3A Regulator Control Service Manual Introduction Appendix E Alert Code Chart Describes the mes gt sage code if the optional Data Pak is displaying Appendix F Troubleshooting using the Operation
193. same pins as above but look at the inter face board instead Verify that the connec tor is tight If data transmission fails to materialize refer to section 3 5 3 6 3 5 6 2 Verification of LED operation Complete 3 5 6 1 before proceeding with this section as it is assumed that VRC data trans mission has been verified LED can be tested by putting the toggle switch in a local set ting doing so will ensure that the lightwill be on Is it YES Verification of LED plete NO U1 may be defective if LED will not light Input to transistor is high when LED is active If replacement of IC does not solve problem then prfoceed to 3 5 6 2 1 3 5 6 2 1 If ports is high cheek the collector of the transistor lt is high then transis tor suspected bad if low then sus pect d PED series resistor defective Verification of rotary switch See discussion of rotary switch binary encod ing logic in section 3 5 1 18 Monitor 7 pin 11 ref block 1 to verify that the VRC switch is selected by the interface board Monitor port 2 lines J7 pins 4 thru 7 asin 3 5 6 1 but this time on each cathode banded ends of the diodes D1 thru D4 If activity similar to reference block 7 from Page 3 82 3 Troubleshooting Procedures 3 5 6 1 section 3 5 4 does NOT appear diode is suspected to be defective Does the turning of the rot
194. series controls 2 Activation with a switch closure of less 3 seconds duration causes the regula tor to lower its output voltage by one third of the preset percentage second switc closure of less than three seconds duration causes voltage reduction to total two thirds Page 4 36 of the preset percentage Closing the switch ta third time for less than three sec onds results in voltage reduction of the full preset percentage The forth such clo sure returns the control to zero reduction i e deactivating the VRC The control can be activated locallygfor test or remotely as via a relay controlled by SCADA system connected to appropriate points on the rear of the control When activated the Command for reduction is immediate overriding the time delay set on the basic control An LED is illuminated when the VRC is active 4 7 2 VRC Detailed Schematic e Appendix C page REF 26 As discussed briefly in the Operator Setpoint Switch Logic section of the Control Panel PCB section the reading of the VRC setpoint switches and control of the status LED is controlled via the Control Panel PCB microcomputer U1 program logic The interface board 3 to 8 decoder 010 is used to select the switch and the D latch U1 on the VRC module in the same manner as described for the Control Panel setpoint switches The control panel microcomputer via Port 1 selects the specific device at the appropriate poi
195. sistors Q1 and 92 are high when respective tran Sistor is active If replacement of IC doesnot solve problem then proceed to 3 5 5 2 1 9 3 5 5 2 1 If one of the ports is high check the collector of the appropriate transistor If it is high then transistor suspected bad if low then suspected LED or series resistor defective Page 3 80 See discussion of rotary switch binary em coding logic in section 3 5 1 18 Monitor reference block 1 to verify that the Upper VLC switch is being selected by the interface board do the same for reference block 2 to verify the Lower VLC switch gt Monitor port 2 lines J5 pitis 11 as in 3 5 5 1 but this time on each cathode banded ends of the diod s DT thru 010 If activity similar to Waveform at reference block 7 from section 31574 does NOT appear diode is sUspected to be defective Does the turning of the rotary switch to each position causesdifferent VLC activa tion points to YES to all above checks Switch is probably If you wish a more de tailed test refer to section below 9 NO Monitor reference block 6 on con nector of interface board to verify that the switch is being selected by the in terface board If waveform is present switch may be defective If incorrect readings occur verify that diodes D1 thru D4 are OK Also Verify the switch in section 3 5 3 7 3 5 5 4 Verification of toggle
196. switch on regulator which closes every other tap change This signal increments the operations counter located on the MJ 3A control panel Terminal U11 Output signal to reset the position indicator drag hands on the regulator One drag hand moves only in the raise direction with a pointer and the other only in the lower direction with a pointer When the MJ 3A control panel DRAG HANDS RESET SW14 is pressed the momentary voltage on contact U11 forces the drag hands to their present tap position setting MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation The input current from the current transformer is sent directly to the transformer board via connector J2 pins 5 and 6 The current is scaled and isolated 2 2 1 2 Individual Circuits Both the PDS connector and the transformer pri via a 1 1 isolation transformer T3 on the transformer maries from the transformer board connect directly board The secondary of the current transformer is to the control panel PCB in the high voltage electri then routed to the low voltage portion of the MJ 3A cal portion lower section of the board Only the control panel board via J3 pins 6 and 7 Refer to low voltage current secondaries of the transformer Magnitude description in next section for fur board interact directly with the control panel PCB ther details low voltage electronic section which is electrically isolated from the high voltage electri
197. t and continue with 3 3 2 17 3 4 3 3 gt Verify if the transformer bard is malfunctioning Connect a scope DVM ping5 of connector J2 at the transformer board as shown in Figure 3 3 f waveform is absent Bo to 3 4 3 4 f waveform appears fault has been isolated tomdefeetive transformer board Refer to section 3 5 2 4 J ransformer Board AUX 3 4 84 gt Verifyhat the connector from control panel board isin t causing the problem MJ 3A Regulator Control Service Manual Connect a scope or DVM to 5 of connector J2 as done in 3 4 1 3 but this time at the control panel board f waveform is still absent go t 3 4 3 5 If waveform appears fault has been isolated to defective connector or solder connection Repair it continue with 3 3 2 17 34 3 5 gt Verify that power is getting to the control panel board Connect a scope or DVM to PDS con nector inputs Gn the control panel board board b tween C2 ground sig nals f waveform is still absent go to 3 4 36 If Waveform appears fault has been isolated to defective control panel board electrical section Refer to section e 3 5 1 1 interface 3 4 3 6 Find out why PDS connector is not getting power It appears that the excitation source is turned off or may be malfunctioning which beyond the scope of this manual Page 3 25
198. t correct problem then return to 3 4 2 as voltage level at this point should have been confirmed 3 5 1 12 2 Observe U14 pin 8 reference block 4 Does waveform appear as illustrated with a positive going level of about 600 volts peak and a negative going level of about 300 millivolts peak YES Proceed to 3 5 1 12 3 NO 15 the positive going potential much greater than 700 millivolts peak 1 5 volts going potential much greater than 400 millivolts peak Xe 900 millivolts 9 f error p sitive level replace diode D1 Tif_error is on negative level feplace diode 012 MJ 3A Regulator Control Service Manual Page 3 43 3 Troubleshooting Procedures 3 5 1 13 Magnitu de TEST REFERENCES d 3 3 2 5 3 3 2 9 3 3 2 10 Input Circuit 3 32 14 3 3 2 16 40 3 12 TO 91 22 VLOGIC U1 68HC1 1 015 4 1 4002 4700 014 1N4002 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 13 1 3 5 1 13 4 Adjust voltage at voltage test terminals Observe waveform reference block 4 at Data Pak if so equipped for 120 V rms cathode of D26 Does waveform appear Observe test point TP6 with a scope with YES P T Magnitude circuitry con ground reference attached at TPC Is there firmed a rectified voltage level of abo
199. t reset by operator Alert coded display that provides infor mation to Operator for limited self diag nostics Page 4 32 4 5 2 Data Pak Display Detailed Schematic Appendix C page REF 24 The Data Pak option provides a visual indication of key operating parameters Fheheart of the Data Pak module is the display driven IC U1 which operates the 4 digit liquid crystal display This driver IC version made microcomputer interfacing and provides non multiplexed operation of LCD dis plays It has 4 BCDydata inputs BO B1 B2 and B3 two address lines DS1 052 and two chip select 5 51 52 The display driver section of U1 includes an oscilla 7 stage binary divider a backplane driver backplane slaving detector and logic and 28 seg mentdrivers The RC oscillator has a nominal oscil lation frequency of 19 kHz with no external components The frequency is lowered slightly by the addition of the external capacitor C2 between pin 36 and V The 19kHz approximate output of the on board oscillator is divided by a 7 stage binary divider to generate the backplane frequency of 150 Hz The backplane drive is simply an inverter whose input is the output of the last driver The backplane output swings from ground to with 5096 duty cycle The backplane has a low 200 ohm typical output resistance so that drive the capacitance of large displays The segment drivers are CMOS
200. t the integrating period for drag hand parameters and the present value param eters if position 4 is set open refer to figure 2 3 Page 2 3 2 Configuring amp Calibrating the MJ 3A 2 4 Setting the Accessory Functions 2 4 1 Voltage Limit COntrol Set the knobs to the minimum volt ages to be held Turning the toggle switch off deactivates any minimum maximum settings on the 2 42 Voltage Reduction Control O Open Set the knob to the percent voltage reduction de sired when activated Place the toggle switch in temote to have it activated via the VRC contacts C Closed on the transformer board This setting may be used for direct reading of GT sec ondary current in millamperes Figure 2 2 Data Pak Current Display Multiplier 5 5 Factory set SW6 SW8 Factory set SW7 Figure 2 3 Data Pak Display Intigration Time Chart Page2 4 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures SECTIONS MJ 3A Troubleshooting Procedures MJ 3A Regulator Control Service Manual Page3 1 3 Troubleshooting Procedures 3 1 Bench Setup for Troubleshooting It is assumed that the M 3A is believed to be defective and is removed from service The remain der of this section assumes that the MJ 3A is at a workbench with the test equipment and tools which were recommended in section 1 The easiest way to troubleshoot the
201. t threshold hysteresis The actual threshold voltage depends on the output state as previously described If the sine wave monitored on the inverting input crosses the threshold in the positive direction the actual moment of transition will be slightly delayed There is a window of a specified time from the moment the transition was detected to when the comparator output actually transitions This window is the amount of hysterisis in the circuit The advantage of adding hysteresis is increased tolerance to noise voltages on the input signal Without hysteresis these noise voltages cause multiple switching to occur on slow input transitions It is desirable to set the total hysteresis voltage larger than the expected magnitude of noise MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation TO J1 22 8 RNT S RN 11 9 9 RINT T 7 5 0 5 5K 0 5 5K 0 5 VLOGIC U1 68HC11 Figure 4 14 Magnitude Input Circuit 1722 7 Magnitude Input Circuit The second analog processing path inputs the scaled secondary voltage of T2 to obtain a signal representing the magnitude of the regulator load side input voltage The signal is routed through a precision fullwave bridge rectifier composed of U15 RN11 and 026 3 5 The RN11 resistor pack has an internal relative resistance tolerance of 0 1 percent to maintain a uniform gain for positive and negative input excursio
202. ta If an 8048 8748 is used then this feature is used to expand program memory beyond 1K In order to get many functions on the 8035 yet keep the package size small some of the IC pins perform multiple functions The eight data bits and the eight address bits are multiplexed to the same lines Accessing of external memory is accomplished in the following steps 41 The contents of the 12 bit program counter will be output to the data bus and the lower half of port 2 2 Address latch enable ALE will indicate the time at which the address is valid The trailing edge of ALE is used to latch the address externally via the 005 octal latch 3 Program Store Enable PSEN indicates that an external instruction fetch is in progress and serves to enable the external memory device 4 The data bus BUS reverts to input floating mode and the microcomputer accepts its 8 bit contents as an instruction word More specifically when accessing program mem ory in step 1 the memory address for U2 is output on DBO thru DB7 which are directed to the inputs MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation of 05 for the lower 8 bits and P20 thru P23 for the higher 4 bits When ALE pin 11 goes high the outputs of 05 Q1 thru Q8 follow the inputs due to latch enable TE pin11 being forced high When TEgoeslowin step 2 due to ALE going low the data atthe U5 inputs D1 thru D8 will be retained at the
203. takes you through a step by step procedure of what to do and how to do it Using this approach the fault can be determined methodically to enable most efficient troubleshooting To get the most out of this manual you should know how to read electronic circuit diagrams and be familiar with the fundamentals of electricity such as Ohm s law and some of the fundamental compo nents of electronics such as semiconductors You do not need mathematics network theory or any other skills involved in original equipment design You should be able to read manufacturer s instr c tions and use standard electronic test equipment such as the oscilloscope the VOM One ofthe early steps used in the troubleshooting procedure is to monitor operation of the circuit with various pieces of test equipment Some recommendations and techniques are provided to help assist in trou bleshooting the MJ 3A but the operator needs to have atleast a basic understanding of the equipment he will use This manual supplements theAccu Stat Instruction manual P N 21 115527 004 bygproviding MJ 3A calibration and information configuring MJ 3A controls When an MJ 3Avisgrepaired it may be necessary to re calibrate and or re configure the control to the samewlevel when it was first in stalled achieve m axim rn efficiency in troubleshooting and repair ofthe control it is extremely important to understand the operation of the cir cu
204. ter replacement verify sections 3 5 1 8 41and 3 5 1 8 4 are satisfied Becareful to install capacitors with correct polarity Page 3 37 3 Troubleshooting Procedures 3 5 1 9 Power Supply Low Voltage A D Reference Connecta scope or DVM from TPG to the U1 pin 22 s 5 2 V DC logic level present YES If y u were directed here from section 34 to next item in cur checklist e NO Go to 3 5 1 9 2 l 3 5 1 9 2 Observe the input to U13 pin 2 Is there 13 to 18 VDC level present YES Go to 3 5 1 9 3 NO Go to section 3 5 1 9 4 Page 3 38 TEST REFERENCES 3 3 2 5 3 3 1 9 3 3 1 10 3 5 1 9 3 If ICU13 orthe bypass or filter capacitors C18 C19 C20 or C22 appear damaged then replace them Be careful to install capacitors at the correct polarity 3 5 1 9 4 Observe test point TP15 VREcr Does a 13 to 18 volt DC level appear here YES Resistor R14 is bad replace it NO Go to 3 5 1 8 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures E 3 5 1 10 Oscillator Microcomputer Modes TEST REFERENCES 3 4 1 1 24 3 5 1 10 1 H bd bd bd Connect a scope with a low capacitance probe from TPG to U1 pin 30 TP11 Does the clock frequency appear cl ck frequency i
205. tion 4 3 5 1 13 3 gt Observe output 015 14 Does wave form appear as illustrated reference block 3 with a half wave tectified level of about 3 7 volts peak YES Proceed to 3 5 1 13 4 NO Possiblebaddiode 026 or IC U15 With do continuity test on 0266 it If OK then sus pect UTS MJ 3A Regulator Control Service Manual Page 3 45 3 Troubleshooting Procedures 3 5 1 14 Zero Cross Detection Circuit JP13 TO 41 38 VLOGIG C T ZERO CROSS D15 1N4002 so 60 2 3 SEC Page 3 46 TEST REFERENCES 3 3 2 3 3 3 2 17 3 9K U1 68HC11 MJ 3A Regulator Control Service Manual 3 Troubleshooting Procedures 3 5 1 14 1 3 5 1 14 3 gt Adjust current input for 200 mA Observe U14 pin 11 on scope and com pare to illustration Does the waveform Observe TP7 with a scope with ground ira reference attached at TPG Is there a 5 volt laok similar peak to peak square wave at the output of YES Verify R23 is properly attached U14 and is connected to 5 VD logic level YES zero cross circuitry appears Wi appears OK then iie Fective replace it OK 9 NO Proper signal does not appear Look at input voltage from JP13 to verify the presence of about 5 5 level as illustrated reference block 1 Does it appear 9 YES Problem with
206. tion logic sense that power supply levels are within acceptable operating limits The actual timing for initiating a power up recall is determined by the monostable multivibrator R23 and C14 combination 33 ms This timing sequence is initiated on the rising edge trigger of input A pin 4 which causes the Q1 output pin 6 to go high for approximately 33 ms This pulse is then inverted by Q6 and wired OR with Q5 to 55 form the ERAM RECALL signal t9Notethat the power down circuitry ties in physically to the reset circuit viaisolation diodes 024 and 025 When a power down condition has been sensed or a RECALL action is active the microcomputer is momentarily held in a reset state via diode D25 or D24 POWER MONITOR CIRCUITS The power moni toring function is comprised of two discrete circuits the 5VDC logic reference detection and the 16VDC low voltage threshold detection logic Each of these functions is implemented indepen dently with the outputs logically ORed at the two inputs A and B of the monostable multivibrator 014 These two inputs are edge sensitive ahd a result will only respond to logic level transitions when they occur The low voltage detection logic monitors the unreg ulated 16VDC supply voltage 4415 veltage is di rectly related to the input ac sodrce Voltage applied via the PDS U2 input low voltage threshold detection logic consists ofvoltage compa rator U1
207. tivate LED illuminates in re mote position yet it did in local posi tion replace 92 If ref block 2 is not a steady state high when VRC contacts are shorted then go to 3 5 2 3 MJ 3A Regulator Control Service Manual 4 MJ 3A Detailed Theory of Operation SECTION 4 Detailed Theory of Operation Regulator Control Service Manual 4 1 4 MJ 3A Detailed Theory of Operation Theory of Operation Each major topic will be discussed using the same approach It will start with a TOPIC OVERVIEW by first referencing the pages for circuit board lay outs Appendix A and block diagrams Appendix B A review of the block diagram s logical structure will present the basics of the modules operation This will be followed by a more comprehensive analysis of the circuitry that comprises that particular module For this detailed analysis the appropriate schematic in Appendix C will be referenced Ac cordingly if you wish to leam only a functional overview the OVERVIEW portion of each major heading is all you need to read however an exten sive component level coverage requires reading the DETAILS portion as well Every attempt has been made to structure this dis cussion in a manner that allows each section pre sented to flow directly into the next one As a result it was necessary to divide the discussion of the control panel PC board into electrical and electronic s
208. ts with a voltage in phase with the LCD backplane However the ability to both turn off on decimal points and is provided via gates in conjunction with the D latch Q2 and Q3 6utputs When the Q2 Q3 outputs ar at ashigh logic level the outputs of the associated XOR gates will be a waveform 180 de grees out Of phase with the LCD backplane in verted This will bias on the decimal point segments Likewise when the outputs of Q2 Q3 the gates will generate a voltage in phase with the backplane waveform thus turning off the LCD segments It is through this actionthatall of the active LCD segments associated with DSP1 are controlled MJ 3A Regulator Control Service Manual Page 4 33 4 MJ 3A Detailed Theory of Operation 4 6 Voltage Limit Control VLC Option 4 6 1 VLC Overview Circuit Board Layout Appendix A page REF 7 Block Diagram 9 Appendix B pages REF 16 The VLC option ensures that the voltage regulated to by the MJ3A stays within a preset span The VLC hardware resides on an external PCB and interfaces to the main control board via interface board con nector J6 It includes both upper SW1 and lower SW2 VLC set point switches along with theif assos ciated upper LED2 and lower LED1 Warning indicators and the VLC ON OFF switch SW3 hhe upper VLC set point range is from 120 023 voli rms in one volt
209. u DB7 When the PSEN line goes active low the data bus reverts to the floating input mode and the output data from the EPROM U2 is treated as input data at U1 mentioned earlier the lower half of Port 2 is used Xas address lines A8 A9 10 and A11 Although the 4 Port 2 lines are used to output the most significant bits of the program address during an external program memory fetch the 1 information is still output during certain portions of each machine cycle I O information is always present on Port 2 s lower four bits at the rising edge of ALE and can be sampled or latched at this time Switch SW2 is used to select the type of EPROM installed either a 2716 2K or 2732 4K device If resistor R29 is installed a 2732 4K EPROM must be used The highest order address line A10 and A11 are decoded via NOR gate U8 If they were both low indicating that an address below 1K is required then U2 would be disabled This feature allows program execution within the lower 1K memory bank address OOOOH to to occur within 0155 program memory Any memory fetches beyond the 1K boundary 0400 to OFFFH would then be decoded vid address lines A10 and A11 thus enabling tlie external program memory EPROM U2 Data In a fashion similar to the program memory address decoding the ALE also used for de multi plexing of data memory address lines AO thr
210. ua REF 9 Appendix B Block Diagrams Control Top Level Block Diagram INIMUM configuration 2 area represents the f the MJ3A REF 10 MJ 3A Regulator Control Service Manual jenuey ouo 1 LE 333 Danan T 5 4 FUSE A SLO SLO FUSE 22 7 e 7564 OPTIC Jobs a e J s A z 22 1 __ Z J E 2 INTERFACE PCB gt T m 201 7 uw 1 Item FRUNT PANEL M Gan m 6 gt lt hie 7 EE DNE TOME mr VLE PTIDN NEUTRAL POSTION KC DIGITAL GND 2022 01 20 um EMIL 1 p mm mm MI CURRENT 25 TRANSFORMER 10 5 MER 2 CURRENY Er PE 2 VRC HP TION ap EE aren 20021003 m LL one 0 3 a 5 S 3 MILL j 8 PANEL 1 7 5 7 7 5 lis 5 92 48 J i 381442 8 34543 5145 5 44148 e RLY 1 2 VY vvv v vvvv an J3 P T 78 TRANSFORMER REVERSE POWER FLOW OPTION INDICATES OPTIONAL ACCESSORY Id Pod xipusddy
211. ual 4 MJ 3A Detailed Theory Operation the microcomputer determines that the RAISE J motor winding should be activated it will leave RLY14 deactivated and only activate RLY12 When the LOWER K motor winding should be activated RLY14 is activated and RLY12 is deactivated Jump ers JP14 and JP15 must be installed to provide voltage to power the RAISE J LOWER K motor windings Connection points U6 U7 J20 J21 K20 K21 J and along with JP14 and JP15 may be used for remote control of the motor circuit Resistor ca pacitor pairs R12 C12 and R13 C13 provide an RC snubber for relay contact arc supression 4 2 2 2 Transformer Board Reference Appendix C page REF 21 The transformer board is mounted adjacent to the control panel in the MJ 3A assembly and like the PDS connector interfaces directly with the electrical portion of the control panel board It provides the control panel electronic section with AC voltage and current references signal isolation and contains configuration terminal blockS Jermi nal block is used to provide compensation for regulators that do not provide a turns ratio f exactly 120 volts at rated voltage which the MJ 3A requires An optional relay for providing different voltage compensation under reverse power flow conditions may also be included and is configured using this terminal strip Refer to Siemens MJ instruction manual publication part
212. ubleshooting process PHASE 3 ISOLATING TROUBLE TO A CIRCUIT After the trouble is localized to a single functional unit the next phase is to isolate the trouble to a circuit in a faulty module To do this you consider the signal paths in the circuitry that contain the indicating instruments or other builtin aids that point to abnormal performance i e band indicator LEDs Page 3 3 3 Troubleshooting Procedures alert light watchdog Data Pak By concentrating on this circuitry and ignoring the circuits that pro duce normal indications you narrow down or iso late the limits of the possible trouble The isolating step involves the use of test equipment such as meters oscilloscopes and signal generators for sig nal tracing and signal substitution in the suspected faulty area By making the measurements and com sparing them against the illustrated readings and making valid educated estimates you can systemat and logically isolate the trouble to a single defective module Actual repair techniques and de vices are not used until after the specific trouble is located and verified Observations are based on indications of external test equipment used for signal tracing or signal substitution and the decisions re late to whether these indications are normal or abnormal based on both your knowledge of how the MJ 3A works and its resemblance to the pictured waveform in the block diagram PHASE 4 LOCAT
213. uired to allow sufficient time for the 68HC11 to perform necessary housekeeping functions prior to attotal system shutdown Typically functions include LED indicator test and memory backup Th RESET delay time constant is determined by4 amp 35 and C29 This delay is set to approximately 0 5 delay circuit is formed by comparator 15 pins 5 6 amp 7 R35 R36 R37 R67 and G29 It teceives its input from the external interrupt request XIRQ signal When the signal go s activelow the inverting input to U15 pin 6 begins to decay from the discharging action of4 29 through R35 When the inverting input 6 drops below the non inverting input threshold pin 5 015 the output of U15 pin 7 goes ctive high This action then biases both Q15 andQ11 6n resulting in an active low RESET signal applied at th 68HC1 1 39 and an active high system RESET generated at J1 pin 33 Resis tors R67 R36 and R37 determined the non invert ing voltage threshold with R67 providing necessary input threshold hysteresis The a power loss detection logic receives its raw input via rectifier diodes 021 and 022 directly from the MJ 3A power transformer secondary J3 pins 1 amp 2 This rectified input is routed through R46 to C31 and R47 These components provide Page 4 20 necessary filtering for proper biasing of the dez tection threshold input at U14 pin 7 and estab lishes the
214. ut 3 2 Volts NO Go to 3 5 1 13 5 peak as shown YES P T magnitude circuitry appears 1 4 3 5 1 13 5 OK proceed to next item in checklist Either resistor R22 diode D13 or 014 is shorted Det rmineif one is defec tive If they appear look for pos sible cold solder joints or bad circuit traces 9 NO Proper signal does not appear Look at input voltage from JP12 to ver ify the presence of the ac waveform as illustrated reference block 1 Does it appear 1 1 9 YES Problem with magnitude CA circuitry confirmed Proceed to VOLTAGE ACCURACY 3 5 1 13 2 A simple technique for determining the NO Verify that jumper JP12 is in true rms voltage of the rectified waveform stalled If this still does not correct using a standard true rms respond problem replace RN11 If this inge4 1 2 digit DVM is given by the follow does not correct problem then re ing turn to 3 4 2 as voltage level at this e point should have been confirmed measure the derms componente ANG 9 measure the ac rms voltage component of ANO squarebothvalues and sum and finally Observe U15 pin 13 Does illustrated ref erence block 6 waveform appear take the square root of the squared YES Proceed to 3 5 1 13 3 T This value is now directly related to the true NO Replace 1 rms voltage at the VOLTAGE TEST termi nals see equation in sec
215. vel switch ws the low light illuminated YES Go to 3 3 2 6 NO MJ 3A Regulator Control Service Manual VERIFY Control panel switch settings are per instruction in section 3 3 1 Pressing control panel reset button SW10 should illuminate this LED while button is held in ACTION Referto section 3 5 1 17 Logic e 3 5 1 18 Operator Setpoint Switch bogic e 3 51139 P T Magnitude Input Circuit e 3 5x1 9 Power Supply low volt age A D reference 3 3 2 6 gt Press the Neutralite lamp button on the simulator Did the NEUTRALITE lamp glow YES Go to 3 3 27 NO VERIFY 9 PDS Connector is making good con tact ACTION Referto section Faulty Neutralite circuitry see 3 5 1 3 3 3 2 7 Press the operations counter button the simulator and release it Did the opera tor counter activate and increment by a count of two every time the circuit was activated YES Go to 3 3 2 8 NO VERIFY PDS Connector is making good con tact ACTION Refertosection 3 5 1 5 Operations Counter In terface Page3 7 3 Troubleshooting Procedures 3 3 2 8 Press the drag hands reset button SW14 on the lower control segment of the control panel board Is the drag hand reset light illuminated while the button is held de pressed or is 120V present at U11 on the
216. voltage level switch such that the measured voltage is within 1 5 volts of the switch setting Did the HIGH light turn off Did the IN BAND light turn Is K light off YES to all three questions Go to 3 3 2 15 NO VERIFY Bandwidth setting is adjusted per 3 3 1 Voltage differential is not greater than 1 5 volts ACTION Refer to section e 3 5 1 6 Raise Lower Relay inter face 3 5 1 16 Relay Driver Circuits 3 5 1 13 Magnitude Input Circuit 3 3 2 15 gt Slowly turn theyoltage level or voltage level switch such that the measured voltage is at least 2 volts less than the voltage level set ting 5Wait at least 30 seconds 182517 light on YES Go to 3 3 2 16 NO next page VERIFY 9 Switch 2 of Control Panel Configu ration Switch SW9 is in open po sition per 3 3 1 Response timer is not set for more than 30 seconds ACTION Referto section 3 5 1 6 Raise Lower Relay inter face 3 5 1 16 Relay Driver Circuits 3 5 1 18 Operator Setpoint Switch Logic Regulator Control Service Manual Page 3 9 3 Troubleshooting Procedures 3 3 2 16 Slowly turn the voltage level or voltage level switch such that the measured voltage is within 1 5 volts of voltage level setting Connect the simulated current magnitude to PDS terminal C2 in phase with the P T magnitude by switc
217. with a 1 8 inch or 1 16 inch chisel tip works best Use the lowest setting 25 watt when working with semiconductors Keep the soldering iron tip clean Wipe it often on a wet sponge or cloth then apply solder to the tip to give the entire tip a wet look This process called tin ning will protect the tip and enable you to make good connections When solder tends to ball or does not stick to the tip the tip needs to be cleaned and retinned Always use rosin core radio type solder 60 40 tin lead content for all soldering When soldering component leads push the soldering tip against both the lead and the circuit board foil Heat BOTH for two or three seconds Apply solder to the other side of the component Let the heated lead and the circuit board foil melt the solder As the solder begins to melt allow it to flow around the connection Then remove the solder and iron and let the connection cool Cut off excess lead lengths close to the connection After repair carefully inspect the circuit board for the following problems unsol dered connections poor solder connec Page 1 5 1 General Information tions solder bridges between foil pat terns protruding leads which could touch together A solder bridge may occur when you make solder connections at closely spaced foils Therefore after each solder step carefully inspect the foil for solder bridges and remove any that may have formed To re

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