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Atari MegaST Service Manual [undated]

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1. Ere 5 2358 7 Vi JUMPER SR 25 wi ERASE 1 1 5 1 AERE S la 445194 Y a 5 lt 3353533333333 5 31111111 5 RES OTHERWISE SPECIFIEL SHEIT 7 g NGNE UNLESS REVINIONS DESCRIPTION DATE APPROVED PRODUCTION RELEASE IA 72 Ti 2 3 TOPO D 0 25 _ CHASSIS ZP INLET 9 8 25v 4 v IS ov 22 F TYPICAL 4701 USED ON DRAWS In DATE JAPAN CORPORATION ASP 34 f a 60 309106 Kiyoshi Building 4 3 10 Toranomon Minato ku Tokyo 105 NEXT VENO 7 ZED FINISH a COMPUTER oje AA NONE THMAO STATE 31 KI AI KEM REN Isus DATE ipit ep t uo __ PRODUCTION RELEASE 44274 ji ZORE 277 IKA 1 20 f TYPICAL 1 FE on sv RI Cl 22 0 7 562 tk 1 25V BLA BYV SA Jude 5 2 PCT TT 2 R10 IKN T gt 03 0 P 29 CTI 3 1 SIK 9701 ETR TEESE DATE ATARI JAPAN CO
2. x SIS a o 1 WIN o JO ila DA rs ed le a o lt NOISE FILTER SEE DETAIL f 12 BD 4220 OTES U N UNLESS SER US APPLICATION CIM vaye PRODUCTION RELEASE DRAWING NO REV 7 4 7 x DATA R x xa uP BUTTON FIRE BUTTON KA DOWN YA LEEFT YB RIGHT 1 Ci uP BUTTONS FIRE BUTTON 0 i DOWN LEFT RIGHT KEY GND DETA L f ATARI JAPAN CORPORATION Toranomon Kiyoshi Building 4 3 10 Toranomon Minato ku Tokyo 105 A ATARI IS SCHEMATIC DIAGRAM SUB PCB THIRD BTBTEM OMEN RAUM x E z n 2 x ul c 2 9 9 2 0 0 2 4 3 10 Toranomon Minato ku Tokyo 105 ATARI JAPAN CORPORATION Toranoman Kiyoshi Building Mi NG ATARI SCHEMA T 7 HATE MZE ed CAPS f KES Paar D J A Z OOO SEAT amini MESA ST 373 Hah E iE E el ses HHH ER HEHEHE 24080111111 UH
3. SYSTEM 32 MHZ CLOCK ROM ROM HIGH LOW GLUE 86 VSYNC DRAM CONTROL MEMORY MONO CONTROLLER UNIT RGB VIDEO DISPLAY MEMORY DATA BUS HSYNC MEGA FUNCTIONAL BLOCK DIAGRAM COPYRIGHT 91988 ATARI CORPORATION 2 88 TENUBY BION uoTtatuado jo AJO9UL 9190792 565 91 OTA CRYSTAL CLOCK BUFFER CIRCUIT 2188 MEMORY CONTROL UNIT SHIFTER 11 35 Vee 68901 CRYSTAL 2 4576 MHZ MFP 95232 RATE 17 XTAL IN x RESET KEYBOARD 16 384 KHZ REAL TIME CLOCK CHIP KEYBOARD CONTROLLER 32 768 KHZ MEGA SYSTEM CLOCKS LE Wee 40 54 2 MHZ 22 ec 43 500 KHZ 35 40 Vs 1988 ATARI CORPORATION SECTION THREE TESTING OVERVIEW This section pertains to the test equipment diagnostic software and test procedures used to verify correct operation and repair the Mega ST computers The diagnostic cartridge should be used if possible If the unit gives no display or RS232 output when running the cartridge see Troubleshooting a Dead Unit below Since the level of complexity in the Mega ST system is high it shouldn t be expected that this document can cover all possible problems or pinpoint the causes rather the intent here is to give a systematic approach which a technician can use to narrow down a problem to its most likely source Experience i
4. STICK 446 PRmTER TEST FMXTUBE JO SLA 5 2 at i SCHEMATIC OMA TESTER m maip ee ME Ln HIT d a i SECTION NINE GLOSSARY OF PART NAMES AND TERMS BITBLiT Atari graphic chip which is actually a DMA device It is used to transfer block of memory from source to destination with the patterns and a combination of any logical operations between source destination which was set up prior to the transfer BUS ERROR Glue has asserted BERR to inform the processor that there is a problem with the current cycle This could be due to device not responding for example CPU tries to read memory but the Memory Controller fails to assert DTACK an illegal access attempting to write to ROM A bus error causes exception processing CPU the 68000 microprocessor DMA direct memory access Process in which data is transferred from external storage device to RAM or from RAM to external storage Transfer is very fast takes place independent of the CPU so the CPU can be processing while DMA is taking place Glue arbitrates the bus between the CPU and DMA DMA CONTROLLER Atari proprietary chip which controls the DMA process All disk I O goes through this device EXCEPTION a state in which the processor stops the current activity saves what it will need to resume th
5. a daughter board located front of the video shield or hand wired onto the main board within the video shield possibly in later versions integrated into the printed circuit board PSG Programmable Sound Generator also YM2149 Yamaha version of General Instruments AY 3 8910 two 8 bit I O ports three sound channels Used in parallel port and audio RS232C Electical standard for serial digital communication Also the physical and logical device which performs communication using this standard the ST computers consists of the PSG 1488 and 1489 chips Mega Service Manual 9 2 Glossary 1772 Western Digital Floppy Disk Controller 6850 also Asynchronous Communication Interface Adapter Interfaces between 8 bit parallel bus and serial communication bus the ST there are two 6850s for keyboard communication and one for MIDI communication 68901 see MFP SUPERVISOR MODE state of the CPU in which it is allowed to access all hardware and RAM locations and perform some priviliged instructions Determined by the state of a bit in the Status Register The operating system operates in supervisor mode and switches to user mode before passing control to an application although the application can enter supervisor mode if it wishes USER MODE state of the CPU in which certain instructions areas in the memory map are disallowed resulting privilege viola
6. APPROVED DAREI 2 2 7 DAW 7 NOTES UNLESS OTHERWISE SPECIFIED APPLICATION THIRD ANGLE SYSTEM DIMENSION 354 _ OR 8 USER SUPPLIED SF 4 i T 5 o DETAIL 9 USER SUPPLIED 1 5 5 4 3 2 8 4 E 7 MOTES UNLESS OTHERWISE SPECIFIED L Ait RESISTORS ARE MEASURED hi QuUMS KW 5 Noe 2 ALL CAPACITORS ARE MEASURED PICO 5 S ACTIVE THE LAST TRANSFSA As edi WRITE HOST MEM READ HOST 5 3 3K ET 110 NG 7 3 MEMES L alu z F WRITE L LAST NUMBER USED 244 02 ye MAME 4 c DMAEM H 2 2 MEM Of L 1 2 pe OMA READ B 1 2 iS ih 7 2 TENTRLO L DATA aus EFL Yap LAST REFERENCE DESIGAIATOR USEC UZ RI C2 YI r 1 abad ka Bemi eis ATART if 9565 T SEWNEMATE DMA TESTER REFERENCE LCESIGNATORS ALT USED P ecd 9 18 ALL PEER LS THI 1170 radio ia pri am i Amm F
7. E RW IF NOTES UNLESS OTHERWISE SPECIFIED APPLICATION CS 5555222955 sa aM peii a i HA 2 ng 77 AA 6 Sb Rp RANA a a a E a LJE E sata Ko Wi a 22 KI 5 e a 6 o 4 a 90 0 99 gt 0980900059 a 6666 5966656537 PT PL aaa 7 66 oon a ca s 5656696866 ine 5 r sence 9669 T v iF nag 99 g e 8999696996 a aa a L 8 89 n E 9 6 No bula 5590900906 a NOTES
8. Even numbered addresses refer to the high 8 bits of word and odd addresses refer to the low 8 bits is made up of 1 Megabit X 1 chips in the Mega 2 there are 16 chips giving 2 Mbytes while in the Mega there is additional bank of 16 chips giving two times the memory or Mbytes RAM memory map 000008 000800 System memory priveliged access 000800 1FFFFF low bank 200000 3FFFFF high bank Mega 4 only Note the first 8 bytes of ROM are mapped into addresses 0 7 These are reset vectors which the 68000 uses on start up The Operating System is located in two 1Meg x 8 ROM chips current versions 192k Memory Controller takes addresses from the address bus converts to Row Address Strobe RAS and Column Address Strobe CAS All RAM accesses are controlled by this Atari proprietary chip which is programmable for up to Megabytes of memory The Operating System determines how much memory is present and programs the Memory Controller at power up The Memory Controller refreshes the dynamic RAMs loads the Video Shifter with display data and gives or receives data during direct memory access DMA Glue decodes addresses for RAM and ROM and asserts output signals to enable these devices also decodes addresses for most hardware registers to provide chip selects well as many other functions See Glue description above Direct Memory Access Direct memory access is provided to support both low
9. Monochrome Audio output programmable sound chip with 3 voices Input Output Subsystems Intelligent Keyboard with 2 button mouse joystick interface Parallel printer interface Centronics RS 232C serial interface DMA Port amp connector for external drive Hard disk drive interface amp Laser Printer Musical instrument network communication Musical Instrument Digital Interface MIDI Real Time Clock with battery backup ROM Port Mega Service Manual 2 1 of Operation MAIN SYSTEM The main system includes the microprocessing unit main memory ROM and system control interrupt control and general purpose DMA controller Microprocessing Unit The Mega uses the Motorola MC68000 16 bit external 32 bit internal data bus 24 bit address bus microprocessor running at 8 MHz Glue Glue named because it holds the system together is such important component that it is involved in nearly every operation in the computer The functions may be summarized as follows Clock dividers takes the 8 MHz clock and outputs 2 MHz and 500 KHz clocks Video timing Blank DE Display Enable Hsync are used to generate signals for the video display There is a Read Write register in Glue which may be written to configure for 50 or 60 Hz operation done by the Operating System Interrupt priority interrupts from the MFP and video timing coded into four levels of priority on output
10. Symptom Checklist Systoms Probable Cause KEYBOARD PROBLEMS Keys won t work Bad keyboard controller 6850 MFP Keys won t work Keyboard cable was inserted while unit was but mouse does powered recycle power MIDI PROBLEMS No data Bad opto isolator chip 6850 inverter 741508 741805 RS232 PROBLEMS No data Bad 68901 MFP receiver driver or PSG chips 12v supply is blown Use diagnostics to isolate bad line s PRINTER PORT PROBLEMS No output Bad PSG MFP chips Does not output Input impedance of printer is less than 3K ohm to a specific modify pullup resistors on printer printer DMA PORT PROBLEMS Does not function Bad IMA Controller Memory Controller 1772 loading the bus REAL TIME CLOCK PROBLEMS Does not function PAL chip clock chip crystal Does not save time batteries power off sense circuit after cold boot BLiTTER PROBLEMS No video when Blit Jumpers below and to right blitter chip is inserted must be cut before blitter will work Does not function Replace blitter chip if above step doesn t fix problem Mega Service Manual 5 2 Symptom Checklist SECTION SIX DIAGNOSTIC FLOWCHARTS This section summarizes diagramatic form the steps taken in troubleshooting the Mega using the diagnostic cartridge The details of using the cartridge are not shown this shows the context in which the cartridge would be used including some problems for which the cartridge wo
11. 8 data bits preceded by one start bit and followed by one stop bit Communication takes place via 6850 ACIA The CPU reads writes to the 6850 in response to interrupts which are passed from the 6850 to the interrupt controller system is interfaced to the outside via two inverters on the transmit side and LED photo transistor chip on the input side The input signal is routed around through two inverters to the output connector where it is called MIDI THRU in order to allow chaining of multiple devices on the MIDI bus Midi Qut lt 1 THRU Transmit Data 2 Shield Ground 3 THRU Loop Return 4 OUT Transmit Data 5 OUT Loop Return Midi In 3 1 Not Connected 2 Not Connected 3 Not Connected 4 N Receive Data 5 Loop Return FIG 9 MIDI PORTS Mega Service Manual 2 9 Theory of Operation Intelligent Keyboard The keyboard transmits make break key scan codes ASCII codes mouse data joystick data response to external events time of day data year month day hour minute second in response to requests by the CPU Communication is controlled on the main board by a 6850 device and the keyboard assembly by the 1MHz 8 bit HD6301 Microcomputer Unit The HD6301 has internal RAM and ROM Included in ROM are self test diagnostics which are performed at power up whenever the RESET command is sent over the serial communication line
12. CRYSTAL 32 0424 MHZ CONN 40 PIN RIGHT ANGLE CONN DB 19S HARD DISK CONN 14 PIN DIN FLOPPY DISK CONN DB 25P RS232C CONN DB 25S PARALELL CONN 13 PIN DIN VIDEO CONN 5 PIN DIN MIDI CONN SINGLE INLINE 6 PIN CONN DOUBLE INLINE 24 PIN CONN DOUBLE INLINE MALE 64 PIN SOCKET 40 PIN SOCKET 28 PIN SOCKET 68 PIN LCC PUSH SWITCH FLAT CABLE 34P ASSEMBLED CABLE 4P ASSEMBLED CABLE ASSY MALE TYPE 2 PIN IC CUSTOM ST BLITTER IC 68000 8 CPU IC CUSTOM DMA CONTROLLER IC CUSTOM GLUE IC CUSTOM SHIFTER IC CUSTOM FULL SHIFTER w D A IC CUSTOM MMU IC 1489 RS 232C RECEIVER IC 1488 RS 232C DRIVER IC YM2149 SOUND IC 68901 MFP IC 6850 ACIA IC DYNAMIC RAM X 1 IC PC900 PHOTO COUPLER LOCATION R5 R27 R6 11 28 29 39 112 R22 R7 8 25 33 36 108 109 114 R18 R32 Rp7 RP1 4 RP5 6 L1 12 45 46 48 1 47 150 L5 L9 12 4 6 8 13 22 24 730 32 43 Q1 3 6 10 Q2 DI 3 5 8 15 8 D4 Y1 Y2 OSCI 72 J10 3013 J7 J6 J14 J3 4 J1 18 J17 J15 027 31 U3 4 6 7 9 10 05 17 30 51 J12 J11 T9 U5 U8 U27 U17 U31 or 1732 030 019 U20 U16 U18 U14 15 040 55460 75 013 PART NUMBER DESCRIPTION LOCATION C101621 IC TL 7705A 01 IC 74LS02 QUAD NOR U21 IC 74LS06 HEX INVERTER O C U26 741 507 HEX BUFFER 02 74 532 QUAD 2 INPUT OR 078 7415148 8 3 PRIOR ENCODER U39 IC 74HCO0 QUAD NAND GATE U24 C101622 IC 5 15 REAL TIME CLOCK U25 C101625 IC RTCP
13. Line 1111 Emulator See Line 1010 Emulator Unassigned should be no occurrence Spurious Interrupt Bus error during interrupt processing Autovector Interrupt Even numbered vectors are used others should have no occurrence TRAP Instruction The CPU read instruction which forced except ion processing MFP interrupts User interrupts If you have an error message such as TOS ERROR 35 then the possible errors are 1 The file in progress is bad 2 The total number of folders in the system has exceeded the 40 folder limit However there is a program which can be used to extend this limitation on folders 3 No handles left or too many open files Mega Service Manual 2 16 Theory of Operation 508 1 JO 10291 WVHOVIG 3018 TVNOILOINNA DIH GT JOYSTICK MOUSE MIDI DMA FLOPPY PARALLEL RS232 VIDEO AUDIO INTERFACE PORT CONNECTOR OUT IN THRU 120VAC SWITCHING B 12 16 DRIVE POWER T TXD SUPPLY SVDC 3 0 SELECT 1200 OUT BATTERY KEYBOARD T T 1772 auok NOE OU DUAL DC DC PC 900 _ DISK IM INVERTER CONTROL EXPANSION REAL TIME 6850 6850 DMA MONO RESET RESET CLOCK ACIA ACIA CONTROL MON PORT 64 PIN DATA BUS 1 Me i Z 85 z x ETI k TI ll NU N LiL CONTROL BUS
14. Right Mouse Button FIG 7 MEGA MOUSE Differences from 5205 10405 o New version of TOS o More memory requiring 74LS243 buffers on MAD lines o Real time clock chip amp support circuit o Graphics Co Processor BITBLiT Internal expansion connector amp support circuit o Cooling fan o New case styling with detached keyboard Mega Service Manual 145 Introduction aaa M S SECTION TWO THEORY OF OPERATION OVERVIEW The Mega 2 and Mega 4 share common architecture using the same LSI chip set and case styling only difference is the addition of one bank of 2 Mega bytes of RAM for a total of 4 Mega bytes of RAM on the Mega 4 The hardware can be considered as consisting of main system central processing unit and support chips and several Input Output subsystems O QO 0000 O 0 O 0 O O O Main System MC68000 running at 8MHz 192 Kbyte Read Only Memory 2 or 4 Mega byte Random Access Memory Direct Memory Access support System timing and Bus control Interrupt control Audio Video Subsystem Bit Mapped video display using 32k bytes of RAM relocatable anywhere in memory There are three display modes available a 320 x 200 pixel 16 color palette from 512 selections b 610 x 200 pixel 4 color palette from 512 selections 640 x 400 pixel monochrome BITBLiT support Monitor interface analog RGB
15. The user must connect a terminal to the RS232 port The diagnostic program looks for keystrokes from the RS232 device If the display is unreadable the 5232 terminal should be used 11 messages are printed to the 5232 port as well as the Screen Test Menu The normal screen will be dark blue with white letters The test title and revision number are displayed at the top with the amount of RAM and keyboard controller revision below a test menu below that To select tests the user types the keys corresponding to those tests then the return key iterations of the test or tests chosen can be run by typing in the number cycles just before typing RETURN Typing a zero will cause the test sequence to run continuously To stop a cycle before completion hit the escape key there may be some delay in some tests before the test stops each cycle completes the total numbers of cycles will be displayed on the screen Mega Service Manual 3 4 Testing MAIN MENU Mega and ST Field Service Diagnostic Test Rev 4 0 1987 Atari Corporation lM RAM Keyboard revision 2 60 Hz OS Version 2 USA NTSC R RAM Test 0 0 5 ROMs Color MIDI S Serial Port A Audio T Timing D DMA Port F Floppy Disk P Printer Joy Ports H High resolution G Graphics chip Blitter L Real time clock X Expansion connector Run 11 Tests Z Run Internal tests R 0 C K A T L G Examine Modify memory
16. corresponding to the indicated bit s RO low memory failed while setting up to run test Ri failed walking 18 or Os R2 failed address counting pattern R3 failed 64k boundary test Probable failure in Memory Controller R4 failed while displaying area tested video RAM Mega Service Manual 3 6 Testing ROM TEST This test reads the configuration bytes the operating system to determine the version language country and TV standard PAL or NTSC 11 bytes from operating system ROMs are then read and the checksums calculated These values are compared against known value with checksums for this version to determine if good or bad Six checksums are displayed although there be only two ROMs in the machine some machines have six 128K ROMs some have two 1 meg ROM S The test fails if the checksum calculated does not match the checksum expected for the configuration byte found e g Version 2 French Incorrect checksums are indicated by a message If an error is displayed replace the corresponding ROM In a two ROM set replace the low ROM if any of LO L1 or L2 showed an error or replace the high ROM if any of HO H1 or H2 showed an error New revisions of TOS will cause this test to fail if not incorporated into the current version of the diagnostic If you receive TOS revisions before receiving the diagnostic revision it will be necessary to verify the checksums yourself COLOR TEST This test
17. created intentionally to cause an interrupt the did not respond S9 RI DTR connection Signal sent at DIR is not detected at RI SA DCD DTR connection Signal sent at DTR is not detected at DCD SB RTS CTS connection Signal sent at RTS is not detected at CTS Mega Service Manual 3 10 Testing AUDIO TEST Outputs low to high sweep on each of the three sound channels One cycle of each channel is performed If a channel is missing replace the PSG chip If no sound is heard verify the output of the chip with an oscilloscope and trace the signal to the monitor output connector If no output from the PSG verify the PSG is being selected by running the printer port or RS232 test these tests both select the PSG TIMING TESTS These tests are run at power up as well as being selectable from the menu timers the Glue timing for VSYNC HSYNC and the Memory Controller video display counters tested The video display test redirects display memory throughout RAM and verifies that the correct addresses are generated Odd patterns flash on screen as this test is run There are two tests which check the bus timing for the 1772 and chips error message is printed to the screen then the test is run If the test passes the message is erased If not a Bus Error will occur and the message will remain terminal is connected to the RS232 port the message will not be erased
18. its RAM this manual will use Mega as a generic term which refers to both products Power Light Disk Drive Drive Busy Light FIG 1 MEGA COMPUTER SYSTEM Mega Service Manual Lal Introduction The main components of the Mega 2 and Mega are CPU Main board assembly Disk drive Power supply amp cooling fan RF Shield upper and lower CPU Plastic case upper and lower QO O O O 0 KEYBOARD o Keyboard assembly Interface board assembly o Keyboard Plastics upper and lower 0 MOUSE o Mouse board assembly o Mouse Plastics upper and lower CASE DESIGN Figures 1 thru 4 shows the CPU portion of the MEGA 5 and 6 shows the keyboard portion and figure 7 shows the mouse Battery Housing Cover M m p 7 NG Computer Size AA Batteries FIG 2 BATTERY COMPARTMENT Mega Service Manual 1 2 Introduction Floppy Disk On Off Power Monitor Q Reset Hard Disk Printer 43 Midi In FIG 3 BACK PANEL Cartridge Keyboard FIG 4 LEFT SIDE PANEL Mega Service Manual 1 3 Introduction Function Keys i7 RIZR Calculator Keypad Arrow Keys FIG 5 TOP OF KEYBOARD Bottom of Keyboard Y Joystick Port 1 Computer Jack 48 Mouse Joystick BOTTOM OF KEYBOARD Mega Service Manual 1 4 Introduction Clicking Left Mouse Button
19. meg of RAM Mega Service Manual 3 5 Testing Summary of Tests RAM TEST RAM is tested in three stages low 2 kbytes middle up to 64k and from 64k to top The test patterns used are all 1s all Os 8 counting pattern data low word of the address reverse counting pattern data complement of address low word counting pattern is copied from the top and bottom of 32 Kbyte buffer into the current 32 Kbytes of video RAM then shifts video RAM to a new area verifies the pattern and repeats the test until the top of RAM is reached Finally addressing at 64k boundaries is checked by writing unique pattern in last 256 56 of each 64k block If an error occurs the error code is displayed followed by the address data written data read and the bits which did not agree E g R2 45603E W 603E R 613C bad bits 1 8 In units having more than one bank i e 10405 MEGA the address as well the bit position must be used to find the correct chip The following table gives a correspondence between the addresses and banks for various models 520 1040 Mega 2 Mega 4 O T7Tffff bank O bank O bank O bank O 80000 fffff bank 1 bank O bank O 100000 1fffff bank O bank 0 200000 3fffff bank 1 A bank is a 16 bit wide group of RAMs A bank may consist of 256k bit chips 256k x 16 4 Mbit or 512k bytes or 1Mbit chips 1Mbit x 16 16 Mbit or 2 Mbytes RAM ERROR CODES Except where noted repair by replacing the RAM chip
20. pana pe ptica rer md dm hem iuum de Lem m 8 7 6 5 4 3 gt la D A ni xr pm ci 2 RR z DE ma cm m ja SN LA 6 2 AU be a Mima Ba a 6 1 AP TL wi zs ga A Due ra 25 gr C ca tug tie 5 is DATA BUS LEE 3184 UG Ge at A2 ask zA Bi ad T 99 DMAEM To BEST TE T t B 25 z lt lt Ga eb i ti fd u jc lj a zaje T 1 7 d y 1 HP gru FE 4211 saj i3 i daj e A 744404 EE 7 E 4 _ 3 SER twee H Kak s de E fe 7 F T na BOO IHLSO
21. this resistor network is incorporated into the full custom chip in later versions of the video shifter C101608 Video shifter which has part number 0101608 or C070713 has 1 connected to to signal line BLANK Shifter with part number C025914 will have pin 1 connected to a pull down resistor 140 101 and signal line BLANK will be connected to diodes D9 D10 D11 Mega Service Manual 3 7 Testing Symtoms and fixes 15 Missing primary color Check the output of the transistor amplifier 06 is blue 07 is green 08 is red Look for a staircase pattern eight levels of intensity If the signal is there trace forward to the video connector if not trace backward to the Video Shifter until the faulty component is found 2 Primary colors present secondaries missing incorrect Replace the Video Shifter 3 Coarse change in intensity not a smooth dark to light transition Replace Video Shifter or look for a short on the output of one of the three color outputs for the appropriate color 0 Specks or lines on the screen This can be caused by bad RAM if RAM has been tested and is good replace the Video Shifter s Wavering display horizontal lines not occurring in the same place every time The processor may be getting extra interrupts if the processor is required to handle additional interrupts it will not have timer to change all 16 color registers during a horizontal scan time Examine the interrupt request
22. which will display some number of bombs showing on the screen mushroom clouds in older versions of disk loaded operating system The number of bombs equals the number of the exception which occurred Mega Service Manual 2 15 Theory of Operation System errors may or may not be recoverable Errors in loading files from disk will cause the system to crash necessitating a reset Verify the diskette and disk drive before attempting to repair the computer NUMBER OF BOMBS AND MEANINGS No 26 28 30 and 64 79 will not bomb as they are legitimate KO OI EF Wh 10 11 12 23 24 25 31 32 63 64 79 80 255 Note Bus Error Glue asserted bus error or CPU detected an error Address Error Processor attempted to access word or long word sized data on an odd address Illegal Instruction Processor fetched an instruction from ROM or RAM which was not a legal instruction Zero Divide Processor was asked to perform a division by zero Chk Instruction This is a legal instruction if software uses this it must install a handler Trapv Instruction See Chk instruction Privilege Violation was in user mode tried to access location in supervisor address space Trace If trace bit is set in the status register the CPU will execute this exception after every instruction Used to debug software Line 1010 Emulator CPU read pattern 1010 as an instruction Provided to allow user to emulate his own instructions
23. 0 FEFFFF The following sequence is then executed 1 Perform a reset instruction outputs a reset pulse 2 Read the longword at cartridge address FA0000 If the data read is a magic number execute from the cartridge diagnostic cartridge takes over here If not continue 3 Check for a warm start see if locations were previously written initialize the memory controller and continue running the application which was running before the reset if it was a warm start Initialize the PSG chip deselect disk drives Initialize color palettes and set screen address If not a warm start zero memory Set up operating system variables in RAM Set up exception vectors A COD Initialize 10 Set screen resolution 11 Attempt to boot floppy attempt to boot hard disk run program if succeeded SYSTEM ERRORS The 68000 has a feature called exception processing which takes place when an interrupt or bus error is indicated by external logic or when the detects an error internally when certain types of instructions are executed exception will cause the CPU to fetch vector address to a routine from RAM and start processing at the routine pointed to by the vector Exception vectors are initialized by the operating system Those exceptions which do not have legitimate occurrences interrupts being legitimate have vectors pointing to a general purpose routine
24. 054 001 C070350 003 C070352 003 C103047 001 CA070025 MEGA PARTS LIST DESCRIPTION PCBA 1MB ROM MEGA 4 PCBA 1MB ROM MEGA 2 MEGA POWER SUPPLY w FAN MEGA 2 4 CASE BOTTOM MEGA 2 CASE TOP MEGA 4 CASE TOP MEGA KEYBOARD COMPLETE MEGA KEYBOARD CASE TOP MEGA KEYBOARD CASE BOTTOM MEGA KEYBOARD CONNECTOR PCBA MEGA KEYBOARD ONLY MEGA KEYBOARD CABLE FDD UNIT 1M BYTE NEWTRONICS FDD UNIT IM BYTE CHINON FDD UNIT IM BYTE CHINON STM1 MOUSE ASSEMBLY 30pF 50V 45 CH CER AXIAL 39pF 50V 5 CH CER AXIAL 100pF 50V 58 SL CER AXIAL 150pF 50V 5 CH CER AXIAL 330pF 50V 108 B CER AXIAL 1000pF 25V 20 X CER AXIAL CAP O 1pF 25VZ CER AXIAL 0 22pF 50V 750 CER AXIAL CAP 0 47 25V Z CER AXIAL 4 7pF 25V ELEC AXIAL CAP 10pF 16V ELEC AXIAL CAP 47pF 16V ELEC RADIAL CAP 100 16V ELEC AXIAL CAP 1000pF 16V ELEC AXIAL CAP 4700pF 16V ELEC RADIAL CAP 1001pF 16V ELEC RADIAL CAP 5 30pF TRIMMER RES 0 OHM JUMPER RES 5 1 OHM 1 4W 55 CARBON RES 27 OHM 1 4W 55 CARBON RES 33 OHM 1 4W 55 CARBON RES 47 OHM 1 4W 55 CARBON RES 75 OHM 1 4W 55 CARBON RES 100 1 4W 5 CARBON RES 150 OHM 1 4W 5 CARBON RES 220 OHM 1 4W 55 CARBON RES 470 OHM 1 4W 5 CARBON RES 1K OHM 1 4W 5 CARBON RES 1 2K OHM 1 4W 5 CARBON LOCATION SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SUBASSEMBLY SU
25. ACK bus grant acknowledge These should go off after 1 the expansion connector test is run and 2 either the DMA test or floppy test are run The LEDs simply indicate that the line Jis toggling A lit LED means the line is not changing Mega Service Manual 3 16 Testing The software tests three groups of signals data bus address bus and interrupts The first test writes and reads the RAM on the test fixture setting one bit high at a time to check for open or shorted data lines If an error is found the message EXO bad bit is displayed The second test writes an incrementing pattern 0 1 2 across address bits 0 15 then across address bits 16 23 to the RAM on the test fixture to check for open or shorted address bits If error is found the message EX1 external RAM error low byte or EX2 external RAM error high byte is printed depending on whether the error occurred in the low or high address The third test uses circuitry on the external test fixture to create interrupt requests There are three interrupts INT3 INT5 and INT7 If the appropriate interrupt does not occur when expected then a message is displayed EX3 INT3 error EX4 INT5 error or EX5 INT7 error ERROR CODES QUICK REFERENCE This is a brief summary of all error code which occur when running the diagnostic INITIALIZATION Errors occurring before the title and menu appear I1 RAM data line is stuck I2 RAM disturbance Locat
26. AL 168 U37 IC 741 5244 3 STATE LINE BUFFER U32 35 58 59 IC 74LS373 LATCH U33 36 IC 74LS11 TRIPLE 3 INPUT AND GATE U12 070447 TL497A SWITCHING REGULATOR U22 C026028 IC WD 1772 FDD CONTROLLER U28 C101629 001 IC TOS ROM 1 MEG 0 U9 C101630 001 IC TOS ROM 1 MEG 10 0 U10 C070349 002 AC POWER CORD UL CSA C100296 001 MEGA MANUAL OWNERS 070322 COLLAR A 3 DRIVE SPACERS C070323 COLLAR B 1 DRIVE SPACER E ED 6221 S il B 353 5 10 452 5 lt lt a 5 1117 111 SEE SHEET 1 MEGA STE Kai E m ATARI JAPAN CORPORATION merus nes HATE Toranomon Kiyothi ATARI 4 3 10 Toranomon Minato ku Tokyo 105 ASSY MEGA BE E pis rr rm SEE SHEET 1 MEA AHAA Hou 81 NATE APPR Fin SEE SHEET 1 ATARI JAPAN CORPORATION Toranomon Buikhng F RENT ATARI 4 3 Toranomon Minato ku Tokyo 105 CAO 70025 xxx hii MAIN ASSY SIMT SAFE PRAN NG 8887 X a3 Ras SECTION EIGHT SCHEMATICS AND SILKSCREEN Mega Service Manual Bid Schematics 4 Silkscreens Ha He nr a 74 KE BOARD JOY 1 o
27. BASSEMBLY SUBASSEMBLY SUB FOR ABOVE SUB FOR ABOVE ASSEMBLY C39 40 C54 43 46 28 29 C68 69 C1 2 5 7 9 21 23 26 27 30 33 36 38 41 42 47 48 50 52 55 56 57 59 60 64 66 73 2 113 120 121 123 C80 5 C67 C22 24 25 C3 C34 35 C8 37 51 C140 C4 C49 C53 R120 123 126 145 146 D12 14 W2 3 R15 R83 R52 54 55 57 60 66 68 76 110 113 R45 48 R67 73 77 R69 75 78 86 116 R23 115 R10 14 16 17 19 44 R26 R1 2 4 21 24 30 37 38 40 43 82 85 111 R20 76 PART NUMBER C070567 004 C070159 006 C070448 C014384 C070205 C070471 001 C070471 002 6000 000 1 8 02 C101805 C025993 CLOOZSZ 0 1 C070129 000 0 0071011 0 4 C070033 C070445 070644 011 0100263 71 C070120 6009 CA070024 CA070023 003 CA200053 002 C101643 0225982 60 3 0 5 000 C101608 C025912 C025986 271 2025283 C025984 6029 CILLA 2025288 RES 2 2K 1 4 5 CARBON RES 3 3K OHM 1 4W 5 CARBON RES 4 7K OHM 1 4W 55 CARBON RES 5 1K 1 4W 5 CARBON RES 10K OHM 1 4W 55 CARBON RES 12K OHM 1 4W 5 CARBON RES 51K 1 4W 5 CARBON RES NETWORK 1 OHM X 6 RES NETWORK 4 7K OHM X 8 RES NETWORK 10K OHM X 8 INDUCTOR FERITE BEAD AXIAL INDUCTOR 0 27uH 20 AXIAL INDUCTOR 10pH 10 AXIAL INDUCTOR 220pH 10 AXIAL LINE FILTER NOISE FILTER ZJS5101 02 TRANSISTOR 2N3904 TRANSISTOR 2N3906 DIODE 1 914 DIODE 155108 SCHOTTKY BARRIER CRYSTAL 2 4576 MHZ CRYSTAL 32 768KHZ
28. C input to the Memory Controller causes the starting address of the display memory to be reloaded into the address counter during vertical blanking DISPLAY ENABLE DE tells the Memory Controller and Video Shifter that a display line being scanned and data should be loaded into the Video Shifter BLANK shuts off the video output from the Video Shifter during periods when the scan is not in a displayable part of the screen VSYNC and HSYNC both go to the monitor output and RF modulator These signals synchronize the monitor or T V vertical and horizontal sweep to the display signal Memory Controller In addition to the inputs from Glue mentioned above there are two output control signals associated with video DCYC strobes data from display memory into the Video Shifter CMPCS color map select active only when changing the color attributes in the color palettes Sound Synthesizer The YM2149 Programmable Sound Generator PSG produces music synthesis sound effects and audio feedback e g alarms and key clicks The clock input is 2 MHz the frequency response range is Hz to 125 KHz There are three sound channels output from the chip which are mixed and sent to the monitor speaker The PSG is also used the system for various 1 0 functions relating to printer port disk drive and RS232 Atari Blitter This is DMA device that moves block of memory data from a source location to destination location throu
29. Controller is bad D2 Data mismatch error The data received from the DMA port was not the same as the data sent Replace the DMA Controller If the problem persists check the data lines to the port for opens shorts third possibility is that defective 1772 is loading the bus D3 DMA not responding DMA controller could not respond to a data resquest from the external controller Replace the DMA chip FLOPPY DISK TESTS The Floppy Main Menu Floppy disk drive routine WARNING all choices except 2 6 7 write to the disk 1 Quick Test 2 Read Alignment Disk 3 Disk Interchange Test 4 Disk Exerciser 5 Check copy protect tracks 80 82 6 Test Speed 7 Install disk drives In single test mode a menu is displayed showing seven options 1 Quick test For each disk installed formats writes and reads tracks O 1 and 79 of side O If double sided formats and writes track 79 of side 1 and verifies that side O was not overwritten If no disks are installed checks to see what drives are online and if they are double or single sided To assure that the drive are correctly tested the operator should install menu option 6 before calling the test Once the test is run the drives become installed and will be displayed on the menu screen below the RAM size Mega Service Manual 3 12 Testing 2 Read track Continuously reads a track for checking alignment with an analog alignment diskette The track to be r
30. RPORATION NT A 4 23 bE i 2 E DATE Toranomon Kiyoshi Building SF TOLERANCE NENT asst ATARI 4 3 10 Toranomon Minato ku Tokyo 105 SIZE DRAWING NU HARD DRIVE VIPROUMEB isa STEAM 753392 OR EQUIVALENT 9 Qd PHOTO TRANSISTOR LTR3O OR EQUIVALENT 21 204 LED LTE 307 OR EQUIVALENT NOTES UNLESS OTHERWISE SPECIFIED REV REVISIONS DESCRIPTION ssl 9 6 LEFT SW Sw RIGHT SW _ di ATARI JAPAN CORPORATION Toranomon Kiyoshi Building 3F 4 3 10 Toranomon Minato ku Tokyo 105 Kawamata 2 28 45 DATE REVISIONS DE 50111 SEE SHEET 1 a 0 umm PRINT ET 7 82 usa 586 va 65104 CI UU o wo JE usa yn 5 95 CA TI C wr va C vo N3 7 1 1 3 3 200019 OD uu C uw we C cat AR 2 Ey ji 7 13 CI 544 CI Cu gt ATARI JAPAN CORPORATION 606 Kiyoshi Building ATARI 43 10 Toranomon Minato ku T
31. Set RS232 rate Toggle video output 50 60 Hz Help lt lt UJ Enter letter s and RETURN The G L and X selections will be highlighted if these devices are found at start up time These should be present in Mega systems only The X selection requires the expansion test fixture be installed which requires disassembly If these selections are made when not highlighted the test will check for their presence and test if found The Q selection sequences through all the tests except for High resolution monitor The Z selection sequences through RAM ROM Color Keyboard and Timing tests Selection E enables the operator to examine Or modify RAM or hardware registers The B enables the operator to change the baud rate on the RS232 Pressing the Up arrow increases it pressing the down arrow decreases it Pressing or the HELP key brings up a brief synopsis of the cartridge functions After test or series of tests completes the pass fail status and error report if any will be displayed Press the space bar to return to the menu If multiple tests are selected the sequence can be halted before completion by pressing the ESC key At the completion of the current test the sequence will halt with the options of either continuing or returning to the menu In some cases there will be considerable delay before the current test completes and the keystroke is detected Up to 3 minutes with 4
32. TABLE OF CONTENTS LIST OF ILLUSTRATIONS ii SECTION ONE INTRODUCTION Main Components 1 2 Case design 1 2 Differences from 520 10405 1 5 SECTION TWO THEORY OF OPERATION I Overview Main System Microprocessing unit Glue Main Memory Direct Memory Access MFP Interrupt Control ho N Audio Video subsystem Video Shifter Video Display Memory Glue Memory Controller Sound Synthesizer Video Interface Input output subsystems MIDI Intelligent Keyboard Parallel Interface RS232 Interface Disk Drive Interface Hard Disk Interface NAN ON UT EWWNNN ho N ho ma JE System Startup System Errors 2 15 Functional block diagram 2 16 System clock diagram 2 17 Mega Service Manual Ll Table of Contents SECTION THREE TESTING THE MEGA Overview Nka Test equipment 3 4 Test Configuration 3 2 Trouble Shooting a dead unit Se ST Diagnostic Cartridge 3 4 Power up 3 4 RAM test 3 6 ROM test 3 7 Color test 944 Keyboard test 3 9 MIDI test 3 9 RS232 test 3 10 Audio test 31 Timing test eli DMA test 3 12 Floppy Disk test 5 Printer Joystick test 3 15 High Res Monitor 3 16 Blitter test 3 16 Clock test 34417 Expansion port test 55 41 Error Codes Quick Reference 3 18 SECTION FOUR DISASSEMBLY ASSEMBLY SECTION FIVE SYMPTOM CHECKLIST Display problems Disk Drive problems Keybo
33. UNLESS OTHERWISE SPECIFIED e 1 DIN 00000000 B ID 9666 26 odo 8 9 08 rA a RE VISIONS DESCRIPTION SEE SHEET 1 TE 002 J OLDER MASK COMPONENT SIDE TOLERANCES UNDER 30 01 30 THRU 300 OVER 300 ATARI JAPAN CORPORATION Toranomon Kiyoshi Building 4 3 10 Toranomon Minato ku Tokyo 105 ATARI POB MEGA DRAWING NO SIZE C WONE Jd o 4 SHEET APPLICATION ribi Sani REVISIONS DESCRIPTION DATE APPROVED SEE SHEET 1 POWER SOCKET CO7O8 5 201 POWER SW 7CH 20 6 AC INCH BLACK FUSE t5V ASSY WHITE AC IN N GNO TOROID CORE REEN t 2V CONNECTOR FAN 70027 0 7 77 POWER SOCKET POWER SWITCH TORO O CORE WIRING REAR VIEW REAR V EW 3 TURNS ATARI JAPAN CORPORATION Toranomon Kiyoshi Building ATARI 4 3 10 Toranomon Minato ku Tokyo 105 POWER SUPPLY ASSY ASP34 I CH SIZE DRAWING REV 8 SCALE NONE SHEET 4
34. a Service Manual 6 2 Diagnostic Flowcharts NO ERROR ON DIAGNOSTIC RUN DISK DIAGNOSTIC OR REPLACE DRIVE TRACE SIGNAL FROM VIDEO SHIFTER TO OUTPUT RUN APPROPRIATE TEST CONTINUOUSL Y CONTACT ATARI TECHNICAL SUPPORT MEGA ST DIAGNOSTIIC FLOW CHART Mega Service Manual 6 3 Diagnostic Flowcharts NO DISPLAY ON MONITOR OR TERMINAL YES YES NO YES 1 CHECK SHIFTER REMOVE SHIELD 2 INSPECT REPLACE OSCILLATOR TEST FOR POWER SUPPLY SHORTED NO YES SHORT REPLACE GLUE RS232 DISPLAY NO 1 SEE THEORY OF OPERATION 2 REPLACE PCB 3 CONTACT ATARI TECHNICAL SUPPORT DIAGNOSTIC ERROR RESTART REPLACE PARTS PER DIAGNOSTIC GUIDE Mega Service Manual 6 4 Diagnostic Flowcharts NO DISPLAY NO ERROR TRACE OUTPUT TO CONNECTOR REPLACE FAILING PART Mega Service Manual RESTART RESTART REPLACE MEMORY CONTROLLER RESTART MEGA ST DIAGNOSTIIC FLOW CHART 6 5 Diagnostic Flowcharts a he a maa a SECTION SEVEN PARTS LISTS AND ASSEMBLY DRAWINGS Mega Service Manual Tad Parts List amp Drawings PART NUMBER CA200055 001 CA200093 001 CA200008 001 CA200018 001 CA200022 001 CA200025 001 CA200039 001 CA200040 001 CA200041 001 CA200042 001 CA200043 001 CA200
35. ard problems MIDI problems RS232 problems Printer problems Hard Disk problems Real Time Clock problems Blitter problems Mega Service Manual 142 Table of Contents SECTION SIX DIAGNOSTIC FLOWCHARTS SECTION SEVEN PARTS LIST AND ASSEMBLY DRAWINGS SECTION EIGHT SCHEMATICS AND SILKSCREEN SECTION NINE GLOSSARY Mega Service Manual 142 Table of Contents LIST OF ILLUSTRATIONS FIG 1 MEGA COMPUTER dal FIG 2 BATTERY COMPARTMENT 142 FIG 3 BACK PANEL 1 3 FIG 4 LEFT SIDE PANEL 1 3 FIG 5 TOP OF KEYBOARD 1 4 FIG 6 BOTTOM OF KEYBOARD 1 4 FIG 7 MEGA MOUSE 1 5 FIG 8 MONITOR PORT 2 7 FIG 9 MIDI PORTS 2 8 FIG 10 MOUSE JOY PORTS 2 9 FIG 11 PRINTER PORT 2 10 FIG 12 RS232 PORT 24 FIG 13 EXTERNAL FLOPPY PORT 202 FIG 14 EXTERNAL HARD DISK PORT 2 13 FIG 15 FUNCTIONAL BLOCK DIAGRAM 2 16 FIG 16 SYSTEM CLOCKS 2417 Mega Service Manual 11 List of Illustrations SECTION ONE INTRODUCTION The Mega 2 and Mega 4 are Motorola 68000 microprocessor based computers with similar architectures to the 520ST 1040ST line They are styled as a main CPU unit with a detached keyboard The Mega 2 has megabytes of RAM the Mega 4 contains 4 megabytes Both the Mega 2 and Mega 4 have a built in 1 Megabyte 720K formatted 3 5 inch floppy disk drive and an internal switching power supply with built in cooling fan Since the only difference between the Mega 2 and Mega 4 is the size of
36. but Pass will be printed TIMING TEST ERROR CODES TO MFP timer error One or more of the four timers in the MFP did not generate an interrupt on counting down Ti Vertical Sync Glue is not generating vertical sync in the required time period T2 Horizontal Sync Glue is not generating horizontal sync in the required time period T3 Display Enable Glue is not generating DE output or the MFP is not generating an interrupt T4 Video Counter Error memory controller is not generating the correct addresses for the display This will result in broken up display in some or all display modes am T5 PSG Bus Error The PSG chip is defective T6 1772 Bus Error The 1772 chip is defective Mega Service Manual 3 11 Testing DMA TESTS Four sectors 2048 bytes of data are written to the RAM on the port test fixture via high speed DMA then read back verified This test is repeated many times for RAM addresses throughout the range of DMA TEST ERROR CODES DO DMA timed out No DMA occurred due to faulty DMA Controller Glue or Memory Controller the HDINT interrupt was not processed by the MFP The failure can be isolated by seeing if the DMA Controller responds to HDRQ from the test fixture with Verify the by seeing that the HDINT input causes an 1111 output from the D1 DMA counter error the number of bytes transferred was incorrect The Memory Controller or DMA
37. by the CPU The MC6850 is read and written to by the CPU in response to interrupts which are passed to the CPU by the MFP interrupt controller The 2 Button Mouse is an opto mechanical device with the following characteristics resolution of 100 counts inch a maximum velocity of 10 inches second and a maximum pulse phase error of 50 percent The joystick mouse port has inputs for up down left right right button left button The right button equals the joystick trigger and the left button is wired to the second joystick port trigger joystick has four directions up down etc and one trigger NG Mouse Joystick EZES b 2 Down XA 3 Left YA 4 Right YB 5 Not Connected 6 Fire Left Button 7 8 Ground 9 Joy1 Fire Right Button Joystick 2345 Wo 2 Down 3 Left 6729 4 Right 5 Reserved 6 Fire Button 7 VDC 8 Ground 9 Not Connected FIG 10 MOUSE JOY PORT Mega Service Manual 2 10 Theory of Operation Parallel Interface The parallel port is primarily intended as Centronics type printer interface but can also be used as a general purpose I O port Centronics STROBE and BUSY are supported BUSY is read by the MFP chip Data and strobe signals are output by the YM2149 PSG chip Not all Centronics printers are compatible with this port The current loading on the data lines should not exceed 2 3 mA This correspon
38. cketed If still failing the CPU is unable to read ROM or there is component which is not responding to a read or write by the CPU probably the 68901 or DMA Controller The MFP should respond to an MFPCS with DTACK The DMA chip should respond to FCS by asserting RDY There is no way to check 3 other than by elimination of the other two possibilities although hot CPU too hot to touch for more than a second strongly indicates a bad CPU 3 If the CPU is not halted it should be reading instructions from ROM cartridge if installed and data and address lines will be toggling If not replace CPU At this point there is the possibility that both the video and RS232 subsystems are failing Verify the output of the chip pin 8 while powering the unit with the cartridge installed If data is being sent trace it through the 1488 driver Note that and 12v is required for RS232 If all looks good there may be something wrong with the connection to the terminal Verify also the output of the Video Shifter If using an RGB monitor check the outputs to the summing resistors if external for and B Note that if BLANK is not going high picture will be possible If using monochrome check output pin 30 Also check the input to the pin 29 MONOMON Note that if the CPU does not read a low on this signal on power up it will cause RGB output on the Video Shifter If the Video Shifter is output
39. d If stuck high push the reset button and verify that MR 1772 pin 13 goes low If not trace RESET to its source If MR is OK but FDRQ is still stuck replace the 1772 F8 DMA count error Replace the Memory Controller if that does not fix it replace the DMA Controller F9 CRC error The diskette or disk drive may be bad else replace the 1772 FA Record not found The 1772 could not read a sector header be bad diskette drive or 1772 If the test fails drive but not drive B the 1772 is not at fault likewise fails B not A FB Lost data Data was transferred to the 1772 faster than the 1772 could transfer to the DMA Controller If DMA Port test passes the 1772 is probably bad DMA Controller could also be at fault FC Side select error single sided drive The test tried to write both sides of the diskette but writing side 1 caused side 0 to be overwritten FD Drive not ready format write read operation timed out Probably a bad disk drive Verify by checking another drive Could also be a faulty 1772 Soft Error does not cause a failure after 1 retry If doesn t fail second time Hard Error failed second retry Unit will halt if you reach any of the following 20 read errors 20 write errors or 5 format errors Mega Service Manual 3 14 Testing PRINTER AND JOYSTICK PORT TESTS The port test fixture is used to test the parallel printer port and joystick ports paral
40. d needs to be replaced or the communication channel through the 6850 is not functional K2 Keyboard status error self test command was sent to keyboard completion of the test the keyboard sent an error status Replace the keyboard MIDI TESTS This test sends data out the MIDI port data loops back through the cable and reads from the input and verifies the data is correct This also tests the interrupt from the 6850 through the chip The LED in the loopback cable will blink as data is sent not all cables have the LED MIDI ERROR CODES MO Data not received Trace the signal from the output of the 6850 through the drivers loopback cable and receivers to the input of the 6850 Replace the defective component M1 Write Read data mismatch The data written was not the same as the data read Replace 6850 M2 Input frame error 6850 or bad driver or receiver causing noisy signal M3 Input parity error Bad 6850 or bad driver or receiver causing noisy signal Mi Input data overrun The 6850 received a byte before the previous byte was read Probable bad 6850 also can be caused by the MFP not responding to the interrupt request Mega Service Manual 3 9 Testing RS232 TESTS First the RS232 control lines are tested which tied together by the loopback connector then the data loopback is tested Data is checked transmissing receiving using a polling method first then using in
41. ds to a 2 2k ohm resistor pull up on the printer side The port can be programmed to be input or output The PSG chip is read directly by the CPU with Glue doing address decode to provide chip select Printer KA 2 Data 0 Data 1 25 M 23 22 21 19 18 1 16 15 4 Data 2 5 Data 3 6 Data 4 10 Not Connected 7 Data 5 11 BUSY Input 8 Data 6 12 17 Not Connected 9 Data 7 18 25 Ground FIG 11 PRINTER PORT Mega Service Manual 2 11 Theory of Operation RS232C Interface The RS232C interface provides asynchronous serial communication with five handshake control signals Request to Send and Data Terminal Ready are output by the PSG chip Clear to Send Data Carrier Detect and Ring Detect are input to the MFP chip The MFP contains a USART Universal Synchronous Asynchronous Receiver Transmitter which handles data transmission and reception The 2 4576 MHz clock to the MFP is divided by the timer D pin 16 output of the MFP to provide the basic clock for receiver and transmitter Data rate of 50 to 19200 bits per second supported 1488 line drivers and 1489 line receivers with 12v supply meet the EIA RS232C standard for electrical interface Modem 3 ok 1 1 ay 2 Transmitted Data 3 Received Data 4 Request to Send 5 Clear to Send 6 Not Connected 20 Data Terminal Ready 7 Si
42. e activity later in RAM fetches a vector address from RAM and starts executing at the address vector When the exception processing is done the processor will continue what it was doing before the exception occurred Exceptions can be caused by interrupts instructions error conditions See also Section Two System Errors a 68000 reference for more detail GLUE Atari proprietary chip which ties together all system timing and control signals HALT state which the CPU is idle all bus lines are in the high impedence state only be ended with RESET input This is a bi directional pin on the CPU It is driven externally by the RESET circuit on power up or a reset button closure internally when double bus fault occurs double bus fault is an error during a sequence which is run to handle a previous error For example if a bus error occurs and during the exception processing for the bus error another bus error occurs then the CPU will assert HALT Mega Service Manual 9 1 Glossary HSYNC timing signal for the video display Determines when the horizontal scan is the screen and when it is blank retracing The synchronization approx every 63 microseconds also is encoded onto IPL1 2 as an interrupt to the CPU INTERRUPT a request by a device for the processor to stop what it is doing and perform processing for the device It is a type of exception Interrupts are maskable in
43. e provided in the Megas are analog RGB and monochrome The presence of monochrome monitor is detected by the MONOMON input when monochrome monitor is connected will low The possible displays are Monochrome single emitter follower amplifier driving the output of the Video Shifter RGB resistor network sums outputs for each color The three colors each have an emitter follower amplifier to drive output Monitor Inputs Hsync TTL level negative 3 3 k ohm Vsync TTL level negative 3 3 k ohm Monochrome digital 1 0V P P 75 ohm R G B analog O 1 0V P P 75 ohm Audio 1V P P ik ohm O Monitor NG 1 Audio Out 2 Composite Sync 3 General Purpose Output 4 Monochrome Detect 5 Audio In 6 Green 7 Red 8 Plus 12 Volt Pullup 9 Horizontal Sync FIG 8 MONITOR PORT Mega Service Manual 240 10 Blue 11 Monochrome 12 Vertical Sync 13 Ground Theory of Operation INPUT OUTPUT SUBSYSTEMS Musical Instrument Communication The Musical Instrument Digital Interface MIDI allows the integration of the Mega with music sysnthesizers sequencers drum boxes and other devices possessing MIDI interfaces High speed 31 25 Kilobaud asynchronous current loop serial communication of keyboard and program information is provided by two ports MIDI OUT and MIDI IN MIDI OUT also supports the optional MIDI THRU port MIDI specifies that data consist of
44. ead may be input by the operator If Return is pressed without entering a number the default is track 10 3 Interchangeability test Checks to see if diskettes from two disk drives each can be read by the other disk drive Disk exerciser more thorough disk test tests all sectors on the disk for an indefinite period of time 5 Copy Protect Tracks Tests tracks 80 82 which are used some software companies for copy protection Not all failures are cause for replacement because some manufacturers disk drives will not write to these tracks 6 Test speed The rotational speed of the drive is tested and displayed on the screen as the period of rotation The acceptable range 196 204 milliseconds highest lowest values measured are displayed test stops when any key is pressed 7 Install disks Specify how many and what type of disks to test If more than one test is selected from the main menu the floppy menu will not appear but the Quick Test will be selected automatically FLOPPY TEST ERROR CODES floppies connected the controller cannot read index pulses The cable may be improperly connected the drive has power or the drive is faulty FO Drive not selected Drive was installed but failed attempting restore seek to track O Check connection of cables power to drive Verify the light on the front of the drive goes on Listen for the sound of the head seeking the sl
45. efore next byte arrived RS232 SO Data not received 51 Data received is not what was sent S2 Data input framing error S3 Parity error 54 Data overrun Byte was not read from the before the next byte arrived S5 IRQ The is not generating interrupts for transmit receive S6 Transmitter error MFP 67 No interrupt from transmit error S8 interrupt from receive error S9 DTR RI These signals connected by the loopback connector Changing DTR does not cause change in RI SA DTR DCD Same as 59 for these signals 72 SB RTS CTS Same as 59 for these signals DMA DO Time out DMA did not take place or interrupt not detected Di DMA count error Not all bytes arrived Possible Memory Controller error D3 Controller not responding Mega Service Manual 3 18 Testing TIMING TO MFP timers failed T1 Vertical sync timing failed T2 Horizontal sync timing failed T3 Display Enable Interrupt failed De um Memory Controller video address counter failed eu 6290 T5 PSG Bus test PSG chip is causing bus error by staying the data bus too long T6 1772 Bus test 1772 chip is causing a bus error by staying on the data bus too long PRINTER AND JOYSTICK PORTS PO Printer port error P1 Busy printer port input failed JO Joystick port O failed 71 Joystick port 1 failed J2 Joystick keyboard controller timed out 73 Left button line fai
46. f the terminal and vice versa Connect pin 7 ground to pin 7 The terminal should be set up for 9600 bps 8 bits of data 1 stop bit no parity this is the default condition for the VT52 emulator Insert the Diagnostic Cartridge into the U U T and power on the unit If the Diagnostic Cartridge messages appear on the display of the terminal use the diagnostic to troubleshoot the computer If not the computer will have to be disassembled to troubleshoot Refer to Diagnostic Cartridge below for information on using the cartridge If no activity is seen on the RS232 port or display continue with 2 next page Mega Service Manual Testing 2 Disassemble the computer so that the printed circuit board is exposed see Section 4 Disassembly Power up the computer Using an oscilloscope verify the 8MHz clock to the 68000 CPU pin 15 Replace oscillator if necessary Then check pin 17 HALT of the 68000 CPU It should be TTL high If so go on to 3 below If not the CPU is halted The reasons may be 1 bad reset circuit 2 double bus error 3 bad CPU Check 1 by observing signal on input the two inverters on the HALT line Check 2 by observing pin 22 of the CPU BERR as the unit is powered It should be high always If there are logic low pulses some component is malfunctioning and Glue is generating the error Verify the clocks to Glue and Memory Controller and replace these components to verify them if so
47. gh a given logic operation Single or multiple word increments and decrements are provided for transfer to destination There are 16 possible logic operation rules associated with the merging of source and destination data In addition with the 16 word patterns ram and three 16 bit end mask registers the blit can also be used to perform operations such as area seed filling pattern filling brush line drawing text and graphic transformations etc For more information please refer to the user manual which included in the Developer Kit Mega Service Manual 2 6 Theory of Operation Real Time Clock with Battery Backup This device has counters for Time and Calendar built in Clock data expressed with BCD code The lower four address data lines used to program the device and access the clock through signal lines RTCCS RTCRD RTCWR which generated from a decoder RESET line is also provided to reset the chip when the system is reset The main clock supplied to the device is a 32 768 Khz oscillator which will be adjusted by trimmer condenser so that it will output through the CLKOUT line a standard clock signal of 16 384 Khz In addition 3V battery backup can be used to keep the clock running during power down For more detail please refer to the application manual from the manufacturer RICOH part number RP5C15 Mega Service Manual de Theory of Operation Video Interface The two types of interface ar
48. gnal Ground 21 Not Connected B Data Carrier Repeat 22 Ring Indicator 9 19 Not Connected 23 25 Not Connected FIG 12 RS232 PORT Mega Service Manual 2 12 Theory of Operation Disk Drive Interface The Mega computers have a built in floppy disk controller a Western Digital 1772 and logic for selecting up to two single double sided drives The Mega has one built in floppy disk drive provision for external disk drive The Western Digital WD1772 Controller services both drives Drive and side selection is done outputs the YM2149 PSG chip The CPU reads and writes to the 1772 through the DMA Controller The 1772 interrupts the CPU on the INTR line via the MFP interrupt controller The 1772 accepts high level commands such as seek format track write sector read sector etc and passes data to the DMA Controller see DMA controller under Main System above for details on DMA transfer The 1772 interrupts the CPU when the operation is complete The CPU is freed from much of the overhead of disk I 0 Floppy Disk Ww 3 Logic Ground 4 ndex Pulse 5 Drive 0 Select 6 Drive 1 Select 7 Logic Ground 11 Write Data 8 Motor On 12 Write Gate 9 Direction In 13 Track 00 10 Step 14 Write Protect FIG 13 EXTERNAL FLOPPY PORT Mega Service Manual 2445 Theory of Operation DMA Port Hard Disk Interface The hard disk drive interface is
49. ide the diskette should open If all this cccurs TRO pin 23 on the 1772 should go low If so check for an interrupt pin 28 of the 1772 If none replace the 1772 Else trace the interrupt to the verify that the responds be asserting INTR If the drive is not being selected light check the PSG chip Pin 20 should go low when drive is selected and pin 19 should go low when drive B is selected If not replace the PSG F1 F2 F3 errors of previous versions have been deleted The error message now says Error Writing or reading or formatting and displays a more specific error message e g F9 CRC error Mega Service Manual 3 13 Testing F4 Seek error Verify that the STEP and DIRC outputs from the 1772 are sent to the drive Probable failure in the 1772 but the drive is also suspect F5 Write protected Check the write protect tab on the diskette If OK verify that the WP input 1772 pin 25 is going low during the test if it is then the 1772 is defective if not the problem is with the disk drive F6 Read compare error Data read from the disk was not what was supposed to be written Check in the following order diskette disk drive 1772 and DMA Controller F DMA error Controller could not respond to a request for DMA Replace the IMA Controller If error persists check FDRQ while running the test It should normally be low and go high with each data byte transferre
50. ideo Display Memory Display memory is of main memory with the physical screen origin located at the top left corner of the Screen Display memory is configured as 1 or 4 high medium low resolution logical planes interwoven by 16 bit words into contiguous memory to form one 32 Kilobyte physical plane starting at a 256 byte half page boundary The starting address of display memory is placed in the Memory Controller s Video Base Address register by the Operating System or application The Memory Controller will load display information into the Video Shifter 16 bits at a time and the Video Shifter will decode this information to generate a serial display stream monochrome mode each bit represents 1 pixel on or off In color bits are combined from each plane to generate the correct level of red green and blue For example low resolution 4 planes 4 words are loaded into the Video Shifter for each word 16 pixels displayed on the screen The Video Shifter combines bit 0 from each word to form a four bit number 0 15 takes the color from the palette referenced by that number e g 0101 5 use color from palette register 5 and outputs those levels then takes bit 1 from each plane and outputs the color from the palette referenced by those four bits etc Mega Service Manual 2 9 Theory of Operation Glue Glue provides timing control to the Memory Controller video output and monitor RF output VSYN
51. ion is altered by write to another y Rod location I3 RAM addressing Wrong location is being addressed 14 MMU error No DTACK after RAM access I5 RAM sizing error Uppermost address fails LE z EXCEPTIONS may occur at any time E1 E5 not used E6 Autovector error IPLO is grounded or 68000 is bad 7 Spurious interrupt Bus error during exception processing Device interrupted but did not provide interrupt vector E8 Internal Exception generated by 68000 E9 Bad Instruction Fetch EA Address error Tried to read an instruction from an odd address or read or write word or long word at an odd address Usually this error is preceded by bus error or bad instruction fetch EB Bus error Generated internally by the 68000 or externally by Glue Usually caused by device not responding Displays the address of the device being accessed Mega Service Manual Sul Testing YY RAM RO Error in low memory first 2K possibly affecting program execution R1 Error in RAM chip R2 Address error Bad RAM chip or memory controller Address line not working R3 Address error at 64k boundary R4 Error during video RAM test Bad RAM chip KEYBOARD KO Stuck key Keyboard controller is not responding K2 Keyboard controller reports error MIDI MO Data not received Data received is not what was sent M2 Data input framing error M3 Parity error M4 Data overrun Byte was not read from the 6850 b
52. ld 2 Attach the 1 0 shield to the I O ports Place Main Board on top of Bottom Shield over insulator panel 3 Place the assembly in lower plastic case 4 Secure the I O shield to the bottom case with the 6 studs 5 Plug in power supply connector and position power supply with tabs in slots 6 Place assembly in lower plastic case 7 Fasten the power supply to the bottom case at both front corners with two screws This can be done with the power supply shield in place using a magnestized screwdriver to hold the screw or by removing the shield 8 Plug disk drive power and ribbon cables into drive cables go under shield and position drive over standoffs 9 Push the battery connector up from the opening located the left rear corner of the top shield 10 Align tabs on bottom shield with slots on top shield and fit top shield over main assembly Twist the tabs to lock in place 11 Place the top cover over the assembly 12 Turn over the assembly and replace the 9 screws The three longer screws go into the round holes to secure the disk drive A WORD OF CAUTION It is strongly recommended that the computer be retested once in plastic to make sure that the re assembly was done correctly and there are no shorts to Shield Mega Service Manual 4 3 Disassembly Assembly _ 0 u ee o SECTION FIVE SYMPTOM CHECKLIST This section gives a brief summary
53. led J4 Right button line failed FLOPPY DISK DRIVE FO Drive offline Not responding to restore seek track O F1 Format error Note former F2 F3 write and read errors are deleted The message now will say error writing or reading and display the specific error found Seek error F5 Write protected Data compare Data read not equal to data written F7 DMA error F8 DMA count error Memory Controller counter F9 error FA Record not found FB Lost data FC Side select error FD Drive not ready Timed out performing the command Mega Service Manual 3 19 Testing a i i SECTION FOUR DISASSEMBLY ASSEMBLY MEGA ST DISASSEMBLY Top Cover Removal 1 Remove keyboard connector from the side of the top cover 2 Turn unit upside down 3 Remove the 9 screws from the square holes These fasten the top case to the bottom If the printed circuit board is to be exposed or the disk drive is to be removed also remove the three screws from the round holes These hold the disk drive in place 4 Turn the unit upright While lifting the top cover up slightly from the back unplug the battery connector from underneat its left rear corner Now the cover can be removed easily Upper Shield Removal 1 Straighten the six twist tabs Note that there is one located under the disk d
54. lel port test writes to a latch on the test fixture and reads back data The joystick port test outputs data on the parallel port which is directed through the test fixture to the joystick ports The keyboard reads the joystick data in response to commands from the CPU cables connecting the joystick ports to the test fixture must not reversed or the printer and joystick tests will fail PRINTER JOYSTICK ERROR CODES PO Printer port error Data read from the printer port was not what was written Verify that the data lines on the PSG chip pins 6 13 are toggling when the test is run If not run the RS232 test the RI DTR and DCD DTR errors occur the chip is probably not being selected Check if the chip selects are being activated and the 2112 clock is present the PSG is selected and not outputting signals replace it If the data lines toggle verify continuity Also verify that J11 Joystick 0 pin 3 is pulled up Verify the test fixture is good by testing another computer it is OK replace the PSG P1 Busy input error The input to the is not being read or the STROBE output from the PSG is not functioning Joystick 0 pin 3 is not connected If the PO error also occurs see handling for that Otherwise look for a signal arriving pin 22 from 75 pin 11 no signal at Jb the test fixture may be bad Verify with another computer JO Joystick Port O The keyboard input is not func
55. m for event timing and used by the RS232 port for transmit and receive clocks Mega Service Manual 2 4 Theory of Operation AUDIO VIDEO SUBSYSTEM The video subsystem consists of the video display memory the Memory Controller Glue a graphics control chip Video Shifter a graphics processing unit BITBLiT and a discrete section to drive the video output audio subsystem consists of a Programmable Sound Generator chip with a transistor output amplifier Video Shifter There are 16 color palette registers in the shifter All 16 are may be used in low resolution 4 may be used in high resolution and only one is used in high resolution actually only bit O of register O is used for inverse normal video Each palette is programmed for 8 levels of intensity of red blue and green so there are 8 x 8 x 8 512 colors possible For a given pixel the color which is displayed is taken from the palette referred to by getting information from each logical plane see description of video display memory below The shifter will output the red green blue levels specified by that palette note there are three outputs for each color Each output is either on or off Thus the number of possible output levels is 2 to the 3rd power 8 three outputs are summed through resistor network to proportion the voltage level to give 8 equal steps In monochrome mode the color palettes are bypassed and there is separate output V
56. n received the operator connects the monochrome monitor changes the display to high resolution The display screen shows horizontal and vertical lines each 2 pixels in width The screen will reverse every two seconds When the operator sees the display is correct he unplugs the monochrome monitor and re connects the RGB monitor and the display should return to normal GRAPHICS CHIP BLiTTER This tests the ability of the BITBLiT to move blocks of memory around and perform logical operations on the data No patterns appear on the screen different error messages are possible G0 613 but the action for any error is the same replace the chip A faulty BLiTTER may cause a BUS ERROR REAL TIME CLOCK The test saves the current time and date and writes a new time waits one second and verifies that hours minutes seconds etc have 811 rolled over The is repeated for another date to verify all registers EXPANSION CONNECTOR This test for Mega models requires the expansion test fixture the top cover and shield must be removed to install the test fixture It tests the expansion interface in part by software and the remainder by LEDs The data and address busses and interrupt lines are tested in software The control lines from the CPU are tested with the LEDs Most of the LEDs will go off after the system is turned on and the menu appears on the screen Three LEDs will remain lit BR bus request BG bus grant and BG
57. n troubleshooting computer systems is assumed Knowledge of the 68000 processor may be helpful Economics will be an important consideration due to the low cost of the Mega ST computer line little time can be justified in troubleshooting down to the component level when it may be cheaper to exchange the entire sub assembly Many of the more expensive and critical components maybe socketed making verification and replacement faster TEST EQUIPMENT The following equipment will be needed to test the Mega ST computer Atari SC1224 RGB Monitor or similar Atari SM124 Monochrome Monitor or similar Atari SF354 or SF314 Floppy Disk Drive Mega ST Port Test Fixture Mega Expansion Test Fixture Mega only RS232 Loop Back Connector MIDI Loop Back Cable Mega ST Test Diagnostic Cartridge Revision 4 0 Diskettes 2 RS232 terminal or Mega in VT52 emulator mode k x k x In addition the following items will be necessary to troubleshoot and repair failed computers Oscilloscope 100MHz Reccommended Digital Multimeter 1 FS or better Small Hand Tool amp Soldering Iron Spare Parts x Mega Service Manual 3 1 Testing TEST CONFIGURATION With the power switch off install the Diagnostic Cartridge IMPORTANT if the cartridge does not have the plastic enclosure BE SURE THE CARTRIDGE IS INSTALLED WITH THE CHIPS FACING DOWN Connect cables from test fixture into the hard disk port parallel
58. of common problems and their most probable causes For more detail refer to the section on troubleshooting in this document or the Diagnostic Cartridge Troubleshooting Guide Symptom Probable Cause DISPLAY PROBLEMS Black screen No power check LED bad Glue chip bad Video Shifter See TESTING section Troubleshooting a Dead Unit White screen Video Shifter Glue Memory Controller DMA Controller 68000 Use diagnostic cartridge with terminal connected via RS232 port Dots bars RAM Memory Controller Video Shifter Use on screen diagnostic cartridge One color missing video summer buffer Video Shifter Check signals with oscilloscope Scrambled screen Glue Memory Controller Use the diagnostic cartridge T V output bad Modulator phase locked loop Trace the signal with your oscilloscope DISK DRIVE PROBLEMS Disk won t boot Power supply FDC 1772 DMA Controller PSG chip disk drive See if select light goes on if not check PSG outputs Listen for motor spinning If not check the power supply Swap disk drive or try an external drive If not working check DMA Controller and 1772 with the diagnostic cart Disk won t format FDC 1772 DMA Controller disk drive System crash after Diskette disk drive FDC 1772 DMA Or loading files Memory Controller Swap diskette retry Use the diagnostics to check FDC 1772 DMA Controller Memory Controller or replace disk drive Mega Service Manual
59. okyo 105 PCB ik ox SIZE TOLERANCES UNDER 30 a 01 59 Dati DRAWING NO REV SCALE NONE 1 2 4 1 851 8 NOTES UNLESS OTHERWISE SPECIFIED APPLICATION REVISIONE DESCRIPTION DATE APPROVED SEE SHEET 1 LEL birit ISIAIJ 2 DA S ees e COMPONENT SIDE _ Soa 59568 00000000 lejelajejajejete 990625050 06 9950000 TOLERANCES all 1 ATARI JAPAN CORPORATION UNDER 30 a oranoman Kiyoshi Building 30 THRU 300 ATARI 4 3 10 Minalo ku Tokyo 105 4 pare PCB MEGA SIZE DRAWING NO REV Zag E X C APPROVED DAT NOTES UNLESS OTHERWISE SPECIFIED D i NONE Ri wir Al el SEE SHEET 1__ ur 33 e 2 4 E gt CER e B 3 1 SOLDER SIDE _ 4 1 1 0 1 lij 000 die s li i 7 F Nant 1 amd ER SEEN Eni 3 1 PONI og ja iz 1 E 3 T 55 ET 82 z nI
60. pin 32 There should be an interrupt every 126 microseconds 2 display lines from Display Enable pin 20 If additional interrupts occur locate the source the inputs at pins 22 29 should all be high If no external to the MFP source for the interrupts is found replace the MFP NOTE if the keyboard is not connected the input to the 6850 will be low causing continual interrupts KEYBOARD TEST Two types of test are run The keyboard self test is done first if this passes screen is displayed representing the keyboard If multiple tests have been selected only the self test is run The operator presses keys and observes that the corresponding character on the screen changes reverses background color The key will also be displayed in the lower half of the screen mouse buttons and four directions are also shown the screen Connect the mouse and move any direction and the arrow will flicker Any key clicks while the mouse is moving indicates a short The self test checks communication between the CPU and the keyboard microcomputer and checks RAM and ROM in the keyboard microcomputer and scans the keyboard for stuck keys Mega Service Manual 3 8 Testing KEYBOARD ERROR CODES KO Stuck key key closure was detected while the keyboard self test was executing Ki Keyboard not responding A command was sent to the keyboard processor and no status was returned within the allowed time The keyboar
61. port and joystick mouse ports The joystick cables should be plugged in so that if the fixture ports were directly facing the computer ports the cables would not be crossed Plug the RS232 and MIDI loopback connectors into their ports Plug the color monitor into the monitor output a monochrome can be used instead Power on the unit Some tests will be run automatically in a few seconds the menu screen should appear If the screen appears skip down to Mega ST Diagnostic Cartridge below If not read next section Troubleshooting a Dead Unit If the unit is being used as a terminal for a host computer it should be disconnected from the host before using the diagnostic otherwise the host may think someone is logging on and will send messages which will act like keystrokes input to the diagnostic TROUBLESHOOTING A DEAD UNIT In the event that the system is correctly configured powered and no display appears this is the procedure to use for determining the problem This assumes elementary steps have been taken such as checking the LED the forward left corner of the computer to verify the unit is powered and making sure the monitor is working 1 Connect a dumb terminal to the 8232 port of the unit under test U U T You can use an Mega ST running the VT52 terminal emulator program see the owner s manual for setting up VT52 cable should connect pin 2 serial out of the U U T to pin 3 serial in o
62. provided through the DMA controller the hard disk controller is off board and is board and is sent commands via an SCSI like Small Computer System Interface command parameter block Data is transferred via DMA Writing to the external controller causes HDCS Hard Disk Chip Select to go low and CAl to go high DMA transfers controlled by the external device When data is available or the device is ready to accept data HDRQ will be driven high by the external controller The DMA chip must respond within 250 nanoseconds with ACK low to acknowledge that data is on the bus or has been read from the bus The Memory Controller feeds data to accepts data from the DMA Controller Transfers can take place at up to 1 Mbyte second Hard Disk 6 Q cm Data 1 mow 37 ME 15 1 55 3 Data 2 d 4 Data 3 5 Data 4 6 Data 5 13 Ground 7 Data 6 14 Acknowledge 8 Data 7 15 Ground 9 Chip Select 16 1 10 Interrupt Request 17 Ground 11 Ground 18 Read Write 12 Reset 19 Data Request FIG 14 EXTERNAL HARD DISK PORT Mega Service Manual 2 14 Theory of Operation SYSTEM STARTUP After a RESET power up or reset button the 68000 will start executing at the address pointed to by locations 4 7 which is ROM Glue maps 8 bytes of ROM at 0000 7 into the addresses 0 7 Location 000004 points to the start of the operating system code in ROM 000
63. r to or from the DMA chip the DMA Controller will assert ACK to let the peripheral know the byte is available or has been read DMA Controller can store up to 32 bytes in internal memory This is necessary if the 68000 is using the bus and the DMA must wait to transfer to memory Data may be input from the port without being lost or slowing down the transfer speed MFP Interrupt Control The 68901 MFP handles up to 16 interrupts Currently all but are used Each interrupt can be masked off or disabled by programming the 8 inputs are also directly readable by the CPU When the MFP receives an interrupt input or generates an interrupt internally if the interrupt is enabled MFPINT will be driven low When the CPU is ready to respond it signals interrupt acknowledge FCO 2 high and VMA low and Glue will assert IACK interrupt acknowledge will assert DTACK and put a vector number on the data bus which the CPU will read and use to calculate the address of the interrupt routine The interrupts controlled by the monochrome monitor detect MONOMON RS232 including CTS DCD RI disk FDINT and HDINT parallel port BUSY display enable DE equals start of display line 6850 IRQs for keyboard and MIDI data and MFP timers Not all I O operations use interrupts The CPU can also poll the MFP while waiting for an operation to complete The MFP has four timers used by the Operating Syste
64. rive 2 Lift the shield up from the back gentlely so that it will be free from anythings in the rear 3 Push the disk drive up while lifting up the front of top shield out of the bottom cover and pull forward Disk Drive Removal 1 Lift the disk drive slightly and unplug the power harness connector and the ribbon cable Power Supply Removal 1 Remove the 2 screws at front corners of power supply 2 Unplug the wire harness connector in the right front corner of the power supply 3 Lift the power supply up out of the main assembly Mega Service Manual 4 1 Disassembly Assembly Removal of main assembly from bottom case 1 If power supply has not already been removed then follow the power supply removal section to remove it 2 Remove the six studs which secure the 1 0 shield to the bottom case 3 Lift the assembly up from the front and pull forward Removal of Shield From Printed Circuit Board 1 Straighten six twist tabs It may be necessary to pull the twist tabs away from the board slightly 2 Remove the I O shield in the back Note Now that the major components are exposed this is a convenient configuration for troubleshooting The keyboard and disk drive may be re connected and placed off to the side if those components are needed 3 Lift the printed circuit assembly away from bottom shield Mega Service Manual 4 2 Disassembly Assembly Mega ST RE ASSEMBLY 1 Place insulation panel on bottom shie
65. s 11 and IPL2 to the 68000 These levels correspond to no interrupts MFP interrupts VSYNC interrupt HSYNC interrupt Signal and Bus arbitration Glue decodes addresses to generate chip selects to the 6850s MFP DMA Controller Programmable Sound Generator Memory Controller and ROMs receives signals from the MFP DMA Memory Controller to synchronize data transfer It arbitrates the bus during DMA transfers to prevent CPU and DMA devices from interfering with each other see DMA below Illegal condition detection Glue asserts Bus Error BERR if certain conditions are violated such as writing to ROM writing byte sized data to a word sized register writing to system memory when the processor is in user mode Also occurs if device does not respond within the required time limit For example the CPU tries to read from memory and the Memory Controller does not assert DTACK Mega Service Manual 2 2 Theory of Operation Main Memory Main memory consists of 192 kbytes of ROM and one two banks 2 Mega byte each of dynamic RAM addition the cartridge slot allows access to 128 Kbytes of ROM All memory is directly addressable The components of the memory system are ROM RAM RAM buffers Memory Controller Glue Operating System resides mostly in ROM with optional segments loaded from disk into RAM RAM is organized as 16 bit words and may be accessed 16 bits at time or 8 bits at time
66. software meaning they will be ignored if they do not meet the current priority level of the CPU There are three priorities the highest are MFP interrupts then VSYNC interrupts and lowest are HSYNC interrupts Interrupts are signaled to the CPU the Interrupt Priority Level inputs IPLO 2 See Theory of Operation Main System MFP and Glue MEMORY CONTROLLER Atari proprietary chip which handles all RAM accesses See Theory of Operation Main System and Video Subsystem for details MIDI Musical Instrument Digital Interface An electrical standard by which electronic instruments communicate Also the logical system for such communication the 1040ST consists of a 6850 communications chip driver and receiver chips 74LS04 741505 and PC 900 photocoupler and interrupt channel MFP Multi function Peripheral also 68901 Interrupt control timers USART for RS232 communication See Theory Operation Main System MODULATOR device which combines video signals R G B VSYNC and HSYNC into composite signal for monitors requiring this type input and also modulates this signal combined with audio onto an RF carrier for output to a television PHASE LOCKED LOOP circuit which locks the horizontal sync signal onto the color burst reference frequency for accurate color on the T V Without this circuit colors on the T V become unstable flickering or shifting about on the screen The PPL may be
67. speed 250 to 500 Kilobits sec and high speed up to 8 Megabits sec 8bit device controllers The floppy disks transfer data via low speed DMA and the hard disk other devices on the hard disk port transfer at high speed For DMA to take place the Memory Controller is given the address of where to take data from or put data in RAM the Controller is set up which channel high speed or low speed and how many bytes and the peripheral is given command to send or receive data The entire block of data the size must be given to the Controller the peripheral before the operation starts is then transferred to or from memory without intervention by the CPU Mega Service Manual 253 Theory of Operation For example a transfer of sector from the floppy to memory the floppy controller will signal the DMA Controller that a byte is ready by asserting FDRQ the DMA chip will read the byte and signal Glue Glue will signal the Memory Controller and the Memory Controller will read the byte from the DMA Controller and place it in the address which was set up previously The DMA Controller will then wait for the next byte from the floppy controller and the process will repeat until the specified number of bytes has been transferred Transfers from memory to floppy similar The floppy initiates every transfer by requesting data on FDRQ At high speed hard disk port there is difference as a byte is ready to transfe
68. terrupts Data is transmitted at 300 600 1200 19200 bps Data transmission is performed by the and the 1488 and 1489 driver and receiver chips Interrupts are a function of the Control lines are output by the PSG chip and input on the MFP Note that this test does not thoroughly test the drive capability the port as the RS232 device may require voltage swings of 12 volts amp there are no load resisters in the serial port diagnostic connector If the test passes but the unit fails in use it is likely that the 1488 or 1489 chips are bad RS232 ERROR CODES Data transmission error S0 Data not received Check signal path pin 8 to 76 pin 2 via 1488 to 76 pin 3 to 9 via 1499 S1 Data mismatch Data read was not what was sent Check integrity of the signal May be bad driver receiver or S2 Input frame error Incorrect time between start and stop bits Probable MFP failure S3 Input parity error Input data had incorrect parity Probable MFP failure S4 Input data overrun byte was received before the CPU read the previous byte failure or less likely Glue failure S5 No IRQ CPU did not detect an interrupt by the MFP MFP or Glue failure S6 Transmit error MFP transmitter failed S7 Transmit error interrupt An error condition was created intentionally to cause an interrupt and MFP didn t respond S8 Receive error interrupt error condition was
69. ting a signal but the picture is unreadable there is probably a problem with screen RAM The cartridge should be used to diagnose this problem with the RS232 terminal as a display device Mega Service Manual 3 3 Testing MEGA ST DIAGNOSTIC CARTRIDGE The diagnostic cartridge is used to detect and isolate component failures in the computers 520 1040 and Mega There are several revisions this document refers to revision 4 0 Users of earlier versions should refer to the appropriate Troubleshooting Guide This section gives a brief guide to use with a description of each test error codes or pass fail criteria and recommendations on repair Power up The diagnostic program performs several tests on power up In particular the message Testing Glue timing Video will appear the screen will appear scrambled for a few seconds before the menu is printed The screen will turn red dark background in monochrome if an error occurs in the initial testing with a message indicating the failure The lowest 2 Kbytes of RAM is tested on power up if a location fails the error will be printed to the RS232 device It is assumed that if RAM is failing the screen may not be readable and program execution will fail because there is no stack or system variables The program will continue to test RAM and print errors but no Screen will be displayed the screen may turn red Repair RAM If the keyboard fails it will be inactivated
70. tion exception if attempted See also SUPERVISOR MODE VSYNC signal used for vertical synchronization CRT display device Occurs at 70 Hz monochrome or 50 or 60 Hz color YM2149 see PSG Mega Service Manual 9 3 Glossary
71. tioning If the Busy input error occurs that first Otherwise replace the keyboard If error persists check continuity from J11 pins 1 2 3 8 to 712 pins 12 10 9 8 respectively Ji Joystick Port 1 The keyboard input is not functioning If the Busy input error occurs fix that first Otherwise replace the keyboard If error persists check continuity from 1 pins 1 2 3 4 to 712 pins 7 5 4 3 respectively J2 Joystick time out Joystick inputs were simulated by outputting data the printer port and routing it via the test fixture to the joystick ports Joystick inputs are detected by the keyboard and sent to the CPU via the 6850 This error can be caused by printer port failure code keyboard failure keyboard CPU communication line or faulty test fixture If the power up keyboard test passes this eliminates any problem with keyboard CPU communication Mega Service Manual 3 15 Testing J3 Left button input If Pl error occurs fix that first Otherwise replace the keyboard the 520ST also check continuity from J10 pin 6 to J12 pin 11 J4 Right button input If P1 error occurs fix that first Otherwise replace the keyboard On the 520ST also check continuity from J10 pin 6 to J12 pin 6 HIGH RESOLUTION MONITOR If this test is selected while color monitor is connected a message is displayed to connect the monochrome monitor The CPU waits for an interrupt from the MONOMON input to the and whe
72. uld not be useful Usage of the cartridge is covered in the troubleshooting guide In general the user would run all the tests look up errors in the troubleshooting guide and take the action recommended Although a thorough understanding of the system may be necessary solving some problems most cases following the flowchart reading the documentation on the diagnostic cartridge where necessary and swapping out the indicated components will result in repair of the problem Replacement Procedures Where replacement is indicated replace the component if more than one is indicated replace one at a time with known good part If other components are later replaced verify whether the first part is good by replacing in the system once the system has been repaired Handling of Integrated Circuits Extreme care should be taken when handling the integrated circuit chips They are very sensitive to static electricity and can easily be damaged by careless handling Keep chips in their plastic carriers or on conductive foam when not in use Mega Service Manual 6 1 Diagnostic Flowcharts START CONNECT TERMINAL No 2 YES TO RS 232 PORT IS DISPLAY CYCLE POWER READABLE YES NO NO DISPLAY ON TERMINAL REPLACE PARTS PER RUN ALL TESTS DIAGNOSTIC ERROR YES REPLACE PARTS PER CYCLE POWER DIAGNOSTIC GUIDE DIAGNOSTIC GUIDE YES MEGA ST DIAGNOSTIIC FLOW CHART Meg
73. verifies the Video Shifter Seven color bands are displayed red green blue cyan magenta yellow and white Each band consists of 8 levels of intensity All 16 color palettes are represented each palette is vertical strip across the screen strips should not be discernable but each color should be a straight line across the screen Because of the tight timing involved keystroke interrupts will cause the display to jitter The operator should see that there are no gaps or missing scan lines in the display If lines are missing check the three outputs on the Video Shifter for that color and verify the values of the resistors on the output Too low a brightness setting on the monitor will cause the monitor not to distinguish between fine levels making it appear there are only four levels being output The Video Shifter has three outputs for red RO R1 R2 green GO G1 G2 and blue BO B1 B2 Each of these triples is summed together by resistor network to give eight levels of intensity for each color depending which of the outputs on The values of the resistors give different weight to each out put The value of the resistor at RO is twice that of R1 which is twice that of R2 This allows us to get 8 equal steps on the summed outputs For example RO R1 and R2 off 1 8 RO off R1 and R2 on 7 8 This signal then passes through a transistor amplifier and from there to the video monitor connector NOTE

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