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SERVICE MANUAL
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1. Blue Back Yes LED indicator Power on Standby Blue Red Connectors Rear RF Input Antenna Air Cable 2in1 Antenna Scart CVBS in amp out RGB S VIDEO No CINCH video in outAV1 1 0 CINCH audio in out No volumpe control 1 1 on Audioout can be jack 3 5mm S video in No Component Video Input YCrCb YPrPb 1 Component Audio Input YCrCb YPrPb 1 VGA in Audio L R in Jack audio in VGA dia 3 5mm for audio 3 5mm HDMI 2 DVI No Audio input for DVI No CINCH subwoofer out Coaxial out No S PDIF Headphone output connector mm 1 RS232 Y N VGA or DB9 port No Card Readers No USB slot No 1 1 2 0 2 DVB CI common interface No External power converter input No Connectors Side HDMI 1 AV IN 1 AV OUT NO Component Video Input YCrCb YPrPb 1 Component Audio Input YCrCb YPrPb Headphone output connector dia mm 1 CINCH subwoofer out Coaxial out NO S PDIF USB slot No 1 1 2 1 DVB CI common interface NO DLNA NO RF Input Antenna Air Cable 2in1 Antenna VGA in Audio L R in Jack audio in VGA dia 3 5mm for audio in 3 5mm Technical Specification UI design font pixel 2D 3D graphic SOD Standard engine RC Model Commend RCU RC system RGB Standard RC of keys Size WxHxD with stand in mm Size W xH x D without stand in mm Package Size W xH x D without stand in mm Carton Tr
2. LVDS CONNECTOR 1 DIP 2 SMT OPTIONAL HI CONNECTOR VCC Panel o d CA6 n 03 CN2 Power for panel 1206 5 45V Normal O0 f TTT OR 1206 5 VPANEL_IN VCC Panel U8 _ 9435 SOP8 7 412V NORMAL 0 1uF 0402 1 cunt pos C82 100 0402 5 1uH NC m 29 1 0402 5 100uF 16V 1uF 0402 16 2 pene lucc voc L t 51 vec Fg 2 7 GND GND 3 3 Normal 9 5 GND Hp B2_RXE3 1i pe fon 12 B3 RXE3 B4_RXEC 13 14 B5_RXEC B6 RXE2 15 ACKPACKM 715 B7_RXE2 GO DR I 17 AM Gi 1 R73 G2 RXEO ig MP AIM 20 G3 RXEO 10K 0402 5 NC 21 AOM 25 SG SYNC 123 24 8 SEL 1 25 26 H DCR IN 25 BWMDCRO 26 DCR OUT 1 25 Sien oT R70 72 G6 RXO3 31 32 c o RO_RXOC 33 34 R1 RXOC R2 RXO2 35 36 R3 RXO2 37 2 38 R5 R6 39 BIM 40 7 MESS M SDA 43 44 M_SCL _ SDA SCL UNER_SCL R481 t TOOR DAO2 85 SDA SCL nae NCAODR 04025v5 NC CON22X2 2 0 74 DCR OUT OR 0X02 595 NC DCR IN
3. m GUN ans homo cL 2 DEE VE 3 pone REN uou Uu Pa ST OE Hou mae ap mm lagen iid n HDMILAXIP AKIN IL IRE na t guum UE REA E8 Hm AXON MTP AON HOM CLR Ou CLAN shed i kee i i 7 i HOM E BUWHREIP ES EE home ES 17 HOMI CIRP p EE HOW ERN mur een MHL CD SENSE Homan ar f HDutARC RH REP DEEP kue mon Leen STE opregen rn Rt t EE egen Homasv R sci uo SBA ee 1 00 ee So Blu SDA loune on Eent omy fiousor 23 Eds t ai sch bt BH 47K AVDDSV CD HM CROMER ON auch MOMPSV Standby cO BATSsCSOT2S NG AVDDSVMHL MHL CD SENSE m 5 Normal QOL CABL
4. Notes for use 1 Numbers and data in entries are representative design values and are not guaranteed values of the items 2 Although we are confident in recommending the sample application circuits carefully check their characteristics further when using them When modifying externally attached component constants before use determine them so that they have sufficient margins by taking into account variations in externally attached components and the Rohm LSI not only for static characteristics but also including transient characteristics 3 Absolute maximum ratings If applied voltage operating temperature range or other absolute maximum ratings are exceeded the LSI may be damaged Do not apply voltages or temperatures that exceed the absolute maximum ratings If you think of a case in which absolute maximum ratings are exceeded enforce fuses or other physical safety measures and investigate how not to apply the conditions under which absolute maximum ratings are exceeded to the LSI www rohm com 2010 ROHM Co Ltd All rights reserved 6 8 801905 REVI PDF pdfFactory Pro www fineprint com cn BH3541F BH3544F BH3547F BH3548F Technical Note 4 GND potential Make the GND pin voltage such that it is the lowest voltage even when operating below it Actually confirm that the voltage of each pin does not become a lower voltage than the GND pin including transient phenome
5. Continuous Drain Current 25 lo 6 3 Pulsed Drain Current lom 30 A JEE Maximum Power Dissipation 25 Operating Junction Temperature Junction to Case Thermal Resistance Junction to Ambient Thermal Resistance The device mounted on 1in2 FR4 board with 2 oz copper Motsuki Electric July 2008 Ver3 1 3 ME4953 Motsuki Electric ME4953 Dual P Channel 30V D S MOSFET GENERAL DESCRIPTION FEATURES The ME4953 is the Dua P Channel logic enhancement mode power e lt 50mQ Ves 10V field effect transistors are produced using high cell density DMOS Ros on lt 80MN Vcs 4 5V trench technology This high density process is especially tailored to Super high density cell design for extremely low minimize on state resistance These devices are particularly suited Exceptional on resistance and maximum DC current for low voltage application such as cellular phone and notebook capability computer power management and low in line power loss are needed APPLICATIONS in a very small outline surface mount package Power Management in Note book Portable Equipment Battery Powered System DC DC Converter Load Switch DSC LCD Display inverter CONFIGURATION 01 D2 SOP 8 Top View 2 SS 511 S D1 ke G1 7 D1 G1e G2o S23 602
6. 100R 0402 5 NC BRLADJ lt lt 75 CN85 conos 2 3D SOCKET NC 109 8168 50 SYNC 3 O 5V Normal D347 NC PANEL PANEL ON OFF i m R2 3964 SOT 23 4 7 0402 5 Net to other R7 RXOO R6_RXOO 5_ 1 H3 RXO2 R2 2 G6 R7 RXOO R6_RXOO R5_RXO1 R4_RXO1 R3_RXO2 R2_RXO2 G7 RXO3 G6 RXO3 0 1uR p402 16V NC G2_RXE0 G1 RXE1 GO_RXE1 B7 RXE2 B6_RXE2 B5_RXEC 4_ B3 B2_RXE3 R1 RXOC RO_RXOC G3 RXEO G2 RXEO G1_RXE1 GO_RXE1 B7_RXE2 B6_RXE2 B5 RXEC B4 RXEC B3 RXE3 B2 B5 RXEC B4 RXEC itle MSD3393 Document Number LVDS Interface lev 1 0 ate Saturday June 08 2013 Sheet 3 1 of R76 R77 10K 0402 5 pin _l C86 C87 209 220pF 0402 16V NC 758 0402 5 7 2 pF 0402 16V NC 10K 0402 5 Au Un 79 80 12K 04026 lt 12 0402 5 YPbPr PR lt YPbPr_PB lt YPbPr_Y Close te Mstar IC VIDEO OUT C102 45V Normal R78 0 1uF 0402 16V 470R 0402 5 gt R208 02 5 20K 0 C97 AVOUT V R15 10uF 0603 16V 12 0 02 5 lt OUT 402 596
7. Balance Mute Volume Balance Mute Sound presets Personal Music Film News Standard Personal Music Film News Standard Headphone volume control Separated Yes Linked linked Sound quality High Mid Low Reception and Decoding capability RF rangeATV 45MHz 866MHz RF rangeDTV VHF 177 213 MHZ UHF 473 803 MHZ Color System PAL SECAM NTSC PAL MN PAL SECAM NTSC DK I BG M Audio Standard B G H D K K I L L Stereo audio system Nicam MTS A2 PAL SECAM NTSC DK I BG M Nicam A2 Video standard NTSC 3 58 4 43 AV PAL NTSC 3 584 43 PAL 60 DTV SD support DVB T S C ATSC DVB T QAM DTV HD Support MPEG2 MPEG4 H 264 MHEG5 NO HD capability with YPbPr Yes 720p 10801 1080p 24 50 60Hz 480i p 576i p PC capability up to maximum format 32 1366X768Hz 60Hz HDMI capability AV PC Format Compatible video format if DVD USB DviX VCD SVCD JPEG AVI MPEG2 WMV HD SD Up to 1080P 24 50 60HZ JPEG MPEG2 MPEG4 H 264 DivX depending on license Compatible audio format if DVD USB MP3 WMA AAC MPEG MP3 WMA depending on license Playable Discs NO CD CD R RW CD ROM DVD R RW R RW Card reader format compatibility NO Macrovision Yes PVR Yes Network NO User convenience OSD Language English TBD OSD Positioning No OSD Transparency Adjust No OSD Timeout Adjust No Customer Brand name LOGO
8. Yes Technical Specification IB languages English ATV Program Numbers example 99 3AV 100 7AV input DTV Program Numbers 200 Program edit naming sorting skip swap Naming Skip Swap Auto Naming Auto Sorting No TV Guide DTV EPG EPG next Seven day Favorite program Yes Number of buttons on cabinet Power Vol Pr Menu Vol Pr Menu Source Power Main switch button yes No No CCD Closed Caption V CHIP No No Text Standard Top FLOF No Teletext Level 2 5 1 5 Yes Pages for teletext Yes Teletext character sets Yes DVB T teletext Yes Real clock From DTV Sleep timer 10 240 Min Timer Turn On Off Program Switch Parent Control Source and Channel lock Yes Input code forcertain channel Parent Control Child lock set the lock of Yes the keyboard only the RCU can control the TV Parent Control Kid pass preset the No ontime channel foreach day of the week Parent Control Channel lock For digital Yes transmissionand DVD program to filter some programms Calendar Games No No program auto switch off Yes Hotel mode Y N Yes DVD player No slot tray No Tuner FM yes No No software download RS232 CI USB OAD USB Factory reset Yes in factory menu reset the setting to shipment state Screen saver Yes Technical Specification
9. Connect a RC network between COMP and AGND to compensate the control loop 6 EN Enable pin Pull EN to logic high to enable the device Pull EN to logic low to disable the device If on off control in not needed connect EN to VIN and do not leave it open 7 55 Soft start pin 5 current charging current 8 NC No Connect Pin Pin 8 is not internally connected Connect this pin externally to LX and use it for better thermal performance Exposed pad LX Switching node LX is the drain ofthe internal PFET LX is used as the thermal pad ofthe power stage Rev 1 0 June 2011 www aosmd com Page 2 of 14 Leg E 21051 Block Diagram VIN UVLO 5V LDO amp POR Regulator Oscillator Absolute Maximum Ratings Exceeding the Absolute Maximum Ratings may damage the device Level Shifter FET Driver AGND PGND Recommended Operating Conditions The device is not guaranteed to operate beyond the Maximum Recommended Operating Conditions Parameter Rating Supply Voltage Vin LX to AGND LX to AGND 20 ns EN to AGND 0 7 V to Vy 0 3 V 5V to 22V 0 3 V to Vp 0 3 V FB SS COMP to AGND 0 3 V to 6 0 V BEE __ Junction Temperature T A 150 C Storage Temperature Tg 65 C to 150 C ESD Rating Note 1 Devices are inherently ESD sensitive handling precautions are required Human body model rating 1 5 2 in series with 100 pF Re
10. FOR ATV AV DEBUG SPDIF OUT CN42 RCA1 1800 2SPDIF Q 81 3 R82 100 9402 Es B Closed to IC a itle MSD3393 Document Number b Video Interface lev 1 0 4 of ate Saturday June 08 2013 Sheet 1 VGA Rin VGA Gin VGA Bin PHONEJACK STEREO 90D VGA 15 PI FAF 220p 0402 16V DDC SCL D lt UART_RX Se Se 5 220 0402 16 1008 0402 5 R90 100 0402 5 7 91 4 VGA HSYNC R93 10K 0402 5 10K 04D G VGA Bin VGA Gin VGA Rin Document Numbe E VGA Interface Sheet USB INTERFACE USB POWER SEET 5V_USBo 2 5 _ USB1_D 45V USBOO USB C92 91 2uF 060g 16V 0 1 2 0402 16 Note i AY SEVTUSB CN600 n T He SS Ja E PE 5 USBOO O5V USB Note 5 1RFH EH SEXES T Seen USB ESDP HAE BES 2pF ize Document Num E sB Interface Sheet de META mor ssbb BoP e mme mon SREP rouo we ano p ms mus A SRN BBE 80l Ape en AAVA 2 TW mom d du Howe soe f incom co NN Ee Hows BIIY Keesen HOM Doe So sned FE 3 Ri Du AON pope
11. G27 5102 4 SA 1 2 P Channel MOSFET P Channel MOSFET Absolute Maximum Ratings 25 Unless Otherwise Noted Parameter Symbol Limit Unit Drain Source Voltage Voss 30 V Gate Source Voltage Voss 20 V Continuous Drain 25 6 Current Tj 150 70 i 5 Pulsed Drain Current 30 Continuous Source Current Diode Conduction Is 1 7 4 aa 25 2 5 Maximum Power Dissipation Pp uu __Te 70 C 1 3 Operating Junction Temperature 55 to 150 T NN Storage Temperature Range Tstg 55 to 150 C Y sec 47 Thermal Resistance Junction to Ambient Reva CAV Steady State 75 Thermal Resistance Junction to Case Resc 45 CAV The device mounted on 1 2 board with Zoz copper Lis Matsuki Electric 4 MSD6306PUN SPI FLASH 32M bit HDMI input VGA input CVBS1 CVBS input MSD6306PUN T input L R2 AMP TDA3113 RF EAR OUTPUT USB input CONNECTOR LVDS CONNECTOR 5 EN25Q64 104HIP E d EN25Q64 Figure 1 CONNECTION DIAGRAMS CS 1 sl VCC DQ 2 7L NC WP 002 3 CLK VSS 4 5 DI DQ 8 LEAD SOP PDIP 8 VCC NC DQ3 6 CLK DI DQo 8 LEAD VDFN NC DQ3 1 CLK VOC E 2 DI CaO NCL 3 NC NC 4 NC NC CL 5 NC NC Cp NC 5 C 7 GND DO DQ1 1 8
12. of pop noise when changing this determine it after adequate checking Since the input impedance of the BH3541F is 180kQ and that of the BH3544F BH3547F BH3548F is 90kQ these are found by the expressions below although drift temperature characteristics and other considerations are necessary Layered ceramic capacitors are recommended C3 C5 1 2 x x180kOxfc BH3541F C3 C5 1 2 x BH3544 F BH3547F BH3548F 2 Bias capacitor C6 When VCC 5V 47 is recommended Since lowering the capacitance too much can cause worsening of electrical characteristics or the occurrence of pop noise when changing this determine it after checking this adequately 3 Mute pin pop noise countermeasures R2 C2 Since the BH3541F BH3544F BH3548F has an impedance of 190kQ against GND and the BH3547F has 200kQ it may be impossible to cancel mute mode if R2 is made too large 4 Output coupling capacitors C1 C7 These are determined by the lower cutoff frequency If RL is the output load resistance assuming a resistance RX is put in for output protection or current restriction these are found by the expression below C1 C7 21 2zt X RL R x x fc 5 Input gain adjustment resistances R5 BH3544F BH3547F Externally attached resistances R3 R5 make input gain adjustment possible The gain found by the expression below can be set Gvc 6 20log 90kO 90kKO R3 R5 dB When input gain is not accommodated these resistors have no use
13. 0 4 EVES 010 Silicon lab 12157 4711 512150 0280 U6 EI MSD6306PUN 475C M63061 1280 U7 CFEON EN25032B 471R N25323 0080 U1 WEIS 73015 4786 A30151 0080 012 TPA3113 4722 131130 0280 013 BH3544F E2 4740 B35440 0080 05 011 Al AS1117L 3 3 TR HF 47B6 A11170 03 p 5 prf U4 A1 AS1117L 3 3 ADJ 47B6 A11174 0300 IC U3 4c IK Bs BR MP1470GJ Z 476A M14700 0060 QA1 WS AP2181DWG 7 47C5 A21810 0050 IC Block Diagram 1 AOZ3015PI Lee 21051 Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ1051PI 40 C to 85 EPAD SO 8 Green Product AOS Green Products use reduced levels of Halogens and are also RoHS compliant Green Please visit www aosmd com web quality rohs_compliant jsp for additional information Pin Configuration Exposed Pad SO 8 Top View Pin Description Pin Number Pin Name Pin Function 1 PGND Power ground PGND needs to be electrically connected to AGND 2 VIN Supply voltage input When VIN rises above the UVLO threshold and EN is logic high the device starts up 3 AGND Analog ground AGND is the reference point for controller section AGND needs to be electrically connected to PGND 4 FB Feedback input The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND 5 COMP External loop compensation pin
14. 1 3904 R246 au Standby 100K hoourntev se R310 MUTE W savo 2 AMP MUTE E A R287 10K ke 3904 R299 AUOUTRI Die MSD3393 stor ize d Document Number Amplifier lev 10 Date Thursday June 20 2013 Breet of 1
15. 2 5 juriososiiev _ 100 04025 rm IER de hs 08 2055 C137 0 tuFIo402 16V mure Aue PU 1 040 Love T Steen E BUCCL PVCCL mn 57 2 2nFIOA0ISVING 47K 0402 5 FAULT PVCOL 220nF 0603 50V 22uH2 ANC cone disi ee 1 26 ii a une BSPL E Gelee Ss 4 25 DEET BE EEN KS SAL senElososisoRXE OMM i PH Lout Y 100 6 144 2201210402107 5 EET 4 d Jr oun vec 1 INO d 6 GAIN vum L WEDA we CA25 100urMeV_PH Rout 1 L 220 0603 50 San Am un sas 8 NM 5 i R Y 8 5 0 121 220 AV AUOUTRI C136 8 8 21 C153 lio GND R W Wo RIB Sne __ n En C154 R187 278040252 4 AGND BSNR E SaaS 152 3 de 4 a Levy T EE d o 1uF 0402 16V TETY OUTNR lt cong za SES cate Gas 8 R191 150155 10 19 t m4 2 ATuFAGV 47UFI16V Ries EL inm PLMIT PGND 22uH 2 7AINC 1 j 47 025 quFloso NS PES amp V7 RINN OUTPR 2 25 m 4 BINE 220nF 0603 50V dcc 16 220 0805 50 NC PVCCR VCC AMP s 15 x PBTL PVCCR CHL 9 5 z ICTPASI21D2 05 7 v PHONEJACK STEREO 180D 1 2 PH Lout R284 3 PH Rout onc 4 470 E E 184148 5 D4 De E MUTE EAR ab MMBT3906 1N4148 R286 10K 4
16. 201 100 0402 16 0 C166 1 Cer Er inF 0402 C170 om 6V inFi0402 16V inF 0402 16V AGC RC Filter amp I2C Se ae eene n Pei SHINER SCL L10 09 0603 5 22 C123 66 040 SapF o402 16V N L9 OR 0603 5 BPF IN IN Cizi R164 510R 0402 5 NC C126 125 20pF 040 20pF 0402 16 111 09 0603 5 C132 112 0R 0603 5 0402 16 GE R16 1008 0462855 T KIFAGC T TT 0402 16 0 02 5 IF AGC TUNER POWER Un ASM1117 3 3 1A 355 g SCLT F pam SDA T 10 04 16 10 0805 16 e MSD3393 ize Document Number Tuner Date Thursday June 20 2013 Bheet 412V NORMAL g TPA3110 Kee E AU AMP NORMAL 4 220H 2 7AINC R167 me A 150R 040
17. 8 080 STANDBY STANDBY Een E 100K 0402 5 R22 0402 16 R2 2 10K 0402 1 or 22 040 Si NA R25 A79RI0402 5 Vout 0 8V 1 R1 R2 NOTICE H Power on L Power off STANDBY Jy STANDBY If POWER BOARD IS 5stb ONLY PL NOT PATCH THESE GU If chip is 3393 The R2 Value is 10K 1 If chip is 6306 The R2 Value is 8 2K 1 1 5V 1 8V Power Normal 3 3V Power Test Point amp MARK 51117 3 3 3 3 Normal 3 3V Standby bor 29 2uF 0603 16V tuBUFIOBO Yo urjp402 1 Z 00R 0402 5 3 16 2uF Q603 16V iuF Q402 1 AADMA IE EA e ili AP DH HE Vout 1 25V R1 R2 R1 poH X ud X ud X ud If chip is 3393 The R1 Value is 220R 5 Vout 1 8V 5 If chip is 6306 The R1 Value 470R 5 Vout 1 5V MSD3393 Document Number lor System power 5 z Date Sunday July 14 2013 Bheet 1 3 IR amp KEYB Standby H Power on Green Led L Power off Red Led
18. D 3D Picture improvement LTI CTI LTI CTI BLE WLE Technical Specification Color process Gama correction Skin Follow main IC correction Colour preset Cool Neutral Warm Cool Neutral Warm Picture control Yes Bright Con Sharpness Color Tint Picture presets Normal Bright Soft Personal Normal Bright Soft Personal Picture freeze Yes Multi picture PIP AV POPAV NO Dynamic Backlight Control NO LED Backlight D LED Deinterlacer No linerar motion 3D motion adaptive adaptive motioncompensative Film mode reverse 3 2 2 2 pull down Yes Yes Full HD support 1080P Yes Single scan Dual scan 120HZ Single scan Zoom type 4 3 format YES Zoom type 14 9 Zoom NO Zoom type 16 9 Zoom YES Zoom type 16 9 Zoom up down YES Zoom type Cinerama YES Zoom type 16 9 Format YES Zoom type Auto by SCART Pin8 and YES WSS Picture Auto adjustment PC mode YES 3D Panel Type PR SG NO 3D Mode NO 3D To 2D Y N NO 2D To 3D Y N NO Left Right Swap For PR Panel NO Sound Sound type Mono AV stereo Stereo stereo Music Power Watt RMS Power Watt 32 2X6W Tone control Bass amp Treble Graphic Bass amp Treble Equalizer Special sound effect AVL WIDE AVL Pseudo Suround system Dolby VD SRS BBE Built in Surround Technical Specification Sound control Volume
19. E DET ms o vout MHL Later NE SERB BERAS ir HDMI3 HDMI1 MSD3393 HDMI Interface ker eem ze Es Silicon TUNER es Fee R153 100R 0402 5 NC ATnFIO40Z TSV NC tuF 0402 16V NC TU 3 3V_TU R205 AGND 3 3R 0402 1 AGND a 2pF o402 16V NC CON43RCA1 6 1 016 H a 3906 SOT 231 8V TU 3 C100 120pF 0402 80V NC 2 HO i AGND pis 2 2uF 0402 16V 9 45888 lt 1 2nF 0402 16V g 2 C174 22 ERE 2 8 1 g 1 8 _TU C101 AGND 2701 0609 5 270nH 0603 5 120pF 0402 50V 47pF 0402 16V 124 C175 tsopE o402 8y 23 p 13 R203 1008 0402 5 _IF IN C17 C173 100 40 SS 16 157 R158 I 08 0402 592 08 0402 5 0 0402 5 122 123 C176 180 2 24 pE qy 12 R204 1008 0402 5 4 270nH 0402 5 SM 1806H 0603 5 129 27 SE RF SHIELD pur Si2158 C183 10 3 3V_TU 48V 180pF 0402 16V GER 3 3 71 asta EX 28 588 a REND v 44 ceno 9 8 8 9 6 o o ow 43V TU 1 8V_TU Si R20
20. FAULT item and press OK button to reset the EEPROM TV set will restart when it is finish Update software by USB Copy the new software name by MERGE bin to the root directory of USB drive Plug the drive to the USB2 socket if there are two USB Socket make sure you use the socket 2 Enter factory select Software Update USB item and press OK button to begin update TV set will restart when finish Note you need to restart the TV set again by AC power We suggest you need to do INIT EEPROM and Factory reset after software update Service Flow Chart Check SVSTB on CN2 Press the ON OFF on keyboard amp N Y remote control led turns green N power supply board N Upgrade the Check the 5V 12V N Y software on power supply board Change the FLASH U100 Y N Service Flow Chart Check if the Volume has set to 0 or if the it is mute Check the audio input line amp the audio input circuit Check the voltage of Mute pin beside the amplifier IC It should not be 0V ALS 901105 21482 Ap 1290000 113A mdu juoumo oq 290 sey y j1 nuaw amprd ut 20100 241 10940 UEU Service Flow Chart Check the LVDS line if it is connected N Y Safely connect the Make sure the LVDS power is correct LVDS line 5V for 24 12V for 32 OK N Y Correct the PE Change the Flash U100 power OK Chane main IC 17101
21. FAULT OUTNL SD SC Detect E Control Ramp Biases and Startup Protection Generator References Logic PLIMIT PLIMIT Reference UVLO OVLO BSNR AVCC lt Regulator GVDD OUTNR RINN PGND Gain Control RINP BSPR OUTPR PBTL PBTL Select OUTPR FB AGND PGND 6 Submit Documentation Feedback Copyright 2009 Texas Instruments Incorporated Product Folder Link s TPA3113D2 7 BH3544F E2 BH3541F BH3544F BH3547F BH3548F Technical Note Block diagram vcc OUT2 BIAS IN2 8 7 6 5 BIAS 90k 698 TSD gt Go 688 MUTE E OUT MUTE IN1 GND are BH3544F BH3547F BH3548F values Fig 13 Measurement circuit are BH3544F BH3547F BH3548F values Fig 14 wwwrohm com 2010 ROHM Co Ltd All rights reserved 4 8 DIU DS REN PDF pdfFactory Pro www fineprint com cn BH3541F BH3544F BH3547F BH3548F Technical Note Application circuit 1 VMUTE AAA R2 100k Active R3 L Mute are BH3544F BH3547F BH3548F values G Description of external components 1 Input coupling capacitors C3 C5 These are determined according to the lower cutoff frequency fc Moreover since lowering the capacitance can cause the occurrence
22. OK Change the Upgrade the N Q3 or U11 software N N Y Change the software mainboard Connetor 5V Standby Power option 3A Inverter controller 1 BL ON OFF 2 BL ADJUST E FB1 FB2 EZ 28 0402 5 0 lt AOZ3015PISOPS 6 1 0 1 ER en Ri K 0402 5 7 7 7 12 PWR LA 3 R3 Y27K 0402 5 RC Bee 7 LB MUTE EAR 48V Standby 5 Normal 45V Normal OR 1206 59 1206 5 H SINC lii 4 51 0402 1 4 1 Cj 7 10 16 0605 5 1 0402 16 16 0805 0 1uF 0402 16VINC O 1uF 470UF 16V EC3 5 CON14 PIN 2 5MM 9 1K 0402 1 C10 BRI ADJ 402 16 12 PWRO EE si NC Voutz0 8V 1 R1 R2 Power Switch 1 15V Core Power Standby controller 45V Standby b 0 1 0402 16 412V PWR 5 Standby Di 0 5V_Normal Di D2 12V NORMAL D2 FB9 FB8 9 bR 1206 596 1206 5 m 6 KICK 33 3 Standby 20R 0402 5 DIS 4uF 0402 16V C11 0 1uF 0402 16V NC STANDBY yy STANDBY R17 10 0402 5 7 0402 5 R18 1OuF 16VIO80 4 7 0402 1 C18 cis C 4 cis c 10uF 16V 0805 40uF 16V 0805 1 1
23. SERVICE MANUAL 6M61E CHASSIS 111111 1000000 R gt Design and specifications are subject to change without prior notice Only Referrence SIZE A5 Description SERVICE MANUAL 6M61E MODEL Brand Name JOB NO Engineering Dept Artwork By 5 Date 2013 8 8 Checked By Date Approved By Date CONTENT CONTENT anaa 2 Technical Specification 3 14 Block Diagram 15 List of key 5 16 IC BLOCK Diagram 17 31 MAIN 32 MAIN 33 Circuit Diagrams 34 42 Technical Specification 1 Application Area This product standard is use for LED 6M61E chassis 2 Specification All the standard are measured under following conditions without other specification 2 1 Ambient Temperature 20 5 2 2 Relative Humidity 65 10 2 3 Power Supply Voltage Standard Input Voltage 100 240V AC 50 60HZ 2 4 Adjust after 20 minutes warm up 3 Test and check method 3 1 Capability According to n
24. WP DQ2 16 LEAD SOP This Data Sheet may be revised by subsequent versions 2 2004 Eon Silicon Solution Inc www eonssi com or modifications due to changes in technical specifications Rev E Issue Date 2009 10 19 Es t EZ Figure 2 BLOCK DIAGRAM EN25Q64 FUNCTIONAL BLOCK DIAGRAM Flash Address X Decoder Memory Buffers and Latches Y Decoder VO Buffers Control Logic and Data Latches Serial Interface CS CLK DI DQ0 DO 001 WP DQ2 NC DQ3 Note 1 DQ and DQ are used for Dual and Quad instructions 2 DQ DQ are used for Quad instructions This Data Sheet may be revised by subsequent versions 3 or modifications due to changes in technical specifications Rev E Issue Date 2009 10 19 2004 Eon Silicon Solution Inc www eonssi com SEHN EN25Q64 Table 1 Pin Names Symbol Pin Name CLK Serial Clock Input DI DQo Serial Data Input Data Input Output 0 DO DQ Serial Data Output Data Input Output 1 1 CS Chip Enable WP Write Protect Data Input Output 2 NC DQi Not Connect Data Input Output 3 22 Vcc Supply Voltage 2 7 3 6V Vss Ground NC No Connect Note 1 DQ and DQ are used for Dual and Quad instructions 2 DQ DQ are used for Quad instructions SIGNAL DESCRIPTION Serial Data Inp
25. aditional Chinese IB Traditional Chinese Circuit diagram No Batteries No Product registration Card Yes Traditional Chinese AC Cable Length 1 8m Audio Cord Jack 3 5mm No VGA Cord No Wallmount frame Optional Antenna Cable No 6 in 1 YPbPr amp CVBS cable adapter No 3D Glasses YES If have 3D mode Net Weight in kg Gross Weight in Kg Wallmount VESA compatible standard Yes reference Adaptor for VESA wallmount Yes compatibility Desktop Stand included optionnal included ref No Panel Tilt Fowards Backwards Rotation No Swivel function desktop stand yes No No motorized Docking station yes No No Floor Stand included optionnal ref No No Glass shield yes No No Finish on Front Technical Specification Finish on side Finish on back Finish on stand number of colors on carton box Brand logo Customer Inlet Other logo No External AC DC Power with DC power No cord yes No Handle yes No No Detachable speaker yes No No Rating Label langages English HLH gt gt gt S NO BRK BLS X Die 1 BEX 3K IR1 ERR R HE SDR138 5300 147438 0S00 2 SPEAKER AEJ SL411 01F 5631 108104 0180 3 1 2 Un HC 49U S 4900 124053 800
26. ation test standard 3 2 Safety standard 3 3 EMC standard Technical Specification 4 Safety and Regulation NO Item Min Typ Max Unit Remark 1 Force Stability Inclineplane Tip Test 10 deg 2 Force Stability Level Tip Test 100 N 3 Isolation Gap AC AC AC DC mm 4 Isolation Gap mm W 5 Power consumtion Max E W W 6 Power consumtion Standby 1 7 Dielectric Voltage kV 8 Isolation Resistance 9 Leakage Current 5 mApp 10 Power cord captivity 40 N 11 Flammability Back Cover PASS 12 Sharp edge PASS 13 UL Compliance NO 14 FCC Compliance NO 15 CDRH Radiation Compliance NO 16 CSA Compliance NO 17 CEB Compliance NO 18 CE Compliance Base on different order 19 CB Compliance YES Video NO Item Min Typ Max Unit Remark 1 Linearity Distortion 1 96 2 Linearity Distortion Horizontal 1 96 3 Trapezoidal Distortion Verticl 1 96 4 Trapezoidal Distortion Horizontal 1 96 5 Over scan Verticl 93 95 97 96 6 Over scan Horizontal 93 95 97 96 7 Brightness Maximum 280 8 Video Noise Limited 51 dBuV Sensitivity S N 30dB VHF Technical Specification 9 Video Noise Limited 54 dBuV Sensitivity S N 30dB UHF 10 Selecti
27. d to prevent the Status Register from being written Used in conjunction with the Status Register s Block Protect BPO BP1 BP2 and BP3 bits and Status Register Protect SRP bits a portion or the entire memory array can be hardware protected The WP function is only available for standard SPI and Dual SPI operation when during Quad SPI this pin is the Serial Data for Quad I O operation This Data Sheet may be revised by subsequent versions 4 2004 Eon Silicon Solution Inc www eonssi com or modifications due to changes in technical specifications Rev E Issue Date 2009 10 19 TEXAS INSTRUMENTS TPA3113D2 SLOS650B AUGUST 2009 REVISED SEPTEMBER 2009 www ti com APPLICATION INFORMATION 100uF 0 1 pF 1000 pF 100 Control System 3 27 26 0 22 uF LINN GAINO GAIN1 AVCC TPA3113D2 AGND GVDD PLIMIT RINN RINP 0 22 NC 100 0 1HF 1000 pF 4 16 5 Y 29 PowerPAD Figure 33 Stereo Class D Amplifier with BTL Output and Single Ended Inputs 18 Submit Documentation Feedback Copyright 2009 Texas Instruments Incorporated Product Folder Link s TPA3113D2 TEXAS INSTRUMENTS www ti com TPA3113D2 SLOS650B AUGUST 2009 REVISED SEPTEMBER 2009 PIN FUNCTIONS PIN Pin DESCRIPTION Number SD 1 Shutdown logic inp
28. he menu Panel information Enter factory mode enter Panel SETTING item you can get the panel information from the bottom of this menu Aging mode You can press the shortcut key in the factory remote control to open or close the aging mode ADC adjusts YPBPR source ADC Switch to YPBPR source input 100 color bar pattern enter factory select AUTO ADC item in the ADC CALIBRATION menu press gt button to begin auto adjust When it is finish it will show OK or FAILE If FAILE is showed you need to try again NOTE YPBPR ADC need to do twice by use 576P and 720P signal separate VGA source ADC Switch to PC source input tessellated white and black signal enter factory select AUTO ADC item in the ADC CALIBRATION menu press gt button to begin auto adjust When it is finish it will show OK or FAILE If FAILE is showed you need to try again White balance Enter factory mode enter W B ADJUST item you can adjust white balance in this menu Over scanning Enter factory mode enter Panel SETTING submenu enter OVERSCAN submenu you can adjust the over scan in these menu OutFactory reset Enter factory mode enter SYSTEM SETTING item select OUT FACTORY SET item and press OK button to reset the flash memory TV set will restart when it is finish INIT EEPROM Enter factory mode enter SYSTEM SETTING item select FAC RESET DE
29. ly BSPR 17 Bootstrap for right channel positive high side FET OUTPR 18 Class D H bridge positive output for right channel PGND 19 Power ground for the H bridges OUTNR 20 Class D H bridge negative output for right channel BSNR 21 Bootstrap for right channel negative high side FET BSNL 22 Bootstrap for left channel negative high side FET OUTNL 23 Class D H bridge negative output for left channel PGND 24 Power ground for the H bridges OUTPL 25 Class D H bridge positive output for left channel BSPL 26 Bootstrap for left channel positive high side FET Power supply for left channel H bridge Right channel and left channel power PVCCL 27 P 2 supply inputs are connect internally PVCCL 28 P Power supply for left channel H bridge Right channel and left channel power supply inputs are connect internally Copyright O 2009 Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link s TPA3113D2 TEXAS TPA3113D2 INSTRUMENTS SLOS650B AUGUST 2009 REVISED SEPTEMBER 2009 www ti com FUNCTIONAL BLOCK DIAGRAM BSPL PVCCL PBTL Select Gate Drive OUTPL OUTPL FB LINP PGND PLIMIT LINN BSNL OUTNL FB
30. na 5 Thermal design Perform thermal design in which there are adequate margins by taking into account the allowable power dissipation in actual states of use 6 Shorts between pins and misinstallation When mounting the LSI on a board pay adequate attention to orientation and placement discrepancies of the LSI If itis misinstalled and the power is turned on the LSI may be damaged It also may be damaged if it is shorted by a foreign substance coming between pins of the LSI or between a pin and a power supply or a pin anda GND 7 Operation in strong magnetic fields Adequately evaluate use in a strong magnetic field since there is a possibility of malfunction 8 Pop noise countermeasures In order to prevent the pop noise that occurs when the power supply turns ON or OFF make the rise and fall with reference to the timing diagram shown below 1 BH3541F BH3544F BH3548F Rise time A PLAY period Rise time VCC OUT MUTE Fig 16 A Mute period Use as pop noise countermeasure when power supply turns ON OFF by makingVMUTE Lo B Mute cancellation period This has a time constant because it is used by the externally attached C2 and R2 as a pop noise countermeasure on mute cancellation so be careful of the timing C Mute start time As on cancellation this has a time constant 2 BH3547F MUTE period Rise time PLAY period Fall period Ke peja vec B up E A 4 Vmu
31. output Frequency Range 3 5MHz 5 OPERATING TEST CONDITIONS 6 STORAGE CONDITIONS 2010 LGIT All rights reserved DOCUMENT No 40746 REG DATE 2011 08 08 SPECIFICATION REV DATE 2011 08 08 MODEL NAME TDST G070D 10 15 11 PIN DESCRIPTIONS o ae arme a ne Te wae 2010 LGIT All rights reserved LGIT Confidential and Proprietary LG Innotek DOCUMENT No HC40857 REG DATE 2012 07 09 SPECIFICATION REV DATE 2012 07 09 MODEL NAME TDSK TO7OF 13 Application Circuit 2 RF 8SW B1 3 3 gt 3 B1 3 3V IFAGC gt AGC 1KQ 1 Oe SN EH This RC circuit behaves as LPF for PWM output Anne Each value may need to be optimized according to the 1 Pe characteristics of the Demodulator IC 1000 2011 LGIT All rights reserved Main PCB Top EEE Rom EES BP r4 6M61E Factory Adjust Menu V0 0 1 Description Enter factory mode Open source menu and then press digital button 3 1 9 5 in turns to enter the factory menu Press t and L button to choose the item press OK button enter the submenu press MENU to ruturn to upper menu press and button to adjust the value Leave factory mode Press menu button to back to upper menu until leave factory mode Software information Enter factory mode you can get the software information from the bottom of t
32. st 100ms 96 IEC 1000 4 11 6 Operation Temperature deg 7 Operation Humidity 96 8 Storage Temperature deg 9 MTBF confidence Level 90 hour Technical Specification DTV Productions Specification Model 32 Country West Eu East West Eu Eu Russia AP US S A Japan Brand ODM Skyworth Category Monitor TV Combo Portable TV TV Panel technology LCD PDP D LED Market Position High Mid Access Class Cabinet Design Example 01 23 series 32E36 Product Nb 2 Chassis solution MSD6306PUN Chassis name 6M61E Chassis PCB Standard Skyworth RGB New Standard Predecessor replace MP date requested ETD 2013 8 MP date confirmed by supplier ETD ETA Status Pre Finish Regional requirement Homologation Gostandard CE MPTT CB RoHS Power supply 100 240V AC 10 VDE Yes 100 240V AC 20 10 Power consumption working Annual Power consumption standby lt 1W Power plug VDE UL BS VDE 2pins Picture display Screen size diagonale inch 32 Aspect ratio 16 9 4 3 15 9 16 9 1st panel supplier panel suppliers Skyworth 1st panel supplier panel reference Skyworth Panel Display Type MVA PVA IPS TFT LCD 1st panel supplier resolution 32 1366X768 Dynamic contrast ratio gt 10000 1 Video signal process Comb Filter 2D 3D 3D Noise Reduction adaptative 3
33. t S N 50 dB 12 Audio output Level 0 5 Vrms 13 Audio output Frequency Response 80 12000 Hz 14 Audio output S N 50 dB 15 Audio output Distortion 6 96 16 Video Input Level R G B 0 7 VPP 17 Video Input 0 7 VPP Level Component Y Pb Pr 18 RGB Input Resolution Vertical 768 pixel 19 RGB Input Resolution Horizontal 1366 pixel 20 RGB Input Horizontal Frequency 68 kHz 21 RGB Input Frame Rate 60 Hz 10 The Others NO Item Min Typ Max Unit Remark Search sensitivity 40 dBuV 2 Clock real time gain or loss sec per NO sec day Software Funcitonality Test YES REMOCON Working 8 m sensitivity Straight 5 REMOCON Working 6 m sensitivity T B L R Close caption sensitivity 46 dBuV Teletext sensitivity 46 dBm Resonance of unit sweep NO freq 50 1000 Technical Specification 11 Customer Menu Setup as shipped condition 12 NO Item Specification Remark 1 PSM Standard 2 SSM Standard 3 Volum 20 4 Mute off 5 Input Mode RF 6 Customer menu language Traditional Chinese Base on different order 7 AVL off 8 Sleep Timer off 9 Auto sleep off 10 Blue back NO 11 Surround off 12 Caption off 13 Noise Reducer Middle Reliability NO Item Min Typ Max Unit Remark 1 ESD 4 kV IEC 1000 4 2 2 EFT Burst kV IEC 1000 4 4 3 Surge Immunity kV IEC 1000 4 5 4 Voltage Dip Test 10ms 96 IEC 1000 4 11 5 Voltage Dip Te
34. te SG Input Signal E Fig 17 A Before VCC rise or at the same time as VCC make mute cancelled VMUTE Hi B Soft mute period This time can be set by externally attached R2 and C2 OUT 7 8 2010 05 Rev A 2010 ROHM Ltd All rights reserved PDF SCRE pdfFactory Pro www fineprint com 8 TDST GO70D DOCUMENT No 40746 REG DATE 2011 08 08 SPECIFICATION REV DATE 2011 08 08 MODEL NAME TDST G070D 1 FEATURES Compliance with DVB T2 DVB T DVB C amp PAL Compatible with Vertical Horizontal Jack Horizontal Mounting RoHS Compliance 2 ORDERING INFORMATION DESCRIPTION DVB T C Half NIM Horizontal mounting with horizontal Jack 1 Input Only TDST G070D 3 LABEL MARKING Customer name or part number TDST G070D Re Model name Code Lot number Code Lot number 000000000 Manufactured Process Date Revision number A Z Month Year 2010 LGIT All rights reserved DOCUMENT No HC40746 REG DATE 2011 08 08 SPECIFICATION MODEL NAME TDST G070D REV DATE 2011 08 08 4 GENERAL SPECIFICATION 4 1 Supporting System DVB T2 DVB T DVB C amp PAL B G 4 2 Receiving channel 45MHz 866MHz 4 3 Input Output conditions ANT Input impedance 75 ohm unbalance Digital Low IF
35. ut Output and IOs DI DO and DQ DQ DQ DQ The EN25Q64 support standard SPI Dual SPI and Quad SPI operation Standard SPI instructions use the unidirectional DI input pin to serially write instructions addresses or data to the device on the rising edge of the Serial Clock CLK input pin Standard SPI also uses the unidirectional DO output to read data or status from the device on the falling edge CLK Dual and Quad SPI instruction use the bidirectional pins to serially write instruction addresses or data to the device on the rising edge of CLK and read data or status from the device on the falling edge of CLK Serial Clock CLK The SPI Serial Clock Input CLK pin provides the timing for serial input and output operations SPI Mode Chip Select CS The SPI Chip Select CS pin enables and disables device operation When CS is high the device is deselected and the Serial Data Output DO or DQ DQ and pins are at high impedance When deselected the devices power consumption will be at standby levels unless an internal erase program or status register cycle is in progress When CS is brought low the device will be selected power consumption will increase to active levels and instructions can be written to and data read from the device After power up CS must transition from high to low before a new instruction will be accepted Write Protect WP The Write Protect pin can be use
36. ut for audio amp LOW outputs Hi Z HIGH outputs enabled TTL logic levels with compliance to AVCC Open drain output used to display short circuit or dc detect fault status Voltage FAULT 2 o compliant to AVCC Short circuit faults can be set to auto recovery by connecting FAULT pin to SD pin Otherwise both short circuit faults and dc detect faults must be reset by cycling PVCC 3 Positive audio input for left channel Biased at 3V LINN 4 Negative audio input for left channel Biased at 3V GAINO 5 Gain select least significant bit TTL logic levels with compliance to AVCC GAIN1 6 Gain select most significant bit TTL logic levels with compliance to AVCC AVCC 7 P Analog supply AGND 8 Analog signal ground Connect to the thermal pad GVDD 9 o High side FET gate drive supply Nominal voltage is 7V Also should be used as supply for PLIMIT function PLIMIT 10 Power limit level adjust Connect a resistor divider from GVDD to GND to set power limit Connect directly to GVDD for no power limit RINN 11 Negative audio input for right channel Biased at 3V RINP 12 Positive audio input for right channel Biased at 3V NC 13 Not connected PBTL 14 Parallel BTL mode switch Power supply for right channel H bridge Right channel and left channel power PVCCR 15 P supply inputs are connect internally Power supply for right channel H bridge Right channel and left channel power PVCCR 16 P supply inputs are connect internal
37. v 1 0 June 2011 www aosmd com Parameter Rating Supply Voltage Vin 45 18 Output Voltage Range 0 8 V to 0 85 Vw 40 C to 85 C Ambient Temperature TA Package Thermal Resistance Exposed Pad 50 8 6 4 Note 2 The value of is measured with the device mounted on 1 in FR 4 board with 2 oz Copper in a still air environment with Ta 7 25 C The value in any given application depends on the user s specific board design 50 C W Page 3 of 14 2 ME9435A XO sad Matsuki Electric ME9435A__ 30V P Channel Enhancement Mode MOSFET GENERAL DESCRIPTION FEATURES The ME9435A is the P Channel logic enhancement mode power field 1 9 Vcs 10V effect transistors using high cell density DMOS trench technology 2 60m 2 Ves 4 5V This high density process is especially tailored to minimize on state resistance These devices are particularly suited for low voltage application such as cellular phone notebook computer power management and other battery powered circuits and lower power loss that are needed in a very small outline surface mount package PIN CONFIGURATION SOP 8 D Top View ri 52 EE SE D SET Pd 3D r S P Channel MOSFET Absolute Maximum Ratings 25 Unless Otherwise Noted Parameter Symbol Steady State Drain Source Voltage Gate Source Voltage L
38. vity 1 5M 35 dB 11 Selectivity 8M 40 dB 12 Tuning Range 0 7 MHz 13 Resolution Horizontal 1366 Lines 14 Resolution Vertical 768 Lines 6 Chroma NO Item Min Typ Max Unit Remark White Balance X axis White Balance Y axis White Balance Color Temperature 6500 9800 12500 kdeg 12500 266 276 9800 280 290 6500 313 329 Color Sensitivity 30 dB Color Burst Lock in Range 300 Hz Color Killer Sensitivity 30 dBuV 7 Audio NO Item Min Typ Max Unit Remark 1 Audio Noise Limited Sensitivity VHF L 25 dBuV 2 Audio Noise Limited Sensitivity VHF H 25 dBuV 3 Audio Noise Limited Sensitivity UHF 28 dBuV 4 Buzz S N Ratio 40 dB 5 Distortion 3 6 Audio ouput L R at 10 THD 6 7 Audio ouput Center 8 Stereo Separation 21 dB 9 Speaker Impedance ohm 10 Speaker Power rating W 8 Power NO Item Min Typ Max Unit Remark 1 DC Voltage Audio 12 V DC Voltage Tuner 3 3 V Technical Specification 9 External Interface NO Item Min Typ Max Unit Remark 1 Video Input Level 1 Vpp 75 ohm 2 Video Input Frequency Response 4 5 MHz 3 Video Input S N 40 dB 4 Audio Input Level 0 5 Vrms 5 Audio Input Frequency Response 15 kHz 6 Audio Input S N 40 dB 7 Audio Input Distortion 3 96 8 Audio Input Dynamic Range V 9 Video output Level 1 Vpp 10 Video ouput Frequency Response 4 2 MHz 11 Video outpu
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