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SERVICE MANUAL FOR M28 ONE

1. 10 11 E 10 11 1Z A 1 L803 Ranges EE ee d m E276GH PAL BG DK AV NTSC T OL MA IPgot P501 GEA 180 V V n fl R801 e40V Sant am A SON 4 50Hz E E un Eu B RB35B R501 acesov cease on s 5 z BE ced4 caus R519 4n 250v AC cou 2 7K Low x2 250V l 10801 0804 S N AN CB35 1000p RLESS X4 RT 4 G N AC400V VANN us T802 R620 028 hos D831 3 R e ay FRI04 DN 3 TD Cep e H 1ddu 400V ui I Y 1 at 3 10n 500v R804 d a2 sw NS R803A c EH eeo 3 A M t 1 lt x m 1 2w C807 n C508 w C507 it deen SP u in T 390P EN d M TN cur A d D805 5V CB42 CB4l ob FRLO4 R805 BOB 470u ire ik 49 16V C840 C012 4 BP P FUS
2. Fig 12 No picture no sound snow dots Check the 5V power supply termnal of the tuner Check 5V power Supply circuit OK Check the tuner iq Sp Replace the tuner TCL OVERSEAS HOLDINGS LIMITED Service Manual55 Examples 1 The indicator is always light Cannot turn it on by remote handset or local key Analysis We can draw a conclusion that the MCU section is not working So the remote local key cannot wake up the machine Perhaps the reset circuit of MCU or the crystal oscillator causes the failure Having checked the circuit we find that all components of the reset section of MCU are OK So we have a suspicion that the crystal oscillator is failure We replace it with a new crystal oscillator so the machine can work normally 2 No sound no picture blue screen in TV status The blue screen indicates that the video output and scanning circuit and MPU are all ok The failure may exit in the section from the tuner to pin26 of TMPA8803CSN We use an oscilloscope to observe the waveform of pin30 and the waveform 1s ok but no signal input from the pin26 We check the circuit carefully and we find the emitter of Q209 is cold joint So the TV signal cannot pass the Q209 That 1s the failure 3 Poweris switched on and makes noises No sound no picture First we disconnect the power supply circuit in the position of B and switch the machine on We use a multi m
3. 11 TEST PINS All test pins are active HIGH In normal operation of the device they can be left open circuit as they have internal pull down resistors Test functions are for manufacturing tests only and are not available to customers 12 POWER FAIL DETECTOR The power fail detector monitors the internal power supply for the digital part of the device If the supply has temporarily been lower than the specified lower limit the power failure register bit PFR in subaddress 0 will be set to logic 1 Bit CLRPFR slave register subaddress 1 resets the Power on reset flip flop to logic O If this is detected an initialization of the TDA9874A has to be performed to ensure reliable operation 13 POWER ON RESET The reset is active LOW In order to perform a reset at power up a simple RC circuit may be used which consists of an integrated passive pull up resistor and an external capacitor connected to ground The pull up resistor has a nominal value of 50k which can easily be measured between pins CRESET and VDDD3 Before the supply voltage has reached a certain minimum level the state of the circuit is completely undefined and remains in this undefined state until a reset is applied V MHBS87 The reset is guaranteed to be active en when The power supply is within the specified limits 4 5 to 5 5 V The crystal oscillator DCXO is VCRES ET lt 0 3Vmpp functioning The voltage at pin CRESET is below 0 3VDDD 1
4. V out IK in current pulse Vcc terminal for DEF circuit Supply Vcc terminal for RGB circuit Supply H vec 1 RGB 9V 9V 19 Input terminal for Cb signal G out 9V Output terminals for R G B signal ox SE N oo MN N O c ec E 32 Service Manual TCL OVERSEAS HOLDINGS LIMITED Ma J eeemmanevsma ba se 7 Vcc terminal for Digital block This terminal voltage is clipped about 3 3V SDA 57 DC bus serial data input output by regulator circuit TV in Input terminal for Video signal DC bus serial clock input output ABCL in Input terminal for ABL ACL control Volume control signal output Audio out Output terminal for Audio signal vr 60 Tune voltage controller IF veo 9V 29 _ Vee terminal for IF circuit Supply 9V BANDI Output terminal for detected PIF l l TV out 30 TV sync 62 Sync signal input signal Output terminal for detected SIF Remote control signal preprocessor SIF out 31 RMT in 63 signal input Input terminal for External Audio EXT audio 32 ZK POWER 64 LED output signal SIGNAL PROCESSOR DESCRIPTIONS 1 Tank coil less PIF VCO TMPA8803 adopts a tank coil less PIF VCO circuit which has advantages of cost performance of weak IF input and easy to design PCB layout The PIF PLL system has self alignment circuit so that the micro controller needs only to order the PIF PLL system to start self alignment through the IIC bus The self alignment finishes within 50 msec
5. 11 There are some mechanical and electrical parts associating with safety EMC features Generally related to high voltage or high temperature or electric shock these features cannot be found out from the outside When replace these components perhaps the voltage and power suit the requirements but efficient X ray protection may not be provided All these components are marked with A in the schematic diagram When replace these you d better look up the components listed in this manual If the component you replaced not has the same safety EMC performance harmful X ray may be produced P 4 _ Service Manual TCL OVERSEAS HOLDINGS LIMITED PART II Product Specification 1 Ambient Conditions 1 1 Ambient Temperatures a Operating 10 C 407C b Storage 15 C 445 C 1 2 Humidity a Operation lt 80 b Storage lt 90 1 3 Air Pressure 86kpa 106kpa 2 GENERAL SPECIFICATION 2 1 MPU amp Chroma IC TMPA8803CSN One Chip 2 2 TV Broadcasting System PAL DK BG SECAM DK BG NTSC 3 579 4 43 AV MODE 2 3 Scanning Lines amp Frequencies 525 625 lines 15 625KHZ 15 75KHz 50 60Hz 2 4 Color Sub Carrier 4 433MHz 3 579MHz 2 5 IF Picture 38 9MHz Sound 5 5 6 5MHz 2 6 Power Consumption 80W 2 7 Power Supply AC 220V 50Hz 10 2 8 Audio Output Power 7 THD 24W AW 2 9 Aerial Input Impedance 75Q Unbalanced Din Jack Ant Input 2 10 Product Safety Requirement VDE Approval 2 11 Product EMC EMI Requirement FTZ Ap
6. 2 Built in Sound Band Pass Filter A sound band pass filter is integrated on the chip for multi frequency SIF systems The Ist SIF demodulator multiplies PIF input signal and regenerated PIF carrier from VCO with 90 degree angle and gets multi frequency SIF signal as 6 5MHz 6 0MHz 5 5MHz and 4 5MHz according to the SIF system A frequency converter converts one of those four SIF signals into 1 MHz SIF signal by selecting the converting frequency through the IIC bus The built in sound BPF rejects undesired frequency components of 1MHz SIF signal A narrow band 1 MHz PLL FM demodulator with no external tank coil achieves to output sound signal with better S N ratio 3 AFT A recent IF system adopts a digital AFT circuit But analog DC voltage is used as interface between an IF system and a micro controller in the AFT control loop TMPA8803 adopts a digital interface through IIC bus shown as below 4 Non standard IF signals TMPA8803 prepares ways for non standard IF inputs The OVER MOD switch is available for over modulated PIF signals in the condition of more than 87 5 modulation at 100 IRE which is the maximum modulation Standard of PAL and NTSC In addition TMPA8803 has capability to TCL OVERSEAS HOLDINGS LIMITED Service Manual33 modulate more than 400 over modulated SIF signal without undesired voltage turning over also 166 GHz ART Window ron EI Jy E W Al DK mi dl RPE AFT Window vias E E a 11 6 kHz ei
7. The gain of the Control input is given on Figure 10 which shows the duty cycle as a function of the current injected into the pin 3 V L P stby A 4KHz filter network is inserted between the shunt regulator and the stand by PWM comparator to cancel the high Latched off Phase Control Input frequency residual noise The switch S3 is closed in Stand by mode during the Latched Off Phase PNN while the switch S2 remains open See HIT section PULSED MODE DUTY CYCLE CONTROL switching Phase Regulation Oulpul The resistor Rdpulsed Rduty cycle E LEER ERREUR burst has no effect on the regulation Figure 1 Regulator process This resistor is used to determine the burst duty cycle described in the chapter Pulsed Duty Cycle Control on page 8 PWM Latch The MC44608 works in voltage mode The on time is controlled by the PWM comparator that compares the oscillator sawtooth with the regulation block output Switching Phase oscillator and is reset by the PWM Q 200 pA STAND BY comparator or by the current sense comparator in case of an over current C i START UP This configuration ensures that only a single pulse appears at the circuit output during an oscillator cycle Overcurrent LER comparator a Current Sense C Bes Ca The inductor current is converted to a positive voltage by inserting a ground ll T 1V reference sense resistor Rsense 1n series with the powe
8. NICAM DEMODULATION The NICAM signal is transmitted in a DQPSK code at a bit rate of 728 kbits s The NICAM demodulator performs DQPSK demodulation and passes the resulting bitstream and clock signal to the NICAM decoder and for evaluation purposes to various pins A timing loop controls the frequency of the crystal oscillator to lock the sampling instants to the symbol timing of the NICAM data 8 NICAM DECODING The device performs all decoding functions in accordance with the EBU NICAM 728 specification After locking to the frame alignment word the data is descrambled by applying the defined pseudo random binary sequence The device then synchronizes to the periodic frame flag bit CO The status of the NICAM decoder can be read out from the NICAM status register by the user The OSB bit indicates that the decoder has locked to the NICAM data The VDSP bit indicates that the decoder has locked to the NICAM data and that the data is valid sound data The C4 bit indicates that the sound conveyed by the FM mono channel is identical to the sound conveyed by the NICAM channel The error byte contains the number of sound sample errors resulting from parity checking that occurred in the past 128 ms period The Bit Error Rate BER can be calculated using the following equation BER bit errors total bits error byte X 1 74 X 10 9 NICAM AUTO MUTE This function is enabled by setting bit AMUTE to logic 0 Upper and lower error lim
9. TT 174W fev paza 50V RB3 A ia jv 25V VE hg T D 1N4148 w tL y 25V EH FR104 PM E CB30 gens 330P asvYy 330 GE 174W L804 I 6 1UUuH LB807 LB P203 B Y 112 V AA nit a 5V C827 4 reee P824 1 Deed Raid 1 Sc en 100u lone EU RU3eM 27 eet 5V 160v 500v aw MD Q SDA 19 ROI 5V 5 Fg S00 S003 S004 S005 S006 5007A AN e 10K EI 330p SWI pRU VUL voL AV TV MENU AUTO R236 IC601 TDATOSTQA 1k 5V PRO A i SE Weg PE aes Deene 12 T i 3 T i i in T C1815 1 2W 49V speaker R P602 E H VCC _ 16 OHM SN Rope Ee cl L con Sr Set o LS ES MES oe 9 TE RP I oo LJ 2 3 03 wies RUD R017 D205 R235 Doo A 10K 470 10k oz Ce R027 ave D J216 22K Rode 184148 8V 47 Lyd 7 RODIA Wn ey E 1 4W 10K 100 5V 3l L785 3 x c237 Gest R006 lt 4 s Con Lr 1 4 10n CODD speaker rao 10K 4 CUUBA ROLO 27p R204 CH ine oH 10Du gug Iks T WY cog SE ae Re40A RES R241 C030 R041 By Cen Q605 D601 30V 3K 459 C 21 goog R028 9 Io IK 47 R005 603 e C602 ALDISY 1N4148 R014 P R031 R030 220 gu 4 7UF ap 4 7 UF ap 32K LI A 39p 1Dk A1015 680 a207 25V A1015 50V 16v d ge 4 7 UF K ma env NPO 100k C1815 S levE uy Cem 3 gt C Co X001 ct y C607 100uF Roos a asv Fell 0604 16V C006 jK RUE On SE I CD20 R P9 1K 16 OHM P601 4700P C604 m C124 07 330p 22 10n M D007 L SR C610 R60g CO ZC 1N4148 100n 470uF DA R614 33K 220p coez esv I Fest o GE GN 3 39p R i rand 10
10. en 49 D D iU 10n 33K e Cel4 C 5s H R309 C307 VERT gm EE R119 R216 c213 LG 7 E ceee D206 Re3e C306 e 10K Sch d BN com AN R117 C114 R604A iov 1N414B 100K 30v caus 1k5 L103 L 470 47K ES 10n 24V 10D0P CEC K l l 190 10n uH 1K SCH CH R311 1000u HOR d cue e C GO Deepmph ABCL IN fe cee 5 ad 820 35v om in 10u m D R245 C215 P R310 I Saw Filter 47K I oou T S EE GH S Reg AUDIO DUT ke 16V 9V T 12K R313 l 7u i ceat C239 16V 10n 1E2 Ton S EH Le a m RETI EI C421 FSVA Ae f YN DEZ VIP 4 Gof iF voan IF veccev i131 L207 eae Faun bu lt IF Laos 47Du T I 22uH SCH A 16V Gu PLL E 8 Cm peas L204 L 1 TEE B l mue 100u 330 R220 10u a l SC E lev 220 R410 R4 gon 349 DC NF SIF OUT 4 220 ir id m 150 R218 x201 C1815 D405 53 EXT AUDIO 33 10D 6 2MBF R227 1N4002 ve C420 ES n209 330 10u CEIR A1015 XP03 100v REISA el cig 18V 10u ceel Dr gien OP 16V 10n R229 112V 100 E 330 1H GF R406 n O Ve 12K Iw 10K CH i C3 lt 1 T422 1404 Zeg i C418 rogy i R925 S o d Aen x_i n 9V 9 g ae 3 eas i 4 e C414 d rang I 390P 500V 3 7 5VA eH v EI 3 7805 H i R924 R416 I C931 m 9v 423 4 D403 L iW H lon 47K 474 D C425 FRiD4 FUS U 62 aL R922 rgy lon T I e VW C 5 av TT R982A C415 we C4164 w l T 1BK C908 wh 33V T 1009 C413 P405 49v R926 1DuF me lev 470u Dans ME EN Ganz 16V 35V FRI04 FUS cipisy
11. 5 V if VDDD 5 0 V typically below 1 8 V The required capacitor value reset active quaranteed n depends on the gradient of the rising power supply voltage The time constant of the RC circuit should be clearly larger than the rise time of the power supply to make sure that the reset condition is always satisfied even when considering tolerance spreading To avoid problems with a too slow discharging of the capacitor at power down it may be helpful to add a diode from pin CRESET to VDDD It should be noted that the internal ESD protection diode does not help here as it only conducts at higher voltages Under difficult power supply conditions e g very slow or non monotonic ramp up it is recommended to drive the reset line from a microcontroller port or the like TCL OVERSEAS HOLDINGS LIMITED Service Manual25 r Description of the DSP BA LENEL ADJUST ADLAEST FEEL DE EMPHASES DEX ura 1 LEVEL SCALING All input channels to the digital crossbar switch are equipped with a level adjustment facility to change the signal level in a range of 15 dB Adjusting the signal level is intended to compensate for the different modulation parameters of the various TV standards Under nominal conditions it is recommended to scale all input channels to be 15 dB below full scale This will create sufficient headroom to cope with overmodulation and avoids changes of the volume impression when switching fr
12. Latched Off Phase VPWM JC Fi QUT ue Q Made R1 R2 LEE out IV Start up ldemag Switching Start up Phase 24g4 amp Phase Phase Figure 7 Transition Logic was observed Mode Transition The LW latch Figure 7 is the memory of the working status at ei the end of every Switep Switching sequence Two different cases must be considered for the logic at the termination of the SWITCHING PHASE No Over Current TCL OVERSEAS HOLDINGS LIMITED Service Manual LP 2 An Over Current was observed These 2 cases are corresponding to the signal labeled NOC in case of No Over Current and OC in case of Over Current So the effective working status at the end of the ON time memorized in LW corresponds to Q 1 for no over current and Q 0 for over current This sequence is repeated during the Switching phase Several events can occur 1 SMPS switch OFF 2 SMPS output overload 3 Transition from Normal to Pulsed Mode 4 Transition from Pulsed Mode to Normal Mode 1 SMPS SWITCH OFF When the mains is switched OFF so long as the bulk electrolithic bulk capacitor provides energy to the SMPS the controller remains in the switching phase Then the peak current reaches its maximum peak value the switching frequency decreases and all the secondary voltages are reduced The Vcc voltage is also reduced When Vcc is equal to 10V the SMPS stops working 2 Overload In the hiccup
13. Package MCP technology One is a micro NU m we 30 Service Manual TCL OVERSEAS HOLDINGS LIMITED controller MCU and the other one is a signal processor SP for a color TV The TV signal processor contains PIF SIF Video multi standard chroma Sync RGB processors BLOCK DIAGRAM A 73 NK momzZPTE Poza mue POpP RETS Zeg e PETLEDTADCBHI J J TIFE 2 guis E a Ef E i zl mi ei e age FE PLETE T AGWADEAbH M E St E SECKEREE 5 8 PC RIM Se Zu 8 ae en P Sep E ch PEXADCBbITCH ntz r 8 314m TC3 z AJ m oP Ds SE eo Zi a Acne Slop sel 258 E uo PA IAM d T 2 2 z E SOUP TT DT Cen iH z EI T r ES D SEEDS a TEST Z mi SE St i ILE uP DV DD Sy 3 S 2 pu i Za BD eis uP Vues TII E EK uP Add Ey E uP MPAGISD BE T LB l SE i TV AGND n B ZH T EE va DOUD EC gas teg ut Wig purg ostg 0000 00 009 U T E a ot TCL OVERSEAS HOLDINGS LIMITED Service Manual 1 PINNING SYMBOL DESCRIPTION SYMBOL PIN DESCRIPTION Input terminal for H correction and Band selector SIF in 2nd SIF TV AV switch DC NF BAND2 m Terminal to be connected capacitor TV AV for DC Negative Feedback from SIF Det output Terminal to be connected with loop filer for PIF PLL This terminal voltage is controlled PIF VCO a 2 J lt Panel key input PIF PLL frequency Vcc terminal for IF circuit
14. Supply SV GND IF vec 5V Terminal to be RESET System clock reset output S reg connected capacitor for stabilizing internal bias Terminal to be connected capacitor for SIF Det De Emphasis X TAL Deepmph A Gol connecting pins Terminal to be connected with IF AGC filter X TAL Test pin for out going test Be tied to TEST GND terminal for IF circuit low Vdd Supply 5V i and Pin42 are both input poles of GND for Slicer circuit IF in 42 UA lt Input terminals for IF signals Pin41 GND 10 differential amplifier Output terminal for RF AGC control GND l GND terminal for Analog block level FBP SCP out m gt Vcc terminal for Y C circuit Supply Input terminal for FBP Y C 5V 5V Output terminal for Horizontal driving Output terminal for CVBS or Y signal m H out 3 AV out z 3 SIS gt 5 Q gt e Z Q A J Q pulse selected by BUS Video SW Terminal to be connected capacitor for BLACK DET Terminal to be connected with Black H AFC 14 H AFC filter This terminal voltage Det filter for black stretch controls H VCO frequency Terminal to be connected capacitor to Terminal to be connected with APC generate V saw signal V saw filter for Chroma demodulation This V saw APC FIL amplitude is kept constant by V AGC terminal voltage controls frequency of function VCXO Output terminal for Vertical driving Input terminal to sense ACB cathode l ON
15. as carrier search or fine tuning The peak level of these signals can also be observed Source selection and data read out are performed via the l C bus 6 DIGITAL CROSSBAR SWITCH The input channels are derived from the FM and NICAM paths while the output channels comprise TS bus and the audio DACs to the analog crossbar switch It should be noted that there is no connection from the external analog audio inputs to the digital crossbar switch 7 DIGITAL AUDIO OUTPUT The digital audio output interface comprises an TS bus output port and a system clock output The TS bus port is equipped with a level adjustment facility that can change the signal levelina 15 dB range in dB steps Muting is possible too and outputs can be disabled to improve EMC performance The I S bus output matrix provides the functions for forced mono stereo channel swap channel 1 or channel 2 Automatic selection for TV applications is possible In this case the microcontroller program only has to provide a user controlled sound A or sound B selection 8 STEREO CHANNEL TO THE ANALOG CROSSBAR PATH A level adjustment function is provided with control positions of 0 dB 3 dB 6 dB and 9 dB in combination with the audio DACs The Automatic Volume Level AVL function provides a constant output level of 20 dB full scale for input levels between O dB full scale and 26 dB full scale There are some fixed decay time constants to choose from i e 2
16. conter T Hit Sae 0 6 AE 5 AV switch The audio switch has one input for an external audio and another for internal demodulated audio signal The switched audio signal goes into the audio attenuator which has controllability of audio gain from 0 dB to 80dB or less with near log curve characteristic The video switch has one input for an external CVBS or S VHS signal the other for the demodulated TV video signal and the last for an external YCbCr signal mainly coming form a DVD player The Cin terminal for the external S VHS signal has capability to detect DC level of the input signal and the micro controller can read the result as Cin DC through the IIC bus This function may prepare a way for automatic switching when inserting S VHS connection by means of software control A monitor output is available with the selected video signal In the case of selecting S VHS input Y and C signals are mixed for the monitor output This output is useful for signal detecting by the TC3 counting of the micro controller through an external LPF circuit for strict signal detecting performance 6 Asymmetric Sharpness External analog circuits are likely to generate over shoot signal The asymmetric sharpness circuit is provided to compensate this undesired signal It is possible to get more gain of pre shoot than over shoot by using the asymmetric sharpness instead of that a conventional sharpness function generates both p
17. mode the 3 distinct phases are described as follows refer to Figure 6 The SWITCHING PHASE The SMPS output is low and the regulation block reacts by increasing the ON time dmax 80 The OC 1s reached at the end of every switching cycle The LW latch Figure 7 is reset before the VPWM signal appears The SMPS output voltage is low The Vcc voltage cannot be maintained at a normal level as the auxiliary winding provides a voltage which is also reduced in a ratio similar to the one on the output i e Vout nominal Vout short circuit Consequently the Vcc voltage is reduced at an operating rate given by the combination Vcc capacitor value together with the Icc working consumption 3 2mA according to the equation 2 When Vcc crosses 10V the WORKING PHASE gets terminated The LW latch remains in the reset status The LATCHED OFF PHASE The Vcc capacitor voltage continues to drop When it reaches 6 5 V this phase is terminated Its duration is governed by equation 3 The START UP PHASE is reinitiated The high voltage start up current source Icc 9mA is activated and the MODE latch is reset The Vcc voltage ramps up according to the equation 1 When it reaches 13V the IC enters into the SWITCHING PHASE The NEXT SWITCHING PHASE The high voltage current source is inhibited the MODE latch Q 0 activates the NORMAL mode of operation Figure 2 shows that no current is injected out pin 2 The over current sense level corresponds to 1V
18. shown below 4 Select COLC to adjust the sub colour by tuning the amplitude of a and d to the same 5 Select TNTC to adjust the sub tint by tuning the amplitude of b and c to the same 6 Apply the Grey scale Colour bar PAL signal to the AV input in STANDARD status 7 Select COLP to adjust the sub colour by tuning the amplitude of a b c and d to the same V Adjustment of Focus Screen Voltage and Sub brightness 1 Receive a crosshatch pattern 2 Adjust the FOCUS VR on the flyback to make the picture clear 3 Enter D mode and press MUTE key and the screen will become a horizontal line Then adjust the SCREEN VR on the flyback transformer to set the intensity of the line to a minimum visible level the line can just be seen 4 Press MUTE key again and the TV will become full raster 5 Select BRTC to adjust the sub brightness until that the 2nd dark bar of 8 level grey scales just can be seen VI Adjustment of White balance 1 Receive a black and white pattern at STANDARD status 2 Use a color analyzer to measure the black side of the screen By changing the value of GB and BB set the reading of the color analyzer to x 284 y 299 3 Then measure the white side of the screen By changing the value of GD and BD set the reading of the color analyzer to x 284 y 299 4 Repeat step 2 amp 3 until you can get the correct reading for both black and white
19. 4 or 8 seconds Automatic selection for TV applications is possible In this case the microcontroller program only has to provide a user controlled sound A or sound B selection 9 GENERAL The level adjustment functions can provide signal gain at multiple locations Great care has to be taken when using gain with large input signals e g due to overmodulation in order not to exceed the maximum possible signal swing which would cause severe signal distortion The nominal signal level of the various signal sources to the digital crossbar switch should be 15 dB below digital full scale 15 dB full scale Description of the analog audio section 1 ANALOG CROSSBAR SWITCH AND ANALOG MATRIX The TDA9874A has one external analog stereo input one mono input one 2 channel and one single channel output port Analog source selector switches are employed to provide the desired TCL OVERSEAS HOLDINGS LIMITED Service Manual2 analog signal routing capability which is done by the analog crossbar switch section The basic signal routing philosophy of the TDA9874A is that each switch handles two signal channels at the same time e g left and right language A and B directly at the source Each source selector switch is followed by an analog matrix to perform further selection tasks such as putting a signal from one input channel say language A to both output channels or for swapping left and right channels The analog matrix provides the fun
20. 4 service Manual START UP Start up Management TCL OVERSEAS HOLDINGS LIMITED The Vi pin 8 is directly connected to the HV DC rail Vin This high voltage current source is start up Latched off E Switching Phase Phase Phase Figure 6 Hiccup Mode internally connected to the Vcc pin and thus is used to charge the Vcc capacitor The VCC capacitor charge period corresponds to the Start up phase When the Vcc voltage reaches 13V the high voltage 9mA current source is disabled and the device starts working The device enters into the switching phase It is to be noticed that the maximum rating of the Vi pin 8 is 700V ESD protection circuitry is not currently added to this pin due to size limitations and technology constraints Protection is limited by the drain substrate junction in avalanche breakdown To help increase the application safety against high voltage spike on that pin it is possible to insert a small wattage 1kQ series resistor between the Vin rail and pin 8 The Figure 6 shows the Vcc voltage evolution in case of no external current source providing current into the Vcc pin during the switching phase This case can be encountered in SMPS when the self supply through an auxiliary winding is not present strong overload on the SMPS output for example The Figure 16 also depicts this working configuration In case of the hiccup mode the duty cycle of the switching phase is in the range of 10
21. AE HEEN SYMBOL DESCRIPTION tuner AGC TakeOver Point TOP connection du ian MUTE 5 sound mute switch conection mt 6 PLL time constant connection CTA E not connected sound intercarrier input vso 13 video and sound intercarier ouput Lien AFC output Stage IF amplifier The VIF amplifier consists of three AC coupled differential amplifier stages Each differential stage comprises a feedback network controlled by emitter degeneration AGC detector IF AGC and tuner AGC The automatic control voltage to maintain the video output signal at a constant level is generated in accordance with the transmission standard Since the TDA9801 is suitable for negative modulation only the peak sync pulse level is detected The AGC detector charges and discharges capacitor Cacc to set the IF amplifier and tuner gain The voltage on capacitor Cacc is transferred to an internal IF control signal and is fed to the tuner AGC to generate the tuner AGC output current on pin TAGC open collector output The tuner AGC takeover point level is set at pin TOP This allows the tuner to be matched to the SAW filter in order to achieve the optimum IF input level Frequency detector and phase detector The VIF amplifier output signal is fed into a frequency detector and into a phase detector During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input a
22. As long as the overload is present this sequence repeats The SWITCHING PHASE duty cycle is in the range of 10 P l6 Service Manual TCL OVERSEAS HOLDINGS LIMITED 3 Transition from Normal to Pulsed Mode In this sequence the secondary side is reconfigured refer to the typical application schematic on page 13 The high voltage output value becomes lower than the NORMAL mode regulated value The TL431 shunt regulator is fully OFF In the SMPS stand by mode all the SMPS outputs are lowered except for the low voltage output that supply the wake up circuit located at the isolated side of the power supply In that mode the secondary regulation is performed by the zener diode connected in parallel to the TL431 The secondary reconfiguration status can be detected on the SMPS primary side by measuring the voltage level present on the auxiliary winding Laux Refer to the Demagnetization Section In the reconfigured status the Laux voltage is also reduced The Vcc self powering is no longer possible thus the SMPS enters in a hiccup mode similar to the one described under the Overload condition In the SMPS stand by mode the 3 distinct phases are The SWITCHING PHASE Similar to the Overload mode The current sense clamping level is reduced according to the equation of the current sense section page 5 The C S clamping level depends on the power to be delivered to the load during the SMPS stand by mode Every switching sequence ON O
23. FF is terminated by an OC as long as the secondary Zener diode voltage has not been reached When the Zener voltage 1s reached the ON cycle is terminated by a true PWM action The proper SWITCHING PHASE termination must correspond to a NOC condition The LW latch stores this NOC status The LATCHED OFF PHASE The MODE latch 1s set The START UP PHASE is similar to the Overload Mode The MODE latch remains in its set status Q 1 The SWITCHING PHASE The Stand by signal is validated and the 200A is sourced out of the Current Sense pin 2 4 Transition from Stand by to Normal The secondary reconfiguration is removed The regulation on the low voltage secondary rail can no longer be achieved thus at the end of the SWITCHING PHASE no PWM condition can be encountered The LW latch is reset At the next WORKING PHASE a NORMAL mode status takes place In order to become independent of the recovery time SWITCHING PHASE constant on the secondary side of the SMPS an additional reset input R2 is provided on the MODE latch The condition ldemag lt 24uA corresponds to the activation of the secondary reconfiguration status The R2 reset insures a return into the NORMAL mode following the first corresponds to 1V START UP PHASE Pulsed Mode Duty Cycle Control During the sleep mode of the SMPS the switch S3 is closed and the control input pin 3 is connected to TCL OVERSEAS HOLDINGS LIMITED Service Manual17 a 4 6V voltage source th
24. Figure 3 Demagnetization Block A latch is incorporated to turn the demagnetization block ICH output into a low level as soon s a voltage less than 50 mV is DMG Mp from Demag logic block wu Window i d omp Clock state until a new pulse is detected and to keep it in this generated on the output This avoids any ringing on the input signal which may alter the demagnetization detection For a higher safety the demagnetization block output is also directly connected to the Figure 4 Oscillator Block TCL OVERSEAS HOLDINGS LIMITED Service Manual 13 output which is disabled during the demagnetization phase The demagnetization pin is also used for the quick programmable OVP In fact the demagnetization input current is sensed so that the circuit output is latched off when this current is detected as higher than 120A This function can be inhibited by grounding it but in this case the quick and programmable OVP is also disabled Oscillator The MC44608 contains a fixed frequency oscillator It is built around a fixed value capacitor CT succesively charged and discharged by two distinct current sources ICH and IDCH The window comparator senses the CT voltage value and activates the sources when the voltage is reaching the 2 4V 4V levels OSC vu EL _ MEME NEED The complete PL ne i T demagnetization status Vcont L A Kl o i dM 24M Tt RSR SE E DMG is used to inhibit the I I ist F LI L I g Il q
25. R INTERFACE NPUT SWITCH Vus Scb AGC ADC Vi SOA Let FRU NCAM NICATFA IDENTIFICATION DEM ODRUL ATI OR DEMODULATKON ET nic 20 1381 XTALI XTALO NA DE MATRIX SUA E acum ODER DOI SYSCLK Lean M Keen pps 2 CHANEL Ven PEAR ANAL OGY CRESET DETECTION SATELLITE DECODER nma SUPPLY DOAI cs 55A S DO OPAMPS Ec WS s Lee BIS DIGITAL POST FILTER INTERFACE SELECTOR a 3 DACs SOK Hung TOAST 4A PS ANAL CX EXTH TDASBTAAHI CR CGSEHAH EXTL SWITCH MONCH EST 1 TEST2 i IP E CHANNEL E OUTPLT P2 DUT PUT BLFTERS TF BUFFERS oe OUTM om OUTRA For highly overmodulated signals a high deviation mode for monaural audio sound single carrier demodulation can be selected NICAM decoding is still possible in high deviation mode 6 FM IDENTIFICATION The identification of the FM sound mode is performed by AM synchronous demodulation of the pilot and narrow band detection of the identification frequencies The result is available via the I2C bus interface A selection can be made via the I2C bus for B G D K and M standards and for three different time constants that represent different trade offs between speed and reliability of identification A pilot detector allows the control software to identify an analog 2 carrier A2 transmission within approximately 0 1 s TCL OVERSEAS HOLDINGS LIMITED Service Manual23 Automatic FM dematrixing depending on the identification 1s possible 7
26. STAT contrast up timer afer standy off SECAM B Y BLACK ADJUST SECAM R Y BLACK ADJUST SUB BRIGHT shift data of BRTC TEXT RGB CONTRAST MAX TEXT RGB CONTRAST MIN SECAM MODE VOLUME 25 VOLUME 50 VOLUME 100 ei S Normal H SYNC max Normal H SYNC min Search H SYNC max Search H SYNC min KEY CALENDAR TV mode amp SOUND SYS M TV mode amp SOUND SYS M VIDEO CLVD YUV MODE CLTO CLTM CLVO CLVD bit setting KILLER OFF C GAMMA NTSC MATRIX ABL ABL SETUP TCL OVERSEAS HOLDINGS LIMITED Service Manual45 TB1254N RGB ABL I TB1254N WPS 3 0 4 D ABL point setup 03 YGAMMABLACKSTRETCH 45 Ion OSS DE VAGCSEECT 0 NEN GROUP a 1 33 3 3 01 V AGC reference 0 depends on YC Vcc 1 Depends on integrated regulator GROUP 14 KEY NOTE BOOK s s 5 Case When nois 2 1 TV hafc gain If nois 2 0 TV hafc gain depend on noise O 1 In video mode hafc gain NOIS HAFC DATA ien 2 Fix the hafc gain UCOM MCU DATA I 3 5 EP 01 I Ew 0 EN LA EN NEN NEN EN EN p end OSD OSD Horizontal Position volume bar picture bar half blue panel OSD mp 3 48 EM 09 NEN E TEN EN EN NEN NEED EN 00 TCL OVERSEAS HOLDINGS LIMITED P 46 service Manual PART VI Troubleshooting Flow chart No PIC No raster No Sound Fuse Bl own Is L804 4B NO Is the drain of um NO shorted to Q801
27. TCL OVERSEAS HOLDINGS LIMITED Service Manual 3 SERVICE MANUAL FOR M28 ONE CHIP CHASSIS _ PART I Servicing Precautions When working the unit is with high voltage about 25K V inside So to avoid the risk of electric shock be careful to adjust the chassis 1 Only qualified personnel should perform service procedures 2 All specification must be met over line voltage ranger of 110V AC to 240V AC 50Hz 60Hz 3 Do not operate in WET DAMP conditions 4 Portions of the power supply board are hot ground The remaining boards are cold ground 5 Discharge of CRT anode should be done only to CRT ground strap 6 When fuse blow ensure to replace a fuse with the same type and specification 7 Keep the wires away from the components with high temperature or high voltage 8 When replacing the resister with high power keep it over the PCB about 10mm 9 The CRT anode high voltage has been adjusted and set in the factory When repairing the chassis do not make the high voltage exceed 27 5KV The beam current is OuA Generally the high voltage is set on 25 5KV 1 5KV The beam current is 700uA The values of parameters above are for information only 10 Before return the fixed unit do check all the covering of wires to ensure that not fold or not short with any metal components Check the entire protection units such as control knobs rear cabinet amp front panel insulation resister amp capacitor mechanical insulators and so on
28. citor D301 and C303 make up of a voltage pump up circuit La7840 output a vertical kickback impulse from pin7 to locate the OSD characters 3 Horizontal Output Section The processor outputs horizontal drive impulse from pin 13 The drive impulse is done with voltage division by R238 and R401 and then comes to the base of the drive triode Q401 C401 is used to eliminate the noise in the H drive impulse T401 is a horizontal drive transformer Q402 is a horizontal output triode with a damper inside L402 is connected with the emitter of the horizontal output diode to eliminate the radiation and to improve the distortions at the cross of vertical and horizontal white P D Service Manual TCL OVERSEAS HOLDINGS LIMITED lines C406 and C402 are retrace capacitors and C421 is an s correct capacitor L441 and L442 are horizontal linear inductors R441 is used to eliminate the parasitic oscillation caused by horizontal linear inductors C420 R413 and D411 are used to correct the M distortion in horizontal direction C422 R415 and R415A are coupling components for the horizontal retrace impulse which are feed back to pin 12 of TMPA8803CSN D404 is a negative peak killer diode Horizontal scanning distortion and the method to compensate it The deflect coil and the horizontal output triode have some resistance R while they are ducting The resistance R will cause the non linear distortion which means that the right direction scanning speed of the elec
29. ctions given in the follow table Automatic matrixing for TV applications is also supported All switches and matrices are controlled via the C bus Analog matrix functions 2 EXTERNAL AND MONO INPUTS The external and mono inputs accept signal levels of up to 1 4 V RMS By adding external series resistors to provide suitable attenuation the external input could be used as a SCART input Whenever the external or mono input is selected the output of the DAC is muted to improve the crosstalk performance 3 AUDIO DACS The TDA9874A comprises a 2 channel audio DAC and an additional single channel audio DAC for feeding signals from the DSP section to the analog crossbar switch These DACS have a resolution of 15 bits and employ four times oversampling and noise shaping 4 AUDIO OUTPUT BUFFERS The output buffers provide a gain of 0 dB and offer a muting possibility The post filter capacitors of the audio DACS are connected to the buffer outputs 5 STANDBY MODE source select matrix mone CART EX TIL EXTIR e l SS J ANE DACL l E OLITR L NEREM DACR l l l m KG OUTM l l l l l S 1 MHBSSS Switch diagram for the analog audio section The standby mode disables most functions and reduces power dissipation of the TDA9874A It EE reL OVERSEAS HOLDINGS LIMITED provides no other function Internal registers may lose their information in standby mode Therefore the device n
30. e QC width adjustment adjustment PAL adjustment NTSC Checking ALIGNMENT PROCEDURE FOR M28 CHASSIS I Adjustment of B Voltage 1 Apply 110 240VAC 5V to mains power input and Philips standard testing pattern to RF input 2 Adjust VR830 in STANDARD mode until voltage at B is 112V 0 25V ID NICAM Adjustment for NICAM model only 1 Apply a 38 9MHz color bar with NICAM signal to the IF input 2 Monitor the DC voltage at pin 15 of IC1101 3 Adjust T1101 until the voltage at pin 15 of IC1101 becomes 2 5 0 1V 4 Then check the waveform at pin 4 and 6 of P1103 and it must show correct audio signal III The alignment of RFAGC choose A or B A 1 Connect the detector shown below to collector of Q101 2 Receive a grey scale signal with 70dB amplitude 3 Adjust RFAGC item until the output of the detector becomes 0 8 Vpp Ss NG fi Collector C1 m ToCRO of O10 Ve H 100k O00pF B 1 Receive a grey scale signal with 60dB amplitude 2 Adjust RFAGC data until the noise of the picture just disappear IV Adjustment of Sub contrast Sub tint and Sub colour for NSTC and PAL signal 1 Enter D mode and connect the probe of Oscilloscope to the conjunction between R201 and P201 B out P 40 service Manual TCL OVERSEAS HOLDINGS LIMITED 2 Apply the Grey scale Colour bar NTSC signal to the AV input in STANDARD status 3 Select CNTC to adjust the sub contrast until that the amplitude A is 2 2VP P as
31. ed sence menus rcc OVERSEAS HOLDINGS LIMITED No Col or NO Check the p waveform at pi n6 amp 7 of 1C201 Does the TV signal too weak Check the col or system setting Check X001 C021 C022 Yes OK Check the Re setti ng Check the peripheral antenna components of pi n47 of 1C201 Fig 9 No color The channel cannot be Switched Check the NG Check the peripheral voltage of pinl components of Check the voltages of pin4 amp pind of the tuner amp pinol of C201 pin 1 amp pin6l of C201 Replace the been Replace 1C201 Fig 10 The channel can not be switched TCL OVERSEAS HOLDINGS LIMITED Service Manual53 One Horizontal Line Check the deflect yoke NG junction terminal Correct it 0 K Check the 24V Check the 24V voltage at pin2 power supply of 1C301 circuit Check 1C201 ipheral Check C301land its peripheral Components Fig 11 One horizontal line PE 24 Service Manual No PIC No Sound Noise dots Check the AGC voltage of the tuner de Check the AGC section circuit OK Check the VT voltage of the tuner Check the VT section circuit TCL OVERSEAS HOLDINGS LIMITED OK Check the voltages of band select term nals of the tuner de Check band select section circuit Check Q101 and Its peripheral Components
32. eeds to be initialized on returning to normal operation This can be accomplished in the same way as after a Power on reset rona i STEREO Wer ANALOG MATRIX BUFFER OUTPUT CROSSBAR SWITCH NICAM NICAM LEVEL MONO Des DEMODULATOR DECODER ae ADJUST UI CS BUE OUTPUT DIGITAL CROSSBAR SELECT EMIAN FM AM ADAPTIVE FIXED 2CHANNEL LEVEL MATRIX LEVEL Ge bus DEMODULATOR DE EMPHASIS DECODER ADJUST DE EMPHASIS ADJUST IA Audio signal flow 4 TDA7057AQ 2x8 W stereo BTL audio output amplifier with DC volume control Pinning we 2 noteomected 0 vp 4 postive supply voltage aa s Tiet vcr 7 DC volume conor Toutes s positive outpat2 PGNDi 9 power ground FUNCTIONAL DESCRIPTION The TDA7057AQ is a stereo output amplifier with two DC volume control stages The device is designed for TVs and monitors but is also suitable for battery fed portable MSATIE recorders and radios In conventional DC volume control circuits the control or input stage is AC coupled to the output stage via external capacitors to keep the offset voltage low In the TDA7057AQ the two DC volume control stages are integrated into the input stages so that no TCL OVERSEAS HOLDINGS LIMITED Service Manual29 coupling capacitors are required and a low offset voltage is still maintained The minimum supply voltage also remains low The BTL principle offers the following advantages Lower peak value of
33. el is cut off and this is a kind of protection method of Toshiba chassis for the CRT If there is something wrong which make TMPA8803 not receive the FBP impulse through pin12 with the scanning section TMPA8803 will change the RGB output to black level via the I2C bus automatically At the same time TMPA8803CSN will make the beam current smallest to prevent the screen of the CRT not be hurt by the electron beam We check the circuit according to the clew above and find that D404 is breakdown so the FBP PE 26 Service Manual TCL OVERSEAS HOLDINGS LIMITED impulses disappear and screen is black 6 Screen is white with visible retrace lines Generally this kind of failure may occur at the section of the end video amplifying The cathode current cannot be cut off during the traceback time because the three cathodes current is too large and the three cathodes voltage is too low Only the failure of bias circuit can make the three cathodes not be cut off at the same time because the fail probability of the three video amplifying circuits is very small We find that there is a short at the collector of Q510 This matter makes the emitters of Q501 502 503 on the lower voltage The retrace lines appear on the screen for the lower cathode voltage We replace Q510 with good one and all is ok 7 One vertical line on the screen The failure means that there is something wrong with the horizontal deflecting circuit and the horizontal scanning ha
34. et in the mute state 3 TDA98744A Digital TV sound demodulator decoder SYMBOL DESCRIPTION EXTIR ES external audio input right channel m com 2 oum s analogoutputmono SSS Vssa4 6 analog ground supply 4 for analog back end cireuiny om s Linnen OOO EST 9 analog supply voltage rbuckendekadnyS V O uu LA UA I digital ground supply 2 core circuitry SCK 37 i SCK Ia I2S bus clock input output TCL OVERSEAS HOLDINGS LIMITED Service Manual21 SYSCLK system clock output Ss VDDD3 digital supply voltage 3 digital I O pads VSSD3 digital ground supply 3 digital I O pads first general Se I O pin FUNCTIONAL DESCRIPTION MONOIN Description of the demodulator and decoder section t 1 SIF INPUTS 4 8503 Two inputs are provided pin SIF1 and pin SIF2 For higher SIF MEA signal levels the SIF input can be attenuated with an internal SYSELK Switchable 10 dB resistor divider As no specific filters are oer integrated both inputs have the same specification giving WS flexibility in application The selected signal is passed through Spo an AGC circuit and then digitized by an 8 bit ADC operating at SDA 24 576 MHz SCL TDAS8B74APS 22 Yonas 2 AGC Vesaa The gain of the AGC amplifier is controlled from the ADC cReseT Output by means of a digital control loop employing hysteresis sea The AGC has a fast attack behaviour to prevent ADC overloads js and a slow decay behaviour to prevent AGC oscilla
35. eter to measure of B terminal The voltage of B terminal is OK While connect the B power supply we measure the B again and we found the voltage is OV There must be something wrong with the horizontal power supply circuit which is supplied by the B voltage Having checked the horizontal output triode we find that there is a short between the collector and the emitter of Q402 The defective horizontal output triode is replaced and the machine is OK 4 The horizontal output triode is too hot The low or heavy drive current can cause this phenomenon The resolution of right area of the raster is low So we make a suspicion that the low drive current for horizontal output triode make the current linearity worse We check the horizontal drive section The power supply for it is OK Two 1 5W resisters in parallel compose R402 One of the twos is cold soldering and the resistance of R402 is changed from 2 4K to 4 8K The voltage that is added to T401 drop down and therefore the driver current is weak The work temperature of horizontal output triode is rising Having re soldering R402 the temperature of horizontal output triode is OK 5 Sound Ok no picture Black Screen The standby and working status can be changed freely But the screen is black Menu or picture is invisible The heater is lighting so the horizontal scanning circuit is ok Retrace lines are visible if we adjust the screen voltage All these above indicate that RGB lev
36. ffect of ture linear sawtooth current the E W sides of the picture are stretched That is the extension distortion Usually we add a S correct capacitor in series with the deflecting coil to compensate this kind of distortion The integral character of S correct capacitor make the current waveform S shape So the scanning speed of electron beam at the center of screen is faster than the one at the side So this action can correct the extension distortion C421 1s a S correct capacitor The capacitance is inverse ratio with the correcting effect P 10 service Manual TCL OVERSEAS HOLDINGS LIMITED PART IV IC Pin Description 1 MC44608 High Voltage PWM Controller CF ee em The Demag pin offers 3 different functions Zero voltage crossing detection 1 ense 50mV 24 A current detection and 120 A current detection The 24 A level is used to detect the secondary reconfiguration status and the 120 A level to detect an Over Voltage status called Quick OVP The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the power MOSFET When Isense reaches 1V the Driver output pin 5 is disabled This is known as the Over Current Protection a Lou function A 200 A current source is flowing out of the pin 3 during the start up phase and during the switching phase in case of the Pulsed Mode of operation A resistor can be inserted between the sense resistor and the pin 3 thus a programmable pea
37. ing CPU specification System setting of M28 oan keo RCUTOR mu c ocurog Im nm Bcurog mu nm mp E oam kvi HPOS Horizont Posion sonz 0D vss vscomckndm Jm PE 42 Service Manual TCL OVERSEAS HOLDINGS LIMITED VEK VBKSu Sp 9 GROUP3 KEY3 IN CNTX CONTRAST MAX CNIN CONRASIMN 08 coN corun OOOO o oam un SUB COLOR Cr input 21 gain up NN porous Rs OOOO O p Lo Sg 1 GROUP6 KEY6 OPT OPTION DATA adjust mode 0 engineer 1 factory 0 normal 1 mute sound when no sync in TV 1 0 NORMAL 1 mute video during change channle ia au gain 0 50khz 1 25khz nu when no sync 1 AFT 0 no AFT nu AV change 1 mute 0 no mute sound TCL OVERSEAS HOLDINGS LIMITED Service Manual43 m standby state 0 high standby 1 low standby ae E o OVRMob o innen E FLGI M E Secam O disable enable LOGO O disable 1 enable TINT por PIF SELECT 01 45 75 MHZ 011 38 9MHZ 100 38MHZ APC I AUTO 0 PRESET STBY 0000 O hd kill timer set 40us when STBY 1 1 after AC on 0 standby 1 power on after AC power on 1 ref STBY 1 0 last state auto sleep function NICAM 0 DISABLE I ENABLE MODEO when mode0 7 1 preset sound system after ASM 00 BG 01 I 10 DK 11 M 44 service Manual TCL OVERSEAS HOLDINGS LIMITED pos num select 0 238 1 100 MUTT standby gt wake time
38. its may be defined by writing appropriate values to two registers in the C bus section When the number of errors in a 128 ms period exceeds the upper error limit the auto mute function will switch the output sound from NICAM to whatever sound is on the first sound carrier FM or AM or to the analog mono input When the error count is smaller than the lower error limit the NICAM sound is restored The auto mute function can be disabled by setting bit AMUTE to logic 1 In this case clicks become audible when the error count increases The user will hear a signal of degrading quality If no NICAM sound is received the outputs are switched from the NICAM channel to the 1st sound carrier A decision to enable or disable the auto mute is taken by the microprocessor based on an interpretation of the application control bits C1 C2 C3 and C4 and possibly any additional strategy implemented by the user in the microcontroller software When the AM sound in NICAM L systems is demodulated in the Ist sound IF and the audio signal connected to the mono input of the TDA9874A the controlling microprocessor has to ensure switching from NICAM reception to mono input if auto muting is desired This can be achieved by P 24 service Manual TCL OVERSEAS HOLDINGS LIMITED setting bit AMSEL 1 and bit AMUTE 0 10 CRYSTAL OSCILLATOR The digital controlled crystal oscillator DCXO is fully integrated Only an external 24 576 MHz crystal is required
39. k current detection can be performed during the SMPS stand by mode Comedi aon A feedback current from the secondary side of the SMPS via the opto coupler is 3 injected into this pin A resistor can be connected between this pin and GND to allow the programming of the Burst duty cycle during the Stand by mode The current and slew rate capability of this pin are suited to drive Power MOSFETs This pin is the positive supply of the IC The driver output gets disabled when the voltage becomes higher than 15V and the operating range is between 6 6V and 13V An intermediate voltage level of 10V creates a disabling condition called Latched Off phase This pin is to provide isolation between the Vi pin 8 and the VCC pin 6 This pin can be directly connected to a 500V voltage source for start up function of the IC During the Start up phase a 9 mA current source is internally delivered to the VCC pin 6 allowing a rapid charge of the VCC capacitor As soon as the IC starts up this current source is disabled Demag sense oat CW eco c t F TCL OVERSEAS HOLDINGS LIMITED Service Manual ll OPERATING DESCRIPTION Regulation The pin 3 senses the feedback current provided by the opto coupler During the switching phase the switch S2 is closed and the shunt regulator is accessible by the pin 3 The shunt regulator voltage is typically 5V The dynamic resistance of the shunt regulator represented by the zener diode is 20Q
40. l of 1 V p p is present at pin VSO Buffer amplifier and noise clipper The input impedance of the 7 dB wideband CVBS buffer amplifier with internal feedback is suitable for ceramic sound trap filters Pin CVBS provides a positive video signal of 2 V p p Noise clipping is provided internally Sound demodulation LIMITER AMPLIFIER The FM sound intercarrier signal is fed to pin SI and through a limiter amplifier before it 1s demodulated The result is high sensitivity and AM suppression The limiter amplifier consists of 7 stages which areinternally AC coupled in order to minimizing the DC offset FM PLL DETECTOR The FM PLL demodulator consists of an RC oscillator loop filter and phase detector The oscillator frequency is locked on the FM intercarrier signal from the limiter amplifier As a result of this locking the RC oscillator is frequency modulated The modulating voltage AF signal is used to control the oscillator frequency By this the FM PLL operates as an FM demodulator AF AMPLIFIER The audio frequency amplifier with internal feedback is designed for high gain and high common mode rejection The low level AF signal output from the FM PLL demodulator is amplified and buffered in a low ohmic audio output stage An external decoupling capacitor CDAF removes the P 20 Service Manual TCL OVERSEAS HOLDINGS LIMITED DC voltage from the audio amplifier input By using the sound mute switch pin MUTE the AF amplifier is s
41. m lt HEN recharge of the CT capacitor Clock E r d M T i Thus in case of incomplete l transformer demagnetization LEE MUS NE CS NE the next switching cycle is postpone until the DMG 1 Signal appears The TE Ba 1 oscillator remains at 2 4V corresponding to the DMG T r1 D prim d x Ed sawtooth valley voltage In this way the SMPS is working in the so called SOPS mode Self Oscillating Power Supply In that case the effective switching frequency is variable and no longer depends on the oscillator timing but on the external working conditions Refer to DMG signal in the Figure 5 The OSC and Clock signals are provided according to the Figure 5 The Clock signals correspond to the CT capacitor discharge The bottom curve represents the current flowing in the sense resistor Rcs It starts from zero and stops when the sawtooth value is equal to the control voltage Vcont In this way the SMPS is regulated with a voltage mode control Overvoltage Protection The MC44608 offers two OVP functions a fixed function that detects when Vcc is higher than 15 4V a programmable function that uses the demag pin The current flowing into the demag pin is mirrored and compared to the reference current Iovp 120uA Thus this OVP is quicker as it is not impacted by the Vcc inertia and is called QOVP In both cases once an OVP condition is detected the output is latched off until a new circuit P 1
42. memory from inadvertent erase write The Write Control signal is used to enable WC VIL or disable WC VIH write instructions to the entire memory area When unconnected the WC input is internally read as VIL and write operations are allowed 38 Service Manual TCL OVERSEAS HOLDINGS LIMITED When WC 1 Device Select and Address bytes are acknowledged Data bytes are not acknowledged 9 LA7840 Vertical Deflection Output Circuit THERMAL PROTECTION GND Ver OUTPUT OUTPUT STAGE Vcc NON INV INPUT INVERTING INPUT Vcc PUMP UP OUT The LA7840 is a vertical deflection output IC for TVs and CRT displays with excellent image quality that use a BUS control system signal processing IC This IC can drive the direct even including a DC component deflection yoke with the sawtooth wave output from the BUS control system signal processing IC Because the maximum deflection current is 1 8 Ap p the LA7840 is suited for small and medium screen sets LA7840 ogl L2 SANYO SIP7H TCL OVERSEAS HOLDINGS LIMITED Service Manual 29 PART V Adjusting Description Flowchart chart of alignment procedure for M28 chassis B NICAM Electrical properties RF AGC adjustment Adjustment checking for chassis adjustment Sub brightnes White balance l Adjustment of screen Sub color amp Sub tint s Adjustment Adjustment Aging voltage and focus adjustment Pincushion and screen Screen center amp size Screen center amp siz
43. nal cross the IF amplifier circuit pre IF amplifier to get a gain about 15dB By the coupling capacitance c110 and the match resistance R114 56 2 the input resistance of the pre IF amplifier match with the tuner The signals pass a parallel connection circuit with voltage NFB which combines the advantages of low output impedance of wide dynamic range and of less components R116 is a voltage NFB component which is used to adjust the gain in the pass band Having been amplified by the IF amplifier the IF signal pass a SAW and then come into TMPA8803CSN from pin41 and pin42 with balance The processor deal the IF signal with IF detection PLL demodulation IF AGC AFC video peak detection and color system recognition etc then output a AGC signal from pin 43 to the tuner to adjust the input amplitude of IF signal R217 C218 and C219 make up of picture IF PLL circuit which is used to control IF detection C201 output a sound IF signal from pin 31 and a video signal which will be amplified by Q209 from pin30 The processor output a sound system control signal to Q208 If the processor output a high level from pin59 sound detection Q208 is on and a video signal is separated from the IF signal by a trap With capacitance coupling the video signal comes into IC201 from pin26 and then it is selected by inner switches and output from pin45 Having come out the video signal will be amplified by Q210 and a sync signal will be separated by a s
44. nd the VCO signal After frequency lock in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal The DC current of TCL OVERSEAS HOLDINGS LIMITED Service Manual 19 either frequency detector or phase detector is converted into a DC voltage via the loop filter which controls the VCO frequency Video demodulator The true synchronous video demodulator is realized by a linear multiplier which is designed for low distortion and wide bandwidth The vision IF input signal is multiplied with the in phase component of the VCO output The demodulator output signal is fed via an integrated low pass filter f 12 MHz for suppression of the carrier harmonics to the video amplifier VCO AFC detector and travelling wave divider The VCO operates with a symmetrically connected reference LC circuit operating at the double vision carrier frequency Frequency control is performed by an internal variable capacitor diode The voltage to set the VCO frequency to the actual double vision carrier frequency is also amplified and converted for the AFC output current The VCO signal is divided by 2 with a Travelling Wave Divider TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency Video amplifier The composite video amplifier is a wide bandwidth operational amplifier with internal feedback A nominal positive video signa
45. oks bad Selecting less H AFC gain makes the picture looks better 2 When a noisy signal comes in SECAM system causes very strong color noise Reducing color saturation level makes noisy impression better 3 When a very noisy signal comes in the vertical frequency detector sometimes makes miss detection and causes vertical jittering Selecting the auto 50Hz mode or auto 60Hz mode according to the vertical frequency information just before may solves the vertical jittering 13 Signal Detection Flags There are some flags on the READ BUS registers They indicate that a certain signal is detected at the moment But reliability of a detection result is not so accurate if checking only one flag so that confirming several flags which means similar result by each other at the same time is recommended 14 Control the Signal Processor The signal processor is connected with the micro controller by means of internal wiring All functions of the signal processor can be controlled through IIC bus which is a part of the internal connections 15 Color system Automatic mode for Southern America The Automatic color identification system for SA AUTO mode may not work well In order to make sure automatic color system identification in South America are design the control software with following algorithm WR l T E BUS Color System 5A ALTO READ BUS v F req Color System 60Hz M PAL t M PAL BYW J SS SMT SC WRITE BUS olo
46. om FM to NICAM or vice versa 2 NICAM PATH The NICAM path has a switchable J17 de emphasis 3 NICAM AUTO MUTE If NICAM is received the auto mute is enabled and the signal quality becomes poor The digital crossbar switches automatically to FM channel 1 or the analog mono input as selected by bit AMSEL This automatic switching depends on the NICAM bit error rate The auto mute function can be disabled via the C bus 4 FM AM PATH A high pass filter suppresses DC offsets from the FM demodulator that may occur due to carrier frequency offsets and supplies the FM monitor function with DC values e g for the purpose of microprocessor controlled carrier search or fine tuning functions An adaptive de emphasis 1s available for Wegener Panda 1 encoded satellite programs The de emphasis stage offers a choice of settings for the supported TV standards The 2 channel decoder performs the dematrixing of 2 L R R to L and R signals of 1 2 L R and Lt R to L and R signals or of channel 1 and channel 2 to L and R signals as demanded by the different TV standards or user preferences Automatic FM dematrixing is also supported P 26 service Manual TCL OVERSEAS HOLDINGS LIMITED Using the high deviation mode only channel 1 mono can be demodulated The scaling is 6 dB compared to 2 channel decoding 5 MONITOR This function provides data words from the FM demodulator outputs and FM and NICAM signals for external use such
47. on connecting the pin18 to GND via a IOk ohm resister is recommended 10 AKB Auto Kine Bias system TMPASS803 provides AKB capability with the software control for automatic dark and bright level control at the manufacture s factory TMPA8803 includes circuits below as hardware on the chip 1 AKB reference pulse generator 2 IK feedback input 3 comparaters to check feedback level 4 read bus to know the result of comparison The software can achieve AKB functionality by 5 analyzing the comparison result 6 controlling cutoff and drive through the IIC bus 11 Transparent OSD interface TMPA8803 provides a transparent OSD capability A conventional OSD system provides a half tone function for OSD interface by reducing the gain of a main picture signal during high period of Ym signal from the micro controller TMPA8803 has one more control line as T for OSD from the micro TCL OVERSEAS HOLDINGS LIMITED Service Manual3 gt a controller which enables to put a color on the same area of half tone so that software can achieve a see through color menu by using the transparent OSD 12 Noise Level Detection The Noise level detector is integrated The result can be read through the IIC bus According to the result the micro controller can adjust level of some controls in the signal processor For example 1 When a noisy signal comes in horizontal synchronization is influenced and the picture on the screen lo
48. ontal output triode down 10 Some channel cannot be searched out This is a defect of tuning function not the failure of MCU or the tuner Perhaps the input channel signal cannot reach the MCU Besides the AFA AFB circuits intergrated inside the TMPA8803 M117 includes a horizontal sync separation circuit which is composed by Q202 and Q203 This circuit can separate the horizontal sync signal from the composite signal which is output from pin45 of TMPA8803 And the H sync signal input to MCU from pin62 This is a mark for MCU to judge whether the set has received a channel 11 No PIC no sound no raster remote and local key unavailable First we should check the power section As this example the switch power supply circuit can work TCL OVERSEAS HOLDINGS LIMITED Service Manual normally and can output a main power of 112V We checked the second voltage regulation section E and we found that the H Vcc 9V was about 4 5V only As the 18V power supply was OK we suppose that there should be a short in the load section We found a short at pin17 of IC201 Q207 and Q206 were not damaged C030 was broken down Once we havd replaced C030 and IC201 H Vcc was OK Because C030 as short the base voltage of Q206 became higer And the voltage of H Vcc became higher also So IC201 was damaged S 3
49. pin4 pin 5 pi n6 of P201 ae OK Check Q501 Q502 Q503 and their peripheral component s E Check the waveform at pi n26 of 1C201 OK m Check the H sync waveform at pin62 of 1C201 NG OK NG OK Check the waveform at pi n30 of 1C201 Repl ace C201 Check the waveform at pin45 of C201 OK Check 0202 Q203 Q210 and their peripheral Component s Fig 4 No picture raster OK sound OK Check C201 and its peri phera Component s A NG TCL OVERSEAS HOLDINGS LIMITED Service Manual Check the horizontal section circuit No raster No PIC Sound OK Check the heater voltage Is it 6 3V E No Is the horizontal circuit 0K Check the video ampl ying section Check the R G B cathode voltage voltage Check the screen I Replace the CPT Check the voltage of pin10 of the FBT NG o Check R407 Replace the CPT Re adjust the screen knob on the FBT Fig 5 No raster no picture sound OK Replace the FBT NG gt Replace R407 ESO service menus rcc OVERSEAS HOLDINGS LIMITED Pic OK No Sound NE Check the Vcc Check the vol tage at pi n4 MG peri pheral of 1C601 sup
50. pl y circuits of pin4 of C601 a Check the vol NG Check the NG control voltage __ waveformat Replace 1 201 at pinl of 1 C601 pi n59 of 1C201 OK OK Check the Check the E M the i E e ais f d between pi n8 amp 10 LONPONENCS 3 KE and pin11813 of pinl of C60 with them ren NG 7 Check the i nput OK Check the S s du BLUR p Ce H e et NG el ace 1C201 ms pi n38 of 1C201 OK OK z Check Q609 and its peri pheral components Replace C601 Fig 6 Picture OK no sound TEE T Tuning control not work Is the voltage Can the VT Check the tuner of BM termi s voltage vary Tes 0101 1C201 and from 0 to 30V IF section of the tuner 30 while tuni ng CLPOEUTT Check the circuit from pin60 of 1C201 to VT termi nal of the tuner Check the 9V power supply circuit for the tuner Fig 7 Tuning control not work The channels cannot be stored NE Check the H sync Check waveform at Check Q202 Q203 Gen ua d impulse waveform NG pin45 of IC201 n and their Ok eeh at pin62 of with video signal peri pheral peripheral C201 nput components wey CIF CUI CS E r Check C001 and Check 1 C20 Repl ace the fail C201 components Fig 8 The channel can not be stor
51. proval 3 Basic Features of Controller 3 1 Channel Tuning Method Voltage Synthesizer TCL OVERSEAS HOLDINGS LIMITED Service Manual 5 3 2 Presettable Program 100 Programs 3 3 Tuning for VHF and UHF Bands Auto Manual Fine Tuning 3 4 Picture and Sound Adjustment Bright Contrast Color and Volume Control TINT Control NTSC Sharpness Control 3 5 OSD General Features Volume Brightness Contrast Color Program Band Auto Search Manual Tune Muting AV and Sleep Timer NICAM and Dual Language German Stereo Indicator 3 6 Sleep Timer 10 120 Minutes with 10Min Increment 3 7 Auto Off When No Broadcasting Signal 15 min 3 8 Full Function Infrared Remote Control 3 9 Remote Effective Distance 8m 4 Construction of Front Panel Main Power Switch Remote Sensor Standby Indicator Menu Select TV AV Select Program and Volume Up Down 5 Construction of Real Panel 75Q Aerial Terminal RCA Socket Audio R L In Out Video In Out Y U V Input 6 Other Information 6 1 Colour Temperature 9300K X 284 Y 299 6 2 Magnetic Field Bv 0 2 0 5Gs WES sie manuai rcc OVERSEAS HOLDINGS LIMITED PART II Brief Introduction on Chassis AV INPUT L OUTPUT lt RF IN TUNER Wed NICAM BD AUDIO AMP il R G B ORT bi DRIVE DER Ss REMOTE REMOTE CONTROL CONTROL RECEIVER H OUTPUT H DRIVE FBT SWITCH POWER L MC44608 The TV signal is amplified by the frequency mixing circuit of the tuner Then the t
52. r System M PAL WRITE BUS Color System LI PAL WRITE BUS olor System SA AUTO 56 service manui reL OVERSEAS HOLDINGS LIMITED 6 HEF4066BP Quadruple bilateral switches DESCRIPTION has two input output terminals Y Z and an active HIGH e VDD a low impedance bidirectional path between Y and Z connected to VSS the switch is disabled and a high impedar condition The HEF4066BP is pin compatible with the HEF4016B but exhibits a much lower ON resistance In addition the ON resistance is relatively constant over the full input signal range 7 TC9028F INFRARED REMOTE Functional diagram CONTROL TRANSMITTING CHIP EQ to E3 enable inputs TC9028F is CMOS LSI for Infrared Remote Control Transmitting suitable for Remote Controlling TV VCR Video Disk CD Player etc Using a 4bit Microcontroller various transmittings are structured by a programming PIN CONNECTION TOP VIEW Vpp Power LN sind 3V Typ 1 2 rz Supply a for Resonator connecting pins Connects 3 P52 ceramic resonator with capacitor Built in d P51 Ss for Osc feedback resistance 5 p33 Reset Input RST for going reset Be held to L J instruction cycles 6 P22 Input Port PO 5 8 Abit input port Built in pulldown 7 B P21 resistance B P20 UO Port P1 Abit UO ports with latch Built in pulldown l d n I O Port P2 13 16 resistance T j Si Port Pch open drain output port 10 Piz ior Port Hiah current output por
53. r switch Figure 2 Current Sense The maximum current sense threshold is fixed at 1 V The peak current is given by the following P 12 Service Manual TCL OVERSEAS HOLDINGS LIMITED equation lOKmax 1 Rsense 2 A In stand by mode this current can be lowered as due to the activation of a 200uA current source Ipkmax sTBY The current sense input consists of a filter 6kQ 4pF and of a leading edge blanking Thanks to that this pin is not sensitive to the power switch turn on noise and spikes and practically in most applications no filtering network is required to sense the current Finally this pin is used as a protection against over currents Isense gt I as areduction of the peak current during a Pulsed Mode switching phase The overcurrent propagation delay is reduced by producing a sharp output turn off high slew rate This results in an abrupt output turn off in the event of an over current and in the majority of the pulsed mode switching sequence Oscillator Buffer Output Demagnetization Section The MC44608 demagnetization detection consists of a Y comparator designed to compare the Vcc winding voltage to a ee e 1 reference that is typically equal xd to 50mV 50 20 mV Idemag DMG L This reference is chosen low to Em m e T Current Mirror demagnetization detection even increase effectiveness of the during start up
54. re shoot and over shoot symmetrically 7 Scan Velocity Modulation SVM The SVM output is available for a large screen size TV The SVM or the monitor output is selectable at pin45 through the IIC bus The SVM gain and timing is also selectable to match an external SVM drive circuit 8 Chroma demodulator The multi color chroma demodulator is integrated with the automatic color system detection The 1 H delay line is integrated on the chip for PAL chroma demodulation The 1H delay line can acts as a 3 service menus rcc OVERSEAS HOLDINGS LIMITED chroma comb filter on NTSC chroma system 9 Base Band Color System TMPA8803 features a base band color system for a YCbCr inputs capability fora DVD and a SDTV signals Those signals are demodulated out side of TMPA8803 so that color signals Cb Cr has different color level different demodulation angle and different relative amplitude from the color signals demodulated by the internal chroma demodulator of TMPA8803 The base band color system is required to have control functions of color saturation TINT and relative amplitude and TMPA8803 has all of these functions in it Because of base band TINT function TMPAS88093 has capability to control PAL TINT which is basically hard to control on a conventional signal processor IC Of course the control software can inhibit the PAL TINT function Y CbCr inputs are also available for PIP operation with Ys input at pin18 In case of no PIP applicati
55. ru a 500 resistor The discharge rate of the Vcc capacitor is given by Icc latch device consumption during the LATCHED OFF phase in addition to the current drawn out of the pin 3 Connecting a resistor between the Pin 3 and GND Rpputsgp a programmable current is drawn from the Vcc through pin 3 The duration of the LATCHED OFF phase is impacted by the presence of the resistor Rppursep The equation 3 shows the relation to the pin 3 current Pulsed Mode Phases Equations 1 through 8 define and predict the effective behavior during the PULSED MODE operation The equations 6 7 and 8 contain K Y and D factors These factors are combinations of measured parameters They appear in the parameter section K factors for pulsed mode operation page 4 In equations 3 through 8 the pin 3 current is the current defined in the above section Pulsed Mode Duty Cycle Control 2 TDA9801 Single standard VIF PLL demodulator and FM PLL detector FUNCTIONAL DESCRIPTION Vp 5V 8 V 3 4 Jpc Vp TPLL veor wco1 AFC CND INTERNAL TRAVELLING REFERENCE WAVE AFC AF a AF VOLTAGE DIVIDER DETECTOR AMPLIFIER 10 DAE C 3 STAGE DAF IF AMPLIFIER H FREQUENCY DETECTOR DETECTOR VIDEO VIF2 2 AND PHASE DEMODULATOR AMPLIFIER DETECTOR LE LIMITER ADU TDA9801 AMPLIFIER AGC DETECTOR CVBS MUTE n c takeover i p sound SOUND SOUND TOP Car point zl 2 TRAP FILTER tuner AGC video and intercarner WH
56. s stopped For the traceback impulses from the primary coil of the FBT still exist the heater voltage and EHT voltage affect the display of vertical line in the screen We check the horizontal deflecting section and we find that R411 has been breakdown and the terminal pad of L412 has been damaged by high temperature The L412 is heavier than the other small components and it is supported by two legs So the legs are easy to loose to cause the cold soldering And the deflecting current all pass R411 and R411 is blew 8 No AV signal input First we we checked the AV input circuit but not find anything abnormal So we exchange TV input channel and AV input channel The AV signal can be displayed normally So there is something wrong with the inner circuit of Pin24 of IC201 Having replaced TMPA8803CSN all is OK 9 Fuse blew once switch the set on If the failure happen first we should check the rectifier circuit and the switch power circuit to find whether there are some short components Second we should check whether there are shorts at the horizontal output section While we did with this failure we found a short at the load section of B power supply We checked the horizontal output triode In addition a short happened between the collector and the emitter there was an open inside the retrace cap C406 We can draw a conclusion that the open make the retrace time less so the amplitude of retrace impulse increased and broke the horiz
57. sae Ciel R404 r t 15K R403 cla A 8 esea p912 ew lv 390P Suv 470 1K MF 4 I Bos 112V C3 R112 R9E7 gaz we C411 R407 T 15K C135 ous a 100u 19 gw D401 j D1102 47k 160 FUS FR104 i 07 C106 C105 10n upcs74 C903 at g d C107 ung igon R110 0 22u C104 Gen E m C907 9 pe 47K pp 33K PE 16v DM e C408 wei Si Li SZ A Ou i Ve H gon C407 A Q402 250V C409 u HS AA og ton un 301555 390P 500V g4pj 00v 1000P DA u cease R904 P904 Ld SL zs de 01 E276GH M36 odi dio ile i L ben ER P901 DE ES E EE E 2003 06 19 desired uml MR LESE ee amp v 1 FAV BD p Puoi Fille P1103 Al IN V2 IN Ae IN A IN 4 H A OUT A OUT V DUT L ALTIN V1 IN L p L R
58. shorted to Is DB801 OC Replace DB801 earth earth Yes Yes Check the ut Check 1C801 and its peripheral components of B such as the collector of 0402 Check Q801 Fig l No picture no raster no sound Fuse Blown No PIC No raster No sound abnormal B voltage Check 1 C802 ls the 8 resistance to earth ok VU Check the of B load Is the working voltage of Q831 0k VU Check VR830 and the bias circuit of 0831 Q832 and their peripheral components Fig 2 No picture no raster no sound abnormal B voltage TCL OVERSEAS HOLDINGS LIMITED Service Manual No PIC No raster Is the H out Check the No sound B OK Wi waveform at YES waveform and OK Check Q402 and Is the voltage KW of pin2d of OD 5V Replace 0401 and Repl ace C201 1402 Pinl3 of 1C201 static worki ng FBT OK point of Q401 r YES NO Is the resistance to YES Can 1C401 output YES Check R233 C231 earth of pin25 a voltage of 9V and C233 of 1 C201 OK Check C401 and Repl ace C201 Its peripheral circuits Fig 3 No picture no raster no sound B OK Sound OK Raster OL P 48 Service Manual Check Q208 Q209 and their peripheral component s TCL OVERSEAS HOLDINGS LIMITED Check the RGB waveformat the point of
59. sides VII Adjustment of Pincushion and Picture Width for pure flat model only 1 Receive a crosshatch pattern 2 Adjust VR1024 until the vertical line become straight 3 Adjust VR1023 for horizontal size VIII Adjustment of Picture Geometry PAL 1 Apply the crosshatch pattern PAL signal to the RF input in STANDARD status TCL OVERSEAS HOLDINGS LIMITED Service Manual41 2 Select HPOS to adjust the Horizontal center 3 Select VP50 to adjust the Vertical center 4 Select HIT to adjust the Vertical amplitude 5 Select VLIN to adjust the vertical linearity 6 Select VSC to adjust the vertical S correction IX Adjustment of Picture Geometry NTSC 1 Apply the crosshatch pattern NTSC signal to the RF input in STANDARD status 2 Select HPS to adjust the Horizontal center 3 Select VP60 to adjust the Vertical center 4 Select HITS to adjust the Vertical amplitude 5 Select VLIS to adjust the vertical linearity 6 Select VSS to adjust the vertical S correction X Adjustment of OSD position 1 Enter D mode and press key NOTE 2 Select OSDI to adjust OSD horizontal position volumebar picturebar half blue panel OSD 3 Select OSDFI to adjust OSD PLL DATA volumebar picturebar half blue panel OSD 4 Select OSD2 to adjust OSD horizontal position except OSDI items 5 Select OSDF2 to adjust OSD PLL DATA except OSDF1 items XI D mode Enter D mode by press D mode key then you can adjust the setting accord
60. t For drivina P52 indication LED Output Port 19 High current output port For driving P53 infrared LED TCL OVERSEAS HOLDINGS LIMITED Service Manual37 8 M24C08 8Kbit Serial PC Bus EEPROM Logic Diagram SDA Pin Connections ecL M24 C xx Signal Names Ground SIGNAL DESCRIPTION Serial Clock SCL The SCL input pin is used to strobe all data in and out of the memory In applications where this line is used by slaves to synchronize the bus to a slower clock the master must have an open drain output and a pull up resistor must be connected from the SCL line to VCC In most applications though this method of synchronization is not employed and so the pull up resistor is not necessary provided that the master has a push pull rather than open drain output Serial Data SDA The SDA pin is bi directional and is used to transfer data in or out of the memory It is an open drain output that may be wire OR ed with other open drain or open collector signals on the bus A pull up resistor must be connected from the SDA bus to VCC Chip Enable E2 These chip enable inputs are used to set the value that is to be looked for on the three least significant bits b3 b2 b1 of the 7 bit device select code These inputs may be driven dynamically or tied to VCC or VSS to establish the device select code Write Control WC The hardware Write Control pin WC is useful for protecting the entire contents of the
61. t the beam current in a safe range we add a ABL circuit in M28 chassis We add two sampling resistances R414 R415 between 24V power supply and pin7 of the FBT The voltage at the joint of the two resistances is feed back to pin27 of TMPA8803CSN to control bright and contrast to limit the beam current It is also in charge of regulating EHT C410 is a fliter capacitor for ABL voltage The impulses which are induced by secondary coil 5 are changed to 12V once passed the regulating and fliting circuit made up by D402 and C413 IC401 change 12V power supply to 9V for many circuits such as R G B output circuit of TMPA8803CSN IC4053 pre IF amplifier circuit bright dots killer circuit and S terminal circuit IC402 outputs a 5V power supply for the keyboard circuit C418 C417 C423 and C425 are fliter capacitors D402 and C413 are incharge of regulating and flitering for the output of coil6 to supply the V scanning output section with 24V power The 24V is added to the upper terminal of the V deflecting yoke as the DC bias for the movement of V center Extension distortion and compensation This kind of distortion is mainly caused by the structure of CRT Due to the srcreen of SF CRT is not a ture flat screen the distances from the deflecting center to the screen are not the same The scanning speed of the electron beam is uniform If the electron beam scannning the screen equally with the TCL OVERSEAS HOLDINGS LIMITED Service Manual 9 e
62. the supply current The frequency of the ripple on the supply voltage is twice the signal frequency Consequently a reduced power supply with smaller capacitors can be used which results in cost reductions For portable applications there is a trend to decrease the supply voltage resulting in a reduction of output power at conventional output stages Using the BTL principle increases the output power The maximum gain of the amplifier is fixed at 40 5 dB The DC volume control stages have a logarithmic control characteristic Therefore the total gain can be controlled from 40 5 dB to 33 dB If the DC volume control voltage falls below 0 4 V the device will switch to the mute mode The amplifier is a short circuit positiva protected to ground input 1 SR HERE VP and across the DG volume load A thermal control 1 oo protection circuit is negative output 1 also implemented If the crystal temperature rises V LI PROTECTION above 150 C the gain will be reduced thereby hagati reducing the output output 2 power DC volume control mE Special attention is Geet given to switch on and switch off clicks low HF MSAT14 o radiation and a not signal power power good overall connected ground ground 1 ground 2 oe stability Block diagram 5 TMPA8803CSN X The TMPAS8803CSN is an integrated circuit for a PAL NTSC en Geert a TV It consists of two pieces of IC chip in one package using E s Multi Chip
63. tions For SN AM demodulation the AGC must be switched off When switched off the control loop is reset and fixed gain settings can UT be chosen The AGC can be controlled via the I2C bus DEC S882 3 MIXER The digitized input signal is fed to the mixers which mix one or ref both input sound carriers down to zero IF A 24 bit control word for each carrier sets the required frequency Access to the mixer control word registers is via the C bus or via Easy Standard Programming ESP When receiving NICAM programs a feedback signal is added to the control word of the second carrier mixer to establish a carrier frequency loop 4 FM AND AM DEMODULATION An FM or AM input signal is fed through a switchable band limiting filter into a demodulator that can be used for either FM or AM demodulation Apart from the standard fixed de emphasis characteristic an adaptive de emphasis is available for Wegener Panda 1 encoded satellite programs 5 FM DECODING A 2 carrier stereo decoder recovers the left and right signal channels from the demodulated sound carriers Both the European and Korean stereo systems are supported Automatic FM dematrixing is also supported which means that the FM sound mode identification E 22 Service Manual TCL OVERSEAS HOLDINGS LIMITED mono stereo or dual switches the FM dematrix directly No loop via the microcontroller is needed SIE SIF1 P DEC D VEGA ADORI Ec nus DOA ADD
64. tron beam becomes slower and the right of the raster is compressed to generate distortion We use a horizontal linear adjuster to compensate this kind of distortion We use L412 and L411 as the H linear adjusters in H scanning section of M28 chassis R411 which is parallel connected with L411 and L412 is a despiking resistance for preventing the oscillation by compensating inductor and the stray capacitance The linear adjuster is a transductor coil with a magnetic core inside If the current which pass the linear adjuster coil increase to a certain value the magnetic core becomes saturated to decrease the inductance of the linear adjustment inductor If the B is steady the increase speed of Iy is faster to compensate the reducing of deflecting current by the resistance R mention above We can adjust the magnetic core to chang the inductance of the linear compensate inductor to adjust the H linearity The EHT generation circuit The FBT supply the anode high voltage focus voltage and screen voltage for M28 chassis D401 and C408 are in charge of regulating the primary impulse of the transformer to output a voltage of 190V for the video amplifiers The 10 8 coils of the FBT supply the heater with power Having passed the divider and clipping circuits which are maded up by R415 RAI5A C422 and D404 the H retrace impulses getting out from 3 10 coils are inputed to pinl2 of TMPA8803CSN to generate sand castle impulse To limi
65. u C005 ROOP ROG NPO C019 DDOL D006 4700P LOVA vit AV Uo levi En ON S CA 5 Wn ae SV1 nE e Looz G Seit eet AV R IN E ged EE I t 10uH E C635 ai G3 oos 1000u EE 5 6 32 32 3 8 16V L hn R047 AE B NM Sebkegegegepge due 100 e cies cosa 7 6 10n Lj 54 in Mu Cess A OR EY S a n E J Dv 5v LOS0 Co Tos GND SCP DUT p R238 goo ZOUH 47u 3 10n E c EM E c 12VA to sv SYEL B OUT sn H our t3 7 2 02 GJ 3 3 59 en Ge SE ele 5 6T 3 ST s PT s PTALS i G6U9 E GARUT 6 R237 ei SIN SS Bke Y 5 IC603 G co G9 R DUT D Se C236 Ge me D47u 0 47u TC4066BP Sec SE P SA TN D 16V iev l Read eek TYCH RGB 9V 4K7 633 mU VR SE Tt R u A _ Bek pa AVCD Sov Se YA 220 IK IN 7 HVCC el m iet los we e LESS Cc c 10 9Vv 22uH ion 47u PN L209 n d 22Du toy Deng aly L 16V GH APC FIL 16 27uH 16V gt DTCl44ES Hei nd een cee6 E DTC144ES l PR SE 100n R 9 mm BLACK DET E BepF C301 amp L REUS 220K Cou 3 TDA8172 30K C204 ve 20 10u g a e R243 CEUS en 16 7 lev gt a Ki gu AR eg R314 Caoa A ay ke e Loi Lo 1w u 9V Celt 50v R215 cele D D 24 pee cau Re09 be pes 8 y P gL cane TE i S 220u ae amp ic Re Ce cem SH Va ae Iq e WOOL Task mum A eg U U SEH mi SA 203 SE Sau R233 snail dd Cie R317 9 i i CI815 e ISV M e 270 R307 C305 56 j 1 8wW 47u E 5i C e HAL E ieg 172W R336 i i R c309 i ae 49V ag 23 C242 Sen cean R312 Diu iW
66. uner output PIF and SIF signals The IF signals are amplified about 20dB by the pre IF amplifier Q101 Having passed the SAW the IF signals go into the TMP8803CPN from pin o The IF signal pass the video detect circuit to generate CVBS signal Then the processor deals the signal with luminance and chroma separation The processor deals the luminance signal with Y Delay Y Gamma correction Y hf compensation and black strength all which ensure that there are enough bandwidth and gain with Y signal so that the resolution of picture detail is improved and the Y signal is well timed with chroma signal The processor also deals the chroma signal with chroma sub carrier recovery color system recognition and color signal decoding then outputs B Y and R Y color difference signal A matrix circuit converts the color difference signal Y B Y and R Y into primary color signal R G B On the other hand the processor separated the horizontal and vertical sync signal from the CVBS signal which was generated by video detect circuit Having passed the horizontal or vertical frequency dividing circuit the H or V OSC signal which be generated by H AFC or V AFC is changed to H or V drive signal The H V drive signal make the horizontal vertical circuits and scan output circuit to generate H V saw tooth wave TCL OVERSEAS HOLDINGS LIMITED Service Manual 7 1 Channel Section WW The RF signal is converted into IF signal by the tuner Then the IF sig
67. ync separate circuit which is made up by C208 Q202 and Q203 Then the video come into inner 870X CPU module from IC201 pin62 to detect whether the signal is live signal Tuning control and band switch control circuits The processor output a tuning control signal from pin60 The control signal will pass Q103 common emitter amplifying circuit then an integrating circuit Finally it is added to the VT terminal to provide all channels tuning voltage for the tuner to stabilize the channels 2 Vertical Output Section TMPA8803CSN outputs vertical saw tooth wave from pin 16 It come to pin5 of LA7840 with DC coupling and is amplified by inner difference amplifier Pin4 of LA7840 is the same phase input terminal R307 and R308 are DC offset resistances C305 is a filter capacitor In application to M28 pin4 of la7840 is fixed as the DC amplify ref terminal The amplified saw tooth wave come out la7840 from pin2 and make the deflect coil to generate the deflect current R314 and C301 filtrate the inductive interference from the horizontal deflect coil R317 and C309 are used to eliminate spurious oscillation generated by the deflect coil and distributed capacitance resonance C308 R313 C307 and accessory circuit are in charge of draw AC saw tooth wave out at the deflect coil terminal connected with R315 amp R316 and feedback to the input terminal of la7840 pin5 to correct the linearity of horizontal scan C306 is a high frequency decoupling capa

SERVICE MANUAL FOR M28 ONE

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