Telefunken RT200
Contents
1. get status of autoscan switch Status 1 or 0 inC proc getautoscan mov a keydata 4 switch status is in row 4 mov EC acc 5 tbat ret are we in on off mode C 0 if yes proc call clr cjne sjmp cjne sjmp setb ret endp chkonoff getmode get current mode default yes a fmode on no on dispatch yes a mode off no off yes other mode storeloop as OFFh store am skip store frequency to memory proc mov setb call je call je dec SLT subb mov clr add jnb setb mov elr ri jb add mov mov mov inc mov mov sjmp add storeprg uxdata 15 clear num display TORE turn store LED on hkonoff bail out of input loop kip store eadnum otherwise get number of program toreloop THK HAWN DW transform 1 gt 0 0 will be sieved out a NUMPROGS in allowed range ba Tyre a a NUMPROGS b 7 storeloop acc 7 found a valid number show in display auxdata a acc 7 for address computation a AM store am AM FM division a ffm progs store FM program r0 a a fm prog r0 a ro a fm_progtl r0 a skip store a fam progs store AM program r0 a a am prog r0 a ro a am progtl r0 a STORE LED off again turn on off proc push switchon am prg with program number in A reg0 needed for addressing switchon am doswitch switchon fm doswitch setb mov2. K ar se tsyn ATCHC K se a rl tsyn ATCHC K se tsyn ATCHC K se a r2 tsyn ATCHC K se tsyn ATCHC K se a r3 tsyn ATCHC K se tsyn ATCHC K se a r4 tsyn K se ATCHC tsyn ATCHC K se a r5 tsyn ATCHC K se tsyn ATCHC K ar se tsyn ATCHC K ea a delval 999 nexttime b a LOCK didsync a clk msec a b syncloop first set register next value next value next value next value next value next value EO for for for ror for reg reg reg reg reg reg 2 to 0 finally set register 8 to 7 reenable ints wait max 1 sec for PLL to sync PLL has found frequency otherwise test for timeout go on testing if not timed out mov dptr str_ nosyn print sync error call write mov a delval 800 call delay didsync elr MUTE turn Audio on again ret setsyn anl a 415 mask nibble add a 2 correct value move a atpc read from table movx dptr a write to port ret done db OOh 80h 40h 0cOh table for bit mirroring db 20h 0aOh 60h 0e0h db 10h 90h 50h 0d0h db 30h 0b0h 70h 0f0h endp delay by A ticks 1 tick 4ms 250Hz proc delay push rego inc a first assure we don t wait too few add a clk
3. c dph dpl reg2 regl rego kstat dptr PORT_R a dptr a 3fh norem remtranslate acc 7 norem r0 keydata 1 a r0 a fOfh foundl ro r0 keydata 6 loopl Cc rl a a r0 G a keydatatl a a r0 a a rl a 8 found2 ro loop2 a r0 when C is clear readnum readkey done key2num lastkey KEY_NONE Ei zZ no key found subroutine get key status first check remote control only bits 0 5 relevant value 0 gt no signal from RP300 otherwise translate to keycode bit 7 set gt unused code otherwise we have a code otherwise check key matrix get data of a row keys only in lower nibble is a bit set yes gt otherwise go to next loop all rows checked yes gt nothing found save value calculate relative row address 4 keys per row save first part now add the bit position avoid infinite loop bail out if found otherwise check next bit return with result otherwise C is set try to get a key give up read a time to R4 m R5 h gets first entered number in a mode in r3 proc readtime push rego mov r4 a call clrdisp first clear display setb dig2dot set decimal dot at this point mov a r4 cjne a 0 n_ 1 0 digit must be between 0 2 sjmp firstgood n 10 cjne grin 1 1 sjmp firstgood moors cjne a 2 skiptens if not take this as 1s of hours firstgood mov r0 a save 10s of hours call segtranslate dis
4. dispdata 2 a loop3 a r5j a 7 segtranslate dispdata l a chkonoff badval readnum loop2 isten chkonoff badval readnum loop3 a r4 a a segtranslate a dispdatat3 a chkonoff badval readnum loop4 a r4 r4 a a 15 p segtranslate dispdata 4 a chkonoff badval readnum loop5 b a no50 a 5 loop5 p a r5 acc 7 r5 a tens store digit display 0 or 1 store as 100s display 100s bail out get tens of MHz go on as in other case bail out get ones store them display them don t forget dot bail out get 100s of kHz merge in display bail out get opt 50 kHz step save last digit no 50 kHz step ignore everyting but 0 and 5 otherwise set 50 kHz flag is by default in the upmost bit comparison becomes simpler when we rotate everything one digit left no50 mov call mov mov mov call mov mov mov mov call a b segtranslate dispdata 5 a a tlo MIN FM b hi MIN FM lrotl6 r0 a rl b a r4 b r5 lrotl6 display last digit compute lower bound rotate comparison value badval call jc call call call jnc clr mov mov mov mov ret mov call mov call setb ret endp subl6 badval a tlo MAX FM1 b hi MAX FM1 lrotl6 r0 a saul PR a r4 byE5 lrotl6 subl6 badval c a r4 fm prog a a c fm prog l a dptr st
5. mov currband a nosave ele AM cir FM setb MUTE setb ON mov auxdata 15 ret endp get a pressed key returns character in A when C is clear otherwise C is set proc readkey push rego push regl push reg2 push dpl push dph call kstat get current key status JC nokey clr if nothing present exit immediately mov r2 a save keycode xrl a lastkey equal to last key jz autorep yes gt to possible auto repeat mov a delval 40 new key wait 40ms for debouncing sjmp waitchk autorep mov a r2 repeat only for up down cjne a KEY UP noup mov a delval 60 repeat rate sjmp waitchk noup cjne a KEY DOWN nokey nclr mov a delval 60 waitchk call delay wait for the given time call kstat and check key status again jc nokey clr key released in meantime xrl a r2 still the same jnz nokey clr no gt completely reset yeskey mov aT 2 we now have the keycode at last mov lastkey a save for next time nokey clr nokey nclr fin norem loopl foundl loop2 found2 get a number returns digit done clr sjmp mov setb pop pop pop pop pop ret proc mov movx anl jz call jb clr ret mov mov anl jnz inc cjne setb ret mov mov GLE subb rl rl mov mov orl rre je inc sjmp elr mov ret in A proc call Je call ret fin signal key found clear buffer of last key
6. a segtranslate dispdata 3 a chkonoff badval readnum loop4 a r4 r4 a a 15 segtranslate dispdata 4 a rO lo MIN_AM r1 hi MIN AM a r4 b r5 subl6 badval r0 10 MAX _AM1 r1 hi MAX AM1 a r4 DES subl6 badval r3 a a r5 b 16 ab a b a r3 b 9 p ab a b badval c a r4 am prog a a r5 am progtl a dptr fstr error write a delval 800 delay c go on as in other case bail out 7 get tens store them display them bail out get 1s of kHz merge in display compare lower bound get comparison value compare values C 1 gt not good compare upper bound rotate comparison value compare values C 0 gt not good build digit sum must be dividable by check if remainder 0 everything fine store to current frequency respond that that was invalid leave err msg visible a bit not good program current frequency into synthesizer no50 do_am proc GLE mov mov movx mov jb add swap addc mov jnb mov mov swap sjmp add addc da call mov div mov mov anl orl swap call mov div mov mov anl swap orl swap call mov div mov mov mov setfreq ea dptr PORT_ROW a 0ffh dptr a dptr fPORT COL AM do am ro tl a fm prog a 07h a r4 a a r3 a a fm prog 1i a fO1h a r5 44 acc 7 no50 r5 2 acc 7 r2 a a
7. a r0 c acc 7 FM c c acc 6 AM c a f3fh acc 7 auxdata a getmode a fmode check normal readnum wloop a c a 4 wloop dloop dispclk auxdata 15 AM FM none gt display time abort map 1 4 gt 0 3 is number in range no gt ditto otherwise restore number Save it compute address of time display time don t forget to clear restore number compute address of program fetch value display AM FM mask range bits out no blinking wait loop still in check mode no gt bail out otherwise wait for key as usual and display when next key is correct none terminate display time turn LEDs off delete timer values proc setb setb clr clr mov call JE dec ELE subb cancel ON MUTI AM FM m auxdata 15 readnum normal turn tuner off turn LEDs off wait for a number to be entered none gt display time abort map 1 4 gt 0 3 is number in range Jng normal 2 no ditt push acc call clrdisp erase display after first numer entry mov dispdata 2 1 show just a dot pop acc dloop add a 4 otherwise restore number setb ace turn LED continuously on mov auxdata a clr acc 7 compute address rl a add a time permon mov r0 a clr a erase value mov r0 a setb acc 7 inc ro mov r0 a wloop call getmode wait loop still in check mode xrl a fmode cancel jnz normal no gt bail out
8. added step functionality 2000 10 07 AArnold only check timer once a minute 7 2000 10 15 AArnold version 1 0 2000 11 12 AArnold do not overwrite band info when tuner is already off 7 2001 03 02 AArnold fix typos in clearing once on off times damn i add copyright string version 1 1 KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KK KKK KKK KKK KKK XXX KKK KKK XA YY amp XXX amp XX amp XX Y r cpu 8052 temic equ 1 include stddef5l inc include bitfuncs inc if temic ckcon equ 08fh endif macros regbank macro no register selection if no amp 1 setb rs0 elseif clr rs0 endif if no amp 2 setb rsl elseif clr rsl endif endm proc name endp ljnz skip TJG constants rawclk timeclk timeperiod digits delval disprate tOrate tOrate EY UP h as K K TH oe Ei Ei F D U KKK K r 0 O tj 023 U 8 8 PP mg rt Pp r Zz Ot Zz id et a Ei E K r EI T U NNNNKN AKAN AKAN RN AA NUMPROGS macro name procedure frame section name public name label endm macro endsection endm macro dest jz skip ljmp dest endm macro dest ge skip 1jmp dest endm equ 562500 input clock to CPU 4 5 MHz 8 equ 250 TOD clock equ 1000 timeclk equ 6 of digits in display function time time timeperiod equ 68 d
9. call readnum otherwise wait for key as usual JE wloop dec a CLIT subb a 4 jnc wloop sjmp dloop and display when next key is correct normal call dispclk none terminate display time mov auxdata 15 turn LEDs off ret endp intermediate dummy for unimplemented modes dummy call segtranslate mov dispdatatl a clr a mov dispdata 2 a mov dispdata 3 a mov dispdata 4 a mov dispdata 5 a ret display time of day proc dispclk mov a clk sec seconds runner mov b 6 div ab mov a b mov r2 80h i 1S a running segment PZ noshift avoid zero shift xch a r2 shloop rr a djnz r2 shloop mov r2 a noshift mov dispdata 5 r2 250 Hz interrupt clkserve noroll dclear auxwrite Timer 0 interrupt dispmux mov mov call ret endp setb push push push p r ush egbank mov orl sjmp MOVX pop pop pop pop clr reti setb push push push push regbank drives clock dispdata 0 0 rO fclk min disptime p3 4 acc psw dpl dph 2 r0 clk msec ero a r0 a timeclk noroll r0 0 r0 gr0 a r0 a 60 noroll CroO 0 r0 gr0 a r0 a 60 noroll r0 0 ro ero a r0 a 24 noroll CroO 0 dptr PORT AUX a clk_ msec a auxdata acc 7 dclear a auxdata auxwrite a 415 dptr a dph dpl psw acc p3 4 P3 5 acc psw dpl dph 1 no special digits rest of time as usual runs aux por
10. contradictions FM Receiver Wave Band Circuits Sensitivity Limit Range Intermediate Frequency IF Bandwidth Selection Mirror Selection Capture Ratio Phase Suppression Carrier Signal Suppr Frequency Response Distortion Factor Cross Talk Dampening Voltage Ratio S N Ratio Range of Strength Display Accuracy of Standards AM Receiver Wave Band 87 5 108 MHz 11 4 adjustable 0 8 uV 2 6 uV Mono Stereo at 26 dB at 75 Ohms 1 6 uV 5 2 uV Mono Stereo at 26 dB at 300 Ohms lt 1 0 uV for 3 dB at 75 Ohms 10 7 MHz 160 kHz 65 dB 2 signal method gt 70 dB lt l dB gt 55 dB gt 70 dB 10 Hz 16 0 kHz lt 0 5 stereo lt 0 3 mono at 1 kHz and 40 kHz deviation gt 38 dB at 1 kHz gt 30 dB at 12 5 kHz gt 62 dB stereo eff gt 65 dB mono gt 64 dB stereo gt 67 dB mono luV 2mV 0 digit for station frequency in 50 kHz steps MW 522 1611 kHz Sensitivity Circuits Intermediate Frequency IF Bandwidth Voltage Ratio Accuracy of Standards Range of Strength Display Frequency step General Components Mains Connection Fuses Dimensions Weight Common Failures Leaked Accumulator 9 uV at 600 kHz at 1 kHz 30 Modulation 6 2 adjustable 450 kHz 4 8 kHz 36 dB at U I mV 1 digit 8 uV 5mvV 9 kHz 13 Integrated Circuits 42 Transistors 43 Diodes 20 LEDs 220 V 1 x T 2 5 A primary 1 x T 630 mA 1 x T 100 mA 435 x 5
11. ljmp clkserve org Obh ljmp dispmux reset entry IEO entry 250 Hz signal TFO entry display multiplexer store date amp time here for identification org 20h db RT200 Firmware C 2001 Alfred Arnold db Build Date Time date time Since we want character set the copyright info in plain text we have to redefine th afterwards charset E 10 charset r 1l charset 0 12 charset n 13 charset S 14 charset y 15 charset C 16 charset A 17 charset P 18 charset h 19 charset U 20 charset X 21 r shrunk charset reset initialization resinit mov sp stack setb ON setb MUTE elr AM elr FM Glare LATCHCLK setb ED if temic mov ckcon 1 endif regbank 1 r set start of stack turn tuner off turn on TEMIC X2 mode preset variables for dispmux handler initimer initfm initam iniloop mov mov mov regbank setb setb elr mov mov setb setb setb mov mov mov mov mov mov mov ING setb CLT inc djnz 3 Ov Ov 3 ov ov ov ov ov ne mov inc djnz 955553 ov ov ov ov ov ne mov inc djnz Seger mov mov mov mov mov inc inc djnz mov r2 tl row shifter rl ffdispdata data pointer displ matrix r0 fkeydata data pointer kbd matrix 0 it0 IEO is level triggered ex0 enable external interrupt 0 px0 250
12. MAX AM yes gt set to upper limit am prog 1l HI MAX AM MUTE done a fm prog 1i acc 7 fm prog l a acc 7 fmdone a fm prog G a 1 da s fm prog a fmdone a fm prog 1i c a 1 da_s fm_progtl a a fm prog we don t want to hear the PLL sync in this first toggle 50kHz flag if bit goes to 0 no carry otherwise decrement next frequency done if no carry otherwise decrement upper byte hit lower limit a flo MIN FM1 done a fm prog 1i a HI MIN FM1 done fm prog LO MAX FM yes gt set to upper limit fm prog 1 HI MAX FM MUTE we don t want to hear the PLL sync in this digital input of FM frequency loopl noo proc call setb mov setb mov call lje call je cjne sjmp cjne freqinp fm clrdisp MHZ auxdata 415 dig3dot r5 0 chkonoff badval readnum loopl a 0 no0 ishund a 1 isten preinitialize display need preinit for different branches bail out get first digit is this 0 or 1 isten ishund loop2 loop3 loop4 loops since the LSB sjmp orl mov anl call mov sjmp swap mov swap call mov call je call JG sjmp call jc call jc swap mov swap call inc mov call JE call JE orl mov anl call mov call jc call JC mov TZ cjne mov setb mov the 50kHz step ishund 2 5 r5 a a 15 segtranslate A
13. be bit addressable clk msec clk sec clk min clk hour time permon time permoff time onceon time onceoff prog perm prog once db db db db VII I 1 r r an FM program contains the frequency in is only one bit wide upmost nibble remains in the valid BCD range for example an AM program also contains the frequency in BCD coding we use th 94 80 is stored as 0948h upmost 100 55 is stored as 4 2 10 decoder display kbd row selection display data keyboard sense remote control data segment data is bit addressable data for LED 0 9 port current time timer values program to turn on program to turn on for permanent timer for one shot timer BCD coding Since bit for the 50kHz the 100s position step and the 9005h it is just a bit Simpler since the 4 digit kHz value perfectly fits onto 2 bytes for example am progs fm progs am prog fm prog db db db db NUMPROGS dup NUMPROGS dup 2 dup 2 dup 522 is stored as 0522h 2 dup 2 dup r 1611 is stored as 1611h stored programs current programs currband keydata lastkey firstdel stack db db digits dup db db org odoh db 30h dup AM FM selected input from keyboard matrix last key read reserve 48 bytes of stack reset interrupt vectors starti segment code org 0 ljmp resinit org 3
14. inc ljmp ljmp terminate mov clr CLE ret endp readnum numrun a acc 3 numrun a r6 r6 a a r2 a a prog perm r0 a a r6 Qr0O0 a a 7 a 80h auxdata a storetime a clk_ msec a 0e0h a r7 progloop a r7 a 20h r7 a a auxdata a acc 3 nwrap a 80h auxdata a progloop a r2 a a ftime permon r0 a a r4 Qr0O0 a r0 a r5 Qr0O0 a clrdisp dispdata 2 1 a r2 a stepdisp loop auxdata 15 AM FM number entered no gt must be in range 0 7 otherwise merge into station marker calculate address of station marker we know that bit 0 was 0 store station to RAM display in number LEDs go on storing time time to increment aux display no gt calculate next time increment display success calculate address of time to write save time clear display again go on with next time shouldn t be reached turn LEDs off afterwards recall timer values proc setb setb ELF clr mov call check ON MUTI AM FM B1 auxdata 15 readnum r r r turn tuner off turn LEDs off wait for a number to be entered dloop add rre clr add Ov Ov Ov Ov Ov Ov anl setb Sob eos 8 call xrl jnz wloop call je dec elt subb jnc sjmp call mov ELLE clr normal ret endp normal normal a time permon r0 a disptime dispdatat5 0 a r2 a c a fprog perm r0 a
15. number ignore 0 at this point clr c program selection subb a NUMPROGS mov D ae ron Baa le add a NUMPROGS restore key value jnb b 7 no selprg 7 when not in range mov b currband jb b 5 sel am select AM program call switchon fm prg select FM program sjmp terminate call switchon am prg select AM program sjmp terminate ret endp check timer in operation mode proc chktimer mov a clk sec only check when hh mm has just changed jz goon i e seconds are zero ret mov r0 clk_ min first save time mov rl clk hour mov a r0 repetitive turn on cjne a time permon no permon mov ar rl cjne a time permon l no permon mov a prog perm yes gt sjmp turnon mov a r0 repetitive turn off cjne a time permoff no permoff mov ar rl cjne a time permoff l no permoff sjmp turnoff yes gt mov a r0 single turn on cjne a time onceon no onceon mov ar rl cjne a time onceon l no onceon mov time onceon 0 7 yes gt clear time mov time onceon 1 80h mov a prog once sjmp turnon mov a r0 single turn off cjne a time onceoff no onceoff mov ar rl cjne a time onceoff l no onceoff mov time onceoff 0 yes gt clear time mov time onceoff 1 f80h sjmp turnoff no onceoff turnon turnon fm turnoff ret mov clr clr jc call ret call ret c acc 7 acc 7 acc 6 turnon fm switchon am prg switchon fm prg switchoff end w
16. way I could have used one of the more modern x51 variants with built in flash EPROM and thereby get most of the processor s pins as I O but as I already mentioned I have a strong preference for components that are not single sourced The whole circuitry is built on a prototype card and wired with thin isolated copper wires a popular method for prototypes Needs a bit patience and requires accuracy the connection to the tuner s mainboard is done via a ribbon cable with a crimped plug on one end and an IC socket on the mainboard of course I had to unsolder the broken processor and replace it with a socket The DIL connector is in my case a simple IC socket with the cable soldered onto it wire by wire there are however also crimpable connectors available for this end Basic Layout of the Software As you may imagine it is by far too complex to explain the firmware on a line by line basis at this place I m also not going to explain the basics of the 80C32 s architecture at this place there s plenty of literature available in the Internet about that I will therefore describe the basic building blocks and line out how they work together Initialization Of course the first step after a power on or a reset is the initialization The interrupt driven background processes have to be initialized and some global memory cells are resetted to meaningful defaults Interrupt Routines There are two interrupt driven background processes that run
17. 2011 X 27 Telefunken RT200 Device Type Digital Synthesizer Tuner Start of Sale 1981 Original Price DEM 799 General Description The medium sized tuner of the Silver Series includes a feature even not present in the larger RT300 a digital timer clock allowing to turn the tuner plus two other devices on and off at preselected times A single point of time and a daily repeating time may be programmed The tuner is never really off the power switch is in reality only a key that instructs the microprocessor to turn the relay for the outlets and the tuner section off the display then switches to a 24 hour time display Since there are only five digits available the time display doesn t include the seconds In contrast to the RT300 and MT1 the other digital tuners in the Silver Line the RT200 does not allow entering a frequeny via the numeric keys Note that 16 program memory places means 8 FM and 8 AM you can t have more places in one range and less in the other Features UKW MW 16 program memory places manual and automatic station search PLL tuning system LED signal strength indicator exact tuning indicator digital timer clock mono switch AFC switchable Connectors AF Output DIN and Cinch Antenna 75 Ohms asymmetric 240 Ohms symmetric AM FM 2 switched outlets for timer operation Technical Data taken from the user s manual and the service manual I took the values from the service manual in case of
18. 6 x 250 mm 4 5 kg The RT200 contains a 4 8V NiCd accumulator pack This is needed to keep the processor and the clock running while the device is disconnected from the mains supply as I noted above the microprocessor and its supply is still on when you turn the tuner off During normal operation the accumulator will be recharged However there is no protection against driving the accumulator into deep discharge when the tuner is disconnected from power for a longer period of time Similar to the accumulators on older PC mainboards this will 1 destroy the NiCas and 2 make them leak If you see a pack with the white crystal looking electrolyte leaked out immediately replace it since the acid can also destroy traces on the PCB The cells used in the pack have a non standard size Simply use a pack of four standard AA R6 cells and connect it via some inches of wire to the PCB Even the smallest AA cells available these days have four times the capacity of the original cells and there is plenty of space in the case to install the new pack somewhere Out of Tune The second next common failure is a synthesizer crystal out of tune This becomes notable by the tuner s exact tuning display though the correct frequency for a certain station is set the exact tuning indicator does not show green Typically it will claim a mistune towards lower frequencies Since the tuning principle is a PLL synthesizer with a closed loop aging of analo
19. Hz interrupt has lower priority tmod 32h T1 stopped TO in mode 2 no gate th0 4 256 tOrate set display mux interrupt rate trO turn or timer 0 etd interrupts on for timer 0 pto high priority a preinit clock clk msec a clk sec a clk min a clk hour a r0 4 preinit timer values to invalid times rl ftime permon rl a rl acc 7 meaning bit 7 in hours is set ril a ace rl r0 initimer a 0fh preinit timer programs prog perm a prog once a fm prog flo DEF FM preinit FM programs to 87 5 MHz fm prog 1l fhi DEF FM r0 NUMPROGS rl ffm progs Grl lo DEF FM ri Grl fhi DEF FM ri r0 initfm am prog fflo DEF AM preinit AM programs to 522 kHz am prog l ffhi DEF AM r0 NUMPROGS rl fam progs r1 10 DEF_AM ri Grl thi DEF AM ri r0 initam FI currband 40h initially on FM r0 fdispdata init display segment keyboard status r1 keydata r2 6 a r0 a rl a ro il r2 iniloop a 15 mov auxdata a clear aux port mov lastkey KEY NONE no key previously read seth ea enable interrupts main loop main call getmode get operation mode cjne a fmode off nooff call oper ljmp main nooff cjne a fmode on noon call chktimer additionally check timer when on call oper ljmp main noon cjne a fmode cset nocset call cset ljmp main nocset cjne a fmode tset notset call tset ljmp main not
20. LED SG231D LED LN05202P LED SLP135B rectifier low pass filter ceramic filter 10 7MHz ceramic filter 10 7MHz ceramic filter coil 10 7MHz L201 lowpass filter 195 kHz choke coil 2 2uH coil 3 3mH choke coil 220u H antenna coil oscillator coil 100uH coil coil 339 556 292 339 556 052 339 556 453 339 556 454 339 556 216 339 556 456 339 556 455 339 556 456 339 005 901 339 005 925 309 327 925 339 529 322 339 529 017 339 529 101 339 529 092 339 529 368 339 529 317 339 529 318 339 529 319 339 529 314 339 529 315 339 529 323 339 529 320 339 529 321 339 529 324 339 520 051 339 368 014 339 367 116 339 368 016 339 367 132 339 347 039 339 367 117 339 348 655 339 347 045 339 347 038 339 347 139 339 347 138 339 367 114 339 367 115 L210 211 L101 L102 104 L105 L108 L106 L107 Misc Electrical Parts J201 J202 J203 FLU201 FU201 FU202 203 FU204 R220 267 R246 279 286 R355 RY201 S201 XTAL201 C101 109 112 C124 Misc Mechanical Parts choke coil 39uH symmetrical transformer coil coil coil oscillator coil coil coil accumulator 4 8V key mains button w rod push button push button push button 2 fold push button 3 fold tuning knob antenna socket DIN socket 5 poles cinch socket digital display fuse T2 5A fuse T400mA fuse T100mA var res I0KOhm var res 20KOhm var res SKOhm relay push button assembly crystal 4 5MHz battery 4 8V 150mAh FM mixe
21. N pwr on depends on current state switchoff switch off terminate switchon terminate a fKEY REMOFF no remoff switch off switchoff terminate a fKEY TUNER no tuner switch on switchon terminate a KEY AUX no aux switch to aux dptr fstr aux write a delval 900 delay terminate a KEY TAPE no tape switch to tape dptr fstr tape write a delval 900 delay terminate a KEY PHONO no phono switch to phono dptr str phono write a delval 900 delay terminate a KEY UP no up tune up ON skip up not if turned off tuneup otherwise do it terminate a KEY DOWN no down tune down ON skip down not if turned off tunedown otherwise do it terminate a fKEY STORE no store store to program ON skip store 7 not if turned off storeprg gt do LE terminate a fKEY STEP no step step up a program a auxdata get currently selected program a 15 only bits 0 3 relevant acc 3 stepl when gt 8 no program was selected a 7 in such case start from beginning stepl no step doprog sel am no selprg terminate additionally goon no permon no permoff no onceon inc a 7 go to next program anl a 7 possibly wrap sjmp doprog rest like direct selection call key2num check for numbers 0 9 JE terminate no gt ignore key dec a
22. _ msec compute target value mov r0 a Save this add a 6 is the target value between 250 255 jnc loop mov r0 a yes gt wrap it loop mov a clk msec wait for target value xrl a r0 jnz loop pop rego ret endp calculate target tick value taking 249 gt 0 rollover into account proc nexttime push rego forward nowrap inc a first assure we don t wait too few add a clk msec compute target value mov r0 a Save this add a 6 is the target value between 250 255 Jne nowrap mov r0 a yes gt wrap it nowrap mov a r0 pop rego ret endp decimal adjustment after subtraction proc da_s mov b psw save C AC mov c ac first process lower nibble call donibble mov b 6 c swap a then process upper nibble mov call mov swap mov ret donibble je jnb jb jnb do clr subb setb ret nodo elr ret or donibble blip a psw b do acc 3 nodo acc 2 do acc 2 nodo a 6 c conversion BCD gt BIN get carry results always do when carry set don t do for 0 7 do for C F don t do for 8 9 gt do for A B correction value no correction proc dec2bin push acc save temporarily swap a extract 10s digit anl a 0fh mov b 10 multiply up mul ab mov b a save temp result pop acc extract ones anl a 0fh add a b assemble result retr endp 16 bit rotation of B A proc lrotl6 ELG xch ric xch a b mov acc 0 c correct bit that wrapped rot lower h
23. a s queezed a few characters are printable on a 7 segment display str error db str nosyn db str tape db Error 0 noSyn 0 CASS 0 set since anyway only str phono db Phono 0 str aux db AUX 0 end XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXKKXX The Macroassembler AS Main Page Latest released version is 1 4178 1999 07 11 Latest current version is 1 42Bld54 2006 12 19 For Mailing List for AS Users see bottom of this page Patrick Conrad has provided a Belorussian translation of these pages Many thanks for his efforts Click here for his translation AS is a portable macro cross assembler for a variety of microprocessors and controllers Though it is mainly targeted at embedded processors and single board computers you also find CPU families in the target list that are used in workstations and PCs AS is completely free i e you may use it for any commercial or non commercial purpose without having to pay for it If your really like AS I encourage you to either send a bit of money to Greenpeace or a bottle of your favourite wine to me If you want to integrate AS or parts of it into other projects please contact me since I really appreciate GNU and its targets I think that someone who uses parts of AS or extends it should return something into the freeware pool it s just a matter of fairness You may already have noticed that I did not pay much attenti
24. accumulator that may start to leak after a couple of years of operation This RT200 however was perfectly dead plug it in and you won t get any reaction to key presses just a few cryptic symbols on the display Checking the parts that are usually broken in such a case power supply clock generator revealed nothing so it was clear that the central microprocessor chip had passed away A truly uncommon event so I guess this happened due to incompetent repair attempts by the previous owner Contents Some Reverse Engineering Since the tuner s PCB is single sided it is principally possible to reverse engineer the device by following the traces but at least in Germany there is a much simpler way go to www schaltungsdienst de the web page of the Lange circuit service in Berlin This company offers a unique service it archives schematics and manuals for about any piece of audio video equipment that was ever sold in Germany Manufacturers usually only have schematics for the newer devices but Lange always gets a copy of the schematic and stores it hopefully forever It might even happen that when you ask a manuacturer for an older schematic they will automatically forward your request to Lange Of course this service is not free expect about 20 40 DEM plus shipping depending on the number of pages to copy I however think that this is well worth the money given the amount of time and nerves you save Fortunately this schematic already gives
25. alf bit into cary 1b rot upper half oo ret 16 bit subtraction of B A RI RO proc subl6 clr E lower half subb a r0 xch a b upper half subb a rl xch a b segment translation 7 BLS 7 26 1 35 4 segtranslate inc move ret db db db db db db db db 0 9 a a atpc Ofch 060h Odah 0f2h 066h 0b6h Obeh 0e0h Ofeh Of6h 09eh 00ah 03ah Q2ah 0b6h 076h 09ch 0Oeeh Oceh 02eh 07ch 06eh 7 segment codes for decimals 0 9 segment translation hextranslate inc movc ret db db db db db db 0 9 A F a a atpc Ofch 060h Odah 0f2h 066h 0b6h Obeh 0e0h Ofeh Of6h Oeeh 03eh Olah O7ah 09eh 08eh 7 segment codes for decimals 0 9 7 segment codes for hex A F remote control decoder proc anl ine move ret db db db db db db db db remtranslate a 3fh a a atpc only bit 0 5 relevant 80h 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h KEY STEP K 80h 80h 80h KEY TAPE K 80h 80h 80h KEY TAPE 8 80h 80h 80h 80h KEY R 80h 80h 80h 80h 80h 80 80h 80h 80h 80h 80h 80 KEY DOWN KEY UP 80h KE Oh 80h 80h 80h T MOFF 80h 80h 80h h 80h 80h h 80h 80h EY _FREQINP 80h 80h 80h EY TUNER KEY PHONO K EY AUX 80h Y STORE 80h 80h 80h 80h string constants 7 hint these are not ASCII coded we use
26. bled e Timer Off Normal tuner operation timer function disabled e Timer Set Re program timer settings e Timer Check Recall display timer settings e Timer Cancel Erase timer settings e Clock Set Set the timer s clock Once the system is initialized the CPU contiuously queries which button is pressed and branches into the appropriate sub handler Normally this handler immediately returns to the main loop once the appropriate actions are done but it may decide to delay this return in case a multi key entry time or frequency is made Of course such an entry is immediately terminated in case the operation mode changes so the key input routines inside these handlers also regularly check the current mode The Timer Section is not overly complex The handler for the Timer On and Timer Off modes is basically the same in Timer On mode this handler is additionally followed by another routine that compares the current time against the preprogrammed timer values and issues the appropriate on off sequences when necessary This check is only done if the seconds value is zero 1 e there is no problem with the background interrupt process updating the time in the same moment this routine runs Problems only would occur if the comparison took longer than a minute Programming the Synthesizer Chip The probably hardest part was the programming of the synthesizer chip the chip responsible for selecting the frequency to be received It
27. clir rl add mov mov mov inc mov mov pop sjmp public mov clr setb setb clr mov anl mov call ret endp proc push setb mov elr ri add mov mov mov inc mov mov pop sjmp public mov clr setb setb elr mov anl mov call ret endp acc 7 auxdata a acc 7 a a tam progs r0 a a r0 am prog a ro a r0 am prog l a rego doswitch switchon_am auxdata 15 FM AM MUTI ON m a pl a 01100000b currband a setfreq switchon fm prg rego acc 7 auxdata a acc 7 a a fm progs r0 a a r0 fm prog a r0 a Qr0 fm prog l a rego doswitch switchon_fm auxdata 15 AM FM MUTE ON a pl a 01100000b currband a setfreq r r r r show program on aux display 2 bytes entry transfer data entry without program set switch on amp to AM save AM FM flag program synthie after turning on with program number in A needed for addressing show program on aux display 2 bytes entry transfer data entry without program set switch on amp to FM save AM FM flag program synthie after turning on proc switchon switch on to AM or FM whichever was last mov a currband what was selected jb acc 6 switchon fm sjmp switchon am ret never reached endp proc switchoff switch off jb ON nosave when tuner is already off Pl band info is invalid mov a pl save AM FM flag anl a 01100000b
28. e we should get a borrow now cpl e LE nob nus JE done i forget it add ar 11 keys 1 9 are now correct mov b 10 now get the 10 gt 0 with a modulo op div ab mov a b elr le done done ret endp clear numeric display proc clrdisp clr a no comment mov dispdata 1 a mov dispdata 2 a mov dispdata 3 a mov dispdata 4 a mov dispdata 5 a clr KHZ GLT MHZ ret endp write message at DPTR to display proc write push rego call clrdisp clear other stuff mov r0 dispdata 1 points to leftmost digit loop clr a get a byte from string movc a atdptr JZ done terminate at NUL Cask segtranslate otherwise translate mov r0 a i sand print inc dptr next char inc r0 next digit mov a r0 end of display reached cjne a fdispdata 6 loop done pop rego ret endp display a time stored at RO proc disptime ING ro bit 7 of hours set mov a r0 dec ro jb acc 7 invtime ons KHZ no frequency display clr MHZ mov a r0 display minutes mov b 10 div ab call segtranslate mov dispdata 3 a mov a b call segtranslate mov dispdata 4 a inc ro mov a r0 display hourss mov b 10 div ab jz suppress suppress leading 0 for hours call segtranslate suppress mov dispdatatl a mov a b call segtranslate setb acc 0 dot between hour min mov dispdata 2 a ret invtime clr a clear display for invalid time mov dispdatatl a mov dispdata 3 a mov dispdata 4 a setb acc 0 mov dis
29. e via this ribbon cable The only other connector is the RP300 remote control input in the rear right corner Program Source The program s assembler sources are available To assemble them you need my own cross assembler AS KKK KKK KKK KKK KKK KK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK KKK XX amp X r RT200 Firmware r Changes R 2000 08 30 AArnold hour digit 3 9 immediately jumps to hours ones clear AM FM after entering start time 2000 09 04 AArnold begun decrementing frequency A 2000 09 05 AArnold begun programming synthesizer 2000 09 10 AArnold tuning works R 2000 09 11 AArnold added usage of program keys 2000 09 12 AArnold autorepeat up down 2000 09 13 AArnold started digital frequency input 2000 09 14 AArnold added search PLL lock inputs H ute during PLL adjustment ute during freq wrap ail out during AM freq input search 2000 09 16 AArnold ymbolically calculate delays te 2000 09 17 AArnold cuo a a 98 08 a A 2000 09 22 AArnold turn off station LED before search switch to 256 Byte RAM 2000 09 28 AArnold add remote control handling 7 2000 09 30 AArnold remote control decoder H 2000 10 01 AArnold display other input sources A remote ctrl off always turns off A 2000 10 03 AArnold
30. esired display refresh rate in Hz at temic equ rawclk 6 digits disprate gt timer 0 reload value else equ rawclk 12 digits disprate gt timer 0 reload value endif operation modes given by switches enum mode cset mode check mode tset mode cancel mode on mode off enum reg0 regl reg2 reg3 reg4 reg5 reg6 reg equ 14 misc keys equ 15 equ 9 why this double mapping equ 8 equ 10 equ 11 equ 12 equ 13 equ 16 equ 17 equ 18 equ 19 equ 20 equ Offh equ 8 reduce to 4 for 8031 equ 0845h frequency ranges equ MIN FM 8000h 1 equ 1130h equ MAX FM 8000h equ 0875h equ 0504h MIN AM1 MAX AM MAX AM1 DEF AM equ equ equ equ 0495h 1710h 1719h 0522h data definitions ED LOCK STATION DI GI T PORT AUX PORT ROW PORT COL PORT KBD PORT REM dispdata __dig0d STORE MHZ KHZ dig2 dig2dot dig3 dig3dot auxdata bit bit bit bit bit bit bit bit equ equ equ equ equ segment org db sfrb bi bi bi sfrb bit sfrb bit db GE LE 44 ue fa WROD FER ONE 65 data 20h digits dup dispdata 0 dig0 2 _ dig0 4 _ dig0 7 dispdata 2 _ dig2 0 dispdata 3 __dig3 0 2 control bits turn device on switch AM prt on switch FM part on mute audio output clock to synthesizer diagnostic LED PLL lock input station detection from strength indicator r things that need not
31. g components like the varicaps or OpAmps is out of question the synthesizer s reference clock must be wrong just by a couple ppm but enough You may try swapping the crystal but since you will need to readjust the oscillator anyway you may try to get the old one back to the correct frequency the crystal is stabilized with two small ceramic capacitors Their purpose is to assure a correct start and a stable oscillation and they also have the property of slightly reducing the crystals resonance frequency They are located between the crystals s contacts and ground Try reducing their values one of them is adjustable but that is usually not enough or unsolder them For example I had an RT200 that came back into tune after I removed C272 Linked to the out of tune phenomenon is the tuner s incaopability to reliably receive in stereo an RT200 going mono in the music s rhythm is not uncommon Failed 5V Supply In case the tuner starts acting funny or the display stays dark altogether it s worth to check the 5V supply of the microprocessor If it is more than half a volt too low try to swap the regulating transistor for the 5V supply T236 Seems this transistor is slightly underdimensioned and may get cooked over time I usually replace it with a BD135 plus a small heatsink Broken Processor Another failure I had so far was a broken microprocessor which is a complete project on its own see below but this is surely not a
32. hesizer chip Of course we could add an own oscillator but I already said that there is no need for much compute power and the low clock helps keeping the power consumption low e Must be available without problems Not yet another obscure chip e Development tools must be available for free at best Summing up I settled with a CPU family that is the most widely used family of 8 bit controllers The 8051 family Originally introduced by Intel 8051 derivatives are available from more than a dozen of manufacturers The two standard ROMless components 8031 and 8032 are available from probably more than 10 different manufacturers I finally settled for the 80C32 the variant with more internal RAM needed for the stations frequency storage and a third timer not needed here By coincidence I got an TS80C32X2 from Temic formerly Telefunken Microelectronics It has the nice capability of running in X2 mode i e an internal frequency divider is turned off and the device runs at double speed with the same external clock A very nice feature especially considering the low external clock frequency The other stuff around the CPU is pretty basic an address latch to demultiplex address and data lines an EPROM for the code the C32 s internal RAM of 256 bytes is sufficient for this task and some latches and bus drivers for additional parallel I O since the external memory interface eats a lot of I O lines an I O expansion is necessary in some
33. illator with a programmable frequency In case of the RT200 a Matsushita MN6147 is used that contains the reference oscillator frequency comparator regulator and the programmable divider The oscillator is an LC circuit inside the RF frontend that contains a Varicap diode A Varicap is a diode that operates in blocked direction and varies its parasitic capacitance according to a DC voltage applied to it From the schematic we get the MN6147 s pinout Pin No Name Direction Function 1 Vss Ground 2 OSC OUT Output Goes high if PLL has locked 3 OSCI Connect to 4 5 MHz crystal 4 OSC2 6 5 CLOCK1 Output 562 5 kHz clock for CPU 6 CLOCK2 Output 250 kHz clock for CPU timer 7 VCC CLOCK 5V supply 8 PD OUT Output Output of Varicap voltage externally amplified with 741 OpAmp 9 LATCH CLOCK Input control signal from CPU 10 DAIN 3 Input Data Address input from CPU 11 DAIN 2 Input 12 DAIN I Input 13 DAIN 0 Input 14 VCC 5V supply 15 AM LOIN Input Input from AM oscillator 16 FM LOIN Input Input from FM oscillator 17 SW MW Input Select short or medium AM wave band unused tied low 18 FM AM Input Select AM or FM operation Though this helps understanding the circuitry it doesn t help us with out new firmware since there is no information about how to program the synthesizer to a certain frequency After a couple of phone calls with Panasonic Matsushita Germany it was clear that I would have had to c
34. ithout hits turn on select range remove range flags from program turn on AM program turn on FM program turn device off setting the clock writing m h idle terminate proc setb setb GLE clr mov call jc mov call je mov mov mov call ret endp cset ON MUTI AM FM m auxdata 15 readnum idle r3 mode_cset readtime idle clk_sec 0 clk hour r5 clk min r4 dispclk turn tuner off not needed here is a number available no gt display time get rest of time success clear seconds avoids rollovers while store hours store minutes show possibly new time setting the timer loop proc setb setb clr clr mov mov mov call mov CFE clr call xrl ljnz tset ON MUTE AM FM r2 0 a r2 auxdata a clrdisp dispdata 2 1 AM FM getmode a mode_tset terminate turn tuner off we start with the first value perm on display this erase display show just a dot AM FM LEDs are only on during time prog entry are we still in timer setting mode no gt exit stepdisp noup nodown rngloop no am rngrun progstart progloop call je cjne mov inc anl mov mov sjmp cjne mov dec sjmp call JC mov call jc 3 O lt mov mov anl elr setb call xrl jnz call jc cjne mov sjmp cjne mov sjmp mov anl xrl jnz mov add mov c
35. mdone mov a am prog hit upper limit cjne a flo MAX AM1 done mov a am progtl cjne a HI MAX _AM1 done mov am prog LO MIN_ AM yes gt set to lower limit mov am prog 1l HI MIN AM setb MUTE we don t want to hear the PLL sync in this case sjmp done incfm mov a fm prog 1i first toggle 50kHz flag cpl acc 7 mov fm prog l a jb acc 7 fmdone if bit goes to 1 no carry mov a fm prog otherwise increment next frequency digit add a fl da a mov fm prog a jne fmdone done if no carry mov a fm_progtl otherwise increment upper byte add a fl da a mov fm prog l a fmdone mov a fm prog hit upper limit cjne a flo MAX FM1 done mov a fm prog 1 cjne a HI MAX FM1 done mov fm prog fLO MIN FM yes gt set to lower limit mov fm prog 1 HI MIN FM setb MUTE we don t want to hear the PLL sync in this case done ret endp decrement frequency proc freq down jb FM decfm differentiate AM FM mov a am prog decrement lower part clr subb a 9 call da s mov am prog a jnc amdone mov a am prog 1 optionally decrement upper part clr subb a fl amdone case decfm fmdone case done call cjne cjne setb sjmp mov cpl mov jnb mov clr subb call mov JG mov cl subb call cjne cjne setb da s am prog l a a am prog hit lower limit a flo MIN AM1 done a am progtl a HI MIN AM1 done am prog LO
36. on the CPU At least on a standard C32 without X2 mode they consume about 70 of the CPU time which is no miracle given the low clock frequency The remainder is however still fully sufficient for our purposes The first process runs at about 400 interrupts per second and is used to drive the flourescent display and read the keyboard matrix As with most consumer electronics the RT200 s display is a dumb display that does not the refresh by itself so the processor has to do the multiplexing itself It works in the following way Initially the CPU outputs the data for the leftmost digit to the SEGMENT OUT pins and pulls the DIGIT OUT 0 line low while DIGIT OUT 1 4 remain high this way the contents of the leftmost digit are displayed at the correct place In the next cycle interrupt the first digit is turned off the data for the second digit outputted and the second digit is turned on This process continues until the last digit is done and we jump back to the first digit So at any point of time only one digit is on but if this done fast enough you get the impression of a still display Similar to a computer monitor about 60 70 complete cycles are needed per second for a flicker free display which results in the interrupt frequency mentioned above for 6 digits The other regular process is an interrupt service routine triggered by the precise 250Hz delivered by the synthesizer chip This clock is used to run a real time clock needed f
37. on to the outer appearance of these pages The reasons are manifold e Lack of time e Laziness gt e Better readability with Lynx
38. ontact the japanese mother company to get this piece of information the people I spoke to however were quite friendly and trying to help me I must add at this point Since I also own a still working RT200 there was a simpler way of finding things out take a working sample tap onto the data and clock lines and see what is happening when the frequency changes I was able to use a digital logic analyzer from HP for this job Shown on the LA s display is the result of a single programming cycle The synthesizer chip contains a couple of registers each 4 bits wide With a low to high transition of the clock line a certain register is selected with a high to low transition data is written to the addressed register So a single write operation consists of the following steps Apply register address to data lines Pull clock line high Apply register data to data lines Pull clock line low again The frequency to be programmed remember this is 10 7 MHz resp 450 kHz higher than the frequency ultimately to be tuned is simply written in BCD code to the synthesizer s registers Specifically O 0 0 0 0 0 Write 0 to register 2 For FM Write I to register I Write hundreds of MHz to register 3 Write tens of MHz to register 4 Write ones of MHz to register 5 Write hundreds of kHz to register 6 Write 2 to register 7 if 50 kHz otherwise write 4 e For AM 0 00 0 0 0 O Write 2 to register Divide frequency by 9 Write h
39. or the time display and timer functionality For each interrupt a byte in memory is incremented As soon as its value reaches 250 the seconds value is incremented The rest should be clear Since the keyboard matrix and display share their row select is is only natuaral that the process mentioned first also scans the keyboard If one row of the matrix is pulled low any key that is pressed and connected to that row will generate a low level on the keyboard scan lines The scanned values are stored in 6 consecutive memory cells resulting in an image of the keyboard matrix stored in memory that gets updated regularly The x51 family allows to assign either a low or a high priority to each interrupt source In our case the keyboard display multiplexer gets a high priority while the clock update process works with the standard low priority This is necessary to allow the multiplexer to interrupt a running clock service routine Especially when one or more counter s roll over the clock update consumes more time and can significantly delay the next multiplex cycle don t forget we have a rather slow 8032 and result in a visible sort of flicker resulting from some segments being turned on longer than others and therefore seeming to be brighter Main Loop The RT200 has a row of buttons that release each other and define the current operating mode of the tuner s user interface e Timer On Normal tuner operation timer function ena
40. pdata 2 a ret endp display frequency proc dispfreg jb AM amdisp display AM or FM Call dispfm sjmp done amdisp call dispam done ret endp display AM frequency proc dispam mov a am progtl get higher byte mov b 16 split into digits div ab jz Zero suppress leading 0 call segtranslate display 10s Zero mov dispdata l a mov a b PS eel Sod call segtranslate mov dispdata 2 a mov a am prog get lower byt mov b 16 split into digits div ab call segtranslate display 10s mov dispdata 3 a mov a b eg 2 Sn call segtranslate mov dispdata 4 a mov dispdata 5 40 unused place clr MHZ setb KHZ ret endp display FM frequency proc dispfm mov a fm prog 1 get higher byte clr acc 7 clear 50kHz step mov b 16 split into digits div ab jz Zero suppress leading 0 call segtranslate display 100s Zero mov dispdatatl a mov a b FIANNA call segtranslate mov dispdata 2 a mov a fm prog get lower byt mov b 16 split into digits div ab call segtranslate display 1s setb acc 0 mov dispdata 3 a mov a b wee Qie lise call segtranslate mov dispdata 4 a clr call clr setb ret a fm prog 1i c acc 7 a acc 0 c acc 2 c segtranslate dispdatat5 a KHZ MHZ r r display 05 step unused place uploop dostep terminate doauto up noup nokey manually increment with optional auto
41. pl cpl sjmp mov rle rlc call xrl jnz readkey loop a KEY UP noup a r2 a a 3 r2 a auxdata a loop a KEY DOWN nodown a r2 a stepdisp key2num loop r3 mode_tset readtime loop a r2 r r try to read a key none found gt back to beginning step one setting further yes gt increment pointer and display it step one setting back yes gt decrement pointer rest as usual now check whether this is a number if no forget this keypress finally read rest of time no success reading is this a start time acc 0 storetim r6 0 a clk msec a 0e0h a 20h r a AM FM getmode a mode tset terminate readkey rngrun a KEY AM no am r6 f40h progstart a fKEY FM rngrun r6 80h progstart a clk_ msec a f0e0h a r7 rngloop a r7 a 20h r7 a AM FM rngloop a r6 a FM c a AM c auxdata 80h r1 0 getmode a mode tset terminate r r yes we have to read station initialize station init timer comparator comp bit 6 amp 7 results in roughly 125 msec cycle start selection with FM read program type only AM FM allowed AM FM time to toggle no gt calculate next time toggle AM FM display display range selection start running display at 1 read program number call JE dec orl anl orl sjmp numrun mov anl xrl jnz nwrap mov storetime mov call
42. play them mov dispdatatl a mov a r0 calculate hours so far mov b 10 mul ab mov r5 a save them here sjmp loop2 go to one s hours entry skiptens mov r4 a elr a no tens entered mov r5 a call segtranslate display 10s of hour as 0 mov dispdata l a mov a r4 restore ones sjmp skipones loop2 call getmode bail out xrl a r3 jnz fail call readnum get second number je loop2 skipones mov r0 a save it temporarily add a r5 compute hours CLE fe gt 24 subb a 24 JNE loop2 yes gt not allowed mov a r0 otherwise display 1s of hours call segtranslate inc a don t forget dot mov dispdata 2 a mov a r5 and add to 10s of hours add a r0 mov r5 a loop3 call getmode bail out xrl a r3 jnz fail call readnum get third number jc loop3 ely le must be lt 5 subb a 6 jne loop3 otherwise discard add a 6 revert subtraction mov r0 a save temporarily call segtranslate display mov dispdata 3 a mov a r0 store to minutes mov b 10 mul ab mov r4 a loop4 call getmode bail out xrl a r3 jnz fail call readnum get last number Je loop4 mov r0 a call segtranslate mov dispdata 4 a mov a r0 add a r4 all digits 0 9 valid mov r4 a save back to minutes clr fa end with success done pop rego ret fail setb end without success sjmp done endp convert key in A to number in A proc key2num clr numeric keys have values from 0 9 subb a 10 i
43. r board trimmer trimmer station buttons board cpl tact switch w o diode tact switch w diode scanning board cpl key assembly for it mains socket mains switch mains transformer mains cable cable binder 339 347 040 339 312 114 339 347 134 339 347 135 339 347 136 339 347 143 339 347 137 339 367 113 339 283 128 339 442 121 339 202 109 339 222 132 339 222 124 339 222 125 339 222 126 339 222 123 309 670 928 339 540 114 339 540 146 339 335 108 309 627 916 339 572 004 339 570 023 339 508 651 339 508 653 339 502 015 339 360 108 339 442 119 339 349 154 339 168 006 339 337 145 339 510 061 339 510 062 339 337 137 339 442 020 339 442 018 339 442 130 339 442 120 339 480 107 339 442 121 339 312 112 339 480 106 339 911 713 front plate cpl 339 132 128 side part f front plate 339 232 125 frame f tuning knob 339 222 145 button frame 339 222 144 buttons guiding 8 fold 339 222 143 indicator window 339 272 128 display frame 339 337 142 push button holder 339 917 111 push button spring 339 917 110 housing upper part 339 112 107 housing rear panel 339 137 110 foot 339 062 112 Available Documents e Manual e Service Manual Circuit Diagram Goodies XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Replacing The Broken Microprocessor in a Telefunken RT200 Introduction NOTE This is a project for people who are absolutely crazy like me It took me altoge
44. r error write a delval 800 delay c compare values C 1 gt not good compute upper bound rotate comparison value compare values C 0 gt not good everything fine store to current frequency respond that that was invalid leave err msg visible a bit not good digital input of AM frequency loopl noo ishund isthou loop2 proc call setb mov mov mov call 196 call jc cjne sjmp cjne sjmp orl mov anl call mov sjmp swap mov swap call mov call JE call TE freqinp am clrdisp KHZ auxdata 415 r5 0 r3 0 chkonoff badval readnum loopl a 0 no0 isthou a 1 ishund isthou a r5 rd a 15 segtranslate dispdata 2 a loop3 a r5 a a segtranslate dispdatatl a chkonoff badval readnum loop2 preinitialize display need preinit for different branches bail out get first digit is this 0 or 1 hundreds store digit display 0 or 1 store as 1000s display 1000s bail out get hundreds of kHz loop3 loop4 badval sjmp call je call je swap mov swap call mov call jc call je orl mov anl call mov mov mov mov mov call JG mov mov mov mov call jnc mov mov div add mov mov mov div add add mov div mov jnz clr mov mov mov mov ret mov call mov call setb ret endp ishund chkonoff badval readnum loop3 a r4 a
45. repeat proc public mov call jc call call call mov call je xrl jnz mov jz dec mov sjmp setb call call call sjmp ret call jne call JC call JC cjne sjmp cjne sjmp setb call call call mov call jb sjmp tuneup doauto up auxdata 15 getautoscan doauto_up freq_up setfreq dispfreq firstdel 13 readkey terminate a KEY UP terminate a firstdel dostep a firstdel a uploop MUTE freq up setfreq dispfreq uploop getautoscan terminate chkonoff terminate readkey nokey a KEY UP noup nokey a KEY_ doauto_dn MUTE freq up dispfreq setfreq a delval 100 delay STATION DET terminate doauto_up r DOWN terminate r r r r search surely not a set program any more shall we search yes gt one manual step up leave about 13 steps out until repeat starts still up key pressed still in delay phase yes gt mute in repeat mode one repeat step auto scan terminated yes gt bail out tuner still on no gt bail out key pressed further up key inputs ignored key up changes search direction search loop silence one step up wait a moment for tuner to sync stop if found otherwise go on tune down manually increment with optional auto repeat proc public mov call JE call call call mov call je xrl jnz mov jz dec mov sjmp setb call call call sjmp do
46. rl a do it r0 42 a am prog a 50h a r4 a a am progtl a f04h a dec2bin b 9 ab rl a a r4 a 0f0h a b a dec2bin b 9 ab r2 a a r4 a fOfh a a b a dec2bin b 9 ab r3 a r4 40 r5 0 we need the display lines for the synthie at this point therefore clear diaplay blank display bits 0 3 contain register address data program for AM constant value for FM add the 10 7 MHz IF to frequency save 100s of kHz save 1s of MHz addition of upper part assume no 50 kHz offset otherwise different value for reg 7 remove 50 flag save 10s of MHz save 100s of MHz skip to programming constant value for AM add the 450 kHz IF to frequency save LSB temporarily add MSBs now start division by 9 first step gt 100s result build next part of division remainder 10s gt 10s result build last part of division remainder 1s remainder should be 0 now constant values for AM do it done syncloop mov lcall setb mov lcall elr mov lcall setb mov lcall GLE mov lcall setb mov lcall ele mov lcall setb mov lcall elr mov lcall setb mov lcall clr mov lcall setb mov lcall clr mov lcall setb mov lcall eile mov lcall setb mov lcall elr setb mov call mov jb mov xrl jnz se tsyn ATCHC K ar se tsyn ATCHC K ar se tsyn ATCHC K se a r0 tsyn ATCHC
47. s function is to generate a freely programmable frequency that is mixed with the amplified and coarsely preselected signal from the antenna When you mix two frequencies properly you get as a result two new signals with a frequency of the sum resp difference of both frequencies In our case only the difference is interesting If we program the synthesizer with a frequency that is higher than the signal to be received by a fixed amount the difference remains constant and the following circuits need not be tunable they can be accurately adjusted for this frequency This principle is called Superhet Receiver in contrast to a Straight Receiver where all circuits have to be tuned synchronously to the frequency of the station to be received Though this is in theory doable it becomes extremely difficult to keep more than two variable circuits in tune Two circuits is however not enough for a good selection so practically all radio receivers including the simplest pocket radios are superhet type receivers The synthesizer chip generates a variable frequency with a tunable oscillator whose frequency is divided and compared to a given reference clock The difference signal is fed back to the oscillator s tuning circuitry As soon as the oscillator is in tune i e the regulator doesn t have to correct any more the oscillator outputs a frequency that is the reference clock multiplied by the divisor So if we make the divisor programmable we have an osc
48. set cjne a fmode check nocheck call check ljmp main nocheck cjne a fmode cancel nocancel call cancel ljmp main nocancel call dummy ljmp main normal operation mode display clock frequency check timer operate keys proc oper jnb ON showfreq call dispclk off gt display time of day sjmp keyin showfreq call dispfreq on gt show frequency keyin mov b delval 800 standard timeout for first time call readkey input available IJe terminate cjne a fKEY AM no am switch to AM jnb AM do_am if AM is already selected call freqinp am then frequency input IFE terminate setb MUTE i and program if OK call setfreq ljmp terminate do am call switchon am ljmp terminate no am cjne a fKEY FM no fm switch to FM jnb FM do fm if FM is already selected call freqinp fm then frequency input 136 terminate setb MUTE i and program if OK call setfreq ljmp terminate do fm call switchon fm ljmp terminate no fm pwr on no off no remoff no_tuner no aux no tape no phono skip up no up skip down no down skip store no store cjne call ljmp call ljmp cjne call ljmp cjne call sjmp cjne mov call mov call sjmp cjne mov call mov call sjmp cjne mov call mov call sjmp cjne call sjmp cjne call sjmp cjne jb call sjmp cjne mov anl jnb mov a KEY OFF no off switch on off O
49. standard failure and more due to incompetent handling repair of the previous owner Spare Part Numbers taken from Telefunken s 1981 1991 Service Handbook and the Service Manual ICs Transistors Diodes IC201 IC TA7060 AP 339 575 227 IC202 IC HA12412 339 575 228 IC203 IC LB 1450 339 575 278 IC204 IC LA1245 339 575 285 IC205 IC LB 1426 339 575 279 IC206 IC TCA4500A 339 575 284 IC207 IC NJM4558D 339 575 087 IC208 IC MN6147 339 575 281 IC209 IC MN1455LF IC209 339 575 280 IC210 IC MC1741 IC210 339 575 123 IC211 IC MB74LS42 IC211 339 575 282 IC212 IC NJM7812A IC212 339 575 283 transistor BF451 339 556 289 transistor BC639 309 001 313 T204 207 209 224 228 229 231 233 234 237 238 T201 T202 T203 T208 225 210 223 227 230 232 T235 T236 T101 T102 104 T103 D201 204 207 208 D205 206 D209 214 217 220 223 304 305 501 504 506 D215 216 218 224 225 229 230 303 D219 D226 D227 D228 D301 302 D101 104 D105 D520 522 523 D521 D524 528 D503 Filters FL201 202 CF201 CF202 CF204 205 L201 L202 L203 L204 L206 L207 L208 L209 transistor 2SC1815Y transistor 2SC380 transistor 2SK212D transistor 2SK212C transistor 2SA1015 transistor 2SA1020 transistor 2SD592 transistor 3SK45B transistor 2SC535B transistor 2SC461B diode 18446 diode KV 1225 diode 181555 diode SRIK diode KB262 diode DBA10B diode 05Z7 5X diode 05Z6 8Z diode 05Z16X diode 1SV53F2 diode 182687C LED SR531D
50. t save registers ptr to clock values increment millisecond counter rollover yes gt points to seconds increment seconds second rollover yes gt points to minutes increment minutes minute rollover yes gt points to hours increment hours hour rollover yes gt update aux port get bit 7 of milliseconds turn on if either bit 7 set write the data drives display keyboard multiplexer save registers mov dph 0 only use port 0 3 mov dpl fPORT COL clear display mov a fOffh movx dptr a mov dpl PORT ROW select row mov a r2 cpl a movx dptr a mov dpl PORT COL output display data mov a rl cpl a movx dptr a mov dpl PORT_KBD get kbd status movx a dptr cpl a mov r0 a inc ro next row inc ri mov a r2 rl a jnb acc 6 nowrap back to beginning mov ar 1 ves gt mov rl ffdispdata mov r0 keydata nowrap mov r2 a write row bit back pop dph pop dpl pop psw restore registers pop acc ep pass reti return IEO is cleared automatically get operation mode proc getmode push rego mov a keydata coded in first row of keyboard data anl a f3fh omit bits 6 amp 7 mov r0 8 assume bit 7 is set never happens loop FIG a bit to test gt carry JE bset bail out if set djnz r0 loop otherwise go on mov r0 mode_ off l default assumption bset dec r0 correct value mov a r0 return in A pop rego ret endp
51. the pin functions of the central microprocessor IC a Matsushita MN4500 by the way but that doesn t help anyone Name Direction Function 1 Vss Ground 2 LW Output goes high if switched to long wave AM unused on the RT200 3 MW Output goes high if switched to medium wave AM 4 FM Output goes high if switched to FM 5 OUTLED OUT Output goes high to turn tuner on 6 MUT OUT Output goes high to mute the AF output 7 LATCH OUT Output controls data transfer to the synthesizer chip 8 DIGIT OUT5 Output row selectors for the display keyboard matrix 9 DIGIT OUT 4 Output i 10 DIGIT OUT 3 Output 11 DIGIT OUT 2 Output i 12 DIGIT OUT I Output i 13 DIGIT OUTO Output i 14 KEY IN 0 Input sense lines for the keyboard matrix 15 KEY IN 1 Input i 16 KEY IN 2 Input i 17 KEY IN 3 Input 18 STAT DET Input goes high when a signal of sufficient quality is received needed for auto scan 19 PWR DET Input issues a reset pulse after the main supply comes back 20 KEY IN 4 Input sense lines for the keyboard matrix 21 KEY IN 5 Input 22 BCDOUT 0 Output contols the decoder driving the station key LEDs 23 BCDOUT 1 Output i 24 BCDOUT 2 Output i 25 BCDOUT 3 Output 26 TEST Input unused input 27 RESET Input low active reset for the CPU 28 GND Ground 29 LOCKDETIN Input goes high when the synthesizer s PLL has synchronized to the programmed frequency 30 CLOCKIN Input 250Hz clock from the syntesizer chip for the internal timer SEGMENT OUT 31 0 Outp
52. ther more than two months of work to do this project not counting the hassle to find appropriate information and realizing that I had to find out things myself This report mostly has documentational purposes and there is probably noone who has an RT200 with the same problem and can use this text as a 1 1 guide To do something like this you need to have experience in reverse engineering devices understanding both analog and digital electronics building hardware and programming embedded controllers If you try something similar along the lines of this project you are absolutely on your own and I might not be able to help you out Especially you are yourself responsible for anything you break So for the moment lean back read enjoy and see if you can reuse some aspects for your projects The root of this project is one of my collecting passions Telefunken Hifi components built in the late 70s early 80s The RT200 is an FM AM Tuner with a built in timer clock i e you may use it to switch other devices on and off at preprogrammed times Typically those were the cassette deck and or amplifier either to wake yourself in the morning with a sound quality better than any alarm radio clock or make unattended recordings of radio programs I bought this RT200 for a few bucks at a flea market Normally there are few things in a synthesizer based digital tuner that can break no movable parts except for the buttons no lamps to burn out just a NiCd
53. undreds of kHz to register 3 Write tens of kHz to register 4 Write ones of kHz to register 5 Write 0 to register 6 Write 0 to register 7 e Write 7 to register 8 Note that in AM mode you can only tune in 9 kHz steps Adding a Remote Control Input The larger brother of the RT200 the RT300 features a remote control input to control the tuner via the infrared remote control receiver in the RP300 pre amplifier Now that we have a firmware we can extend and modify easily there is no reason not to add some nice features you had always been missing The RP300 contains a Siemens infrared receiver amp decoder chip that outputs the code of the pressed button as a 6 bit code all bits zero means that no button is pressed For the less intelligent devices like the cassette deck or the record player some logic decodes these codes into individual signal lines for the controllable functions The tuner in contrast directly gets the 6 bit code and has to do the decoding itself The reason for this is simple About 20 buttons of the remote control are assigned to the tuner and you only have 8 pins in the used DIN connectors Of course this also saves I O pins at the tuner s processor and what is more interesting the tuner also can see codes destined for other devices in the system and react on them For example if you turn the system off via the remote control the tuner can also turn itself off automatically And what is more interesting The b
54. ut segment data for the display addr data for the synthesizer chip 32 aa OUT Output R 33 en OUT Output 34 en OUT Output P 35 pooner OUT Output n 36 Bees OUT Output n 37 ae OUT Output 38 ar OUT Output E 39 Vdd 5V supply voltage 40 CPU CLOCKIN Input CPU clock input 562 5kH2 Luckily these are all only digital functions and the processors works with a standard 5V supply and TTL levels which simplifies the selection for a new processor Selecting a Microprocessor Platform The microcontroller market offers lots of different families and variants of controllers Some of them are well known and for general purpose use some of them were designed with a specific application in mind Since the synthesizer s PLL loop see below is completely done in the PLL chip the main CPU s functionality mainly consists of driving the multiplexed display querying the keys running the internal clock for the timer and moving around some data all not very advanced tasks even a 4 bit CPU could handle I guess the original MN4500 is a 4 bit CPU but most 4 bit CPUs are not general purpose and difficult to get or require expensive development systems so let s settle with an 8 bit core What other things do we need e Must be available in CMOS to allow operation from the built in accumulator for power failures or for times when the tuner is not connected to a mains supply e Must be able to run with the slow 562 5kHz clock supplied by the synt
55. uttons on the RP300 s front panel run via a virtual remote control whose signal is merged with the IR receiver s output the tuner also can notice when you switch the signal source to Tuner and turn itself on Another goodie I added to display the selected signal source on the tuner s display for a few seconds Adding the remote control input was relatively simple the signal are fed into the system with an extended low level keyboard scan routine Whenever a higher level routine queries the keyboard this routine first checks the remote control input for a non zero code and returns this code in case the code translates to a usable button Otherwise the normal key matrix scan is initiated Actual Implementation Below is a photo about how I installed the board in the RT200 There is space in abundance in the right half of the cabinet enough to install a standard Eurocard sized prototype board 160x100mm Since this was a singular project I didn t feel the need for a real PCB and the circuitry underwent quite a couple of changes a 40 wire ribbon cable connects the board to the socket of the old processor I could have used one of these handy DIL connectors for the cable but you know it was Saturday and all shops were closed Due to the low clock frequency such a long cable is not a problem except for slight interferences during AM receival who needs that in a Hifi tuner anyway All connections including power supply are mad
56. wnloop dostep terminate ret call jnc call jc call je cjne sjmp cjne sjmp setb call call call mov call jb sjmp doauto dn nodown nokey endp increment frequency proc jb mov add da mov jnc search tunedown doauto dn auxdata 15 surely not a set program any more getautoscan Shall we search doauto dn yes gt freq down one manual step down setfreq dispfregq firstdel 13 leave about 13 steps out until repeat readkey still down key pressed terminate a KEY DOWN terminate a firstdel still in delay phase dostep a yes gt firstdel a downloop MUTE mute in repeat mode freq down one repeat step setfreq dispfreq downloop getautoscan auto scan terminated terminate yes gt bail out chkonoff tuner still on terminate no gt bail out readkey key pressed nokey a KEY DOWN nodown further key inputs ignored nokey a KEY_UP terminate key up changes search direction doauto up MUTE search loop silence freq down one step up dispfreq setfreq a delval 100 wait a moment for tuner to sync delay STATION DET terminate stop if found doauto dn otherwise go on freq up FM incfm differentiate AM FM a am prog increment lower part ar 9 a am prog a amdone mov a am progtl optionally increment upper part add a fl da a mov am progtl a a
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