MV-31 ハードウェア取扱説明書
Contents
1. S5 9 LED LED1 33V LED ON LED2 V SYNC LED LED3 H SYNC LED LEDA 1shot LED LED5 LED LED6 VDD IO LED ON D2 LED SE D3 USB LED 162. CN6 00000000000 fe Mv 31 DX10A 505 00000000000 fe Mv 31 00000000000 fe Mv 31 8 51 CPLD U11 DSP BOO
3. 19 0000000 J PJ PXJ VR1 JVR2TVR3 112 2 Iq u33 2c 13 VDD IO 1 2 433v 1 3 JB 10 0000 VDD ANA MDD ANA MDD ANA 14 300 00 12 GNDJ2 3 STOB 12 J16 500000 VDD IO MDD IO MDD IO 11 00 0000 J6 00000 04 53380 9 J7 LINT UL LU DF1 4P 25DSA 17 20000 VR1 ANA VR2
4. 21 UU 0000000
5. 00000000000 fe Mv 31
6. 00000000000 fe Mv 31 jean oux ao lwo 4 ao jo J3y5 TFM 140 32 S D LQ SEMTECH DSP 13 prc er o2 5 45V 45V a om GD Lee ow DCAS 3 Gb 5 pri 8 S 9 0 n 5 EE NI EM 18 o mw 20 zo HE a o5 27 28 O2 3 EES 3 9 Ount Ount 6 Out Ount Out 6 6 EE Ount 0 Outpt Ount Outpt Ount ps EMFA pue 1 Ount Outpt SPDDDDDDD O 2 DSPDUDDUDDD DCBEm sern O DSPDDDUDDD 0 o S mpm mwomrpwAnuu
7. 0 stoutl 1 stou2 2 stou3 3 stout4 4 5 rsvou2 6 rell 7 2 8 9 10 11 12 13 14 15 INPUT HIGH CNA4 40PIN 35533353 VPORT OUT2 3 0 0 DWGATE 1 25 GATE 12 033 2 LVDS 3 EMB LVDS INPORT 0 3 USB COMMAND IN 4 ALTERA FIFO EMP 5 USB FIFO EMP 6 USB FIFO FF 20 00000000000 7 EXT IMAGE IN VALID 8 imege in valid 15 9 reserve 25 7 0 DATA 15 8 ADDRESS 7 0 DSP READ ADDRESS 8 COUNTER CLEAR 14 9 COUNTER OUT 15 12C WRITE VALID O 12 MEMORY ENABLE 012 WRITE READ OK WRITE READ OK 15 1 reserve 1510000 65000000 FIFO for 31 MV 31 DC USB
8. too 16 lyn 16 00000000000 fe 31 qu u RR 17 JBI PA A 17 J E N E 17 ana A 17 17 17 a Nr u RR IRI 17 17 N 17 12 0 0 0 ee eer hy 18 00000000000 for Mv 31 1100 00000000520 000000 00007 31 000000000000000 00000 1 510000 0 0000 9582070000 00210000000 DSPOOOOU 0000000 00000000 0000000 0 0000000 0 05 000 0 00000 00000000000 SDRAM D OOO 000000 000 0000000000 210000000 00000000000000000000000000000 000 ias r a V Ui g 0000000 00000000000 for Mv 31 0000 00000000000 for Mv 31 31 00000 LVDSA LVDS 5 41D 5 0000 18577 x 240 00 OS LVDS 160 LVDS 160 USB 2 0 Windows XP 5 1 Windows 2000 SP4 Windows 00000000000 fe Mv 31 10000 J1 8C
9. DX10A 1005 0 mr Ce 75 FA 9 m WOO imt I input amp mr amp ew m w ew m 00000000000 fe Mv 31 PGA GA U
10. DG VR3 IO 18 00000000000 for Mv 31 00000000000 fe 31 131 5 500066 41000 000 Size Address Range Hex Bytes Description of Merrory Block 0x00000000 1M Intemal RAM L2 0x00100000 OXOT7FFFFF 23M Reserved 0x01800000 OXO183FFFF 256K Intemal configuration bus EMIFA registers 0x01840000 0x0187FFFF 256K Intemal configuration bus L2 control regsters 001880000 OO18BFFFF 256K Intemal configuration bus HPI regsters 1 OxO1L8FFFFF 256K Intemal configuration bus McBSPO registers 0x01900000 0x0193FFFF 256K Intemal configuration bus McBSP1 registers 0x01940000 OXOI97FFFF 256K Internal configuration bus tiner regsters 0x01980000 OXO1I9BFFFF 256K Intemal configuration bus tiner 1 regsters 1 19 256K Internal configuration bus interrupt selector regsters 0x01A00000 OXO1A3FFFF 256K Intemal configuration bus EDVA RAM and regsters 0x014 40000 OXO1A7FFFF 256K Intemal configuration bus McBSP2 registers 0x01A80000 OxOLABFFFF 250K Intemal configuration bus EMIFB regsters OXO1AFFFFF 256K Internal configuration bus timer 2 regsters 0x01BO0000 256K Intemal configuration bus GPIO regsters 0x01B40000 0
11. 3 mme 3 mus mwomrpwannn 00000000000 fe Mv 31 39 50 3 555 40 N Int Output BC D20_ Input Output Output T E 46 EE 4 56 58 58x J10 00000000000 fe Mv 31 00000000000 fe Mv 31 ju
12. PGA U FPGA U FPGA U8J 11 00000000000 fe Mv 31 amp sp mc oS s SOUL m w Gp m jo SS amp un out nun 9 anw out 0000000000 SS FPGA e sron Oumt roe RM rn imr oue P 99 rsvour2 Oana P 56 eee U2 SX6 144S 5 2 SO DIMM CN1 JCN2 JCN3 1031 FPGA CPLD CNA PS 30PE DAT1 J AE 31 o nome mz 2 3 vsm mr poon O oOo 4 oum
13. 1411 DSP jaya TFM 140 32 S D SEMTECH DSP 00000000000 for Mv 31 u Ww Ome FP 5 om F P 5 F 1 F y F M om 6564800000000 ocu M12 S3 l 2 m p e onoono MB wer feon GPO mwomrpmeo S Go a sj Jj wo CY 2 ao jo 00000000000 fe Mv 31 x GB rwo ao ao jo A 4 I CC NC GND DC EINT5 DC EINT4 s EEN mer ocen wa amp tcm Om wp
14. MV 31 0000000 00000000000 fe 31 00000000000 for Mv 31 12 uuu 0000 00 10 2004 07 29 2 11 2004 1016 3 12 2057 0708 1 1 3 WB 4 t RRR 4 u u S ELLE LM MEE 4 FAR BIB HIR a a na naa ag am 5 Ji eU 82 5 oa as 5 ydo gt L xL N x T 7 jo o E Z up s s 9 A E E 9 uu le 9 10 E S 12 12 E a 12 CNO HRS 13 Jib 14 END BT 15 az ore 15 Eu 2 D 15 S lle ete LU 15 p 15 16 16 16 16 16 zs tt 16 A aaa E 16
15. T OFF SS S ae m mem enor Tas dae e RT 52 53 DEFAULT 54 MDD IQ VDD DG OFF 15 00000000000 fe Mv 31
16. x01B7FFFF 256K Intemal configuration bus UTOPIA registers C6415 only 0x01B80000 OxOLBFFFFF 512K Reserved Ox01C00000 OXO1C3FFFF 256K Internal configuration bus PCI registers C6415 only Ox01C40000 OxOLFFFFFF 4M 256K Reserved 0x02000000 0x02000033 52 QDMA regsters 0x02000034 Ox2F FFFFFF 736M 52 Reserved 0x03000000 OG3FFFFFF 64M McBSPO cata 0x34000000 OG 7FFFFFF 64M McBSP1 cata 0x38000000 OGBFFFFFF 64M McBSP2 data 0x3C000000 OGFFFFFFF 64M UTOPIA queues C6415 only 0x40000000 OGFFFFFFF 512M Reserved 0x60000000 OxXG3FFFFFF 64M EMFBCEO IO 0x64000000 0x67F FFFFF 64M CE1 FLASH MEMORY 0x68000000 Ox6BF FFFFF 64M EMIFB CE2 yo 6 000000 O 6FFFFFFF 64M CE3 FIFO I O 0x70000000 Ox7FFFFFFF 256M Reserved 0x80000000 Ox8F FFFFFF 256M EMIFA CEO SDRAM 0x90000000 OGFFFFFFF 256M EMIFA CE1 SDRAM 0xA0000000 OxAFFFFFFF 256M EMIFA CE2 0x80000000 OxBFFFFFFF 256M EMIFA CE3 OxC0000000 1G Reserved 19 14100 MV 31 VO TABLE MV 31 DSP FPGA U8 I O 00000000000 for Mv 31 60000000 0 11 START SET 12 reserve 13 reserve 14 one shot stat 15 continue start 0 IMAGE TO DSP START 1 DSP TO USB START 21 USBTODSP START 3 FFOCLR 4 OIMAGE gt SB MODE 1USB lt gt DSP MODE 5 1LVDS MODE 6 LCOMMAND7 7 15 reserve VPORT OUITI5 0
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