Digilent Plug-in for Xilinx 12.x Tools User Manual
Contents
1. FPGA Device Mame ID Code IR Length SDK is now setup to use the Plug in to communicate with the FPGA on the board Basys2 Demonstration Project The Basys2 Demonstration Project can be used to verify correct installation and operation of the Plug in It is functionally equivalent to the Nexys2 design Please follow the procedure documented in the Nexys2 Demonstration Project section above www digilentinc com page 12 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners2. 1995 2010 Xilinx Inc All rights reserved ed cygdrive c digilent nexys2 binaries cygdrive c digilent nexys2 binaries S Launch xm S xmd Xilinx Microprocessor Debugger XMD Engine Xilinx EDK 12 1 Build EDK MS1l 53d j Copyright c 1995 2009 Xilinx Inc All rights reserved Configure FPGA XMD XMD S fpga f download bit cable type xilinx_plugin modulename digilent_plugin www digilentinc com page 6 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual AN DIGILENT www digilentinc com Fpga Programming Procress ssaesres Done JTAG chain configuration Connect to the Device ID Code IR Length Part Name 1 41022093 6 XC33500E Microblaze Soft 2 5046093 8 XCF04S Processor Debug port Successfully downloaded bit file xMD connect mb mdm cable type xilinx_plugin modulename digilent_plugin MicroBlaze Processor Configuration Vem OO aese earner ode ha E ee 7 20 a CCN Wee Ol ao wo eae Sees eo eee eee Bk Area TAC r OM Mer Cs s u 0 4 a oad eee woe Soe weet PLBv46 MMU Type ec eee cee ee ee ee ee eee eens No_MMU No Of PC Breakpoiln Cs seras ie soeia a 1 No of Read Addr Data Watchpoints 0 No of Write Addr Data Watchpoints 0 Instruction Cache GUDPCrE s 24 40 wee orf Date Cahe SUPPO T lt x ns Goh m6 we eee Sm off EXCCDEIONS OUPO Cs 24444 be he mete s OL ft
3. 440000 0x8144ffi e Ereyuenti asked guestions LED_7SEGMENT 0x81460000 0x8146ffi Push_Buttons_3Bit 0x81420000 0x8142ff Known Issues Switches_8Bit 0x81400000 0x8140ffi R5232_PORT 0x84000000 0x8400 ffi e Known issues in SDK12 1 mdm_O Ox84400000 0x8440ffi e Xilinx Answer Record Search IP blocks present in the design v Questions Comments lt gt Overview Source E e Xilinx Forums x Problems A Tasks g Console x Properties m Ailing Technical Support SDK Log Ex BH rf B ris 10 04 05 INFO SDK License expiring soon You lt x a a Select 3 Party Cable Xilinx Plug in and type in cable type xilinx_plugin modulename digilent_plugin into the Other Options field www digilentinc com page 11 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual YAN LH i J www digilentinc com i Configure JTAG Settings Configure JTAG Settings Specify the JTAG cable to use For communication and JTAG Device Chain configuration of the target board These settings affect how XMD connects to the FPGA JTAG Cable Type ard Party Cable silinx Plug in Port Frequency Other Options cable type xilinx_plugin modulename digilent_plugin JTAG Device Chain Automatically Discover Devices on JTAG Chain Manual Configuration of JTAG Chain
4. Digilent Plug in for Xilinx 12 x Tools User Manual Revision June 29 2010 1300 NE Henley Court Suite 3 Pullman WA 99163 509 334 6306 Voice and Fax NDIGILENT www digilentinc com Overview The Digilent Plug in for Xilinx tools allows Xilinx software tools to directly use the Digilent USB JTAG FPGA configuration circuitry For 12 x Xilinx Impact Chipscope Pro EDK Xilinx Microprocessor Debugger XMD command line mode and EDK Software Development Kit SDK are currently supported by the Plug in Refer to http www xilinx com for more information about these Xilinx design tools Demonstration Designs for the Nexys2 and Basys2 boards are provided to verify correct operation of the plug in Software Versions Tested Xilinx ISE Design Suite Version 12 x only Refer to http Awww digilentinc com for versions of the plugin for later Xilinx ISE versions Digilent Adept System 2 4 or Digilent Runtime 2 3 for Linux or greater Supported Operating Systems e Microsoft Windows 32 bit and 64 bit Operating Systems e Linux Red Hat and CentOS 4 8 5 4 x86 x64 and SUSE 11 2 x86 x64 Windows Installation To begin ensure that the Xilinx ISE Suite 12 x only and Digilent Adept System 2 4 or greater is installed on the host computer The Plug in files lipbCseDigilent dll and libCseDigilent xml must be copied into the ISE Design Suite installation For the ISE Design Suite the typical location is C Xilinx 12 1 ISE
5. PEW PU OT Tisei bere sarc oo bo we So ee OLE Herd Divider SUSPOP EU wkhadwdtwk ead off Hard Multiplier Support amp so ee wee wed on Mul32 Barrel Shifter SUPPO D lt tAa dake eat off MSR cir7 sec Instruction Stpportl lt 0n Compare Instruction Suppor ls ad o on Data Cache Write back Support off Download Program Connected to m6 target id executable for Starting GDB server for mb target i g Microblaze to execute XMD dow executable elf SVsotlem RESELL err DONE Downloading Program executable elf section vectors reset Ox00000000 0x00000003 section vectors sw_exception O0x00000008 0x0000000b section vectors interrupt 0x00000010 0x00000013 section vectors hw_exception 0x00000020 0x00000023 section text 0x00000050 0x000005eb section init 0x000005ec 0x0000060f section lina 0x00000610 02000006Zb section rodata Ox0000062c 0x00000661 section sdata2 0x00000662 0x00000667 section data O0x00000668 0x00000777 section ctors 0x00000778 0x0000077f section dtors 0x00000780 0x00000787 section eh_frame 0x00000788 0x0000078b section Jcr 0x0000078c 0x0000078f section bss 0x00000790 0x000007b3 section heap 0x000007b4 0x000009b7 section stack 0x000009b8 0x00000db 7 Setting PC with Program Start Address 0x00000000 XMD read uart Display UART output in XMD Connected to MDM UART Target XMD con Start Microblaze Executing RUNNING gt XMD Enteri
6. The AsyncOut values are connected to the 8 LEDs on the Nexys2 board Click on any of the Value cells to change their contents The following configuration lights up 4 LEDs in a row www digilentinc com page 5 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual ei VIO Console DEV 0 MyDeviced KC3S5006 o E Dd Bus Signal Value AsyneIn 0 Asyncin 1 Asyneltn z ASsyncoutl 0 Asyncoutcl 1 Asyncoutl e Asyncuutl 3 Asynclurl 4 Asyncoutl 5 Asyncuutl 6 Asyncoutl TF Close Chipscope Pro Analyzer This concludes the Chipscope Pro part of the Demonstration Project While only the Virtual IO Console was used in this design any Chipscope Pro module can be utilized to assist in debugging the design Xilinx Microprocessor Debugger XMD Setup The Plug in can also be used with Xilinx Microprocessor Debugger XMD command line mode By adding the option cable type xilinx_plugin modulename digilent_plugin to commands which interface with the hardware XMD will utilize the Plug in Note Answer Record 35580 contains an updated XMD version for 12 1 http www xilinx com support answers 35980 htm Here is an annotated example iteration Launch the EDK Bash Shell and type the following commands in bold Xilinx Bash Shell Xi Lins EDK 12 1 Build EDK Msi 535 Copyright c
7. _DS ISE lib nt plugins Digilent libCseDigilent Note For 64 bit Windows use nt64 in place of nt Rf libCseDigilent DER File Edit wiew Favorites Tools Help qe Address C ilinx12 1415E_DSiTSEVib nt plugins DigilentilibCseDigilent v 3 3 O Back F a pi Search Wey Folders Hee Folders libCseDigilent dll E a lb A 2 0 2 0 5 a 7 Digilent Plug in For silinx ISE D 2 perlib ee libCseDigilent xml E plugins 8ML Document E Digilent IKE libCseDigilent Xilinx Doc 506 012 page 1 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual Linux Installation To begin ensure that the Xilinx ISE Suite 12 x only and Digilent Adept Runtime 2 3 or greater is installed on the host computer The Plug in files libCseDigilent so and lipbCseDigilent xml must be copied into the ISE Design Suite installation For the ISE Design Suite the typical location is XILINX lib lin plugins Digilent libCseDigilent Note For 64 bit Linux use lin64 in place of lin Nexys2 Demonstration Project The Nexys2 Demonstration Project can be used to verify correct installation and operation of the Plug in Chipscope Pro Setup The Nexys2 Demonstration Project is a Xilinx EDK design with an embedded Chipscope Pro Virtual IO module Refer to ht
8. dit YE Operations tput Debug Window Help A H B 2 Cable Auto Connect Cable Setup IMPACT Flows seu els Boundary 5 Cable Reset Ouna SCAN Advanced LISB Cable Set SystemAce cai able Setup Create PROM File PROM File 2ble Disconnect Disconnect All Cables SWF File STAPL File Right click to Add Device or Initialize JTAG chain SOME File IMPACT Processes 7 Available Operations are Ge Boundary Scan Console Cable connection failed PROGRESS END End Operation Elapsed time 3 Sec El Console Errors h Warnings Examine and change cable communication settings No Cable Connection No File Open Select Open Cable Plug in and type in digilent_plugin www digilentinc com page 8 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual TN DIGILENT www digilentinc com Cable Communication Setup Communication Mode Parallel Cable ITI Platform Cable USBI Parallel Cable Iw Advanced USB Cable Setup TEK Speed Baud Rate Port Cable Location Local Remote Cable Plug in Open Cable Plug in Select or enter a Plug in From the list below digilent_plugin kai Right Click in the Boundary Scan window to Initialize Chain E ISE iMPACT M 53d Boundary Scan Sele A X IMPACT Flows 7 Boundar
9. ng main Exiting maint i Stop Microblaze Execution XMD stop XMD Display Microblaze registers www digilentinc com page 7 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual f DIGILENT J www digilentinc com XMD rrd ro 00000000 r8 00000000 r16 00000000 r24 00000000 ri 00000d88 r9 00000000 r17 00000000 r25 00000000 r2 00000668 r10 00000000 r18 00000000 r26 00000000 r3 00000000 r11 00000000 r19 00000000 r27 00000000 r4 00000000 r12 00000000 r20 00000000 r28 00000000 r5 00000000 r13 00000790 r21 00000000 r29 00000000 r6 00000000 r14 00000000 r22 00000000 r30 00000000 r7 00000000 r15 000003a8 r23 00000000 r31 00000000 pe O000006c msr 00000000 XMD mrd 0x81400000 i Ea Ronoocs Read the values of the 8 Slide Switches via GPIO XMD mrd 0x81400000 81400000 00000095 Manually Change the Slide Switch positions and re read the values XMD S exit cygdrive c digilent nexys2 binaries This concludes the Xilinx Microprocessor Debugger XMD part of the Demonstration Project Impact Setup Xilinx Impact is used to download FPGA bitstreams to FPGA boards The following steps show how to use Impact with the Plug in First launch Impact and Select Output gt Cable Setup menu item ISE iMPACT M 53d Boundary Scan en File E
10. project Ed JTAG Configuration File download bit Director CADigilentinexys Abinaries Select Mew File Import Design level CDC File MOTE This operation cannot be undone Design level COC File _ Auto create Buses File Directone CADigilentnexys Abinaries After selecting OK Chipscope Pro Analyzer will configure the FPGA with the download bit configuration file After successful configuration the Yellow Done LED should be light on the Nexys2 board The GUI will show there is one VIO Console device attached New Project JTAG Chain DEVO MyDeviced C3S500E UNITO Mylon fio VIO Console DEV WyDevicel HCFO4S Double Click on the VIO Console item which brings up that window www digilentinc com page 4 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual Press BTNS on the Nexys2 board and notice the VIO Console displays that action Bus Signal AsyneIn 0 Asyncin 1 AsyneIn 2 Asyncoutl 0 Asyncoutcl 1 ASsyncoutl 2 Asyncuutl 3 Asyncoutl 4 AsyncUutl 5 Asyncoutl 6 Asyncoutl 7 Bus Signal Asyncin Oo Asyncin 1 AsynelIn 2 Asyncout 0 AsyncUutl Ll Asyncoutl e Asyncoutl 3 Asyncuutl 4 Asyncoutcl 5 Asyncoutl 6 Asyncoutl 7 ea VIO Console DEV 0 MyDewiced XC3S5006 o E pq
11. rs EN Warnings Configuration Onboard USB 1600000 EDK Software Development Kit SDK Setup The following steps show how to use the EDK Software Development Kit SDK with the Plug in First launch SDK and Select Xilinx Tools gt Configure JTAG Settings menu item www digilentinc com page 10 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual DIGILENT www digilentinc com i C C hw_platform_O system xml Xilinx SDK File Edit Source Refactor Navigate Search Run Project PM Iyeumm Sy Window Help m e a G N coverste iker script Ow ib BS Bi cic fk a n N Board Support Package Settings Repositories Project Explorer 28 0 ay system xm 1 O Welcome QO oe Dim Sor at System Generator Co Debug Settings Siar B 7 line is not A hw_plat EJ Launch Bash Shell le E EL hw_platform_0 Xilinx SDK Design Infa a Program Flash ne Configure JTAG Settings Target FPGA Creat 22 Program FPGA Cre 34 XMD Console PS Design Xilinx SDK is based on Eclipse 3 5 and CDT 6 0 1 Getting Started Memory Map for processor microblaze_0 eee a T e Getting Started with Xilinx SDK dimb_cntlr OxO0000000 0x00003f1 e EDK Concepts Tools and Techniques imb cnt Ox00000000 0x00003f1 ous Frequently asked questions LEDs bit Ox81
12. tp www xilinx com for more information about these Xilinx design tools Launch Chipscope Pro Analyzer and Select the JTAG Chain gt Open Plug in menu item File View JTAG Chain Device Window Help New Projec JTAG Chain siline Parallel Cable i i Ailing Platform USB Cable ChipScope Pro Analyzer new project Open Plug in Plug in Parameters digilent_plugin 7 Chipscope Pro Analyzer will automatically detect the devices on the Nexys2 board www digilentinc com page 2 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual ChipScope Pro Analyzer JTAG Chain Device Order Device Mame 0 MyDeviteL AC S5S500E 41c227093 1 MyDevice KCFO4S 5046093 a Right Click on MyDeviceO XC3S500E and select Configure New Project JTAG Chain NEVO hivDeviced tx allo DE Rename Configure Show IDCODE Show USERCODE a show Configuration Status Show JTAG Instruction Register Select the download bit file in the nexys2 binaries directory www digilentinc com page 3 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual ChipScope Pro Analyzer new
13. y Scan B System CE E Create PROM File PROM File Formatter Fight click to Add Device or Initialize JTAG chain IMPACT Processes Available Operations are Add xiin Device Ctrl C Add Non ilinx Device Chrl k Initialize Chain Ctrl I Cable Auto Connect er Boundary Scan Cable Setup Console Output File Type W INFO iMPACT Digilent Plugin Firmware Version 0303 i INFO iMFACT Digilent Plugin JTAG Port Number O W INFO iMPACT Digilent Plugin JTAG Clock Frequency 1600000 Hz Console Errors E Warnings Configuration Onboard USB 1600000 Impact is now ready to communicate with the FPGA on the board www digilentinc com page 9 of 12 Copyright Digilent Inc All rights reserved Other product and company names mentioned may be trademarks of their respective owners Digilent Plug in for Xilinx Tools User s Manual VAN TT J www digilentinc com ISE iMPACT M 53d Boundary Scan ee File Edit View Operations Gutput Debug Window Help iDA BXDXH SSL AMAR iMPACT Flows O x 22 Boundary Scan SystemAce 3 Create PROM File PROM File Formatter xc3s500e xcfo4s 3 G bypass bypass IMPACT Processes Available Operations are E mp Get Device ID Identify Succeeded m Set Device Signature Usercode m Read Device Status Boundary Scan FS Console So PROGRESS END End Operation Elapsed time Oo zec ff ttt BATCH CMD identifyMPM E Console Erro
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