PCI8282 User's Manual
Contents
1. mountar 6 Countar 7 Frequency Measurernant Event Counter Frequency Input EXT_CLI pin B Do g pin18 EXT GATE T pin 28 Event Source EXT CLKB niri 1 1 COLIT 7 pin29 EXT GATE B pin 27 Do 7 pin37 gt EXT GATE B pin 30 8YS CLOCET 0 5 MHz Frequency 2 5 MHz Start Stop Figure 2 17 Perform 8254 chip 2 test of DASP 52010 Frequency measurement Event counting Counter 6 and Counter 7 of DASP 52010 are tested by a frequency measurement experiment Counter 7 is configured as a reference time base for the measurement and Counter 6 is used to count the external measured signal period base on the reference time interval Counter 8 is configured simply to serve as an event count to count the external event pulse 26 Hardware Installation DASP 52010 Card User s Manual es Test Tool Workshop DASP 52011 E E M 10j a xl Ije View Winlow Hep 181 xi Testing Refresh Exit Device Information ID amp amp N E0 S 0 010359010 DLL version 20040425 Digital input 8254 Chipo 8254 Chipi 8254 Chipz 8254 Chip J r Gn Board Clock 2 Syelem Clock t re System Clock 1 05Hz Sel a r Counter a Pulse Width Measuorerment Pulse Source EXT GATE 8 pin 31 EXT GATE 9 pin 31 DI 11 pin 13 Pulse Vidt 3100 ms Stop Figure 2 18 Perform 8254 chip 3 test of DASP 52010 Pulse width mea2. Every counter is 16 bits In mode2 valid count value from 2 to 65536 count value 0 equal to 65536 If want a large count value to get a low frequency rate you can cascade two or more counters 4 3 PWM Output You can use two counters to provide a simple PWM Pulse Width Modulation output Example PWM Output We select Counter and Counter to this application Counter1 for PWM Output Counter2 for PWM time base Step 1 Use DO2 to enable Counter2 Wire DO2 Pin 16 to EXT GATE2 Pin 24 on the connector Connect COUT1 Pin 23 to your external device Connect COUT2 Pin 6 to EXT GATE1 Pin 22 Register Structure and Format 39 DASP 52010 Card User s Manual Step 2 Write 0 to DO2 Step 3 Configure SYS_CLOCKI1 to 0 5 MHz Step 4 Configure Counter1 to EXT_GATE1 SYS CLOCK1 and MODE1 Configure Counter2 to EXT GATE2 SYS CLOCK1 and MODE2 Step 5 Write count value 100 to Counte2 50 to Counte1 Duty Cycle 50 100 5096 Step 6 Write 1 to DO2 0 5 MHz SYS CLOCKO C O al Extern Counter 1 COUT 7 VICE EXT GATEI G SYS CLOCKO Counter 2 gt cour DO2 EXT_GATE2 4 4 Square Wave Generator You can use DASP 52010 counters to generate a square wave output for a rate generator a frequency generator or a frequency division Example 500 KHz Square Wave Generator We select C
3. 1MHz Q0 sys CLOCKO 2MHz SYS CLOCKO 4MHz X Reserved bit 3 2 4 Read External Gate Control Signals 0 3 and Clock Sources 0 3 Digital Input Channel 0 to 7 Base Address Offset 0x04 0 os os o p3 m DI oo GATE3 GATE2 GATE1 GA TEO CLK3 CLK2 CLK1 CLKO DI7 DIG DI5 DIA DI3 DI2 DI1 DIO 3 2 5 Write 82c54 GATEn Source Selection Base Address Offset 0x05 0 D D5 oa p3 m DI oo GATE7 GATE6 GATES GATEA GATE GATE2 GATE1 GATEO GATEn 0 GATEn switch to external gate input pin EGATEn GATEn 1 GATEn switch to OUT of counter n 1 COUTn 1 Note GATEO can switch to COUT3 GATE6 can switch to COUTY Register Structure and Format 31 DASP 52010 Card User s Manual 3 2 6 Read External Gate Control Signals 6 9 and Clock Sources 6 9 Digital Input Channel 8 to 15 Base A Offset A o ae ER o e e cuim cuis DI15 DI14 DI13 DI12 DI11 DI10 3 2 7 Write 82c54 CLKn Source Selection Base Address Offset 0x06 When Base 4 D2 0 06 D5 DA os o DI w CLK3 1 CLK3 O CLK2 1 CLK2 0 CLK1 1 CLK1 0 CLKO 1 CLKO O pas ciocio pscocr couna cun Caio caso pec axi onea i soca Tawon o Lama ioxezi O Eo Lami ecma e scoco Lamisouaozi soca asista so ow Camna fe dQ1 00Q0 0 Bscioko CIK2 1 0 CIK20 1 fsys c
4. decreasing the time of searching confirmation 1 Features 1 eo 8 independent 16 bit timer counter 2 cascade 32 bit timer counter Oo 8TTL level D I D O O jumper selectable interrupt source O Software selectable interrupt source e 4 interrupt source 2 counter amp 2 D I e 2 on board internal clock source 8 external clock source 8 external gate control signal o Windows amp 98 NT 2000 XP and Labview 6 0 7 0 driver supported e Complete sample program VB VC BCB Delphi 1 2 Specifications Digital Inputs Input channels 16 clock gate control Input type TTL level Input voltage Low 0 5 0 8V High 2 0 5 2V Interrupt source COUT5 COUT7 COUT11 EXT CLK9 2 Introduction DASP 52010 Card User s Manual DI11 Load current 0 45mA to 70 gA Digital Outputs Output channels 8 I nput type TTL level I nput voltage Low 0 5 0 8V High 2 0 5 2V Sink source 64mA Source current 15mA Introduction DASP 52010 Card User s Manual Timer Counter Channels 8 16 bit independent 2 32 bit cascaded Type TTL level Programmable clock 0 5MHz 1MHz 2MHz 4MHz Programmable counter mode 12 Max frequency 10 HMz Time based internal external clock General environment I O connector type 37 pin D sub female Power consumption 5V 500mA typical 5V 600mA max Operation temperature 0 60 C Storage temperature 20 to 0 C Humidity 0 to
5. om DLL Version 20040425 Digital input 8254 chino 8254 Chipt 8254 Chip2 8254 Chip3 DI LED Bit0 8it7 E NN NN NND NND UND MM wre E NB NN ENDO UND UND HN 5068 DO LED BilQ Bit7 Figure 2 12 Select test target DASP52010 Hardware Installation 21 DASP 52010 Card User s Manual 10 l xl lalz Device Informaiion ID SSN E0 Sm s103a010 Digital Input 8254 chino 8254 chip1 8254 Chipz 9254 chips Value BI LED Bitt 8itr o NN NN A A eee ooo 8 BB E E E BR Value x3B DO LED Bil Bit7 A ma ma ww NN UE ON a mn Figure 2 13 Check device information and press Enable button to load DASP 52010 library 22 Hardware Installation DASP 52010 Card User s Manual LEP 52010 l B xj ues es Mindow E 181 x Testing E Device Informaiion lb amp SH fino smo0103a010 Sms 1033014 ersion 20040425 ewe ome Digital Input r DASF 52010 54 Chipo 8254 chipt 8254 Chipz 8254 Chipa Value DI LED Bii0 BiT os MO NN E ED O GNU OH ens ooo 8 BOB E 8 E E value x3B DO LED Bil Bit7 A ma ma ww NN UN UN wd mn Figure 2 14 Perform digital input output test by set the DO port value and read back the DI port value of DASP 52010 Hardware Installation 23 DASP 52010 Card User s Manual ES Test Tool Workshop DASE 520
6. 90 non condensing Dimensions 185mm x 122mm Introduction DASP 52010 Card User s Manual 1 3 Accessories To make the DASP 52010 functionality complete we carry a versatility of accessories for different user requirements in the following items Wiring Cable Oo CB 89037 2 37 pin female D sub type cable with 2m length O CB 89037 5 37 pin female D sub type cable with 5m length The shielded D sub cable with 2m and 5m are designed for the DASP 52010 I O connector respectively Terminal Block O TB 88037 D sub 37P female terminal block with DIN rail mounting The terminal block is directly connected to I O connector of the DASP 52010 Introduction 5 DASP 52010 Card User s Manual This page does not contain any information 6 Introduction DASP 52010 Card User s Manual Chapter 2 Hardware Installation 2 1 Board Layout Ut U7 U12 U13 U16 8254 8254 8254 U2 U8 CPLD T m 8254 RP1 U3 JP3 CON2 i deb 2 U15 U18 U6 U11 3 OSC PCI Bridge U19 U5 U10 le DOT A Figure 2 1 Board layout for the DASP 52010 Hardware Installation 7 DASP 52010 Card User s Manual 2 2 Signal Connections Signal Connection Descriptions CON1 Bue A
7. counter n EXT GATEn external gate control signal for counter n COUTn output of timer counter n DOn digital output channel n Din digital input channel n All signals are TTL compatible Hardware Installation 11 DASP 52010 Card User s Manual 2 3 Jumper Setting 2 3 1 JP1 Interrupt Source Selection There are four signals can be used as interrupt sources COUT5 COUT7 COUT11 EXT_CLK9 DI11 N AM TTT ToT JP 1 2 3 JP3 12 Hardware Installation DASP 52010 Card User s Manual 2 4 Timer Counter and DI DO Circuits and Wiring The internal clock source internal timer counter functional block diagrams of DASP 52010 are depicted as in figure 2 4 figure 2 6 The digital input and digital output wirings are depicted as in figure 2 7 to figure 2 8 respectively 2 4 1 On board Clock Sources Figure 2 4 Block diagram of internal clock source for the DASP 52010 The DASP 52010 has 2 on board internal clock sources SYS CLOCKO and SYS _CLOCK1 SYS CLOCKO may be software programmable to 4MHz or 2MHz SYS CLOCK1 may be software programmable to 1MHz or 0 5MHz 2 4 2 Counter Architecture The DASP 52010 has four 82c54 chips on board It offers 8 independent 16 bits timers counters and 2 cascaded 32 bits timers counters 2 on board software programmable internal clock sources provide 4MHz 2MHz and 1MHz 0 5MHz clock signal for Hardware Installation 13 DASP 52010 Card User s Manual system time ba
8. 10 EnINT_ NeglINT INV11 INV9 INV8 INVn 0 COUTn switch to normal output level Default after software installed INVn 1 COUTn cascade to an inverter NeglINT 0 Interrupt line output high active NeglINT 1 Interrupt line output low active Default after software installed EnINT 0 Disable interrupt Default after software installed EnINT 1 Enable interrupt X Reserved bit 34 Register Structure and Format DASP 52010 Card User s Manual 3 2 12 Write Clear Interrupt Status Base Address Offset 0x18 0 os os os p3 m DI DO Register Structure and Format 35 DASP 52010 Card User s Manual This page does not contain any information 36 Register Structure and Format DASP 52010 Card User s Manual Chapter 4 Applications This chapter shows seven typical DASP 52010 application examples 1 Pulse Output a Rate Pulse Generator b PWM Output c Square Wave Generator 2 32bits Real Time Clock 3 Frequency Measurement 4 Event Counter 5 Pulse Width Measurement 4 1 Wire Configuration Wire configuration for application sample code is given below Applications 37 DASP 52010 Card User s Manual Application Demo PCB s GND 20 PCB s GND EXT_CLKO DIO 21 EXT GATEO DIA Rate Output lt lt COUTO 22 EXT_GATE1 DIS EXT CLKI DII EXT CLK2 DD COUT2 EXT CLK3 DI3 Frequency Input gt EXT CLK6 DIS COUT6 EXT CLK7 D
9. 10 I nl x Ej Fie Yew Widow Help alal pr Testing Refresh Exit E DASP 53010 Dewce Information IDS SN E0 Smsi1O03a01U DLL Version 20040425 E gen ne amp 254Chip 254 cnip1 3254 chip2 8254 chips PEA EE COn Board Clock Beg A D pT lenin l System Clock m 2d System Claek 1 0 5hHz Sel L uc E E d 13 Counter Geunter 1 Counter 2 Rate Generator PM Output DO 2 pin18 ExT_GATE 2 pin24 COUT 2 pin Sje EXT GATE 1 pin22 ER OSEE bal Output COUT 1 pin 23 F Hz System Clock O Value 0 Value so Value2 roo Value 0 5 F Hz System Clock 1 f Value Duty Cycle xev alueTi valug2 Da 0 pind 4 EXT GATE 0 pin21 Figure 2 15 Perform 8254 chip 0 test of DASP 52010 Rate Generator amp PWM output System clock O and counter O are used to perform a rate generator DO 0 pin 15 is wired to EXT GATEO pin 21 external gate control of counter O to serve as the start stop control of the rate generator Filed Value is used to keep the user specified frequency divider of the rate generator A pulse train with frequency of System clock 0 frequency frequency divider is available in COUTO pin 3 System clock 1 counter 1 and counter 2 are used to perform a PWM output The counter 2 serves as the PWM time base and the counter 1 produces PWM waveform Filed Value 7 is us
10. AA WE A H A CB 89037 2 TB 88037 CB 89037 5 DASP 52010 Figure 2 2 Signal connections for the DASP 52010 Referring to Figure 2 2 the accessories of the DASP 52010 are depicted in figure 2 3 and described as below CONI The I O connector CONI on the DASP 52010 is a 37 pin D sub female connector for digital input signals CON1 enables you to connect to accessories the terminal block TB 88037 with the shielded D sub cable CB 89037 2 or CB 89037 5 O Digital Input Connector CONI CON1 D ODO 8 Hardware Installation DASP 52010 Card User s Manual Hardware Installation DASP 52010 Card User s Manual TB 88037 cdo 37 ho 2 3 4 5 6 2 8 9 10 11 12 13 14 15 16 1 18 15 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 DOOD MOM OM COM OC OOD DOOM GOOD DDD ORC Figure 2 3 DIO signal connections for the DASP 52010 10 Hardware Installation DASP 52010 Card User s Manual The pin assignment of CON1 of DASP 52010 is listed as follows D Sub 37 pin Connector for DASP 52010 CON1 CAC Li gem EXT GATEO DI4 EXT CLKO DIO EM 3 coum 123 4 EXTCIKI DI EXT GATE2 DIG 24 EXT CLK2 DI2 COUB 126 EXT GATEG DI12 27 EXT CLK6 DI8 COUT6 COUU 29 EXT CLK7 DI9 COoUS COUI DO1 DO3 34 DO3 35 a 2 i ROA Y e TOOTEL S 4 E E E a 45 m if Wile DO7 EXT CLKn external clock source for
11. DASP 52010 10 Channel Counter Timer Card User s Manual Disclaimers The information in this manual has been carefully checked and is believed to be accurate AXIOMTEK Co Ltd assumes no responsibility for any infringements of patents or other rights of third parties which may result from its use AXIOMTEK assumes no responsibility for any inaccuracies that may be contained in this document AXIOMTEK makes no commitment to update or to keep current the information contained in this manual AXIOMTEK reserves the right to make improvements to this document and or product at any time and without notice No part of this document may be reproduced stored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of AXIOMTEK Co Ltd Copyright 2004 by Axiomtek Co Ltd All rights reserved December 2004 Version A1 Printed in Taiwan Table of Contents CHAPTER 1 INTRODUCTION eene 1 Til WP wetter 2 PA o 2 Lo e d OEOPEPIOP0 0O0 A AA 5 CHAPTER 2 HARDWARE INSTALLATION 7 AT BONO iio EET TT 7 2 29 Signal CODIIODIOTIS aca eee iau ust bis 8 23 JUMPE SEDI arta 12 2 4 Timer Counter and DI DO Circuits and Wiring 13 2 5 Quick setup and si 17 CHAPTER 3 REGISTER STRUCTURE AND FORMAT sarria rose 29 del AIN mmm 29 32 VO Register ae 30 CHAPTER 4 APPLICATIONS eene 37 4 1 Wire GODI
12. I O Base Address 6 GATE 0 1 2 3 6 7 8 9 refer to I O Base Address 5 Clock1 refer to I O Base Address 4 COUT 0 1 2 3 6 7 8 9 refer to I O Base Address 6 GATE 4 5 10 11 always High CLK 4 10 always connect to Sys CockO OUT4 connect to CLK5 OUT10 connect to CLK11 4 3 Counter Output Inverter For convenience using every COUT wire to connector could be software programmable cascaded an inverter CLKO COUTO to O CLK OUT COUTO from 8254 omeci n CounterO GATEO y GATE Dus e Figure 2 6 Block diagram of software programmable cascaded an inverter for the DASP 52010 Hardware Installation 15 DASP 52010 Card User s Manual 2 4 4 Timer Counter and DIO wrring All the I O signals of DASP 52010 are in TTL level The I O wiring of DASP 52010 for both general DIO usage and timer counter I O usage are sketched in figure 2 7 and figure 2 8 TTL Device Figure 2 8 Digital output wiring diagram for the DASP 52010 16 Hardware Installation DASP 52010 Card User s Manual 2 5 Quick setup and test To install a new DASP 52010 into an IBM PC compatible computer at first power off the PC and open its chassis then plug the DASP 52010 into a PCI slot of mother board Please ensure that the BIOS setting of your PC has released enough IRQ resources for PCI devices Do not share the same IRQ of DASP 52010 with other devices The DASP 52010 is a plug and play device for MS Windows and
13. I9 gt EXT CLKS DIIO 23 COUTI gt PWM Output 24 EXT GATE2 DI6 25 EXT GATE3 DI7 26 COUT3 mE 27 EXT_GATE6 DI12 28 EXT GATET DI3 29 COUT 7 30 EXT GATES DIA Square Wave Output ONIN tA HR wW N eR o na o Event Source Re ne COUTS8 12 Event Trigger EXT GATE9 DII5 Pulse Source EXT CLK9 DII1 13 lt lt COUTS 14 keen 32 bits Timer COUTII 32 bits Timer DOO 15 DOI DO2 16 DO3 DO4 17 DOS DO6 18 DO7 PCB s 5V Output EN o CNI D Sub 37 pin 4 2 Rate Generator You can use DASP 52010 counters for a rate generator a frequency generator or a frequency division Example 500 KHz Rate Generator We select CounterO to this application Step 1 Use DOO to enable and pause CounterO Wire DOO Pin 15 to EXT GATEO Pin 21 on the connector Connect COUTO Pin 3 to your external device Step 2 Write O to DOO Step 3 Configure SYS CLOCKO to 2 MHz Step 4 Configure CounterO to EXT GATEO SYS CLOCKO and 38 Applications DASP 52010 Card User s Manual MODE2 Step 5 Write count value 4 to CounteO 2 MHz 4 500 KHz Step 6 Write 1 to DOO 2 MHz SYS_CLOCKO C Counter 0 DOO EXT GATEO G COUTO External Device
14. IGUPAl DIL eise eEi ca tac cio 37 42 Rate GENEIGT odia 38 ao AA 39 4 4 Square Wave Generator ooccoccccocccconocconconcnnanos 40 45 32 bits Real Time LIO iras ia 41 4 6 Frequency Measurement cesses 42 ar EVent eoa T m mI 44 4 8 Pulse Width Measurement APPENDIX A DIMENSION OF DASP 52010 AND AGDGESSUORIES DASP 52010 Card User s Manual Chapter 1 Introduction TE ETT AAA TN and dde uL bulls VEETEELT TEEI Me ero The DASP 52010 is a PCl bus eight 16 bit two cascaded 32 bit timer counter card It supports 16 general purpose digital I O channels making it suitable for frequency measurement event counting time delay and pulse generation applications Board Identification Serial Number on EEPROM The DASP stores the serial number of each DASP in the EEPROM before shipping The PCI scan utility can scan all the DASP and show users the serial number of each DASP helping the user to easily identify and access each card during hardware configuration and software programming Easy to troubleshoot hardware resource PCI Scan Utility Introduction 1 DASP 52010 Card User s Manual The PCI scan utility can scan all the DASP products within the system and can show users all system resources such as serial numbers IRQ and I O addresses This lets users clearly see through and immediately know whether all DASPs are working normally
15. RM COND 00 4 DUR CORE UN O O AN A 48 Dimension of DASP 52010 and Accessories
16. ase 0x8 Reserved Counter Output Inverter Control Word Low Byte Reserved Reserved Reserved Reserved Reserved Base 0xE Reserved Reserved Base OxF_ Reserved Reserved Base 0x10 Reserved Counter Output Inverter Control Word High Byte and Interrupt Control Word Register Structure and Format 29 DASP 52010 Card User s Manual Base 0x11 Base 0x12 Reserved Reserved Base 0x13 Base 0x14 Reserved Reserved Base 0x15 Reserved Reserved Base 0x16 Reserved Reserved Base 0x17 Reserved Reserved Ba se 0x18 Reserved Clear Interrupt Status 3 2 I O Register Map 3 2 1 Read Write 82c54 Counter Base Address Offset 0x00 02 pz os o4 o3 D2 pi oo 8 bit Counter Data DO D7 3 2 2 Write 82c54 Counter Control Word Base Address Offset 0x03 07 06 05 oa o3 D2 DI oo 8bit Counter Data D0 D7 8 bit Counter Data D0 D7 3 2 3 Write 82c54 Chip 1 2 3 4 and SYS_CLOCK Source Selection Base Address Offset 0x04 0 os 05 a D3 2 om Only one 82c54 is selected to access at a moment ChpSel1 ChpSel0 Chip Selected oo Chip 2 AE Chip 1 Ca US 1 1 Only one CLK set 4 82c54 CLK Source is selected to be switched at a moment 30 Register Structure and Format DASP 52010 Card User s Manual pact fo 0 Active CLK 0 3 Source 1 Active CLK 6 9 Source CIkselo CTO Q0 SYS CLOCK1 0 5MHz SYS CLOCK1
17. ed to keep the user specified duty cycle of the PWM output 24 Hardware Installation DASP 52010 Card User s Manual es Test Tool Workshop DASP 5201 lO o xl El Tew Window Help la xl e Testing Retresh Exit DSSP S2010 Device Information ID amp SH 55 sA 0 071035010 DLL Version 20040425 Digital Input 8254 Chipol _ 9254 Chip e254 Chipz 8254 Chipa On Board Clock Setting Byetem Clock D 24 System Clock 1 osunz Sel p counter 3 Square Ware Output DO 2 pin35 EXT_GATE 3 pin25 uput COUT 3 pim 25 F H System Clock Os Value 3 Value 3 2 Figure 2 16 Perform 8254 chip 1 test of DASP 52010 Square wave output In the 8254 chip1 test branch the Filed Value 3 is used to keep the user specified frequency divider of the square wave and the system clock O is used to produce the base frequency of the square wave In real time clock application counter 4 and counter 5 are cascaded to perform a 32 bit counter for counting the system clock pulse number and than sever as a 32 bit timer interrupt source for host program Hardware Installation 25 DASP 52010 Card User s Manual Inl xi lel x Ea BE cr Testing Retesh Exit Derice Information ID amp EN IDO Sheoe01osan10 BLL Version 20040425 Digital Input 8254 Chip 3254 Chip On Board Clock Seting System Clock 0 21 System Clock 1 0 5MHz Sel
18. nterrupt signal Register Structure and Format 45 DASP 52010 Card User s Manual 4 8 Pulse Width Measurement You can use counter to make a roughly pulse width measurement Example Pulse Width Measurement We select Counter9 to this application Step 1 Connect pulse source to EXT_GATE9 Pin 31 and DI11 Pin 13 Step 2 Configure SYS_CLOCKO to 4 MHz Step 3 Configure Counter9 to EXT_GATE90 SYS_CLOCKO and MODE2 Step 4 Write count value 65535 to Counte9 Step 5 Polling DI11 if DI11 change to low read in Counter9 count value Pulse Width 65535 Counter9 Count Value 1 4 MHz 4 MHz SYS CLOCKO C Counter 9 Pulse Source EXT GATE9 G DII1 In this example Max width be measured should short than 16 38 ms 46 Applications DASP 52010 Card User s Manual Appendix A Dimension of DASP 52010 and Accessories DASP 52010 m U1 U7 s E U3 T JP3 e U20 B 9 A ANAND 185 TB 88037 Dimension of DASP 52010 and Accessories 47 DASP 52010 Card User s Manual ld 23 495 6 7 B 3 1D 13 12 15 14 25 16 47 16 23 20 21 22 23 M 25 26 29 28 239 30 31 2233 34 35 X 3 NS AN AS A DOCERE
19. o 36 DO5 DO6 18 Dor PCB s 5V Output 19 Figure 2 9 I O wiring diagram for DASP 52010 full function test refer to pin assignment of CON 1 of the DASP 52010 2 Launch the PCI Configuration Utility of DASP 52010 to ensure that the resource of DASP 52010 is properly dispatched by the OS Press the scan button in the toolbar of the PC Configuration Utility to find the installed DASP 52010 and then check the resource list as show in figure 2 10 18 Hardware Installation DASP 52010 Card User s Manual ees umber Devil ren E xeu E ER MEDASP 52010 001030010 esims Dee OOO OO s nhe wien de RO Desenpi 0580100880 05 7 Beni y to Double Chek Highlight Mod ub NUM Figure 2 10 Scan DASP 52010 with PCI configuration Utility and check the dispatched resource Check the dispatched resource of DASP 52010 take care the IRQ resource especially Hardware Installation 19 DASP 52010 Card User s Manual 3 Exit the PCI Configuration Utility and launch the ToolWorkShop for DASP 52010 As shown in figure 2 11 AXIOMTEK CO LTD ToolWorkshop ToolWorkshop 18 x ToolWorkshop Figure 2 11 launch ToolWorkShop 2 Select board test 20 Hardware Installation DASP 52010 Card User s Manual 4 Perform Timer Counter and DIO test of DASP 52010 as shown in figure 2 11 DASP 52016 ToolWorkshop Device Information ID amp SN xo SN 0x01033010
20. ounter3 to this application Step 1 Use DOS to enable and pause Counter3 Wire DOS Pin 35 to EXT GATES Pin 25 on the connector Connect 40 Applications DASP 52010 Card User s Manual COUTS Pin 26 to your external device Step 2 Write 0 to DOS Step 3 Configure SYS_CLOCKO to 2 MHz Step 4 Configure CounterO to EXT_GATE3 SYS CLOCKO and MODE3 Step 5 Write count value 4 to Counte3 2 MHz 4 500 KHz Step 6 Write 1 to DOS 2 MHz la SYS_CLOCKO External Device C O Counter 3 COUT3 gt DO EXT GATB G m Every counter is 16 bits In mode3 valid count value from 2 to 65536 count value O equal to 65536 and must be even counts If want a large count value to get a low frequency rate you can cascade two or more counters 4 5 32 bits Real Time Clock DASP 52010 has two 32 bits cascaded timers counting interval from 1 micro seconds to 2147 48 seconds per tick Example 5 ms RTC Timer Interrupt We select Counter4 Counter5 to this application Register Structure and Format 41 DASP 52010 Card User s Manual Step 1 Set interrupt source jumper in COUT5 and set IRQ jumper to an unused IRQ number Connect COUT5 Pin 14 to your external device if necessary Step 2 Configure SYS_CLOCKO to 2 MHz Step 3 Configure Counter4 Counter5 to MODE2 Step 4 Set ISR to IRQn Step 5 Write count value 100 to Counte4 and Counter5 1 2 MH
21. se 8 external clock sources may be used as general purpose digital input and 8 external gate control signals may be used as general purpose digital input are contained and can assemble to realize specific applications as shown in figure 2 5 8254 Chip 0 8254 Chip 1 a CLK OUT couro NS gy CLK OUT COUT3 GATE ir SE gt GATE3 MSS CLki SYS CLOCK CLK OUT cour o ok Jour GATE e High 9 ao CLK2 CLK OUT COUT2 CLK OUT COUT5 GATE GRE High Q cute HUS 8254 Chip 2 8254 Chip 3 Tu CLK OUT coure Ue CLK OUT COUT9 GATE6 i ane m GATE9 En sonnel ae ae ata CLK OUT COUT7 o gt CLK OUT GATE7 E ELE High Q al 0 CLK8 an BRIDE ae EU GATES GATE High GATE Figure 2 5 Block diagram of internal clock source for the DASP 52010 e 8 independent 16 bits timer counter 2 cascaded 32 bits timer counter 14 Hardware Installation DASP 52010 Card User s Manual o o e o o o o 2 82c54 chip 0 gt counter 0 counter 1 counter 2 82c54 chip 1 gt counter 3 counter 4 counter 5 82c54 chip 2 gt counter 6 counter 7 counter 8 82c54 chip 3 counter 9 counter 10 counter 11 8 independent 16 bits timer counter gt counter O 1 2 3 6 7 8 9 2 cascaded 32 bits timer counter gt counter 4 5 counter 10 11 CLK 0 1 2 3 6 7 8 9 refer to
22. surement Counter 8 is tested by a pulse width measurement experiment The gate control of Counter 8 is wired direct to an external pulse source When the pulse turn to on and enable the gate control of the timer Counter 8 is initiated to counting base on rate of the System Clock 0 of DASP 52010 until the pulse turn off again The pulse width of the external pulse is then obtained according to the contents of Counter 8 and the period of System Clock 0 Hardware Installation 27 DASP 52010 Card User s Manual 5 Before exiting Too WorkShop press Release button to release DASP 52010 library All the details of DASP 52010 application used in these test branches are described in Chapter 4 28 Hardware Installation DASP 52010 Card User s Manual Chapter 3 Register Structure and Format 3 1 Overview The DASP 52010 board occupies 25 consecutive I O address The address of each register is defined as the board s base address plus an offset The I O registers and their corresponding functions are listed in the followings Base 0x3 Reserved Active 82c54 Counter Control Word Base 0x4 Digital Input Channel 0 7 or Select SYS CLOCKO 1 External GATE 0 3 CLK 0 3 source and 82c54 Chip 0 1 2 3 Active CLKn setting Base 0x5 Digital Input Channel 8 15 Selected 82c54 GATEn or External GATE 6 9 CLK Source 6 9 Base 0x6 Reserved Select 82c54 CLKn Source Base 0x7 Device Label Digital Output Channel 0 7 B
23. the OS will detect your DASP 52010 after you power on the PC The detail of driver and software installation is described in software manual of DASP 52010 After the hardware and software installation user can emulate and test DASP 52010 step by step as follows 1 To perform a full functional test of DASP 52010 we can route the input and output signals of DASP 52010 as in figure 2 9 And then by following the DASP 52010 test branch of the ToolWorkShop which will fully test all the on board timer counter devices of the DASP 52010 as descried in the following paragraphs Hardware Installation 17 DASP 52010 Card User s Manual ESE SAND 20 PCB s GND EXT CLKO DIO 2 21 EXT GATEO DI4 Rate Output lt COUTO 3 22 EXT_GATE1 DI5 EXT CLK1 DM 4 EXT cli uP 23 COUT1 PWM Output COT 24 EXT_GATE2 DI6 2 EXT_GATE3 DI7 EXT_CLK3 DI3 7 GATES Square Wave 26 COUT3 Frequency Input EXT CLK6 DI8 8 Output COTE T 27 EXT GATE6 DI12 ONES EXT_CLK7 DI9 10 UTD zi vent Source EXT CLK8 DI 11 p E T 30 EXT_GATE8 DI4 Event Trigger 31 EXT GATE9 DI15 Pulse Source EXT CLK9 DM 1 13 35 COURTS ite Ti COUT5 14 cet 32 bits Timer 500 33 COUT11 32 bits Timer DO 16 34 DO1 DO4 17 us D
24. ucture and Format 43 DASP 52010 Card User s Manual Frequency Input gt EXT_CLK6 C Counter 6 EXT_GATE6 G SYS_CLOCKO DI9 Counter 7 cour DO6 TEXT GATE7 In this example time base is 100 ms A proper frequency be measured should faster than 100 KHz 10 ms 4 7 Event Counter You can use DASP 52010 counters to count changes of external signals Example Even Counter We select Counter8 to this application Step 1 Use DO7 to enable and pause CounterO Wire DO7 Pin 37 to EXT GATES Pin 30 on the connector Connect EXT CLK8 Pin 11 to your event source COUTS Pin 12 to your external device if necessary Step 2 Write 0 to DO7 Step 3 Configure Counter8 to EXT GATES8 EXT CLK8 and MODEO Step 4 Write count value 65535 to Counters Step 5 Write 1 to DOO 44 Applications DASP 52010 Card User s Manual Step 6 When event happening Counter8 will count down Event Happen Times 65535 Counter8 Count Value 1 Event Source gt EXT CLKS C Counter 8 DO7 EXT GATES G COUTS gt External Device If need event alarm you can write a specific count value into Counter8 connect COUTS to your external device or set ISR to COUT8 When Counter8 count down to 0 COUTS will change to high and trigger an i
25. uocka CIK2I ICIK20 0 coun J duQ1s1dQ0 s1 euo CLK3 1 0 CLK3 0 0 B sciocko 32 Register Structure and Format DASP 52010 Card User s Manual When Base 4 D2 1 0 os D5 oa p3 o DI oo is coco ps coca eouma cun Casero creo so seoce gt Lamiseauo i ssaoca Cawn cows Lama iaee i ewe Peus iz0 cuso 0 scoe CIK5 1 0 CIK5 0 1 grscoca CIKS 1 1 CIK50 0 cours CIKS I 1 CIK5 0 1 ECKO CIK6 1 0 CLK6 0 0 Bscioco CIK6 1 0 CIK6 0 1 fsys ctocka CIK6 1 1 CIK6 0 0 ew ECLK8 CLK6 1 1 CLK6 0 1 CLK7 1 0 CIK7 0 0 SYS CLOCKO CLK71 0 CIK7 0 1 srsjcLock CLK7 1 1 CLK7 0 0 COUT8 3 2 8 Write Digital Output Channel 0 7 Base Address Offset 0x07 D 06 os 4 os on bos bos bo4 bos poz por boo 3 2 9 Read Device Label Base Address Offset 0x07 Device Label OxOe Register Structure and Format 33 DASP 52010 Card User s Manual 3 2 10 Write Counter Output Inverter Control Word Low Byte Base Address Offset 0x08 0 os os o p3 m DI oo INVn 0 COUTn switch to normal output level Default after software installed INVn 2 1 COUTn cascade to an inverter X Reserved bit 3 2 11 Write Counter Output Inverter Control Word Low Byte and Interrupt Control Base Address Offset 0x
26. z x100 x100 5 ms Step 6 When program ending unset ISR Wired to 2 MHz SYS_CLOCKO Dupont E O Wired to Counter5 l Co u nter 4 Clock Source Wired to High G on board on board L O External Counter 5 COUT5 gt Wired to High G Device on board The gate and clock source could set 0 in DLL driver it is no effect in Counter4 5 10 11 4 6 Frequency Measurement You can use two counters to make a roughly frequency measurement Example Frequency Measurement We select Counter6 and Counter to this application Counter6 42 Applications DASP 52010 Card User s Manual for frequency counter Counter7 for time base Step 1 Use DO6 to enable Counter7 Wire DO6 Pin 18 to EXT GATE7 Pin 28 on the connector Wire COUT7 Pin 29 to EXT GATE6 Pin 27 and wire COUT7 Pin 29 to DI9 Pin 10 Connect frequency source be measured to EXT_CLK6 Pin 8 Step 2 Configure COUT7 cascaded to an inverter write 1 to DOG Step 3 Configure SYS CLOCK 1 to 0 5 MHz Step 4 Configure Counter6 to EXT GATE6 EXT CLK6 and MODE2 Configure Counter7 to EXT GATET SYS CLOCK 1 and MODEO Step 5 Write count value 49999 to Counte7 65535 to Counter6 Time Base 1 0 5 MHz 49999 1 100 ms 0 1 s Step 6 Polling DI9 until 100 ms be accomplished Step 7 Read in the Counter6 count value Frequency 65535 Counter6 Value 1 0 1 Register Str
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