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PC104-386L-2MB PC/104 386SX CPU Module User's Manual

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1. 1 2 7 BOARDOVERVIEN iit certe Ro edu 15 2 8 INDEX TO UMPERS amp 5 441 4 4 RE 16 2 9 SYSTEM ENG Ka NAAN GN 16 Keyboard Mouse Connector J 5 17 PC 104 Connector CN7 amp 19 Hard Disk IDE Connector C NG 22 Reset Header Naa na ANA AMAG dne NAA Rn RR eases 23 Parall l Port Connector GN uasa DAN Ah 24 Ac 25 Senah PONS toot nec BA NINANG NIAN DAGTA NAA AGATHA idad 26 LAN Connector J 6 6 pin 2 5MM J ST eese eere terrent tnn tn tnn ten ttn tente taste tns totns torta tosta toss 28 Base C lock Select P2 aaa adio d e od cto arg 29 LU cuoc c 30 3 1 OVERVIEW three tacite oerte oes ue dde bac te anderer hes KANA oec cus 30 3 2
2. 14 PC 104 386L 2M SSD BIOS version 1 20 2000 NAGASAKI Corp Flash Disk Setting Disk 80h Base Port Address 0078h Firmware Seg Data Bank Seg C800h DOS Booting Driver As BIOS Setting M4 U5 Socket Setting SSD ESC Exit F5 Save amp Exit lt Select 1 Modify Hit lt Ctn gt to setup Flash disk Unknow 1536K Maximum Press F5 to save the setting The message Write to FLASH disk y n displa yed Press Y key to write the setting to the Flash disk The booting from other device Like physical HDD or FDD Use the FDISK command to partition the flash disk in DOS mode If system is not physical HDD the SSD is C Use FORMATC S C U The S SYSTEM BOOTING C Check U UNFORMAT If format parameter no S the SSD will be can t boot up the system Note If Flash Disk Simulates field select HDD The flash disk total size must be above to 512KB CAUTION It is not recommended that the user format the disk and copy files to the FLASH disk very often Since the FLASH EPROM s write cycle lifetime is about 10 000 or 100 000 times writing data to the FLASH too often will reduce the lifetime of the FLASH EPROM chips 33 NAGASAKI Corporation D O C Installation U12 Step 1 Insert programmed DiskOnChip into sockets U12 setting asDOC Step 2 Adjust SW1 2 to ON Step 3 Line up and insert the FB2310 card into any free space of yourcomputer Step 4 Use the D O C in no HDD equipment and a
3. And then the Messages box will show the Programming Flash gt and the gray statement shows Plea se Wait gt The BIOS update is successful the message will show Flash Update Completed Pass NOTE 1 If the system doesn t detect the boot procedure after power on please press the F5 key immediately The system will pass the CONFIG SYS and AUTO EXEC BAT files 2 The BIOS flash disk is not a standard accessory Now the onboard BIOS are the newest BIOS If user needs to add some functions in the future please contact our technical supporting engineers they will provide the newest BIOS for updating 3 Use the file AMIFLASH EXE from the attached CD ROM sfile It not uses Version 6 31 60 NAGASAKI Corporation APPENDIX SPECIFICATIONS CPU amp Chipset Bus Interface DRAM HDC FDC Serial Port Parallel Port Keyboard Real Time Clock BIOS Watchdog Solid State Disk Ethemet LED Indicator Power Connector Power Req PC Board Dimensions Fom factor Safety Other Optional features AU M6117 33 40 MHz under 5V powersupply Stack through PC 104 bus 2MB EDO RAM on board and 2 MB with 1 socket for expansion Two IDE type hard disk drives Two 5 25 or 3 5 floppy disk drives Two full RS 232C ports RS 485 Option One bi directional centronics type parallel port PC ATcompatible keyboard with 6 pin mini din connector BQ 3287MT or compatible chips Legal AMI Flashed sys
4. 2 6 PARALLEL PORTS gt Register Address Port Address Read Write Printer status buffer Base 2 Write Printer control latch Table 2 7 Registers Address gt PrinterInterface Logic The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel data at standard TIL level 2 Data Swapper The system microprocessor can read the contents of the printers Data Latch through the Data Swapperby reading the Data Swapper address NAGASAKI Corporation gt Printer Status Buffer The system microprocessor can read the printer status by reading the address of the Printer Status Buffer The bit definitions are described below 7 6 5 4 3 2 1 0 ERROR SLCT ACK BUSY Figure 2 1 Printer Status Buffer NOTE X represents not used Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 This signal may become active during data entry when the printer is off line during printing or when the print head is changing position orin an error state When Bit 7 is active the printer is busy and can not accept data This bit represents the current state of the printer s ACK signal 0 means the printer has received the character and is ready to accept another Normally this signal will be active forapproximately 5 mic roseconds before receiving a BUSY message stops A 1 meansthe printer has detected t
5. Not used 761 3 3 NotUsed 7 4 TRX 6 NotUsed 8 Connector 5 AccessleD 6 AccessLED Table 0 8 RJ 45 Pin Assignments 28 NAGASAKI Corporation CPU Base Clock Select J P2 The CPU base clock Input clock istwice of its operation clock 29 JP2 2 4 6 2 4 6 Bawa um 1 3 5 1 3 5 16 7MHz 33 3MHz 2 4 6 2 4 6 o oR Gt ENG 1 3 5 1 3 5 25 0MHz 40 0MHz Figure 0 13 P2 CPU Base Clock Select NAGASAKI Corporation CHAPTER 3 FLASH DISK The section describes the various types of solid state disk The following topics are covered Overview Switch Setting Programming Flash Disk SSD Flash Type Supported 3 1 OVERVIEW The PC 104 386L 2M provides one 32 pin J EDEC socketstwo PLCC socket which may be populated with up to 1 5MB 1MB of FLASH or DiskOnChip up to 288MB It isideal for diskless systems high relia bility and or high speed access applications controller for industrial or line test instruments and etc FLASH disk function enables you to use the 5V FLASH EPROM instead of UV EPROM and allows you to directly program the FLASH disk without having to purchase any additional programming equipment If small page lessor equal 512 bytes per page 5V FLASHs were used you could format FLASH disk and copy files onto FLASH disk just like using a normal floppy and hard disk You can use all of the related DOScommand such as COPY DEL etc to
6. 25 59 6 4016 26 DACK 7 142 27 5010 8 IRQ10 28 DRQ6 9 1421 29 5011 10 IRQ11 30 DACK 19 MEMRD16 39 20 DRQO 40 Ground Table 0 4 40 Pin PC 104 Connector Bus D 20 NAGASAKI Corporation 3 PC 104 ISA Signal Desc ription Name 2 BUSCLK Output The BUSC LK signal of the I O channel is asynchronous to the CPU clock RSTDRV Output This signal goes high during power up low line voltage or hardware reset 0 5 19 The System Address lines run from bit O to 19 They are latched onto the Input Output falling edge of BALE LA17 LA23 nput O utp ut The Unlatched Address line run from bit 17 to 23 SDO 5015 Input Output System Data bit O to 15 falling edge This signal is forced high during DMA cycles error exist on the I O board IORDY Input Open collector This signal lengthens the I O or memory read write cycle and should be held low with a valid address IRQ 3 7 9 12 14 15 Input The Interrupt Request signal indicates I O service request attention They are prioritized in the following sequence Highest IRQ 9 10 11 12 13 15 3 4 5 6 7 Lowest drive itsdata onto the data bus read data from the data bus memory are being used MEMRIG Input Output The Memory Read signal is low while any memory location is being read The System Memory Write is low while any of the low 1mega bytes of memory is being written
7. DRQ 0 3 5 7 Input DMA Request channels 0 to 3 are for 8 bit data transfers DMA Request channels 5 to 7 are for 16 bit data transfers DMA request should be held high until the comesponding DMA has been completed DMA request priority isin the following sequence Highest DRQ O 1 2 3 5 6 7 Lowest signals for DRQ Oto 5to 7 address bus It is low when the CPU is driving the address bus the microprocessor on the I O channel channel is reached The System Bus High Enable indicates the high byte SD8 SD15 on the data bus MASTER Input The MASTER is the signal from the I O processor which gains control as the master and should be held low for a maximum of 15 microseconds or system memory may be lost due to the lack of refresh wait state 16 bit data memory operation state 16 bit data I O operation OSC Output The Oscillator isa 14 31818 MHz signal ANS Input Open collector The Zero Wait State indicates to the microprocessor that the present bus cycle can be completed without inserting additional wait cycle Table 0 5 PC 104 ISA Pin Assignments 21 NAGASAKI Corporation Hard Disk IDE Connector C NG A 44 pin header type connector CN6 is provided to interface with up to two embedded hard disk drives IDE ATbus This interface through a 44 pin cable allows the user to connect up to two drivesin a daisy chain fashion To enable or disable the hard disk controller please use BIOS Setup program to selec
8. Figure 5 2 Standard CMOS Setup Date amp Time Setup Highlight the lt Date gt field and then press the Page Up Page Down or keys to set the current date Follow the month day and year format Highlight the Time field and then press the Page Up Page Down or keys to set the current date Follow the hour minute and second format The user can bypass the date and time prompts by creating an AUTOEXEC BAT file For information on how to create this file please refer to the MS DOS manual Hoppy Setup The Standard CMOS Setup option records the types of floppy disk drives installed in the system To enter the configuration value for a particular drive highlight its comesponding field and then select the drive type using the left or right a row key Hard Disk Setup The BIOS supports various types for user settings The BIOS supports Pri Masters Pri Slave gt Sec Master and Sec Slave gt so the user can install up to four hard disks Forthe master and slave jumpers please refer to the hard disk s installation descriptions and the hard disk jumper settings You can select lt AUTO gt under the lt gt and lt MODE gt fields This will enable auto detection of your IDE drives during bootup This will allow you to change your hard drives with the power off and then power on without having to reconfigure your hard drive type If you use older hard disk drives which do not support this feature then yo
9. Options Disabled Enabled Default setting Ena bled 47 NAGASAKI Corporation BootUp Num Lock This field is used to activate the Num Lock function upon system boot If the setting ison after a boot the Num Lock light is lit and usercan use the number key Available Options On Off Default setting On Drive Swap The field reverses the drive letter assignments of your floppy disk drives in the Swap A B setting otherwise leave on the default setting of Disabled No Swap This works separately from the BIOS Features floppy disk swap feature It is functionally the same as physically interchanging the connectors of the floppy disk drives When the function s setting is lt Enabled gt the BIOS swapped floppy drive assignments so that Drive A becomes Drive B and Drive B becomes Drive A under DOS Available Options Disabled Enabled Default setting Disabled Drive Seek This field is used to set if the BIOS will seek the floppy lt A gt drive upon boot Available Options Disabled Enabled Default setting Disabled Access Control This field spec ifies the read write access when booting from a floppy drive Available Options Normal Rea d only Default setting Normal HDD Access Control This field spec ifies the read write access when booting from a HDD drive Available Options Normal Rea d only Default setting Normal PS 2 Mouse Support The PS 2 mouse function is optional Before you confi
10. Setup Advanced Chipset Setup Peripheral Setup fiuta Detect Hard Disks Enter new supervisor password Exit Without Saving Change the supervisor password ESC Exit 11 5 1 F2 F3 Color Fi0 Saue amp Exit Figure 5 6 Enter New Super User Password Password Checking The password check option is enabled in Advanced Setup by choosing either Always the password prompt appears every time the system is powered on or Setup the password prompt appears only when BIOS is run The password is stored in CMOS RAM Usercan enter a password by typing on the keyboard As user select Supervisor or User The BIOS prompts for a password user must set the Supervisor password before user can set the User password Enter 1 6 character as password The password does not appear on the screen when typed Make sure you write it down 55 NAGASAKI Corporation 5 8 LOAD DEFAULT SETTINGS It permits user to select a group of setting for all BIOS Setup options Not only can you use these fields to quickly set system configuration parameters you can choose a group of settings that have a better chance of working when the system is having configuration related problems Auto Configuration with Optimal Settings User can load the optimal default settings for the BIOS The optimal default settings are best case values that should optimize system performance If CMOS RAM is corupted the optimal settings are loaded automatically Load high performance
11. Signal Reset ESC Exit 11 5 1 Pgllp PgDn Modify F2F3 Color Figure 5 4 Advanced Chipset Setup ATBus Clock This field sets the polling clock speed of ISA Bus PC 104 Available Options 14 318 2 PC LK 5 PCLK 6 PCLK 8 PCLK 12 Default setting 14 318 2 NOTE 1 PCLK meansthe CPU inputs clock 2 User is recommended to use setting at the range of 8MHzto 10MHz Slow Refresh This field sets the DRAM refresh cycle time Available Options 15 us 60 us and 120 us Defa ult setting 60 us RAS Precharge Time This field specifies the length of the RAS precharge part of the DRAM accesscycle when EDO DRAM is installed Available Options 1 5 3 5 T Default setting 1 5T RAS Active Time Insert Wait Thisfield specifiesthe RAS Active Time Insert Wait function Available Options Disabled Enabled Default setting Disabled CAS Precharge Time Insert Wait This field specifiesthe DRAM CAS precharge time Available Options Disabled Enabled 51 NAGASAKI Corporation Default setting Disabled Memory Insert Wait This field specifies the Memory Write Insert Wait function Available Options Disabled Enabled Default setting Disa bled ISA I O High Speed The field specifies the ISA I O High Speed function Available Options Disabled Enabled Default setting Enabled ISA Memory High Speed This field spec ifies the ISA Memory High Speed function Available Options Disabled Enabled Default setting Ena bled Reco
12. The PC 104 386L 2M will not occupy any memory addressif the SSD BIOS is disabled If you are going to install the EM M 386 EXE driver please use the X option to prevent EMM 386 EXE from using the particular range of segment address as an EMS page which is used by PC 104 386L 2M For 31 NAGASAKI Corporation example write a statement in the CONFIG 5 5 file as follow If the memory configuration of PC 104 386L 2M is C 800 0 DEVIC E C DOS EMM386 EXE X C 800 C9FF The sample procedure is step by step for SSD is below Programming SSD Hoppy DUBRWN FH M 10 11 12 13 14 Install the flash in Socket U2 U3 and U12 Like 29C 040A Set the SW1 1 to off position The SSD data bank is C800 0 Connect powerto the system PowerON Press Delete key to display the BIOS Setup menu Enter CMOS Setup menu Then choice to CMOS SETUP gt ADVANCE CMOS SETUP gt 550 FUNCTION set to DOOOH SEGMENT In the Flash Disk Simulates field select FDD that the flash disk will act asa physical floppy Then save the setting The system will be restart the screen like below AMIBIOS SETUP ADVANCED CMOS SETUP C 1998 American Megatrends Inc All Rights Reserved BootUp Num Lock Off Available Options Floppy Drive 3wap Disabled Floppy Drive Seek Disabled FDD Floppy ficcess Control Normal HDD Access Control Normal Tupematic Rate Slow System Keyboard Absent Primary Display Absent Password Check Setup W
13. settings Y N AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C1998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup fiuta Detect Hard Disks Load high performance settings YAN 7 M Exit Without Saving Load configuration settings giving highest performance ESC Exit 11 5 1 F2 F3 Color 1 5 amp Exit Figure 5 7 Load High Performance Setting 56 NAGASAKI Corporation Auto Configuration with Fail Safe Settings User can load the FailSafe BIOS Setup option settings by selecting the Fail Safe item from the Default section of the BIOS Setup main menu The Fail Safe settings provide far from optimal system performance but are the most stable settings Use this option asa diagnostic aid if the system is behaving enatically Load failsa fe settings Y N AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C1998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup fiuto Detect Hard Disks Exit Without Saving Load failsafe configuration settings ESC Exit 11 5 1 F2 F3 Color Fi0 Saue amp Exit Figure 5 8 Load Failsafe Setting 57 NAGASAKI Corporation 5 9 BIOS EXIT It is used to exit the BIOS main menu in two types situation After making your changes you can either save them or exit the BIOS menu and without saving
14. t find the hard disk drive Available Options Disabled 3 Sec 5 Sec 10 Sec and 15 Sec Default setting 3 Sec OnBoard Primary IDE This field specifiesthe onboard primary IDE controller channelsthat will be used Available Options Disabled Enabled Default setting Enabled OnBoard This field enables the floppy drive controller on the FB2310 Available Options Disabled Enabled Default setting Enabled OnBoard Serial Port 1 2 These fields select the I O port address foreach Serial port Refer to Table 2 2 Available Options Disabled 2F8H 3F8H 2E8H 3E8H Default setting 3F8H 2F8H 3E8H respectively OnBoard Serial Port 1 2 IRQ These fields select the IRQ for each serial port Available Options 3 4 5 and 9 Default setting IRQ 4 for Port 1 IRQ3 for Port 2 OnBoard Parallel Port This field selects the I O port address for parallel port Referto Table 2 2 53 NAGASAKI Corporation Available Options Auto Disabled 378 278 and 3BCH Default setting 378H for Port 1 278H for Port 2 Parallel Port Mode This field specifies the parallel port mode ECP and EPP are both bi directional data transfer schemes that adhere to the IEEE P1284 specifications Available Options Normal EPP and ECP Default setting Normal EPP Version This field specifies the EPP for the Parallel Port Port2 Mode specification version used in the system and isnot configurable Parallel Port IRQ This field specifies the IRQ forth
15. the watchdog to generate IRQ15 signal when it times out you should initial IRQ 15 interupt vector and enable the second interupt controller 8259 PIC in order to enable CPU to process this interrupt An interrupt service routine is required too 2 Before you initialize the interupt vector of IRQ15 and enable the PIC please enable the watchdog timer previously otherwise the watchdog timer will generate an interupt at the time watchdog timer is enabled Watc hdog Enabled Disabled INDEX 37H Bit7 Reserved Please do not set this bit In old version M6117C data sheet this bit iscounter read mode Bt6 0 Disable watchdog timer 1 Enable watchdog timer Bit 5 0 Other function Please do not modify these bits Select Watchdog Report Signal INDEX 38H Bit 7 4 Watchdog timer time out report signal select 0000 No output signal 0001 IRQ3 selected 0010 IRQ4 selected 0011 IRQ5 selected 0100 IRQ6 selected 0101 IRQ7 selected 0110 IRQ9 selected 0111 IRQ10 selected 1000 IRQ11 selected 1001 IRQ12 selected 1010 IRQ14 selected 1011 IRQ15 selected 1100 NMI selected 1101 System reset selected 1110 No output signal 1111 No output signal Bit 3 0 Other function Please do not modify these bits NOTE 1 If you program the watchdog to generate IRQ15 signal when it times out you should initial IRQ 15 interupt vector and enable the second interrupt controller 8259 PIC in orderto enable CPU to processthis interrupt An interrupt service routi
16. timer the program should trigger it every time before it times out If your program fails to trigger or disable this timer before it times out because of system hang up it will generate a reset signal to reset the system or trigger an IRQ signal The time out period can be programmed to be 30 5 seconds to 512 seconds Software Program S Time Base Enable and Trigger _ Watchdog Register Y Counter Write and Trigger and See Compartor RESET Figure 4 1 Watchdog Block Diagram Watchdog Timer Setting The watchdog timer is a circuit that may be used from your program software to detect crashesor hang ups The watchdog timer is automatically disabled after reset Once you have enabled the watchdog timer your program must trigger the watchdog timer every time before it timesout After you trigger the watchdog timer it will be set to zero and start to count again If your program failsto trigger the watchdog timer before time out it will generate a reset pulse to reset the system ortriggeran IRQ signal to tell your program that the watchdog istimes out Watchdog timer INDEX 39H 3AH and 3BH 3Bh 3Ah 39h D7 DO D7 DO D7 DO Counter MSB LSB For exa mple INDEX 3Bh 3A 39h h 00h 00h 01h 30 5 usec 02h 61 usc 00h 01h OOh 7 8 m sec 00h 02h 00h 15 6 m sec 01h 00h 00h 2 sec 02h 00h 00h 4 sec FFh FFh FFh 512 sec 37 NAGASAKI Corporation NOTE 1 If you program
17. umpers 1 RS 232C Pin Definitions CN3 amp C N4 10 pin 2 0mm IDC The included serial port adapter cables are used to transfer 10 pin IDC connector into standard DB9 connector The following table shows signal connections of the adapter cable The following figure and table guide you how to set up RS 232 serial port 1 2 9 10 CN3 amp CN4 Figure 0 10 RS 232 Connector g 8 g B 9 1 2 3 4 5 6 7 8 9 m 1 m o 1 Table 3 8 5 232 Serial Port Pin Assignment 26 NAGASAKI Corporation The on board two serial ports can be configured as RS 485 mode by selecting SW1 3 and SW 4 CN5 is the RS 485 connector J P1 and J P3 is the terminator jumper of COM1 and COM respectively COM1 SWI 4 RS 232C Off RS 485 On Table 0 9 Serial Port RS 485 COM 1 amp COM 2 Switcher amp JP3 1 2 5 6 5 0 11 RS 485 Connector CN5 Signal CN5 Signal 1 485C 1 4 485C 2 2 485C 1 5 485C 2 3 Case Ground 6 Case Ground Table 0 10 Serial Port RS 485 1 amp 2 27 NAGASAKI Corporation LAN Connector J 6 6 pin 2 5mm J ST J 6 contains LAN twist pair signals and LAN access indicator signal The included LAN adapter cable is use to transfer to standard 45 connector 8 1 Dm kwh OO OD OX Figure 0 12 LAN R 45 wx 2
18. wait for you to press the F1 key after an emor message Available Options Disabled Enabled Default setting Disabled Hit DEL Message Display Set this field to Disabled to prevent the message as follows Hit DEL if you want to run setup It will prevent the message from appearing on the first BIOS screen when the computer boots Available Options Disabled Enabled Default setting Ena bled C000 32k Shadow E800 32k shadow These fields control the location of the contents of the 32KB of ROM beginning at the specified memory location If no adapter ROM is using the named ROM area this area is made available to the localbus The settings are 1 Disabled The video ROM isnot copied to RAM The contents of the video ROM cannot be read from orwritten to cache memory 2 Enabled The contents of C000h C7FFFh are written to the same address in system memory RAM for faster execution 3 Cached The contents of the named ROM area are written to the same address in system memory RAM for faster execution if an adapter ROM willbe using the named ROM area Also the contents of the RAM area can be read from and written to cache memory Available Options Disabled Enabled And Cached Default setting Disabled FLASH Disk These fields control the location of the contents of the solid state disk BIOS beginning at the specified memory location Available Options Disabled D0000h D8000 E0000 and E8000 Default setting Dis
19. 8 32k Shadow Enabled CHOO 32k Shadow Disabled DOGG 32k Shadow Disabled D800 32k Shadow Disabled E000 32k Shadow Disabled E800 32k Shadow Disabled FLASH DISK Disabled ESC Exit 11 5 1 FLASH Disk Simulates HDD Pgllp PgDn Modify Close all screen at POST state Disabled FZ F3 Cnlor Figure 5 3 Advanced CMOS Setup 15 3d Boot Device These fields determine where the system attempts to look for the boot drive priority for an operating system The default procedure isto check the hard disk and then the floppy drive and last the CDROM Available Options Disabled IDEO 1 IDE 2 IDE 3 Floppy ARMD FDD ARMD HDD CDROM and SC 9 Network Default setting IDE 0 for 14 Boot device Floppy for 274 Boot Device CDROM for 3d Boot Device S M A R Tfor Hard Disks This field is used to activate the S M A R T System Management and Reporting Technologies function for S M A R T HDD drives This function requires an application that can give SM A R T message Available Options Disabled Enabled Default Disabled Quick Boot This field is used to activate the quick boot function of the system When set to Enabled 1 BIOS will not wait for up to 40 seconds if a Ready signal is not received from the IDE drive and will not configure its drive 2 BIOS will not wait for 0 5 seconds after sending a RESETsignalto the IDE drive 3 You can not run BIOS Setup at system boot since there isno delay forthe Hit Del To run Setup message Available
20. Figure 6 6 Enter New 5 55 Figure 6 7 Load High Performance 56 Figure 6 8 Load Failsafe 44 1000000 nenne trennen anne 57 Figure 6 9 Save Current Settings and essent ennt trennen trennen nnns 58 Figure 6 10 Quit Without Saving 59 FablATech Corporation List of Tables Table 2 1 DMA Channel Controller 5 EAT HAAN 6 Table 2 3 Port Address 7 Table 2 4 Real Time Clock amp Non Volatile RAM eese nnne nnns 8 Table 2 5 ACE Accessible 9 Table 2 6 Serial Port Divisor La teh 11 Table 2 7 Registers Address ra ine irap ex RD CH ER Ee DELI Tabaco 11 Table 3 1 1 Pin Assignments ite aee eiecit de dente AA 17 Table 3 2 Floppy Connector Pin 5 18 Table 3 3 8 64 Pin PC 104 Connector Bus A amp B enne nnn nennen nnn nnne 19 Table 3 4 CN7 40 Pin 104 Connector Bus C amp D ulila 20 Table 3 5 104 ISA Pin Assignments nnne tnnt tnnt trennen 21 Table 3 6 CN6 Hard Disk IDE Connector 22 Table 3 7 Parallel Port Pin Assignments sse n
21. IPC Solution Website http www na ga saki com tw Email sales na ga sa ki c om tw PC104 386L 2MB 104 3865X CPUModule User s Manual Aug 2001 Version 1 4 Part Number PC 104 386L 2M Copyright Copyright 2001by NAGASAKI Corporation The content of this publication may not be reproduced in any part orasa whole transcribed stored in a retrieval system translated into any language or tra nsc ribed in any fom or by any means electronic mechanical magnetic etc or otherwise without the prior written permission of FablATech Corporation Disc laimer NAGASAKI makes no representation of warranties with respect to the contents of this publication In an effort to continuously improve the product and add features NAGASAKI reserves the right to revise the publication orchange specifications contained in it from time to time without prior notice of any kind from time to time NAGASAKI shall not be reliable for technical or editorial errors or omissions which may occur in this document NAGASAKI shall not be reliable for any indirect special incidental or consequential damages resulting from the fumishing performance or use of this document Trademarks Trademarks brand namesand products names mentioned in this publication are used for identification purpose only and are the properties of their respective owners Technical Support If you have problems or difficulties in using the system board or setting up the relevant devices
22. M Check transmitter holding register and shift register IF INP amp H3FD AND amp H60 50 THEN 60 REM Disable transmitter by resetting DTR OUT amp H3FC INP amp H3FC AND amp HEF RETURN c Receive one character fom COM1 10 REM Check COM1 receiver buffer IF LOF 1 lt 256 THEN 70 REM Receiver buffer is empty INPSTR RETURN REM Read one character from COM1 buffer INPSTRSANPUTS 1 1 RETURN NOTE The example of the above program is based on COM1 I O Address 3F8h The RS 485 of the PC104 386L uses COM4 If you want to program it please refer to the BIOS Setup for COM4 address setup 41 NAGASAKI Corporation 42 NAGASAKI Corporation CHAPTER 5 BIOS SETUP This chapter describes the PC 104 386L BIOS menu displays and explains how to perform common tasks and presents detailed explanations of the elements found in each of the BIOS menus The following topics are covered BIOS Setup Overview Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup Auto Detect Hard Disks Password Setting Load Default Setting BIOS Exit 000000000 5 1 BIOS SETUP OVERVIEW BIOS Basic Input Output System isa program used to initialize and set up the I O devices of the computer which includesthe ISA bus and connected devices such asthe video display diskette drive and the keyboard The BIOS provides a menu driven interface to the console subsystem The console subsystem contains speci
23. MI a a 31 SSD Memory Type Select Switch 1 1 amp 1 2 wana nanan nananana saan tente nananana tnnt ntn tnnt 31 Programming SSD 32 Programming SSD iit ciae teret tese oer PR n eiae a dne Gao oe 33 Installation 02 2 idu NIN hcec iicet di GANG addu ic ean A oa 34 SSD Flash Type Supported rerit eie eere nanan haaha 34 4 1 INSTALLATION PRO CEDURES s sssssssssssssssescssscsssesssssssscacsesesesesesesesassesesesesavavsusesesesesesasacaceesesesasaacsusesesesesetasassesesatasanetaes 3 4 2 GID RO br 36 BIOS FLASH Wilby 36 AA 36 4 3 WATE FIDO Girl MER Ets 37 Watchdog Timer Setting tatto teta tanto tton tesa tos tss 37 Watchdog Enabled Disabled 38 Select Watchdog Report 9 38 Timeout Status amp Reset Watchdog INDEX 3CH sess tente tnnt tent te tton ttn tenta 39 Programming Watchdog Basic Operation essent tentent ttn ttnn tente 39 4 4 PROGRAMMING RS4BD d ani Dr NAKAHINGA doe ca E f aD a a v dd o T E 40 5 1 BIOS SEIUP OVERV IEW mpa db eed e t d da 43 5 2 STANDARD CMOS SEU Pucana A R A A A N 45 5 3 ADVANCED CMOS SETUP and aa aa ka banana aa Kia 4 Nagasaki Corporat
24. OLLERS This chapter describes the major structure of the PC104 386L 2M CPU board The following topics are covered Microprocessor DMA Controller Keyboard Controller Interupt Controller Serial Ports Parallel Ports 000000 2 1 MICROPROCESSOR The PC 104 386L 2M uses the ALI M6117 CPU it is designed to perform systems like Intel s 386SX system with deep green features The 386SX core is the same as M1386SX of Acer Labs Inc and 10096 object code compatible with the Intel 386SX microprocessor System manufacturers can provide 386 CPU based systems optimized for both cost and size Instruction pipelining and high bus bandwidth ensure short average instruction execution time and high sysem throughput Furthermore it can keep the state intemally from charge leakage while extemal clock to the core is stopped without storing the data in registers The power consumption here is almost zero until the clock stops The intemal structure of this core is 32 bit data and address bus with very low supply current Real mode as well as Protected mode are available and can run MS DOS MS Windows 2 2 DMA CONTROLLER The equivalent of two 8237A DMA controllers are implemented in the PC 104 386L 2M board Each controller is a fourchannel DMA device that will generate the memory addresses and control signals necessary to transfer information directly between a peripheral device and memory This allows high speeding information transfer with less CPU inter
25. a bled Hash Disk Simulates When HDD selected the system will boot from the flash disk asif it isa hard disk drive C When FDD is selected the system will boot from the flash disk asif it isa floppy disk drive a 49 NAGASAKI Corporation Available Options HDD FDD Default setting HDD Close all screen at post Upon power on the system will skip POST and enter the OSin five seconds If this function is enabled also configure the following fields to the appointed values Hit Del Message Display Disabled Wait For Fl If Eror Disabled System Keyboard Absent Primary Display Absent Hard Disk Display Disabled Available Options Disabled Enabled Default setting Disa bled 50 NAGASAKI Corporation 5 4 ADVANCED CHIPSET SETUP This option controls the configuration of the board s chipset Control keys for this screen are the same as for the previous screen AMIBIOS SETUP ADUANCED CHIPSET SETUP C1998 American Megatrends Inc All Rights Reserved Available Options Slow Refresh 60 us k 14 31872 RAS Precharge time 1 5T PCLK2 5 RAS Active Time Insert Wait Disabled PCLK2 6 CAS Precharge Time Insert Wait Disabled PCLK2 6 Memory Write Insert Wait Disabled PCLK2 10 120 High Speed Enabled 2 12 ISA Memory High Speed Enabled Recovery Disabled Recovery Period O us 16Bit ISA Insert Wait Disabled Watch Dog Timer Output Control Disabled WatchDog TimeOut Trigger
26. able of handling divisors of 1 to 65535 and produce 16x clock for driving the intemal transmitter logic Provisions are also included to use this 16x clock to drive the receiver logic Also included in the ACE a completed MODEM control capability and a processor interrupt system that may be software tailored to the computing time required to handle the communications link The following table isa summary of each ACE accessible register 9 Baset0 Receiver buffer ead T Transmitter holding register write 0 Baset1 Interuptenable Cid X Bas 2 jntemupt identification read only X Base 3 line control X 4 contol X Baset5 linestatus X Base 6 MODEMsatus Table 2 5 ACE Accessible Registers XK gt lt lt gt lt lt n m gt Receiver Buffer Register RBR Bit 0 7 Received data byte Read Only gt Transmitter Holding Register THR Bit 0 7 Transmitter holding data byte Write Only 2 Intenupt Enable Register IER Enable Received Data Available Interrupt ERBFI Enable Tra nsmitter Holding Empty Interrupt ETBEI Enable Receiver Line Status Interrupt ELSI Enable MODEM Status Interrupt EDSSI Bit O Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Must be 0 Must be 0 Must be 0 Must be 0 2 Intemupt identification Register IIR Bit 0 0 if Interrupt Pending Interrupt ID Bit Interrupt ID B
27. ait For F1 If Error Disabled Hit DEL Message Display Disabled COO0 32k Shadow Disabled CHO0O0 32k Shadow Disabled DOGG 32k Shadow Disabled D800 32k Shadow Disabled E000 32k Shadow Disabled E800 32k Shadow Disabled FLASH DISK ESC Exit Tl Sel FLASH Disk Simulates FDD PgUp PgDn Modify Close all screen at state Disabled F2 F3 Color Press hold down ctrl keys ctr amp underline to display the SSD Setup menu On the screen use the up ordown arrow keys to select a flash type and size The screen like below PC 104 386L 2M SSD BIOS version 1 20 2000 NAGASAKI Corp Flash Disk Setting Disk B Unknow 1536K Maximum Base Port Address 0078h Firmware Seg D000h Data Bank Seg C 800h DOS Booting Driver As BIOS Setting M4 U5 Soc ket Setting SSD ESC Exit F5 Save amp Exit lt Select 1 Modify Hit lt C tn gt to setup Flash disk Press F5 to save the setting The message Write to FLASH disk y n displayed Press Y key to write the setting to the Flash disk The booting from other device Like physical HDD or FDD Use the FORMATcommand to format the flash disk in DOS mode This time this SSD is B Use FORMATB S C U The S SYSTEM BOOTING C Check U UNFORMAT If format parameter no S the SSD will be always to device B that can t boo up the system 32 NAGASAKI Corporation Programming SSD HDD Install the flash disk in Soc ket U2 U3 and U12 L
28. al software called fimware that interacts directly with the hardware components and facilitates interaction between the system hardware and the operating system The BIOS Default Values ensure that the system will function at its normal capability In the worst situation the user may have conupted the original settings set by the manufacturer After the computer tumed on the BIOS will perform a diagnostics of the system is being tested Press the Del key to enter the BIOS Setup program and then the main menu will show on the screen The BIOS Setup main menu includes some options Use the Up Down amow key to highlight the option that you wish to modify and then pressthe Enter key to assure the option and configure the functions 43 NAGASAKI Corporation AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C1998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup futo Detect Hard Disks Change User Password Change Supervisor Password Auto Configuration with Fail Safe Settings Save Settings and Exit Exit Without Saving Load configuration settings giving highest performance ESC Exit 11 5 1 FZz F3 Cnlor Fi0 Saue amp Exit Figure 5 1 BIOS Main Menu CAUTION 1 The factory default setting in the FB2310 BIOS is used to the Auto Configuration with Optimal Settings we recommend using the BIOS default setting unless you are very
29. and software that are not explained in this manual please contact our service engineer for service or send email to sales nagasaki com tw Retuming Your Board For Service amp Technical Support If your board requires servicing contact the dealer from whom you purchased the product for service information You can help assure efficient servicing of your product by following these guidelines A list of your name address telephone facsimile number or email address where you may be reached during the day Q Description of you peripheral attachments Q Description of you software operating system version application software etc and BIOS configuration Description of the symptoms Extract wording any message Forupdated BIOS drivers manuals or product information please visit usat www nagasaki com tw Static Electricity Precautions Before removing the board from its anti static bag read this section about static electricity precautions Static electricity isa constant dangerto the computer systems The charge that can build up in your body may be more than sufficient to damage integrated circuits on any PC board It is therefore important to observe basic precautions whenever you use or handle computer components Although areas with humid climates are much less prone to static build up it is always the best to safeguard against accidents which may result in expensive repairs The following measures should genera
30. dex 8 12 Ground 23 3 Select A 12 13 Write Enable 24 4 Ground 11 14 Track 0 26 5 MotorA 16 15 Write Protect 28 6 Select B 14 16 Ground 29 7 MotorB 10 17 Read Data 30 8 Ground 9 18 Head 32 9 Direction 18 19 DiskkChange 34 10 Step 20 20 Ground 31 No Other Connection 5 Table 0 2 Connector Pin Assignments NAGASAKI Corporation PC 104 Connector CN7 amp CN8 1 64 Pin PC 104 Connector Bus A amp N8 0000000000000000000000000 1 CNS BUS A amp B Figure 0 4 8 64 Pin 104 Connector Bus amp B 3 SD7 35 5413 4 RSIDRV 36 DROI 5 506 37 5412 6 5 38 7 505 39 8 IRQ9 40 BUSCLK 9 SD4 41 salo 10 5V 1 42 IRQ7 11 523 43 sag 12 0802 44 IRQ6 13 502 45 saa 14 12 4 46 IRQ5 15 5 1 47 5 7 16 zws 48 IRQ4 17 500 49 sae 18 12v 50 IRQ3 27 SA17 59 5 1 28 60 osc 31 5 15 63 Ground 32 DRQ3_ 64 Ground Table 0 3 64 Pin 104 Connector Bus NOTE Power input 5V 5V 12V or 12V for Pin 10 amp Pin14 is supplied from the system power connected to the powerconnector NAGASAKI Corporation 2 40 Pin PC 104 Connector Bus amp D CN7 Figure 0 5 40 Pin PC 104 Connector Bus amp D 3 HE 23 58 4 MEM16 24 DRO5 15 1423
31. e amp Exit Figure 5 10 Quit Without Saving 59 NAGASAKI Corporation 5 10 BIOS UPDATE The BIOS program instructions are contained within computer chips called FLASH ROMs that are located on your system board The chips can be electronically reprogrammed allowing you to upgrade your BIOS firmware without removing and installing chips The FB2310 provides FLASH BIOS update function for you to easily upgrade newer BIOS version Please follow the operating steps for updating new BIOS Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Tum on your system and skip detecting the CONFIG SYS and AUTOEXEC BAT files Keep your system in the real mode Insert the FLASH BIOS diskette into the floppy disk drive In the MS DOS mode you can type the AMIFLASH program AN gt AMIFLASH The screen will show the message as follows Enter the BIOS File name from which Flash EPROM will be programmed The File name must and with a lt ENTER gt or press lt ESC gt to exit Enter the file name to the box of lt Enter File Names And the box of Messages will show the notice as follows The bottom of this window always shows the gray statement Flash EPROM Programming is going to start System will not be usable until Programming of Flash EPROM is successfully complete In case of any eror existing Flash EPROM must be replaced by new program Flash EPROM Asthe gray statement press the Y key to updating the new BIOS
32. e parallel port port 2 Available Options 5 7 Default setting IRQ 7 for Parallel Port IRQ5 for Parallel Port 2 Parallel Port DMA Channel These two fields are for monitor only and cannot be configured 54 NAGASAKI Corporation 5 6 AUTO DETECT HARD DISKS This field detects the parameters of an IDE hard disk drive and automatic ally enters them into the Standard CMOS Setup screen 5 7 PASSWORD SETTING This BIOS Setup hasan optional password feature The system can be configured so that all users must entera password every time the system boots or when BIOS Setup is executed User can set either a Supervisor password ora User password Setting Password Select the appropriate password icon Supervisor or User from the Security section of the BIOS Setup main menu Enter the password and press Enter The screen does not display the characters entered After the new password is entered retype the new password as prompted and press Enter If the password confirmation is incorect an eror message appears If the new password is entered without error press Esc to retum to the BIOS Main Menu The password is stored in CMOS RAM after BIOS completes The next time the system boots you are prompted for the password function is present and is enabled Enter new supervisor password AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C31998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS
33. ee ennt 24 Table 3 8 RJ 45 Pin 44044 1 0 0 28 VI NAGASAKI Corporation CHAPTER 1 OVERVIEW This chapter provides an overview of your system features and capabilities The following topics are covered 2 Introduction 2 Packing List 2 Features 1 1 INTRODUCTION The PC104 386L 2M is a mature and well developed PC 104 size 386SX module It provides much greater performance such as support for onboard 2MB DRAM two RS 232C 485 port 1 parallel ports and 3 socket for flash disk or 1 socket for DiskOnChip with up to 288 MB memory capacity The PC 104 386L 2M also comes with a programmable Watchdog timer and other typical interfaces It is excellent for embedded systems MMI s workstations medical applications or POS POI systems As well an RS 232C 485 port provides the remote control 1 2 SERIES COMPARISON TABLE Model PC104 386l 4M lt lt 1043864 Processor ALI6117C ALI6117C SSD Interface Ethemetl0oMbps One NAGASAKI Corporation 1 3 FEATURES The system provides a number of special features that enhance its reliability ensure its availability and improve its expansion capabilities as well as its hardware structure 000000000000 000 Up to 40 MHz 386SX single board computer Stack through PC 104 expansion bus 2 MBEDO RAM on board 8 2 MB space forexpansion 10Ba se T NE2000 compatible ne
34. er until acknowledg ment is received for the previous byte sent The output buffer full interuption may be used for both send a nd rec eive routines INTERRUPT C O NTRO LLER The equivalent of two 8259 Programmable Interupt Controllers PIC are included on the 104 3861 2 board They accept requests from peripherals resolve priorities on pending interupts in service issue interrupt requests to the CPU and provide vectors which are used as acceptance indicesby the CPU to determine which interrupt service routine to execute The following table containsthe system information of hardware interrupt priorities System Interupt IRQ Function Priority 08h _ 0 Sysemtimer TimerChannelOoutpu 1 09n keyboard controller output bufferfullintemupt_ 2 Cascade from second programmable interupt RC wn moacowi IRQ 6 diskette adapter 70h iQS Realim Cock 15 mh _ 72h Ro 10 4 m 74n jRQ12ResevedforPS2moue 6 76h IRQ 14 Hard diskette adapter 8 77h jRQ1S ResevedforWatchdog 9 Table 2 2 Intenupt Controller NAGASAKI Corporation I O Port Address HexRange Device 3F8 3FF Table 2 3 I O Port Address NAGASAKI Corporation Real Time Clock and Non Volatile RAM The PC 104 386L 2M contains a realtime clock compartment that maintains the da
35. ess of offset44 just sets 1 Step 2 Send out the data Write this character to the offset 0 of the curent COM port address Step 3 Wait forthe buffersdata empty Check transmitter holding register THRE bit 5 of the address of offset 5 and transmitter shift register TSRE bit 6 of the address of offset 5 are all sets must be 0 NAGASAKI Corporation gt 2 Step 4 Disabled TXC signal and the bit of the address of offset44 sets 0 Send outone block data Transmit the data more than two characters Step 1 Enable TXC signal and the bit O of the address of offset44 just sets 1 Step 2 Send out the data Write all data to the offset 0 of the current COM port address Step 3 Wait for the buffers data empty Check transmitter holding register THRE bit 5 of the address of offset 5 and transmitter shift register TSRE bit 6 of the address of offset 5 are all sets must be 0 Step 4 Disabled TXC signal and the bit of the address of offset44 sets 0 Receive data The RS 485 soperation of receiving data isin the same of the RS 232 s Basic Language Example a Initial 86C 450 UART 10 20 30 40 OPEN COM1 9600 m 8 1 AS 1 LEN 1 REM Reset DTR OUT amp H3FC INP H3FC AND amp HFA RETURN b Send out one characterto COM1 REM Enable transmitter by setting DTR ON OUT amp H3FC INP amp H3FC OR amp H01 REM Send out one character PRINT 1 OUTCHR RE
36. etup program then re boot your system Step 9 If the CPU board does not work tum off the power and read the hardware description ca refully again Step 10 If the CPU board still does not perform properly retum the board to your dealer for immediate service 35 NAGASAKI Corporation 4 2 CDROM PC104 386L 2M provides a CD ROM includes the manual files a complete manual file and a quick setting guide and the required utility files Follow the following description to install these utility files BIOS FLASH Utility In the UTILITY directory there isthe AMIFLASH COM file 1 Use the AMIFLASH COM program to update the BlOS setting 2 And then refer to the chapter BIOS Setup asthe stepsto modify BIOS 3 Now the CPU board s BIOS loaded with is the newest program user can use it to modify BIOS function in the future when the BIOS add some functions LAN Utility Step 1 To install the LAN utility insert the CD ROM into the CD ROM device and enter DRIVER5FB231051AN5UM 9008 If your system is not equipped with a CD ROM device copy the LAN VGA driver from the CD ROM to a 1 44 diskette Sep2 Execute install exe file 36 NAGASAKI Corporation 4 3 WATCHDOG TIMER This section describes how to use the Watchdog Timer disabled enabled and trigger The PC104 386L 2M is equipped with a programma ble time out period watchdog timer Usercan use the program to enable the watchdog timer Once you have enabled the watchdog
37. familiar with the setting function or you can contact the technical support engineer 2 If the BIOS losses setting the CMOS will detect the Auto Configuration with Fail Safe Settings to boot the operation system this option will reduce the performance of the system It is recommended to choose the Auto Configuration with Optimal Setting5 in the main menu The option is best case valuesthat should optimize system performance 3 The BIOS settings are described in detail in this section 44 NAGASAKI Corporation 5 2 STANDARD CMOS SETUP The Standard CMOS Setup option allows you to record some basic system hardware configuration set the system clock and eror handling If the CPU board is already installed in a working system you will not need to select this option anymore AMIBIOS SETUP STANDARD CMOS SETUP C1998 American Megatrends Inc All Rights Reserved Date mm dd yyyy Thu 14 2000 O KB Time C hh mm ss 15 07 13 O MB Floppy Drive A 1 44 MB 3 Floppy Drive B Not Installed LBA Blk PIO 32Bit Type Size Cyln Head WPcom Sec Mode Mode Mode Mode Pri Master fiuto orf Pri Slave ort Boot Sector Virus Protection Disabled 1 46 Predefined types ESC Exit 11 5 1 USER Enter parameters manually Pgllp PgDn Mod if uy AUTO Set parameters automatically on each boot F2Z F3 Color CDROM Use for ATAPI CDROM drives FLOPTICAL Use for ATAPI FLOPTICAL drives Or press ENTER to autodetect
38. fter installed D O C we can easily boot the system from D O C SSD Hash Type Supported The following list contains 5V FLASHs supported by the PC104 386L 2M SST PH29EE010 128KX8 1M bits SST PH28SF040 512KX8 1M bits SST PH28SF040A 512KX8 1M bits WINBOND W29EE011 128KX8 1M bits ATMEL AT29C 020 ATMEL AT29C 040 256KX8 2M bits ATMEL AT29C 040A 512KX8 4M bits 34 NAGASAKI Corporation CHAPTER 4 INSTALLATION This chapter provides information for you to set up a working system based on the PC 104 386L 2M CPU board Carefully read the details of the CPU board shardware descriptions before installation especially the jumper settings switch settings and cable connections The following topics are covered gt Overview gt CDROM gt Watchdog Timer 4 1 INSTALLATION PROCEDURES Follow the steps listed below to install the PC 104 386L 2M system Step 1 Read the CPU board s hardware description in this manual Step 2 Set the jumpers Step 3 Make sure that the power supply connected to your passive CPU board is tumed off Step 4 Connect all necessary cables Make sure that the FDC HDC serial and parallel cables are connected to pin 1 of the related connector Step 5 Connect the hard disk floppy disk flat cables from the CPU board to the drives Connecta powersource to each drive Step 6 Plug the keyboard into the keyboard connector Step 7 Tum on the power Sep 8 Configure your system with the BIOS S
39. gs gt Board Overview gt System Setting 2 7 BOARD OVERVIEW The PC 104 386L 2M isa PC 104 386SX CPU module This section provides hardware jumper settings the connectors locations and the pin assignment Figure 0 1 System Components Overview NAGASAKI Corporation 2 8 INDEX TO J UMPERS amp CONNECTORS The following lists the jumperand connector functions for reference Label Function 11 2 pin reset header 12 Hea der Extemal Spea ker 13 Extemal LED 15 Keyboard Connector 6 pin 2 0 57 16 Extemal RJ 45 connector J 7 Power Connector 4 pin 2 0 mm J ST P1 J P3 3 pin COM1 COM2 R485 terminator P2 CPU base clock select CNI 26 pin parallel ports CN2 20 pin floppy connector CN3 COM1 RS232 connector CN4 COM2 RS232 connector CN5 6 pin RS 485 connector CN6 44 pin hard disk connector CN7 40 pin PC 104 connector C amp D CN8 64 pin PC 104 connector Bus A amp B U2 U3 U12 Socket for flash and DOC SW1 D O C SRAM select 2 9 SYSTEM SETTINGS Jumper pins allow you to set specific system parameters Set them by changing the pin location of jumper blocks A jumper block isa small pla stic encased conductor shorting plug that slips over the pins To change a jumper setting remove the jumper from its current location with your fingers or small needle nosed pliers Place the jumper over the two pins designated for the desired setting Pres
40. gure this field make sure your FB2310 supports this feature The setting of Enabled allows the system to detect a PS 2 mouse on bootup If detected IRQ12 will be used for the PS 2 mouse IRQ 12 will be reserved for expansion cards if a PS 2 mouse is not detected Disabled will reserve IRQ12 for expansion cardsand therefore the PS 2 mouse will not function Available Options Disabled Enabled Default setting Disabled Typematic Rate This function specifies the keystroke repeat rate when a key is pressed and held down Available Options Fast Slow Default setting Fast System Keyboard This field specifies if an error message should be prompted when a keyboard is not attached Available Options Absent Present Default setting Absent Primary Display The field specifies the type of monitor installed in the system Available Options Ab sent Normal 48 NAGASAKI Corporation Default setting Absent Password Check This field enables password checking every time the computer is powered on or every time the BIOS Setup is executed If Always is chosen a user password prompt appears every time and the BIOS Setup Program executes and the computer is tumed on If Setup is chosen the password prompt appearsif the BIOS executed Available Options Setup Always Default setting Setup Wait for Fl If Error AMIBIO S POST error messages are followed by Press F1 to continue If this field is set to Disabled the AMIBIOS does not
41. he end of the paper A 1 means the printer is selected 0 meansthe printer has encountered an eror condition NAGASAKI Corporation gt PrinterControl Latch amp Printer Control Swapper The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper Bit definitions are as follows 7 6 5 4 3 2 1 0 L STROBE AUTO FD XT INIT SLDC IN IRQ ENABLE DIR write only Figure 2 2 Printer Control Bit Definitions NOTE X represents not used Bit 5 Direction control bit When logic 1 the output buffers in the parallel port are disabled allowing data driven from extemal sources to be read when logic O they work asa printer port Thisbit is writing only Bit 4 A 1 in this position allows an interrupt to occur when ACK changes from low state to high state Bit 3 A 1 in this bit position selectsthe printer Bit 2 A O starts the printer 50 microseconds pulse minimum Bit 1 A 1 causesthe printer to line feed after a line is printed Bit 0 5 microsecond minimum highly active pulse clocks data into the printer Valid data must be present fora minimum of 0 5 microseconds before and after the strobe pulse NAGASAKI Corporation 14 NAGASAKI Corporation HARDWARE FEATURES This section describes the pin assignments for system s extemal connectors and the jumper settin
42. ike 29C 040A Set the SW1 1 to off position The SSD data bank is C800 0 Connect power to the system Power ON Press Delete key to display the BIOS Setup menu Enter the CMOS Setup menu Then choice to CMOS SET UP gt ADVANCE CMOS SETUP SSD FUNCTION set to DOOOH SEG MENT In the Flash Disk Simulates field select HDD that the flash disk willact asa physical hard disk Then save the setting The screen like below N AMIBIOS SETUP ADVANCED CMOS SETUP 11998 American Megatrends Inc All Rights Reserved BootUp Num Lock Floppy Drive Swap Floppy Drive Seek Floppy Access Control HDD Access Control Typematic Rate Sustem Keyboard Primary Display Password Wait For Hit DEL COQO 32k Caeo 32k 000 32k D800 32k E000 32k E800 32k Check Fi If Error Message Display Shadow Shadow Shadow Shadow Shadow Shadow FLASH DISK FLASH Disk Simulates Close all screen at POST state orf Disabled Disabled Norma 1 Norma 1 Slow Absent Absent Setup Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled DOH HDD Disabled Available Options Disabled bk DOOOH DpaooH EQQQH ESC Exit Tl Sel PgUp PgDn Modify F2 F3 Color 8 Presshold down keys ctrl amp underline to display SSD Setup menu 9 Onthe screen use the up ordown arrow keys to select a flash type and size The screen like below 10 11 12 13
43. ion 5 4 J ADVANCED CHIPSET SETUP iren Ngan ma eed neal Bala na 51 5 5 PERIPHERAL SETUP rit ire bein e PAPA AA ANA aabang 53 5 6 AUIO DETECTHARD 55 5 7 PASSWORD SETTING ama te ete tdt nth dr du bd Decide bed 55 Pa SSWOTE PA 55 Password Chec klng 55 5 8 IQAD DEFAUETSEITINGS nne predio i Rer die I m preis 56 Auto Configuration with Optimal Settings esses 56 Auto Configuration with Fail Safe Settings nananana wnananawsananawuna naawa ttn ttn ttnn tente 57 5 9 BIO S EXIT cct rie hg e b e ede pt t ine od b tte 58 Save Settings ANG E eit DRE iret tua pe sa ac LIE 58 ExiE Without Sa us NG tiere iced e ER D t see t p Re e AA al 59 510 BIOSUPDATE ecoute deed e td re i m etie eod 60 APPENDIX 61 SPEGIFIGATIO NS tds ite De te Peer eta rete deer dte an dde a dee 61 PLAGEMENT nin ce enatus i ansiedad Mete dtt dte eain 62 DIMENSIONS tare e e a ode c e Ra c de Ra e ec e ru te ne eder 63 List of Figures 2 1 Printer Status BUE r a ec cete ae aa ee an 12 Figure 2 2 Printer Control Definitions essent nnne tnnt nnne trennen 13 Figure 3 1 System Components 15 Figure 3 2 5 6 Pin J ST Keyboard Connector sse nne nnne tre
44. it 1 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Must be 0 Must be 0 Must be 0 Must be 0 Must be 0 NAGASAKI Corporation gt Line Control Register LC R Bit 0 Word Length Select Bit O WLSO Bit 1 Word Length Select Bit 1 WLS1 Bit 2 Number of Stop Bit STB Bit 3 Parity Enable PEN Bit 4 Even Parity Select EPS Bit 5 Stick Parity Bit 6 Set Break Bit 7 Divisor Latch Access Bit DLAB MODEM Contol Register MCR Bit 0 Data Terminal Ready DTR Bit 1 Request to Send RTS Bit 2 Out 1 OUT 1 Bit 3 Out 2 OUT2 Bit 4 Loop Bit 5 Must be O Bit 6 Must be O Bit 7 Must be O Line Status Register LSR Bit 0 Data Ready DR Bit 1 Overrun Eror OR Bit 2 Parity Error PE Bit 3 Framing Error FE Bit 4 Break Interrupt BI Bit 5 Transmitter Holding Register Empty THRE Bit 6 Transmitter Shift Register Empty TSRE Bit 7 Must be 0 MODEM Status Register MSR Bit 0 Delta Clearto Send DCTS Bit 1 Delta Data Set Ready DDSR Bit 2 Training Edge Ring Indicator TERI Bit 3 Delta Receive Line Signal Detect DSLSD Bit 4 Clearto Send CTS Bit 5 Data Set Ready DSR Bit 6 Ring Indicator RI Bit 7 Received Line Signal Detect RSLD NAGASAKI Corporation Divisor Latch LS MS is Desired Baud Rate Divisor Used to Generate 16x Clock kaaa 02 9G Pp 64 3600 48 9600 o 8 o A Table 2 6 Serial Port Divisor Latch
45. lly be sufficient to protect your equipment from static discharge O Touch a grounded metal object to discharge the static electricity in your body ideally weara grounded wrist strap O When unpacking and handling the board or other system components place all materials on an antic static surface careful not to touch the components on the board especially the golden finger connectors on the bottom of every board Table of contents 1 1 INTRO B 0 09 0 NAA AA 1 1 2 SERIES COMPARISON TABLE scsssssssssssscscssssnsnssssssessassuauauovessssusususnensocesesesasassseseseaeauauauoveueueseususnensocecesesasassseseaeaeauatananeseseas 1 1 3 FEATURES x KA Na I BO LE 2 14 PACKING MAGNG KINANG BARBS KNA NBA AN NINANG 3 2 1 MIGRO PROCESSOR OMM E 5 2 2 DMA CONTRO LEER iiir ha cl rn hr ehe nada lesa eis ee dva ra NINA ANG 5 2 3 KEYBOARD rre RR QR ERN aa C E ERA RE EUN puo 6 2 4 INTERRUPTGCONTROLLER aae ciere ai ad ae P an Dr d sive GA Baa Dee da BUGA LANG 6 PortAddressM apes chara eet etie ep et M an act dede d te aa 7 Real Time Clock and Non Volatile RAM 0 0400 204 8 EUREN 8 2 5 SERIAL PO RIS ded ment 9 2 6 PARALLEL PORTS aa cdi ciere t
46. ne is required too Before you configure the IRQ signals make sure they are not conflicted with other devices like Floppy printer serial ports LAN and PS 2 mouse etc Refer to Table 2 2 Interupt Controller for reference 2 Before you initialize the interupt vector of IRQ15 and enable the PIC please enable the watchdog timer previously otherwise the watchdog timer will generate interupt at the time watchdog timer is enabled If you want to generate IRQ15 signal to wam your program when watchdog times out the following table listed the relation of timer factors between time out period And if you use the IRQ15 signal to wam your program when watchdog timer out please enter the BIOS Setup the Peripheral Setup menu the OnBoard PCI IDE and 4DE Prefetch5 these two items must set to Primary 38 NAGASAKI Corporation Timeout Status amp Reset Watc hdog INDEX 3CH Bt7 0 Timer timeout not happened 1 Timer timeout happened Read only Bit5 Write this bit 1 to reset timer The value on this bit has no meaning Bit6 8 Other function Bit 4 0 Please do not modify these bits Programming Watc hdog Basic Operation If we would like to access M6117C configuration register we need to unlock register at first and lock it after finishing operation gt Unlock Configuration Register mov al 013h out 22h al nop nop mov al Oc5h out 23h al nop nop gt Lock Configuration Register mov al 013h ou
47. nnen entrent 17 Figure 3 3 CN2 Floppy 18 Figure 3 4 CN8 64 Pin PC 104 Connector Bus A 19 Figure 3 5 CN7 40 Pin PC 104 Connector Bus amp nennen nnne nnns 20 Figure 3 6 CN6 Hard Disk IDE Connector 22 Figure 3 7 I Reset Header tec e Hg eee HER e ee AA 23 Figure 3 8 CN1 Parallel Port Connectors trennt trennen 24 Figure 3 9 Power Connectors nis mpra eda aeaa aiaee instr streets 25 Figure 3 10 RS 232 Connector eet eee Aa eR et xe ee LANA 26 Figure 3 T1 RS 485 CONNEC tO ANAN nA tr RR RUP RR REF DER Eee 27 Figure 3 12 LAN RJ 45 28 13 2 5 LAIN i ee ae 29 Figure 4 1 DOC FLASH Setting tnter AA AA 31 Figure 5 1 Watchdog Block 37 Eig re 6 L BIOS MailpiiM epos oreet ide ere tee eaten AA 44 Figure 6 2 Standard 5 0 4 20 0 000000000 anaia etna aaa Tanaina 45 Figure 6 3 Advanced 55 47 Figure 6 4 Advanced Chipset 51 Figure 6 5 Peripheral Setup fnr reete aa a eti aa eruere ares vn ua 53
48. s the jumper evenly onto the pins Be careful not to bend the pins We will show the locations of the PC 104 386L 2M jumper pins and the factory defa ult settings CAUTION Do not touch any electronic component unless you are safely grounded Weara grounded wrist strap ortouch an exposed metal part of the system unit chassis The static discharges from your fingers can permanently damage the electronic components NAGASAKI Corporation Keyboard Mouse Connector J 5 6 Pin J STKeyboard Mouse Connector 5 The following demonstrates the pin assignments of the 6 pin J ST keyboard mouse connector To use the PS 2 mouse an optional adapter cable has to be connected to the J5 6 pin headertype connector The pin assignments for the JST connectorare as follows 1 3 1 O O L4 21 nm kw b 15 8 Mouse connector Front View Of Mini Din Connecter 1 MoueData 2 Keyboard Data vc 6 KeyboardClock Table 0 1 1 Pin Assignments Connector 20 pin 2 0mm IDC The included floppy drive interface cable is used to transfer 20 pin connector into standard 34 pin connector The following table showssignal connections between 20 pin amp 34 pin connectors CN2 Floppy Connector NAGASAKI Corporation Figure 0 3 CN2 Hoppy Connector 20 pin Signal 34 pin 20 pin Signal 34 pin 1 Drive Enable 2 11 Write Data 22 A 2 In
49. t The following table illustrates the pin assignments of the hard disk drive s 44 pin connector Signal 4 4 4 Table 0 6 CN6 Hard Disk IDE Connector 2 1 1 1 1 1 2 2 2 2 2 3 3 3 3 3 0 2 6 8 0 2 6 8 0 2 6 8 22 NAGASAKI Corporation Reset Header J 1 J Lisused to connect to an extemal reset switch Shorting these two pins will reset the system Figure 0 7 J 1 Reset Header 1 Reset 2 Reset 23 NAGASAKI Corporation Parallel Port Connector CN1 Use the included adapter cable to connect the 26 pin header type CN1 connector adapter cable is mounted on a bracket and is included in your FB2310 package connector for the parallel port isa 25 pin D type female connector The following table shows signal connections between 26 pin amp DB25 connectors 14 25 000000000000 1 DB 25 13 D Type Connector 2 26 2000000000000 25 Parallel Port Connector Figure 0 8 1 Parallel Port Connectors Table 0 7 Parallel Port Pin Assignments 24 NAGASAKI Corporation Power Connector J 7 7 isa 4 pin power connector Using the 7 you can connect the power supply to the on board powerconnector for stand alone applications directly Figure 0 9 Power Connectors J7 1 4 Pin 1 5V Pin 2 Ground Pin 3 Ground Pin 4 12V 25 NAGASAKI Corporation Serial Ports A Serial Port Connectors 6
50. t 22h al nop nop mov al 000h out 23h al nop nop 2 Read the Value at Configuration Register For example read INDEX 3Ch Unlock configuration register mov al 03ch out 22h al nop nop in al 23h nop nop push ax Lock configuration register 39 NAGASAKI Corporation 4 4 pop ax AL result gt Write Data to Configuration Register For example write OFFh to INDEX 3Bh Unlock configuration register mov al 03bh out 22h al nop nop mov al Offh out 23h al nop nop Lock configuration register PROGRAMMING RS 485 The majority communicative operation of the RS 485 is in the same of the RS 232 When the RS 485 precedesthe transmission which needs control the TXC signal and the installing steps are asfollows Step 1 Enable TXC Step 2 Send out data Step 3 Waiting fordata empty 4 Disable TXC NOTE Please refer to the section of the Serial Ports in the Chapter System Controllers for the detail description of the COM port sregister Initialize COM port Step 1 Initialize COM port in the receiver interrupt mode and ortransmitter interrupt mode All ofthe communication protocol buses of the RS 485 are in the same Step 2 Disable TXC transmitter control the bit O of the address of offset just sets O NOTE Control the FB2310 CPU card s DTR signal to the RS 485 sTXC communication Send outone character Transmit Step 1 Enable TXC signal and the bit 0 of the addr
51. te and time in addition to storing configuration information about the computer system It contains 14 bytes of clock and control registers and 114 bytes of general purpose RAM Because of the use of CMOS technology it consumes very little power and can be maintained for long periods of time using an intemal Lithium battery The contents of each byte in the CMOS RAM are listed below 02 Hou 2 04 Hours 06 Dayofweek sd 08 Month o9 OB statusregisterB OD statusregisterD 13 18 expansion memory byte Table 2 4 Real Time Clock amp Non Volatile RAM Timer The PC 104 386L 2M provides three programmable timers each with a timing frequency of 1 19 MHz TimerO The output of this timer is tied to interrupt request O IRQ 0 Timerl This timer is used to trigger memory refresh cycles Timer2 This timer provides the speaker tone Application programs can load different counts into this timer to generate various sound frequencies 8 NAGASAKI Corporation 2 5 SERIAL PORTS The Asynchronous Communication Elements ACE1 to ACE4 used to convert parallel data to a serial format on the transmit side and convert serial data to parallel on the receiver side The serial format in order of transmission and reception isa start bit followed by five to eight data bits a parity bit if programmed and one one and half five bit format only ortwo stop bits The ACEs are cap
52. tem BIOS Programmable Watchdog timer 1 5MB flash disk or 1 soc ket for up to 288 MB DixOnChip NE2000 compatible Power LED One 4 pin and one 8 pin 2 5mm optional power connector V 12 maximum 6 layers 90 2 MMX95 8MM PC 104 fom factor EMI considered on every output signals E2KEY function for safe CMOSdata keeping and PS 2 mouse 61 NAGASAKI Corporation PLACEMENT 62 NAGASAKI Corporation DIMENSIONS Unit mm 63
53. the new values Save Settings and Exit It is used to save the modified values set in the Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup and the new password if it has been changed will be stored in the CMOS The CMOS chec ksum is calc ulated and written into the CMOS As you select this function the following message will appear at the center of the screen to assist you to save data to CMOSand Exit the Setup Sa ve curent settings a nd exit Y N AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C1998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup fiuta Detect Hard Disks Save current settings and exit Y N 7 Y Exit Without Saving Write the current settings to CMOS and exit ESC Exit 11 5 1 F2 F3 Color Fi0 Saue amp Exit Figure 5 9 Save Current Settings and Exit 58 NAGASAKI Corporation Exit Without Saving When you select this option the following message will appear at the center of the screen to help to abandon all Data and Exit Setup Quit without sa ving Y N AMIBIOS HIFLEX SETUP UTILITY VERSION 1 20 C1998 American Megatrends Inc All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup futo Detect Hard Disks Exit Without Saving Exit without saving the current settings ESC Exit 11 5 1 F2 F3 Color Fi0 Sau
54. twork Without on FB2310A Parallel port floppy and IDE Interface 2 RS 232C RS 485 serial ports RS 485 is optional PS 2 compatible keyboard interface E2KEY function for safe CMOS data keeping Option On board LED indicatorand speakerheader Flash BIOS with easy upgrade utility Software programmable watchdog timer 3 sockets for 1 5MB flash disk or 2 soc kets for 1MB flash disk and 1DIP soc ket for up to 288 MB DiskOnChip Low powerconsumption 45V only 1 2A maximum EMI Considered on every output signals PC 104 form factor 90 2 mm x 95 9 mm 3 55 x 3 775 FablATech Corporation 1 4 PACKING LIST The following accessones are included in the package Before you begin installing your PC 104 386L 2M board take a moment to make sure that they have been included inside the PC104 386L 2M package 1 PC 104 386L 2M all in one CPU board 1 44 pin hard disk drive interface cable 1 20 to 34 pin floppy drive interface cable 1 parallel port interface cable 2 serial port adaptercables 10 pin IDC to DB 9 1 LAN adaptercable J ST to RJ 45 Without FB2310A 1 PS 2 keyboard adapter cable 1 poweradapter cable 1 CD includes nec essary utility drivers quick setting guide file and this manual file A hard copy of Users quick setting guide 0000000000 NOTE If any of the listed accessories is missing ordamaged please contact your dealer for immediate servicing NAGASAKI Corporation CHAPTER 2 SYSTEM CONTR
55. u must configure the hard disk drive in the standard method asdescribed above by the lt USER gt option 45 NAGASAKI Corporation Boot Sector Virus Protection This option protects the boot sector and partition table of your hard disk against accidental modifications Any attempt to write to them will cause the system to halt and display a waming message If this occurs you can either allow the operation to continue or use a bootable virusfree floppy disk to reboot and investigate your system The default setting is lt Disabled gt This setting is recommended because it conflicts with new operating systems Installation of new operating system requires that you disable this to prevent write errors 46 NAGASAKI Corporation 5 3 ADVANCED CMOS SETUP The Advanced CMOS SETUP option consists of configuration entries that allow you to improve your system performance or let you set up some system features according to your preference Some entries here are required by the CPU board s design to remain in their default settings AMIBIOS SETUP ADUANCED CMOS SETUP C1998 American Megatrends Inc All Rights Reserved Available Options Floppy Drive Swap Disabled Off Floppy Drive Seek Disabled On Floppy Access Control Norma 1 HDD Access Control Normal Typematic Rate Fast System Keyboard Absent Primary Display Absent Password Check Setup Wait For F1 If Error Disabled Hit DEL Message Display Enabled CQ0
56. update fileson the 5V FLASH disk 30 NAGASAKI Corporation 3 2 SWITCH SETTING FLASH D O C DISK Select There isa DIP Switch on the PC 104 386L 2M It performs the following functions These functions may be required to perform with relevant jumpers Detailed settings will be specified latter Switch 1 1 Set the FLASH DISK mapping Switch 1 2 Set the DOC mapping Figure 3 1 DOC FLASH Setting A Hash Disk and DOC Memory Bank Segment Settings SW1 1 8 SW1 2 Hash Disk Memory DiskOnChip Memory Bank Segment Bank Segment C800 0 8KBytes Disabled D800 0 8KBytes Disabled C800 0 8KBytes CA00 0 8KBytes D800 0 8KBytes 00 0 8KBytes Note If SSD Disk enable the system will be reserved 32K byte Socket Package DiskOnC hip U2 M1 PLCC32 No U3 M2 PLCC32 No 012 DIP32 Yes If enabled Note If DOC is enabled please set SW1 2 ON position to enable flash function and U12 is ready for serving DiskO nC hip SSD Memory Type Select Switch 1 1 amp 1 2 The Switch 1 1 amp 1 2 isused to select the memory bank segment You must select an appropriate memory bank segment so that the FB2310 will not conflict with memory installed on otheradd on memory cards Additionally be sure not to use shadow RAM area or EMM driver s page frame in thisarea If you are not going to use the Solid State Disk SSD you can use BIOS setup program to disable the SSD BIOS
57. vention The two DMA controllers are intemally cascaded to provide four DMA channels for transfers to 8 bit peripherals DM A1 and three channels for transfers to 16 bit peripherals DMA2 DMA2 channel 0 provides the cascade interconnection between the two DMA devices thereby maintaining IBM PC AT compatibility The following isthe system information of DMA channels DMA Controller 1 DMA Controller 2 Channel 0 Spare Channel 4 Cascade forcontroller 1 Channel 1 Reserved for IBM SDLC Channel 5 Sp C Spare Channel 2 Diskette adapter Channel 6 Spare Channel 3 Spare Channel 7 Spare Table 2 1 DMA Channel Contoller NAGASAKI Corporation 2 3 24 KEYBOARD CONTROLLER The 8042 processor is programmed to support the keyboard serial interface The keyboard controller receives serial data from the keyboard checks its parity translates scan codes and presents it to the system as a byte data in its output buffer The controller can interrupt the system when data is placed in its output buffer or wait for the system to poll its status register to determine when data is available Data can be written to the keyboard by writing data to the output buffer of the keyboard controller Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted The keyboard controller is required to acknowledge all data transmissions Therefore another byte of data will not be sent to keyboard controll
58. very If O Recovery Feature field is enabled the BIOS insert a delay time between two 1 commands The delay time is defined in I O Recovery Penod field Available Options Disable Enable Default setting Disable I O Recovery Period This specifies the I O recovery delay time Available Options 0 3 5 us Default setting 1 5 us 16Bit ISA Insert Wait This field spec ifies the 16bit ISA Insert Wait function Available Options Disable Enable Default setting Disa ble Watch Dog Timer Output Control This function isto enable or disable the Watchdog timer function Available Options Disabled Enabled Default setting Disabled Watch Dog Timeout Trigger Signal This field can not be configured 52 NAGASAKI Corporation 5 5 PERIPHERAL SETUP This section is used to configure peripheral features AMIBIOS SETUP PERIPHERAL SETUP C1998 American Megatrends Inc All Rights Reserved Available Options Onboard IDE Enabled Disabled OnBoard FDC Enabled b 3 Sec OnBoard Serial Porti 3F8h 5 Sec OnBoard Serial Porti 4 10 Sec OnBoard Serial Portz 2F8h 15 Sec OnBoard Serial Portz IRQ 3 OnBoard Parallel Port 378 Parallel Port Mode Normal EPP Version NAA Parallel Port IRQ Parallel Port DMA Channel NAA ESC Exit 11 5 1 Pgllp PgDn Modify F2 F3 Color Figure 5 5 Peripheral Setup Hard Disk Delay If this field is set to Disabled and the system BIOS executes too fast the result is the BIOS can

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