AVR455: ATAVRSB201 User's guide
Contents
1. Name Description CELL Cell stack negative terminal VFET VFET pin VREG Regulator output Connected to VCC 8131A AVR 10 08 2 2 1 Polarity safety FET 2 2 2 Board ID system 8131A AVR 10 08 AVR455 Name Description S PV1R Cell1 positive input PV2R Cell2 positive input Table 2 2 Signals that can be found on the 2x2 pin header holes Name Deseription OOO OOO ISP programming via SPI interface Table 2 3 shows connections Alternative pin names are also noted Table 2 3 ISP connector J111 pene Name Pino Description SSS MISO KU Serial data out PB3 MOSI Serial data in PB2 RESET Reset signal active low Ground A voltage negative to ground connected on the input charger with reverse polarity will pull the source of the discharge FET to negative voltage and with the ground potential on the gate the FET will likely be turned on Since the diode of the Charge FET will conduct a discharge current a large current will in this case flow out of the battery cell s with the ATmega16HVA unable to stop it A FET Q2 on the pack input which pulls the source of the discharge FET to the negative input voltage is included in the design to avoid this situation This is an optional part in a design but included in the main area A board identification system is included to allow the SB200 to recognize which board is inserted The wiring and thus response of this is different between SB2012. EL _ thay ee i hr I CILJ e gt Pe Pee ee i oe ole SB201 1 D ic NITI k fin fie TO 8 bit AVR Microcontrollers Application Note Rev 8131A AVR 10 08 2 Hardware 2 1 Main area AMEL The SB201 1 and SB201 2 have a common PCB and only differ in which components are mounted and the silk screen They will be commonly referred to as SB201 in this document unless differences exist The SB201 consist of three parts the edge connector the main area and the connector and support area The main area contains all the circuitry needed in a battery pack design Figure 2 1 SB201 Block layout Connector and supporting area jaka papin ce SB201 1 TT Connector The main area contain the ATmega16HVA device charge and discharge N FETs 10mQ sense resistor decoupling capacitors filter capacitors resistors for the voltage and current ADCs and ESD protection 2 2 Connector and support area 2 AVR455 The connector area contains holes for two pin headers with 2x6 and 2x2 pins to give access to several signals and device pins as shown in Table 2 1 and Table 2 2 Pin headers with 2 54mm spacing or wires can be soldered in here A connector for in circuit programming is mounted Lastly the area contains cell balancing and a board ID system which are described in more details in the next subsections Table 2 1 Signals that can be found on the 2x6 pin header holes
3. AVR455 ATAVRSB201 User s guide Features e ATmega16HVA smart battery chip evaluation and development kits ATAVRSB201 1 for Single Series Li lon Cell applications ATAVRSB201 2 for 2 Series Li lon Cell applications High side N FETs 10 mQ sense resistor current measurements with the 18 Bit CC ADC Input filters for cell voltages to the 12 bit voltage ADC All components on one side Four layer PCB with the reference design part implemented on two layers Balancing FETs Polarity safety FET Holes for mounting of pin headers or wires ISP connector for programming via SPI and debugging via debugWIRE interface 1 Introduction The ATAVRSB201 1 SB201 2 kits are evaluation and development kits for the new Atmel AVR smart battery device ATmega16HVA This device is made for battery packs with 1 series or 2 series lithium ion and lithium polymer cells and feature autonomous battery protection as well as very accurate voltage current and temperature monitoring capabilities The device provides the means to protect the battery pack and surroundings from hazardous conditions and gain the most from the batteries The kits consist of both hardware and firmware with hardware documented here and firmware in application note AVR456 The boards have an edge connector for connection to ATAVRSB200 Smart battery Evaluation kit but can for development purposes also be used alone Figure 1 1 SB201 1 Kit j a du yH ae B
4. 8131A AVR 10 08 AVR455 12 EVALUATION BOARD KIT IMPORTANT NOTICE 8131A AVR 10 08 This evaluation board kit is intended for use for FURTHER ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY It is not a finished product and may not yet comply with some or any technical or legal requirements that are applicable to finished products including without limitation directives regarding electromagnetic compatibility recycling WEEE FCC CE or UL except as may be otherwise noted on the board kit Atmel supplied this board kit AS IS without any warranties with all faults at the buyer s and further users sole risk The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies Atmel from all claims arising from the handling or use of the goods Due to the open construction of the product it is the users responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER USER NOR ATMEL SHALL BE LIABLE TO EACH OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES No license is granted under any patent right or other intellectual property right of Atmel covering or relating to any machine process or combination in which such Atmel products or services might be or are used Mailing Address Atmel
5. I 1 o 1 i i RE I o N o o v i Nee MG S w on fon fon Jon i 2 i BH i MG i sa j i in T i lt 1 1 u n u i NC7SZ57P6X i ae MO i o H H Charge amp Discharge MOSFETS _ z 4 IDLY1 i i CELL i H i J6 H i i i O PACK a n 7 DI H l I H H i pa BAS40L i i l D S i i ee NE H H i O IDs RI VFET S fe i rd i i Kd EKG Gat RO oe eal eee ea PCO 5 B A OR applicati R25 Mount for 1 cell application o Mount for 2 cell application 2 Input NAND with inverted A Input GND_ID wo om tr a R2 Be U3 ad m a V ATmegal 6HVA 36CK1 eat pa GE IN eee ee Ro O Y E 8 i Mount for 1 cell pplic of fok Z Z C2 Mount for 2 cell application 3 a i 100n R10 PV2R Cavan a A2 pya tcp0 1nr0 Pco B nee i 4 gt EVI A3 pvi TOOR f 3 i S A4 D7 MISO i H 470R Srey NV MISO INT2 PB3 jogg MOSI l 10k 5 PI MOSI INT1 PB2 s vee i I s NI SCK PB1 PRO PBO i R16 100n ei ss cKour pBo e PB a 3 i u SGC E7 RESET i Z 2 i 470R CFIN dw RESET PA2 jogy RESETI SN PAL O i CF2P ADC1 SGND T1 PA1 J E PAG O JE H Biy 5 PI CF2N ADCO SGND TO PAO T3 i i H 100R c PAO i IR18 Pe i i SL0805R0100FEA R15 eS i i 100n VREF TC COM i R19 O TCOM i i PGND NI edik PVIR i Si 10k m5 i 100R C4 i H PGND VREFGND VREFGND VGND i a H l J16 i i i 3 i PGNDGND ai I a H ISP circuit j y Q i NetTie GND H S ji PGND B lt 8 i i S a PB2 i GND PGND connection
6. ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDENTAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice Atmel does not make any commitment to update the information contained herein Unless specifically provided otherwise Atmel products are not suitable for and shall not be used in automotive applications Atmel s products are not intended authorized or warranted for use as components in applications intended to support or sustain life 2008 Atmel Corporation All rights reserved Atmel logo and combinations thereof AVR AVR Studio STK and others are the registered trademarks or trademarks of Atmel Corporation or its subsidiaries Other terms and product names may be trademarks of others 8131A AVR 10 08
7. Corporation 2325 Orchard Parkway San Jose CA 95131 Copyright 2008 Atmel Corporation Headquarters Atmel Corporation 2325 Orchard Parkway San Jose CA 95131 USA Tel 1 408 441 0311 Fax 1 408 487 2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721 9778 Fax 852 2722 1369 Product Contact Web Site www atmel com Atmel Europe Le Krebs 8 Rue Jean Pierre Timbaud BP 309 78054 Saint Quentin en Yvelines Cedex France Tel 33 1 30 60 70 00 Fax 83 1 30 60 71 11 Technical Support avr atmel com Atmel Japan 9F Tonetsu Shinkawa Bldg 1 24 8 Shinkawa Chuo ku Tokyo 104 0033 Japan Tel 81 3 3523 3551 Fax 81 3 3523 7581 Sales Contact www atmel com contacts Literature Request www atmel com literature Disclaimer The information in this document is provided in connection with Atmel products No license express or implied by estoppel or otherwise to any intellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH IN ATMEL S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL S WEB SITE ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL
8. close to RSENSE i Z H 14 i i 70R i I D3 C6 BAS40L H i CELL i SOG 1000 Block Reset 5V from Master to VREG i H H AE SOE Seal oS AN oe E E E E GND GND C10 10n ATMEL Norway GND PCB1 PCB2 Vestre Rosten 79 D Remove C10 to use debugWire 7075 TILLER LOGO1 LOGO2 NORWAY 17 04 2008 10 13 28 PAGE Sie Assembly Variant Document number A08 482 A08 483 Revision D 3MM ATMEL 5 Variant name IS not interpreted until outpufn SB201 monitoring and protection circuit for 1 2 cell Li ion AVR_LOGO_OVERLAY_3MM ATMEL_LOGO_OVERLAY A08 0482 A08 0483 SB201 SchDoc 1 2 3 5 6 7 8 8131A AVR 10 08 AMEL 10 Component Placement Component placement for SB201 1 and SB201 2 are provided in the zip file that can be downloaded from Atmel AVR Application notes A small version of SB201 1 is shown here C1BO C2BO Sif cle Gl he NaS ol eal E Ve VOND resi NR Kimi nam Dd DD CELL CELL VFET PV2R PA1 PCO WE el Oe Ee P ELER TEU CEN ses LER ET ETF T d Di fe sa lot 133 kr SEE O J io E ess i Ab A jue TE ei Cr 11 Bill of Materials BOM The BOM is provided in the zip file that can be downloaded from Atmel AVR Application notes The difference between SB201 1 and SB201 2 is that the SB201 2 provides cell balancing circuitry Otherwise the SB201 1 has a O Q resistor connecting PV2 and PV1 and the board identification has a different resistor mounting b 8 AVR455
9. 1 and SB201 2 The board ID system is not relevant for stand alone usage of the SB201 or designs with the ATmega16HVA AIMEL AMEL 2 2 3 Single cell mode capacitors 2 2 4 Cell balancing 2 3 Edge connector The capacitors connected to CF1P N and CF2P N allow step up operation of the regulator It is used for powering the device from 1 8V to approximately 3 6V input voltage and would normally not be needed in 2 cell applications as the input voltage should then not go that low but it is included to allow the same PCB layout to be used for both SB201 1 and SB201 2 Please see the voltage regulator section in the data sheet for details of regulator operation In a regular design one would only include the capacitors for a 1 cell design The SB201 2 contains cell balancing FETs while this circuitry is un mounted on SB201 1 Cell balancing is controlled by PB2 and PB3 on SB201 2 and if PB2 PB3 are desired used for other tasks the 0Q resistors R21 R22 connecting them to the cell balancing should be removed The edge connector provides a quick and secure connection to the demonstration board SB200 3 Connecting batteries to SB201 The SB201 1 is made for 1 series Cell battery pack while the SB201 2 is made for 2 series cells battery packs The connections are described in the following subsections WARNING Li lon batteries must be handled with care as they may pose a safety hazard if treated incorrectly It is important that
10. 16HVA has no hardware UART AVR455 showed a typical current consumption of 160uUA for SB201 1 in a 1 cell application 9 Schematics The schematics for SB201 1 and SB201 2 are provided in the zip file that can be downloaded from Atmel AVR Application notes A small version of the common schematic is provided here 6 AVR455 8131A AVR 10 08 Figure 9 1 Schematics for SB201 AVR455 1 2 3 5 6 7 8 yuo iii i J1J2 Y 0 ed2 0 09 voc ID PV1RO OPV2R 3 OI CELL i i Remove when using SB200 c R24 OR a i i PCB Edge connector to SB200 i NC7SZ57P6X f 7 I dls j 3 ee H i VCC_ID i o i al 4 i A PACK i 4 I1 xk i 12 i O Dy a i PACK rae g i DE Z ESD 1 i iJ 1 i I fi or in m ofr jinio a j c13 Cl4 i N H i in jin N ajajajaja i I 2 Input AND l i m I cS i i ME S 100n 1001 i i 1 i PGND GND_ID noA z i i i o U i
11. the development of Li lon battery applications are done by people that are skilled and knowledgeable of correct use and handling of such batteries 3 1 2 cell application SB201 2 4 AVR455 For applications with 2 series cells connect cells as shown in Figure 3 1 Positive terminal of upper cell to CELL negative terminal of upper cell and positive of lower cell to PV1R and finally negative terminal of lower cell to CELL Load or charge the batteries trough PACK and PACK To start the part and thus possibly open the FETs a charge condition must be initiated by a charger 8131A AVR 10 08 AVR455 Figure 3 1 Connection of 2 cells in series packs to SB201 2 ML Coo TI PVIR NM sss s Lo CEL 3 2 1 cell application SB201 1 4 Programming 5 Debugging 8131A AVR 10 08 The SB201 1 for 1 cell in series applications connect the cell as shown in Figure 3 2 Positive terminal of cell to CELL and negative terminal to CELL Load or charge the battery through PACK and PACK To start the part and thus possibly open the FETs a charge condition must be initiated by a charger Figure 3 2 Connection of 1 cells packs to SB201 1 LL a aa T L CELL The board can be programmed with STK 500 STK600 AVRISPmkl mklI JTAGICE mkll and AVR Dragon via the ISP socket See the ATmega16HVA datasheet and AVR Studio help for connections ATmega16HVA features on chip debugging via debugWIRE interface
12. with either JTAGICEmkIl or AVR Dragon To enable debugging the capacitor C10 on the reset line needs to be removed as this stabilization of the Reset pin prevents communication through debugWIRE Please notice that debugWIRE must be enabled via the ISP interface if not enabled and disabled after debugging to enable ISP again This is described in AVR Studio help Leaving the ATmega16HVA with DWEN fuse on will increase current consumption AMEL 6 Powering up the SB201 Please see the ATmega16HVA datasheet for how to wake the device from Power Off mode and thus enable programming and or operation The SB200 provides this functionality automatically and manually 7 Considerations when using SB201 in SB200 WARNING Connecting SB201 1 in a SB200 with Cell2 mounted will result in the destruction of tracks as PV2R and PVIR is shorted through a O O resistor R9 on SB201 1 Make sure you use correct board with correct number of cells The resistor R24 connecting the PV2R and CELL should be removed on SB201 to facilitate correct current measurements through the jumper position as otherwise some of the current may flow through the PV2R connection 8 Specifications Max continuous current 3A Max input voltage 9V Table 8 1 Power consumption Frequency MHz Active mode mA Idle mode mA Power save yA Application current consumption is dependant on the firmware and if communications are active as the ATmega
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