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PSoC™ Designer: User Guide Integrated Development Environment

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1. lt Back Finish Cancel Help Figure 30 Existing Configuration Dialog Box If the base part is different from the base part of the cloned project then the pin settings in the resulting project will be set to the default values 6 When finished click Finish Your new project directory will be created and can be seen in the source tree If you wish to move an existing project from one directory to another use the cloning method to create a new cloned project in the new directory rather than employing a physical move 52 Document No 38 12002 Rev E December 15 2004 4 2 3 Design Based Project Creating a design based project is directly related to Export and Import Designs You can create a project based on exported designs A design is a single or collection of existing loadable configuration s from a project A loadable configuration consists of one or more placed User Modules with module parameters Global Resources set pin outs and generated applica tion files PSoC projects can consist of one or multiple loadable configurations This feature allows you to efficiently use and re use configurations thus sav ing design time and resources For complete details on using multiple configurations in a single application see Dynamic Re configuration To create a design based configuration project perform the following steps 1 Start as if you are creating a new project but in the New Pro
2. Calls main or main to begin executing code boot asm will be re generated every time device configurations change and application files generated This is done to ensure that interrupt handlers are consistent with the configuration If you make changes to boot asm that you do not want overwritten hard code the change in boot tpl template for boot asm Policy dictates that this file belongs to PSoC Designer Again it is created from a template Keep in mind it is highly recommended that you do not modify the contents of this file main asm This file resides under Source Files and is key because it holds the main label that is referenced from the boot sequence main asm is created to resolve the external reference from the boot sequence Upon new project creation the _main function contains a simple forever loop 3 66 This file can be removed and replaced with a C main if you determine that most of the application should be written in C source It is only created once when a new project is created No additional policies or recommendations are attached to this file PSocConfig asm This is always a required Library Source file because it contains the configuration that is loaded upon system access Initially and probably for a very brief moment there is not a configuration Therefore this file contains a function label LoadConfig to satisfy the boot sequence ref erence as well as a
3. As you move between subsystems you will notice different options being enabled or disabled in the toolbar and menus as applicable to functionality 3 4 Edit Windows As mentioned earlier open assembly language and C Compiler source files reside in the main frame of Application Editor see Application Editor Sub system Each file can be opened as a separate window Z bootasm E El mamasini El psocconfig asm Data 19 December 2000 Copyright Cypress MicroSystems 2000 a This file is generated by the Device Editor on Application Generatior It contains code which loads the configuration data table generated i the file PSoCConfigTBL asm DO NOT EDIT THIS FILE MANUALLY AS IT IS OVERWRITTEN Edits to this file will not be preserved export LoadConfigInit export LoadConfigInit export LoadConfig Example Dynamic_PUM export LoadConfig Example Dynamic_PUM export UnloadConfig Example Dynamic _PUM export UnloadConfig Example Dynamic PWM export ReloadConfig Example Dynamic_PUM 4 Z Figure 18 Cascaded Windows You can use the Window menu or icons to cascade or tile your window display Options include Cascade Tile Vertically and Tile Horizontally S a m Figure 19 Window Options Open files are accessible from within the Debugger subsystem under the Win dow menu but are displayed by default in Application Editor This is where you add and edit the assembly language and C Compiler source files of you
4. call void_handler reti org 08h PSoC Block DBBOO Interrupt Vector call void_handler reti org 0Ch PSoC Block DBBO1 Interrupt Vector call void_handler reti org 10h PSoC Block DCBO2 Interrupt Vector call void_handler reti org 14h PSoC Block DCBO3 Interrupt Vector Ijmo Timer32_1INT reti org 18h PSoC Block DBB10 Interrupt Vector call void_handler reti org 1Ch PSoC Block DBB11 Interrupt Vector call void_handler reti Document No 38 12002 Rev E December 15 2004 org 20h PSoC Block DCB12 Interrupt Vector call void_handler reti org 24h PSoC Block DCB13 Interrupt Vector call void_handler reti org 28h Analog Column 0 Interrupt Vector call void_handler reti org 2Ch Analog Column 1 Interrupt Vector call void_handler reti org 30h Analog Column 2 Interrupt Vector call void_handler reti org 34h Analog Column 3 Interrupt Vector call void_handler reti org 38h GPIO Interrupt Vector call void_handler reti The following table shows how boot asm vector names map to fixed analog column and PSoC block configurable interrupts Table 8 boot asm Interrupt Names Address Data Sheet Interrupt Name Type 00h Reset Fixed 04h Supply Monitor Fixed 08h Analog Column 0 Analog Column OCh Analog Column 1 Analog Column 10h Analog Column 2 Analog Column 14h Analog Column 3 Analog Column 18h VC3 Fixed 1Ch GPIO Fixed 20h DBBOO PSoC Block 24h DBB01
5. The register shadow allocation is determined by User Modules and Dynamic Re configuration As the register allocation changes the macro generation will change accordingly Psogpioint h contains the same information as Psocgpioint inc except in a form needed for C code In the case of the register shadows this file does not generate macros but rather defines a symbol that allows manipulation of the shadow as a Global Variable For each register shadow associated with a cus tom pin definition a variable named CustomName _registerNameShadow is defined where CustomName and registerName are the same as previously defined for Psocgpioint inc The variable name can then be used to manipulate 130 Document No 38 12002 Rev E December 15 2004 7 3 the shadow register For example to set a pin value to 1 within the port do the following CustomName registerNameShadow CustomName_MASK CustomName_registerName_ADDR CustomName_registerNameShadow Modifying Files When you are ready to program and modify assembly language source files double click the target file from under the source tree in the left frame The open file will then appear in the main active window Open files are accessible from within the Debugger subsystem under the Window menu as Read Only but are displayed editable by default in Applica tion Editor You can have as many files open as you wish or that your computer will allow For further details regarding
6. ccccccceeceeeceeeeeeeeeeeeeeeeseeeeeseeeeereeeneeees 166 Debugger NOOIDAN srs xcsesscscnsas candles a RR 168 ICE 4000 and YProgrammer sericese nnana 170 A Look at the PSC Programme ccccceeceeeeceeeteeeeeeetseees 171 flashsecurity txt in Source Treg eeccceeeeceeeeeeeceeeececeeeeeeneetenees 174 Snip of MAS MSSCU MID AME seriada 175 FPMP Error in Output Status Window ccecceeeceeeeeeeees 176 Unprotected Flash ava G80 ocara a 177 Document No 38 12002 Rev E December 15 2004 What s New With PSoC Designer 4 2 Support for the new in circuit emulator ICE Cube that replaces the ICE 4000 and USB Adapter for seamless connection debugging and programming Support has been added for the new PSoC device family group CY8C29x66 New functionality and enhancements to the C compiler Supports example projects for the new CY3210 PSoCEval1 evaluation board and CY3210 MiniEval evaluation board New standalone device programming software PSoC Programmer accessible from within PSoC Designer Drag to move capability in the Device Editor Interconnect View where you can Click the target placer identified as green and blue highlights and drag the User Module to a new location Saves time Inthe Device Editor Interconnect View the inactive target placers blue highlights of multi block User Modules are now identified by a group name across the top Inthe Device Editor Inte
7. 8 Compiling Assembling Files in PSoC Designer Assembly Language User Guide For further details on compiling and building see Builder in this user guide At any time you can ensure a clean compile assemble or build by access ing Project gt gt Clean then clicking the Compile Assemble or Build icon The clean will delete all Lib libPSoc a obj o and lib obj o files These files are regenerated upon a compile or build in addition to normal compile and build activity Document No 38 12002 Rev E December 15 2004 Section 9 Builder In this section you will learn details of building a project and of the C Com piler as well as basic transparent functions of the system Linker Loader and Librarian For comprehensive details on the C Compiler see PSOC Designer C Lan guage Compiler User Guide 9 1 Building a Project It is not necessary to compile all the source files individually before you build the entire project Building your project will compile assemble all source files and selectively assemble library source files The build process performs the compile assemble of project files then links to all the project s object modules and libraries creating a hex file that can be downloaded for debugging If the debugger is started following source code changes but the project build is not performed the debugger will force a build to ensure the files are syn chronized with the source changes To buil
8. Documentation Design Aids Application Notes Browse CD Run Internet Explorer 6 0 setup Exit 10 Document No 38 12002 Rev E December 15 2004 2 At the Welcome screen single click Next PSoC Designer InstallShield Wizard x Welcome to the InstallShield Wizard for PSoC Designer The InstallShield Wizard T M will help install PSoC Designer on your computer To continue click Next lt Back Cancel Figure 3 Welcome Screen If the Welcome screen does not automatically appear click Start gt gt Run and Browse your CD drive for PSoC Designer exe Once located click OK The Welcome screen will appear The system will extract files and then run InstallShield Wizard 3 At the PSoC Designer Setup Wizard click Next Click Back at any time during installation if you need to view or modify the previous screen Click Cancel at any time to halt installation December 15 2004 Document No 38 12002 Rev E 11 PSoC Designer Integrated Development Environment User Guide PSoC Designer Setup Wizard Welcome to the PSoC Designer Setup program This program will install PSoC Designer on your computer IT IS RECOMMENDED THAT YOU SHUT DOWN ALL Figure 4 PSoC Designer Setup Wizard PSoC Designer Setup WINDOWS tm APPLICATIONS BEFORE PRECEEDING 5 2 4 At the License Agreement screen scroll or use Page Down to view the terms of the agreement When satisfied single click Yes
9. Dynamic Event Points Overview The Events window is selectable from Debug gt gt Events and allows you to per form complex debugging by configuring conditional breaks and traces While breakpoints allow you to select a program location and halt Dynamic Event Points provide multiple sequences of logical combinations and have multiple potential actions Breakpoints allow you to select locations within a program to stop look around and determine how did get here However debugging is enhanced by the ability to stop and collect information about the target program based upon specified conditions An example is the scenario when variable OutputV gets set to zero turn trace buffer on Dynamic Event Points help simplify the debugging process by providing this capability They monitor the processor to determine a match with logical oper ations of Program Counter PC data bus data address instruction type external logic signals X Register Accumulator Stack Pointer and Flags Typically breakpoints have one logical input PC and one action Break Dynamic Event Points on the other hand differ from breakpoints in that they trigger actions when the specified logical condition occurs An event point can trigger the following actions break turn trace on or off decrement the input counter initiate an external trigger trigger the trace buffer and enable an event sequence These actions are triggered only with the ICE 40
10. E 109 PSoC Designer Integrated Development Environment User Guide 110 Document No 38 12002 Rev E December 15 2004 6 1 Section 6 Dynamic Re configuration Dynamic Re configuration allows for PSoC applications to dynamically load and unload configurations With this feature your single PSoC device can have multiple functions If a PSoC project does not use multiple configurations PSoC Designer and its usages behave as in previous version releases Upon installing and launching the upgrade version of PSoC Designer that con tains Dynamic Re configuration capabilities by default you can select the example project that has multiple configurations In the Start dialog box click anyone of the subsystems preferably Device Edi tor and c Program Files Cypress MicroSystems PSoC Designer Exam ples Example Dynamic _PWM Example Dynamic PWM SOC will open Using the example project you can easily sample features of Dynamic Re con figuration Add Configuration To add loadable configurations to your PSoC project execute the following steps This assumes you have PSoC Designer Device Editor and your target project open 1 From the menu click Config gt gt Loadable Configuration gt gt New Or click the left most icon in the Dynamic Re configuration toolbar ts H Second_PwM Figure 62 Dynamic Re configuration Toolbar ea December 15 2004 Document No 38 12002 Rev E 111
11. Select FallingEdge from the second menu The port name and FallingEdge will appear in the port related fields under neath User Module Parameters where you can click the drop arrows to change your selections RisingEdge To specify RisingEdge interrupt execute the following 1 Click on the target Port_x_x 2 Select the target Port_x_x_Interrupt from the menu 3 Select RisingEdge from the second menu December 15 2004 Document No 38 12002 Rev E 99 PSoC Designer Integrated Development Environment User Guide The port name and RisingEdge will appear in the port related fields under neath User Module Parameters where you can click the drop arrows to change your selections 5 6 Tracking Device Space Tracking the available soace and memory of configurations for your device is something you do intermittently during the whole process of configuring your target device Device space and memory resources need to be monitored so you are aware on an ongoing basis of the capacity and limitations you are working with on the MCU You can monitor device space and memory from within the User Module Selection View of Device Editor Resources are updated as each User Module is selected before actual placement In the far right frame of the Select User Module mode of the subsystem you see a table to track Analog Blocks Digital Blocks RAM and ROM As you place User Modules you can view how many analog and digital PSoC blocks
12. assembly language such as ibPSoc a and PSocConfig asm Header files are intermediate reference include files created during application code genera tion and compilation Both types are generated and used by PSoC Designer and are unique to each specific project See File Definitions and Recommen dations in Application Editor for recommended usage Document No 38 12002 Rev E December 15 2004 Section 10 Debugger In this section you will learn how to connect and download your project to the In Circuit Emulator ICE debug and perfect the functionality For addi tional information about the ICE and the Development Kit refer to Application Note AN2018 Care and Feeding of ICE Pods under PSoC gt gt Application Notes at http www cypress com 10 1 Debugger Components The PSoC Designer Debugger provides in circuit emulation that allows you to test the project in a hardware environment while viewing and debugging December 15 2004 Document No 38 12002 Rev E 147 PSoC Designer Integrated Development Environment User Guide device activity in a software environment The Basic Development Kit contains the following components integrated Development Environment User Guide Figure 68 Basic Development Kit Components Note that the CAT5 Patch Cable should be no longer than 1 ft It must also have 8 wires in order to connect from the ICE to the Pod some data CAT5 cables only have 4 wires 10 2 Connecting 10
13. click Next At any time you can click Back to return to the previous dialog box Cancel to cancel operation or Help to view context sensitive help 48 Document No 38 12002 Rev E December 15 2004 Once you click Next you will see the New Configuration dialog box Create New Project Figure 28 New Configuration Dialog Box December 15 2004 Document No 38 12002 Rev E 49 PSoC Designer Integrated Development Environment User Guide 4 Click View Catalog to access a detailed list of available parts Highlight your part of choice and click Select to save your selection and exit the dia log box S Select Dase Part Anico Dots a I Caress Procure CHRCISIG6 CHRCIIIEE CVECEGS CHRCISIE Datarteot tie Me Cacors a Part p ij RARANAARANLLL CVUC HINA CODEF CVACPT ALD CHICPPSAI VECINA Oai earnen 12 D Figure 29 Parts Catalog Dialog Box You have several options in this dialog box including layout display viewing part image and sorting part selection by clicking on a chosen column title 5 Once you have selected a part click C or Assembler to designate the source in which you want the system to generate the main file Note that C will only be an option if the C Compiler has been enabled in your version of PSoC Designer See Compiler in this guide or PSoC Designer C Lan guage Compiler User Guide for enabling instructions 6 Click Finish Your project dire
14. programming application If PSoC Programmer is not installed the icon will be grayed out It can be installed from the PSoC Designer CD ROM Using this PSoC Designer accessory you can quickly program read verify and checksum 170 Document No 38 12002 Rev E December 15 2004 a PSoC Programmer 2 a cvacz2113241 E Power Device ProgrammerPort OpenPort at 11 Successful Port Connection for ProgrammerPort OpenPort at 11 Device set to CY 8C22113 24 I a Device Family set to CY8C22x13 Figure 79 A Look at the PSoC Programmer Alternatively the device can be programmed on the target board using the Serial Programming Header on the Pod The five connections that must be made from the Serial Programming Header to the pins on the target device are listed below Table 15 Header to Device Pin Connections Header Pin Device Pin 1 Vad 2 Vss 3 XRES 4 P1 1 SCLK 5 P1 0 SDATA December 15 2004 Document No 38 12002 Rev E 171 PSoC Designer Integrated Development Environment User Guide It is important to note that there is a limit to the amount of current that can be supplied to the Vga pin from the emulator Pod 500 mA at 5V If you draw greater current through the Vaa pin on the programming header this could damage the emulator You must supply the connections on the target board for serial programming in the system Once part programming is complete you can test it directly on
15. s ssesssessussnnnnunnnnnnnnnnnnnnnnnnnnnnnnnnn Gx Add Configuration sionerien iana aE aia ARED a ani Esaiah 6 2 Export and Import Designs i 6 3 Delete Configurar sncsi icssisecsracexscarsistnncess cstnaness cateaucs 6 4 Global Parameters and Dynamic Re configuration 6 5 Pin Settings and Dynamic Re configuration 6 6 Code Generation and Dynamic Re configuration a 6 7 Application Editor and Dynamic Re configuration 0 eee eee eee eeeeeee 6 8 Debugger and Dynamic Re configuratiOM cc 2ccccctcancctd cate etetnas avcneleabeececceenest Section 7 Application Editor 7 1 File Definitions and Recommendations e cccccceceeeeeeeceeeeeeeeeaeeeeeseeeteaeeeeeeeaeeaee 7 2 Additional Generated Files sirintina eh eee ele 7 3 Modifying Files 7 4 Adding Files af Ro FABMOVIMNGM FIGS icsecssccasecoreeddesuenastny saxezcvsncess sens cartedusyse tassios ESETA 7 6 Full Application File Search isi tecsscestieecacascceresctniewsisennas vive snerriavedcenserbeastedssecestsntees gt Section 8 Assembler Gol Accessing Me ASSEIMDISM asinan R 8 2 The MIChOPhOCESS OF cossirer r A ESEA 8 3 Assembly File Syntax 8 4 List File Format 8 5 Assembler Directives 8 6 Instruction Seto eee z 8 7 Gompiling Assembling FileSies scscciusicessccsercesscesessesccestcensscenscansiievacesssexoseanesendeeneestaces Section o Builder ssic closes teccsccdedicdcesdecsccsccesacadtatiadessadnadarsavcecavcvacvecest
16. 12_MHz SysClk 2 32K_Select Internal PLL_Mode Disable Sleep_Timer 512_Hz VC1 SysClk N 16 YC2 VC1 N 16 YC3 Source C2 YC3 Divider 256 SysClk Source Internal 24_ MHz SysClk 2 Disable No Analog Power SC On Ref Low Ref Mux Vdd 2 Vidd 2 AGndBypass Disable Op Amp Bias Low A_Buff_Power Low SwitchModePump OFF Trip Voltage LYD SMP 4 81V 5 00 LYDT hrottleB ack Disable Power Setting 5 0 7 24MHz Watchdog Enable Disable Figure 50 Global Resources Following is a brief explanation of each parameter Power Setting Vcc SysClock Freq This parameter allows the user to select the SysClock frequency and nominal operating voltage Based on the SysClock selected the Internal Main Oscilla tor IMO is set with appropriate calibration settings Since many internal clocks are derived from the SysClock significant device power consumption savings can be attained by lowering the SysClock frequency if the imple mented design permits it December 15 2004 Document No 38 12002 Rev E 77 PSoC Designer Integrated Development Environment User Guide 78 CPU_Clock The CPU_Clock selection allows user to choose predefined instruction clock speeds from 93 75 kHz to 24 MHz The CPU clock is derived directly from a the SysClock Stability can be improved by using an external 32 kHz oscillator and the PLL Ext_Lock A discussion of the main oscillator is contained in chap ter 8 of the PSoC Technical Reference Manual TR
17. 38 12002 Rev E 89 PSoC Designer Integrated Development Environment User Guide 2 Click on the Row_x_LogicTable_Select_x logical operation box in the Digi tal Interconnect Row Output floating window and select an option from the menu Digital Interconnect Row_0O_Output_3 xi 90 RIO 3 ROO 3 1 j 3 ROO O p Figure 54 Logical Operations in Digital Interconnect Row Output 3 Click the Close button when finished You will see connections on the device interface reflecting your A or B input selection with associated sym bol Connection to Global Output To set Connections to Global Output execute the following 1 Click on the target Row_x_Output_x Logic Table Box Document No 38 12002 Rev E December 15 2004 2 Click on the target Row_x_Output_x_Drive_x triangle in the Digital Inter connect Row Output floating window and select an option from the menu Digital Interconnect Row_0_Output_0 x RIO O Raw_O Output_O_Drive_1 ey gt Off para pl l ROO 1 ice Close Figure 55 Digital Interconnect Row Global Output 3 Click the Close button when finished You will see a connection from the Row_x_Output_x Logic Table Box to the chosen GlobalOutEven_x vertical line Once you open the Digital Interconnect Row Output Window you can select Row Logic Table Input Row Logic Table Select and Conn
18. Bes 29 Figure 20 Output Stats WINGOW srai ememr tiranina 30 Figure 21 Project Settings Compiler Talo 0 0 0 eeeeseeceeeeeersereeneeneneaeees 31 Figure 22 Project Settings Device Editor Taboo eee eeseeeeseeeseeesereretsneres 36 Figure 23 Project Settings Linker Tab ccccceeeseeeeeeeeeeeeeeeeeeeeeeeeteneeees 37 Figure 24 Project Settings Debugger Tab ccccececceeeeeeeeeeeseteeeeeeeeees 41 Figure 25 Options Dialog BOX s sies a ES 43 Figure 262 Stant Dialog BOX grii giiir RANA 47 Fig ure 27 New Project Dialog BOX nice nteimire inona 48 Figure 28 New Configuration Dialog BOX irisccccrecee droeon 49 Figure 295 Parts Catalog Dialog BOX sionister nra ie e i eaea 50 Figure 30 Existing Configuration Dialog BOX ccsscceeeeeeeeeeteeeeteeteeete 52 Figure 31 Design Based Configuration Dialog BOX s es 54 Figure 32 Design Import Status s s srar eree ia 54 Figure 33 Zoom Pan Pop up WINGOW carers iion 58 Fig re S45 Interconnect VEW asic uz ceases ioina a aie 59 Figure 35 Device Interface VieW s serienningepeiaia aat 60 Figure 36 Device Interface Pan Zoom Toolbar ccsseceeeseeeeeeseeeeeeeeees 60 Figure 37 User Module Selection View in Toolbar cceesceeeeeeeeeeeees 62 Figure 88 User Mod l ODtlONS gigis aap an raea 63 December 15 2004 Document No 38 12002 Rev E vii PSoC Designer Integrated Development Environment User Guide viii Figure 39 Figure 40 Figur
19. CY8C21223 CY8C21323 PSoC Mixed Signal Array Data Sheet Together these documents comprise the PSoC Designer documentation suite December 15 2004 Document No 38 12002 Rev E 5 PSoC Designer Integrated Development Environment User Guide 1 2 1 3 1 4 Support Free support for PSoC Designer is available online at http www cypress com Resources include Training Seminars Discussion Forums Application Notes PSoC Consultants TightLink Technical Support Email Knowledge Base and Application Support Technicians Section Overview Introduction Installation Using the IDE Creating a Project Device Editor Dynamic Re configuration Application Editor Assembler Builder Debugger Flash Program Memory Protection Product Upgrades Describes the purpose of this guide overviews each section and gives product upgrade and support information Lists system hardware and software requirements runs through the installation procedure and explains how to update existing projects Discusses the functional format of the system interface Describes how to create a project Details how to select and place User Modules implement interconnectivity specify pin out track device space and generate application files Details how to add multiple configurations to a single PSoC Project Describes all source editing options Details assembly language source and compiling assem bling project files Describ
20. Code Compressor Resume ADD SP 0 See PSoC Designer Assembly Language User Guide for descriptions and sample listings of supported assembler directives Instruction Set All instructions are 1 2 or 3 bytes wide and fetched from program memory in a separate address space from data memory The first byte of an instruction is an 8 bit constant referred to as the Opcode Depending on the instruction there can be one or two succeeding bytes that encode address or operand information The following notation is used for the instructions Table 13 Instruction Set Notation Notation Description A Primary Accumulator CF Carry Flag expr Expression E Flags ZF CF and Others k Operand 1 Value ky First Operand of 2 Operands ko Second Operand of 2 Operands PC PCH PCL SP Stack Pointer X X Register ZF Zero Flag To access a complete instruction in detail within PSoC Designer click your cursor on the target instruction in the file and hit F1 December 15 2004 Document No 38 12002 Rev E 141 PSoC Designer Integrated Development Environment User Guide 8 7 142 See PSoC Designer Assembly Language User Guide for the complete instruction set Compiling Assembling Files Once you have finished programming all assembly language source in addi tion to any c source you are ready to compile assemble the group of files Compiling translates source code into object code The Linker then combines modules and gives real
21. Design To export a design perform the following steps this assumes you have PSoC Designer Device Editor and your target project open 1 From the menu click Config gt gt Export Design December 15 2004 Document No 38 12002 Rev E 113 PSoC Designer Integrated Development Environment User Guide x Design name Test Desan Location ESTestDeisn O oOo Description This is atest deson Documentation file P Browse List of included configurations List of included files Example_Dynamic_PwM Second_PWM Add Add Version OK Cancel Figure 63 Export Design Dialog Box 2 Inthe Design name field of the Export Design dialog box type a name In the Location field below a cfg file with your chosen name will be created and added to the current project directory 3 In the Description field type a description of the design configuration 4 Inthe Documentation file field click Browse to identify an informational design related file This field is not required 114 Document No 38 12002 Rev E December 15 2004 6 2 2 5 Inthe List of included configurations field click Add select configurations and click OK Click a check in the Select all configurations field if you wish to export the entire project i e selecting all configurations in the project You can also select all configurations by holding the Shift key and dragging your mouse down or you can select randomly
22. Fleet Fil Figure 59 Output Status During Application Generation 5 8 1 Source Files Generated by Generate Application Files Table 7 Source Files Generated by Generate Application Name Overwritten Description lib PSoCConfig asm Yes Configuration loaded upon system access 1ib PSoCCOnfigTBL asm Yes Contains chip configuration Boot asm Yes Boot code and initial Interrupt Table lib lt User module name gt asm Yes User Module API source lib lt User module name gt h Yes User Module API C include lib lt User module name gt inc Yes User Module API assembly include 1ib lt User module Yes User Module interrupt asm file if name gt INT asm needed lib lt Project name gt API h Yes Project API include lib lt Project Yes Project parameters include file Name gt GlobalParameters inc main asm No Main code 1 User code markers can be used to preserve sections in the file If you undo placement of a User Module but leave it in your selected collec tion and generate application files associated asm files will remain just not be updated If you undo placement and delete a User Module from your col lection then generate application files all associated asm files will be deleted removed from source tree project files December 15 2004 Document No 38 12002 Rev E 103 PSoC Designer Integrated Development Environment User Guide 5 8 2 APIs and ISRs APIs Application Programming Interfaces and ISR
23. Internal ka gt F LL_Mode Disable AMUX4_1 DACE_1 PWMDB1E_1 E ileep_Timer 512_Hz C1 SysClk N 16 C2 VC1 N 16 C3 Source SysClk 1 C3 Divider 1 POT 28 VDO 2 PAS 27 POs 3 POR 25 POf4 Jser Module Parameters 4Pqq 25 P2 nalog Column Mux AlnMux DPA 24 Popa 6 PIB 23 P25 7P25 cygc27443 ppip F ePa1 21 P22 95M 20 F210 10 PITT 19 XRES 1 PIs 18 P15 2ra 17 Paja Port Select 3 PIL 16 P42 ortO_O POLO StdCPU i z baian 15 Paol ot 01 PON StdCPU pam t 02 POL GlobalinEv J dee oF om ra ortO_3 POLS StdCPU rort_O_4 POH StdCPU S J mel E M t05 POLS StdCPU i j j orO_6 POLE StdCPU E a orO_ POR StdCPU Figure 34 Interconnect View December 15 2004 Document No 38 12002 Rev E 59 PSoC Designer Integrated Development Environment User Guide Figure 35 Device Interface View As you slowly move your mouse around the device interface the tooltips will guide you as will the Legend Use the Pan Zoom toolbar to click and navigate your way around AAA po rll Figure 36 Device Interface Pan Zoom Toolbar 60 Document No 38 12002 Rev E December 15 2004 Click the Hand icon to pan Click the Plus or Minus icons to zoom in or out Use the drop arrow to specify a size and the Home icon to return to your origi nal view Note that you
24. It contains exports and func tions that test whether a configuration is loaded or not The naming convention for these functions is IsOverlayNameLoaded The PSoCDynamicINT asm file is generated only when the User Module placement between configurations results in both configurations using a com mon interrupt vector The reference to Dispatch_INTERRUPT_n function is resolved in this file For each conflicting interrupt vector one of these ISR dis patch sets is generated The ISR dispatch has a code section that tests the configuration that is active and loads the appropriate table offset into a jump table immediately following the code The length of the jump table and the number of tests depends on the number of User Modules that need the com mon vector rather than the total number of configurations The number of con flicts can equal the number of configurations if each configuration utilizes the common interrupt vector Generally there will be fewer interrupt conflicts on a per vector basis Application Editor and Dynamic Re configuration There are no direct changes in Application Editor with regards to Dynamic Re configuration The additional files generated are placed in the Library Source and Library Headers folders of the source tree Library source files that are associated with an additional configuration are shown under a folder with the name of the configuration This partitions the files so that the source tree view is not excess
25. Port_2_4 P2 4 or 2 Select Port_2_4 from the menu and 3 Select ExternalGND from the second menu On the device you will see the designation color coded according to the legend along side the device The port name and ExternalGND will appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection In the device interface you will see that all lines from Port_2_4 have disap peared Ext Ref To set the Ext Ref connection execute the following 1 Click on Port_2_6 P2 6 or Document No 38 12002 Rev E December 15 2004 2 Select Port_2_6 from the menu and 3 Select Ext Ref from the second menu On the device you will see the designation color coded according to the legend along side the device The port name and Ext Ref will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection In the device interface you will see that all lines from Port_2_6 have disap peared 12C SDA To set the 12C SDA connection execute the following this connection is only available for CY8C27xxx parts 1 Click on Port_1_5 P1 5 or 2 Select Port_1_5 from the menu and 3 Select 12C SDA from the second menu On the device you will see the designation color coded according to the legend along side the device The port name I2C SDA and the drive mode of Open Drain High will a
26. Re configuration allows for applications to dynamically load and unload configurations With this feature your single PSoC MCU can have multiple functions PSoC family of devices consists of several device groups CY8C21xxx CY8C22xxx CY8C24xxx CY8C25xxx CY8C26xxx CY8C27xxx CY8C29xxx In Circuit Emulator 4000 that allows users to test the project in a hardware environment Pod while viewing and debugging device activity in a software environment PSoC Designer In Circuit Emulator that replaces the ICE 4000 and USB Adapter for seamless USB connection debugging and programming Integrated Development Environment for PSoC Designer Interrupt Service Routine ISR shells for source programming are created during application code generation in Device Editor Linking your project in PSoC Designer links all programmed func tionality of the source files with absolute addressing and loads it into a rom file which is the file you download for debugging and programming Enhanced 8 bit microprocessor core CY8C2xxxx family of devices that supports 8 bit operations and is optimized to be small and fast Acronym for microcontroller unit Developmental programmer that provides a low cost solution for learning about programming and evaluating the PSoC Part of the ICE that emulates functionality in which debugging occurs Programmable System on Chip Evaluation board that provides a low cost solution for learning about
27. about these files The following definitions of critical system files should further your system knowledge and better prepare you for carrying out your vision for the MCU boot asm This startup file resides in the source tree under Source Files and is key because it defines the boot sequence Device Editor uses a template boot tpl from the software installation Templates directory to create boot asm Changes made to boot asm will get overwritten when the code gets regenerated application generation 4 Following are components of the boot sequence Originates reset vector for code that begins after the device is powered up December 15 2004 Document No 38 12002 Rev E 127 PSoC Designer Integrated Development Environment User Guide 128 Holds interrupt table for code that is executed when an interrupt occurs Device configuration initialization will always occur because boot asm is generated with a call to the configuration load function before the jump to main In the case of Dynamic Re configuration the base configuration is automatically loaded while other configurations must be loaded by the embedded developer Calls device configuration initialization to enforce quick device configu ration after reset Creates a proper C environment because C code requires certain types of initializations The C initialization code will occur even if the application is built using only assembly code
28. as D When you want to add Macro defines using PSoC Designer they do not need to enter the switch because it PSoC Designer knows the information in the Macro define field of the Project Settings dialog box are macro defines The Macro defines can have the following syntax D lt name gt value lt name gt is required value is optional Because we do not need the D in the Macro define field of the Project Settings dialog box we could use the following examples FOO FOO 12 FOO BAZ Spaces can be used before and after the equal sign Strings in Macros It is typical for the pre processor to strip quotations marks in a macro definition For example Document No 38 12002 Rev E December 15 2004 FOO CLUB won t work like define FOO CLUB You can use a string macro with the help of some source file additions For example you enter a macro definition as FOO CLUB Your source file should contain a definition to add the quote marks In this case in your C file you would enter define CLUB CLUB You can still get the benefits of the macro definition by using the macro name For example cstrcpy sSomeArray FOO Copy the string CLUB to an array Therefore you can have a set of strings that the macro definition can use Continuing with the above example you can have the following string defi nitions in your C source file define CLUB CLUB defi
29. be used as an input to a digital PSoC block and then used to derive a clock that can be used in many more places For this reason it is important to evaluate clocking options as a PSoC design is being developed Often solutions to clocking problems can be obtained by rearranging clock sources according to where they are most easily connected A complete dis cussion of system clocking can be found in chapter 24 of the PSoC Technical Reference Manual TRM SysClock_Source and SysClock 2 Disable These parameters allow the 24 MHz system SysClock to be selected from an internal or external source The SysClock 2 Disable parameter allows the Document No 38 12002 Rev E December 15 2004 internal 48 MHz clock to be shut off A complete discussion of system clocking can be found in chapter 24 of the PSoC Technical Reference Manual TRM Analog Power This parameter controls the power to the analog section of the PSoC Power is controlled in three stages 1 All Analog Blocks Off 2 Continuous Time Blocks ON Switched Capacitor Blocks OFF and 3 Continuous Time Blocks ON Switched Capacitor Blocks ON For each of the two ON cases reference drive levels of high medium and low can be selected to choose the current drive capability for the internal reference buffers All selections of this parame ter whether used as a User Module Parameter or this global resource should agree This selection will affect the total power consumption of th
30. begin ning at address 0 The linking building process will resolve the final addresses This file also provides a listing of errors and warnings and a refer ence table of labels Also generated during a build in addition to the Ist are rom mp dbg and hex files The hex is used for debugging and programming The mp con tains global symbol addresses and other attributes of output And the dbg and hex files are good troubleshooting resources lst files can be viewed after a project build in the Debugger subsystem under the Output tab of the source tree see Source Tree Assembler Directives The PSoC Designer Assembler allows the assembler directives listed below Table 12 Assembler Directives Symbol Assembler Directive AREA Area ASCIZ NULL Terminated ASCII String BLK RAM Byte Block BLKW RAM Word Block DB Define Byte DS Define ASCII String DSU Define UNICODE String DW Define Word DWL Define Word with Little Endian Ordering ELSE Alternative Result of IF ELSE ENDIF ENDIF End of IF ELSE ENDIF EQU Equate Label to Valuable Value EXPORT Export Document No 38 12002 Rev E December 15 2004 8 6 Table 12 Assembler Directives continued IF Conditional Assembly INCLUDE Include Source File LITERAL Prevent Code Compression of Data ENDLITERAL MACRO ENDM Macro Definition Start End ORG Area Origin SECTION Section for Dead Code Elimination ENDSECTION Suspend OR F 0 Suspend and Resume
31. can pan either frame of the Interconnect View Interconnect View the device interface and the pin out Following is a description of additional options available to navigate the device interface Table 6 Feature Pan with Mouse Pan with Arrow Keys Zoom In with Mouse Zoom Out with Mouse Zoom a Region Preserve Aspect Ratio Show Allowed Con nections Show Tool Tips Print Zoom In December 15 2004 Navigating Device Interface Action Hold down Alt and click and drag your mouse to pan the interface Enable Scroll Lock and you can pan the interface with the arrow keys Hold down Ctrl and click your mouse to zoom in at the specified location Hold down Cirl Shift and click your mouse to zoom out Hold down Ctrl and click and drag your mouse over a region to zoom into Right click your mouse in the interface and select Preserve Aspect Ratio from the menu Right click your mouse in the interface and select Show Allowed Connec tions from the menu Right click your mouse in the interface and select Show Tool Tips from the menu Right click your mouse in the interface and select Print from the menu Right click your mouse in the interface and select Zoom In from the menu Description Panning moves the focal point of the view up down right or left Panning moves the focal point of the view up down right or left Zooming in enlarges the v
32. conventions used throughout the PSoC Designer suite of product documentation Table 1 Documentation Conventions Convention Usage Courier Size 12 Displays source code gt cmasm testfile t 4 CMASM Version 2 20 For C series Microcontrollers I 2000 Cypress MicroSystems Inc Complete gt Courier Size 12 Displays file locations s ecl iee Italics Displays file names sourcefile hex bracketed bold Displays keyboard commands Enter or Ctrl C File gt gt Open Displays menu paths Edit gt gt Cut 2 Document No 38 12002 Rev E December 15 2004 Notation Standards Following are notation standards used throughout the PSoC Designer suite of product documentation Table 2 Notation A Table 3 Symbol AREA ASCIZ BLK BLKW DB DS DSU DW DWL ELSE December 15 2004 Internal Registers Description Primary Accumulator Carry Flag Expression Flags ZF CF and Others Operand 1 Value First Operand of 2 Operands Second Operand of 2 Operands Operand 2 Value PCH PCL Stack Pointer X Register Zero Flag Assembler Directives Assembler Directive Area NULL Terminated ASCII String RAM Byte Block RAM Word Block Define Byte Define ASCII String Define UNICODE String Define Word Define Word with Little Endian Ordering Alternative Result of IF ELSE ENDIF Document No 38 12002 Rev E 3 PSoC Designer Integrated Development Environment User Guide Table 3 Assembler
33. data flow optimization IV Enable paging Stack page Page7 Stack page offset 40 Code compression technologies MV Condensation duplicate code M Sublimation unused User Module s API elimination Figure 21 Project Settings Compiler Tab December 15 2004 Document No 38 12002 Rev E 31 PSoC Designer Integrated Development Environment User Guide 32 1 Select C compiler Currently PSoC Designer offers one C compiler In the future look for multiple compilers Click the drop arrow and select iMAGEcraft Note that this selection currently is the default and need not be made on a per project basis Macro defines Macro defines are a pre processor action things entered for macro defines are expanded in the source file For example we could enter DEE2 0x12 in the Macro define field of the Project Settings dialog box Let s say that we have a C source file with the following instructions if nTotal gt 1000 When this source file is compiled the code that would assign a number to nTransformBase would use the value of DEE2 e g 0x12 The benefit is that the source file does not have to change if a different constant is needed only the macro define value would change nTransformBase DEE2 Legal Defines The compiler s pre processor expects a macro defined by using a compiler switch This switch is defined in the PSoC Designer C Language Compiler User Guide
34. following entries are logged before the instruction is executed PC Register A Register Data Bus External Signals Breakpoints This feature of PSoC Designer allows you to stop program execution at prede termined address locations When a break is encountered the program is halted at the address of the break without executing the address s code Once halted the program can be restarted using the available menu icon options To set breakpoints first open the file you wish to debug Do this from the source tree If your project file source tree is currently not showing click View gt gt Project Breakpoints are selected and deselected by clicking your mouse at targeted points in the left margin of the open file You can view and remove active breakpoints in the Breakpoints dialog box accessed through Debug gt gt Breakpoints x Active breakpoints boot asm 224 psoccontig asm 60 boot asm 346 pwm16_1 asm 102 boot asm 65 pwm16_1 asm 103 main asm 115 pwm16_1 asm 156 main asm 117 pwm16_4intasm 48 main asm 118 main asm 132 psoccontig asm 56 Remove RemoveAll Figure 72 Debug Breakpoints You can view the exact line and column for each breakpoint or wherever you click your cursor in the file across the bottom of PSoC Designer Document No 38 12002 Rev E December 15 2004 10 4 3 10 4 4 To set a bookmark in a source file for your own personal reference in Appli cation Editor or Debugger cl
35. interrupt vector number depends on which PSoC block is assigned to the Timer8 instance vector 2 for PSoC digital block 0 vector 3 for block 1 etc During the device configuration process the ISR name is added to the appro priate interrupt vector number The interrupt handler is included in a file that is named instance_nameint asm where instance_name is the name given to the User Module For example if the User Module is named Timer8_1 then the ISR source file is named Timer8_1 INT asm All API files generated during the device configuration process follow this naming convention Following are the API files that would be generated for a User Module named Timer8_1 Timer8_1 inc Timer8_1 h Document No 38 12002 Rev E December 15 2004 Timer8_1 asm Timer8_1INT asm The boot asm file is based on a file named boot tpl You can make changes to boot tpl and those changes will be reflected in boot asm whenever the applica tion is generated Do not change any strings with the form INTERRUPT_nn where nn 0 to 15 These substitution strings are used when device configuration application files are generated However you can replace substitution strings if you safely define the interrupt vector and install your own handler If you install an interrupt handler and make changes directly to boot asm the changes will not be preserved if application generation is executed after the changes are made If you make changes to
36. on a single workstation Each PSoC USB ICE or Adapter contains an electronic serial number which is displayed in December 15 2004 Document No 38 12002 Rev E 41 PSoC Designer Integrated Development Environment User Guide 42 the list when the PSoC USB ICE port is connected via USB The USB port is removed from the drop down when the port is disconnected from USB Utiliz ing the dynamic nature of this drop down can help determine what PSoC USB port is connected since there are no external markings on the USB ICE or ICE Adapter The Friendly name field can contain any combination of characters and is used to associate a user friendly name with a specific port Port selection is saved on a per project basis The friendly name associated with a specific port is a global setting that does not change from project to project You will have to change the default port LPT1 if the ICE is in conflict with a printer or another port dependent device or if you have installed a PCI PCMCIA dedicated port card By default if the emulation pod is in an unpowered target system the Cypress MicroSystems In Circuit Emulator ICE 4000 will attempt to power the pod during a connect operation The ICE supplies 5 V to the pod which can dam age some 3 3 V systems To prevent the ICE from supplying an over voltage to an inadvertently unpowered 3 3 V system click Pod uses external power only Power supply can be specified at 5V or 3 3V if yo
37. open files and active windows refer back to Using the IDE Following is a description of the menu options available for modifying source files Table 9 Menu Options for Modifying Source Files Icon Option Menu Shortcut Feature j Application Editor View gt gt Applica Enables source tree and tion Editor files for editing Fs Compile Assemble Build gt gt Compile Ctrl F7 Compiles assembles Assemble the most prominent open active file c or asm 3 Build Build gt gt Build F7 Builds entire project and links applicable files E Execute Program Switches into Debug ging subsystem con nects downloads hex runs all from one click DO New File File gt gt New Ctrl N Adds a new file to the project a Open File File gt gt Open Ctrl O Opens an existing file in the project Indent Indents specified text Outdent Outdents specified text Comment Comments selected text December 15 2004 Document No 38 12002 Rev E 131 PSoC Designer Integrated Development Environment User Guide 7 4 132 Table 9 Menu Options for Modifying Source Files continued 2 Uncomment Uncomments selected text Toggle Bookmark Toggles the bookmark Sets removes user defined bookmarks used to navigate source files Clear Bookmark Clears all user defined bookmarks A Next Bookmark Goes to next bookmark a Previous Bookmark Goes to previous book mark g Find Text Edit gt gt Find Ctrl F Find s
38. output port Selection of Clock Input for a Digital Block Note that the name Clock Input is determined by a specified User Module parameter To set clock input connections on a digital block execute the following 1 Click the clock input triangle on the digital block where your target User Module has been placed The clock input triangle is not active for all blocks when a User Module uses more than one block 2 Select an option from the menu You will see your chosen input option displayed next to the clock input triangle Your choice option will also appear in the Control Clock field under User Mod ule Parameters where you can click the drop arrow to change your selection Selection of Enable Input for a Digital Block Note that the name Enable Input is determined by a specified User Module parameter To set the Enable Input connection on a digital block execute the following 1 Click the Enable text label on the digital block where your target User Mod ule has been placed 2 Select an option from the menu You will see your chosen input option displayed next to the Enable text label Your choice option will also appear in the Enable field under User Module Parameters where you can click the drop arrow to change your selection Selection of Output for a Digital Block Note that the name Output is determined by a specified User Module parameter To set output connections on a digital block
39. programming and evaluating the PSoC Analog and digital peripheral blocks of a device that are custom ized by the placement and configuration of User Modules Integrated Development Environment for Cypress MicroSystems Programmable System on Chip technology New multi functional programming software accessible from within PSoC Designer Document No 38 12002 Rev E December 15 2004 Appendix B Glossary Table 18 Terminology continued Source Tree Project file system displayed by default in left frame of Application Editor Subsystem PSoC Designer has three subsystems Device Editor Application Editor and Debugger USB Adapter Port connection to work the ICE in PSoC Designer v 4 1 or later User Module Accessible pre configured function that once placed and pro grammed will work as a peripheral in the target device December 15 2004 Document No 38 12002 Rev E 183 PSoC Designer Integrated Development Environment User Guide 184 Document No 38 12002 Rev E December 15 2004 Symbols Make Utility 30 142 A APls and ISRs 104 Application Editor 127 Adding Files 132 Additional Generated Files 129 File Definitions and Recommendations 127 flashsecurity txt 174 Full Application File Search 134 Modifying Files 131 Removing Files 134 Standard grep 134 Assembler 137 Clean Compile Assemble Build 142 Accessing 137 Address Spaces 138 Addressing Modes 138 Assembler Directives 140 Compiling Assembling Fil
40. run before the Config tab display is valid Active Configuration IO Register Labels The Debugger IO register bank labels Bank 0 Bank 1 are updated to match the User Modules defined in the currently active configurations Active Configuration Limitations The new displays are based on a bitmap of loaded configurations maintained by the LoadConfig and UnloadConfig routines which are generated by the Device Editor This bitmap can get out of sync with the actual device con figuration in several ways The bitmap s RAM area can be accidentally overwritten f overlapping conflicting configurations are loaded at the same time the register labels will be scrambled f an overlapping configuration is loaded and then unloaded register labels from the original configuration will be used even though some PSoC blocks will have been cleared by the last Un loadConfig rou tine Document No 38 12002 Rev E December 15 2004 6 8 4 Active Configuration Display Test The new display features can be tested with a single project that loads and unloads configurations containing overlapping User Modules The test project should have a base configuration that defines one or more User Modules and several overlay configurations some conflicting and some not conflicting The main line of the project should load and unload configura tions in various combinations After each load and unload the status of the active configuratio
41. solutions is compatible with PCl bus December 15 2004 Document No 38 12002 Rev E 179 PSoC Designer Integrated Development Environment User Guide based PCs and the second uses the PCMCIA port available on many portable computers Table 17 Parallel Port Options PC Type Port Parallel Port Option Desktop PCI SIIG Inc Cyberparallel PCI Model 101839 Part JJ P00112 http www siig com Portable PCMCIA Quatech SPP 100 Enhanced Parallel Port Type II PCMCIA Card http www quatech com Follow the manufacturer instructions to install and configure the parallel port to EPP mode Both of these cards include drivers that support Windows 98 98SE NT Me XP and 2000 PSoC Designer version 2 16 or later is required to make use of a second par allel port If the parallel port card is installed as LPT2 it must be designated from within PSoC Designer To select an alternate parallel port perform the fol lowing Click Tools gt gt Options 2 Inside the Options dialog box select the Debugger tab 3 Use the drop down menu labeled ICE board debug port connected to to select the correct port In most cases the default onboard parallel port will be LPT1 and the additional port that you just installed will be LPT2 Select the appropriate port most likely LPT2 4 After the correct port is selected press OK and try to connect the ICE in using the Connect icon If the ICE still d
42. steps 1 Access Tools gt gt Options gt gt Compiler tab 2 Select iMAGEcraft under Available compilers 3 Enter your key code You have this key code if you purchased the C Language Compiler License when you received PSoC Designer by download mail or through a distrib utor 4 Scroll to read the License Agreement then click a check to accept the License Agreement and hit OK To view the version details for the iMAGEcraft Compiler click Version When finished click the x in the upper right to close To remove an expired license and enter a new key code uncheck the Accept box You will be asked to confirm the removal Click Yes then enter the new code If for some reason you have not received a key code or are uncertain of how to proceed contact the Cypress MicroSystems Application Hotline at 425 787 4814 Debugger Under Tools gt gt Options gt gt Debugger tab you can specify trace log options To specify trace log options click a check in either PC Only PC Registers or PC Timestamp PC Only mode lists the PC value and instruction only PC Registers mode lists the PC instruction data A register X register SP register F register and ICE Document No 38 12002 Rev E December 15 2004 3 7 4 external input PC Timestamp mode lists the PC instruction A register ICE external input and timestamp These log options can also be specified at Debug gt gt Trace Mode In this
43. tab of the configuration you wish to delete and select Delete 2 Once you have selected to delete the configuration you will be asked to confirm Click Yes If you wish to cancel delete click No Once you delete a configuration the associated source files will be removed from the project if application files had been generated Rename Configuration To rename a loadable configuration in your PSoC project execute the follow ing steps This assumes you have PSoC Designer Device Editor and the project in which you want to rename a loadable configuration open 1 From the menu click Config gt gt Loadable Configuration gt gt Rename or double click the target configuration tab 2 Inside the configuration tab type the new name 3 Hit Enter or click your cursor somewhere outside the tab Global Parameters and Dynamic Re configuration When employing Dynamic Re configuration global parameters are set in the same manner as single configurations However changes to base configura tion global parameters are propagated to all additional configurations There fore global parameter changes made to an additional configuration are to be done locally to that particular configuration The code generation Application Generation icon considers global parameter changes made to different con figurations but these changes should be made cautiously to prevent unex pected results Pin Settings and Dynamic Re configuratio
44. tab you can also specify to Use default ICE connection for all projects With the addition of a USB connection to the ICE it could be quite possible that multiple USB and or parallel port LPT ICE connections could be used from a single developer workstation There is another potential inconvenience if projects are shared between different workstations since the ICE port setting in the project may not be consistent after the project is moved Enabling the Use default ICE connection for all ports setting will allow the developer who works with only one ICE to avoid resetting the ICE port setting in the project The project setting is not changed in the project database soc file so the project could be passed back to the original developer without an impact to their ICE port setting New in PSoC Designer v 4 2 you can specify to execute the Go command all the way through debug upon a click of the Execute the Program icon If you click the Execute the Program icon without specifying Go here in this dialog box the program will execute up until Go Execution takes the program automatically on through ICE connection hex download and into debug run It will execute for as long as it can without hit ting an error a break point or event break The Output Status window will display all steps and errors Device Editor If you download a new version of PSoC Designer you will most likely need to update existing projects cre
45. that make for ease of use Exposing subroutines that make User Module parameters easy to use involves PSoC Designer adding files to your project These files are known as Application Program Interfaces APIs Typically one of these User Module files added to your project is an interrupt handler December 15 2004 Document No 38 12002 Rev E 105 PSoC Designer Integrated Development Environment User Guide 5 8 4 106 Aside from adding API files to your project the Device Editor also inserts a call or jump to the User Module s interrupt handler in the startup source file boot asm Interrupt Vectors and the Device Editor Following is an example of how an interrupt handler is dispatched in the inter rupt vector table using a device from the CY8C27xxx part family Shown below is Timer32 User Module mapped to PSoC blocks 00 01 02 and 03 An interrupt is generated by the hardware when terminal count is reached The last PSoC Block or MSB byte of Timer32 generates the terminal count inter rupt TIMER32_ ISB1 TIMER32_ISB2 TIMER32_MSB Figure 61 Timer32 on Four Digital PSoC Blocks Upon device application generation aF code is produced for the Timer32_1 User Module The interrupt vector table is also altered with the addition of the call to the timer interrupt handler in boot asm org 0 Reset Interrupt Vector jmp _ start First instruction executed following Reset org 04h Supply Monitor Interrupt Vector
46. the Connect icon Upon successful connection you will receive notification in the Output tab of the status window and a green indicator displaying Connected will appear in the lower right corner of the subsystem If you are experiencing problems contact the Cypress MicroSystems Applica tions Engineering Hotline at 425 787 4814 Also consult PSoC Designer ICE 4000 Connection Troubleshooting User Guide If the information in the user guide is not sufficient to resolve issues please use the following resources Document No 38 12002 Rev E December 15 2004 10 3 TightLink Technical Support System You can enter a support request in this system with a guaranteed response time of four hours http www cypress com support mysupport cfm Support Forums View and participate in discussion threads about a wide variety of PSoC device topics http www cypress com forums Downloading to Pod Before you can begin a debug session you need to download your project hex file to the Pod By doing this you are loading the ROM addressing data into the emulation bondout device chip on the Pod To download the hex file to the Pod 1 Click the Download to Emulator Pod icon A general rule to follow before downloading is to make sure there is not a part in the programming socket of the Pod Otherwise debug sessions may fail The system downloads the project hex file located in the output folder of your project directo
47. the module icon and select User Module Selection Options One of the topology selections must be cho sen in order to place the I2CHW User Module 72 Document No 38 12002 Rev E December 15 2004 New in 4 2 you can press the Space Bar to rotate and see the placement options around the anchor block of a multi block User Module Click the User Module once it is selected then hover your cursor on the target block in the device interface Now press the Space Bar The block your cur sor is on becomes the anchor block and as you press the Space Bar the remaining required blocks rotate to the options that surround the anchor block For optimum placement you made need to switch anchor blocks as well as drag the set around the interface to view all options See the following illustrations with the DAC8 DACS_1 PwMs_1 Figure 46 DAC8 on ASC21 Anchor and ASD22 December 15 2004 Document No 38 12002 Rev E 73 PSoC Designer Integrated Development Environment User Guide Figure 47 DAC8 on ASD22 Anchor and ASC23 74 Document No 38 12002 Rev E December 15 2004 Selected User Modules ay asm_example_blink_led BPF2_1 DACE_1 PwM8_1 LSB p ASC21 8 Wo p nc ETA Seng STETA ea Y v Figure 48 DAC8 Being Dragged from ASD22 ASC23 to ASD13 ASC12 5 3 2 User Module Parameters Setting User Module Param
48. toggle the verbose mes sages in the build resulting from the make utility by clicking Tools gt gt Options gt gt Builder tab and checking or unchecking Use verbose build mes sages depending on your need For details about this utility see make pdf in Documentation Supporting Documents of the PSoC Designer installation directory In PSoC Designer version 4 0x or higher you will see Design Rule Checker results in the Output Status window Document No 38 12002 Rev E December 15 2004 3 6 Project Settings 3 6 1 Compiler In the Project Settings dialog box you can alter the PSoC Designer C Compiler features The compiler settings property page will show device specific set tings Figure 21 shows all of the compiler settings For example a project using a CY8C22xxx device would not show the Enable MAC option because that device does not have a hardware Multiply Accumulator Another example of device sensitive compiler settings would hide Enable paging and Stack page if the device did not support paged RAM To access the dialog box click Project gt gt Settings Compiler tab Anything added to the Project Settings Compiler tab dialog box is used when a C source file is compiled Project Settings Compiler Device Editor Linker Debugger Select C compiler IMAGECRAFT z Macro defines Macro undefines M Optimize math functions for speed V Enable MAC V Compiler
49. troubleshooting any problems with the ICE connec tion If the information in this user guide or the PSoC Designer ICE 4000 Trou December 15 2004 Document No 38 12002 Rev E 149 PSoC Designer Integrated Development Environment User Guide 10 2 4 10 2 5 150 bleshooting Guide is not sufficient to resolve any issues please use the following resources Technical Support Systems TightLink Technical Support System You can enter a support request in this system with a guaranteed response time of four hours http www cypress com support mysupport cfm Support Forums View and participate in discussion threads about a wide variety of PSoC device topics http www cypress com forums Connecting the Hardware Installing PSoC Designer on Windows NT 2000 XP requires the user to have local Administrator permission To physically connect your computer to the ICE and related hardware per form the following steps 1 Locate the USB or parallel interface cable ICE power adapter CAT5 Patch cable Pod and Pup 2 Plug the interface cable into the PC s LPT1 or USB port If you are using a parallel port and your PC s main connection to its printer is through LPT1 you may need to temporarily re route printing to an alternate port the network or a file This is done through Control Panel gt gt Printers 3 Plug the other end of the interface cable into the ICE 4 Plug the power adapter into the ICE and AC o
50. you can click hold drag and drop the Local Name win dow anywhere inside the Debugger subsystem This is also true of the Watch Global Name window You will not see data in the Local Name window under the following conditions Not connected to the ICE Connected to the ICE but have not downloaded the hex Connected to the ICE and have downloaded the hex but the program is sitting at the reset vector Once you have a program with Local Variables and you have halted in a func tion in which they are contained you will see all variable names in the Local Name window Following a program download the default radix is set to Hexadecimal for all watch variable values other than Float Right click inside the Local Name win dow to display the option Toggle Display Radix Click to toggle the values in the appropriate radix HEX or Decimal You can cut copy paste and delete values not names by doubling clicking to highlight then righting clicking to choose an option The default action for using the Delete option is to set the value to zero including Floating point types You cannot change Local Variable names December 15 2004 Document No 38 12002 Rev E 159 PSoC Designer Integrated Development Environment User Guide 10 4 6 160 You can adjust the column width of the Local Name window by dragging the heading row column dividers The Local Variables will not be alive when the program has
51. 00 In summary Dynamic Event Points provide you the ability to Define complex breakpoints December 15 2004 Document No 38 12002 Rev E 161 PSoC Designer Integrated Development Environment User Guide Characterize multiple test cases to be monitored and logically sequenced Perform any of the following actions break turn the trace on turn the trace off or set an external trigger using the ICE 4000 10 4 8 Configuring Events Use the Events icon to enable or disable event settings anytime during a debug session To configure events execute the following procedure 1 Access the Debugger Events dialog box at Debug gt gt Events 2 Click your cursor in the first row labeled 0 of the dialog box 3 Below the rows click a check to enable 8 bit Thread and or 16 bit Thread Enabling both thread options brings the Combinatorial Operator field to life 4 Once you have enabled the chosen thread fill in the applicable thread fields i e Low Compare Input Select High Compare Input Mask as well as state logic fields i e Next State Match Count Match Count can be used to specify the number of times an event task will occur before it performs the selected action As you make your selection in the Input Select drop down you will see details in the grayed out scrollable box below 5 When finished click Apply The individual event is now configured and its information will appear at row 0
52. 12002 Rev E December 15 2004 Interrupt Mode Disableint The files that will be pre pended are psocgpioint h and psocgpioint inc 3 Configuration initialization type PSoC Designer initializes to a loop to save program space by default Click Direct write if you prefer to speed up execution time by writing directly to the register 3 6 3 Linker In the Project Settings dialog box you can enable options for the PSoC Designer Linker To access the dialog box click Project gt gt Settings Linker tab Compiler Device Editor Linker Debugger Selected C compiler IMAGECRAFT Relocatable code start address fi 50 Object library modules o Additional library path C Software Cypress MicroSystems PSoC Designer Cancel Figure 23 Project Settings Linker Tab 1 Selected C compiler Selected C compiler displays either the default C compiler or the C com piler you selected if you changed the default PSoC Designer currently offers one compiler iMAGEcraft December 15 2004 Document No 38 12002 Rev E 37 PSoC Designer Integrated Development Environment User Guide 38 2 Relocatable code start address The Relocatable code start address setting allows you to set the starting location for the text area The text area is the primary relocatable code space used by C The following diagram shows the default memory orga nization for a newly created PSoC Designer p
53. 2 1 Connecting to the ICE 4000 via Parallel Port The purpose of this section is to facilitate establishing a parallel port connec tion to the In Circuit Emulator ICE The PSoC ICE provides significant debugging functionality that requires full two way communication over the ICE to operate There are several steps in the connection process including both setting up the hardware and making the communications connection in the 148 Document No 38 12002 Rev E December 15 2004 10 2 2 10 2 3 software Making the parallel port connection on your computer may require changes in the BIOS settings Some recent laptops do not support EPP and Bi directional modes in the BIOS needed for full two way communication over the ICE A relatively easy method that bypasses the need for changing the BIOS settings is to install a parallel port card This has the added benefit of providing a dedicated port to the ICE without potential conflicts with other applications or printers a user may have on their computer Section 6 Alternate Parallel Port Cards in the PSoC Designer ICE 4000 Troubleshooting Guide details parallel port cards for both desktops and laptops that have been tested for compliance with the ICE Connecting to the ICE 4000 via USB Port PSoC Designer v 4 1 and later supports the USB Adapter The USB Adapter allows the standard parallel port ICE to connect to a USB 1 1 or 2 0 port The adapter has a parallel cable connector on one end
54. 2002 Rev E December 15 2004 6 6 2 does not change at all The LoadConfig_projectname function includes a line that sets the appropriate bit in the active configuration status variable The name of this variable is fixed for all projects Additional variables that shadow the write only registers are added when required Additional functions named LoadConfig_configurationname are generated with exports that load the respective configuration These functions are the equivalent of the LoadConfig_projectname function including the setting of the bit in the active configuration status variable The only difference is that LoadConfig_configurationname loads values from LoadConfigTBL_configurationname_Bankn and there is some additional code that manages the values of any global registers that are changed in the config uration relative to the base configuration For each LoadConfig_xxx function an UnloadConfig_xxx function is gener ated and exported to unload each configuration including the base configura tion The UnloadConfig_xxx_Bankn are similar to the LoadConfig_xxx functions except that they load an UnloadConfigTBL_xxx_Bankn and clear a bit in the active configuration status variable In these functions the global reg isters are restored to a state that depends on the currently active configuration With regard to the base configuration UnloadConfig_xxx and ReloadConfig_xxx functions are also generated These functions load a
55. 4 Exte ofa Figure 15 Device Editor Subsystem Selection View 26 Document No 38 12002 Rev E December 15 2004 To resize any of the windows just hover your mouse over the dividing line until your pointer becomes a two sided arrow then drag up or down left or right The amount of information and functionality in the Device Editor subsystem is quite extensive For further details see Device Editor If you are in the Application Editor subsystem you will see the project files source tree window the open source file editing window and the Output Sta tus window where error messages appear if there are code problems when files are compiled and built BOSH e S6l eB San auaafw Wer 2 AK4 4 ABBY RlO Bi P e D a gt 26 T ET g Re f Esample_ Pwo with De_ 7 ADCs z jaocnci b ee example_pwm_with_db_ SHG Source Files Select user modules boot asm Select a PWMDB16 module from the PUM categoi PH main asm iy a asian Place user modules i Library Source Global resources Library Headers vel 16 dividi E External Headers yC2 16 divide 4 flashsecurity txt PWUMDB16_1 Clock C2 7select Enable High enable Period 65535 7select PulseWidth 32768 7select InteruptType Terminal Count inter PUMOut put None PUM ne DeadTime 248 selecti Phasel Row 0 Output _O select Phase2 Row 0 Output _1 seleci DeadBandKill Row _O Input_1 s
56. AND X expr expr x 12 i3 amp x i2 The ordering of the operands within the instruction determines where the result of the instruction is stored Assembly File Syntax Assembly language instructions reside in source files with asm extensions in the source tree of Application Editor Each line of the source file may contain five keyword types of information The following table gives critical details about each keyword type Table 11 Keyword Types Keyword Type Critical Details Label A symbolic name followed by a colon Mnemonic An assembly language keyword Operands Follows the Mnemonic Expression Is usually addressing modes with labels and must be enclosed by paren theses Comment Can follow Operands or Expressions and start in any column if the first non space character is either a C style comment or semi colon December 15 2004 Document No 38 12002 Rev E 139 PSoC Designer Integrated Development Environment User Guide 8 4 8 5 140 Instructions in an assembly file have one operation on a single line For read ability separate each keyword type by tabbing once or twice approximately 5 10 white spaces See PSoC Designer Assembly Language User Guide for type definitions and an example of assembly file syntax List File Format When you build a project a listing file with an Ist extension is created The list ing shows how the assembly program is mapped into a section of code
57. C compiler expects to generate code with the last page of RAM holding the stack Document No 38 12002 Rev E December 15 2004 9 Stack page offset The Stack page offset allows you to move the starting address of the stack some distance into the stack page This allows more user variables to occupy lower stack page addresses 10 Code compression technologies Certain code compression technologies apply when either Condensation or Sublimation is selected The following applies if Condensation duplicate code is checked The Code Compressor replaces duplicate code blocks with a call to a single instance of the code It also optimizes long calls or jumps LCALL or LJMP to relative offset calls or jumps CALL or JMP Code compression occurs after linking the entire code image The Code Compressor uses the binary image of the program as its input for finding duplicate code blocks Therefore it works on source code written in C or assembly or both To enable click a check in the Condensation duplicate code field This must be done on a per project basis The following applies if Sublimation unused User Modules API elimi nation is checked This is an optimization feature of PSoC Designer If you check this field upon a build the system will go in and remove all dead code from the APIs in effort to free up space There are many conditions and rules for the Code Compressor Please revie
58. C programs Following is the list of additional files Psocgpioint inc Additional Information Psocgpioint h New File Globalparams h New File Globalparams h has the same contents as globalparams inc except it also has define statements Psocgpioint inc contains additional information pertaining to Write Only regis ter shadows If a pin group is defined in a register set for which register shad ows are allocated then a set of three macros are defined for each register shadow to read set or clear the particular bit within the register associated with the pin The names of the macros are keyed to the custom name assigned to the pin and are as follows December 15 2004 Document No 38 12002 Rev E 129 PSoC Designer Integrated Development Environment User Guide GetCustomName_registerName SetCustomName_registerName ClearCustomName_registerName where CustomName is the custom name set for the pin and registerName is the associated register name for which a register shadow is allocated The registerName registers vary with the chip device description and include all registers associated with the GPIO ports For the CY8C25xxx 26xxx device family these registers include Bypass DriveMode_0 DriveMode_1 IntCtrl_O intCtrl_1 IntEn For the CY8C27xxx and beyond device families registers include GlobalSelect DriveMode_0 DriveMode_1 DriveMode 2 IntCtrl_O IntCtrl_1 IntEn
59. CO or Row_1_ Broadcast BC1 horizontal line 2 Select an option from the menu You will see a line connecting to a digital PSoC block or to the other Row Broadcast depending on the option you chose Comparator Analog LUT Comparator Analog LUT connections only apply to CY8C27xxx parts and beyond 1 Click the AnalogLUT_x box Its symbol is identified in the Comparator x line along each column of analog PSoC blocks Document No 38 12002 Rev E December 15 2004 2 Select an option from the menu You will see connections on the device interface reflecting your A or B selec tion with associated symbol 5 4 1 Digital Interconnect Row Input Window Digital Interconnect Row Input Window connections only apply to CY8C27xxx parts and beyond Connection to Global Input To set a Connection to Global Input execute the following 1 Click on the white box or the line of the target Row_x_Input_x A tool tip will appear to identify your selection Digital Interconnect Row_0_Input_2 x RIO 2 Close Figure 51 Digital Interconnect Row Input 2 Click on the Row_x_Input_x Mux in the Digital Interconnect Row Input floating window and select a Global Input from the menu You will immedi ately see a connection from the mux to the Global Input vertical line The Digital Interconnect Row Input floating window provides further detail on the device to advance comprehension and bette
60. Ctrl Shift F5 B Step Into F11 7 Step Out Shift F11 T Step Over F10 168 Document No 38 12002 Rev E Feature Enables Debugger subsystem Connect PSoC Designer to ICE Download project hex file to hardware emulator Pod This file holds all device configurations and source code func tionality Launces PSoC Programmer software for programming parts with ROM data in the Flash memory Switches into Debugging subsystem connects downloads hex runs all from one click Start debugger Stop debugger Reset device to PC value of 0 and restart debugger Step into next statement Step out of current function Step over next statement December 15 2004 10 6 Table 14 Debugging Menu Options continued A Single Step Single step through lst files of projects using both C and assembly ve Activate Trace Ctrl F Activate MCU trace debugging feature J l Enable Disable Click drop arrow _ _ Enables or disables Event settings dur Events and check option ing debugging m Toggle Break Toggles the breakpoint Sets removes point user defined breakpoints for use in the Debugger subsystem 1 If C source lines are compiled into assembly code that branches the execution path such as 1call or call instructions the debugger will attempt to step into the source file of the desti nation address For library code such as multiplication and division a call to the library assemly code
61. December 15 2004 Document No 38 12002 Rev E 17 PSoC Designer Integrated Development Environment User Guide 2 5 Project Update If you download a new version of PSoC Designer you will most likely need to update existing projects created with an earlier version of PSoC Designer To update a PSoC project for compatibility execute the following steps 1 Open PSoC Designer 2 Access the project you believe needs to be updated At this point PSoC Designer will check if the project is compatible with the new version of PSoC Designer 3 If your project needs to be updated you will receive a message accord ingly Click Update or you can update later by selecting Update later Old Version x A Update project now Update C Update later using Project gt gt Update Project menu item The project opened was created in an old Status database version or project changes for this version of PSoC Designer are availiable Move existing Boot code template to backup Update Boot code template To ensure all new database and project features are enabled the project must be converted to the new format Figure 11 Database Version Detection 4 Once the update has occurred click Finish and your project will be com patible with the current version of PSoC Designer All custom Interrupt Service Routine calls such as a GPIO handler must be manually copied from the backup boot tp file t
62. Directives continued ENDIF End of IF ELSE ENDIF EQU Equate Label to Valuable Value EXPORT Export IF Conditional Assembly INCLUDE Include Source File LITERAL Prevent Code Compression of Data ENDLITERAL MACRO ENDM Macro Definition Start End ORG Area Origin SECTION Section for Dead Code Elimination ENDSECTION Suspend OR F 0 Suspend and Resume Code Compressor Resume ADD SP 0 4 Document No 38 12002 Rev E December 15 2004 Section 1 Introduction 1 1 Purpose The PSoC Designer Integrated Development Environment User Guide will guide you from start to finish on configuring source editing compiling build ing and debugging your customized system that runs from the PSoC device For details on compiling assembling and all things related see PSoC Designer PSoC Programmer User Guide PSoC Designer C Language Compiler User Guide PSoC Designer Assembly Language User Guide PSoC Designer ICE Connection and Troubleshooting Guide PSoC Designer USB Adapter Installation Guide Technical Reference Manual CY8C29466 CY8C29566 CY8C29666 CY8C29866 PSoC Mixed Sig nal Array Data Sheet CY8C27143 CY8C27243 CY8C27443 CY8C27543 CY8C27643 PSoC Mixed Signal Array Data Sheet CY8C24794 USB PSoC Mixed Signal Array Data Sheet CY8C24123A CY8C24223A CY8C24423A PSoC Mixed Signal Array Data Sheet CY8C21234 CY8C21334 CY8C21434 CY8C21534 CY8C21634 PSoC Mixed Signal Array Data Sheet CY8C21123
63. E is 5V Supply Only Global Bus with Signal Pulse Width lt 1 12 MHz Phase Consistency Between Output to Input of SCblocks PWM Counter Timer with Pulse Width gt Period Inappropriate Ground and Reference Level Selections This list is not comprehensive but merely a sample The PSoC Designer col lection of rules is being updated and added to on an ongoing basis 5 7 1 Running Design Rule Checker Execute the following to run DRC 1 Go to Tools gt gt Design Rule Checker 2 In a matter of seconds you can review the results of the rule evaluation in the Results tab of the Output Status window You can specify specifics regarding level of rule checking and result detail under Tools gt gt Options gt gt Design Rule Checker tab Note that DRC can be run at any time or any number of times during project development To designate it to run automatically each time you generate application files go to Tools gt gt Options gt gt Device Editor tab December 15 2004 Document No 38 12002 Rev E 101 PSoC Designer Integrated Development Environment User Guide 5 8 102 Generating Application Files Generating application files is the final step to configuring your target device When you generate application files PSoC Designer takes all device configu rations and updates existing assembly source and C compiler code and gen erates API and ISR shells Read ahead in this section for details regarding APIs and ISR
64. If you forget to apply your entries you will be prompted to save Click Yes or No 6 Click row 1 and repeat steps 3 5 to configure another event Repeat this process for each additional event You can configure up to 65 events To clear all events in the dialog box click Clear All To disable all events in the dialog box click Disable All 162 Document No 38 12002 Rev E December 15 2004 10 4 9 Click Close to exit the dialog box All entries will be saved The input mask for 8 bit threads is applied to the high and low range com parison values as well as to the input select value This is done to support range comparisons on sub sets of the bits in the input select value All comparisons take place within the bits specified by the input mask Other bits are ignored The range values are masked during event editing when the thread states are saved by the Apply button or by switching to a thread state For exam ple if the entered low compare value is 06 hex and the input mask value is 05 hex the low compare value after the mask is applied will be 04 hex The input select value is masked at run time For complete training on debugging and Dynamic Event Points try Tele Train ing Module 3 Getting Started Debugging Review and sign up under Support gt gt Tele Training at http Awww cypress com As you run events you can view messages regarding the status in the Debug tab of the Output Status window For inst
65. M 32K_Select The 32K_Select parameter allows selection of the internal 32 kHz oscillator or an external crystal oscillator A complete discussion of the implications of this selection are contained in chapter 10 of the PSoC Technical Reference Man ual TRM PLL_Mode Chapter 11 of the PSoC Technical Reference Manual TRM discusses use of the PLL_Mode Sleep_Timer The Sleep_Timer parameter selects the timing of the sleep interrupt if enabled When the sleep interrupt is enabled if the processor is placed in its sleep state it will be awakened at the rate specified with this parameter The Watchdog Reset if enabled will occur after three rollover events in the sleep timer if the Watchdog counter is not reset A complete discussion of the rela tion of these two elements is contained in chapter 12 of the PSoC Technical Reference Manual TRM VC1 and VC2 These resources are clocks that can be chained to provide various internal clock frequencies used for digital or analog blocks A complete discussion of system clocking can be found in chapter 24 of the PSoC Technical Reference Manual TRM VC3_Divider and VC3_ Source VC3 is a system clock resource similar to the VC1 and VC2 resources The main difference between VC1 and VC2 is that VC3 may be chained from one of several clock sources and may not be used as an input clock as flexibly as VC1 and VC2 It cannot be used as a direct input to the analog section of the PSoC It can
66. PSoC Designer Integrated Development Environment User Guide Cypress MicroSystems Inc 2700 162nd St SW Building D Lynnwood WA 98037 Phone 800 669 0557 Fax 425 787 4641 Document 38 12002 Rev E Last Revised December 15 2004 gt CYPRESS MICROSYSTEMS http www cypress com Copyright 2002 2004 Cypress MicroSystems Inc All rights reserved PSoC Programmable System on Chip and PSoC Designer are trademarks of Cypress MicroSystems Inc All other trademarks or registered trademarks referenced herein are the property of their respective owners The information contained herein is subject to change without notice Made in the U S A The software is owned by Cypress MicroSystems Inc CMS and is protected by and subject to world wide patent protection United States and foreign United States copyright laws and international treaty provisions Therefore unless otherwise specified in a separate license agreement between you and CMS this software must be treated like any other copyrighted material Reproduction modification translation compilation or representation of this software in any other form e g paper magnetic optical silicon etc is prohibited without CMS express written permission Disclaimer CMS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANT ABILITY AND FITNESS FOR A PARTICULA
67. PSoC Block 28h DCB02 PSoC Block 2Ch DCB03 PSoC Block 30h DBB10 PSoC Block 34h DBB11 PSoC Block 38h DCB12 PSoC Block 3Ch DCB13 PSoC Block 40h DBB20 PSoC Block December 15 2004 Document No 38 12002 Rev E 107 PSoC Designer Integrated Development Environment User Guide 5 8 5 108 Table 8 boot asm Interrupt Names continued 44h DBB21 PSoC Block 48h DCB22 PSoC Block 4Ch DCB23 PSoC Block 50h DBB30 PSoC Block 54h DBB31 PSoC Block 58h DCB32 PSoC Block 5Ch DCB33 PSoC Block 60h 12C Fixed 64h Sleep Timer Fixed From our example 2Ch corresponds to DCBO3 There are no interrupt han dlers at DBB00 DBB01 and DCB02 20h 24h and 28h because a 32 bit Timer User Module only requires the interrupt at the end of the chain In many cases the actual interrupt handling code is stubbed out You can modify the content of this stubbed handler to suit your needs Any subsequent device re configuration will not overwrite your work in the handler if the modifi cation is done in boot tpl A Word About boot asm When device configuration application files are generated boot asm is updated Among other things this file includes a jump table for interrupt han dlers Additional details regarding this file are up ahead in section File Defini tions and Recommendations The entries in the interrupt table are handled automatically for interrupts employed by User Modules For example a Timer8 User Module uses an interrupt The
68. PSoC Designer Integrated Development Environment User Guide 112 The name of the new configuration is Config1 and each additional configu ration will take on consecutive numbering i e Config2 Config3 Config4 2 Upon the addition of a new configuration you will see a new tab directly below the Dynamic Re configuration toolbar as well as the drop arrow selection in the Dynamic Re configuration toolbar both bearing the name Config1 Left click to move between tabs project configurations Note that whatever tab you are on dictates the project configuration regardless of the view All views are the settings or configuration for the project configu ration of the current tab There will always be at least one tab with the project name when a project is created This tab represents the base configuration and has special charac teristics The base configuration cannot be deleted but can be exported The new configuration will by default have global settings and pin settings iden tical to the base configuration To change the name to be configuration or project specific double click or right click the tab and type the new name The new name will appear on the tab and in the drop arrow selection in the Dynamic Re configuration toolbar This is how you select your working configuration You will be in and can work in the corresponding configuration User Mod ules User Module Parameters Global Resources of the configurati
69. PSoC Designer Integrated Development Environment User Guide Stack Overflow Let s say you want to create an event to break when the Stack Pointer reaches 1 Access the Debugger Events dialog box at Debug gt gt Events 2 Turn on the 16 bit thread by checking the Enable 16 Bit Thread box 3 Set the Input select drop down to SP 4 Set both the Low compare and the High compare to values to OOFF 5 Check the Break check box in the Static Logic fields 6 Click Apply Bit Thread Active Os State Logic Active 16 Bit Thread Active Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled _ SS a a ly nable 8 bit Thread r State Logic IV Enable 16 bit Thread fol nyerted Next state I Break T Inverte jo mpare Input Select High compare m Low compare Input select High comp Match count lt BimrED gt lt 0 T Trace Of oor lt 5P z lt oor Input Mask I External trigger ff Figure 76 Stack Overflow Event 166 Document No 38 12002 Rev E December 15 2004 7 Click Close Register A Value Trace On and Off and Match Count Let s say you want to create an event to turn the Trace Off at PC16 0000 turn the Trace On when Register A gets the value 0x32 and turn the Trace Off and Break after Register A gets the value 0x32 ten times 1 Enter the Debugger subsystem 2 Connect to the ICE and download target project hex file 3 Access the Debugger E
70. PSoC Designer Setup x License Agreement E Please read the following license agreement carefully C1 C Fress the PAGE DOWN key to see the rest of the agreement SOFTWARE LICENSE AGREEMENT This document is a legal agreement the Agreement between you Licensee and Cypress MicroSystems Cypress Please read this Agreement carefully before clicking the I Accept button By clicking the I Accept button you agree to be bound by the terms of this Agreement Do not proceed if you do not agree to these terms This Agreement covers your rights and responsibilities with regard to the pre release versions of the PSoCTM User Module Library Library the PSoC DesignerTM software without the PSoC compiler Designer and or the PSoC compiler Compiler as applicable the xl Do you accept all the terms of the preceding License Agreement If you choose No the setup will close To install PSoC Designer you must accept this agreement InstallShield lt Back Yes No Figure 5 License Agreement Document No 38 12002 Rev E December 15 2004 5 At the Choose Destination Location screen click Next to install the system to the default directory path of c Cypress MicroSystems PSoC Designer If you wish to choose an alternative location click Browse and select a different directory path PSoC Designer Setup Choose Destination Location Select folder where Setup will install files Figure 6 C
71. Preferably x Open Host Controller or Universal Rev A or Later Emulation Pod for CY8C29x66 Rev A or Later Emulation Pod for CY8C27x43 Rev G or Later Emulation Pod for CY8C25 26xxx Rev A or Later Emulation Pod for CY8C 24x23 and CY8C22xxx December 15 2004 Document No 38 12002 Rev E 7 PSoC Designer Integrated Development Environment User Guide 2 2 Software Requirement Checklist The following software is required to run PSoC Designer Windows 98 NT 4 x SP6 2000 Me or XP SP1 Microsoft Internet Explorer 6 x SP1 with MSXML Parser v 3 0 or Higher Adobe Acrobat Reader Adobe SVG Viewer 3 0 2 2 1 Determining Version Build Service Pack of PSoC Designer To quickly determine version numbering of your current installation of PSoC Designer click Help gt gt About PSoC Designer About PSoC Designer x PSoC Designer Yr Copyright 2000 2003 Cypress MicroSystems Inc All rights reserved ICCM8C C Compiler Copyright 2000 2003 ImageCraft Creations Inc All rights reserved Support for all Cypress Microsystems products including the C compiler will be provided by Cypress Microsystems technical support Version 4 2 BETA Build 1000 Date 15 June 2004 Database Version 4 0 Figure 1 System Version 8 Document No 38 12002 Rev E December 15 2004 2 3 Performance Factors PSoC Designer is a data driven application with heavy use of data intensive calculations and fi
72. R PURPOSE CMS reserves the right to make changes without further notice to the materials described herein CMS does not assume any liability arising out of the application or use of any product or circuit described herein CMS does not authorize its products for use as Critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of CMS product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies CMS against all charges Table of Contents LisStOf Tables sinaia aaaea Eea aiai v LIST OF FIQUIOS ccxcse cides cds co ceeescctcesccecwcesdenceszeudendsncencsscteciezaeeceveeeces eteerdeccenad What s New With PSoC Designer 4 2 Two Minute Overview s s s Documentation Conventions Notation Standards seisssiicccssscscssscscascsnsveceassctesssecesenssennessencsssendeadsecaeseeceasnetess Section 1 MrodUCHON ansis 5 PUDO SE aan i rere reer a EE EE E AEO EAN 5 PEAS UPD ON ranei NA aa E A E E tanataneaceade 6 AS SOCHOMOVERVIOW snm i ENET 6 VA Product Upgrades sirri tinitipon s iaiia 6 Section 2 INStAMAWOM srira aaia 7 2 1 Hatdware Requirement Checklist iiris ainas raea ei 7 2 2 Software Requirement Checklist a8 2 3 Performance Factors 06 ang 2 4 Installing the System sO BUS Prose Upda aeara aee AE EEEE EE EAEE AEE 18 Section 3 Using
73. TRL Click Haid the contd key and click fo zoom in althe mouse pointer bcafon i Haid the contd key and cick and drag to select a region to man hio L Heid the conta and shift keys and dick to zaam oul D restore Original Position Use the Right Click ContextMenu Select Orgind View to return fie intescannect view to fie original position Select Zoom in ar Zoom Out v Preserve Aspat Ratio v Show Alloyed Connections Show Too Tips Prk Zoom In Chr Ok Zoom Out Sitk Cikk Cigna vaw v Higher Quaty Find oe Changs Badwround Heb Zoom and Pan Tips About SWS Viewer I Don t show this window again Figure 33 Zoom Pan Pop up Window Click the x in the upper right corner to exit and a check in the Don t show this window again box if you do not want the window to show again Go to Tools gt gt Options gt gt Device Editor tab to re enable this Interconnect View navigation tip window 58 Document No 38 12002 Rev E December 15 2004 example_pwm_with_db_28pin CY8C27443 PSoC Designer Device Editor e Edit View Project Config Build Debug Program Tools Window Help S ieh see 6 6eb sT Mraarm me FEE 2 4M 4 ate 75 8 2 e e maa aE Hi ote ae EM as alfao Eleg E Selected User Modules 3 Example_PWM_with_DB_28pin Tey ami jlobal Resources PU_Clock 3_MHz NS a I2K_Select
74. User Modules Document No 38 12002 Rev E December 15 2004 5 3 1 Placing a User Module To place a User Module perform the following steps 1 Single click on a selected User Module When you click the module the first available location on the device is highlighted in the device interface If the User Module requires more than one group of PSoC blocks then the groups will be highlighted in green analog or blue digital Also the User Module reference name for the block appears above the blocks that are currently active i e clicked on Click the Next Allowed Placement icon 9 to advance the highlights to the next available location active anchor identified as green non active as blue Do this until you have identified the exact location for the User Mod ule The Next Allowed Placement action shows the next possible set of PSoC blocks a User Module may be placed regardless of any currently placed User Modules If placement of the User Module is not possible in the high lighted location due to lack of resources a Resource Allocation message will flash in the lower left corner of PSoC Designer Placement may not be possible if another User Module occupies the PSoC block or if a placed User Module is using another resource which the highlighted User Module requires New in 4 2 is the drag to move capability where you can click the target placer identified as green and blue highlights and drag the U
75. a condition There are currently two errata warnings for the silicon the 24 MHz condi tion described in the previous section and a RAM I O aliasing errata asso ciated with a UART RX block User Module Document No 38 12002 Rev E December 15 2004 This setting is only available for the CY8C25xxx 26xxx device family It does not appear for newer PSoC device families The RAM I O aliasing erratum is described in Application Note UART Receiver Errata Workaround AN2013 at http www cypress com This warning will be displayed in the Build tab of the Output Status window when a UART User Module is part of the project 3 6 4 Debugger In the Project Settings dialog box you can enable options for the PSoC Designer Debugger To access the dialog box click Project gt gt Settings Debugger tab Compiler Device Editor Linker Debugger r Debug port settings ICE connected to LPT1 7 Friendly name ALPS OK for ICE to power pod C Pod uses external power only r Pod supply voltage 5Y C 33 ICECUBE only Cancel Figure 24 Project Settings Debugger Tab This dialog box now provides a drop down to select the Debug port settings The drop down for the ICE connected to entry is a dynamic list primarily for USB ports In other words PSoC USB ICE ports can be added and removed at any time unlike parallel LPTx ports that are relatively fixed peripherals Many PSoC USB ICE ports can be used
76. a space one or more characters or a comma Document No 38 12002 Rev E December 15 2004 4 Additional library paths The Additional library path setting adds one or more directories to the list of directories searched for object and library files Directories are searched only until the specified object library file is found It is intended that valid directory paths are entered however if incorrect paths are entered you will receive an error message The linker searches for the object library files in the following order PSoC Project Directory First library path listed in the Additional library path field Second library path listed in the Additional library path field and so on It is not necessary to add the PSoC Project Directory to the Additional library path because a search for an object library file is done in this directory first It is intended that one or more paths be entered into this field It is legal to use long path names but these must be enclosed in double quotes It is not expected that a terminating backslash be added to the end of the path Multiple paths can be entered on the settings line by separating them with a comma or space s Creating a Library PSoC Designer does not provide a user interface to create maintain an external library Libraries can be created from a console DOS shell This shell environment lends itself to scripting so that the library can be rebuilt appended and maint
77. a value that is out of range you will see a message in the lower left corner that says The specified value is not within the range of this parameter 2 Repeat this process for all placed User Modules 5 3 3 Global Resources Global Resources are hardware settings that determine the underlying opera tion of the part for the entire application Such settings include the CPU_Clock For example this setting designates the speed at which the M8C processes High MHz equals fast processing and low MHz equals slower pro cessing High takes more power low takes less power Therefore when you set the value you must strike a balance between speed and power to optimize your implementation Note that Global Resource options differ slightly per device family group i e resource options for CY8C25xxx 26xxx parts are different than the options for CY8C27xxx parts 76 Document No 38 12002 Rev E December 15 2004 1 To update global resources for the project click each drop arrow in param eter value fields and make applicable selections Similar to User Module Parameters some parameters in Global Resources are specified integer values Such as 24V1 and 24V2 You set these values by clicking the up down arrows or double clicking the value and typing over If you enter a value that is out of range you will see a dialog box specifying the acceptable range Click OK to close the dialog box Global Resources Value CPU_Clock
78. ained PSoC Designer is distrib uted with a librarian as well as an assembler and compiler The first step is to operate in a shell environment A path to the librarian assembler and compiler tools should be created for the console to exe cute The path to these tools can be set in a variety of ways Typically it resides in a Tools folder beneath the PSoC installation directory e g c Program Files Cypress MicroSystems PSoC Designer Tools You must have an error free object file typically an o file type to add or update to a library Object files are created after you assemble or compile a file To create an object file from an assembly source file you would enter the following iasm8c I include path filename asm To create an object file from a C source file you would enter the following icc e c options I include path I another include path filename c December 15 2004 Document No 38 12002 Rev E 39 PSoC Designer Integrated Development Environment User Guide 40 The compiler switches are listed in the PSoC Designer C Language Com piler User Guide Do not use the g switch to include debug information Once you have successfully obtained an object file you can use the librar ian The librarian is invoked with the following examples foo o gt gt add or update library module foo o bar o gt gt remove library module bar o gt gt list the library modules foo o gt gt ext
79. ance if you check Break as part of an event Hit Event state break will appear in the Output Status win dow as the debugger hits the event Typical Event Uses There are many potential uses for events Find a stack overflow See Stack Overflow Errors under Invalid Memory Reference in PSoC Designer Online Help System at Help gt gt Help Topics Detect jmp or call out of program See Code that will Corrupt Stack under Invalid Memory Reference in PSoC Designer Online Help System at Help gt gt Help Topics Trace a specific range of code Find when a register is written with optional matching data value Drive an external signal on interrupt s using the ICE 4000 Measure interrupt latency Break the n th time a line of code is executed match count December 15 2004 Document No 38 12002 Rev E 163 PSoC Designer Integrated Development Environment User Guide Break on Carry Flag status Break on signals from customer target board Wait for certain number of instructions Count sleep periods Break on specific data in Accumulator on certain instructions PC Collect trace data reads or writes to specified register Find memory write 10 4 10 Event Examples 164 Following are a few pre set examples for common events Find Memory Write Let s say you want to break on a memory write to address 20h 1 Access the Debugger Events dialog box at Debug gt gt Events 2 Turn on the 8 bit thr
80. and a USB B connector on the other The ICE may be plugged directly into the adapter s connector or a parallel cable may be used The USB B connector is connected to your PC through a standard USB A to B cable In order for the adapter to be recognized and configured automatically it should be plugged in after installing PSoC Designer v 4 1 or later Once the adapter has been recognized it will be available in the Project Settings dialog box under the Debugger tab Using the USB Adapter you can connect to the ICE and debug with the same functionality as with an LPTx parallel port con nection The Open Host Controller Interface OHCI allows USB communication with the ICE to operate up to 30 faster than the Universal Host Controller Inter face UHCI This improves download and debugging speed To find out which interface you are using look under the Universal Serial Bus Controllers head ing in Device Manager You will see one of these three Host Controllers Uni versal Open or Enhanced Based on the port you are connected to the USB Adapter will default to either Universal or Open Typically Intel motherboards have UHCI Most PCI USB hubs are OHCI Connecting to the ICE Cube New with PSoC Designer v 4 2 is the ICE Cube This new in circuit emula tor replaces the ICE 4000 and the USB Adapter for seamless USB connection debugging and programming The ICE Cube is required for CY8C29x66 support We want to assist you in
81. and device configurations can reside 1 To access the New Project wizard dialog box you can either click the New Project icon E or select Start new project from the Start dialog box upon system entry f Start new project m Open existing project Project name and location C Program Files Cypress MicroSystems PSoC Designer BH Start Device Editor Edit configuration associated with the project Z1 Start Application Editor Edit project source files E Start Debugger Debug project code Figure 26 Start Dialog Box December 15 2004 Document No 38 12002 Rev E 47 PSoC Designer Integrated Development Environment User Guide 2 Once inside the New Project dialog box click once on a method type a Project name and either type or Browse to designate a project directory New Project x Select method New project name Create New Project New Clone Project A Create Design Based Project New project location C Documents and Settings hmc Browse Figure 27 New Project Dialog Box You can either create a new project clone an existing project or apply a design from an existing project For detailed definitions of each method Cre ate New Project Clone Project Create Design Based Project jump ahead in this section to Project Methods Avoid use of the following characters in path names they are problematic 2 2 lt gt amp 4 5 3 When finished
82. ate on the stacks use data RAM space Data RAM addresses are 8 bits wide The M8C can directly access 256 bytes of RAM Some PSoC Devices have more than 256 byte RAM page These devices access multiple RAM pages using a combination of page mode bits in the Flag and Paging registers of the register address space See the device data sheets and the Technical Refer ence Manual for details The program memory space is organized into 256 byte pages such that the PCH register contains the memory page number and the PCL register con tains the offset into that memory page The M8C automatically advances PCH when a page boundary needs to be crossed The user need not be concerned with program memory page boundaries as they are invisible within the pro gramming module The one exception to this is that non jump instructions end ing on a page boundary will take an extra cycle to complete Jump instructions are not affected in this manner Instruction Format Instruction addressing is divided into two groups 1 Logic arithmetic and data movement functions unconditional 2 jump and call instructions including INDEX conditional Logic arithmetic and data movement functions are one two or three byte instructions The first byte of the instruction contains the opcode for that instruction In two byte instructions the second byte contains either a data value or an address Most jumps plus CALL and INDEX are 2 byte instructions The o
83. ated with an earlier version of PSoC Designer This is done automatically by the Project Update feature Under Tools gt gt Options gt gt Device Editor tab you can specify automation of the Design Rule Checker If you wish the Design Rule Checker to run automat ically after application generation click a check at Always run Design Rule Checker after application generation See Design Rule Checker for details To re enable the Interconnect View navigation tip window check Enable Inter connect navigation info December 15 2004 Document No 38 12002 Rev E 45 PSoC Designer Integrated Development Environment User Guide 3 7 5 3 7 6 3 7 7 46 Editor Under Tools gt gt Options gt gt Editor tab you can specify system save options and window persistence i e whether or not PSoC Designer retains access to certain windows upon re opens In the Save options field check which group of project files you want auto matically reloaded upon a build even if they have been externally modified Options include Source files Header files Library source files Library header files and Other files See File Types and Extensions for project file specifics In the Window persistence field check Reload documents when opening project if you would like PSoC Designer to retrieve the documents that were open during a previous project session upon future project access In Re activate previously active docume
84. boot asm that you do not want overwritten hard code the change in boot tp template for boot asm If there is no interrupt handler for a particular interrupt vector the comment string call void_handler is inserted in place of substitution string 5 8 6 Configuration Data Sheet Once you have configured your device and generated application files you can produce view or print a data sheet based on how you configured your project device 1 To produce and view a data sheet click the View Data Sheet icon 5 or access View gt gt Data Sheet from the menu This opens an independent browser window that shows the current data sheet This can be done in any of the three modes of the PSoC Designer application If changes were made in the Device Editor and a Generate Application was not performed then PSoC Designer will show a dialog box asking for verifi cation before performing Generate Application If you select No then the data sheet will reflect the configuration before the changes were made 2 To print the data sheet click the standard Print icon or File gt gt Print The configuration data sheet is self contained in its own folder in the project directory and can be viewed independently of PSoC Designer by opening configreport xml in Internet Explorer If you need to move or send someone the file you must move send the entire directory of ConfigDataSheet December 15 2004 Document No 38 12002 Rev
85. by holding the Ctrl key and clicking selec tions 6 In the List of included files field click Add Browse to identify all configura tion related files Again use the Shift and Ctrl methods to choose multi ple files If you select a file that bears the same name as the file in your current project you will be prompted to modify 7 Inthe Version field type the version of this design configuration This is for your own internal tracking 8 Click OK Your exported design cfg can now be imported added to a new or existing project via Design Browser See Design Browser Import Design for details Design Browser Import Design In order to import an existing design cfg file you must have previously exported the design you currently want to import i e generated the cfg See Export Design for details Again designs brought into your project with Design Browser can have dynamic re configurations or a single configuration To import a design to your project execute the following steps this assumes you have PSoC Designer Device Editor and your target project open December 15 2004 Document No 38 12002 Rev E 115 PSoC Designer Integrated Development Environment User Guide 1 From the menu click Config gt gt Design Browser PSoC Designer launches Design Browser PSoC Design Browser xj Browse file system Select from Design Catalog Design file path D Software Cypress MicroSyste
86. cecxtace cece esas eiaieisd sicepsntdeetenenasat 8 Figure 2 PSoC Designer Setup SCreen disenoret iinom 10 FIQUEG 3 Welcome Sre EM ressos ieena den deste eara aE cane 11 Figure 4 License AGreeme mt tere ctnecd used eacenoast AA 12 Figure 5 PSoC Designer Setup Wizard cceccccecceeeeeeeeeeeeeeeseeeeseeeeneeens 12 Figure 6 Choose Destination Location 2 cccecceeeeeeeeeeeeeeeeeeeeeeeeeeeeteaeeees 13 Figuir 7 Select Program Folder sis c4 2ui ove cetesteazstesseschesnpsnetmeracnseceecocesyeguaanaeaad 14 Figure 8 Stan Copying Files seners e e 15 Vaile U ae aot 10 a 110s aaaea terry Ferrer eer terrier errr tren 16 Figure 10 PSoC Designer Installation Wizard Completed 0 0008 17 Figure 11 Database Version Detection cesccccesscceeesseeeeeseeeeesseeeeeesaeees 18 Figure 12 Outdated User MOGUICS sire seas oss cezcussesscassasnapnees upeapaepenceaacnenaennes 19 Figure 13 PSoC Designer Subsystems cceecceeeeeeeeteeeeeeeeeeeeeesteeteetens 21 Fig re 14 Source TOG wcsccnscctcezctecee ie een eee eae aa 24 Figure 15 Device Editor Subsystem Selection View cceceeeee 26 Figure 16 Application Editor SUDSYStOM seisine 27 Figure 17 Debugger SUDSYSteM c cceeeeeeeceeeeeeeeeeeceeeeseeeeeeeeeeeeeeaeeeeatens 28 Figure 18 Cascaded WindOWS cccscceseeeeeeeeeeeeseeceeeeseeeeeeeeeeeeteteeeeaeees 29 Figure 19 Window Option scorse ninn ake cece a
87. chnical Reference Manual TRM The current settings for the Global Parameters can be saved as default set tings This is done by choosing the menu item Config gt gt Global Resources gt gt Update Default Values You can also right click on any Global Resource name and select Update Default Values This action saves all Global Resource settings to the Preferences directory under the PSoC Designer installation path These settings can then be used by any other PSoC Designer project by choosing the menu item Config gt gt Global Resources gt gt Restore Default Values or by right clicking on any Global Resource name and selecting Restore Default Values If no custom default values are saved then the menu item and the right click to Restore Default Settings will restore the factory default Global Resource Settings December 15 2004 Document No 38 12002 Rev E 81 PSoC Designer Integrated Development Environment User Guide 5 4 82 Deploying Interconnectivity Connecting User Modules Specifying interconnections between the User Modules on the PSoC blocks can be done as you place or after you place each User Module Interconnec tivity between User Modules enables communication between PSoC blocks which are the analog and digital peripheral blocks of a device that are custom ized by the placement and configuration of User Modules Connecting to User Modules is accomplished through the output and input pa
88. choose a previously searched directory 134 Document No 38 12002 Rev E December 15 2004 5 Click a check in the specifics Match whole word Match case Look in sub folders and Output to pane 2 Find in Files 2 tab of the Output Status win dow 6 When finished click Find Click Cancel to close Find in Files dialog box To cancel an active search re open the Find in Files dialog box In the Find in Files 1 or Find in Files 2 tab of the Output Status window you will see the files resulting from your search Double click to open the file Inside the file in the left margin there is a yellow arrow indicating the text for which you were looking December 15 2004 Document No 38 12002 Rev E 135 PSoC Designer Integrated Development Environment User Guide 136 Document No 38 12002 Rev E December 15 2004 Section 8 Assembler 8 1 8 2 In this section you will receive high level guidance on programming assem bly language source files for the PSoC Device For comprehensive details see PSOC Designer Assembly Language User Guide Accessing the Assembler The Assembler is an application accessed from within PSoC Designer much like the C Compiler This application is run as a batch process It operates on assembly language source constructed by you to produce executable code This code is then compiled and built into a single executable file that can be downloaded into the In Circuit Emulator ICE wh
89. ctory with folders is created and can be seen in the source tree left frame of the Application Editor subsystem 4 2 Project Methods Following is a definition for each method to help you decide the best option for your project 50 Document No 38 12002 Rev E December 15 2004 4 2 1 Create New Project Creating a new project is described in Create a Project earlier in this section PSoC Designer will provide a blank project configuration for which you select a part to be configured Once you create your project select your part and click Finish you are taken directly to the Device Editor subsystem where you choose and configure User Modules then generate the new device configura tion See Device Editor for details on device configuration 4 2 2 Clone Project You can clone an existing project at any point of its existence before during or after device configuration assembly source programming or project debugging Cloning copies the existing project but allows users to change the base part If you wish to change parts within a part family in the middle of project design say from CY8C27143 to CY8C27243 you must use the clone method If you are migrating from CY8C25xxx 26xxx to CY8C27xxx and beyond clon ing is the only way See the Project Migration Application Note under Help gt gt Documentation Migrating Projects to CY8C27 If you are migrating a CY8C25xxx 26xxx part project to CY8C27xxx you must manually
90. d the current project click the Build icon in the toolbar or Build gt gt Build from the menu or just F7 PSoC Designer now employs a make utility Each time you click the Com pile Assemble or Build icon the utility automatically determines which files of a large application manual or generated have been modified and need to be recompiled then issues commands to recompile them For further details see make paf in the Documentation Supporting Documents directory for PSoC Designer The initial build action of compiling assembling causes object modules to be created assuming no errors occur and places them in the project name obj or project name lib obj folder The link build action uses the object modules to produce the final project image in the project name output folder December 15 2004 Document No 38 12002 Rev E 143 PSoC Designer Integrated Development Environment User Guide 9 2 144 As mentioned the hex file can be downloaded to the ICE Other files also reside in the folder to provide reference for the Debugger subsystem and you as the program developer Such files include dbg the entire program listing Ist and memory map mp At any time you can ensure a clean build by accessing Project gt gt Clean then clicking the Build icon The clean will delete all Lib 1libPSoc a obj o and 1ib obj o files These files are regenerated upon a build in addition to normal bu
91. de 8 At the Setup Status screen you will see a status in percentage complete of system installation Click Cancel if you wish to cancel installation at this time PSoC Designer Setup Setup Status InstallShield Figure 9 Setup Status 16 Document No 38 12002 Rev E December 15 2004 9 At the PSoC Designer Installation Wizard Completed screen click a check in the applicable box if you wish to view release notes or instructions on enabling the C Compiler When finished click Finish PSoC Designer Setup D PSoC Designer Installation Wizard Completed PSoC Designer Setup is almost complete Choose the options you want below V View instructions on enabling the C compiler T View the release notes Click Finish to complete PSoC Designer Setup lt Back Cancel Figure 10 PSoC Designer Installation Wizard Completed At this time you can reboot your PC If you wish to connect the In Circuit Emulator to your PC and PSoC Designer go to Debugger When you first access the Interconnect View of Device Editor after installa tion you will see a pop up window to jump start your familiarity with the device interface Click the x in the upper right corner to exit and a check in the Don t show this window again box if you do not want the window to show again You can re enable the window by checking Enable Interconnect navigation info under Tools gt gt Options gt gt Device Editor tab
92. decided upon User Modules you are ready to offi cially select them To select a User Module perform the following steps December 15 2004 Document No 38 12002 Rev E 65 PSoC Designer Integrated Development Environment User Guide 1 Double click a User Module in the left frame or right click your mouse on it and choose Select It will then appear in the upper active window in User Module Section View example_external_crystal_28pin CY8C27443 PSoC Designer Device Editor File Edit View Project Config Build Debug Program Tools Window Help EE io J2 ADCINC14_1 DTMFDialer_1 CRC16_1 16384 1080 1 0 1 0 16 Bit CRC Copyright 2002 2003 Cypress MicroSystems Inc All Rights Reserved Resources Required Figure 41 User Module Selections Upon selection of User Modules with multiple topologies a selection wizard will appear from which you can specify a topology as well as print 66 Document No 38 12002 Rev E December 15 2004 5 3 2 Repeat the process for each individual User Module you wish to select If at any time you would like to change the User Module instance name right click on the module select Rename and type a new name The User Module instance name identifies multiple User Modules of the same type in a single project For each User Module you add the system updates the data in the Resource Manager window with the number of occupied PSoC blocks along wi
93. e alx ag 2example_dynamic_pwm 5 4 Source Files E boot asm EH main asm E Headers E Library Source Library Headers H E External Headers 4 flashsecurity txt H E Figure 14 Source Tree The project file system source tree is set up identical to the standard Win dows file system The Source Files folder contains assembly language code and C Compiler files generated by the system and you The Headers and Library Headers folders contain intermediate files added by device configurations and you Library Source contains the project configuration asm as well other project specific reference files generated by device configuration To access and edit files simply double click the target file Open files appear in the main window to the right of the source tree Document No 38 12002 Rev E December 15 2004 3 3 For more details regarding files and recommended usage see Application Edi tor To access the project source tree any time while in any subsystem click the Project View icon If you are viewing the source tree in the Debugger subsystem you will see an Output tab In the Output tab you can access the project Ist and mp files Because these files are generated output from your assembled and linked source they are Read Only You can also access the Output tab on the source tree in Application Editor by clicking Tools gt gt Options gt gt Editor tab and uncheck Enable Out
94. e which is the file you download for debugging The linking process links intermediate object and library files generated during compilation assemblage checks for unresolved labels and then loads results into a hex and a lst file as well as assorted o and dbg files Again for descriptions of these files refer to File Types and Extensions Customized Linker Actions It is possible to customize the actions of the Linker when a PSoC Designer build does not provide the user interface to support these actions A file called custom kp can be created in the root folder of the project which can contain Linker commands see the Command Line Compiler Overview section in PSoC Designer C Language Compiler User Guide The file name must be custom kp Be aware that in some cases creating a text file and renaming it will still preserve the txt file extension e g cus tom I kp txt If this occurs your custom commands will not be used The make file process reads the contents of custom kp and amends those com mands to the Linker action A typical use for employing the custom kp capability would be to define a cus tom relocatable code AREA Using a custom AREA and the custom kp file allows you to set a specific starting address for this AREA December 15 2004 Document No 38 12002 Rev E 145 PSoC Designer Integrated Development Environment User Guide 9 4 146 For example if you wish to create code in a separa
95. e 41 Figure 42 Figure 43 Figure 44 Figure 45 Figure 46 Figure 47 Figure 48 Figure 49 Figure 50 Figure 51 Figure 52 Figure 53 Figure 54 Figure 55 Figure 56 Figure 57 Figure 58 Figure 59 Figure 60 Figure 61 Figure 62 Figure 63 Figure 64 Figure 65 Figure 66 Figure 67 Figure 68 Figure 69 Figure 70 Figure 71 Figure 72 Figure 73 Figure 74 Figure 75 Figure 76 Figure 77 Figure 78 Figure 79 Figure 80 Figure 81 Figure 82 Figure 83 UserModule Dalarne NE 64 User Mod le TOGIDAL 25ccc5 cdc cdeasaaeedg ect scteciasbaseceniedieGecpiaaianeceesace 65 User Module SelechonS sasnesimirnr e E 66 Interconnect View in Toolbar cccccccceseseseeeeeeeeeeeeeeeeeeeseeeeeeeeens 67 Selected yet to be Placed User Modules cccssceeesteeees 68 Placed User Modules srengene E ies h ators E TA Filter User Module Options cceccceeceeeeeeeseeeeeceeeeeeeeeteetsneens 72 DAC8 on ASC21 Anchor and ASD22 ou eee eeeeseeneenereeeteeeees 73 DAG8 on ASD22 Anchor and ASC23 os schuuednisacene 74 DAC8 Being Dragged from ASD22 ASC23 to ASD13 ASC12 75 User Module Parameters ccccccccsessessseeeesseeaeeaeeeeeeseeeeseeeeees 76 Global RESOUNO S aisida aa selene 77 Digital Interconnect ROW INPUT issscssecsassecutecccccee encase esha 87 Synchronization Options for Digital Interconnect Row Inputs 88 Digital Interconnect Row Output ce eeeesee
96. e Address Base Address Base Address Base Address Base Address saagaa HBSaaaeaqgaqagaa saagaa sasaaa SSSA SHS Saaeqeaqgqaga CE E EO EOE EOE SASSEN E EO EO OO Saeageqeaqgqaa CE E E EO EO EOE SSSA W W W W W W W W End 16K parts a Figure 81 Snip it of flashsecurity txt December 15 2004 Document No 38 12002 Rev E 175 PSoC Designer Integrated Development Environment User Guide 11 3 11 4 176 FPMP File Errors If you edit or enter the wrong information in the flashsecurity txt file a dialog box will appear informing you of the situation when you are downloading to the ICE or programming a part You will also see a message in the Build tab of the Output Status window l Starting Full Build g Fu uild a 4 Compiling a boot asm main asm Linking Could not read flash security settings Figure 82 FPMP Error in Output Status Window Example If you have a Flash data table that can be changed using a Flash write routine you might have assembly code that looks like this area Table ROM ABS org 3C80h widgetTable export db db db db db db f s 57h 49h 44h 47h 45h 54h WidgetTable 7 W 7 D G 7 E T i More table entries continue Document No 38 12002 Rev E December 15 2004 You would then like to unprotect the Flash block associated with this table at address 3C80h You would make your change in the flashsecurity txt fi
97. e PSoC Each User Module using the reference and the op amp block associated with it will add slightly to the power consumed by the device Since the internal refer ence is used as an integral part of most switched capacitor circuits the current drive capability will have an impact on the speed at which the switched capac itor block can operate Higher settings for this parameter will in general allow switched capacitor circuits to operate at higher clock rates at the expense of higher power consumption To estimate the current and power consumption per op amp block refer the applicable table in the data sheet for the part DC Operation Amplifier Specifications ISOA Ref Mux The Ref Mux source selection is used to control the range and potential accuracy of various analog resources The reference chosen will control the maximum voltage that can be input to a switched capacitor circuit and output from a switched capacitor circuit Both the analog ground level and the peak to peak voltage will be selected using this parameter Values specified with the Ref Mux parameter are in pairs and consist of Agnd level full scale Keep in mind that selecting Vdd supply voltage as a reference level will couple Vdd changes into the Agnd input of internal resources This will directly impact absolute accuracy of measurements Using the internal bandgap reference will result in better accuracy but may not offer an exact Vdd 2 input reference Ch
98. e click each name in the Name conflicts field and type a new name or click the Auto resolve button Auto resolve instantly adds an _1 to each name Once you have resolved the conflict the Status field will show the name status as fixed If you choose not to resolve PSoC Designer will proceed Be aware there may be overlapping User Module placement issues 4 5 In the Included configurations field check which loadable configuration you want to designate as the base configuration for a dynamically re config urable project If you are not employing multiple configurations simply check the chosen configuration If you already have a base configuration in your target project you should not check any of these boxes When finished click Import OK Click Close to close Design Browser Once your design has been imported added its loadable configurations will be active in your current project Delete Configuration To delete a loadable configuration from your PSoC project execute the follow ing steps This assumes you have PSoC Designer Device Editor and your target project open Document No 38 12002 Rev E 117 PSoC Designer Integrated Development Environment User Guide 6 3 1 6 4 6 5 118 1 From the menu click Config gt gt Loadable Configuration gt gt Delete click the icon immediately to the left of the drop arrow selection in the Dynamic Re configuration toolbar or right click the
99. ead by checking the Enable 8 Bit Thread box 3 Pick BITFIELD in the Input Select box The little help box in the lower left describes the BITFIELD input Bit 1 is the ram write bit 4 We only want to look at bit 1 This means we ll need to mask off the other bits The Input Mask field lets you knock off bits that you don t care about It s an 8 bit number set bits in the input mask to mark the bits that you care about e g Of to get the low four bits ff to get all eight bits 01 to get the low bit 80 to get the high bit cO to get the top two bits etc Pick 02 for the input mask to get the ram write bit 5 Any bits that are masked off need to be zeroes in the compare fields You can see in the help box that the bit that we care about is active low itis a 0 when the ram write is happening This means we can just set both com pare values to 0 6 Turn on the 16 bit thread with the enable checkbox Document No 38 12002 Rev E December 15 2004 7 Pick MEM_DA for the input select If you picked MEM_DA_DB you could check the address and the data value This selection is different for the CE Cube support of the CY8C29x66 devices 8 Set both compare values to 20 your desired address 9 Pick AND for your Combinatorial Operator 10 Hit the Break checkbox This will make the debugger halt when it sees the ram write 11 Click Apply December 15 2004 Document No 38 12002 Rev E 165
100. eansec SH BUIGING et P MOIS CU E T E E an aetna T E 9 2 C Compiler ee 9 3 Linker Loader JA LADFaN AM sesiis Section 10 Debugger cccccccsisiestessiaccectaseccccrsnacssctsescesccncsecnesnesescvssuereaciecus NOt Debugger GOMIPOMENIS sirsenis aaa cen uccesicsssspanceas tapi E E EEA 10 2 COMMGCHIAG E EE E E E E 10 9 Downloading to POU tent cx aise ikl aa A 10 4 Debug Strategies HS 10 5 Ment OPON S seseo a TES ea REE 10 6 Programming the Pant setetest n eet eae kaees Document No 38 12002 Rev E December 15 2004 Section 11 Flash Program Memory Protection ccsssssssseeeeeees 173 11 1 FPMP and PSoG Designer is cccsccivcessecssnccveceanscveienvecsincevacvoctconeccsceeenecsnlesstcenetevetens 173 11 2 flashsecurity txt and Application Editor c c0 cecssceaseesesccesresescossccesceunsenvscsscessnsetstese 174 MS PPMP Pile ENOS cisesitateda cs tia sssuees a E vised ses inicasteatioe na ees 176 TAA EGNOS E cp ne cdcoscton crapcsaeseian nae E ianwndeanarsbaceaseiencne 176 Appendix A Troubleshooting seussenseensnunneunnennnennnennnunneunnensnennnunnnnnnnnn 179 Appendix B Glossary Index December 15 2004 Document No 38 12002 Rev E iii PSoC Designer Integrated Development Environment User Guide iv Document No 38 12002 Rev E December 15 2004 List of Tables List of Tables Table 1 Documentation ConventiOns cccccccecceee
101. ect see Creating a Project a root directory with three folders will be generated at the location specified by you The name of the root directory will be the project name and the names of the three folders are lib Library obj Objects and output for files generated by a project build The lib folder contains system Library Source files The obj folder contains intermediate files generated during the compiling assembling of c and assembly source files The output folder contains the project hex file used for debugging the listing file and other files that contain debug information December 15 2004 Document No 38 12002 Rev E 21 PSoC Designer Integrated Development Environment User Guide 22 Upon installation and subsequent system use you will have access to the fol lowing files Table 4 Type Library Archive Assembly Source C Source CFG File Debug Symbols C Header HEX File ASM Include Relative Source Listing Full Program Listing Make Address Map Object Module ROM File File Types and Extensions Extension a asm cfg dbg hex inc lis st mk mp rom Location lib libpsoc a but Libraries can be anyplace Source Files Library Source in source tree Source Files in source tree Folder under project directory output folder under project directory C Headers in source tree output folder
102. ections to Global Output without closing the window 5 5 Specifying Pin out Specifying the pin out for each PSoC block is the next step to configuring your target device When you specify a PSoC block to a pin out you are making a physical connection between the software configuration and the hardware December 15 2004 Document No 38 12002 Rev E 91 PSoC Designer Integrated Development Environment User Guide To access the device pin out click the Interconnect View icon in the Device Editor toolbar ICENA t Figure 56 Interconnect View in Device Editor Toolbar In the middle frame you will see the pin out bearing the number of pins of your target device Your specific device was chosen when you specified a base part during the creation of your project Jesources Selected User Modules 2 Example_External_Crystal_28pin ock 3 1 lect Exl yde Dis ADCINC14_1 DTMFDialer_1 CRC16_1 LPF2_1 imer 1_ ysClk N 1 Z1 N 1 aice Sy ider 1 odule Parameters 0 a X PO O Pon PO 2 PO 3 PO 4 PoS POE PO P1 0 Bini o 4 WN Figure 57 Device Pin Out Care should be taken when connecting to pins The pin settings can be modi fied either by setting elements to connect to pins or by setting the pin directly 92 Document No 38 12002 Rev E December 15 2004 5 5 1 Setting the pin directly connects the pin t
103. eeeeceeeeeeceseeteeeeseneeseneeenes 2 Table 2 Internal REJSTES oessueirnnnneraea a aaia NN 3 Fable S Assembler DWSCUVE Seii A IAA 3 Table 4 File Types and Extensions c cccssseeessceeeteeeceeeeseeetesaneeteneeeess 22 Table 5 Default Memory Organization cccecceeeceeeeeeeeeeeeeeeeeeeeeseeeeeeees 38 Table 6 Navigating Device Interface ccccccsscecceeeeeseeceeeeeeecsneeeeeeesseaaes 61 Table 7 Source Files Generated by Generate Application eee 103 Tables bootasin Interrupt Names siainen 107 Table 9 Menu Options for Modifying Source Files 131 Table 10 Destination of AND INStrUCtion cceesseceeesceeeeseeeetesneeeteeees 139 Mable T1 Keyword TYPE Simni a N a Aa 139 Table 12 Assembler Dirette Sissu ee ia AiE 140 Table 13 Instruction Set Notation cecceeecceeeeeeeeeeeeeeeeeeeeeeeteeeeeneeneees 141 Table 14 Debugging Menu Options ccecceeeceeeeeeeeeeeeeeeeeseeeeeeseneesenees 168 Table 15 Header to Device Pin Connections cccceeeseeeteetreteteees 171 Table 16 Flash Program Memory Protection Options 173 Tanle t 7 Parallel ort OPONSE site ete nace milena het 180 Wable 18 Temi MOlOGY serrin bones EEEN ES 181 December 15 2004 Document No 38 12002 Rev E v PSoC Designer Integrated Development Environment User Guide vi Document No 38 12002 Rev E December 15 2004 List of Figures List of Figures Figure 1 Systemi Version jcce
104. electa e The source code has been generated succ Figure 16 Application Editor Subsystem December 15 2004 Document No 38 12002 Rev E 27 PSoC Designer Integrated Development Environment User Guide To access the Output Status window any time while in any subsystem click the Output View icon Last if you are in the Debugger subsystem you will see the same active windows as in Application Editor plus CPU register RAM Bank Flash data reg ister and Watch Variable windows example_pwm_with_db_28pin CY8C27443 PSoC Designer File Edit View Project Config Build Debug Program Tools Window Help example_pwm_with_db_ Sy Source Files Select user r E boot asm Select a F 00 00 PH main asm oo 00 Fe Headers Place user mc oo oo 4D Library Source Global rez Library Headers vci oo o0 Extemal Headers yc2 oo oO 4 flashsecurity tst oo o0 PWMDB16 1 Clock Enable Period Pulse Interur PUMOuty DeadTir Phasel Phase2 DeadBar Ki Zl Starting MAKE 4 creating project mk lib amux4_1l asm lib psocconfig asm lih neneennfidathl asm Figure 17 Debugger Subsystem Click the arrow in the upper corner of an active window to expand or col lapse the placement Click the x to close Use the View menu to re open closed windows 28 Document No 38 12002 Rev E December 15 2004
105. er 25 Project Settings 31 Compiler 31 Debugger 41 Device Editor 36 Linker 37 Project Settings Device Editor Configuration Initialization Type 36 Enable Configuration Name Prepending to Pin Name 36 Interrupt Generation Enable 35 Project Update User Modules 45 Project View 25 Purpose 5 R Re activate Document 46 Requirement Checklist Hardware 7 Performance Factors 9 Software 8 Resize Windows 27 Resource Manager 67 December 15 2004 S Save Options 46 Section Overview 6 Setting Bookmarks 157 Shadow Registers 129 Source Files Generated by Generate Application Files 103 Support 6 System Interface 21 T Toolbars 46 Tools Options 43 Builder 43 Compiler 44 Debugger 44 Design Rule Checker 46 Device Editor 45 Editor 46 Toolbars 46 Trace Log Options 44 Troubleshooting 179 Dedicated Parallel Port 179 Two Minute Overview 1 U User Module Selection View 62 User Modules Clear Placements 70 Deploying Interconnectivity 82 Global Resource Details 77 Global Resources 76 Interconnect View 92 Name and Rename 70 Next Allowed Placement 69 Parameters 75 Pin out View 92 Placing 67 Print Configuration 69 Remove 67 Restore Default Pin out 98 Restore Global Resource Default Settings 81 Selecting 62 Specifying Pin out 91 Toolbar 65 Tracking Device Space 100 Undo Place 70 V Version Control System 23 Version Build Service Pack 8 Document No 38 12002 Rev E 187 PSoC Designer Integrated Develo
106. ere the functionality of the PSoC device can be emulated and debugged To access assembly language source files click the Application Editor icon Ein the toolbar The project source files appear in the left frame source tree Double click individual files to appear in the main active window where you can add and modify code using the enabled edit icons The Microprocessor The MCU is an enhanced 8 bit microprocessor core It supports 8 bit opera tions and has been optimized to be small and fast The Internal registers are the Accumulator A the Flag Register F the Index Register X the Stack Pointer SP and the Program Counter PC All regis ters are 8 bits wide except PC which is composed of two 8 bit registers PCH and PCL which together form a 16 bit register December 15 2004 Document No 38 12002 Rev E 137 PSoC Designer Integrated Development Environment User Guide 8 2 1 8 2 2 8 2 3 138 Address Spaces There are three separate address spaces implemented in the Assembler Reg ister space REG data RAM space and program memory space The Register space is accessed through the MOV and LOGICAL instructions There are 8 address bits available to access the Register space plus an extended address bit via the flag register bit 4 The data RAM space contains the data program stack and space for variable storage All the read and write instructions as well as instructions which oper
107. es 142 Destination of Instruction Results 139 File Syntax 139 Instruction Format 138 Instruction Set 141 List File Format 140 The Microprocessor 137 Assembler Directives 3 140 B boot asm 108 Builder 143 Building a Project 143 C C Compiler 144 Clone Project 51 Change Parts 51 Migrate from Part 51 Move Project 52 Configuration Data Sheet 102 109 Configuration Methods 50 December 15 2004 Create a Project 47 Create New Project 51 Custom boot tpl 19 D Database Version Detection 18 Debugger 147 Breakpoints 156 Configuring Events 162 Connecting the Hardware 150 Connecting the Software 152 Connecting to the ICE 4000 via Parallel Port 148 Connecting to the ICE 4000 via USB Port 149 Connecting to the ICE Cube 149 CPU and Register Views 157 Debug Strategies 154 Downloading to Pod 153 Dynamic Event Points 161 Header to Device Pin Connections 171 Local Watch Variables 159 Menu Options 168 Programming the Part 169 Technical Support Systems 150 Trace 154 Trace Log Entries 156 Watch Variables 157 Debugger Components 147 Dedicated Port Card 42 Design Browser 115 Design Catalog 117 Auto resolve 117 Design Rule Checker 100 Running Design Rule Checker 101 Design Based Project 53 Development Kit 148 Device Editor 57 Interrupt Vectors 106 Documentation Conventions 2 Dynamic Re configuration 111 Add Configuration 111 Application Editor 123 Code Generation 120 Debugger 123 Delete Configuration 117 Design Browser I
108. es how to build a project and details transparent linker loader and librarian functionality Describes connecting to the In Circuit Emulator ICE and debugging and programming the project Describes the feature of modifying the default security set tings for Flash memory Cypress MicroSystems provides scheduled upgrades and version enhance ments for PSoC Designer free of charge You can order the upgrades from your distributor on CD ROM or better yet download them directly from the web under Software amp Drivers at http www cypress com Also provided at the web site are critical updates to system documentation To stay current with system functionality you can find documentation updates under Design Support gt gt Design Resources gt gt More Resources again at http www cypress com Document No 38 12002 Rev E December 15 2004 Section 2 Installation In this section you will learn recommended hardware and software require ments and how to optimally run PSoC Designer as well as how to install the system and update existing projects to compatibility 2 1 Hardware Requirement Checklist The following hardware specifications are required to run PSoC Designer System Requirements Minimum Recommended Processor Speed 500 MHz 1 GHz MB of RAM 256 MB 512 MB MB of Free Hard Drive Space 150 MB 200 MB SVGA Monitor Graphics High Color 16 Bit 1024x768 1280x1024 CD ROM Drive x Available EPP Parallel Port or USB Port
109. eters connects the User Module to the external pins and other User Modules Connecting to User Modules is accomplished through the output and input parameters of the PSoC Blocks The interconnec tion buses provide interconnection paths between the external pins and to other digital User Modules When you single click a User Module you can view its parameters under User Module Parameters Interconnect View To view all settings for a selected User Module use the drop down list in the lower left corner of the left frame December 15 2004 Document No 38 12002 Rev E 75 PSoC Designer Integrated Development Environment User Guide Once you place that User Module the parameters will be updated with appli cable names You can now make selections from the updated drop down lists as to the configuration for the PSoC blocks associated with the User Module User Module Parameters Control Clack Row_O_Output_0 DTMF Clk Period Cc 1 DTMF Clk Frequenc 1 DTMF Dialer Output AnalogOutBus_2 Tone Duration mSe 40 Tone Spacing mSec 10 Create APIs as BACKGROUND Figure 49 User Module Parameters 1 To update all User Module parameters click each drop arrow in parameter value fields and make applicable selections Some parameters are specified integer values You set these values as the non integer values by clicking the up down arrows But for integer values you can also double click the value and type over If you enter
110. execute the following 1 Click the Output text label on the on the digital block where your target User Module has been placed December 15 2004 Document No 38 12002 Rev E 85 PSoC Designer Integrated Development Environment User Guide 86 2 Select an option from the menu None Global_OUT_x for CY8C25xxx 26xxx or Row_x_Output_x for CY8C27xxx and beyond You will see your chosen option displayed with a connection next to the Out put text label Your choice option will also appear in the Output field under User Module Parameters where you can click the drop arrow to change your selection Selection of RBotMux for a CT Analog Block Note that the name RBotMux is determined by a specified User Module parameter To select an RBotMux for a CT analog block execute the following 1 Click the RBotMux text label on the analog block where your target User Module has been placed 2 Select an option from the menu You will see your chosen option displayed next to the RBotMux text label Your choice option will also appear in the RBotMux field under User Module Param eters where you can click the drop arrow to change your selection You can execute this same procedure when the NMux PMux AnalogBus or CompBus CT Analog Block apply as well as for ACMux BMux AnalogBus or CompBus SC Analog Blocks Row Broadcast Row Broadcast connections only apply to CY8C27xxx parts and beyond 1 Click the Row_0 Broadcast B
111. face and select Find Again from the menu Right click your mouse in the interface and select Help from the menu Right click your mouse in the interface and select About SVG Viewer from the menu Selecting User Modules Description Zooming out shrinks the view Original View takes you back to the original default view of the device interface Higher Quality displays the interface at a higher quality but loads slower Note that this will remain on until you remove the check from the menu Removing the check will dis play a lower quality view but load faster Find brings up a standard Find dialog box where you can search the entire interface regardless of how much of it is currently in view The result of the search is highlighted and panned but not zoomed into view Find Again automatically launches a search of the word or string for which you previously searched Help launches the help system pointing to Navigating Device Interface Adobe SVG Viewer is the engine that drives the device interface Here you will see ver sion and trademark information Selecting applicable User Modules is the first step after creating a project to configuring your target device A User Module is a pre configured function that once placed and programmed will work as a peripheral on the target device To access Device Editor click the Device Editor icon H By default you will be in the User Module Selection View mode of the s
112. from the menu 3 Select the device specific Global IN option from the second menu On the device you will see the designation color coded according to the legend along side the device The port name the Select column value of your chosen option and the drive mode of High Z will appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections You will also see a line between the digital input port and the Global IN vertical line Global_OUT_x Global_OUT_x connections apply to a PSoC device as follows CY8C25xxx 26xxx as Global_OUT_x CY8C27xxx and beyond as GlobalOUT Odd Even _x To set Global_OUT_x connections execute the following 1 Click on the target Port_x_x 2 Select the port from the menu Document No 38 12002 Rev E December 15 2004 3 Select the device specific Global OUT option from the second menu On the device you will see the designation color coded according to the legend along side the device The port name the Select column value of your chosen option and the drive mode of Strong will appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections You will also see a line between the Global OUT vertical line and the digital output port StdCPU To set StdCPU connections execute the following 1 Click on the target Port_x_x or 2 Select the port from the men
113. h_DB_28pin Amplifiers ann Analog Comm 2 FT Eanes P WMDB16_1 DACE_1 AMUX4_1 DACs Resource Meter Digital Comm Total Used Filters Digital Blocks 8 3 are Analog Blocks 12 1 RAM 256 0 Bete ROM 16384 140 pin Decimator 1 0 12C Controller 1 0 AMUX4 ae MUXI RefMux 4 to 1 Analog M Copyright 2001 2003 Cypress MicroSystems Inc All Rights Reserved Resources Required PSoC Blocks None Memory 24 Bytes Flash 0 Bytes SRAM Random Seq Pins 1 to 4 Ext Figure 39 User Module Data In the lower active window click the tab options Resources Overview Dia gram Features etc to view additional information regarding a chosen User Module If you right click your mouse anywhere inside the data sheet you can view or print its pdf as well as refresh the content and return to the top 64 Document No 38 12002 Rev E December 15 2004 In the User Module Toolbar click the first drop arrow to select a category and the second drop arrow to select a module from within the specified category Then click the User Module Block Diagram icon or User Module Data Sheet icon to view floating windows of the diagram and data sheet respec tively This option is available from within all three subsystems Application Editor Device Editor and Debugger The User Module toolbar can also be used in the Interconnect View af DACs z oacs Wd Figure 40 User Module Toolbar Once you have viewed and
114. halted at the ini tial function scope for example void cgentest_009 void uInt32 u32var0 uInt32 u32varl Local Variables will be displayed in the Local Name window once the debug ger halts at the first line of the function As discussed under Menu Options you can use the Single Step icon to step through the project lst file Array Types Added to Global and Local Watch Variables Array types have been added to both Global and Local Watch Variables Glo bal and Local Watch Variable array types must originate in C and not exported from an asm file For example char sC 5 signed char signedc 5 int siI 5 unsigned int uil 5 float fA 5 long slL 5 unsigned long uslL 5 shows declarations for all the supported array types Document No 38 12002 Rev E December 15 2004 The following shows the Watch Global Name window after the array types were added 10 4 7 Weatch Global Name Value sC 0x00 0x00 0x00 0x00 0x00 sil 0x0000 0x0000 0x0000 0x0000 0x0000 signedC 0x00 0x00 000 0x00 0x00 sil 0x00000000 0x00000000 0x00000000 0x00000000 0 00000000 uil 00000 0x0000 0x0000 0 0000 0 0000 usiL 000000000 000000000 000000000 0 00000000 0 00000000 Figure 75 Array Type Variables The elements are displayed horizontally separated by commas in both the Watch Global Name and Local Name windows The radix can be changed from decimal to hexadecimal for all array types except floats
115. his error message occurs by starting the installation pro cess and not pressing any Next buttons then starting the installation process again resulting in two instances of the installation Resolution Proceed gracefully through installation to completion You can uninstall PSoC Designer after a successful installation by running installation again and selecting Remove 2 Upon opening Application Editor after an upgrade installation of PSoC Designer my screen system window is blank The source tree and sta tus window are not in view Possible Cause This possibly occurs if you upgrade PSoC Designer on Win dows 2000 Resolution Access Application Editor Click your cursor at the far left of the screen and drag the source tree into view Repeat at the bottom of your screen to drag the status window into view 3 would like to install a PCI or PCMCIA parallel card to provide a Dedi cated Parallel Port Symptom For whatever reason want need a dedicated parallel port Possible Cause Not applicable Resolution In the event that all efforts to get the onboard parallel port to work with the Cypress MicroSystems PSoC ICE have failed or if you prefer a dedi cated parallel port adding an after market parallel port is an alternative Cypress MicroSystems has tested two parallel port cards with systems that have not connected using the onboard parallel port Both cards have proven to work with these systems One of these
116. ho are ready to configure and program the chip but need a quick point in the right direction Make sure you have the latest version of the soft ware Now we only have a minute and a half left Overview 35seconds You have the device PSoC Designer and the vision This guide provides installation procedures interface overview instructions for creating a project instructions for configuring the device instructions for dynamically re configuring the project instructions for editing assembly source files instructions for compiling files instructions for building the project instructions for debugging the project instructions for Flash memory protection Basics 30 seconds PSoC Designer contains three subsystems Device Editor Application Editor and Debugger Start by creating a project 1 Create a project 2 Configure device in Device Editor jj 3 Edit source files in Application Editor 4 Debug project in Debugger i Quick 15 seconds Click a hyperlink to reference key material Reference Installation Using the IDE Creating a Project Troubleshooting Bottom 10 seconds Programmable System on Chip PSoC Designer empowers Line you to customize the functionality you desire into the device g Time s up December 15 2004 Document No 38 12002 Rev E 1 PSoC Designer Integrated Development Environment User Guide Documentation Conventions Following are easily identifiable
117. hoose Destination Location December 15 2004 Document No 38 12002 Rev E 13 PSoC Designer Integrated Development Environment User Guide 6 At the Select Program Folder screen click Next to accept the default folder of Cypress MicroSystems in which to add system icons If you prefer you can type a new folder name in the Program Folders field or select an exist ing folder from the Existing Folders field PSoC Designer Setup Exi Select Program Folder Please select a program folder Setup will add program icons to the Program Folder listed below You may type a new folder name or select one from the existing folders list Click Next to continue Program Folders Existing Folders Administrative Tools Adobe Acrobat 4 0 GlobalSCAPE HP ScanJet Software HTML Kit Java 2 Runtime Environment Microsoft Office Tools Netscape Communicator xl InstallShield lt Back Cancel Figure 7 Select Program Folder Document No 38 12002 Rev E December 15 2004 7 Atthe Start Copying Files screen scroll to review your current settings If you are satisfied click Next If not click Back to return to view and or mod ify settings in a previous screen PSoC Designer Setup Start Copying Files Review settings before copying files Installshield Figure 8 Start Copying Files December 15 2004 Document No 38 12002 Rev E 15 PSoC Designer Integrated Development Environment User Gui
118. ick the blue flag icon in the toolbar Use the other flag icons to advance to and or clear bookmarks CPU and Register Views There are five accessible watch windows that are readable and write able during debugging They are CPU Registers Bank Registers 0 1 RAM and FLASH accessed at View gt gt Debug Windows The CPU Register window allows you to examine and change the contents Click the drop arrow to access a register then double click and type over the value New to 4 2 is a multi RAM memory page drop down for CY8C29x66 devices CPU register values can be viewed in blue across the bottom of PSoC Designer Each register is viewable by clicking the applicable lower tab of the Registers window Double click on a location and enter a new value to update the loca tion s value The current status of all locations can be saved to a txt file by right clicking at the top of the window and selecting Save or Save As Use caution when changing register values they can alter hardware func tions Watch Variables Watch Variables can be set at Debug gt gt Watch Variables or by right clicking Add in the Watch Global Name window In the ASM Watch Properties dialog box you can specify the address you wish to view the label for the location the data type located at the address the location as either RAM or FLASH space December 15 2004 Document No 38 12002 Rev E 157 PSoC Designer Integrated Development Envi
119. iew Zooming out shrinks the view Zooming in on a region enlarges a specified portion of the interface view Preserving the aspect ratio maintains the proportion of your view as you pan and zoom around the interface Note that this will remain on until you remove the check from the menu Showing allowed connections highlights all possible connections with a red green fan each time you click a drop down list of options Note that this will remain on until you remove the check from the menu Showing tool tips enables definitions as you hover your mouse over images in the inter face Note that this will remain on until you remove the check from the menu Printing allows you to print the device inter face Zooming in enlarges the view Document No 38 12002 Rev E 61 PSoC Designer Integrated Development Environment User Guide Table 6 Feature Zoom Out Original View Higher Qual ity Find Find Again Help About SVG Viewer 5 2 Navigating Device Interface continued Action Right click your mouse in the interface and select Zoom Out from the menu Right click your mouse in the interface and select Original View from the menu You can also use the menu at View gt gt Inter connection View Right click your mouse in the interface and select Higher Quality from the menu Right click your mouse in the interface and select Find from the menu Right click your mouse in the inter
120. igh Z High Z Analog Open Drain High Open Drain Low Pull Down Pull Up Strong and Strong Slow To specify a port drive mode execute the following 1 Click on the target Port_x_x 2 Select the target Port_x_x_Drive from the menu 3 Select the port drive mode option from the second menu The port name and the drive mode of your choice will appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections Port Interrupt ChangeFromRead Document No 38 12002 Rev E December 15 2004 To specify ChangeFromRead interrupt execute the following 1 Click on the target Port_x_x 2 Select the target Port_x_x_Interrupt from the menu 3 Select ChangeFromRead from the second menu The port name and ChangeFromRead will appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections Disablelnt To disable interrupts execute the following 1 Click on the target Port_x_x 2 Select the target Port_x_x_Interrupt from the menu 3 Select Disablelnt from the second menu The port name and DisablelInt will appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections FallingEdge To specify FallingEdge interrupt execute the following 1 Click on the target Port_x_x 2 Select the target Port_x_x_Interrupt from the menu 3
121. iguration placed in PSoc Config asm and updated during the build process December 15 2004 Table 4 Assembly S Found near the C of C file Project SOC Project directory Database Template tpl Installation direc tory under Tem plates then copied to project directory Text xt Project directory Document WNP File wnp Project directory XML xml Project directory Document 1 December 15 2004 File Types and Extensions continued Assembly generated from the C source code Project file accessed under File gt gt Open Project Template files used to generate project files boot tp gt gt boot asm Text document that contains system infor mation Persistence file unique to PSoC Designer Contains project information restored each time the project is opened Device resource file If you are using a version control system to track project process copy the above checked files including m8c inc as the only inc file and not including boot asm as it is recreated during the device configuration process Also include any NT asm files that have been modified All other project files will be regenerated during the device application configuration process gP Document No 38 12002 Rev E 23 PSoC Designer Integrated Development Environment User Guide 24 Most of these files are editable and appear in the left frame of the system inter face inside the folder bearing the project nam
122. igure 65 Add New File The Browse button will only be enabled if you uncheck the Add to current project field 5 When finished click OK Click Cancel if you wish to cancel the operation Your new file will be added to the file source tree and appear in the main active window You are also able to add other source files to your project either C or assembly even if these source files already exist somewhere else on your computer Do this by accessing Project gt gt Add to Project gt gt Files and iden tifying the source file by locating the file with the file dialog Keep in mind that you will be adding a copy of your original file to the project not the origi nal itself See PSoC Designer C Compiler Language User Guide for further options and guidelines For high level guidance on programming assembly language source files see Assembler in this user guide For comprehensive details see PSoC Designer Assembly Language User Guide December 15 2004 Document No 38 12002 Rev E 133 PSoC Designer Integrated Development Environment User Guide 7 5 Removing Files You can remove files from your project one of three ways Either comment out an unwanted file through code manipulation remove the file by clicking once to highlight it in the source tree and accessing Project gt gt Remove from Project or right click the file in the source tree and select Remove from Project Delete key The second and third actions re
123. ild activity Each time you build your project the Output Status window is cleared and the current status entered as the process occurs Lele Starting MAKE a creating project mk no changes name translation failed on C Program Files Cypress MicroSystems P CAUTION lib psocconfig asm is older than PSoCConfig xml or miss CAUTION you may need to generate source in PSoC Designer make No rule to make target dsp a needed by expanded_lib_ Linking IE boot asm 0 undefined symbol _Timer8_1_InterruptService D Software Cypress MicroSystems PSoC Designer tools make oui d3 3 error s 0 warnings s Lc gt Build 4 Debug j Program Find in Files 1_ J 4 gt Figure 67 Output Status Window To save all open files in Application Editor click File gt gt Save All When the build is complete you will the see the number of errors and warn ings Zero errors signify that the build was successful One or more errors indi cate problems with one or more files and therefore the program image hex file will not be available to download to the ICE For a list of all identified compile and build errors with solutions see PSOC Designer Assembly Language User Guide C Compiler The Cypress MicroSystems PSoC family of devices and PSoC Designer cur rently support one high level C language compiler iMAGEcraft Even if you have never worked in standard C language before this system reso
124. in their Flash Program Memory The security or protection can be set from within PSoC Designer on a per project basis A simple text file called flashsecurity tx is used as the medium for the Flash security This text file contains comments describing how to alter the Flash security PSoC Designer validates the correctness of the Flash security data before it is used December 15 2004 Document No 38 12002 Rev E 173 PSoC Designer Integrated Development Environment User Guide 11 2 174 flashsecurity txt and Application Editor The FPMP file flashsecurity txt is added to each new project and appears in the source tree example_dynamic_pwm files Source Files E Headers E Library Source E Library Headers External Headers Mapflashsecurity txt 4 Files Figure 80 flashsecurity txt in Source Tree PSoC Designer will also add the FPMP file to a cloned project This is espe cially useful when cloning projects that were created with earlier versions of PSoC Designer because earlier versions did not carry this feature Note that if you do clone a project created in an earlier version of PSoC Designer you will be prompted to update your project See Project Update If for some reason flashsecurity txt is missing or was deleted from the project the default behavior is to apply Mode Bit 11 Full Protection to the entire program memory The following information contains instructions on modif
125. ing the effect from high or low selection of Op Amp Bias refer to the applicable table in the data sheet for the part DC Operation Ampli fier Specifications ISOA To estimate the effect on AC op amp parameters refer to the applicable AC Operational Amplifier Specifications in the device data sheet A_Buf_Power A_Buf_Power allows the user to select the power level for the analog output buffers of the PSoC These buffers are used to supply internal analog signals to external pins on the PSoC Power levels may affect the frequency response and current drive capability of the output buffers Complete tables for the AC Analog Output Buffer Specifications and DC Analog Output Buffer Specifica tions are contained in the applicable device data sheet SwitchModePump An integrated switch mode pump circuit is available for operation of the device from very low voltage sources The pump requires a few external components and can be configured to automatically turn on as supply voltage drops Fur ther discussion of the switch mode pump can be found in chapter 30 of the PSoC Technical Reference Manual TRM Trip Voltage LVD SMP A precision POR circuit is integrated into the PSoC This parameter allows the user to select voltage levels that the PSoC will use to internally monitor its sup ply voltage Two levels are specified in the parameter with the syntax lt LVD SMP gt LVD is the value at which the internal Low Voltage Comparator will as
126. ion Filter Design Wizard is also available once you place a Band Pass Filter BPF2 and or Low Pass Filter LPF2 to futher configure the many options Once placed right click on the filter and select Filter Design Wizard December 15 2004 Document No 38 12002 Rev E 71 PSoC Designer Integrated Development Environment User Guide ernal_crystal_28pin CY8C27443 PSoC Designer Device Editor of x Project Config Build Debug Program Tools Window Help H g teja p aala m a nA A p A e SJAAL A ATIA R el m oa wll 8 0 5 ee on Ibs Selected User Modules 3 Example_Extemal_Crystal_28pin 3_MHz External Disable ADCINC14_1 DTMFDiale1 CRC16_1 Delete Rename oo Place Unplace 1 Select Color gt tas Block Diagram 1 Datasheet Properties User Module Selection Options Filter Design Wiza Select StdCPU 1 StdCPU Liza Crd P I r Figure 45 Filter User Module Options You can print from within the Filter Design Wizard If you add or remove User Modules after you have generated application files you will need to re generate the application files as well as reconfigure required settings For further details see Generating Application Files later in this section The I2CHW User Module will be unplaced if your project was created in PSoC Designer 4 0 Beta release Right click on
127. iption for bitfields to set when unloading a User Module and are set according to the type of PSoC block The exceptions are the UnloadConfigTBL_Total_Bankn tables which include the registers for unload ing all PSoC blocks boot asm The boot asm file is generated similarly to a project that has no additional con figurations unless there are one or more configurations that have User Mod ules placed in such a way that common interrupt vectors are used between configurations In this case the vector entry in the interrupt vector table will show the line ljmp Dispatch_INTERRUPT_n instead of a User Module defined Interrupt Service Routine New Files There are three new files that are generated when additional configurations are present in a project PSoCDynamic inc PSoCDynamic asm Document No 38 12002 Rev E December 15 2004 6 7 6 8 PSoCDynamicINT asm The names of the files may change in future releases but their functions will be the same regardless of the actual file names The PSoCDynamic inc file is always generated It contains a set of equates that represent the bit position in the active configuration status variable and the offset to index the byte in which the status bit resides if the number of con figurations exceeds eight A third equate for each configuration indicates an integer index representing the ordinal value of the configuration The PSoCDynamic asm file is always generated
128. is made but the original source file is not available in the project Step Into will then give the message No source available for step operation Step Over can be used instead of step into for this situation Programming the Part Programming the part occurs once debugging is complete By doing this you are storing the ROM data directly in the Flash memory of the part The Cypress MicroSystems device can be reprogrammed multiple times due to its Flash Program Memory Following is the Pod Programming Socket which is connected to the CAT5 Patch Cable Only the five required serial programming pins are available on the Program ming Socket These required pins are the same pins that make up the Serial Programming Header Vga Vss XREs P1 1 SCLK and P1 0 SDATA The Programming Socket cannot be used for emulation December 15 2004 Document No 38 12002 Rev E 169 PSoC Designer Integrated Development Environment User Guide Figure 78 ICE 4000 and YProgrammer Make sure the Pod is not connected to a circuit board your development board or the PSoC Pup when you program the part Otherwise program ming the part may fail To program the part perform the following steps 1 Place the part in the Programming Socket on the Pod Note the position of Pin 1 on the Programming Socket to ensure correct operation 2 Click on the Program Part icon Oy New to 4 2 this icon will launch PSoC Programmer as a standalone device
129. is modified so that the GPIO interrupt vector has an entry with the name ProjectName_GPIO_ISR Following are additional files that are generated PSoCGPIOINT asm PSoCGPIOINT inc PSoCGPIOINT asm contains an export and a placeholder so you can enter its pin interrupt handling code Enter user code between the user code markers where appropriate This file is re generated for each code generation cycle but the user code will be carried forward if it is within the user code markers When opening an old project that contains a PSOCGPIOINT asm file where user code is entered the user code must be copied from the backup copy in the Backup folder into the newly generated PSOCGPIOINT asm file PSoCGPIOINT inc contains equates that are useful in writing the pin interrupt handling code For each pin with enabled interrupt or custom name a set of equates are generated that define symbols for the data address and bit and for the interrupt mask address and bit associated with the pin The naming convention for the equates is December 15 2004 Document No 38 12002 Rev E 119 PSoC Designer Integrated Development Environment User Guide 6 6 6 6 1 120 CustomPinName_Data_ADDR CustomPinName_MASK CustomPinName_IntEn_ADDR CustomPinName_Bypass_ADDR CustomPinName_DriveMode_0O_ADDR CustomPinName_DriveMode_1_ADDR CustomPinName_IntCtrl_O_ADDR CustomPinName_IntCtrl_1_ADDR The CustomPinName used in the substitution is
130. isables C code generation for using the MAC If the MAC code generation is disabled software library routines for multiplication and addition will be inserted into the code The compiler switch to disable the C code generation for the MAC is Wf nomac Optimize math functions for speed This enable disable applies to 16 bit multiplications If you want to optimize math functions for speed you will have larger code size for the math oper ations The compiler s code generation effectively rolls out virtually the same code when multiplying multiple values When this feature is disabled the C code generation parameterizes the values that will be multiplied and calls a generic multiply routine The code is smaller in this case but due to the library function calls the execution time will be longer The compiler switch to optimize math functions for speed is on by default however to optimize the math functions for size the switch is Wf Osize Compiler data flow optimization This removes unnecessary assembly instructions from C files only Enable paging This enables or disables code that accesses additional RAM pages If this is disabled only one page of RAM will be used Stack page Stack page is not an option you can change in this dialog box However at your own risk you can change the stack page in your firmware by writing to the STK_PP I O register address 0xD1 The iMAGEcraft
131. ively long Debugger and Dynamic Re configuration PSoC Designer Debugger subsystem displays currently loaded configuration names and IO register labels during Debugger halts The IO register grid labels are compiled from the labels for all currently loaded configurations The names of loaded configurations are displayed in a new Debugger view The view is a new tab titled Config below the memory map which already contains RAM IO Banks 0 1 and Flash tabs December 15 2004 Document No 38 12002 Rev E 123 PSoC Designer Integrated Development Environment User Guide 6 8 1 6 8 2 6 8 3 124 The IO register labels modify the existing IO register bank grids The only dif ference is that in addition to setting IO register labels on entry to the Debugger labels are updated on M8C halts if the set of loaded User Modules has changed since the last halt The Debugger obtains the active configuration names from the runtime config uration data stored in M8C RAM This data is maintained by the LoadConfig and UnloadConfig routines generated by the Device Editor Active Configuration Display The set of currently active configurations is displayed in the Config tab of the memory map during Debugger halts The display lists all project configurations with the status for each currently loaded configuration marked Active Note that the display is not valid immediately after a reset The PSoC initial ization code must
132. ject dialog box click Create Design Based Project in the Select method field refer back to New Project Dialog Box Type a Project name and either type or Browse to designate a project directory 2 Click Next 3 Once you click Next you will be asked if you wish to create a new directory for the project with its new name Click Yes 4 Inthe Design Based Project dialog box click Design Browser to identify the design out of which you wish to create the project See Export and Import Designs to learn how to navigate the Design Browser as well as export and import design configurations If you wish to specify an alternative part device do so in the Select Base Part drop down Specify a programming language for the project main file December 15 2004 Document No 38 12002 Rev E 53 PSoC Designer Integrated Development Environment User Guide Finally select the subsystem in which you would like to begin Device Edi tor Application Editor or Debugger Create Design Based Project Figure 31 Design Based Configuration Dialog Box 5 When finished click Finish Your new project directory will be created and the project will display Importing make take a few minutes depending on the size of the design Design Import Status Figure 32 Design Import Status 54 Document No 38 12002 Rev E December 15 2004 4 3 Project Backup Folder PSoC Designer maintains a backup folder in the projec
133. le I O operations To enhance performance for certain user tasks such as code generation building linking and other key functions you can implement one some or all of the following options December 15 2004 Do not open projects across a network Run them from your resident machine Close down other applications and or background tasks Although PSoC Designer runs on a minimal configuration faster pro cessors have the greatest impact on performance Increasing RAM and CPU speed provides some improvement Because Windows Operating System hard drive files become frag mented over time reading operations can be greatly enhanced by defragmenting the hard drive This can be done with Window s built in defragmenter under Start gt gt Programs gt gt Accessories gt gt System Tools gt gt Disk Defragmenter For even better results use Norton Utilities Speed Disk RAXCO PerfectDisk or O amp O Defrag Document No 38 12002 Rev E PSoC Designer Integrated Development Environment User Guide 2 4 Installing the System Installing PSoC Designer on Windows NT 2000 XP requires user to have local Administrator permission To install PSoC Designer do the following estimated time is 2 4 minutes 1 Place Cypress MicroSystems PSoC Designer CD ROM in the drive and select Install PSoC Designer Introducing the Install PSoC Designer 4 2 Install PSoC Programmer 1 7 View Release Notes Tele Training Materials
134. le as such Fl flashsecurity txt x O 40 80 CO 100 140 180 1c0 200 240 280 2C0 300 340 380 3C0 Base Address ww vw y W W W W W W W W W W W Base Address 0 ww ww y W W W W W W W W W W W Base Address 400 U Ww U WVU y W W W W W W W W W W W Base Address 800 U U UW y W W W W W W W W W W W Base Address coo End 4K parts U Ww UW y W W W W W W W W W W W Base Address 100C U Ww UW y W W W W W W W W W W W Base Address 140C U U U W y W W W W W W W W W W W Base Address 180C U U U WU y W W W W W W W W W W W Base Address 1COC End 8K parts U U Ww WwW WwW W W W W W W W W W W W Base Address 200C U U Uw WwW y W W W W W W W W W W W Base Address 240C U U UW y W W W W W W W W W W W Base Address 280C U U UW y W W W W W W W W W W W Base Address 2COC U U U WV y W W W W W W W W W W W Base Address 300C ww ww y W W W W W W W W W W W Base Address 340C U U vw y W W W W W W W W W W W Base Address 380C U UW E U U W W W W W W W W W W W Base Address 3COC End 16K parts SS ey Figure 83 Unprotected Flash at 3C80h December 15 2004 Document No 38 12002 Rev E 177 PSoC Designer Integrated Development Environment User Guide 178 Document No 38 12002 Rev E December 15 2004 Appendix A Troubleshooting Appendix A Troubleshooting Following are solutions for some potential system problems 1 During installation of PSoC Designer receive an error message stating You can not expand the support files Possible Cause T
135. lso appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection In the device interface you will see that all lines from Port_1_5 have disap peared 12C SCL To set the 12C SCL connection execute the following this connection is only available for CY8C27xxx parts 1 Click on Port_1_7 P1 7 or December 15 2004 Document No 38 12002 Rev E 97 PSoC Designer Integrated Development Environment User Guide 5 5 2 5 5 3 98 2 Select Port_1_7 from the menu and 3 Select 12C SCL from the second menu On the device you will see the designation color coded according to the legend along side the device The port name 12C SCL and the drive mode of Open Drain High will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection In the device interface you will see that all lines from Port_1_7 have disap peared If at any time you wish to restore default pin out click the Restore Default Pin out icon Port Drive Port drive modes can be specified in one location three ways using the port icons in the device interface the port icons on the device pin out or in the Drive field of Interconnect View Port drive modes apply to a PSoC device as follows CY8C25xxx 26xxx options include High Z Pull Down Pull Up and Strong CY8C27xxx and beyond options include H
136. ment User Guide 10 2 6 152 For proper emulation the reset line XRes on the ICE Pod must be able to control all circuits to which it is connected This reset pin must be able to successfully transition from low to high and back again while sourcing a maximum of 5 mA of current in the high state Failure to allow for the ICE Pod to control this line will result in unreliable debugging and could poten tially damage the hardware Connecting the Software Once you have made the physical connection you are ready to make the internal connection from PSoC Designer to the ICE The ICE enables commu nication and debugging between PSoC Designer and the Pod To connect to the ICE from inside PSoC Designer perform the following steps 1 If you are using the ICE 4000 confirm that the Pod is connected to the ICE with the CAT5 Patch cable lt 1 ft in length If you are using the ICE Cube confirm that the Flex Pod is attached 2 Confirm that the USB or parallel port connection is secure from the ICE to the PC 3 If you are using the ICE 4000 confirm that the ICE is powered from the adaptor yellow LED on green LED off If you are using the ICE Cube confirm that it is powered from the adapter blue LEDs 4 Open a project Example projects are available 5 Click the Debugger icon 3 to access the Debugger subsystem using example project Example_PWM_28 pin from the Examples directory of PSoC Designer 6 Click
137. move the file permanently whereas the first action simply bypasses it All three ways are acceptable to PSoC Designer 7 6 Full Application File Search In addition to the standard Find Replace feature in PSoC Designer you can now search for specific text inside specific files To search for text in any single file or combination of multiple files execute the following 1 Click Edit gt gt Find in Files or the Find in Files icon 5 TT x Find what ART INTS MAS JT Match whole word only IV Look in subfolders In files file types 6 asm inc h I Match case J Output to pane 2 Cancel In folder E Ic Program Files Cypress MicroSystems PSoC Designer Examples E xample_4DC2UART M Figure 66 Find in Files Dialog Box 2 In the Find what field of the Find in Files dialog box type or click the drop arrow to choose a previously searched word Here you can search by standard grep Global Regular Expression Print methods grep searches the input files for lines containing a match to a given pattern list For options see grep pafin the Documentation Support ing Documents directory for PSoC Designer 3 Inthe In files file type field type or click the drop arrow to choose a previ ously searched file or file type Separate multiple files by semi colon 4 Click the box if you wish to search a different project directory than the directory of your currently open project Or click the drop arrow to
138. mport 115 Export 113 Document No 38 12002 Rev E 185 PSoC Designer Integrated Development Environment User Guide Export and Import Design Configurations 113 Global Parameters 118 Pin Settings 118 Port Pin Interrupts 119 Rename Configuration 118 E Edit Windows 29 Enable Output File Tree 46 Enabling the iMAGEcraft Compiler 44 Event Examples 164 Find Memory Write 164 Register A Value Trace On and Off and Match Count 167 Stack Overflow 166 Execute the Program 45 F File Types and Extensions 21 Headers 24 lib Librarian File Folder 21 Library Headers 24 Library Source 21 24 obj Objects File Folder 21 output File Folder 21 Source Files 24 Flash Program Memory Protection 173 Flash Program Memory Protection Options 173 G Generating Application Files 102 Global Variables 158 Glossary 181 ICE Connecting to the ICE 4000 via Parallel Port 148 Local Watch Variables 150 159 Power 42 Insert Spaces Instead of Tabs 46 Installation 7 Installing the System 10 Interconnect View 67 Interconnections Analog Clock Select 83 Analog Column Clock 84 Analog Column Input Mux 84 Analog Column Input Select 84 Analog Output Buffer 84 Comparator Analog LUT 86 186 Document No 38 12002 Rev E Connection to Global Input 87 Connection to Global Output 90 Digital Interconnect Row Input Window 87 Digital Interconnect Row Output Window 88 Global In 83 Global Out 83 Row Broadcast 86 Row Logic Table Input 88 Ro
139. ms Examples E xample_ Browse Design catalog Overwrite configurations with the same name Resolve configuration name conflicts Resolve name conflicts Specify base configuration Example_Dynamic_ yes O Second_PwM_1 no Example_Dynamic_PW Second_PwM_1 wf sex wf af tore ota Last modified July Nese _ Cancel Figure 64 Design Browser 2 Click Browse file system or Select from Design Catalog Browse file system In the Design file path field of Design Browser type 116 Document No 38 12002 Rev E December 15 2004 6 3 December 15 2004 the file path or click Browse to locate the cfg for the design you wish to import add to your open project Select from Design Catalog Design Browser displays all designs located in the Design Catalog folder in the PSoC Designer installation directory Here navigation is similar to navigation of the source tree Click once on the target design Design Catalog contains sample designs provided to you upon installation of PSoC Designer Once you have made a selection in the right frame you will see your con figuration related file corresponding to the chosen cfg You can view this file using the standard features of the application it launches Click whether you want to overwrite or resolve configuration name con flicts Note that you must resolve all User Module name conflicts If you choose to resolve you can either doubl
140. n When employing Dynamic Re configuration port pin settings are similar to glo bal parameters in that all settings in the base configuration are propagated to additional configurations When manually set port pin settings become local to the configuration Document No 38 12002 Rev E December 15 2004 6 5 1 Port Pin Interrupts To set port pin interrupts execute the following steps 1 Access Interconnect View of Device Editor 2 Click the drop arrow or tab that corresponds to the configuration view for which you wish to set port pin interrupts 3 The pin interrupt can be set in two places in the Pin Parameter Grid under the Interrupt column or through the pop up menu that appears when a pin in the pin out diagram is clicked In the Pin Parameter Grid access the drop down list by clicking the drop arrow in the Interrupt column and highlighting your selection In the pop up menu on the diagram the interrupt setting appears in the first list along with the select and drive options Clicking the Port Pin Interrupt option brings up the same drop arrow selection as in the Pin Parameter Grid Double click your choice The default pin interrupt setting is Disable If all pin interrupts are set to Dis able there is no additional code generated for the pin interrupts If at least one pin is set to a value other than Disable code generation performs some additional operations In boot asm the vector table
141. n display and the register label display should be checked Checking the displays after loading and unloading conflicting configurations is recommended December 15 2004 Document No 38 12002 Rev E 125 PSoC Designer Integrated Development Environment User Guide 126 Document No 38 12002 Rev E December 15 2004 Section 7 Application Editor In this section you will learn definitions and recommended usage of critical files as well as how to modify files generated by PSoC Designer add new files and remove unwanted files Before you begin adding and modifying files it is recommended that you take a few moments to navigate Application Editor take inventory of your current files and map out what you plan to do and how you plan to do it 7 1 File Definitions and Recommendations Once you have finished configuring your device and generating application code you are ready to program the desired functionality into the device This is done in the Application Editor subsystem Application Editor is where all source code programming editing and adding files takes place To access Application Editor click the Application Editor icon fj See Project Manager in section 3 to review subsystem navigation As discussed in Using the IDE you will see the file source tree in the left frame The files you see were generated when the project was created and updated after device configuration See File Types and Extensions for general facts
142. nalog Input To set Analog Input connections execute the following 1 Click on the target Port_O_x 2 Select the port from the menu 3 Select Analog Input from the second menu On the device you will see the new designation color coded according to the legend along side the device The port name and selection will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection You can execute the same procedure for Analog Output Buffer only select AnalogOutBuf_3 for step number 3 Default Input To set Default Input connections execute the following December 15 2004 Document No 38 12002 Rev E 93 PSoC Designer Integrated Development Environment User Guide 94 1 Click on the target Port_x_x 2 Select the port from the menu 3 Select Default from the second menu On the device you will see the designation color coded according to the legend along side the device The port name the Select column value of StdCPU and the drive mode of High Z Analog will also appear in the port related fields underneath User Module Parameters where you can click the drop arrows to change your selections Global_IN_x Global_IN_x connections apply to a PSoC device as follows CY8C25xxx 26xxx as Global_IN_x CY8C27xxx and beyond as Globalln Odd Even _x To set Global_IN_x connections execute the following 1 Click on the target Port_x_x 2 Select the port
143. nd unload only User Modules contained in the base configuration When the base configuration is unloaded the ReloadConfig_xxx function must be used to restore the base configuration User Modules The ReloadConfig_xxx function ensures the integrity of the write only shadow registers Respective load tables are generated for these functions in PSoCConfigTBL asm An additional unload function is generated as UnloadConfig_Total The UnloadConfig_ Total function loads tables UnloadConfigTBL_Total_Bank0 and UnloadConfigTBL_Total_Bank1 These tables include the unload registers and values for all PSoC blocks The active configuration status variable is also set to 0 The global registers are not set by this function The name of the base configuration will match the name of the project The project name will be changed to match the base configuration name if you change the name of the base configuration from the project name A C callable version of each function is defined and exported so that these functions can be called from a C program PSoCConfigTBL asm PSoCConfigTBL asm contains the personalization data tables used by the functions defined in PSoCConfig asm For static configurations there are only two tables defined LoadConfigTBL_projectname_BankO and December 15 2004 Document No 38 12002 Rev E 121 PSoC Designer Integrated Development Environment User Guide 6 6 3 6 6 4 122 LoadConfigTBL_projectname_Ba
144. ndicates that the shown combination is electrically valid To specify interconnections click the Interconnect View icon in the Device Editor toolbar User Module interconnections consist of connections to surrounding PSoC blocks output bus input bus internal system clocks and references external pins and analog output buffers Multiplexers may also be configured to route signals throughout the PSoC block architecture Digital PSoC blocks are connected through the Global_IN and Global_OUT buses to external pins and to other digital PSoC blocks There are 8 Global_IN and 8 Global_OUT bus lines numbered 0 through 7 For external pin connec tions the number of the Global bus line corresponds to the bit number of the associated port For example Global_IN_0 can connect to pins associated with Port_0_0 Port_1_0 Port_2_0 etc The Global_OUT buses can drive the Document No 38 12002 Rev E December 15 2004 inputs to other digital PSoC blocks However all Global_OUT lines do not reach all digital PSoC blocks Refer to the device specific data sheets for details on the global bus interconnections When setting output parameters to the Global_OUT lines only one PSoC block can drive a single Global_OUT line at a time Global_OUT lines that are being used by a User Module are not available to other User Modules for out put For example if two timer User Modules are placed and the first timer is set to use Global_OUT_1 for output a
145. ne BUNGALOW BUNGALOW define HOUSE HOUSE The macro definition can use any of the above values for example FOO HOUSE Your C code does not have to change for example cstrcepy sSomeArray FOO Copy the string HOUSE to an array Multiple macro definitions can be used in the Macro define field The rule is to separate the macros with white space e g a space character one or more or a comma 3 Macro undefines The Macro undefines field blocks or negates corresponding macro defini tions The syntax for a macro undefine is lt name gt December 15 2004 Document No 38 12002 Rev E 33 PSoC Designer Integrated Development Environment User Guide 34 No value can be entered Undefines are useful to temporarily take away a macro You can add multiple undefines using the same mechanism described in the Macro defines section Enable MAC The MAC or Multiplier Accumulator is built in hardware that performs 8 bit multiplication operations quickly A problem can crop up if the MAC is being used in both non interrupt and interrupt code It would be possible to have non interrupt code begin executing the instructions that set up the MAC operation then be interrupted by an Interrupt Service Routine that also uses the MAC This simultaneous use of the MAC will likely cause one the non interrupt code of the code domains of the MAC to get invalid results This option enables or d
146. ngle rom file with absolute addressing Building your project in PSoC Designer links all the programmed functionality of the source files and loads it into a rom file which is the file you download for debugging and programming Compiling in PSoC Designer takes the most prominent open file and translates the code into object source code with relative addresses PSoC Designer subsystem where users debug and perfect project functionality One or more loadable configurations that can be exported from a project then imported and used in a new or existing project A load able configuration consists of one or more placed User Modules with module parameters Global Resources set pin outs and gen erated application files Venue to identify re usable designs for import to PSoC Designer projects PSoC Designer subsystem where users choose configure their device Document No 38 12002 Rev E 181 PSoC Designer Integrated Development Environment User Guide 182 Table 18 Digital PSoC Blocks Dynamic Re configu ration Family of Devices ICE 4000 ICE Cube IDE ISR Link Build M8C MCU MiniProg1 Pod PSoC PSoCEval1 PSoC Blocks PSoC Designer PSoC Programmer Terminology continued 8 bit logic blocks that can be given a personality The personality can be to act as a counter timer serial receiver serial transmitter CRC generator pseudo random number generator or SPI Dynamic
147. nk1 which support the LoadConfig_projectname function These tables personalize the entire global register set and all registers associated with PSoC blocks that are used by User Modules placed in the project For projects with additional configurations a pair of tables are generated for each LoadConfig_xxx function generated in PSoCConfig asm The naming convention follows the same pattern as LoadConfig_xxx and uses two tables LoadConfigTBL_xxx_BankO and LoadConfigTBL_xxx_Bank1 UnloadConfigTBL_xxx_Bank0 and UnloadConfigTBL_xxx_Bank1 are used by UnloadConfig_xxx The labels for these tables are exported at the top of the file The tables for the additional configurations loading function differ from the base configuration load table in that the additional configuration tables only include those registers associated with PSoC blocks that are used by User Modules placed in the project and only those global registers with settings that differ from the base configuration If the additional configuration has no changes to the global parameters or pin settings only the placed User Module registers are included in the tables The tables for additional configurations unloading functions include registers that deactivate any PSoC blocks that were used by placed User Modules and all global registers which were modified when the configuration was loaded The registers and the values for the PSoC blocks are determined by a list in the device descr
148. nt when switching to of the Window persistence field check Application Editor and or Debugger if you would like PSoC Designer to re activate the document that was previously open in either subsystem Check Insert spaces instead of tabs if you would like PSoC Designer to insert into your source file 4 spaces per Tab rather than a 4 space jump This allows you to type source anywhere inside a tab Finally you can uncheck Enable Output file tree if you want the Output tab to be accessible on the source tree in Application Editor Toolbars Under Tools gt gt Options gt gt Toolbars tab you can check or uncheck which tool bars you want to show or hide Design Rule Checker Under Tools gt gt Options gt gt Design Rule Checker tab you can specify the level of severity at which to run Design Rule Checker The lower the number the more critical the category specific rules See Design Rule Checker for particu lars Document No 38 12002 Rev E December 15 2004 Section 4 Creating a Project In this section you will learn how to create a project and select the device package and pin count You can create a new project from the initial dialog box or from within an existing project PSoC Designer provides a wizard to guide you through either process 4 1 Create a Project In order to program the desired functionality into the device you need to first create a project directory in which the files
149. o the appropriate element and discon nects from any other element If multiple connections to the same pin are desired connections must be made from the element to the pin For example suppose a connection to a pin an analog input mux and an analog output buffer simultaneously is desired Port_0_2 can connect to the analog input mux for column 1 and to the analog output buffer for column 3 The connec tions must be made from the analog input mux and the analog output buffer Setting the pin to Default disconnects the pin from both digital buses but does not affect analog connections Another difference in pin settings between PSoC Designer v 3 21 and v 4 0 is that 3 21 coupled digital output bus connections with a drive level so that the setting also set a drive level For example Port_0_0 had settings that included Global_OUT_0 Strong Global_OUT_0 Pull Down and Global_OUT_0O Pull Up In 4 0 the setting has been simplified to a single setting with the drive level set independently Port_0_0 has a single setting Global_OUT_0 and the drive level is set independently Projects created in earlier versions of PSoC Designer are automatically adjusted to this new convention without changing the drive setting as saved in the project Port Connection Port connections can be done in one location three ways using the port icons in the device interface device pin out or port related fields all inside Intercon nect View A
150. o the new boot tpl file 18 Document No 38 12002 Rev E December 15 2004 If there are User Modules that have a version number different from the application a dialog box will appear after the Project Update dialog If this project source is generated check the backup files for any changes that might be relevant Updated User Modules N Outdated User Modules The project contains one or more outdated User Modules The User Module API sources will automatically be updated You may have to modify the source code manually in order to avoid compilation errors NOTE The original handlers will be in the project backup folder Cut and Paste the custom handler code into the new handler routine Figure 12 Outdated User Modules Project Update has updated boot tpl the template for boot asm If you have modified boot tp in your previous version of PSoC Designer including ver sion 3 00 Project Update placed your custom file in the Backup folder of your project directory You can use this file for reference to manually modify the new boot tpl installed by Project Update To change the part for a project from CY8C25xxx 26xxx to CY8C27xxx and beyond you must clone See Clone Project for details If you are migrating a CY8C25xxx 26xxx part project to CY8C27xxx you must also manually use an _underscore label on all interrupt subroutines in each int asm file Note that there will be one int asm file per placed User M
151. ock as applies You will see a line from the right side of DBxxx to the input of the AnalogClock_x_Select Mux The mux switch shows a connection to this input Analog Column Clock To set Analog Column Clock connections execute the following 1 Click on the target AnalogColumn_Clock_x Mux 2 Select a device specific option from the menu You will see that the AnalogColumn_Clock_x Mux has a line connecting your chosen option to the mux output Analog Column Input Mux To set Analog Column Input Mux connections execute the following 1 Click on the target AnalogColumn_InputMUX_x 2 Select a port from the menu You will see a connection between the output of AnalogColumn_InputMUX_x and the analog input port Analog Column Input Select To set Analog Column Input Select connections execute the following 1 Click on the target AnalogColumn_InputSelect_x 2 Select appropriate AnalogColumn_InputMUX_x from the menu You will see that your chosen AnalogColumn_InputSelect_x has a line inside that connects the output of AnalogColumn_InputMUX_ x to its output Analog Output Buffer The Analog Output Buffers can be connected to the associated port pin or turned off To set Analog Output Buffer connections execute the following 1 Click on the target AnalogOutBuf_x 2 Select a port from the menu Document No 38 12002 Rev E December 15 2004 You will see a line that connects the AnalogOutBuf_x triangle to the analog
152. odule Updating User Modules places int asm files in the Backup folder December 15 2004 Document No 38 12002 Rev E 19 PSoC Designer Integrated Development Environment User Guide Migration from 4 0 to later versions is automatic for most User Modules If the old project contains user code in int asm files check the copy of the old file in the Backup folder for user code markers User code markers are comment lines that contain the text PSoc_UserCode_xxx and PSoC_UserCode_END If the old file contains these markers then the update is automatic lf the markers are not present the user code must be manually copied from the old file to the newly generated file The user code must be placed in appropriate locations between valid user code markers Once the user code is copied the code will be carried forward every time the User Module source files are generated 20 Document No 38 12002 Rev E December 15 2004 Section 3 Using the IDE 3 1 3 2 In this section you will learn fundamentals of the system interface as well as how to use project settings and tool options System Diagram PSoC Designer Device Editor Application Editor Debugger Subsystem Subsystem Subsystem Figure 13 PSoC Designer Subsystems To start PSoC Designer go to Start gt gt Programs gt gt Cypress MicroSystems gt gt PSoC Designer File Types and Extensions When you create a proj
153. oes not connect make sure the ICE is connected to the correct parallel port and the Pod is connected to the ICE Also verify that the parallel port was installed correctly per the manufacturer instructions The PC may need to be restarted after installation of the parallel port If the PC is restarted verify the correct parallel port is selected when re entering PSoC Designer 180 Document No 38 12002 Rev E December 15 2004 Appendix B Glossary Appendix B Glossary The following system and industry terminology is used throughout the PSoC Designer suite of product documentation Table 18 Term Active Windows Analog PSoC Blocks API Application Editor Assemble Com bined with Compiling Build Link Compile Combined with Assembling Debugger Design Export Import Design Browser Device Editor December 15 2004 Terminology Definition Subsystem related windows that are open and workable Basic programmable op amp circuits There are SC switched capacitor and CT continuous time blocks These blocks can be interconnected to provide ADCs DACs multi pole filters gain stages and much more Application Programming Interface APIs for source programming are created during application code generation in Device Editor PSoC Designer subsystem where users edit and program C Com piler and assembly language source files Assembling in PSoC Designer translates all relative addressed code into a si
154. oices of full scale values also offer a number of options These full scale values may be based on the PSoC internal references or on external input voltages The fullscale values present constraints similar to those for Agnd in terms of Vdd variation and absolute range of input output Individual design criteria will dictate the best selection for the Agnd and full scale values Fur ther discussion of the analog reference can be found in chapter 21 of the PSoC Technical Reference Manual TRM AgndBypass A provision is made in some versions of the PSoC device to provide an exter nal Agnd bypass capacitor to reduce the small amounts of switching noise present on the internal Agnd This feature can be switched on and off using the AgndBypass global parameter Typical values for the external bypass capaci tor are 0 01 uF and should not generally exceed 0 1 uF December 15 2004 Document No 38 12002 Rev E 79 PSoC Designer Integrated Development Environment User Guide 80 Op Amp Bias Higher speed bandwidth lower output impedance Performance of the internal op amps can be tailored based on the application under development by selecting high or low bias conditions for the analog sec tion of the PSoC Choosing high bias will cause the op amp to consume more current but will also increase its bandwidth and switching speed and lower its output impedance To estimate the current and power consumption per op amp block includ
155. olbar December 15 2004 Document No 38 12002 Rev E 67 PSoC Designer Integrated Development Environment User Guide In the left frame you will see User Module Parameters and Global Resources In the upper window you will see your selected User Modules In the main win dow you will see the device interface as well as device pin out example_external_crystal_28pin CY8C27443 PSoC Designer Device Editor File Edit View Project Config Build Debug Program Tools Window Help a tay BG 28 6S aB sT a aan emt ini 2 AK4A 4 HHL A AlOS r emro Global Resources a Eind cii gg Example_Extemal Crystal z Janes yJfaocnci2 ed Selected User Modules 3 Example_External_Crystal_28pin CPU_Clock 32K_Select PLL_Mode Sleep_Timer V C1 SysCik N VC2 VC1 N V C3 Source V C3 Divider crci 61 7 User Module Parameters 3_MHz External Disable 1_Hz 1 1 SysClk 1 1 ba a amp 2 ADCINC14_1 DTMFDiale1 CRC16_1 band Port Select PO O PO 1 68 Port_O_2 PO 2 StdCPU Port_O_3 POR StdCPU Port_O_4 PO StdOPU Por_O_5 POLS StdOPU PortO_6 POE StdOPU PorO_ POM StdCPU Port_1_O P1 0 StdCPU P1 1 StdCPU StdCPU StdCPU Figure 43 Selected yet to be Placed
156. on named in the tab and drop arrow selection That is the currently loaded working configuration 3 Proceed as usual with the configuration process i e selecting and plac ing User Modules setting up parameters and specifying pin out One strict requirement for Dynamic Re configuration is that User Module instance names must be unique across all configurations This requirement eliminates confusion in code generation Otherwise all other icon and menu item functions are identical to projects that do not employ additional configurations Additional configuration tabs will appear in alphabetical order from left to right beginning after the base configuration tab Document No 38 12002 Rev E December 15 2004 6 2 6 2 1 Export and Import Designs Exporting and importing designs can be done using the Design Browser fea ture in PSoC Designer A design is a single or collection of existing loadable configuration s from a project A loadable configuration consists of one or more placed User Modules with module parameters Global Resources set pin outs and generated application files PSoC projects can consist of one or multiple loadable configurations Exporting and importing designs allows you to efficiently use and re use tested and proven configurations thus saving design time and resources You can also create new projects based on exported designs See Design Based Project for details Export
157. pcode is contained in the upper 4 bits of the first instruction byte and the destination address is stored in the remaining 12 bits For program memory sizes larger than 4 kilobytes a three byte format is used Addressing Modes Ten addressing modes are supported Source Immediate Source Direct Source Indexed Destination Direct Destination Indexed Destination Direct Document No 38 12002 Rev E December 15 2004 8 2 4 8 3 Immediate Destination Indexed Immediate Destination Direct Direct Source Indirect Post Increment and Destination Indirect Post Increment For exam ples of each see PSOC Designer Assembly Language User Guide Destination of Instruction Results The result of a given instruction is stored in the destination which is placed next to the opcode in the assembly code This allows for a given result to be stored in a location other than the accumulator Direct and Indexed addressed Data RAM locations as well as the X register are additional destinations for some instructions The AND instruction is a good illustration of this feature i2 second instruction byte i3 third instruction byte Table 10 Destination of AND Instruction Syntax Operation AND A expr acc lt acc amp i2 AND A expr acc acc amp i2 AND A X expr acc acc amp x i2 AND expr A i2 acc amp i2 AND X expr A x i2 lt acc amp x i2 AND expr expr i2 lt i3 amp i2
158. pecified text ar Replace Text Edit gt gt Replace Ctrl H Replace specified text Sy Find in Files Edit gt gt Find in Find specified text in Files specified file s h Repeat Find Repeats last find ae Set Editor Options Set options for editor G Undo Edit gt gt Undo Ctrl Z Undo last action Redo Edit gt gt Redo Ctrl Y Redo last action Note that in all source files the maximum number of characters allowed per line is 2 048 The maximum per word is 256 These limits are imposed by the PSoC Designer development software Adding Files Adding files to your project or for use with other projects is essential for com plete well balanced device functionality To add a file 1 Click on the New File icon or select File gt gt New 2 Inthe New File dialog box select a file from the File type field For general facts about these files refer back to File Types and Extensions 3 In the File name field type the name for the file Document No 38 12002 Rev E December 15 2004 4 Inthe Location field you will see that your current project directory is the default destination for your file Uncheck the Add to current project field and click Browse to identify a different location if you do not want the default SE I IU x File type File name DB C Header File Location fay MSC Assembler Source File E M8C Assembler Include File C Text File V Add to current project Gt Cancel F
159. pment Environment User Guide WwW Watch Variables Array Types 160 Global 158 Local 159 Window Options 29 Window Persistence 46 Write Only Register Shadows 129 188 Document No 38 12002 Rev E December 15 2004 Document Revision History Document Title PSOC Designer Integrated Development Environment User Guide Document Number 38 12002 Revision ECN Issue Date Origin of Change Description of Change i 115168 4 23 2002 New release of PSoC Designer New document to CY Document Con version 3 20 trol Revision Revision 1 16 for CMS customers A New release of PSoC Designer Updates to export configurations and version 3 21 Design Browser import Code Compressor UI windows for Device Editor B New release of PSoC Designer Dynamic Rule Checking version 4 0 Event Examples Debugger features Update system requirements New release of PSoC Designer me Cc Weta Zia USB Adapter ICE Cube New device family group D New release of PSoC Designer PSoCEval1 MiniProg1 version 4 2 PSoC Programmer Software Device interface functionality TRM Index format 2E Release of 4 2 SP2 New compiler settings Distribution External Public Posting None
160. put Project Manager PSoC Designer contains three subsystems Device Editor Application Editor and Debugger The interface is split into several active windows that differ depending on which subsystem you are in If you are in the Device Editor subsystem by default you will see a User Mod ule window a User Module selection window a resource manager window and two User Module information windows which include a block diagram and data sheet for the chosen modules H December 15 2004 Document No 38 12002 Rev E 25 PSoC Designer Integrated Development Environment User Guide example_pwm_with_db_28pin CY8C27443 PSoC Designer Device Editor File Edit View Project Config Build Debug Program Tools Window Help B k g oela paalam aaa Aam ew CEI E E S2 ANKA Al aa ARa a e P EPE j gt a a c Ere ae e os o aE ADCs Selected User Modules C Example_PWM_with_DB_28pin Amplifiers Analog Comm Counters PwMDB16_1 DACE_1 AMU4_1 Locs Resource Meter Digital Comm Total Used Fies Digtal Blocks 8 3 z Analog Blocks 12 1 Generic gt RAM 2356 0 Mino Digtal ROM 16384 140 MUKs Decimator 1 0 12C Controller 1 0 AMUX4 ae MUX RefMux Copyright 2001 2003 Cypress MicroSystems Inc All Rights Reserved Resources Required PSoC Blocks None Memory 24 Bytes Flash 0 Bytes SRAM Random Seq Temperature TF Resources 1 to
161. r project See Application Editor for further details on this subsystem December 15 2004 Document No 38 12002 Rev E 29 PSoC Designer Integrated Development Environment User Guide 3 5 Output Status Window The Output Status or error tracking window of Application Editor is where the status of file compiling assembling and project building resides x i 30 Generating source code for Device Configuration The source code has been generated successfull Ff Buita A Debug Program J Fran Fies 1 AF Figure 20 Output Status Window Each time you compile assemble files or build the project the Output Status window is cleared and the current compilation status entered as the process occurs When compiling or building is complete you will the see the number of errors Zero errors signify that the compilation assemblage or build was successful One or more errors indicate problems with one or more files Such errors include missing input data and undeclared identifier For a list of all identified compile and build errors with solutions see Section 8 Compile Assemble Error Messages in PSoC Designer Assembly Language User Guide For further details on compiling and building see Builder in this user guide In PSoC Designer version 3 2x or higher you can right click your mouse in the Output Status window and either copy or clear specified contents In PSoC Designer version 3 2x or higher you can
162. r decisions December 15 2004 Document No 38 12002 Rev E 87 PSoC Designer Integrated Development Environment User Guide 3 Click the Close button when finished In this floating window you can also click the white box to toggle the Syn chronization value for Row_x_Input_x Options include SysClk_Sync and Async Digital Interconnect Row_0_Input_2 x RIO 2 SysClk_Syne Ary Asyne Figure 52 Synchronization Options for Digital Interconnect Row Inputs 5 4 2 Digital Interconnect Row Output Window Digital Interconnect Row Output Window connections only apply to CY8C27xxx parts and beyond Row Logic Table Input To set Row Logic Table Input connections execute the following 88 Document No 38 12002 Rev E December 15 2004 1 Click on the target Row_x_Output_x Logic Table Box Digital Interconnect Row_0_Output_0 x Figure 53 Digital Interconnect Row Output 2 Click on the Row_x_LogicTable_Input_0 Mux in the Digital Interconnect Row Output floating window and select an input or output option from the menu 3 Click the Close button when finished You will see connections on the device interface reflecting your row input or output selection Row Logic Table Select To set Row Logic Table Select connections execute the following 1 Click on the target Row_x_Output_x Logic Table Box December 15 2004 Document No
163. ract the library module foo o ilibw a libname ilibw d libname ilibw t libname ilibw x libname oo wo ow The library archive file will be created if it did not previously exist when the add update librarian action is invoked 5 Enable 24 MHz alignment shift Some of the silicon for CY8C25xxx 26xxx devices contained an errata con dition that involved unpredictable results when code execution occurred through certain code bytes at certain code locations while running at 24 MHz This option enables disables the software fix up for this condition The alignment shift is implemented by adjusting or incrementing the start of the relocatable area text area by the correct number of bytes that will avoid the 24 MHz condition The Build output status window will display messages that show the num ber of errata conditions the number of code shifts applied and the success or failure of the fix up This option setting is disabled by default You should enable it if you know you will be running at 24 MHz anytime during program execution This setting is only available for the CY8C25xxx 26xxx device family It does not appear for newer PSoC device families 6 Enable silicon errata warnings This setting enables or disables warning messages associated with CY8C25xxx 26xxx silicon errata The warning messages appear in the Build tab of the Output Status window when certain project settings may be susceptible to an errat
164. rameters of the PSoC Blocks The interconnection buses provide intercon nection paths between the external pins and to other digital User Modules Connections are shown as lines between elements special symbols or flag connectors The flag connectors are used when the connection is made to a point where drawing a line could result in a cluttered display with the legend indicating the origin of the connection Connections to pins are shown as lines from interconnection buses The interconnection bus structure depends on the PSoC device selected and can consist of a single level of buses or two levels of buses between the digital PSoC blocks and the pins Connections between analog PSoC blocks and pins are accomplished through the analog input muxes and output buses The muxes connect directly to pins and there is always only one level of output buses between analog PSoC blocks and output pins The pin names are duplicated in several places since they are multifunction and they are highlighted when used with lines showing their current connec tion state The location of the pin to which a line is drawn indicates the usage of the pin Lines drawn to the pins on the left edge indicate that the pins are used as inputs while the right edge indicates usage as output Pins in the upper groups indicate connection to the digital network while lower groups indicate analog connections When lines are drawn to multiple locations to the same pin this i
165. rconnect View you can press the Space Bar to rotate and see the placement options around the anchor block of a multi block User Module Upon selection of User Modules with multiple topologies a selection wizard will appear from which you can specify a topology as well as print You can now print from within the Filter Design Wizard for User Mod ules that require additional options to be specified December 15 2004 Document No 38 12002 Rev E ix PSoC Designer Integrated Development Environment User Guide Execute Program feature allows you to generate source code build the project connect to the ICE and download to the Pod with just one click Under Tools gt gt Options gt gt Debugger tab you can specify Execute Go as part of the Execute the Program feature Execute Go takes the pro gram automatically on through connection and downloading and into debug run It will execute for as long as it can without hitting an error a break point or event break Debugger subsystem supports multiple RAM memory pages for the CY8C29x66 device family group The About PSoC Designer dialog box will now display Service Pack number as we look towards the future in version updates x Document No 38 12002 Rev E December 15 2004 Two Minute Overview This two minute overview of PSoC Designer Integrated Development Envi ronment User Guide was purposefully placed up front for you advanced engi neers w
166. replaced by the name entered for the pin during code generation Custom pin naming allows you to change the name of the pin The name field is included in the pin parameter area of the pin out diagram The Name column in the Pin Parameter Grid shows the names assigned to each of the pins The default name shows the port and bit number Double click the name field and type the custom name Note that the name must not include any embedded spaces The effect of the name is primarily used in code generation when the pin inter rupt is enabled The pin name is appended to the equates that are used to rep resent the address and bit position associated with the pin for interrupt enabling and disabling as well as testing the state of the port data Code Generation and Dynamic Re configuration When additional configurations are present there is a considerable difference in code generation and the files generated The User Module files are gener ated identically to previous versions Differences are described ahead PSoCConfig asm The static PSoCConfig asm contains exports and code for LoadConfigInit Initial configuration loading function LoadConfig_projectname Load configuration function And code only for LoadConfig General load registers from a table For projects with additional configurations a variable is added to the bottom of the file that tracks the configurations that are loaded The LoadConfig function Document No 38 1
167. return Document No 38 12002 Rev E December 15 2004 7 2 The function to load the configuration LoadConfig is called from the boot sequence PSoC Designer will overwrite PSocConfig asm when a device con figuration has changed and application files regenerated no exceptions You must not re configure or modify any aspect of a device configuration if you wish to preserve changes that you have made to PSocConfig asm You can however keep a copy of any changes and reapply them after a re configuration Remember because this is a Library Source file it is added replaced to ibPsoc a If you wish to manipulate bits all part register values reside in this file for your reference Additional Generated Files Additional files are generated in association with User Modules and Dynamic Re configuration This feature adds files and content to current files to provide you additional access to configuration information Primarily this additional information is associated with the Write Only shadow registers generated by User Modules and Dynamic Re configuration These shadow registers must be used when manipulating bits within the Write Only registers so that the data present in the register at any time is consistent with the operation of the User Module or Dynamic Re configuration or user code In addition to the primary reason for this feature files are also generated to make configuration data more accessible for use from
168. roject Table 5 Default Memory Organization o Area TOP Absolute Code Segment Reset Interrupt Vectors 0xBg Unused Code Space 0x150 Area Text Relocatable Code Segment User Code User Module API Code ROM Size The unused code space area will fluctuate based on custom changes to the startup boot code in the TOP area By inspecting the project listing file you can adjust the start of the text area Some developers may wish to place boot loader code or ROM tables in the unused code space area so the text area must be adjusted accordingly Object library modules The Object library module setting on the Linker tab of the Project Settings dialog box provides a way to link code from other places The benefit for using this setting allows the developer to centralize a set of tested code that may be used by more than one PSoC Designer project configuration See Dynamic Re configuration for details on employing multiple configura tions per PSoC MCU project Linking additional libraries and object files is a relatively common thing It is intended that the object or library filename be entered in this setting field It is legal to use long file names but these must be enclosed in dou ble quotes Following are examples Sample Long Filename a gt gt Valid Sample BadName a gt gt Invalid No ending quote foo o gt gt Valid Multiple object library module names can be entered Each name must be separated by
169. ronment User Guide and a display preference of either decimal or hexadecimal You can also select Global Variables Watch ariable Properties xj Variable Name Address fo Type char ag Memory Area Format RAM Decimal FLASH C Hex Note the address field for global variables will be calculated automatically from the project map file after download OK Cancel Select global variables Address Name Tye 4l 0x14 ADCINC12_1_blncrC unknown 0x10 ADCINC12_1_cCounterU unknown OxF ADCINC12_1_cTimerU unknown 0x13 ADCINC12_1_flner unknown 0x11 ADCINC12_1_ilner unknown OxD cindex char MANR n Drdata int xi Select All Unselect All Figure 73 Debug ASM Watch Properties Right click Add Delete or Properties in the Watch Global Name window to add delete or modify values Note that if you change a variable type or other settings in the window and close the project the next time you access that project the variable types and settings will be the same 158 Document No 38 12002 Rev E December 15 2004 10 4 5 Watch Global Name Value ADCINC12_1_blnerC 0x00 Oxel 7 _1_flncr Delete 00 ADCINC12_1_ilner Properties 00 clndex 0x00 n DCdata 0x0000 zi azn Figure 74 Watch Global Name Window Local Watch Variables The Local Name window appears in the lower right corner of PSoC Designer by default upon access of the Debugger subsystem For better viewing
170. ry A progress indicator will report download status The Pod can now be directly connected to and debugged on your specific circuit board You will receive the following message if your project cannot be debugged with the current Pod This project is incompatible with the Pod Chip The following appears in the Debug tab of the Output Status window Unable to connect to ICE due to pod incompatibility with project Found debugger version 6a pod ID 8 pod micro CY8C25 26xxx rev D Check the Project Pod compatibility document December 15 2004 Document No 38 12002 Rev E 153 PSoC Designer Integrated Development Environment User Guide 10 4 Debug Strategies Debugger commands allow you to read and write program and data memory read and write I O registers read and write CPU registers and RAM set and clear breakpoints and provide program run halt and step control In the status bar of the Debugger subsystem you will find ICE connection indication debugger target state information and in blue Accumulator X Stack Point Program Counter and Flag register values 10 4 1 Trace This feature of PSoC Designer enables you to track and log device activity at either a high or detailed level Such activity includes register values data memory and time stamps The Trace window displays a continuous configurable listing of project sym bols and operations from the last breakpoint The trace shows symbolic rather
171. s At this time the system also creates a data sheet based on your part configurations that can be accessed in the Device Editor You can view the data sheet by clicking View gt gt Datasheet The configura tion data sheet is self contained in its own folder in the project directory and can be viewed independently of PSoC Designer by opening configreport xml in Internet Explorer If you need to move or send someone the file you must move send the entire directory of ConfigDataSheet Once this process is complete you can enter Application Editor and begin pro gramming the desired functionality into your now configured device For fur ther details regarding programming see Application Editor and Assembler You can generate application files from within either of the two Device Editor modes User Module Selection View or Interconnect View To generate application files click the Generate Application icon a This pro cess is transparent to you and takes less than a minute Document No 38 12002 Rev E December 15 2004 After the process runs and completes you can check the official status in the Output Status window x i Generating source code for Device Configuration The source code has been generated successfully Fa It is important to note that if you modify any device configurations you must re generate the application files before you resume source programming FD buia Debug Progam j Findin
172. s Interrupt Service Rou tines are also generated during the device configuration process in the form of INT asm h and inc files These files provide the device interface and inter rupt activity framework for source programming See the following example of an h file for configurations of a 16 bit PWM Pulse Width Modulator created during application code generation Fl pwm16_1 h ojx include lt m8c h gt Create pragmas to support proper argument and return value passing fastcall PUWM16_ 1 EnableInt fastcall PWM16_1 DisableInt fastcall PUWM16_1 Start fastcall PWM16_1 Stop fastcall PUNI6_ 1_WritePeriod pragma pragma pragma pragma pragma pragma pragma pragma PRAHA AAA AAA AAA AAA AAA AAA AAA AAA AAA AAA A AAA AAA EEEE E functions see PWM16 1 inc FERRARA ARARARARARARARARARARARARARARARARARAR ARERR ES extern extern extern extern extern extern extern extern f f end 104 void void void void void void WORD WORD of file ee fastcall PWM16_1 WritePulseWidth fastcall wPWM16_1 ReadPulseWidth fastcall wPUM16_ 1_ ReadCounter Prototypes of PWM API For a definition of PUM16_1 EnableInt void PUM16_1 DisableInt void PUMI6_ 1_ Start void PUM16_1 Stop void PUM16_ 1_WritePeriod WORD wPeriod PUM16 1 WritePulseWidth WORD wPulseWidth uPUM16_ 1_ReadPulseWidth void uPUM16_1 ReadCounter void Figure 60 PWM16_1 h Document No 38 12002 Re
173. seeeeeeeeeeareeaeeneeeeees 89 Logical Operations in Digital Interconnect Row Output 90 Digital Interconnect Row Global Output cee eeeeeeeeereees 91 Interconnect View in Device Editor Toolbar 0 0 eee 92 De Vice PIM OUt es icexici cscs E dee sees ateeetsanstusansss 92 PSoC Block Resource Meter 2 cc2c ccccecseccccseceececseeseerectatneees 100 Output Status During Application Generation 0 0 0 eee 103 PWV MAG W coaira E e a oun 104 Timer32 on Four Digital PSOC BIOCKkS cccceeeseeeeeeeeeees 106 Dynamic Re configuration Toolbar cessseeeesseeeeeeseeeeeseees 111 Export Design Dialog BOR ssccisscs assssctetrstecessseteneetai tentesscsertez esses 114 De SIGM BYOWSE siccectie acres Aachesstateicecanteccselestreecetcenens Meee 116 Add New File seencrsrernromn a e ER Ea 133 Findim Files Dilog BOK issar a S AaS 134 Output Status WINJOW sisca eane raed rt 144 Basic Development Kit Components sseeeseeeererrererrerersen 148 IGE CUDG iecsnesecantessuccitinin a Aga pater E 151 TIG ogr E arene ttre ert er tererr erty errr 154 Traco Sayer AS ssion aiaa adiar r 155 Debug Br eakpOinis lt 2c2 lt 20 x ee sess sescesaesasidstanianeciscicciscescdatsoen ine 156 Debug ASM Watch PropentieS issicciscssmertistedecdeocasnesseriecsvcavecvand 158 Watch Global Name Window 2 c sccssccssecoeeesessdenedananccneds 159 Aray Type VanlaDleS srra ean at A A 161 Stack Overflow EVent
174. sentation of the 8 center pins on the 10 pin ICE header The right and left outside pins are connected to ground while the inputs accept a 5 volt TTL level signal The timestamp is displayed as a 32 bit relative count of clock cycles from the CPU clock source The default size of trace is 256 kilobytes This provides 128 K trace instruc tions in trace mode 1 and 32K trace instructions in modes 2 and 3 If you right click your mouse inside the Trace dialog box you can copy or save the trace results as txt xml or another file type of choice Trace x DISASSEMBLED INSTRUCTION RET cl RET C1 OR REG 3Fh 01h cl CALL PwM8_8 Start cl cl Save le Save As OR REG 37h 01h OC View Trace Report CALL _PWM8_6 Start ME o Docking RET OR REG 33h 01h D manare T Figure 71 Trace Save As Copy You can also view the results in xml format inside your browser by clicking View Trace Report When viewing the Trace Report at the top of your browser you will see the file path to which PSoC Designer saved the xml file for later access Note that the trace output under reports by two instructions from the current actual Program Counter location when halted Enable Docking means you can drag and leave open the Trace window any where on your screen December 15 2004 Document No 38 12002 Rev E 155 PSoC Designer Integrated Development Environment User Guide 10 4 2 156 Contents of Trace Log Entries The
175. ser Module to a new location This saves time over the use of the Next Allowed Place ment icon 3 When you have identified the location click the Place User Module icon or right click and select Place Once you have placed the module it will appear on the device color coded bearing the designated name on the chosen PSoC block To print or view your placements in the browser right click anywhere in the gray area of the device interface and select Print In the Interconnect View the inactive target placers blue highlights of multi block User Modules are now identified by a group name across the top December 15 2004 Document No 38 12002 Rev E 69 PSoC Designer Integrated Development Environment User Guide If you want to clear all User Module placements i e remove them from their location on the PSoC blocks click Config gt gt Clear All Placements If you want to unplace one particular module right click on it and select Unplace or click the Undo Place User Module icon This will not remove User Modules from PSoC Designer or from your collection just placement If at any time you would like to name or rename User Modules right click on the module select Rename and type a new name Some modules are not placed on PSoC blocks i e LCD I C Master 1 C Slave Under User Module Parameters you designate a port which then appears highlighted in the device interface with
176. sert its control signal SMP is the level at which the integrated switch mode pump will be enabled Although selection of SMP is implicit in the selection of LVD if no switch mode pump circuitry is to be used the part will simply be reset if supply voltage falls too low At the point when the supply voltage exceeds the threshold level the part will resume operation as if the power had been switched off and on POR Further discussion of the switch mode pump and low voltage detect can be found in chapter 30 and 31 of the PSoC Techni cal Reference Manual TRM Document No 38 12002 Rev E December 15 2004 LVD ThrottleBack This parameter enables the user to configure the PSoC to lower its own CPU clock speed under low voltage conditions Use of this parameter and the bit it controls is discussed in chapter 30 of the PSoC Technical Reference Manual TRM Not all PSoC devices incorporate this parameter bit Watchdog Enable This parameter enables the Watchdog Timer The Watchdog Timer is based on a counter that counts three sleep timer events To prevent system reset this counter must be cleared before three sleep timer state events have occurred or the PSoC will be internally reset The duration of each sleep timer event can be selected using the Sleep_ Timer parameter in the global resources selection dialog of PSoC Designer A complete discussion of the relation of the sleep and watchdog timers is contained in chapter 12 of the PSoC Te
177. t directory for files that have been removed from the source tree This includes files that are manually removed and files that are removed due to cloning or code generation The backup folder only retains the version of the file that was last removed The files are named identically to the original project file and the 1ib directory is not retained i e library files are placed directly under the backup folder December 15 2004 Document No 38 12002 Rev E 55 PSoC Designer Integrated Development Environment User Guide 56 Document No 38 12002 Rev E December 15 2004 Section 5 Device Editor In this section you will learn how to navigate select User Modules config ure and place User Modules on PSoC blocks make interconnections set pin outs track resources usage invoke Design Rule Checker and generate appli cation files 5 1 Navigating Device Editor Becoming familiar with the interface and knowing your options will expedite the design process December 15 2004 Document No 38 12002 Rev E 57 PSoC Designer Integrated Development Environment User Guide When you first access Device Editor you will see the following pop up window to jump start your familiarity with the device interface Hints for Zooming and Panning D Pan ALT Click Drag Haid the altkey and dlick and diag with the mouse Alemalively sect he hand button Tto enter Pan Made Now you anly need to drag wifi fie mause to pan D Zoom C
178. te code AREA that should be located in the upper 2k of the Flash you could use this feature For the sake of this example let s call the custom code AREA BootLoader If you were developing code in C for the BootLoader AREA you would use the fol lowing pragma in your C source file pragma text BootLoader switch the code below from AREA text to BootLoader Add your Code pragma text text switch back to the text AREA If you were developing code in assembly you would use the AREA directive as follows AREA BootLoader rom rel Add your Code AREA text reset the code AREA Now that you have code that should be located in the BootLoader AREA you can add your custom Linker commands to custom kp For this example you would enter the following line in the custom kp file bBoot Loader 0x3800 0x3FFF You can verify that your custom Linker settings were used by checking the Use verbose build messages field in the Builder tab under the Tools gt gt Options menu You can build the project then view the Linker settings in the Build tab of the Output Status window or check the location of the BootLoader AREA in the mp file Librarian The library and archiving features of PSoC Designer provide system storage and reference There are two types of Librarian files Library Source and Library Headers which can be found in the source tree Source file types include archived and
179. th RAM and ROM usage used by the current set of selected User Modules If you select a User Module that requires more resources than are currently available PSoC Designer will not allow the selection If User Modules are already placed then there are some cases when User Module selection will fail even if it appears that sufficient PSoC blocks remain unallocated In such cases the placed User Modules are occupy ing resources that the selected User Module requires At any time during device configuration you can add and remove User Mod ules to and from your device To remove User Modules from your collection click on the User Module you wish to remove and click the Delete key or right click the User Module itself and select Delete from the menu This will not remove User Modules from PSoC Designer just from your collection In addition to the User Module Toolbar you can view a specific User Module diagram or data sheet by right clicking on a selected User Module and making a selection Placing User Modules Placing selected User Modules on PSoC blocks is the second step to configur ing your target device PSoC blocks as defined in PSoC Designer are the analog and digital peripheral blocks of a device that are customized by the placement and configuration of User Modules To place User Modules click the Interconnect View icon in the Device Editor toolbar HH OF i Figure 42 Interconnect View in To
180. than address data to enhance readability Each time program execution starts the trace buffer is cleared When the trace buffer becomes full it contin ues to operate and overwrite old data a PROGRAM COUNTER SYMBOL DISASSEMBLED INSTRUCTION 004D AND F EFh 0044 MOV REG EOh 00h 0048 OR F 10h 0044 JZ 0048h 0042 AND A 80h 009F AND REG EOh BFh 009D AND F FEh 0098 MOY A REG FFh 0098 OR REG E0h 01h 0095 OR REGIEOhI 01h xi Figure 70 Trace To help with troubleshooting you can view read only versions of your applica tion source files inside the Debugger subsystem If the project source tree is not showing in the left frame click View gt gt Project and double click any file you would like to view or click the Project View icon l The Trace window is displayed when Trace is chosen from the Debug menu or the icon selected E It is configured by selecting either Debug gt gt Trace Mode or Tools gt gt Options from the menu Configuration options include PC Only PC Registers or PC Timestamp 154 Document No 38 12002 Rev E December 15 2004 PC Only mode lists the PC value and instruction only PC Registers mode lists the PC instruction data A register X register SP register F register and ICE external input PC Timestamp mode lists the PC instruction A register ICE external input and timestamp When using the ICE 4000 the external input value is the binary repre
181. the IDE 21 Sl System DIAGRAM sienna Wesel ess Sloss laud ae nel a lorena area kamera 21 g2 File Ry POSeaMGh EXTSTISIONS aosa Gansen naa E aa a AAE EREA 21 3 3 Project Manager imine SGI WIMKOWS siessenek ad eaa i adari e techie 29 ST OULU Eo PARUIS WINANS ARA ESTR 30 SG Project SINOS aioir enaa a aaa EA tu vied cloned EEE e NES 31 37 TOONS OPONE Assirian r AiE aaa 43 Section 4 Creating a Project ssesssnssunsunnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnannnnnnnn nnn 47 4 1 Create a Project 4 2 Project Methods 4 3 Project Backup Folder ireneciriisnnnsa nns rrit taranai ienna ti 55 December 15 2004 Document No 38 12002 Rev E i PSoC Designer Integrated Development Environment User Guide Section 5 Device EQHOM sisceseescassissicasicasciaviessccavieascasenscaseastasvaanantavensvesnecnnn 5 1 Navigating Device Editor ssscisniessscncccnscsoscraceaseces tecsacerstisacenst aiani 52 Selecting User Modules ssnin aar aina rarai a sti oro Placing User Modules ziir aaa a A a 5 4 Deploying Interconnectivity Connecting User Modules 5 5 Specifying PIN OUE sca isseeeciuesexccenvecoeseeneestviedscestveerarpscibeas 5 6 Tracking Device Space siissccsicisscssiccrvesssvcaradesedcvatesrissnet osistenicavearssteenecsnease contests Si DESIG HAUG CMECKEN miaro ceneciss crtuesast cassaseoncaswationendteacr ETANTE E TAART 58 Generating APpicaNon PIGS sisati eese saraaa TER Aa aA ANES Section 6 Dynamic Re configuration
182. the User Module name 70 Document No 38 12002 Rev E December 15 2004 4 Repeat this process for all selected User Modules example_external_crystal_28pin CY8C27443 PSoC Designer Device Editor File Edit View Project Config Build Debug Program Tools Window Help A Cae alt eja parE naana Aa Alerw S2AKA AAAA l o wll SB eee Bloc faoencre ee Global Resources Selected User Modules 3 Example_External_Crystal_28pin CPU_Clock 3_MHz 32K_Select External PLL_Mode Disable ADCINC14_1 DTMFDialer_1 Sleep_Timer 1_Hz VC1 SysClk N 1 VC2 VC1 N 1 VC3 Source SysClk 1 VC3 Divider 1a DTMFDialer_1 M2 Ani r CRC16_1 User Module Parameters Control Clock SysClk 2 DTMF Clk Period C 0 DTMF Cik Frequence 1 men p DTMF Dialer Outpu AnalogOutBus_C g n CYA Tone Duration mSe 40 PEt Name Port Select a Pot 00 POIO StdCPU i aa PortO1 PON StdCPU i Port_0 2 PO 2 StdCPU ae i me a e ee D Aki a 2 Figure 44 Placed User Modules There are several User Modules that require topology selection including fil ters Right click on the module either before or after selection and click Select or User Module Selection Options respectively Make the topology choice according to your applicat
183. ttempting to set the output for the second timer to Global_OUT_1 will fail To save current configurations in Device Editor click File gt gt Save Project Global In Global In connections apply to a PSoC device as follows CY8C25xxx 26xxx as Global In Input Port Connections CY8C27xxx and beyond as Global In Odd and Global In Even Input Port Connections and Global Connections To set Global In connections execute the following 1 Click on the target Globalxxx vertical line 2 Click the global input to output connection if active then click the port You will see a line connecting the digital input port to the global vertical line Global Out Global Out connections apply to a PSoC device as follows CY8C25xxx 26xxx as Global Out Output Port Connections CY8C27xxx and beyond as Global Out Odd and Global Out Even Out put Port Connections and Global Connections To set Global Out connections execute the following 1 Click on the target Globalxxx vertical line 2 Click the global input to output connection if active then click the port You will see a line connecting the digital output port to the global vertical line Analog Clock Select To set Analog Clock Select connections execute the following December 15 2004 Document No 38 12002 Rev E 83 PSoC Designer Integrated Development Environment User Guide 84 1 Click on the target AnalogClock_x_Select Mux 2 Select a DBAxx or DBBxx PSoC bl
184. u and 3 Select StdCPU from the second menu On the device you will see the designation color coded according to the legend along side the device The port name and StdCPU will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection XtalOut To set the XtalOut connection execute the following 1 Click on Port_1_0 P1 0 or 2 Select Port_1_0 from the menu and 3 Select XtalOut from the second menu On the device you will see the designation color coded according to the legend along side the device The port name XtalOut and the drive mode of High Z will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection December 15 2004 Document No 38 12002 Rev E 95 PSoC Designer Integrated Development Environment User Guide 96 Xtalln To set the Xtalln connection execute the following 1 Click on Port_1_1 P1 1 or 2 Select Port_1_1 from the menu and 3 Select Xtalln from the second menu On the device you will see the designation color coded according to the legend along side the device The port name Xtalln and the drive mode of High Z will also appear in the port related fields underneath User Module Parameters where you can click the drop arrow to change your selection ExternalGND To set the ExternalGND connection execute the following 1 Click on
185. u are using ICE Cube Document No 38 12002 Rev E December 15 2004 3 7 Tools Options Under Tools gt gt Options there are preference options for PSoC Designer including Builder Compiler Debugger Device Editor Editor Toolbars Design Rule Checker Each option is described ahead Editor Toolbars Design Rule Checker Builder Compiler Debugger DeviceEditor I Use verbose build messages Cancel Figure 25 Options Dialog Box 3 7 1 Builder You can toggle the verbose messages in the Output Status window during a build resulting from the make utility Click Tools gt gt Options gt gt Builder tab and check or uncheck Use verbose build messages These more detailed messages can be useful to diagnose build problems 3 7 2 Compiler Currently PSoC Designer offers one C compiler In the future look for multi ple compilers Under Available compilers click iMAGEcraft By clicking Select December 15 2004 Document No 38 12002 Rev E 43 PSoC Designer Integrated Development Environment User Guide 3 7 3 44 gt gt this selection will become your system wide default until if you change the selection per project under Project gt gt Settings Compiler tab The default selection you specify here will be the default next time you cre ate a new project in PSoC Designer If you select iMAGEcraft enabling it is done here To accomplish this execute the following
186. ub system How o Figure 37 User Module Selection View in Toolbar 62 Document No 38 12002 Rev E December 15 2004 In the left frame you will see the User Module Options ADCINCVR fa Amplifiers Counters Digital Comm Filters Misc Analog Misc Digital Figure 38 User Module Options To view the individual User Modules click one of the set titles i e Timers Counters PWMs etc and scroll to see pre configured options By right clicking your mouse on a User Module icon you can select the mod ule for eventual placement view its revision properties or change the icon from large to small and back again In the User Module Selection View you can view configuration data related to an individual User Module To view device module data single click a User Module from within a set title In other active windows you will see all related configuration data The following figure shows data related to a 4 to 1 analog mux December 15 2004 Document No 38 12002 Rev E 63 PSoC Designer Integrated Development Environment User Guide k example_pwm_with_db_28pin CY8C27443 PSoC Designer Device Editor ile Edit View Project Config Build Debug Program Tools Window Help ATA O aces ni s7aahe 4 ella S44 A 7 A D S e 2a FE 1 Mg Example_PwM_with DB_ og ADCs y faocnci2 Fha S Selected User Modules 8 Example _PWM_wit
187. under project directory ASM Include Headers in source tree obj folder under project directory output folder under project directory Menu under Project gt gt Open local mk file output folder under project directory obj folder under project directory output folder under project directory Document No 38 12002 Rev E Description A collection of object files created by ilibw exe Editable assembly language source file created initially added or generated for APIs C compiler language file that can be added to the project Project configuration file that can be imported and exported for Dynamic Re configuration Generated during the build process Used by the Debugger subsystem Editable c language include file gener ated for APIs Output file in Intel HEX format generated during the build process This file alone will be downloaded to the ICE for project debugging Editable assembly language include file generated for APIs Relative address listing file generated by the assembler Full program listing Used by the Single Step ASM function Customize the build Make process for a particular PSoC Designer project Generated during the build process Iden tifies global symbol addresses and other attributes of output Intermediate relocatable object file gen erated during assembly compilation Output file in raw binary image generated by device conf
188. urce enables you to quickly create a complete C program for a PSoC device The C language compiler options in PSoC Designer allows users more design flexi bility Document No 38 12002 Rev E December 15 2004 9 3 9 3 1 The embedded optimizing C compiler provides all the features of C but is tai lored to PSoC Designer architecture It includes a built in macro assembler allowing assembly language code to be seamlessly merged with C code The link libraries use absolute addressing or can be compiled in relative mode and linked with other software modules to get absolute addressing The compiler compiles each c source file to an s assembly file The PSoC Designer Assembler then translates each asm or s file into a relocatable object file o After all the files have been translated into object files the builder linker combines them together to form an executable file The PSoC Designer C Compiler comes complete with embedded libraries pro viding port and bus operations standard keypad and display support and extended math functionality For comprehensive details on the C compiler see PSoC Designer C Language Compiler User Guide Linker Loader The linking and loading functions in the build process of PSoC Designer are transparent to the user As discussed earlier in this section building your project links all the programmed functionality of the source files including device configuration and loads it into a hex fil
189. use an _underscore label on all interrupt subroutines in each int asm file Note that there will be one int asm file per placed User Module Updating User Modules Project Update places int asm files in the Backup folder To clone an existing project perform the following steps 1 Start as if you are creating a new project but in the New Project dialog box click Clone Project in the Select method field refer back to New Project Dialog Box Type a Project name and either type or Browse to designate a project directory 2 Click Next 3 Once you click Next you will be asked if you wish to create a new directory for the cloned project with its new name Click Yes 4 Inthe Existing Configuration dialog box Browse or type to identify the existing directory of the project you wish to clone If you wish to specify an alternative part device do so in the Select Base Part drop down December 15 2004 Document No 38 12002 Rev E 51 PSoC Designer Integrated Development Environment User Guide 5 Finally select the subsystem in which you would like to begin Device Edi tor Application Editor or Debugger Clone Existing Project x Specify existing project path Ik New new SOC Browse Would you like to Use the same Base Part Select Base Part Base Parts CY8C27643 48 Pin Dualinine r Select PSoC Designer state to proceed to E Device Editor i Application Editor Debugger
190. utlet 5 If you are using the ICE 4000 plug the CAT5 Patch cable into the ICE and the Pod If you are using the ICE Cube plug the Flex Pod into the ICE Document No 38 12002 Rev E December 15 2004 6 If you are using the ICE 4000 connect the Pup to the Pod if you are plan ning to run one of the tutorial demonstration projects If you are using the ICE Cube connect the Flex Pod to your board If you are using your own circuit board plug the Pod into your board turn on board power then connect the ICE to the Pod The ICE will automatically determine the power source Following is a preview of the ICE Cube Figure 69 ICE Cube 7 Reboot your machine and launch BIOS during boot up by pressing F2 or Delete If F2 or Delete do not launch your BIOS see Section 5 How to Access YOUR PC BIOS in the PSoC Designer ICE Connection Troubleshooting User Guide to identify the BIOS for your particular PC 8 In BIOS Setup select EPP mode as this setting works most often for both desktops and laptops Because the BIOS settings vary per machine the correct mode cannot be known in advance and may take some trial and error Options include EPP ECP EPP ECP and Bi directional 9 Save the settings exit the BIOS reboot and launch PSoC Designer Steps 7 9 only apply if you are connecting via parallel port December 15 2004 Document No 38 12002 Rev E 151 PSoC Designer Integrated Development Environ
191. v E December 15 2004 Once you have generated your device configuration application code the files for APIs and ISRs can be found in the source tree of Application Editor under the Library Source and Library Header folders This user transparent action occurs each time device application code is generated If you modify any ISR file and then re generate your application changes will not be overwritten if they are placed between user code mark ers included in the int asm file Source code outside of the user code marker regions is overwritten and is always re generated However if a User Module is renamed and the application is re generated any user modifica tions within the user code markers are not updated with the instance name Any use of the User Module instance name within user code markers must be manually updated 5 8 3 Working with ISRs The CPU has up to 26 interrupts 6 fixed function and 20 configurable They are Reset Supply Monitor 4 Analog Columns VC3 GPIO 6 Digital Blocks 12C Sleep Timer The configurable interrupts include 16 digital blocks and 4 analog columns The definition e g interrupt vector action of a configurable interrupt depends on the User Module that occupies the block or uses the analog column The Device Editor handles the details of getting User Module parameters into source code so that the project will be configured correctly upon startup and expose subroutines
192. values to symbolic addresses thereby producing machine code Each time you compile assemble the most prominent open source file will be compiled PSoC Designer can decipher the difference between c and assembly lan guage files and compile assemble accordingly To compile the source files for the current project click the Compile Assem ble icon gin the toolbar Compiling must be done in Application Editor PSoC Designer now employs a make utility Each time you click the Com pile Assemble or Build icon the utility automatically determines which files of a large application manual or generated have been modified and need to be recompiled then issues commands to recompile them For further details see make pdf in the Documentation Supporting Documents directory for PSoC Designer As discussed in section 3 the Output Status or error tracking window of Application Editor is where the status of file compiling assembling resides Each time you compile assemble files the Output Status window is cleared and the current status entered as the process occurs When compiling is complete you will the see the number of errors Zero errors signify that the compilation assemblage was successful One or more errors indicate problems with one or more files This process reveals syntax errors Such errors include missing input dataandundeclared identifier For a list of all identified compile and build errors with solutions see Section
193. vents dialog box at Debug gt gt Events 4 Click on the State 0 event 5 Turn on the 16 bit thread by checking the Enable 16 Bit Thread box 6 Set Input select to PC16 Low compare to 0000 and High compare to 0000 7 Under State Logic set Next state to 1 and check Trace Off 8 Click Apply to save 9 Click on the State 1 event 10 Turn on the 8 bit thread by checking the Enable 8 Bit Thread box 11 Set Input select to A Low compare and High compare to 32 and leave the Input Mask at ff 12 Under State Logic set Next state to 2 and check Trace On and Break 13 Click Apply to save 14 Click on the State 2 event 15 Turn on the 8 bit thread by checking the Enable 8 Bit Thread box 16 Set Input select to A Low compare and High compare to 32 and leave the Input Mask at ff 17 Under State Logic set Next state to 3 the Match Count to 10 and check Trace Off and Break 18 Click Apply to save December 15 2004 Document No 38 12002 Rev E 167 PSoC Designer Integrated Development Environment User Guide 19 Click Close 10 5 Menu Options The PSoC Designer Debugger toolbar is shown below d E LA EAEE LORIE Figure 77 Debugger Toolbar Following is a description of the debugging menu options Table 14 Debugging Menu Options Icon Menu Tool Tip Shortcut ad Debugger ae Connect Download to Kd Emulator BR Program Part B Execute Program gt Start Go F5 35 Stop Halt F6 l Reset
194. w Logic Table Select 89 Selection of ACMux BMux AnalogBus and CompBus for a SC Analog Block 86 Selection of Clock Input for a Digital Block 85 Selection of Enable Input for a Digital Block 85 Selection of NMux PMux AnalogBus and CompBus for a CT Analog Block 86 Selection of Output for a Digital Block 85 Selection of RBotMux for a CT Analog Block 86 Synchronization 88 Internal Registers 3 Introduction 5 ISRs 105 L Librarian 146 Librarian Project Settings Additional Library Paths 38 Library Headers 146 Library Source 146 Linker Project Settings 37 Additional Library Paths 38 Creating a Library 39 Default Memory Organization 38 Enable 24 MHz Alignment Shift 40 Object Library Modules 38 Relocatable Code Start Address 37 Selected C compiler 37 Silicon Errata Warnings 40 Linker Loader 145 Customized Linker Actions 145 N Navigating Device Editor 57 Notation Standards 3 O Output Status Window 30 Output Tab 25 Output View 28 December 15 2004 P Pan Zoom Toolbar 60 Pod Error 153 Pod Uses External Power Only 42 Port Connection 93 Port Connections Analog Input 93 Analog Output Buffer 93 Default Input 93 Ext Ref 96 ExternalGND 96 Global_IN_x 94 Global_OUT_x 94 12C SDA 97 StdCPU 95 Xtalln 96 XtalOut 95 Port Drive 98 Port Interrupt 98 ChangeFromRead 98 Disablelnt 99 FallingEdge 99 RisingEdge 99 Product Upgrades 6 Project Creation 47 Project Backup Folder 55 Project Compatibility 18 Project Manag
195. w the following documentation before enabling PSoC Designer C Language Compiler User Guide PSoC Designer Assembly Language User Guide December 15 2004 Document No 38 12002 Rev E 35 PSoC Designer Integrated Development Environment User Guide 3 6 2 Device Editor In the Project Settings dialog box you can enable options for the PSoC Designer Device Editor To access the dialog box click Project gt gt Settings Device Editor tab Compiler Device Editor Linker Debugger Enable interrupt generation control IV Enable configuration name prepending to pin name Configuration initialization type Loop size efficient Direct write speed efficient Cancel Figure 22 Project Settings Device Editor Tab There are three Device Editor Project Settings 1 Enable interrupt generation control By default Device Editor generates an interrupt for each User Module that is placed A check indicates you want to determine which User Modules employ an interrupt You can possibly shorten application run time 2 Enable configuration name prepending to pin name When pins are used and this field is checked code generation prepends the configuration name to the pin name for all references to the pin in the include files A pin is considered used when at least one of the following settings for the pin is not set to the default Setting Default Value Custom Name Port_m_n 36 Document No 38
196. ying flashsecurity txt and appears at the beginning of this file in PSoC Designer Edit this file to adjust the Flash security for this project Flash security is provided by marking a 64 byte block with a character that corresponds to the type of security for that block given Full Write protected Field Upgrade Read protected Unprotected Factory Haas Document No 38 12002 Rev E December 15 2004 Note 1 Protection characters can be entered in upper or lower Case Note 2 Refer to the Flash Program Memory Protection section in the Data Sheet Various parts with different Flash sizes can be used with this file Security settings for Flash areas beyond the part limit will be ignored Comments may be added similar to an assembly language comment by using the semicolon followed by your comment The comment extends to the end of the line Following is an example of flashsecuriy txt Fl flashsecurity txt iB x A 100 140 180 1cO 200 240 280 2C0 300 340 380 3C0 Base Address Base Address Base Address Base Address Base Address z335 CEE ES s5535 aaga asasasg s535 s5355 s5535 aaaeq aeaeae s3535 aaga zaa 5 ssas End 4K parts Base Address Base Address Base Address Base Address aaa aaga gaas gaa S g 55 gaas gaas gaa 5 LE E OE SJs gs3 35 aaga saaq is B 2 ao K ksi pi ia ct u Base Address Base Address Base Address Bas
197. you have available and how many you have used You will also notice a live graph tracking the PSoC blocks you have used by percentage RAM and ROM monitors track the amount RAM and ROM required to employ each selected User Module Resource Meter Total Used Digital Blocks E 3 Analog Blocks 12 0 RAM 256 0 ROM 16384 54 Decimator 1 0 12C Controller 1 0 Figure 58 PSoC Block Resource Meter 5 7 Design Rule Checker Design Rule Checker DRC operates on a collection of pre determined rules associated with elements in a project database Once invoked the DRC runs and then communicates the results of a rule evaluation The DRC is designed to point out potential errors or rule violations in your project that might eventually pose problems Design Rule Checker will not 100 Document No 38 12002 Rev E December 15 2004 impose limitations or prevent you from proceeding with your project as is It simply gives you a heads up on PSoC User Module software and hardware elements of which you may or may not have been aware when configuring and sourcing your device Bottomline it is an additional tool to provide support for user configuration consistency via an error proof project Sample rules include PLL and no External Crystal 24 MHz and 3V Operation 48 MHz and 8V for Digital Clock Operation Un set Parameters Connections PO 1 and PO 0 Pins not High Z with External Crystal 3 3V Indicating IC
198. your develop ment circuit board 172 Document No 38 12002 Rev E December 15 2004 Section 11 Flash Program Memory Protection Users have the option to define the access to the Flash memory Flash Pro gram Memory Protection FPMP allows the user to select one of four protec tion modes for each 64 byte block within the Flash based on the particular application The protection mechanism is implemented using the System Supervisor Call instruction SSC When this command is executed two bits within the data programmed into the Flash will select the protection mode The following table lists the available protection options The flashsecurity txt file for 2 xx and higher projects using Flash writes must be set to the correct protection modes The defaults are set to full protect mode In order to operate blocks of Flash memory being used must be set to a mode which enables internal Flash writes to the designated blocks of memory See flashsecurity txt and Application Editor and Example for details on modifying flashsecurity txt Table 16 Flash Program Memory Protection Options Mode Bits Mode Name External Read External Write Internal Write 00 Unprotected Enabled Enabled Enabled 01 Factory Upgrade Disabled Enabled Enabled 10 Field Upgrade Disabled Disabled Enabled 11 Full Protection Disabled Disabled Disabled 11 1 FPMP and PSoC Designer PSoC Designer now has a rudimentary mechanism that enables the user to set security modes

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