Low Latency/Jitter Optimization User's Guide
Contents
1. The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Super Micro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See http www dtsc ca gov hazardouswaste perchlorate for further details Manual Revision 2 0a Release Date Jan 29 2015 Unless you request and receive written permission from Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products2. SUPERMICR Low Latency Jitter Optimization User s Guide The information in this USER S MANUAL has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USETHIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCHDAMAGES IN PARTICULAR SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OFREPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA
3. and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2015 by Super Micro Computer Inc All rights reserved Printed in the United States of America Supermicro Low Latency Jitter Optimization Guide Introduction These instructions are optimized for the SYS 1028 UX CR LL1 2 and SYS 6027AX 72RF TRF HFT 1 2 3 systems using Mellanox MCX354A cards Steps may vary depending on SW application requirements and operating system 1 1 OS Optimizations Fresh minimal OS install of either RHEL 6 x SL Kernel boot command line options intel_idle max_cstate 0 processor max_cstate 0 idle poll pcie_aspm performance mce ignore_ce ipmi_si force_kipmi 0 nmi_watchdog 0 noht nosoftlockup isolcpus x x isolcpus option not required if using tuna to isolate CPU cores Disable all unnecessary services using CHKCONFIG command Install coupower tuned tuna and numactl utilities Run the following commands to tune your system before running your application It is best to script the following commands for ease of execution Modprobe acpi cpufreq cpupower set b 0 cpupower frequency set governor performance tuned adm profile latency performance tuna S1 i Use of taskset or numactl to bind application to specific CPU cores gt oa0 TD 1 2 BIOS IPMI Optimizations 1 Set PCle transfer buffer for Maximum Payload and Maximum Read Request accor
4. ding to maximum message size to be sent preferably 256K and 512K for 64 byte message sizes Set IPMI fan speed to FULL Disabling unused devices such as USB controllers and SCU controller PCH chipset s storage controller can help reduce system interrupts 1 3 Reading the CPU Frequency in Linux To check the CPU frequency consistency in a Linux environment use the turbostat i 1 command Note For a bug fix relating to register dev cpu O msr offset 0x641 read failed please reference to https rhn redhat com errata RHBA 2014 0484 html Supermicro Low Latency Jitter Optimization Guide
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