EB62 - LatticeECP3 Versa Evaluation Board User's Guide
Contents
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9. Signal PHY 1 PHY 2 RSTN L3 R21 MDIO L2 U16 MDC V4 Y18 RXC L4 N19 RX ER M4 V20 RX DV M1 U15 RX DO M5 AB17 RX D1 N1 AA17 RX D2 NG R19 RX D3 P6 V21 RX D4 T2 T17 RX_D5 R2 R18 RX_D6 P5 21 RX D7 P3 Y21 TXC C12 M21 TX EN V3 V22 TX DO V1 W22 TX D1 U1 R16 TX D2 R3 P17 TX D3 P1 Y22 TX D4 N5 T21 TX D5 N3 U22 TX D6 N4 P20 TX D7 N2 U20 GTXCLK M2 M19 CRS P4 P19 COL R1 N18 COMA 4 T15 125CLK T3 R17 1 Each PHY device includes a header dedicated to the COMA connection to the device The header is populated with a jumper that disables and places the PHY in a low power configuration Headers J10 and J12 are used for this purpose It is assigned to PHYs U9 and U10 respectively 12 User s Guide LATTICE SEMICONDUCTOR Table 11 Expansion Connections x3 Expansion Connector Pin Signal 484 Ball fp BGA 1 GND GND 2 NC NC 3 2 5V 2 5V 4 1029 D17 5 1030 J22 6 1031 K22 7 1032 L18 8 1033 L19 9 1034 L22 10 1035 M22 11 1036 K18 12 1037 K17 13 1038 H22 14 1039 H21 15 1040 G22 16 1041 G21 17 1042 J18 18 1043 J17 19 1044 F22 20 1045 E22 21 5VIN 5VIN 22 GND GND 23 2 5V 2 5V 24 GND GND 25 3 3V 3 3V 26 GND GND 27 3 3V 3 3V 28 GND GND 29 OSC U13 PIN27 30 GND GND 31 CLKIN E15 32 GND GND 33 CLKOUT D12 34 GND GND 35 3 3V 3 3V 36 GND GND 37 3 3V 3 3V
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12. LAT EN SEMICONDUCTOR LatticeECP3 Versa Evaluation Board User s Guide July 2013 Revision EB62 01 6 mm L ATTICE LatticeECP3 Versa Evaluation Board EH SEMICONDUCTOR User s Guide Introduction The LatticeECP3TM Versa Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 Field Programmable Gate Array The features of the LatticeECP3 Versa Evaluation Board can assist engineers with rapid prototyping and testing of their specific designs The LatticeECP3 Versa Evaluation Board is part of the LatticeECP3 Versa Development Kit The guide is intended to be referenced in conjunction with demo user s guides to demonstrate the LatticeECP3 FPGA Figure 1 LatticeECP3 Versa Evaluation Board Top Side GSRn amp PROGRAMn LED SERDES Test DDR3 Push buttons Display SMA Connectors Memory Expansion Connectors User Switches E Versa Evaluation Boord Lattice Status LEDs LFE3 35EA VERSA EVN Rev Copyright 2011 Made in USA USB Programming J3 JTAG Interface 413 Interface 10 100 1000 RJ 45 Connections On Board SPI Flash 12V DC Clock Configuration Power Input Management Memory PCI Express x1 Features Half length PCI Express form factor Allows demonstration of PCI Express x1 interconnection Electrical testing of one full duplex SERDES channel via SMA connections USB B connection for UART and device programming T
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16. 38 GND GND 39 3 3V 3 3V 40 GND GND 13 LatticeECP3 Versa Evaluation Board User s Guide x4 Expansion Connector Pin Signal 484 Ball fpBGA 1 HPE RST J20 2 GND GND 3 100 B11 4 101 B12 5 102 12 6 103 A13 7 104 12 8 105 E13 9 106 C13 10 107 C14 11 108 D13 12 109 D14 13 1010 14 14 1011 B14 15 1012 F13 16 1013 F14 17 1014 A15 18 1015 B15 19 GND GND 20 3 3V 3 3V 21 1016 C15 22 GND GND 23 1017 D15 24 GND GND 25 1018 G15 26 GND GND 27 1019 G14 28 1020 A16 29 1021 B16 30 GND GND 31 1022 F15 32 1023 F16 33 1024 17 34 GND GND 35 1025 B18 36 1026 A18 37 1027 A19 38 CARDSEL 419 39 1028 D16 40 GND GND mm LatticeECP3 Versa Evaluation Board ras F LATTICE User s Guide References e DS1021 LatticeECP3 Family Data Sheet e HB1009 LatticeECP3 Family Handbook QS013 LatticeECP3 Versa Evaluation Board Quick Start Guide UG46 PCI Express Demos for the LatticeECP3 Versa Evaluation Board e UG45 DDR3 Demo for the LatticeECP3 Versa Evaluation Board e 0044 SERDES Eye Backplane Demo for the LatticeECP3 Versa Evaluation Board Ordering Information China RoHS Environment Friendly Description Ordering Part Number Use Period EFUP LatticeECP3 Versa Evaluation Board LFE3 35EA VERSA EVN fe LAT
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19. 1 Table 1 Board Power Supply Fuses See Appendix Figure 12 Fuse Designator Description F1 12V Input Supply Fuse The board may be plugged into a host PC Only plug the board into a Express slot when the system is powered off Once inserted the PC can be safely powered on Using the evaluation board outside of a PC chassis supply requires the factory supplied wall supply module Use of other supplies is not suggested GME Technology s GFP181DA 1215B 1 or equivalent is provided with the LatticeECP3 Versa Development Kit Figure 2 Power Distribution Scheme See Appendix B Figure 12 EN LDO SERDES 1 2V 1 2 1A Power Status LED 012 SW I Q 2 5V 2 5V 1 1 A Power Status LED 031 12 0V EN 5A fused Power Status LED D13 SW 3 3 3V 1 35 A Power Status LED D9 SW 4 5V 1 5 1 1 A Power Status LED 011 EN SW CORE 1 2V 1 35 A Power Status LED 010 Programming FPGA Configuration The LatticeECP3 Versa Evaluation Board has a built in download controller for programming the LatticeECP3 FPGA The built in module consists of a USB Type B connector and a USB UART device To use the built in down load cable simply connect a standard USB cable a USB B to USB A cable is included with the LatticeECP3 Versa Development Kit from J2 to your PC with ispVM System software installed The USB hub
20. C91 C241 C242 C243 C244 4 9 C14 C19 C24 C27 C35 1UF 16V 0805SMT Panasonic ECJ 2FB1C105K CAP 1UF 16V CERAMIC C171 C173 C178 C181 0805 X5R 5 7 C13 C18 C25 C26 C36 22UF 16V TANTBSMT Kemet T491B226M016AT CAPACITOR TANT 22UF C176 C180 16V 20 SMD 6 4 C17 C30 C37 C51 10uF 25V 1206SMT TDK Corporation C3216Y5V1E106Z CAP CER 10UF 25V Y5V 1206 7 4 C31 C32 C90 C93 1NF 04028MT TDK Corporation C1005C0G1E102J CAP CER 1000PF 25V 5 0402 8 4 C38 C39 C52 C53 220NF 0402SMT TDK Corporation C1005X7R1C223K CAP CER 22000PF 16V X7R 1096 0402 9 10 C40 C41 C42 C49 C50 2206 6 3V 0805SMT TDK Corporation C2012X5R0J226M CAP CER 22UF 6 3V X5R C54 C55 C58 C63 C64 20 0805 10 4 C43 C44 C56 C57 1000pF 0402SMT Panasonic ECJ 0EB1E102K CAP 1000PF 25V CERAMIC X7R 0402 11 4 C45 C48 C59 C62 330pF 0402SMT TDK Corporation C1005C0G1H331J CAP CER 330PF 50V 5 0402 12 2 C46 C47 10pF 0402SMT TDK Corporation C1005C0G1H100D CER 10PF 50V 0402 12 C60 C61 10pF 0402SMT DNI 13 2 C65 C71 4 7UF 10V SMT TDK Corporation C1608X5R1A475K CAP CER 4 7UF 10V X5R 0603 14 1 C74 3 3UF 10V SMT TDK Corporation C1608X5R1A335K CAP CER 3 3UF 10V X5R 0603 15 2 C75 C76 DNI 16 75 C78 C84 C95 C102 100NF 0603SMT Panasonic ECJ 1VF1C104Z CAP 1UF 16V CERAMIC C104 C105 C107 C109 Y5V 0603 C110 C113 C115 C118 C119 C120 C121 C122 C124 C126 C128 C129 C130 C131 C133 C140 C142 C144 C145 C147 C148 C151 C153 C154 C
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22. design The LEDs illuminate when the FPGA output is driven LOW Table 7 shows the LED and associated FPGA pins These pins are within bank con nected to 3 3V and the user should program these to be LYCMOS33 outputs the design Figure 10 14 Segment Display Table 7 Alpha numeric LED Definitions fpBGA Ball fpBGA Ball Display Number Display Number A VE J AB3 B U7 K AB4 C Y6 L W4 D Y5 E U8 N AA4 F T8 P AA5 G R9 DP W5 H T9 DDR3 Memory Device see Appendix B Figure 17 The LatticeECP3 Versa Evaluation Board is equipped with a SDRAM memory device 1 5V 64Mb x16 96 ball FBGA 667 MHz DDR3 1333 such as the Micron MT41J64M16JT 15E G device e The DDR3 memory includes a 16 bit wide memory controller interface e The board includes termination of data address and command signals It includes all power and external compo nents needed to demonstrate the memory controller of the LatticeECP3 device 100 MHz on board clock oscillator is available to provide a DDR3 reference clock LAT EN SEMICONDUCTOR Table 8 DDR3 Memory Controller Interconnections 484 fpBGA NETNAME Ball Number DQO E5 Dat E4 DQ2 D2 DQ3 D1 DQ4 C2 DQ5 B2 DQ6 G5 DQ7 G4 62 Dag F1 2910 H4 2011 E2 2012 2913 B1 DQ14 C1 DQ15 G3 DQSO F5 F4 DQS1 H5 DQS1
23. 115 R116 117 R118 R120 R121 122 R123 R124 R125 126 R127 R129 R130 R131 R160 84 4 R83 R92 R119 R128 20R 0402SMT Vishay CRCWO040220ROFKED RES 20 0 OHM 1 16W 1 0402 SMD 85 2 R102 R136 1K 0402SMT Panasonic ERJ 2RKF1001X RES 1 00K OHM 1 10W 1 0402 SMD 86 2 R105 R139 4 99K 0402SMT Panasonic ERJ 2RKF4991X RES 4 99K OHM 1 10W 1 0402 SMD 87 2 R106 R140 4 75K 0603SMT Panasonic ERJ 3EKF4751V RES 4 75K OHM 1 10W 176 0603 SMD 88 3 R132 R133 R138 33R 0402SMT Panasonic ERJ 2RKF33ROX RES 33 0 OHM 1 10W 1 0402 SMD 89 1 R147 240R 0603SMT Panasonic ERJ 3EKF2400V RES 240 OHM 1 10W 1 0603 SMD 90 6 R150 R151 R152 R153 50R 0402SMT Vishay FC0402E50ROFST1 RES 50 OHM 50MW R154 R155 1 0402 SMD 91 5 R158 R161 R164 R165 10R 0402SMT Panasonic ERJ 2RKF2200X RES 200 OHM 1 10W 1 R168 0402 SMD 92 2 R159 R166 220R 0402SMT Panasonic ERJ 2RKF10ROX RES 10 0 OHM 1 10W 1 0402 SMD 93 1 163 680R 0402SMT Panasonic ERJ 2RKF6800X RES 680 OHM 1 10W 196 0402 SMD 94 1 R167 470R 0402SMT Panasonic ERJ 2RKF4700X RES 470 OHM 1 10W 1 0402 SMD 95 2 SW1 SW2 Panasonic EVQ Q2K03W SPST SMD 96 1 sw3 TDA DIP 8 C amp K TDAO8HOSB1 8 DIP 97 14 TP1 TP2 TP4 TP5 TestPoint DNI TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 98 1 U1 LFE3 35E FN484CES Lattice Semiconductor 99 1 U2 LT3029EDE Linear Tech 100 2 U3 U4 LT3508EUF Linear Tech 101 1 U5 FT2232HL FTDI FTD2232H USB UART JTAG 102 1 U6 93LC56 SO8 MicroChip 93LC56 SN I
24. 155 C156 C157 C160 C162 C164 C166 C167 C168 C169 C172 C174 C175 C183 C185 C186 C188 C189 C191 C193 C195 C197 C199 C201 C205 C210 C212 C213 C214 C215 C216 C218 C220 C222 C224 C225 C227 C230 C231 C232 C233 C238 C240 17 2 C79 C80 12 0603 Corporation C1608C0G1H120J CAP CER 12PF 50V 5 0603 18 2 C86 C87 100NFX5R 04028MT Kemet C0402C104K8PACTU CAP 10UF 10V CERAMIC X5R 0402 19 18 C94 C101 C103 C106 10uF 6V3 X7R 0805SMT AVX 08056C106KAT2A CAP CER 10UF 6 3V X7R C114 C116 C117 C123 10 0805 C125 C132 C139 C141 C143 C152 C158 C159 C161 C163 20 4 C111 C112 C149 C150 27pF 0608SMT Kemet C0603C270J5GACTU CAP CERAMIC 27PF 50V NPO 0603 27 mm LatticeECP3 Versa Evaluation Board sae LATTICE User s Guide Table 12 LatticeECP3 Versa Evaluation Board Bill of Materials Continued Item Quantity Reference Part Manufacturer Part Number Description 21 2 127 165 4 7UF 16V 0805SMT TDK Corporation C2012Y5V1C475Z 0 85 CER 4 7UF 16V Y5V 0805 22 1 C170 47UF 16V TANTBSMT Kemet B45196H2476K209 CAP TANTALUM 47UF 10V 10 SMD 23 1 C177 100UF D3POSCAP Sanyo 6TPE100MI 100UF 6 3V D2E POSCAP 24 1 C179 10UF 16V TANTBSMT AVX TAJB106K016R CAP TANTALUM 10UF 16V 10 SMD 25 20 182 C184 C187 C190 10NF 0603SMT Kemet C0603C103K5RACTU CAP 01UF 50V C192 C194
25. 3UF 10V CERAMIC X5R 0805
26. 41899 Bir T 2 x T M 1715909053001 z 1a INSEO90 JNOL LINSE090 3NOL ANSZOTO MZ v AWSqOTO MZ 029 DON NTO T AE o e 9 1WS 090 40 5 5 gt 5 vas NTO AJNS 090 H0 le XOL yds SWL TOS X10 tel FOROR oki LL84 Noa zzz dyad 4 tL ISHA ZHWSSL 4 ul JINSZOvO HOL la d AINSZOvO HOZ v foil XC sso Wong Westy ein 9073109 3344 JINSZOvO HOL la oonos aaay INSI here 1 5 NI t giu N asad NIO el 9 IINSZOFO HOL 1a 01194 Wala euasn IARE lt zuasn asan E JINSZOTO HOL la k NOJAH VSOd Kona veod TILH Kam THOOT NTO 5090 E lt oca 5 5 8 eoi 1NSzOv0 MOL id 9 INSZOPO HOZZ lel Kagawad NG 9919 B ka ka NSE090 4N0L z z 568 8 Na nest NG ZHNSSE r a 1220 RI T pano ZHIWSZ 991 AIASE090 JNOO LINSZOVO HOZZ 1 3HUA ZHNSSI g NASAN AE T 3 Y 5 LAT Figure 19 Reference Clock Generator SEMICONDUCTOR 24 User s Guide LatticeECP3 Versa Evaluation Board LAT SEMICONDUCTOR Figure 20 Expansion
27. 8535 5 8 El PI eog0 a34 a27 sza 1 wmsn 6588 Or Z 99NH ZL z ael a E s oreas 9 ING Y ul E 195 som gt E soris ONITIOa ZIOSS er Y ong 090 MOTI3A Q31 090 MOTTA Q31 lt 1 E vuU 57555 OH T u E nr iX Tod Ngan gt OTIX dax sr ven _ 090 090 Naaws q31 Y AVIdSIG INAWDAS FI o1 23 User s Guide LatticeECP3 Versa Evaluation Board T Y 5 um e 6 pag 1102 Aeniqeg Kepsen y zem al dO3 a 1o N39 39019 99 om suid Ajddns LT08T Vd _ dk Aemyzea soor 71 LV 122 2x ING NSE090541 ndjno oj sdeo ssed q eoeld S papa 2 Lor IWSE090 4d095 INSE090 4N00L 15090 44001 X f 3 8 5 L 9 2 S 1a zezo no sezO 9629 520 6229 20 39080
28. C EEPROM 2KBIT 2MHZ 8SOIC 103 1 U7 MAX6817 Maxim MAX6817 EUT T debounce 104 1 U8 M25P64 FLASH STMicro M25P64 VMF6TP Serial Flash 105 2 U9 U10 88E1119R_72QFN Marvell 88E1119R GPHY 106 1 U11 ddr3 96bga Micron MT41J64M16JT 15E G 64Mb x16 1 5V 96 ball 667 MHz DDR3 1333 107 1 U12 LP2998 SO8 National LP2998MAX NOPB Termination regulator Semiconductor 108 1 U13 ispClock5406D Lattice Semiconductor 109 1 x1 DSC 100 00MHz Discera DSC1123AE2 100 0000 100MHz Low Jitter LVDS Alternate Clock Oscillator 7mm x Abracon ASVMPLV 5mm 50ppm 100 000MHZ R T 110 1 X2 156 25MHz Discera DSC1121A11 156 2500 156 25MHZz Single ended Alternate CMOS Clock Oscillator Abracon ASVMPC 7mm x 5mm 156 250MHZ T 111 2 EX3 EX4 HDR40 Samtec TSW 120 07 T D HEADER 40POS 100 DL TIN 112 1 1 ATS120SM 1 HC 49 US SM CTS ATS120SM T CRYSTAL 12 0000MHZ 20PF SMD 30 Table 12 LatticeECP3 Versa Evaluation Board Bill of Materials Continued Item Quantity Reference Part Manufacturer Part Number Description 113 2 2 25MHZ CRYSTAL Citizen HC49US 25 000MABJ CRYSTAL 25 000 MHZ UB 18PF HC49 US 114 1 R19 30 1K 0402SMT Panasonic ERJ 2RKF3012X RES 30 1K OHM 1 10W 1 0402 SMD 115 1 R20 20K 0402SMT Panasonic ERJ 2RKF2002X RES 20 0K OHM 1 10W 1 0402 SMD 115 2 245 246 100 04025 Panasonic ECJ 0EB1E102K CAP 100PF 25V CERAMIC X7R 0402 116 2 C10 C12 3 3UF 10V 0805SMT Panasonic ECJ 2FB1A335K CAP 3
29. C196 C198 CERAMIC X7R 0603 C200 C204 C209 C211 C217 C219 C221 C223 C226 C228 C234 C236 26 1 C229 6 8UF TANT O805SMT Kemet T494R685K006AS CAP TANT 6 8UF 6 3V 10 SMD 27 1 C235 560PF 0603SMT Kemet C0603C561K5RACTU CAP 560PF 50V CERAMIC X7R 0603 28 4 D1 D2 D5 D6 1N4448W Fairchild 1N4448W DIODE 75V 200MA SOD523F 29 4 D3 D4 D7 D8 DFLS220L Diodes Inc DFLS220L DIODE SCHOTTKY 2A 20V PWRDI 123 30 12 D9 D10 D11 D12 D13 LED GREEN 0603 Kingbright 1608 LED 1 6X0 8MM 568 015 016 D20 021 022 CLR SMD 030 D31 31 1 D14 SCHOTTKY VISHAY V 12P10 Vishay V12P10 M3 86A DIODE SCHOTTKY 12A 100V SMPC 277 32 5 017 018 019 026 027 LED RED 0603 Kingbright APT1608EC LED 1 6X0 8MM 625NM RED CLR SMD 33 1 D23 14 SEGMENT Kingbright ACPSA04 41SRWA LED Display 34 2 D24 D25 LED_YELLOW_0603 Kingbright APT1608YC LED 1 6X0 8MM 588NM YLW CLR SMD 35 2 D28 D29 LED BLUE 0603 Kingbright APT1608QBC D LED 1 6X0 8 470NM BL WTR CLR SMD 36 6 FB1 FB2 FB3 FB4 FB21 BLM41PG600SN1 Murata BLM41PG600SN1 FERRITE CHIP 60 OHM FB22 6000MA 1806 37 5 FB5 FB6 FB23 FB24 MPZ1608Y600B TDK MPZ1608Y600B FERRITE CHIP 60 OHM FB25 2 3A 0603 38 14 FB7 FB8 FB9 FB10 Z 600 ohm 74279265 Wurth 74279265 FERRITE BEAD 600 OHM FB11 FB12 FB13 FB14 2A 0603 FB15 FB16 FB17 FB18 FB19 FB20 39 1 F1 F1251CT ND Littlefuse 0154010 DR FUSEBLOCK WITH 10A FUSE SMD 40 1 J1 PJ 032A CUI PJ 032A CON PWR JCK 2 0 X 6 5MM VERT 41 1 J2 USB MINI AB M
30. Connector T o Paus 1102 91 uorew VSH3A 493 9219 10 9UU01 uoisuedx3 LT08T soot FIL 128 Is 0000000 00000000 0000000000 8 889 9 9900068 600000000000 9 00099 9 WEES xr Y ING LWS 090 40 8 5 8 5 Bis FS FS 2 gl 5 8331 2 2 E 3 3 3 3 eezd sezo _ 2620 ATE p pa ODIN 5 5 PIH r N 21 190QU1 133HAY 9Ld 19001 9291d 9031 0 NOOdX3 61 9 sir 9ZOLNOOdX3 81Y N I9SOQLSI9Ld gt Nr Lr1d9 47195001 7191 LN NI 11149 OWnu 9 3seud Mu 9 190096914 SLA 84 11199 ownu g dseHd TAO Nood 818 goqUvesld N LT149 OWN 201 NOOdXH _ LV jooquaesid 109 8201 Nda __ 914 o OZW 21X10 dVs6Hd
31. H6 CEO G8 RAS A6 CLKP L5 CLKN K6 Ethernet Interfaces see Appendix B Figure 18 LatticeECP3 Versa Evaluation Board User s Guide 484 fpBGA NETNAME Ball Number C8 A1 7 2 B7 A3 D8 A4 F9 A5 E9 A6 A3 A7 D7 A8 A7 A9 B8 A10 C9 A11 C10 0 K5 A4 BAO B4 BAI E6 D5 ODT E7 CS0 C6 WE D6 VREF E1 DMO E3 DM1 F3 Two Marvell 88E1119R Gigabit Ethernet transceiver devices U17 are included on the board This physical layer device supports 1000BASE T 100BASE TX and 10BASE T applications via a standard media interface to a dual RJ45 connection The RJ45 connection includes network magnetics providing the proper signal conditioning elec tro magnetic interference suppression and signal isolation This connector includes two LEDs and the board includes four status LEDs from the Marvell device The LEDs are register programmed and detailed descriptions are available in the Marvell device data sheet Table 9 PHY Status Indicators LED Status Description RJ45 Yellow LED RX RJ45 Yellow LED TX Each Marvell 88E1119R device communicates via a interface to the LatticeECP3 device LAT SEMICONDUCTOR Table 10 FPGA GPIO to GMII Interfaces LatticeECP3 Versa Evaluation Board
32. NVE d 3 H V In SUI nog eria gt TXT Tan a RA OR a juo 0092 XE tapo 1 SHORTS gt N Sims Loane bz WER THIS 2 TRA mom vane FE TENNE Dana alz Selou tolong paed 5 z 5 samre EE NONG sud col Pu IHW SNA 5 MON TOG TA ce d s ar 8 3 Pu 3m fo oid L2 E 1900 iiia xoe 03 T T z T 7 T z Y I mo p sss TIGE ene 3 peog VSH3A EdO3 pabig 2 SVFH G AHd 1 0001 001 01 tX AGRO 4 Va gena rte serra LV AWS8090 4N001 User s Guide LatticeECP3 Versa Evaluation Board _LWse090 JNOO tWSS080 2X EA9 3n01 5926 2 WP 09 2 1919 0283 E E amp 5 IWSE090 4No01 090 00 AWse090 4No01 AHd9 1NSZOFOXGG 7
33. OLEX 56579 0576 CONN RECEPT USB 5POS RT ANG SMD 42 2 J3 J14 HEADER 10 Samtec TSW 110 07 T S 10x1 0 25 Header 43 1 J4 HEADER 3X2 Samtec TSW 103 07 T D 3x2 0 25 Header 44 4 J5 J6 J7 J8 SMA Molex 73391 0060 CONN JACK SMA STR 50 OHM PCB 45 1 99 0826 1X2T 23 F Bellfuse 0826 1X2T 23 F CONN MAGJACK 2PORT GIGABIT GO Y 46 2 J10 J12 HEADER 2 Samtec TSW 102 07 T S 2x1 0 25 Header 47 1 J13 HEADER 3 DNP DNI TSW 103 07 T S 3x1 0 25 Header 48 4 L1 L2 L3 L4 4 7uH SPD62R 472M API Delavan SPD62R 472M 6 60mm x 6 20mm x 3 00mm 4 7uH Power inductor 49 1 L5 1UH 1206SMT Murata LQM31PN1ROMOOL INDUCTOR 1 0UH 1 2A 1206 50 1 PP1 PROBEPOINT DNI 51 4 Q1 Q2 Q3 Q4 2N2222 SOT23 Diodes Inc MMBT2222A 7 TRANS NPN 40V 350MW SMD SOT 23 52 2 Q5 Q6 BCP69 16 NXP BCP69 16 TRANSISTOR PNP 20V Semiconductors 1A SOT223 28 LatticeECP3 Versa Evaluation Board User s Guide LATTICE EN SEMICONDUCTOR Table 12 LatticeECP3 Versa Evaluation Board Bill of Materials Continued Item Quantity Reference Part Manufacturer Part Number Description 53 5 RN2 RN3 RN5 741X083 100R CTS 741X083101JP RES ARRAY 100 OHM 8TERM 4RES SMD 54 2 RN6 RN8 EXB2HV151JV Panasonic EXB2HV151JV RES ARRAY 150 OHM 5 8 RES SMD 55 1 RN7 EXB2HV471JV Panasonic EXB2HV471JV RES ARRAY 470 OHM 5 8 RES SMD 56 1 RN9 EXB2HV472JV Panasonic EXB2HV472JV RES ARRA
34. SEMICONDUCTOR Technical Support Assistance e mail 8 techsupport latticesemi com Internet www latticesemi com Revision History LatticeECP3 Versa Evaluation Board User s Guide Date Version Change Summary April 2011 01 0 Initial release August 2011 01 1 Updated LatticeECP3 Versa Evaluation Board Top Side diagram Corrected ispVM System software version number in the isp VM Requirements text section Corrected ispVM JTAG Connector Pinout table caption information November 2011 01 2 error the column headings of the Expansion Connections table February 2012 01 3 Updated document with new corporate logo February 2012 01 4 Expansion Connections table Updated information for pins 31 and 33 August 2012 01 5 Added alternate Abracon part numbers for Discera oscillators in Bill of Materials July 2013 01 6 Added note in the Alternate ispVM Download Interface section Updated Technical Support Assistance information 2013 Lattice Semiconductor Corp All Lattice trademarks registered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice User s Guide LatticeECP3 Versa Evaluation Board sm LATTICE SEMICONDUCTOR Appendix A Schematics Figure 11
35. TAWI TANI 8 SIN 521 WOXIS V Y EUH GUN 092 we Here A BON Zed no TG3TZXHd 0097 BG TETE WROD AHI SILI Sized INSZ0Y0 400 Lisz0v0 4001 dow a pared 1ejeureip 10010 PU NG TETE 009 2 gles N TON mus sora d i a TOW eS Woon ES ania TON Yaad SIN oon ag ca Olan EAH 9 21 ver 92622 WYO 009 2 Sted 2 SFLA S LWSSOBO HZX EAS ANOL OU TAM Ls 2 Bj xoef sdeo t 1NSe090 4ND01 0087 10 001 ore Z sa LAT SEMICONDUCTOR Figure 16 10 100 1000 T PHY 2 RJ45 User s Guide LatticeECP3 Versa Evaluation Board
36. The LatticeECP3 Versa Evaluation Board allows for several clock source options Some of these options are con trolled via the ispClock5406A programmable clock manager device The ispClock5406A enables the reference clock from the PCI Express interface to provide a reference clock to the SERDES This is true only when the board is in a PCI Express host socket When the board is not in a PCI Express host socket the clock will be supplied by a 156 25 MHz clock on board oscillator Both clock inputs can be fanned out to the dedicated SERDES reference inputs FPGA inputs and to the expansion connectors The factory default programming only connects the SERDES reference clock inputs Factory defined demonstration designs will control and manage the clock Figure 7 Clock Controller Scheme Clock Select PCI Express 156 25 MHz On board Oscillator PCLKTO F11 FPGA Clock PCLKCO F12 REFCLKP Factory Default SERDES V12 Clock Programming Reference Clock REFCLKN SERDES Reference V11 Clock Only Expansion Interface Clock mm LatticeECP3 Versa Evaluation Board HH LATTICE User s Guide General Purpose Clock Source An on board 100MHz LVDS oscillator is provided for general purpose use This clock source is connected to differ ential inputs L5 and K6 and must be used as LVDS inputs to the FPGA This pin pair also provides optimal interface to the FPGA PLL for customized use The PCI Exp
37. X2 1900079814 201 NOOdX3 22 5309189814 7601 NOOdX3 221 230915914 8001 NOOdX3 _ 611 4 zS0QL 8ES1d 601 NOOdX3 811 11109 14 1 zeoauv a4 11109 N Nr Lr109 oWnuaezud d 85 1 14 EA 1 1 9 0NnuvGcud 2309180914 BH zeoauiarzud 20010914 1801 NOOdX3 _ 22 ene SLY 0 86714 0 4 gZr ttd esoauverid 9801 NOOdX3 803 LIIHAN9ZHd ZS0QU8 v1d 2891 NOOdX3 _ 42 ZSOQLNVZv1d NOOdX3 22H cebquivvada rOQL89r1d 880 NOOdX3 12H N SPOCLV9PLd 00539 4 ezsoaurvezud ___ __617 rOQLVv1d OHO NOOdX3 _ 229 czoquivizud NOOdX3 129 d EPSDOLVEPLA 679 817 57001 91914 EHOLNOOdX3 207 HOLNOOdX3 _ 224 ZW 1O19d g0p1d SYOINOOdXd _ 223 NOODS ZLQ am OS TOI NODD oin 16 280
38. Y 4 7K OHM 5 8 RES SMD 57 1 RP1 CTS RT1402B7 CTS Corporation RT2402B7 RES NET DDR SDRAM Resistor Electrocom 50 OHM 3X9 BGA ponents 58 14 R1 R2 R32 R33 R36 OR 0603SMT Panasonic ERJ 3GEYOROOV RES 0 0 OHM 1 10W 0603 R38 R141 R145 R146 SMD R169 R170 R175 R176 R177 59 7 R3 R4 R143 R144 R148 OPEN 0603SMT DNI R149 R178 60 16 R5 R9 R21 R41 R42 10K 0402SMT Panasonic ERJ 2RKF 1002X RES 10 0K OHM 1 10W R43 R54 R63 R64 R66 1 0402 SMD R67 R68 R69 R70 R71 R157 61 4 R6 R10 R12 R14 51K 0402SMT Panasonic ERJ 2RKF5102X RES 51 0K OHM 1 10W 196 0402 SMD 62 1 R7 21 5K 04028MT Panasonic ERJ 2RKF2152X RES 21 5K OHM 1 10W 196 0402 SMD 63 1 R8 35 7K 04028MT Panasonic ERJ 2RKF3572X RES 35 7K OHM 1 10W 196 0402 SMD 64 1 R11 34K 04028MT Panasonic ERJ 2RKF3402X RES 34 0K OHM 1 10W 1 0402 SMD 65 1 R13 11 5K 0402SMT Panasonic ERJ 2RKF1152X RES 11 5K OHM 1 10W 196 0402 SMD 66 1 R15 5_11K 0402SMT Panasonic ERJ 2RKF5111X RES 5 11K OHM 1 10W 1 0402 SMD 67 1 R16 15K 0402SMT Panasonic ERJ 2RKF1502X RES 15 0K OHM 1 10W 1 0402 SMD 68 1 R17 16 9K 0402SMT Panasonic ERJ 2RKF1692X RES 16 9K OHM 1 10W 196 0402 SMD 69 1 R18 63 4K 04028MT Panasonic ERJ 2RKF6342X RES 63 4K OHM 1 10W 196 0402 SMD 70 4 R22 R23 R24 R25 1 8K 1206SMT Panasonic ERJ 8ENF 1801V RES 1 80K 1 4W 1 1206 SMD 71 4 R26 R30 R31 R61 R179 220R 0603SMT Panasonic ERJ 3EKF2200V RES 220 1 10W 1 0603 SMD 72 5 R27 R28 R29 R37 65 10K 0603SMT Panasoni
39. ard sam LATTICE Figure 21 Mechanical Drawing SEMICONDUCTOR S LLOC 8L epu4 preog VSH3A dO3 pealold peolueyoa rn m LIO8T Vd NOLINONOZINIS NEN STIEA SO9T VI PA s LHL YHL dads 2943 ATuo suorsueurq UTI 9 X u9sL F NGA 3 1162 Q 199120497 9 424 up VISE TINT 3 05224 0032 1 191 K lt 26 LatticeECP3 Versa Evaluation Board User s Guide LAT TICE SEMICONDUCTOR Appendix B Bill of Materials Table 12 LatticeECP3 Versa Evaluation Board Bill of Materials Item Quantity Reference Part Manufacturer Part Number Description 1 1 CN1 Express x1 Edge Finger PCB fingers Connectors 2 34 C1 C2 C5 C15 10NF 0402SMT Panasonic ECJ0EB1E 103K CAP 01UF 25V C16 C20 C21 C29 C33 CERAMIC X7R 0402 C83 C85 C89 C92 C96 C97 C98 C99 C100 C108 C134 C135 C136 C137 C138 C146 C202 C203 C206 C207 C208 C237 C239 3 25 C6 C7 C8 C9 C11 C22 100NF 0402SMT Panasonic ECJ 0EB1A104K CAP 1UF 10V CERAMIC C23 C28 C34 C66 C67 X5R 0402 C68 C69 C70 C72 C73 C77 C81 C82 C88
40. c ERJ 3EKF1002V RES 10 0K OHM 1 10W 1 0603 SMD 73 14 R34 R40 R51 R53 R100 4 7K 04028MT Panasonic ERJ 2RKF4701X RES 4 70K OHM 1 10W R101 R103 R134 R135 1 0402 SMD R137 R162 R171 R172 R173 74 2 R35 R39 27R 0603SMT Panasonic ERJ 3EKF27ROV RES 27 0 OHM 1 10W 1 0603 SMD 75 1 R44 12K 0603SMT Panasonic ERJ 3EKF1202V RES 12 0K OHM 1 10W 1 0603 SMD 76 8 R45 R46 R47 R57 R58 4 7K 0603SMT Panasonic ERJ SEKF4701V RES 4 70K OHM 1 10W R59 R72 R142 1 0603 SMD 77 1 R48 2 2K 0603SMT Panasonic ERJ SEKF2201V RES 2 20K OHM 1 10W 1 0603 SMD 78 2 R49 R174 1K 0603SMT Panasonic ERJ SEKF1001V RES 1 00K OHM 1 10W 196 0603 SMD 79 1 R50 1M 0603SMT Panasonic ERJ SEKF1004V RES 1 00M OHM 1 10W 1 0603 SMD 80 3 R55 R56 R60 680R 0603SMT Panasonic ERJ 3EKF6800V RES 680 OHM 1 10W 1 0603 SMD 81 1 R62 OPEN 0402SMT DNI 82 5 R73 R74 R107 R108 100R 0402SMT Panasonic ERJ 2RKF 1000X RES 100 OHM 1 10W 1 R156 0402 SMD mm LatticeECP3 Versa Evaluation Board LATTICE User s Guide Table 12 LatticeECP3 Versa Evaluation Board Bill of Materials Continued Item Quantity Reference Part Manufacturer Part Number Description 83 47 R52 R75 R76 R77 R78 0R 0402SMT Panasonic ERJ 2GE0R00X RES 0 0 OHM 1 10W 0402 R79 R80 R81 R82 R84 SMD R85 R86 R87 R88 R89 R90 R91 R93 R94 R95 R96 R97 R98 R99 R104 109 R110 R111 R112 113 R114 R
41. ce it includes the built in download module and only requires the USB cable included with the board Standalone ispVM download cables may be purchased separately from Lattice After initial board setup use the following procedure to program the board Instructions assume that ispVM soft ware has been installed on a local PC Requirements PC with ispVM System 18 0 or later programming software installed with appropriate drivers USB driver for USB cable Windows 7 XP 2000 NT parallel port driver for ispDOWNLOAD cable Note An option to install these drivers is included as part of the ispVM System setup ispDOWNLOAD cable pDS4102 DL2A HW7265 DL3A HW USB 1A etc Required only for alternative FPGA programming and ispClock5406A reprogramming mm LatticeECP3 Versa Evaluation Board HH LATTICE User s Guide Board Programming Configuration Status Indicators see Appendix B Figure 13 Figure 3 LatticeECP3 Status LEDs and Push button Controls SWi FPGA GSRN GSRN 18 E AU KOE COW 9W PROGRAMN wy SL L 11 DONE EW The LEDs indicate the configuration status of the LatticeECP3 FPGA 017 red illuminated indicates that programming was aborted or reinitialized driving the INITN output low D20 green illuminated indicates the successful completion of configuration by releasing the open collector DONE output pin D19 red illuminated indicates that PROGRAMN
42. eog VSH3A 499 o paad sz o E 3 g g 3 va moyoryaog Ivi 3 gt gt ES D ferrea ES r L 2 m 3 n WSS aan ES BO a EER 0 5 69H 89H 89 reo zt jana zna S t ina e gt tug 8222 mg Si 0 NEE lal NI ZHW8SE 4 14 WOW V9dd L SIT HSS m Bo usro S iwa m gt Tes HG 4 E E Wiis t snaeqs ee Ser gezia amp 8 HSVIS Ids sal msada 9 2 5 void 18 DIHNOD 398 8 yed SE s pa o B ron 228 Nuassoosonnoaweua E El m In 155 NILLNOO NS NSO ESHd m E oza b 80 99 8H NEINOONOIOHNISONSHd ace iaso E ar SS ss 6H E o k 9 youd Jsa k nado 129 Jes asnamuiua jz a El 19515 YOdd OH lz 00155 1Olds 90 9S Hd so aaron soe oa eg 99908 H E OXI mom Lip Sean i Su Qusu B NSE000 ee O Tr og ire OEE 1 5 5 nee Bx
43. ersa Evaluation Board Figure 9 LatticeECP3 Versa Evaluation Board LEDs and Switches D D D D D D D D SW3 mmo RN n RNT The designated pins are connected according to Table 5 Table 5 FPGA Ball to DIP Switch Position General Purpose LEDs See Appendix B Figure 18 FPGA Ball Number SW3 DIP Switch Position J7 1 46 H2 H3 J3 K3 J2 J1 O Q 02 User s Guide The LEDs provided on the LatticeECP3 Versa Evaluation Board are connected to general purpose FPGA I Os These LEDs provide status for user designs and must be included in the design The LEDs illuminate when the FPGA output is driven LOW Table 6 shows the LED and associated FPGA pins These pins are within an bank connected to 3 3V and the user should program these to be LVCMOS33 type outputs in the design Table 6 LED Definitions LED FPGA Ball PCB Number Number Designator LED Color LED0 U19 D21 Green LED1 U18 D22 Green LED2 AA21 D24 Yellow LED3 Y20 D25 Yellow LED4 W19 D26 Red LED5 V19 D27 Red LED6 AA20 D29 Blue LED7 AB20 D28 Blue mm LatticeECP3 Versa Evaluation Board HH LATTICE User s Guide Alpha numeric LED Display see Appendix A Figure 18 A 14 segment alpha numeric display is provided on the board D23 These LED segments are connected to gen eral purpose FPGA l Os The LEDs must be included in the FPGA
44. is low D18 red illuminated indicates that GSRN is low PROGRAMN and GSRN These push button switches assert de assert the logic levels on PROGRAMN SW2 and GSRN SW1 Depress ing the button drives a logic level 0 to the device Programming Serial SPI Flash Memory A serial SPI 16 pin TSSOP 64M Flash memory device U8 is on board for non volatile configuration memory storage A STMicro M25P64VMF16 device is populated on board The Serial SPI Flash memory device can be configured easily via its JTAG port This mode enables the FPGA to be programmed at power up or assertion of PROGRAMN with a bitstream stored in the memory device 1 Connect the LatticeECP3 Versa Evaluation Board 2 Inthe dialog box select SPI Flash Programming Mode in the Device Access Option pull down menu m L ATTICE LatticeECP3 Versa e SEMICONDUCTOR Figure 4 Device Information Dialog Screen 18 LSC ispVM System Version 17 9 1 New Scan Configuration Setup BH File Edit View Project ispTools Options Window Help EHI EB Fm E EH E Z SE ER FR ES 0 Device List FileName IR Length Operation m LFE3 35EA C top_x4di bit SPI Flash Erase Program Verity For Help press F1 3 The SPI Serial Flash Device dialog box will open In this box select SPI Flash Erase Program Verify in the Operation pull down menu 4 Select SPI Serial Flash in the Device Family pull down menu STMicro under the Vendor pu
45. ll down menu SPI M2564 under the Device pull down menu and 16 lead SOIC under the Package submenu Figure 5 Select Device Dialog Box Select Device Device Family Device SPI Flash ISPI M25P54 SPI Serial Flash SPI M25P05 A SPI Serial Flash Beta SPI M25P10 A SPI M25P20 SPI M25P40 SPI M25P80 SPI M25P16 SPI M25P32 SPI M25P64 SPI M45PE 80 SPI M45PE16 Vendor Package STMicro 16 SOIC ATMEL Macronix 8 lead VDFPN8 NexFlash SPANSION Device Description 25 v LAT TICE SEMICONDUCTOR LatticeECP3 Versa Evaluation Board User s Guide Figure 6 Sample SPI Serial Flash Device Dialog Box SPI Serial Flash Device Flash Device Vendor Select SPI M25P64 STMicro Cancel Device Description Package Device Size M25P64 VMFET i amp jeadSOIC MBits Starting Address Ending Address Data File Size 0x 0240000 Hex 2 Bytes b Data File Load From File Browse I PAS PB Boardtest untitled ba Operation 5 PI Flash Erase Program iv Erase on Programming Error 5 Click OK in the SPI Serial Flash Device dialog box Then click OK in the Select Device dialog box You will return to the main configuration screen 6 From the main programming window select Go from the top toolbar This will begin the SPI Serial Flash pro gramming On Board Clock Capabilities See Appendix B Figure 19
46. on the PC will detect the addition of the USB function making the built in cable available for use with the ispVM System software The USB cable is connected in parallel to J3 mm L ATTICE LatticeECP3 Versa Evaluation Board HHH SEMICONDUCTOR User s Guide Alternate ispVM Download Interface J3 is a 1x10 100mil header that is provided for use with an external Lattice download cable available separately A USB download cable can be attached to the board using J3 to interface with the FPGA U1 Note Resistors R38 R33 R32 and R36 need to be removed A separate header is provided to interface to a download cable for the ispClock 5406A clock device 013 U13 is not interfaced to the built in download interface U13 is factory programmed for use with the reference designs and should only be altered for customized designs A 10 pin JTAG connector is used in conjunction with the ispVM USB download cable to program and control the device A separate 10 header J14 is provided for programming 013 Table 2 ispVM JTAG Connector Pinout J3 and J14 See Appendix B Figure 5 Pin Function Color 1 PWR Red 2 TDO Brown 3 TDI Orange 4 N C 5 N C 6 TMS Purple 7 GND Black 8 TCK White 9 N C 10 N C ispVM Requirements Note An ispDOWNLOAD cable is included with Lattice Diamond design software This cable is not needed for the typical use of this board sin
47. ress add in card specification requires add in boards to include capabilities to tell the host of its pres ence The LatticeECP3 Versa Evaluation Board allows this optional connection via a board jumper The factory default will have two jumpers installed as shown below for the PRSNT connection to the PCI Express host Figure 8 PCI Express PRSNT Control Connection HE PCI Express PRSNT Jumper Selector SERDES The LatticeECP3 quad based SERDES FPGA is utilized on the board for several purposes The PCSA quad is pro visioned to provide a single full duplex PCI Express channel The high speed signals are connected to the PCI Express edge connection Table 3 PCI Express Channel Interconnections PETpO HDINPO Y15 PETnO HDINNO Y14 PERpO HDOUTPO AB15 PERnO HDOUTNO AB14 Table 4 SMA Test Interconnections J5 HDINP3 Y8 J6 HDINNO Y9 J7 HDOUTP3 AB8 J8 HDOUTN3 AB9 FPGA Test Pins see Appendix B Figure 18 General Purpose DIP Switches General purpose FPGA pins are available for user applications FPGA pins are connected to switch SW3 a SPST slide actuated DIP switch The switches are connected to logic level O when moved to the ON position Switch posi tion 1 is indicated with a dot These inputs are within a bank connected to 1 5V The user must program these inputs to be the LVCMOS15 type the design LATTICE BB SEMICONDUCTOR LatticeECP3 V
48. wo RJ45 interfaces to 10 100 1000 Ethernet to GMII On board Boot Flash 64M Serial SPI Flash DDR3 1333 memory components 64Mb x16 Expansion mezzanine interconnection for prototyping 14 segment alpha numeric display Switches LEDs and displays for demo purposes ispVM programming support On board reference clock sources mm LatticeECP3 Versa Evaluation Board HH LATTICE User s Guide The contents of this user s guide include top level functional descriptions of the various portions of the evaluation board descriptions of the on board connectors diodes and switches and a complete set of schematics Caution The LatticeECP3 Versa Evaluation Board contains ESD sensitive components ESD safe practices should be followed while handling and using the evaluation board LatticeECP3 Device This board features a LatticeECP3 FPGA with a 1 2V core supply It can accommodate all pin compatible LatticeECP3 devices in the 484 ball fpBGA 1mm pitch package A complete description of this device can be found in the LatticeECP3 Family Data Sheet Note The connections referenced in this document refer to the LFE3 35EA 8FN484C device Applying Power to the Board The LatticeECP3 Versa Evaluation Board is ready to power on The board can be supplied with power from a PCI Express host system or standalone with an external wall power module The 12V DC input power source is fused with a surface mounted fuse as noted in Table
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