Cyclone II FPGA Starter Development Kit User Guide
Contents
1. c Im lt 9 Kk n o mlw s A oa 5 vVIr Ol A 6 1 Many commercial media audio players use a large external storage device such as a Secure Digital SD card or Compact Flash CF card to store music or video files Such players may also include high quality digital to analog converter DAC devices to produce good audio quality The development board provides the hardware and software for SD card access and for the professional audio performance which enable users to design advanced multimedia products on the development board This demonstration shows how to implement an SD Card Music Player on the development board The sample music player design stores the music files in an SD card and enables the board to play the music files via its CD quality audio DAC circuits The design uses the Nios II processor to read the music data stored in the SD Card and uses the Wolfson WM8731 audio CODEC to play the music 6 5 Cyclone Il FPGA Starter Development Kit User Guide SD Card Music Player Because the audio CODEC is configured in the slave mode external circuitry must provide the ADC DAC serial bit clock BCK and left right channel clock LRCK to the audio CODEC The block diagram Figure 6 3 shows that the sample design provides an audio DAC controller for clock generation and data flow control The audio DAC controller is integrated into the Avalon bus architecture so2. VGA Display Figure 4 7 Control Panel VGA Tab Window CII CII Starter Kit Control Panel DAR Open Help About PS2 amp LED SRAM DE1 Board Cyclone Il FPGA Starter Board www terasic cam V Default Image Cursor Enable 2 Ensure that the Default Image and Cursor Enable boxes are checked 3 Connect a VGA monitor to the development board and observe the default image from the Control Panel displayed on the screen 4 Confirm that the cursor appears on the screen manipulate it by moving the X Y axes scroll bars on the Control Panel Displaying Another Image from a Downloaded Bitmap File For another image to load locate the picture dat bitmap file in the CII_Starter_demonstrations pictures directory of the CII Starter System CD ROM To display this image perform the following steps 1 Select the SRAM tab of the Control Panel and load the file picture dat into the SRAM 4 12 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel 2 Select the TOOLS tab and choose Asynchronous 1 for the SRAM Multiplexer port Figure 4 8 Figure 4 8 Configuring the Port to Access the Image Data in the SRAM CII CII Starter Kit Control Panel Open Help About PS2 amp LED SRAM SDRAM Multiplexer Host USB Port M FLASH Multiplexer Host USB Port v SRAM Multiplexer Asynchronous 1 Configure Board Test 3 Click on the Configure button to ac
3. cb_index html M For Nios II 32 bit embedded processor solutions http www altera com technology embedded emb index html Hardware A Before beginning any work prepare the board as follows Installation m Assemble a rubber silicon cover Figure 1 1 for each of the six copper stands on the board M Mount the clear plastic cover over the top of the board for extra protection by using additional stands and screws Figure 1 1 Board Stand Covers F Software The instructions in this section describe how to install the following Installation m Cyclone II FPGA Starter Development CD ROM m The Quartus II Software Development Kit Edition Altera Corporation 1 3 October 2006 Cyclone Il FPGA Starter Development Kit User Guide Software Installation Installing the Cyclone Il FPGA Starter Development Kit CD ROM The Cyclone II FPGA Starter Development Kit CD ROM contains the following items Mm Sample design files and board design files for the kit m Cyclone II FPGA Starter Development Kit User Guide this document m Cyclone II FPGA Starter Development Board Reference Manual To install the Cyclone II FPGA Starter Development Kit CD ROM perform the following steps 1 Insert the Cyclone II FPGA Starter Development Kit CD ROM into the CD ROM drive c The CD ROM should start an auto install process If it does not browse to the CD ROM drive and double click on the setup exe file 2 Follow the online in
4. 2 1 Cyclone Il Development Board Layout and Components USB Mic Line i VGA Video RS 232 Blaster In In Port Serial Port 7 5V DC Power ae 4 Lo t Supply Connector t 1 ne 24 bit Audio CODEC Power ON OFF Switch 27MHz Oscillator 50MHz Oscillator 24MHz Oscillator lt gt PS 2 Port Expansion Header 2 JP2 with Resistor Protection Expansion Header 1 JP1 with Resistor Protection Altera USB Blaster Controller Chipset Altera EPCS4 Configuration Device RUN PROG Switch for JTAG AS Modes Altera 90nm Cyclone Il FPGA with 20K LEs 7 Seg Display Module OIRSAIEEDS a BEE aj E eee DE a 8 Green LEDs alalolo Tal alalila K gt 4 SMA External Clock 10 Toggle Switches 4 Push button switches ot gl al fal IMC Li E 8MByte SDRAM 512KByte SRAM 4MByte Flash Memory Req uirements Preparation for using the development board requires the following prerequisite actions Altera Corporation October 2006 Powering Up the Development Board Is Install the Altera Quartus software on the host computer if not already installed The Cyclone II FPGA Starter Development Board includes an integrated USB Blaster chip set for programming the FPGA Install the Altera USB Blaster driver software on the host computer if not already installed Communication between the computer host and the development board requires Altera USB Blaster driver software already installed on the host computer Poweri ng U p the
5. To power up the development board perform the following steps Development 1 Connect the USB Blaster cable from the host computer to the Board USB Blaster port on the development board 2 Connect the 7 5 V DC adapter to the development board and to a power source 3 Connect a VGA monitor to the VGA video port on the development board 4 Connect a headset to the Line Out audio port on the development board 5 Slide the RUN PROG switch on the edge of the development board to the RUN position 6 Turn the power on by depressing the ON OFF switch on the development board Confirmin g As the development board powers on verify correct operation by Board Operation 1 2 2 2 performing the following steps Confirm that all user LEDs are flashing Confirm that all 7 segment displays cycle through numbers 0 through F Confirm that the VGA monitor displays the default image Figure 2 2 with the SWO switch set to the DOWN toward the edge of the board position Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Development Board Setup Figure 2 2 Default VGA Output Pattern SWO DOWN DE1 Board Cyclone ll FPGA Starter Board www terasic com 4 Confirm that the VGA monitor displays the default image Figure 2 3 with the SWO switch set to the UP away from the edge of the board position Figure 2 3 Default FGA Output Pattern SWO UP 5 Set the
6. development board Altera Corporation 3 3 October 2006 Cyclone Il FPGA Starter Development Kit User Guide Control Panel Start 3 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 N E RYA 4 Using the Control Panel Control Panel Overview The Control Panel consists of two parts the GUI on the host and circuitry specified in Verilog code downloaded to the FPGA on the development board After the kit CD_ROM has been installed the control panel hardware and software can be found in the lt kit path gt Examples CII_Starter_demonstrations CII_Starter USB_API_v1 directory The available Verilog code enables a knowledgeable user to change the functionality of the Control Panel Using the Control Panel GUI on the host computer a user can issue commands to control circuitry on the development board through the USB Blaster cable connection as illustrated in Figure 4 1 The design downloaded to the Cyclone II FPGA device on the development board implements a command controller that processes the commands Then to perform the appropriate actions the command controller communicates with the controller of the affected input output I O device on the development board Figure 4 1 Control Panel Access to the Development Board DEL DEI Control Panel DO Open Help About SRAM VGA TOOLS PS2 amp LED FLASH SDRAM LED amp 7 SEG LED I LED6 LEDS LED4 LEDS I LED2 l LEDIT LEDOT LED
7. integrated control environment that includes a software controller in C a USB command controller a multi port SRAM SDRAM flash memory controller and demonstration circuitry specified in Verilog code These features enable users to implement and test designs without the need to implement complex application programming interfaces APIs host control software or SRAM SDRAM flash memory controllers This user guide addresses the following topics M How to set up power up and verify correct operation of the development board M How to install the Altera Development Suite Tools and the Cyclone II FPGA Starter Development Kit CD ROMs M How to set up and use the Control Panel a graphical user interface GUI to manipulate components on the board implement applications and display images on a VGA monitor M How to configure the Cyclone II FPGA M How to set up and run application examples For complete details on the development board refer to the Cyclone II FPGA Starter Development Kit Reference Manual Before proceeding check the contents of the Development Kit E Cyclone II FPGA Starter Development board Further Information Cyclone II FPGA Starter Development Kit CD ROM containing the development board documentation and supporting materials including the User Guide and Reference Manual Control Panel utility reference designs and demonstrations device datasheets tutorials and a set of laboratory exercises The Alter
8. that the Nios II processor can control the application During operation the Nios II processor checks if the FIFO memory of the audio DAC controller becomes full If the FIFO is not full the processor reads a 512 byte sector and sends the data to the FIFO of the audio DAC controller via the Avalon bus The audio DAC controller uses a 48 kHz sample rate to send the data and clock signals to the audio CODEC The design also mixes the data from the Mic In port with data from the Line In port for the Karaoke style effects Figure 6 3 SD Music Player Block Diagram Nios II CPU I2C Audio Line out Configuration Audio DAC Line in Controller Bypass ADC to DAC 6 6 File Locations M Project directory CII_Starter_SD_Card_Audio M Bit stream used CII Starter SD_Card_Audio sof or pof M Nios II Workspace CII_ Starter SD_Card_Audio Demonstration Setup To set up the demonstration perform the following steps Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Advanced Examples 1 Format the SD card into FAT16 format 2 Playing a music file with this demonstration requires that the file use the WAV format Copy one or more such WAV files onto the FAT16 formatted SD card Due to a limitation in the software to remove any WAV file requires reformatting the whole SD card 3 Load the bit stream into the FPGA 4 Run the Nios I IDE under the workspace
9. the SDRAM or SRAM on the development board E Write sequential data or the entire contents of a file to the SDRAM or SRAM M Read sequential data or the entire contents of the SDRAM or SRAM to a file This following sections describe how to access the SDRAM the same approach also applies to accessing the SRAM Read Write Data To write read data from to the SDRAM perform the following steps 1 Select the SDRAM tab on the Control Panel Figure 4 4 4 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Altera Corporation October 2006 Using the Control Panel Figure 4 4 Control Panel SDRAM Tab Window CI CII Starter Kit Control Panel DER Open Help About SRAM PS2 amp LED SDRAM Random Access Address g wDATA 0000 DATA 0000 Sequential Write Address g Length g I File Length Sequential Read Address g Length g l Entire Sdram 2 To write a 16 bit word into the SDRAM use the Random Access boxes to enter the address of the desired location specify the data to write and click on the Write button 3 To read the contents of a location enter the address and click on the Read button Sequential Write To write the contents of a file into the SDRAM use the Sequential Write function of the Control Panel to perform the following steps 1 Select the SDRAM tab on the Control Panel and use the Sequential Write boxes 2 Specify the starting address in t
10. A joo Sequential Write Address g Length fo File Length Sequential Read Address g Length o I Entire Flash Altera Corporation 4 7 October 2006 Cyclone Il FPGA Starter Development Kit User Guide Flash Memory Programmer Click on the Chip Erase 40 Sec button Observe the button and window frame title prompt and wait for the operation to finish this takes about 40 seconds Enter the desired address into the Address box and the data byte into the wDATA box Click on the Write button To read a byte of data from a random location enter the address of the location and click on the Read button The rDATA box displays the content of the specified address Sequential Write To write the contents of a file into flash memory perform the following steps 1 Select the FLASH tab on the Control Panel 2 Inthe Random Access area click on the Chip Erase 40 Sec button Observe the button and window frame title prompt and wait for the operation to finish this takes about 40 seconds 3 Inthe Sequential Write area specify the starting address in the Address box 4 Specify the number of bytes to write in the Length box To load the entire file only checkmark the File Length box without specifying the number of bytes 5 Click on the Write a File to FLASH button to initiate the writing of the data 6 Specify the source file in the pop up Windows dialog box Sequential Read To read the co
11. A Starter Development Kit User Guide Displaying Another Image from a Downloaded Bitmap File cccceesseseseseeseeseseeneneseees 4 12 Displaying Any Image Fil S 252sst0 coscs escsccastsestesdoecentonsdachcessteyenscecetaessesnssadbes cy sbevnesesecdeunsdestoeese 4 15 Chapter 5 Using the Development Board Configuring the Cyclone IL FPGA uaar 5 1 TEAG PrOpramming iaia lia EE ea EE AEA ENS AS Programming iii Configuration Procedure Configuring the FPGA in JTAG Mode ii 5 2 Configuring the EPCS4 Device in AS Mode o cscscesesssssssseseesesesessessesessessseseseassesneeessseseesessans 5 3 Chapter 6 Advanced Examples Factory Configuration sinsi a R E a EEEE iaaah File Locations assalire A ERN Demonstration Setup Music Synthesizer Demonstration i arie 6 2 File Locations c0 cccsccessssseeessovessscisesestsoassootnossusecasssasesoaieoseesosssbedsvavsoesaaseanseatoocssosidussasvedusenseceansasasout Demonstration Setup DED Card M sie Player sila asian FileJTtocations astratta Demonstration Setup iv Altera Corporation N D TE RYN About This User Guide How to Find Information How to Contact Altera Altera Corporation October 2006 This user guide describes how to start using the Altera Cyclone II FPGA Starter Development Kit including unpacking the kit installing required software connecting the development board to a PC and running sample software
12. Altera Corporation N D TE RYN Contents About This User Guide xiao sled celata V Chapter 1 Getting Started Introduction MIO Before You Begin Further Information Hardware Installation Software Installation Luana la Rai iaia Installing the Cyclone II FPGA Starter Development Kit CD ROM Installing the Quartus II Software uii Chapter 2 Development Board Setup Development Board Overview uuiii iii Requirements cca Powering Up the Development Board Confirming Board Operation i Chapter 3 Control Panel Setup IREGUILOIMEIUS 255105524 65 sananseecssavatersestsysvasccerdtstarstasehoracesscocancyasdeuyentstia cute sacaesecsieiagcysstaseasestecleateteesertentees Hardware Setup FPGA Configuration Control Panel Start aoe eraen E ENIE IA N Na AeIE asia aasi aniraa Chapter 4 Using the Control Panel Control Panel Overview i ila aria ani aaa Controlling the 7 Segment Displays Lighting the LEDs PS 2 Keyboatd c ui SDRAM SRAM Controller and Programmer Read Write Data Sequential Write sini iL Sequential Read Flash Memory Programmer iii aaa Read Write Data Sequential Write Sequential Read Configuring User Ports rie aaa Flash Music Player VGA Display susanna aaa lilla Displaying the Default Image L urca ai Altera Corporation Contents Cyclone Il FPG
13. CII_Starter_SD_Card_Audio 5 Connect a headset or speaker to the development board and listen for music played from the SD Card Figure 6 4 illustrates the setup for this demonstration Figure 6 4 The Setup for the SD Music Player Demonstration Speaker ce lt SD Card with Music File WAV Audio DAC Controller NIOSII SD Driver Altera Corporation 6 7 October 2006 Cyclone Il FPGA Starter Development Kit User Guide SD Card Music Player 6 8 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006
14. Cyclone Il FPGA Starter Development Kit A DTE RYAN 101 Innovation Drive San Jose CA 95134 408 544 7000 Document Version http www altera com Document Date P25 36048 00 User Guide 1 0 0 October 2006 Copyright 2006 Altera Corporation All rights reserved Altera The Programmable Solutions Company the stylized Altera logo specific device designations and all other words and logos that are identified as trademarks and or service marks are unless noted otherwise the trademarks and service marks of Altera Corporation in the U S and other countries All other product or service names are the property of their respective holders Altera products are protected under numerous U S and foreign patents and pending applications maskwork rights and copyrights Altera warrants performance of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any products and services at any time without notice Altera assumes no responsibility or liability arising out of the hsal application or use of any information product or service described herein except as expressly agreed to in writing by Altera _ Corporation Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services 5 4 DI Printed on recycled paper UG CDK01012 10 i EN ISO 9001 ii
15. DE2_system DE2_controlpanel DE2 USB_API sof EP2C35F672 FFFFFFFF 3 Click on Add File and select the CII_Starter_USB_API sof file in the pop up window 4 Next click on the Program Configure box to select the added file 5 Click Start to download the selected configuration file into the FPGA Control Panel To start the Control Panel perform the following steps Start 1 3 2 Run the CII Starter control panel exe program found in the lt kit path gt Examples CII_Starter_demonstrations CII_ Starter USB_API_v1 SW directory to launch the Control Panel user interface Figure 3 2 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Control Panel Setup Figure 3 2 Control Panel Window CI CII Starter Kit Control Panel Open Help About SRAM LED amp 7 SEG HEX 3 HEX 2 HEX 1 HEX 0 PS2 Keyboard o ee ee 2 Select Open to list all USB ports connected to development boards The Control Panel can control up to 4 development boards using the USB links 3 Select Open USB Port 0 This step places the Control Panel in control of the development board Il The Control Panel occupies the USB port until that port closes Quartus II can not download a configuration file into the FPGA while the Control Panel occupies the USB port Closing the Control Panel GUI closes the port 4 Experiment by setting the value of some 7 segment display and observing the result on the
16. DRAM flash memories though the connected user ports The sample applications of a flash music player and a VGA display illustrate the user port configuration In this sample application music data loads into the flash memory Options under the Tools tab of the Control Panel configure user ports Through user port Asynchronous 1 of the Flash Controller the flash memory sends the music data to the Audio DAC Controller and out to the audio output jack To implement this application perform the following steps 1 Erase the flash memory and write a music file into it refer to Sequential Write on page 4 8 Use the file music wav in the directory CII_Starter_demonstrations music on the CII Starter System CD ROM 2 In the Control Panel select the TOOLS tab Figure 4 6 4 9 Cyclone Il FPGA Starter Development Kit User Guide Flash Music Player Figure 4 6 Control Panel TOOLS Tab Window CII CII Starter Kit Control Panel Open Help About PS2 amp LED SRAM SDRAM Multiplexer Host USB Port X FLASH Multiplexer Asynchronous 1 v SRAM Multiplexer Host USB Port Configure Board Test 3 Select the Asynchronous 1 port for the FLASH Multiplexer and click on the Configure button to enable the connection from the flash memory to the Asynchronous 1 port of the Flash Controller 4 On the development board set switches SW1 to OFF DOWN position and SWO to ON UP position 5 Plug a headset or a speaker i
17. For a full description of the development board and its use refer to the Cyclone II FPGA Starter Development Kit Reference Manual The document revision history in Table 1 1 shows this document s current version To ensure that you have the most up to date information on this product refer to the readme file on the provided CD_ROM for late breaking information that is not available in this document Table 1 1 Document Revision History Date Description October 2006 Initial publication of the Cyclone Il FPGA Starter Development Kit version 1 0 0 The following methods enable you to quickly find information in this Portable Document Format PDF type document E Search the contents by using the Adobe Acrobat or Reader Edit Find command or click on the binoculars Search toolbar icon E The Bookmarks window serves as an additional table of contents Click on a topic to jump to that section in the document M Thumbnail icons in the Pages window provide miniature previews of each page and provide a link to the pages M Within the text hypertext links highlighted in green enable you to jump to related information To get help regarding this product use the following contact information M Altera Corporation 101 Innovation Drive San Jose California 95134 USA www altera com Typographic Conventions Cyclone Il FPGA Starter Development Kit User Guide For the most up to date information about Alt
18. S I LEDS LED7 1 LEDG F LEDS T LED4T LEDS T LED2T LEDI LEDO PS2 Keyboard Altera Corporation October 2006 The user can perform the following actions with the Control Panel Change the values that appear on the 7 segment displays Light up LEDs Communicate with the PS 2 keyboard Read write from to the SDRAM SRAM and flash memory Controlling the 7 Segment Displays Controlling the 7 Segment Displays 4 2 Mm Configure user ports E Load music to memory and play music via the audio digital analog converter DAC output E Load an image pattern for VGA output The following sections describe how to perform these actions with the Control Panel already open on the host computer If not already open launch the Control Panel as described in Control Panel Start on page 3 2 Typical design activities do not require the ability to set arbitrary values into simple display devices However used for troubleshooting this ability enables the user to verify that these devices operate correctly To set the value of a 7 segment module to display perform the following steps 1 Select the PS2 amp LED tab on the Control Panel Figure 4 2 Figure 4 2 Control Panel Window for 7 Segment Controls CI CII Starter Kit Control Panel Open Help About LED amp 7 SEG HEX 3 HEX 2 HEX 1 PS2 Keyboard m 2 Inthe LED amp 7 SEG area enter a value for any of the 7 segment mod
19. Software Suite by performing the following steps 1 Insert the Quartus II Web Edition Software Suite CD ROM into the CD ROM drive The CD ROM should start an auto install process If it does not browse to the CD ROM drive and double click on the setup exe file 2 Follow the online instructions to complete the installation process IS If you have difficulty installing the Quartus II software refer to Installing the Quartus II Software in the Quartus II Installation amp Licensing Manual for PCs found at www altera com The Quartus II software is the primary FPGA development tool used to create the reference designs used in this development kit Additionally you may want to install the Nios II Embedded Design Suite package also found in the Altera Design Software Suite The Nios II soft core embedded processor runs on Altera FPGAs Many of the reference designs included in this development kit use the Nios processor Altera Corporation 1 5 October 2006 Cyclone Il FPGA Starter Development Kit User Guide Software Installation 1 6 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 1E 2 Development Board Setup Devel op ment Altera delivers the development board Figure 2 1 with a preloaded Board Overview configuration to demonstrate features of the board At power up the preloaded configuration also enables users to confirm quickly that the board is operating correctly Figure
20. Starter Development Kit User Guide Music Synthesizer Demonstration File Locations M Project directory CII_Starter_Synthesizer E Bit stream used CII_Starter_Synthesizer sof or CII_Starter_Synthesizer pof Demonstration Setup To set up the demonstration perform the following steps 1 2 6 7 Connect a PS 2 keyboard to the development board Connect the VGA output of the development board to a VGA monitor both LCD and CRT type of monitors should work Connect a speaker to the Line Out port of the development board Load the bit stream into FPGA Ensure that all the switches SW 9 0 are set to 0 Down Position Press KEY1 on the development board to start the music demo Press KEYO on the development board to reset the circuit Table 6 1 illustrates the usage of the switches and push buttons KEYs Table 6 1 Switches and Push Buttons Signal Name Description KEY 0 Reset KEY 1 Repeat the Demo Music SW 0 0 BRASST 1 STRING SW 9 0 DEMO play 1 PS2 KEYBOARD play SW 1 0 Channel 1 ON 1 Channel 1 OFF SW 2 0 Channel 2ON 1 Channel 2 OFF 6 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Advanced Examples SD Card Music Player Altera Corporation October 2006 Table 6 2 illustrates the usage of the PS 2 Keyboard Table 6 2 PS 2 Keyboard Signal Name Description Q 4
21. a Development Suite Tools CD ROMs containing Altera Quartus II 6 0 Web Edition design software and the Nios II 6 0 embedded processor Bag of six rubber silicon covers for the development board stands and extender pins that facilitate easier probing of the board I O expansion headers with testing equipment 7 5 V DC wall mount power supply Clear plastic cover for the board Other items you will want to have available to work through this user guide are E VGA monitor m Audio source such as a CD player or MP3 player m Headphones Mm PS 2 keyboard Fu rthe r For other related information refer to the following websites Informati on M For additional daughter cards available for purchase 1 2 http www altera com products devkits kit daughter_boards jsp For on line demonstrations amp training http www altera com education demonstrations dem index html and https mysupport altera com etraining For Cyclone II handbook http www altera com literature lit cyc2 jsp For Cyclone II reference designs http www altera com end markets refdesigns device cyclone2 cyclone2 index jsp For eStore if wish to purchase devices http www altera com buy devices buy devices html Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Getting Started E For Cyclone II Orcad symbols http www altera com support software download pcb pcb
22. as the Music Synthesizer System on Chip SOC to generate music and tones The VGA monitor connected to the development board shows which key is pressed during the playing of the music Figure 6 1 Music Synthesizer Demonstration Setup Speaker Line Out VGA Out L CDEFGABCDEFGABCDEFGAB VGA LCDICRT Monitor ACTER eT TEILLE DOODOO iai Music Synthesizer Algorithms for Audio Processing Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Advanced Examples The block diagram Figure 6 2 shows that the Music Synthesizer comprises four major blocks Mi DEMO_SOUND stores a sample sound for the user to play E PS2_KEYBOARD processes user input from the PS 2 keyboard M STAFF displays the corresponding keyboard diagram on the VGA monitor when a key is pressed E TONE_GENERATOR represents the core of the music synthesizer SOC Use SW to switch the music source between PS2_KEYBOAD and the DEMO_SOUND block To repeat the demo sound press KEY1 The TONE_GENERATOR can produce two tones 1 String and 2 Brass selected by SW0 The audio CODEC used on the development board has two channels turned ON OFF by SW1 and SW2 Figure 6 2 Block Diagram of the Music Synthesizer Design CYCLONE Il 2C20 VGA VS DEMO1 CODE VGA CLOCK DEMO2 CODE VGARIS i VGA GIBI tail VGA B 3 da SOUND1_CODE SOUND2_CODE Lull Altera Corporation 6 3 October 2006 Cyclone Il FPGA
23. ed image in the Windows bitmap format Run CII_Starter_control_panel ImgConv exe an image conversion tool developed for the development board to open the converter window Figure 4 11 Figure 4 11 The Image Converter Window Terasic Image Converter BW Threshold 128 Band of RGB Red Processed Line Click on the Open Bitmap button and select the 640 x 480 Grayscale photo for conversion When the processing of the file completes click on the Save Raw Data button which generates a file named Raw_Data_Gray dat and stores in the same directory as the original image file If desired change the file name prefix from Raw_Data to another name by changing the File Name field in the displayed window 4 15 Cyclone Il FPGA Starter Development Kit User Guide VGA Display 4 16 6 Download the Raw_Data_Gray dat file into the SRAM as described in Displaying Another Image from a Downloaded Bitmap File on page 4 12 The ImgConv tool also generates a Raw_Data_BW dat file and its corresponding TXT format for the black and white version of the image The BW Threshold in Table 4 1 defines the threshold for judging black or white level Raw_Data_BW txt fills in the MIF Intel Hex format for M4K SRAM Table 4 1 BW Threshold Image Source R G B Band Filter oe ignoto Color Picture R G B N A Raw_Data_Gray Color Picture R G B optional BW Threshold Raw_Data_BW Raw_Data_BW tx
24. er module to select a configuration bit stream file with the sof filename extension Figure 5 1 The JTAG Configuration Scheme USB Blaster Circuit RUN PROG JTAG Config Port Aiuta Power on Confia EPCS Serial Configuration Device 5 2 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Development Board Altera Corporation October 2006 Configuring the EPCS4 Device in AS Mode Figure 5 2 illustrates the AS configuration setup To download a configuration bit stream into the EPCS4 serial EEPROM device perform the following steps 1 2 Ensure that power is applied to the Cyclone II FPGA Starter board Connect the supplied USB cable to the USB Blaster port on the board Configure the JTAG programming circuit by setting the RUN PROG switch on the left side of the board to the PROG position To program the EPCS4 device use the Quartus II Programmer module to select a configuration bit stream file with the pof filename extension After the programming operation completes set the RUN PROG switch back to the RUN position Reset the board by turning the power switch off and then on again This action causes the new configuration data in the EPCS4 device to load into the FPGA chip Refer to the Serial Configuration Devices chapter in the Altera Configuration Device Handbook for more information about the EPCS4 device 5 3 Cyclone Il FPGA Starter Devel
25. era products go to the Altera world wide web site at www altera com For technical support on this product go to www altera com mysupport For additional information about Altera products consult the sources shown below Information Type Technical support USA amp Canada www altera com mysupport All Other Locations www altera com mysupport 800 800 EPLD 3753 7 00 a m to 5 00 p m Pacific Time 1 408 544 8767 7 00 a m to 5 00 p m GMT 8 00 Pacific Time Product literature www altera com www altera com Altera literature services literature altera com literature altera com Non technical customer service 800 767 3753 1 408 544 7000 7 00 a m to 5 00 p m GMT 8 00 Pacific Time FTP site ftp altera com ftp altera com Typographic Conventions This document uses the typographic conventions shown below Visual Cue Bold Type with Initial Capital Letters Meaning Command names dialog box titles checkbox options and dialog box options are shown in bold initial capital letters Example Save As dialog box bold type External timing parameters directory names project names disk drive names filenames filename extensions and software utility names are shown in bold type Examples fmax qdesigns directory d drive chiptrip gdf file Italic Type with Initial Capital Letters Document titles are shown in italic
26. he Address box 3 Specify the number of bytes to write in the Length box To load the entire file only checkmark the File Length box without specifying the number of bytes 4 5 Cyclone Il FPGA Starter Development Kit User Guide Flash Memory Programmer Flash Memory Programmer 4 6 4 Click on the Write a File to SDRAM button to initiate the writing of the data 5 Specify the source file in the pop up Windows dialog box LS The Control Panel also supports loading files with a hex extension Files with a hex extension are ASCII text files that specify memory values using ASCII characters to represent hexadecimal values For example a file containing the line 0123456789ABCDEF defines four 16 bit values 0123 4567 89AB CDEF These values load into the memory consecutively Sequential Read To read the contents of the SDRAM and write them to a file use the Sequential Read function of the Control Panel to perform the following steps 1 Select the SDRAM tab on the Control Panel and use the Sequential Read boxes 2 Specify the starting address in the Address box 3 Specify the number of bytes to copy into the file in the Length box To copy the entire contents of the SDRAM 8 MBytes of data into a file only checkmark the Entire SDRAM box without specifying the number of bytes 4 Click on the Load SDRAM Content to a File button 5 Specify the destination file in the pop up Windows dialog box Using t
27. he Control Panel the user can perform the following read write operations from to the flash memory on the development board Erase the entire flash memory Write one byte to the memory Read one byte from the memory Write a binary file to the memory Load the contents of the flash memory into a file TS When performing these operations consider the following characteristics and limitations of the flash memory Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel Mm 4Mbits x 8 bits organization M Erasure of the entire flash memory is required before writing into it M Flash memory tolerates only a limited number of erasures A Do not exit from the Control Panel while erasing the entire contents of the flash memory this takes about 40 seconds The feature of reading writing a byte or an entire file from to the flash memory enables the user to develop multimedia applications for example Flash Audio Player Flash Picture Viewer without worrying about how to build a Flash Memory Programmer Read Write Data To perform a read write operation with a byte of data from to the flash memory take the following steps 1 Select the FLASH tab in the Control Panel Figure 4 5 and use the Random Access boxes Figure 4 5 Control Panel Flash Tab Window CI CII Starter Kit Control Panel Open Help About SRAM PS2 amp LED FLASH Random Access Address fo WDATA og DAT
28. ntents of the flash memory and write them to a file use the Sequential Read function of the Control Panel to perform the following steps 1 2 4 8 Select the FLASH tab on the Control Panel and use the Sequential Read boxes Specify the starting address in the Address box Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel Configuring User Ports Flash Music Player Altera Corporation October 2006 3 Specify the number of bytes of data to read from the flash memory in the Length box To copy the entire contents of the flash memory into a file only checkmark the Entire Flash box without specifying the number of bytes 4 Click on the Load FLASH Content to a File button 5 Specify the destination file in the pop up Windows dialog box The SDRAM SRAM and flash memory controllers each have four ports a host port to connect to the command controller and three user selectable asynchronous ports These three user ports can connect the memory to other devices For example by connecting the flash controller to the VGA DAC controller the user can send an image stored in flash memory to the VGA output Users can connect circuits of their own design to one of the user ports of the SRAM SDRAM flash controllers After downloading binary data into the SRAM SDRAM flash memories they can configure the memory controllers to enable their circuits to read write the S
29. nto the audio output jack and listen to music produced through the Audio DAC circuit This procedure connects the Asynchronous 1 Port to the Audio DAC so that the Audio DAC Controller communicate with the flash memory directly In this example the AUDIO_DAC Verilog module defines a circuit that reads the contents of the flash memory and sends it to the external audio port 4 10 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel VGA Display Altera Corporation October 2006 For this sample application three examples illustrate how the development board produces images on a connected VGA monitor Example 1 provides a default image previously loaded into an M4K memory block in the FPGA in the MIF Hex Intel format during the default bit stream configuration stage described in Configuring the Cyclone II FPGA section of the Using the Development Board chapter Example 2 describes how to download another image from a bitmap file into the SRAM The file can also load into an M4K memory block in the FPGA Example 3 describes how to use other images to generate binary data patterns that the development board can display on the VGA monitor Displaying the Default Image Perform the following steps to display a default image 1 Select the VGA tab in the Control Panel to display the window in Figure 4 7 4 11 Cyclone Il FPGA Starter Development Kit User Guide
30. opment Kit User Guide Configuring the Cyclone Il FPGA Figure 5 2 The AS Configuration Scheme USB Blaster Circuit RUN PROG JTAG Config Port Auto Power on Confia EPCS Serial Configuration Device 5 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 N D TE YA 6 Advanced Examples Factory Configuration Altera Corporation October 2006 This chapter provides a number of examples of advanced circuits implemented on the development board These circuits provide demonstrations of the major features on the board such as its audio and video capabilities For each demonstration the kit includes the Cyclone II FPGA or EPCS4 serial EEPROM configuration file as well as the full source code in Verilog HDL code All of the associated files reside in the lt kit path gt Examples directory after installation The section describing each demonstration provides the location for the example files The development board is shipped from the factory with a default configuration that demonstrates some of the basic features of the board File Locations M Project directory CII_Starter_Default M Bitstream used CII_Starter_Default sof or CII_Starter_Default pof Demonstration Setup To set up the demonstration perform the following steps 1 Power up the development board with the USB cable connected to the USB Blaster port If necessary that is if the default factory configu
31. ration of the development board is not currently stored in EPCS4 device download the bit stream to the board by using either JTAG or AS programming 2 Observe that the 7 segment displays display a sequence of characters and that the red and green LEDs flash 3 Optionally connect a VGA display to the VGA D SUB connector When connected the VGA display should show a pattern of colors 4 Optionally connect a powered speaker to the stereo audio out jack Music Synthesizer Demonstration 5 Place toggle switch SW9 in the UP position to hear a 1 kHz humming sound from the audio out port Alternatively if switch SW9 is DOWN connect the Mic In port to a microphone to hear voice sounds or use the line in port to play audio from an appropriate sound source The CII_Starter_Default folder contains the Verilog source code for this demonstration It also includes the necessary files for the corresponding Quartus II project The top level CII_Starter_Default v Verilog file can serve as a template for other projects because it defines ports that correspond to all of the user accessible pins on the Cyclone II FPGA Music This demonstration shows how to implement a multi tone electronic keyboard using the development board with a PS 2 keyboard and a Synthesizer speaker Figure 6 1 shows the setup of the demonstration Demonstration Use the PS 2 keyboard as the piano keyboard for input The Cyclone II FPGA on the development board serves
32. re used in a list of items when the sequence of the items is not important Vv The checkmark indicates a procedure that consists of one step only esa The hand points to information that requires special attention The caution indicates required information that needs special consideration and Aa understanding and should be read prior to starting or continuing with the procedure or process n The warning indicates information that should be read prior to starting or continuing the procedure or processes The angled arrow indicates you should press the Enter key Ai The feet direct you to more information on a particular topic Altera Corporation October 2006 vii Typographic Conventions Cyclone Il FPGA Starter Development Kit User Guide viii Altera Corporation October 2006 N E RYAN 1 Getting Started Introduction Before You Begin Altera Corporation October 2006 Welcome to the Altera Cyclone II FPGA Starter Development Kit which includes a full featured field programmable gate array FPGA development board hardware and software development tools documentation and accessories needed to begin FPGA development The development board includes an Altera Cyclone II 2C20 FPGA and comes preconfigured with a hardware reference design stored in flash memory Hardware designers can use the development board as a platform to prototype complex embedded systems The Development Kit provides the user with an
33. structions to complete the installation process The installation program copies the Cyclone II FPGA Starter Development Kit files to the hard disk and creates a Programs gt Altera gt Cyclone II FPGA Starter Development Kit v1 0 0 icon accessible from the Windows Start menu Use this icon to launch the Windows style development kit GUI The Cyclone II FPGA Starter Development Kit installation program creates a directory structure for the installed files Figure 1 2 where lt path gt is the selected Cyclone II Starter Development Kit installation directory Figure 1 2 Cyclone Il Starter Kit Installed Directory Structure lt Dath gt The default Windows instalation directory Is C Ameraixits CIl_Starter_Kit v1 0 0 LTT SoardbesignFiles LT does L Examples 1 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Getting Started Table 1 1 lists the file directory names and a description of their contents Table 1 1 Installed Directory Contents Directory Name Description of Contents BoardDesignFiles Contains the board design files Use these files as a starting point for a new prototype board design Docs Contains the development kit documentation Examples Contains the sample design files for the Cyclone Il FPGA Starter Development Kit Installing the Quartus II Software Install the Quartus II Web Edition Software Suite found in the Altera Design
34. t Grayscale Picture N A N A Raw_Data_Gray Grayscale Picture N A BW Threshold Raw_Data_BW Raw_Data_BW txt Cyclone Il FPGA Starter Development Kit User Guide Altera Corporation October 2006 5 Using the Development JANOS RYA Board Configuring the Cyclone Il FPGA Altera Corporation October 2006 This chapter provides instructions for using the development board and describes each of its I O devices The Cyclone II FPGA Starter Development Board has integrated the programming circuitry normally found in a USB Blaster programming cable as well as a serial EEPROM chip EPCS4 that stores configuration data for the Cyclone II FPGA This configuration data loads automatically from the EEPROM chip into the FPGA each time power is applied to the board Using the Quartus II software it is possible to reprogram the FPGA at any time and it is also possible to change the non volatile data stored in the serial EEPROM chip The following sections describe the two ways to program the FPGA JTAG programming and Active Serial AS programming JTAG Programming In this method of programming named after the IEEE standards Joint Test Action Group the configuration bit stream downloads directly into the Cyclone II FPGA through the USB Blaster circuitry The FPGA retains this configuration as long as power is applied to the board the FPGA loses the configuration when the power is turned off US For detailed informa
35. tall the Altera Quartus software on the host computer if not already installed Ensure that the development board has powered up and is operating normally as described in Development Board Setup on page 2 1 If the board is not powered up but has already been set up and its operation verified perform the following steps 1 Check that the USB Blaster cable connects the host computer to the the development board 2 Check that the 7 5 V DC adapter connects the development board to a power source 3 Set the RUN PROG switch to the RUN position 4 Turn the power on by depressing the ON OFF switch on the development board Before using the Control Panel configure a corresponding circuit in the Cyclone II FPGA by downloading the CII_Starter_USB_API sof configuration file from the Control Panel Start lt kit path gt Examples CII_Starter_demonstrations CII_Starter_USB_API_v1 HW directory Refer to Section 4 1 Configuring the Cyclone II FPGA for a detailed description of the downloading procedure Perform the following steps to configure the FPGA 1 2 Start the Quartus II software Select Tools gt Programmer to reach the window in Figure 3 1 Figure 3 1 Quartus Il Programmer Window Chain1 cdf a Hardware Setup USB Blaster USB 0 pb Start oe Auto Detect X Delete Bb Add File BS Change File Add Device eles Mode JTAG J Progress pre io ie DERE D
36. tion about the USB Blaster circuitry refer to the Cyclone II FPGA Starter Board schematic found in the BoardDesignFiles Schematic directory in the kit installation directory AS Programming In the Active Serial programming method the configuration bit stream downloads into the Altera EPCS4 serial EEPROM chip The EEPROM provides non volatile storage of the bit stream retaining the information even when power to the Cyclone II FPGA Starter board is turned off When the board powers up the configuration data in the EPCS4 device automatically loads into the Cyclone II FPGA Configuring the Cyclone Il FPGA Configuration Procedure For both the JTAG and AS programming methods the Cyclone II FPGA Starter board connects to a host computer via a USB cable Because of this connection type the host computer identifies the board as an Altera USB Blaster device The following sections describe the JTAG and AS programming steps Configuring the FPGA in JTAG Mode Figure 5 1 illustrates the JTAG configuration setup To download a configuration bit stream into the Cyclone II FPGA perform the following steps 1 Ensure that power is applied to the Cyclone II FPGA Starter board 2 Connect the supplied USB cable to the USB Blaster port on the board 3 Configure the JTAG programming circuit on the board by setting the RUN PROG switch on the left side of the board to the RUN position 4 To program the FPGA use the Quartus II Programm
37. tivate the multi port setup in the FPGA Figure 4 9 Altera Corporation 4 13 October 2006 Cyclone Il FPGA Starter Development Kit User Guide VGA Display Figure 4 9 Multiport Controller Configured to Display an Image from the SRAM FPGA Host Port User Port 1 Async 1 SDRAM User Port 2 Async 2 Controller User Port 3 Async 3 Host Port USB User Port 1 Async 1 Blaster Flash User Port 2 Async 2 User Port 3 Async 3 DE2 le Host Port Control Panel User Port 3 Async 3 SRAM SRAM Controller VGA DAC LCD CR Controller Monitor User Port 2 Async 2 User Port 1 Async 1 USB Command Controller 4 Select the VGA tab and deselect the checkbox Default Image 5 Observe that the VGA monitor displays the picture dat image from the SRAM Figure 4 10 Turn off the cursor by deselecting the Cursor Enable checkbox Figure 4 10 A Displayed Image 4 14 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel Altera Corporation October 2006 Displaying Any Image Files Before loading any image file into SRAM memory or into an M4K memory block in the FPGA first generate a bitmap file Perform the following steps 1 Load the desired image into an image processing tool such as Corel PhotoPaint Resample the original image to have a 640 x 480 resolution Save the modifi
38. toggle switch SW9 to the DOWN position and confirm that the computer produces a 1 kHz tone Altera Corporation 2 3 October 2006 Cyclone Il FPGA Starter Development Kit User Guide Confirming Board Operation 6 Set the toggle switch SW9 to the UP position and connect the output of an audio player for example MP3 PC iPod to the Line In connector on the development board Confirm that the headset produces the expected music or recorded sounds playing on the audio player Il Ifyou also connect a microphone to the Mic In connector the development board mixes the voice input with the output from the audio player 2 4 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 3 Control Panel Setup JAN DTS RA Requirements Hardware Setup FPGA Configuration Altera Corporation October 2006 The development kit includes a Control Panel facility that enables a user to access various components on the development board from a host computer through a USB connection For an overview of the Control Panel and its use refer to Using the Control Panel chapter Setting up the Control Panel involves the following actions M Set up the hardware Mm Configure the FPGA M Start the Control Panel Preparation for setting up and using the Control Panel requires the following prerequisite actions M Install the Altera USB Blaster driver software on the host computer if not already installed M Ins
39. type with initial capital letters Example AN 75 High Speed Board Design Italic type Internal timing parameters and variables are shown in italic type Examples tpa n 1 Variable names are enclosed in angle brackets lt gt and shown in italic type Example lt file name gt lt project name gt pof file Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters Examples Delete key the Options menu Subheading Title References to sections within a document and titles of on line help topics are shown in quotation marks Example Typographic Conventions vi Altera Corporation October 2006 About This User Guide Typographic Conventions Visual Cue Courier type Meaning Signal and port names are shown in lowercase Courier type Examples data1 tdi input Active low signals are denoted by suffix n e g resetn Anything that must be typed exactly as it appears is shown in Courier type For example c qdesigns tutorial chiptrip gdf Also sections of an actual file such as a Report File references to parts of files e g the AHDL keyword SUBDESIGN as well as logic function names e g TRI are shown in Courier 1 2 3 and Numbered steps are used in a list of items when the sequence of the items is a b c etc important such as the steps listed in a procedure Mee Bullets a
40. ules labeled HEX0 through HEX3 Altera Corporation Cyclone Il FPGA Starter Development Kit User Guide October 2006 Using the Control Panel 3 Click on the Set button Lig hti ng the To light an LED perform the following steps LEDs 1 Select the PS2 amp LED tab on the Control Panel Figure 4 3 2 Inthe LED amp 7 SEG area select the individual LEDs to turn on 3 Click on the Set button Figure 4 3 Control Panel Window for LED Controls CI CII Starter Kit Control Panel DER Open Help About LED amp SEG HEX 3 HEX 2 HEX 1 HEX 0 PS 2 Keyboard The PS 2 keyboard in the Control Panel window Figure 4 3 shows a working connection between the FPGA and the PS 2 port as well as the software processing the PS 2 interface commands and data To test the functionality of the PS 2 keyboard interface perform the following steps 1 Plug a PS 2 keyboard into the PS 2 port on the development board Altera Corporation 4 3 October 2006 Cyclone Il FPGA Starter Development Kit User Guide SDRAM SRAM Controller and Programmer 2 Click in the blank area under PS 2 Keyboard in the CII Starter Kit Control Panel 3 Start typing on the PS 2 keyboard The keystrokes should echo from the keyboard to the output on the control panel SD RAM IS RAM The user can perform the following types of memory read write operations with the Control Panel Controller and Pro grammer M Read write data from to
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