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STD 7000 7303 Keyboard/Display Card USER'S MANUAL
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1. 4 41 Characteristics of 7303 Subroutine LONG DELAY 4 41 Register and Memory Allocation for 7303 Subroutine DEBOUNCE DELAY 4 42 Characteristics of 7303 Subroutine DEBOUNCE DELAY 4 4 4 24 4 4 42 Flowchart DISPLAY DEMO Demonstration Test Program for the 7303 4 43 Flowchart DISPLAY SELF Demonstration Test Program for the 7303 _ 4 44 Flowchart CALCULATOR Demonstration Test Program for the 7303 4 45 Flowchart DISPLAY TEST Demonstration Test Program for the 7303 4 46 Flowchart KEY TEST Demonstration Test Program for the 7303 4 47 Schematic for 7303 reference only 5 2 Assembly for 7303 reference only REUNIR CE 5 3 STD BUS Edge Connector Signals for the 7303 2222222 2 2 2 2 5 4 interna 7 cuna os eco Sedat nomen 5 4 Special Pants 780815 Cr s u 5 5 Cable Connection when Operating the 7303 as 1 A 2 Cutout Details of 7303 Panel Mounting
2. 3 6 3 11 Left Right Display Position Group Select for Cursor Mode 7303 Card 3 6 3 12 Flow Diagram of Cursor Mode Events for the 7303 3 7 3 13 Cursor Mode Timing Waveforms for the 7303 U 3 7 3 14 Keyboard Programming Model for the 7303 222222 1 3 8 3 15 Programming Key Bounce and Noise Rejection for the 7309 2 3 9 3 16 Recommended System Level Keyboard Procedure for the 7303 _ 3 10 3 17 Binary LED Display for the 7303 3 11 3 18 Rocker Switches for the 7303 3 11 3 19 Rocker Switch Status for the 7303 3 11 4 1 Index of Demonstration and Test Programs for the 7303 4 2 4 2 Index of Keyboard and Display Subroutines for the 7303 4 3 4 3 16K Memory Map 7303 Software Package in 7801 7803 Processor Card Onboard Memory Sockets 4 4 4 4 4 256 Byte Memory Map 7303 Alphanumeric Display Subroutines 4 5 4 5 256 Byte Memory Map 7303 Keyboard Subroutines and Demonstration Programs 4 6 4 6 256 Byte Memory Map 7303 RAM MAILBOX Allocation 2 2 4 7 4 7 4 8 4
3. FO A o gt N SCAN E7 o gt KEY TEST 73 74 A m a 4 2 Koma 77 B8 o o PAGE ADDRESS 21 LABEL LABEL LABEL LINE co LINE LINE LABEL 00 TEXT START ADDR CHARACTER 7 MESSAGE C5 BUFFER CHARACTER 0 55 D7 wo N 57 D O O a w m gt ajojn o gt T alainintala ala gt gt Es d EXPE Wi 22 gt o m O 74 80 83 86 E 88 eo fae 95 91 92 93 94 Por 38 99 BELT 38 ser pe EAM az 6 A8 AE AD TAE 84 B5 mama BC 7 oe 04 08 7067 INC ese 08 0D or 15 ELE 18 2 38 a CERES 2 pt a 2 28 28 D 32 39 34 3 36 39
4. RR RR RE 4 47 Coding FOHTIS caer ot ete S ence C act ees tad cat 4 49 Section 5 Maintenance 5 1 RR ERE 5 1 Signal Gl6SSdE Vi a a 5 4 Keyboard Label 5 5 Keyboard Disassembly a 5 5 Special 8 mati 5 5 Return for Repair Procedures U uu uuu 5 5 Appendix A Front Panel Mounting of 7303 Card PLAN 131 hire iE A 1 2 Remote 7303 Drive Via Lines ese erecto A 2 l 0 oer ete E 3 iv Figures Figure Page 1 1 7303 Keyboard Display 2 us uu 1 1 1 2 Block Diagram of the 7303 Keyboard Display Card 1 2 2 1 Mapped Operation Local Card Rack 242 11 2 1 2 2 Decoder Jumper Pad Numbering for the 7303 2 2 2 3 7303 Address Decoder and Schematic for 2 Addresses Per 2 3 2 4 Jumpers Required for 7303 Port Address Mapping 2 4 2 5 Elect
5. X6 YO 20 21 C2 X6 YO Z2 Z3 C3 C4 X6 Y1 20 21 X6 Y1 Z2 Z3 X6 Y2 Z0 Z1 X6 Y2 Z2 Z3 X6 20 21 X6 Z2 Z3 X6 Y4 Z2 Z3 X6 Y5 Z0 Z1 X6 Y5 Z2 Z3 X6 Y6 20 Z1 X6 Y6 Z2 Z3 X6 Y7 Z0 Z1 X6 Y7 Z2 Z3 X7 YO 20 Z1 X7 YO Z2 Z3 Y1 20 Z1 X7 Y1 Z2 23 X7 Y2 ZO Z1 X7 Y2 22 23 m C4 C5 C7 _ C8 C9 CB _ CC CE D CF DO BI 9 93 04 9 D6 Dr Ds 99 DA DC DD _ DE E EO E 2 1 E E6 E Es E9 4 EA EB EC X7 20 Z1 ED _ X7 22 Z3 X7 YA ZO Z1 X7 Y4 Z2 Z3 Y5 20 Z1 X7 Y5 Z2 23 Shading denotes as shipped configuration Figure 2 4 Jumpers Required for 7303 Port Address Mapping The jumpers installed at the time of manufacture may removed and installed at different locations imple menting different port addresses The preferred method of removing jumpers that have been soldered to the board is to first cut the jumper in half then unsolder each half individually and discard Remaining solder should then be removed from the holes and new jumpers installed atthe appropriate locations NOTE On some early 7303 cards circuit traces were used instead of w
6. Data setup ASCII data Write pulse Invalid data Figure 2 8 Switching Characteristics over Recommended Operating Limits 7303 Card 2 6 ASCII CHARACTER VALID DATA 151 tH DISPLAY POSITION ADDRESS ADDRESS VALID tH WRITE ACTIVE WRITE dw Figure 2 9 7303 Alphanumeric Display Timing Waveforms Note Waveforms illustrate program values WRITE is low level active in hardware Mechanical Specifications The 7303 s storage and nonoperating temperature range is limited to 0 to 55 The 7303 meets all general mechanical specifications of the STD BUS except for component height which is 0 95 in 2 14 cm maximum If you use the 7303 as interface install itin one of two ways that allow you access to the component side of the card utilizing a single slot in the card rack Figure 2 10 Mechanical Characteristics over Recommended Operating Limits 7303 Card 2 8 SECTION 3 Operation and Programming The 7303 as a general purpose control panel card operates as part of the STD BUS card rack system You can use the 7303 for system control data entry status display and operator prompting in low cost interface applications The 7303 can also be used for system development testing and training The 7303 s operator interface consists of an 8 position alphanumeric display 24 program definable keys plus a fixed function reset key that resets the systems s proc
7. PRRE NER 3 8 DIS play nimun iem Ld e m 3 11 RN cR 3 11 Section 4 Operating Software 4 1 NUE OCC 5 1 NENNEN 4 1 Memory AddFeSSe5 4 1 I O Port Addles5eS ec DRE 4 1 Software Package Contents hea tt ans ee cece icc oes cee arrears UII 4 2 Memory t deci 4 4 ASCII Display Driver Module 4 9 S brouting 4 10 S bro tine MEM DISP uma u dedit reete deett ea bett 4 11 Subroutine STROBE et 4 12 Cursor Control M odU lE ionic Chan eod tee 4 13 Subrottinie CURSORS ene teet cd tc 4 14 Subroutine CER CURSORS ene tie Uu usah 4 15 Display Service Routines Module 2 22 4 17 oubroutine GOEEAR DISPLAY cem a ott Eee ee ae eru ea RUE DE Eres 4 18 Subroutine GELEAR BOTH uet d Leere een tU ait ins 4 19 Subroutine DISPLAY MEC ARE DAD E LEE 4 20 Subroutine LAMP TEST ec ve TIT 4 21 Contents continued Hexadecimal ASCIl Conversion Module 4 23 Subroutine XHEX ASGQIDO S niti
8. 3C 3D 3E F NOTE Only RAM locations 2100 2109 are used by the 7303 however other Pro Log software packages may use other portions of the processor card s onboard RAM memory The designer should consult the users manuals forthe other cards being used to find the total amount of RAM needed for subroutine support Figure 4 6 256 Byte Memory Map 7303 RAM MAILBOX Allocation 4 7 4 8 ASCII Display Driver Module This program module displays single ASCII characters at addressable positions the 73035 alphanumeric display The module s subroutines handle all of the hardware requirements of the display data communi cation with the subroutines is through mailbox locations in registers and memory SeeFig 4 7 forflowchart This module consists of hardware level subroutines that are used by other portions of the software package to create more complex display operations The designer can use these subroutines to adapt the ASCII display to any desired format The subroutines are based on the 7303 programming requirements as shown in Section 3 of this manual Displays ASCII characters shown in Fig 3 3 Addressable display positions Does all hardware manipulation Not for cursor control see cursor control module See DISPLAY DEMO program for application example Contents DISPLAY Displays any one ASCII character in any one position MEM DISP Displays one ASCII characte
9. 4 44 Starting Address 111B This is an endless loop demonstration program not a subroutine Figure 4 57 Flowchart DISPLAY SELF Demonstration Test Program for the 7303 Denotes subroutine label Low level active DISPLAY SELF CLEAR THE DISPLAY SET POINTER TO START AT MEM DISP SUBROUTINE DISPLAY CURRENT MEMORY ADDRESS INCREMENT MEMORY ADDRESS POINTER Entry return path identifier encircled Demonstration Test Program CALCULATOR Starting Address 11 This program reads keystrokes and shifts them across the display right to left in the manner of a calculator The program demonstrates the modular technique of changing display format by manipulating memory rather than rewriting the display routine each time for each new format The same display subroutine MESSAGE displays the same portion of RAM memory each time but the memory data is changed each time prior to display See Fig 4 58 for flowchart This is an endless loop demonstration program not a subroutine NOTE E R Figure 4 58 Flowchart CALCULATOR Demonstration Test Program for the 7303 Denotes subroutine label Low level active CALCULATOR SET TO CLEAR DISPLAY BY LOADING KEY INPUT BUFFER IN RAM WITH SPACE CHARS DISPLAY CONTENT OF KEY INPUT BUFFER CONVERT KEY S VALUE TO 5 Fig 4 29 SHIFT NEW KEY INTO KEYI
10. A 3 Profile Mounting of 7303 in User s 1 8 in Panel 4 vii 1 Purpose and Features The 7303 is a general purpose control panel card with data input and display capability Fig 1 1 It includes an 8 position alphanumeric display keyboard with 24 program definable keys plus system reset an 8 bit binary LED display and two rocker switches See Fig 1 2 for the block diagram You can use the 7303 in applications where you low cost interface for system control data entry status display and operator prompting Also the card is useful for system development testing and training applications The 7303 can be mounted in the first position in a card cage with an open end panel on acard extender such as the 7901 or on a 1 8 in thick panel Main Features of the 7303 are e 8 position alphanumeric display with ASCII input e 24 programmable keys plus reset e Repairable keyboard and replaceable key labels e 8 bit binary LED display e 2 rocker switches e Simple program control of displays and keys e On card ports for processor control e Single 5V Operation Figure 1 1 7303 Keyboard Display Card 1 1 SW2 SW1 Pu 12 SWITCHES Ex DATA BUS BUFFERS 006060000 EIGHT CHARACTER ALPHANUMERIC DISPLAY CONTROL PORT LATCHES CONTROL IOEXP CARD amp POR
11. will write to the output data port altering the all on state of the binary LED display Consequently the designer should follow LAMP TEST with a time delay or other method that gives the operator an opportunity toexamine the LED display before executing other portions of the software package PARAMETER ENTRY RETURN COMMENT 8 fm NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 26 Register and Memory Allocation for 7303 Subroutine LAMP TEST SUBROUTINE RETURN SYMBOL PARAMETER 1 5 313 5 time 280 ee Figure 4 27 Characteristics of 7303 Subroutine LAMP TEST Execution Total program 3 memory Denotes subroutine label Low level active E R Entry return path identifier encircled 4 21 4 22 Hexadecimal ASCII Conversion Module This program module converts binary data in registers and in blocks of memory into ASCII encoded data suitable for display by the 7303 and for transmission via RS 232 TTY and other media See Fig 4 28 forflow chart Accepts one 4 bit hexadecimal digit 0000 through 1111 binary or 0 hexadecimal from a register and outputs one 8 bit ASCII character 0 9 or
12. Execution 8085 EON time Z80 NOTE 8085 time states are variable 38 if digit is HEX B D C E F 41 if digit is BCD 0 9 Figure 4 30 Characteristics of 7303 Subroutine HEX ASCII Denotes subroutine label Low level active E R Entry return path identifier encircled 4 24 MEM ASCII E11 Starting Address 10AB This subroutine converts a block of memory locations each containing 8 bit binary data expressed as two 4 bit hexadecimal digits into a block of data with one ASCII character in each location NOTE Since each 4 bit half of the binary input data is converted into one 8 bit ASCII character the resulting block of output data written to RAM by this subroutine is twice as large as the block of input binary data Preset register pair H L with the first lowest address in the block of input binary data in memory which may be in ROM or RAM space Preset register pair D E with the first lowest address in the block of output ASCII character data in memory which can be in RAM only Preset register with the number of bytes in the block of input binary data Use 01 for byte 02 for two bytes etc FF for 255 bytes and 00 for 256 bytes Upon exit register B is cleared register pair H L points at the next location past the input data block register pair D E points at the next location past the output data block PARAMETER ENTRY RETURN R7
13. 00 PRO LOG CORPORATION STD 7000 7303 Keyboard Display Card USER S MANUAL NOTICE The information in this document is provided for reference only Pro Log does notassume any liability out of the application or use of the information or products described herein This document may contain or reference information and products protected by copyrights or patents and does not convey any license under the patent rights of Pro Log nor the rights of others Printed in U S A Copyright 1981 by Pro Log Corporation Monterey CA 93940 rights reserved However any part of this document may be reproduced with Pro Log Corporation cited as the source 7303 KEYBOARD DISPLAY CARD USER S MANUAL 4 81 FOREWORD This manual explains how to use Pro Log s 7303 Keyboard Display Card It is structured to reflect the answers to basic questions you the user might ask yourself about the 7303 We welcome your suggestions on how we can improve our instructions The 7308 is part of Pro Log s Series 7000 STD BUS hardware Our products are modular and designed and built with second sourced parts that are industry standards They provide an industrial manager with the means of utilizing his own people to control the design production and maintenance of the company s products that use STD BUS hardware Pro Log supports its products with thorough and complete documentation Also we teach courses on how to design
14. 1 i Subroutine BILLBOARD E15 Starting Address 1039 This subroutine shifts a long message of eight or more ASCII characters across the 8 position display leaving each character combination in the display for about 300 ms before shifting The text can begin anywhere in memory and be of any desired length The entire message is displayed once then the routine exits with the last eight characters in the message remaining in the display This gives the program an opportunity to alter the message before the next iteration if the text is loaded in RAM Execute the BILLBOARD subroutine repeatedly to create an endlessly rotating billboard effect The message consists of any number of ASCII characters limited by the size of the user s contiguous memory terminated by hexadecimal FF The subroutine will exit after the FF code is encountered Preset two sequential memory locations labeled TEXT START See RAM map Fig 4 6 with the first lowest memory address of the ASCII message Do this only once the subroutine can then be used repeatedly without additional presets Upon exit the text start address in RAM is unaltered NOTE When constructing the message we recommend that the SPACE character hexadecimal AO be loaded as the first seven and last eight characters in the text This produces the smooth transition from the end of the message to the beginning which is characteristic of billboards P
15. Note Standard data port address is HEX DO Figure 3 4 Data Port Bit Assignments for Character Mode 7303 Card Control Port Output Port D1 selects the alphanumeric display position address bits 2 1 0 and enables the display s WRITE function as shown in Fig 3 5 DATA BUS DESCRIPTION Don t care 1 Write 0 Write inhibit Display position address 0 7 See Fig 3 6 Note Standard control port address is HEX D1 Figure 3 5 Control Port Bit Assignments for Character Mode 7303 Card Figure 3 6 shows the bit patterns required in the contro port s bits 2 1 0 to address the eight alphanumeric display positions 0 7 Figure 3 6 Display Position Addressing 7303 Card O Programming in the Character Display Mode Causing one of the ASCII characters to appear in one of the 7303 display positions requires four steps in the program These four steps can be summarized as follows 1 Output the hexadecimal value of the ASCII character to be displayed Fig 3 3 to the 7303 s data port Fig 3 4 2 Output the 3 bit address of the display position the character is to occupy 7 0 with the write bit O to the control port Fig 3 5 3 Repeat step 2 but set the write bit 1 4 Repeat step 2 write bit returns to zero protecting the display These steps are summarized as a flow diagram and resulting waveforms in Figs 3 7 and 3 8 below DISPLAY ASCII WRITE CHAR TET STEP 1 ACTER
16. au m tL UE s SS 4 24 S bro tine MEM A S C 4 25 SUD OUTING uuu anu met ete eio cip dei ie ah cnet at a uM d 4 27 Subroutine 01 2 1 4 28 Formatted Messages Module usc a d u u u u 4 29 Subroutine MESSAGE pi ME 4 30 Subroutine BILLBOARD 4 31 Key and Switch Data Entry Module 22 4 42 SUD OUTING READ KEY Jin on an ete accro cbe pue 4 34 Subroutine DECODE a s 4 35 Subroutine SCAN E 4 36 Subroutine ROCKER STATUS 4 37 Auxiliary Timing 4 39 Subroutine DISPEAY DELAY ticos treat Rt cele ansa as tuv c d ur 4 40 Subroutine LONG DELAY 4 41 Subroutine 4 42 Demonstration Test Programs DISPEAY DEMO DAC unu urn RANE qe c ORCC C Out MR 4 43 DISPEAY SEDE nama nU ME LL cba Lost UAE 4 44 rcc 4 45 DISPLAY EEST e RITE DD MC E 4 46
17. COMMENT ELEMENT ADDRESS NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless 4 First byte in ASCII output memory block is ASCII conversion of bits 4 7 of first byte in binary block second byte in ASCII output memory block is bits 0 3 of first byte in binary block etc Figure 4 31 Register and Memory Allocation for 7303 Subroutine MEM ASCII Denotes subroutine label Low level active E R Entry return path identifier encircled 4 25 MEM ASCII EIE SYMBOL UNITS COMMENT Subroutine HEX ASCII o T used E10 Fig 4 29 i 39 e _ __ Execution 8085 time me 1 8085 time states are variable firstbinary memory location converted 229 if both digits are HEX A B C D E F 226 if one digit is BCD 0 9 223 if both digits are BCD Each additional location subtract 7 time states from above totals 2 Z80 time states First binary memory location converted 230 time states Each additional binary location 220 time states Figure 4 32 Characteristics of 7303 Subroutine MEM ASCII 4 26 Subroutine DISP HEX E12 Starting Address 10C7 This subroutine uses lower level subroutines to display one hexadecimal digit 0 9 or A F
18. Characteristics of 7303 Subroutine CLEAR DISPLAY Register and Memory Allocation for 7303 Subroutine CLEAR BOTH Characteristics of 7303 Subroutine Register and Memory Allocation for 7303 Subroutine DISPLAY 8 Characteristics of 7303 Subroutine DISPLAY 8 Register and Memory Allocation for 7303 Subroutine LAMP TEST Characteristics of 7303 Subroutine 51 Flowchart Hexadecimal ASCII Conversion Module for the 7303 Register and Memory Allocation for 7303 Subroutine HEX ASCII Characteristics of 7303 Subroutine Register and Memory Allocation for 7303 Subroutine MEM ASCII Characteristics of 7303 Subroutine Register and Memory Allocation for 7303 Subroutine DISP HEX Characteristics of 7303 Subroutine Register and Memory Allocation for 7303 Subroutine DISP 2 IN C Characteristics of 7303 Subroutine 1 2 1 Flowchart Formatted Messages Module for the 7303 Register and Memory Allocation fo
19. The value assigned to key is an arbitrary unique identifier that can be derived once the column and row coordinates are known The DECODE KEY subroutine provided in the 73035 software package in Section 4 uses an algorithm that identifies each key with a hexadecimal number in the 00 17 range The 7303 is shipped with key labels that show the value that will be generated by the DECODE KEY subroutine when the key is pressed Frequently the value associated with a key is meaningless in relation to the application and the user may wish to rename the key with a more meaningful label The generalized DECODE KEY subroutine is still used to locate a key closure but the value returned is decoded a second time to lead to a specific system function For example the CALCULATOR program example in Section 4 shows how to use the compare and conditional jump instructions to detect the 11 key and assign it the CLEAR DISPLAY system function Key Reading Procedures In addition to simply detecting and decoding key closure the program may also be responsible for the following key control procedures 1 Differentiate between noise and a genuine key closure 2 Ignore key contact bounce when a key closes or opens 3 React only when the key closes not when it opens or vice versa 4 Avoid multiple responses to the same closure Noise and key contact bounce be suppressed by programming a double READ with a time delay between the READs as
20. cursors Removes both ASCII characters and cursors Displays only one ASCII char acter in all 8 display positions Turns on all LED segments and indicators Converts one hex digit to one ASCII character Converts block of binary in mem ory into displayable codes Combines HEX ASCII and DISPLAY Displays two hex digits in internal register Displays 8 character ASCII mes sage from anywhere in memory Displays N character message from anywhere in memory in bill board fashion General keyboard read routine Not for general use see text Detects keyboard activity Moves switch states to processor status flags Not for general timing applica tions see text Not for general timing applica tions see text DEBOUNCE DELAY Not for general timing applica tions see text pee 4 10 amp 4 11 4 12 amp 4 13 4 14 4 15 amp 4 16 4 17 amp 4 18 4 19 4 20 amp 4 21 4 22 amp 4 23 4 24 amp 4 25 4 26 amp 4 27 4 28 4 29 amp 4 30 4 31 amp 4 32 4 33 amp 4 34 4 35 amp 4 36 4 37 4 38 amp 4 39 4 40 amp 4 41 4 49 4 50 amp 4 51 4 52 amp 4 53 4 54 amp 4 55 Denotes subroutine labels Figure 4 2 Index of Keyboard and Display Subroutines for the 7303 Memory Maps Figures 4 3 through 4 6 are memory maps Figure 4 3 shows the 16K address space occupied by the Series 7800 processor cards and the location of the 7303 software package within the
21. pio o o oni 2 BILLBOARD PAGE ADDRESS 10 LINE LABEL CLR CURSORS CURSORS 8 _ 82 85 ae massa 89 8A 8B 8D SF 90 92 93 EEEN 95 e 98 99 9C m gt oO Nj ni gt Nj a 90 HEX ASCI A3 ae 3 45 DEBOUNCE DELAY 6 A A9 LONG DELAY MEM ASCII AD BO 8 2 LAMP TEST _ Bs B6 87 88 89 NNI BF Figure 4 4 256 Byte Memory Map 7303 Alphanumeric Display Subroutines PAGE ADDRESS 11 CALCULATOR LINE LABEL DISPLAY DEMO LABEL C F wo m gt gt gt READ KEY 53 DISPLAY SELF o ANIME wj sjn eo nn miojo gt DECODE KEY C6 CC ERE THE 04 05 56 DA 5B 0 DD E4 masa Es EB
22. 51 4 52 PRO LOG CORPORATION PROGRAM ASSEMBLY FORM HEXADECIMAL TITLE DATE E INSTR ______ DECR NT OUNTER E Lc he ee eee oa ee oe GS a nine Pee teeta ok QP Ol een 4 nu Ir Bap WE 3E To d MIL UM o dE RR RO sss 56 C LEG Wr ebl p 2 5 Pe lq s ie T gt 4 gt v m r l C 2 g v v e i gt L U i 27 b e w OAD DISPLAY LOOP 2 m 7 g OAD DELAY LOOP COUN 6 eel z 00 SAD LO DELAY LooP COUN jEc OB PAUSE D LOB FAT e PE g v D 2 JO D v O JJ 2 E ra RE D do Y ejbO PORT PORT 1 1 1 O 5 6 c S Opa c 4 IRIS ee We el ee 100001 2 77 N PROGRAM ASSEMBLY FORM PRO LOG CORPORATION TITLE DATE i TE ALD Is Q LA Y pe an Ae gt BOARD E D REM _ COUNTER Li O D 3 6 4 4 a
23. Q 2 E oci 24 Od Q A Q DA npo E O au Q Q Q Q C 5 27 2 O Q 2 C i a z J 2 NA z 215 m 2 su 9 gt giq Q gt oT POSITIO PAGE ADDR 8 5 N ADDR A EI FPF EREREEEETEEFEEETEREESP j j LL EL MILLISECONDS LOK 100001 2 77 4 53 PROGRAM ASSEMBLY FORM PRO LOG CORPORATION DATE PRESET 5 lt DATA co ER TO TITLE MNEMONIC HEXADECIMAL MODIFIER 1 OL Z C i Li 4 7 Oc a 4 4 D m NIIT ADR 4 AY 7 4 02 5 a5 X Z a 4 g 4 A 411 A T x AL LA 3 m Aa A BOARD NATRIX D D 441 T 4 HOP 3898442888299 82 4 44444 04 885014451 4444443 HIDE HH EL HEEL LL LU 100001 2 77 4 54 100001 2 77 PROGRAM ASSEMBLY FORM COMMENTS Y 84 O 84 24 CX Z 7 lt 4 C lt PO gt PRO LOG CORPORATION EE i ET TUNE
24. Recommended Operating Limits mans PIN NUMBER OUTPUT LSTTL DRIVE INPUT LSTTLLOADS PIN NUMBER OUTPUT LSTTL DRIVE INPUT LSTTL LOADS PER mc Ga a uy E emus ewo 5 EY lo EE S o RR an T La 7 Tale Les pon I eee Rennes eraros 98 Lum esse j i J win T ele L renes purs I 57 IN oUT Pco RUXGNG Hs Active low level logic Figure 2 7 Edge Connector Pins for the 7303 Figure 2 8 shows the timing requirements that must be observed by the 7303 s operating software Tg define the uncertainty period for input port data after a mechanical key or switch opens or closes Figure 2 9 defines the other data parameters listed below Key bounce pay Key data stable Rocker bounce or Switch data stable
25. Z2 23 X1 Y5 ZO 21 37 X1 5 Z2 23 X1 Y6 20 21 X1 Y6 Z2 Z3 X1 Y7 ZO Z1 X1 Y7 22 Z3 2 4 X1 Y1 Z0 214 4 wuj 44 41 41 Ni Nj nim ojo gt 4 2 po j X2 YO ZO 21 41 X2 YO Z2 23 X2 Y1 ZO Z1 17 X2 Y1 22 23 X2 Y2 20 Z1 X2 Y2 Z2 Z3 X2 20 Z1 X2 Z2 23 X2 Y4 ZO Z1 Y4 Z2 Z3 X2 Y5 Z0 Z1 57 X2 Y5 Z2 Z3 X2 Y6 ZO Z1 X2 Y6 Z2 Z3 X2 Y7 20 Z1 5C X2 Y7 22 Z3 YO 20 21 22 23 Y1 ZO 21 lt 7 Y1 22 Z3 2 20 21 X3 Y2 22 Z3 X3 Y3 Z0 Z1 X3 Y3 Z2 Z3 4 20 Z1 Y4 22 23 5 22 23 Y6 20 21 7g 1 22 23 Y7 20 21 7 22 23 8 8B 8C 7 X4 YO ZO 21 X4 YO 22 234 X4 Y1 ZO Z1 X4 Y1 Z2 Z3 X4 Y2 ZO Z1 gt lt N N N X4 20 21 4 22 23 X4 Y4 20 Z1 lt N N wo X4 Y5 20 21 X4 Y5 22 23 X4 Y6 20 21 X4 Y6 72 23 X4 Y7 ZO 21 X4 Y7 22 23 X5 YO 20 21 X5 Y1 ZO 21 X5 Y1 Z2 23 X5 Y2 20 Z1 X5 Y2 Z2 Z3 X5 Y3 20 21 X5 Y4 Z0 21 X5 4 Z2 Z3 X5 Y5 20 Z1 X5 Y5 Z2 Z3 X5 Y6 20 Z1 X5 Y6 Z2 Z3 X5 7 20 21 5 7 22 23
26. a direct interface to the STD BUS If you mount the 7303 outside the STD BUS card rack do not connect it directly to the STD BUS through a long cable Such a connection increases backplane capacitance and cross coupling and results in excessive crosstalk noise and generally degraded perfor mance Instead connect the 7303 to the end of I O port lines This type of connection Fig A 1 requires more program involvement but it avoids the problems associated with transmitting fast processor signals over a long cable In this mode TTL card with 3 state O lines provides the signals needed to control the 7303 in place of the direct STD BUS drive The program generates these signals by executing short instruction sequences instead of the single read and write instructions used mapped operation 7605 TTL Card or 7507 Module Mounting Ribbon Cable 7303 Keyboard Display Card Rack Interface Card up to 6 feet remote panel mounted Figure A 1 Cable Connection when Operating the 7303 as an 1 0 Load Remote 7303 Drive I O Lines When driving the 7303 lines the 7303 s address decoder circuitry is not used since the program instead of the usual hardware controls card selection Only address line 0 is retained to select between the two sequential port addresses on the 7303 In addition the ORQ and IOEXP lines are not used since the and WR signals alone can maintain full card control
27. card is shipped The address mapping and jumper selection for two addresses per card is shown in Figs 2 3 and 2 4 It indicates where to place jumper straps to obtain any port address in the 00 FF hexadecimal range Using the 2 digit hexadecimal port addresses desired find the hexadecimal port addresses along the vertical axis and read the corresponding strap positions from Fig 2 4 For example port address DO and D1 are obtained by connecting jumpers at X6 Y4 Z0 and Z1 This isthe preferred address andis shown on the table by the shaded area 1 74LS244 10 Figure 2 2 Decoder Pad Numbering for the 7303 CARD SELECT DECODERS 7415244 97 17 3 IOEXP 35 C O sx N O A6 D ue O 5 19 Q 12 04 741542 O s O O x U O 520 2 25 PORT SELECT DECODER 7415244 7 741 532 D 05 29 74LS244 07 16 4 3 gt wr 31 150 7 2 74LS32 18 O O 7415244 RD 32 Figure 2 3 7303 Address Decoder and Schematic for 2 Addresses shown mapped at DO and 1 the preferred card address 2 3 PORTS JUMPER WIRES S onaz ep enaz pes eene pen e evan 57 X1 1 Z2 Z3 X1 Y2 20 Z1 X1 Y2 Z2 Z3 2 X1 20 21 X1 4 ZO 21 X1 4
28. in RAM are noted on the program coding forms Other locations are intended for ROM storage but they can also be executed in RAM Port Addresses The 7303 s ports are assigned preferred hexadecimal addresses DO and D1 for compatibility with other Series 7000 cards Section 2 shows how to remap these addresses if necessary This software can be used by simply changing the port addresses when loading the program modules into your system Note that each input IPA and output OPA instruction is extended to three bytes by the addition of a no operation NOP instruction in this software This allows the userto replace the IPA and OPA instructions with the 3 byte LDAD STAD instructions if the 7303 card is memory mapped with a memory page address decoder provided by the user on another card to generate the IORQ signal Also the IPA OPA instructions can be replaced by jump to subroutine JS instructions for constructing subroutines in RAM to read write the 73035 ports This allows the program to vary the port address which in turn allows the same software package to be used for several 7303 cards in the same card rack Software Package Contents Figures 4 1 4 2 list the demonstration test programs and subroutines respectively in the 7303 s software package Figure 4 1 lists short endless loop operating programs for demonstrating and repairing the 7303 These programs are examples of how the subroutines in the soft
29. in any one of the eight display positions Preset register B with the desired display position Use the 3 bitcodes shown in Fig 3 6to specify one of eight positions loading the code in register B s bits 2 1 0 with bits 3 through 7 0 For example load register B with hexadecimal 06 to specify display position 6 second display from the left Preset the accumulator register A with the binary bit pattern of the hexadecimal digit 0000 through 1111 binary in register A s bits 3 2 1 0 bits 4 through 7 are don t care and may contain any bit pattern Upon exit the display position remains unaltered in register B but the hexadecimal digit inthe accumulator is lost PARAMETER ENTRY COMMENT ELEMENT ADDRESS Hexadecimal Register 0 ew r X Ber Display EPA NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 33 Register and Memory Allocation for 7303 Subroutine DISP HEX RETURN SYMBOL AMETE 63 UNITS COMMENT Stack Bytes Subroutine HEX ASCII Memory used E10 Fig 4 29 Program memory RAM memory Execution 8085 See note 8085 time states depend on data 177 if digit is HEX A B C D F 174 if digit is HEX 0 9 Total program memory NOTE Figure 4 34 Characteristics of 7303
30. reached at any time by TWX at 910 360 7082 Limited Warranty Seller warrants that the articles furnished hereunder are free from defects in material and workmanship and perform to applicable published Pro Log specifications for one year from date of shipment This warranty is in lieu of any other warranty expressed or implied In no event will Seller be liable for special or consequential damages as a result of any alleged breach of this warranty provision The liability of Seller hereunder shall be limited to replacing or repairing at its option any defective units which are returned F O B Seller s plant Equipment or parts which have been subject to abuse misuse accident alteration neglect unauthorized repair or installation are not covered by warranty Seller shall have the right of final deter mination as to the existence and cause of defect As to items repaired or replaced the warranty shall continue in effect for the remainder of the warranty period or for ninety 90 days following date of shipment by Seller the repaired or replaced part whichever period is longer No liability is assumed for expendable items such as lamps and fuses No warranty is made with respect to custom equipment or products produced to Buyer s specifications except as specifically stated in writing by Seller and contained in the contract APPENDIX Front Panel Mounting of 7303 Card PLAN 131 A 1 Introduction The 7303 is designed as
31. 303 Subroutine READ KEY SUBROUTINE SYMBOL PARAMETER Stack memory Program memory Total program memory Execution time NOTES 1 Not predictable due to human intervention 2 Subroutines used SCAN E18 Fig 4 45 DEBOUNCE DELAY E22 Fig 4 54 Figure 4 44 Characteristics of 7303 Subroutine READ KEY Denotes subroutine label i Low level active E R Entry return path identifier encircled 4 34 Subroutine DECODE KEY E17 Starting Address 1164 This subroutine is similar to READ KEY but it omits testing for the keyboard idle condition before reading and decoding the key IMPORTANT Unless the user adds additional procedural instructions when using the DECODE KEY sub routine the system may react more than once to the same key closure causing a system error This subroutine is provided only to allow the user to design a special keyboard read decode procedure in applications where the READ KEY subroutine which is normally recommended is not useful For decoded key values and their location upon exit see READ KEY 4 35 Subroutine SCAN E18 Starting Address 11A7 This subroutine is used to check keyboard status by determining whether any key is closed If a key closureis detected SCAN is unable to determine which key is closed The subroutine is included for use with DECODE KEY allowing the user to design a keyboard read decode procedure if the R
32. 6 7 can be addressed in one operation Figure 3 9 shows the data port bit assignments for cursor mode DATA BUS MNEM DESCRIPTION b5 b4 T Gurr enable postions oana Note Standard data port address is HEX DO Set bit 1 to display cursor Reset bit O to remove cursor Figure 3 9 Data Port Bit Assignments for Cursor Mode 7303 Card Control Port Output port D1 controls the display s WRITE function Fig 3 10 and selects between the right hand four displays and the left hand four displays Figs 3 10 and 3 11 DISPLAY LEFT HALF RIGHT HALF POSITION 7 6 5 4 pata BiT B2 B1 2 B1 Oa 1 j o el eft half select positions 7 6 5 4 ight half select positions 3 2 1 0 Note Standard control port address is HEX D1 Figure 3 10 Control Port Bit Figure 3 11 Left Right Display Position Assignments for Cursor Mode 7303 Card Group Select for Cursor Mode 7303 Card O Programming in the Cursor Display Mode With a valid ASCII character loaded to a display position the cursor character can also be displayed in that position When the cursor is removed the same ASCII character will reappear Cursor characters can be turned on or off in any combination in groups of four display positions right half positions 0 1 2 3 and left half positions 4 5 6 7 Controlling all eight cursors requires
33. 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 23 Subroutine HEX ASCII E10 Starting Address 1090 This subroutine converts a 4 bit binary hexadecimal code into one of 16 ASCII characters 0 1 2 3 4 5 6 7 8 9 or A B C D E F upper case only with parity set bit 7 1 The ASCII codes returned by the subroutine for the 16 characters are shown in Fig 3 3 Enter with the hexadecimal digit loaded in bits 3 2 1 Oof the accumulator register A The most significant bits 4 through 7 of register A are don t care and will be masked by the subroutine Upon exit the ASCII character code is stored in register A bits 7 through 0 and the input binary code is lost R US NIE ENTRY RETURN RS 6 ELEMENT ADDRESS Hexadecimal ASCII ASCII Converts Register digit 0 character character bits 0 3 0 9 A F Bits 4 7 of accumulator are don t care r e m gt T NOTES 1 For registers not shown entry contents are not used and remain unaitered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 29 Register and Memory Allocation for 7303 Subroutine HEX ASCII SUBROUTINE _ __ _ o s 13 Nr RAM memory 0
34. 9 4 10 4 11 4 12 4 13 4 14 4 15 4 16 4 17 4 18 4 19 4 20 4 21 4 22 4 23 4 24 4 25 4 26 4 27 4 28 4 29 4 30 4 34 4 32 4 33 4 34 4 35 4 36 4 37 4 38 4 39 4 40 4 41 4 42 4 43 4 44 4 45 4 46 4 47 Figures continued Flowchart ASCII Display Driver Module for the 7303 Register and Memory Allocation for 7303 Subroutine DISPLAY coe Characteristics of 7303 Subroutine 15 Register and Memory Allocation for 7303 Subroutine MEM DISP Characteristics of 7303 Subroutine MEM DISP Register and Memory Allocation for 7303 Subroutine STROBE Characteristics of 7303 Subroutine STROBE Flowchart Cursor Control Module for the 7303 Register and Memory Allocation for 7303 Subroutine CURSORS Characteristics of 7303 Subroutine CURSORS Register and Memory Allocation for 7303 Subroutine CLR CURSORS Characteristics of 7303 Subroutine CLR CURSORS Flowchart Display Service Module for the 7308 Register and Memory Allocation for 7303 Subroutine CLEAR DISPLAY
35. 999C 4 81
36. A F Accepts two 4 bit hexadecimal digits in each of 1 256 locations anywhere in memory and outputs 2 512 ASCII characters to RAM memory Produces ASCII characters 0 1 2 3 4 5 6 7 8 9 A B C D E upper case only with parity bit set bit 7 1 See DISPLAY SELF and KEY TEST for application examples Contents HEX ASCII Converts hexadecimal digit to one ASCII character code MEM ASCII Converts block of binary in memory into displayable codes DISP HEX Combines HEX ASCII and DISPLAY DISP 2 IN C Displays two hexadecimal digits in internal register REMOVE BITS 4 5 6 7 1 Fig 4 33 Fig 4 29 Fig 4 34 i INCREMENT DATA Fig 4 30 DESTINATION POINTER FETCH MA SOURCE POINTER 10B8 ISOLATE LOW ORDER HEX DIGIT YIELDS 1 CONVERT HEX TO ASCII 10BD YIELDS B0 B9 Fig 4 29 STORE ASCII USING DATA DESTINATION POINTER Fig 4 35 Fig 4 36 INCREMENT SOURCE AND DESTINATION POINTER ISOLATE AND RIGHT ADJUST BITS 4 5 6 7 FROM REG C Fig 4 31 Fig 4 32 DECREMENT BYTE COUNTER FETCH BINARY USING DATA SOURCE POINTER DECREMENT DISPLAY MEMORY BITS POSITION 4 7 BECOME ADDRESS BITS 0 3 RIGHT ADJUST HIGH ORDER HEX DIGIT 1082 TO ASCH RETURN Figure 4 28 Flowchart Hexadecimal ASCII Conversion Module for the
37. ARAMETER ELEMENT ADDRESS mete AF B NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 40 Register and Memory Allocation for 7303 Subroutine BILLBOARD SUBROUTINE SYMBOL PARAMETER Program memor RAM memory Execution time Total program memory NOTES 1 8085 First 8 characters 1 433 time states delay Each additional character 1 427 time states delay 2 Z80 First 8 characters 1 920 time states delay Each additional character 1 919 time states delay 3 Subroutines used MESSAGE E14 Fig 4 38 DISPLAY DELAY E20 Fig 4 50 Figure 4 41 Characteristics of 7303 Subroutine BILLBOARD Denotes subroutine label Low level active E R Entry return path identifier encircled 4 31 4 32 Key and Switch Data Entry Module This module controls 7303 s hexadecimal keyboard and translates the general purpose rocker switch states into program status information for decision making See Fig 4 42 for the flowchart The module contains subroutines that perform all procedural requirements of keyboard reading and decoding as well as general subroutines that allow the user to design a special keyboard procedure Returns a uniq
38. CODE TO Find program values in Fig 3 3 WRITE POSITION ADDRESS WITH WR 0TO CONTROL PORT STEP 2 DISPLAY POSITION 7 s commen WRITE POSITION eee tet STEB ADDRESS WITH had zi A cod on nee WRITE POSITION STEP 4 ADDRESS WITH Program Values for Steps 2 3 4 CONTROL PORT Figure 3 7 Flow Diagram of Character Mode Events for the 7303 STEP 1 SERT DATA 2 3 STEP 4 ETERS _STEP 3 STEP 4 1 A2 A1 A0 POSITION ADDRESS VALID t CONTROL PORT i WR 1 WRITE WR OY BETINE NAWR 0 Figure 3 8 Character Mode Timing Waveforms for the 7303 Note Waveforms illustrate program values WR is low active in hardware Once a valid ASCII character is loaded into the display position s ASCII memory the position can display the cursor character Note that ASCII characters must be displayed before the cursor can be displayed the SPACE character satisfies this requirement Output Port Bit Assignments for Cursor Mode Cursor mode and character mode share the same output ports but the bit functions differ between the two modes Data port Output port DO selects cursor mode bit 7 0 Bits 0 1 2 3 specify the cursor on off state for four display positions at a time Eitherthe righthalf of the displays positionsO 1 2 3 ortheleft half ofthe displays positions 4 5
39. Demonstration Test Program for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 47 a w Coding Forms PROGRAM ASSEMBLY FORM TITLE DATE PRO LOG CORPORATION gt MODIFIER 3 19 aa Um i MNEMONIC INSTR LABEL HEXADECIMAL 1 ated daa Q LA LS 12 m 11 LN AR ON ART AT DISPLAY POSITION FROM 100001 277 4 49 PROGRAM ASSEMBLY FORM PRO LOG CORPORATION HEXADECIMAL MNEMONIC LINE EIE LABEL INSTR 100001 2 77 COMMENTS ON 9 a 3 4 7 1 ed lll ER gi Ho 0008 000 E E E LL I LIS TITLE 1 D EN Io 19 4 50 PROGRAM ASSEMBLY FORM PRO LOG CORPORATION DATE COMMENTS TITLE u u Q Q HEXADECIMAL 05 C D L C 1 J a 4 Q A Q E CO C 18 Q a C LII 1 LI LI L3 T P H diis ran er 4
40. EAD KEY subroutine which is normally recommended is not useful Upon exit the Z zero flag can be tested to determine if any key has been pressed The conditional jump instructions are as follows 1 The JP 20 instruction will result in a jump if a key is closed no jump will occur if all keys are idle 2 The JP Z1 instruction will result in a jump if all keys are idle no jump will occur if any key is pressed Note that SCAN can be mislead by switch bounce or noise For this reason we recommend that no program decision be made until the SWITCH DEBOUNCE subroutine has been executed and SCAN has been repeated See the READ KEY flowchart Fig 4 42 for an example PARAMETER ENTRY 18 RETURN COMMENT ELEMENT ADDRESS eee Keyboard status NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 45 Register and Memory Allocation for 7303 Subroutine SCAN SUBROUTINE SYMBOL PARAMETER Stack Program RAM memory Execution time Total program Figure 4 46 Characteristics of 7303 Subroutine SCAN Denotes subroutine label 7 Low level active E R Entry return path identifier encircled 4 36 Subroutine ROCKER STATUS E19 Starting Address 11B4 T
41. Ecc s pem el 25 eal pom uit Sy ecd Taare EM EEUU TELE 4 55 100001 2 77 PROGRAM ASSEMBLY FORM a 4 q 4 4 a r s 4 d 1 e 4 CX zm Of 2 4 sr enr B Ill ine E EEEELEFERREEEEFEEEPEP EF EEFEEPFEEE TRER VANNER VM T b HE REL E COMMENTS TITLE N LY MNEMONIC PRO LOG CORPORATION LINE LABEL HD px O 2 pere HEXADECIMAL 4 56 SECTION 5 Maintenance Reference Drawings The schematic Fig 5 1 and assembly drawing Fig 5 2 in the following pages are included in this manual FOR REFERENCE USE ONLY They may differ in some respects from the card and documentation that the user receives from Pro Log The schematic and the assembly drawing shipped by Pro Log with the card are those from which the card was manufactured 5 1 eS Z 4 124 2 74 5244 5 A 2 BUS BUFFERS CONTROL PORT REVISED PER PCN 0355 REVISED PER PCN 1270 2 wes DO 5V DISPLAY 2 LEFT HALF 2 LEFT Q SELECT DECODERS DATA PORT 740475 CEE Ce
42. Fig 3 14 The RESET key is not programmable When pressed it grounds the 7303 s PBRESET output to the STD BUS backplane This signal is provided to reset the system processor which responds by generating SYSRESET SYSRESET is an input to the 7303 card which resets the 7303 s output ports The exact characteristics of the SYSRESET signal depend on the processor card in use 24 program definable keys are wired a 4 x 6 switch matrix The four columns vertical axis are driven by the data port output DO port bits 0 1 2 3 and the six rows horizontal axis are sensed by input port DO bits O 1 2 3 4 5 Reading the keyboard is a programmed operation The program strobes each column of keys in turn using rotate or shift instructions to move the strobe a logic 1 from column to column As each column is strobed the program reads the input port to see if a switch closure has connected the strobe bit to the input port If so both key coordinates are now known the program generated the column value and the input port read the row value so that the value of the key can be computed If not the program steps the strobe to the next column and repeats the process until a key closure occurs TYPICAL 5 KEYSWITCH PBRESET ID3 ID LINE DATA PORT 90 97 8 Physical Layout Figure 3 14 Keyboard Programming Model for the 7303 Key Values
43. GE after each alteration of the buffer s content See BILLBOARD for an example Preset register pair H L with the first lowest address memory location to be displayed This can be in either RAM or ROM memory and it appears in the leftmost display position The MESSAGE subroutine fills the display from left to right incrementing the H L register pair each time until all eight locations are loaded with ASCII characters Upon exit register B is cleared and register pair H L points at the last character highest memory address displayed The displayed memory locations are unaltered PARAMETER RETURN COMMENT ELEMENT ADDRESS H L points to 8th Uwe ox 0 Umm os X 1 NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless 4 Set to point at first character lowest address in memory block containing 8 ASCII characters Figure 4 38 Register and Memory Allocation for 7303 Subroutine MESSAGE SUBROUTINE SYMBOL PARAMETER Stack memory Program memory RAM memory Execution Total program memory Note Subroutine used MEM DISP E2 Fig 4 10 Figure 4 39 Characteristics of 7303 Subroutine MESSAGE Denotes subroutine label Low level active E R Entry return path identifier encircled 4 30
44. MARK KEYS AS KI K2S ADO SECTION c visto PER Pen 128 SNITCH DETAIL CENTER CONTACT Am 0 VER UJANI 8 SECTION C C CIRC SCHEMATIC 104973 PARTS LIST 104975 SIDE OF KEYBOARD ie Ric 20 Lis o m 4 7K NETWORK R2 sp eee __ _ ___ __ ___ j 50 0 __________ 9 50 _ 2 3 4 5 6 7 5 9 DESCRIPTION REF DESIGNATION RO LOG CORPORATION ASSEMBLY 7303 KEYBOARD DISPLAY S MARULLO 14 79 CARD put Esp vos 1 v MNEMONIC IDO ID7 b0 b7 Signal Glossary See Figs 5 3 and 5 4 00 07 High active 8 bit 3 state bidirectional data bus A0 A7 Address bus 15 17 19 High active Low order 8 bits of address bus used for 21 23 25 port addressing 7303 responds to ports 27 29 DO D1 as shipped SYSRESET System 47 Low active Originates at processor card in response to reset power on or PBRESET PBRESET Pushbutton Low active Drives processor card s PBRESET input reset switch closure port 35 High active Bank select must be low for 7303 grounded expansion by 7801 7802 7803 processor cards request 33 Low active Indicates that the address bus has a valid port address 0 7 Read 32 Low active Indicates that the processor is reading from the ad
45. NPUT BUFFER AS NEW LSD FORMER MSD IS SHIFTED OUT AND LOST Entry return path identifier encircled 4 45 Demonstration Test Program DISPLAY TEST Starting Address 1140 This program allows operator testing of the displays by observing each display position as the program cycles all eight displays through every ASCII character Fig 3 3 that can be displayed by the 7303 See Fig 4 59 for flowchart NOTE This is an endless loop demonstration program not a subroutine DISPLAY TEST PRESET DATA COUNTER TO SPACE CHAR DISPLAY CURRENT ASCII CHAR IN ALL 8 POSITIONS INCREMENT ASCII DATA COUNTER Figure 4 59 Flowchart DISPLAY TEST Demonstration Test Program for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 46 Demonstration Test Program KEY TEST Starting Address 1170 This program allows an operator to test the 7303 s keyboard by observing that the key value as labeled on the keys when the card is shipped appears in the display each time one ofthe keys is pressed It does notapply to the RESET key which resets the system processor Section 3 See Fig 4 60 for flowchart NOTE This is an endless loop demonstration program not a subroutine KEY TEST Fig 4 22 CLEAR DISPLAY DISPLAY KEY S HEX VALUE POSITIONS 1 amp 0 Figure 4 60 Flowchart KEY TEST
46. PLAY CLEAR BOTH DISPLAY 8 101A REMOVE CURSORS Fig 4 17 101D LAMP TEST LOAD CURSOR BIT PATTERN ALL CURSORS FETCH ASCII SPACE CHARACTER Fig 4 15 1040 START DISPLAY POSITION 7 LOAD LED BIT PATTERN OUTPUT BIT PATTERN TO DATA PORT RETURN DECREMENT DISPLAY POSI TION ADDRESS Figure 4 19 Flowchart Display Service Module for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled Subroutine CLEAR DISPLAY E6 Starting Address 101D This subroutine blanks the alphanumeric display by loading the SPACE character in each of the eight positions Note that the cursors are unaltered by this subroutine Use CLR CURSORS to remove cursor characters Register B is cleared by this subroutine ENTRY RETURN COMMENT Register oe Register Register NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless SUBROUTINE PARAMETER Figure 4 20 Register and Memory Allocation for 7303 Subroutine CLEAR DISPLAY Program RAM memory RETURN memory Execution 808 Stack Subroutine DISPLAY Total program 42 Bytes memory s 1 1228 1228 1213 Ti
47. Subroutine DISP HEX Denotes subroutine label i Low level active E R Entry return path identifier encircled 4 27 Subroutine DISP 2 IN C E13 Starting Address 10CE This subroutine converts the two 4 bit hexadecimal digits in register C into two 8 bit ASCII characters in the range 0 9 or A F and it displays them in two adjacent display positions Preset register C with the data to be displayed The subroutine converts register C s bits 4 7 into an ASCII character and displays the character in the display position specified below Then register C s bits 0 3 are converted into a second ASCII character and displayed in the display position immediately to the right of the position specified Preset register B with the leftmost of two desired display positions Use the 3 bit codes shown in Fig 3 6 to specify one of seven positions loading the code in register B s bits 2 1 0 with bits 3 through 7 0 CAUTION Do not specify position zero register B should contain the combinations 01 02 03 04 05 06 07 only after this step Upon exit register will have been decremented by 1 from its initial condition and two hexadecimal digits in register C will have been unaltered PARAMETER ENTRY RETURN COMMENT ELEMENT ADDRESS 5 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means cont
48. T SELECT ADDRESS BUS LOGIC 0 DATA PORT LATCHES COLUMN SELECT IORQ RD WR ROW READ CONTROL amp BUFFERS MATRIX SYSRESET PBRESET Active low level logic Figure 1 2 Block Diagram of the 7303 Keyboard Display Card SECTION 2 Installation and Specifications The 7303 operates as part of an STD BUS card rack system You can plug it directly into the STD BUS backplane Fig 2 1 or extend it from the motherboard with a 7901 card extender or equivalent In this configuration the card is mapped at processor port addresses Insert the card in the left most socket viewed from the card ejector end of the rack of a card cage that has the left end plate open Insert a 7901 card extender in any card slot and plug the 7303 into the card extender In this position the 7303 clears the other cards and is accessible If you mount the 7303 remotely from the card rack you will need buffering between the card rack and the 7303 A suitable method is to operate the card as an load driven by input and output ports rather than as an mapped processor backplane load For more information see Pro Log s Application Note PLAN 131 Appendix A Mapped Card Addressing In its normal operation the 7303 is addressed directly by the processor card The 7303 s input and output ports respond to single read and write instructions executed in the pr
49. Using either Pro Log s 7507 module mounting rack interface 7605 general purpose TTL card or equiva lent card with bidirectional capability connect the 7303 s edge connector as follows 1 Ground address lines A1 throu A7 edge connector pins 15 17 19 21 23 25 27 to pins 3 4 move address jumpers to YO 20 and Z1 Ground IORQ and IOEXP edge connector pins 33 and 35 to pins 3 4 Connect a 3 state I O port 8 lines to the 73035 data bus 40 47 edge connector pins 13 11 9 7 14 12 10 8 maintaining one to one bit significance for programming convenience Connect four output only lines to the 7303 s 0 WR SYSRESET lines edge connector pins 29 32 31 and 47 respectively Note that these lines are always outputs from the 3 state card and must remain driven at all times for correct 7303 Do not allow these lines to float unless pull up resistors are connected NOTE In steps 3 and 4 above the interface cable to the 7303 should consist of ribbon cable with alternating ground signal ground or multiple twisted pairs consisting of signal ground in each pair Limit cable length to 6 feet 2 meters Connect 5V 5 and logic ground to edge connector pins 1 2 and 3 4 respectively a twisted pair of 18 gauge wires or larger Optional the 7303 s reset pushbutton is to be functional connect the card s 48 to STD BUS trace pi
50. ams are written as endless loops it is necessary to reset the system processor to exit from them oe ee ee Figure 4 2 lists the general purpose hardware level subroutines provided for operating the 7303 These subroutines allow the user s program to communicate with the 7303 via data mailboxes in the processor s internal registers and in RAM avoiding the need to write port and bit manipulation software MODULE NAME SUBROUTINE NAME AND FUNCTION pu ASCII Display Driver Controls ASCII display operation Cursor Control Controls cursor display operation Display Service Miscellaneous service routines Hexadecimal ASCII Conversion Accepts hexadecimal input from various sources Formatted Messages Ready to use message formats Key and Switch Data Entry Performs all key and switch hardware manipulation Auxiliary Timing Inexact delays for display viewing and switch debounce DISPLAY MEM DISP STROBE CURSORS CLR CURSORS CLEAR DISPLAY CLEAR BOTH DISPLAY 8 LAMP TEST HEX ASCII MEM ASCII DISP HEX DISP 2 IN C MESSAGE BILLBOARD READ KEY DECODE KEY SCAN ROCKER STATUS DISPLAY DELAY LONG DELAY Displays any one ASCII character in any one position Displays one ASCII character from memory Pulses the display s WRITE line Turns on off any combination of cursors Removes cursors not ASCII characters Blanks ASCII characters
51. broutine and is useful for alphanumeric display test operations Preset the accumulator register A with the character to be displayed Upon exit register C contains the ASCII character displayed and register B is cleared PARAMETER ENTRY E8 RETURN R3 COMMENT ELEMENT ADDRESS _ c 5 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 24 Register and Memory Allocation for 7303 Subroutine DISPLAY 8 SUBROUTINE SYMBOL PARAMETER Stack memory Program memor RAM memory Execution time Total program memory Figure 4 25 Characteristics of 7303 Subroutine DISPLAY 8 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 20 sine e Subroutine LAMP TEST E9 Starting Address 10F3 This subroutine displays the cursor character in all eight display positions illuminating all LED segments in the alphanumeric display It also writes hexadecimal FF to the 7303 5 output data port which illuminates all of the eight binary LEDs located directly below the alphanumeric display NOTE All the keyboard and display routines except ROCKER STATUS and 5
52. character in register A is lost PARAMETER ELEMENT ADDRESS ENTRY RETURN COMMENT asciicharacter 2 m Load bits O 1 2 only Display position Display position bits 3 through 7 0 Register NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost ot 3 means contents are unknown or meaningless l Figure 4 8 Register and Memory Allocation for 7303 Subroutine DISPLAY SUBROUTINE SYMBOL PARAMETER O Program 2 w 1 RAM memory Bytes Execution time Time states Figure 4 9 Characteristics of 7303 Subroutine DISPLAY Denotes subroutine label i Low level active E R Entry return path identifier encircled 4 10 Subroutine MEM DISP E2 Starting Address 1000 This subroutine allows any ASCII character to be read from memory and displayed in any one of the eight alphanumeric display positions Preset register B with the desired display position Use the 3 bit codes shown in Fig 3 6 to specify one of eight positions loading the code in register B s bits 2 1 with bits 3 through 7 0 For example load register B with hexadecimal 06 to specify display position 6 second display from the left Register pair H L is used as a memory pointer and must be preset to the address of the memo
53. display Fig 3 2 The display s operation is controlled by program manipulation of the output bits from these ports The ports provide the display with data addressing and control signals giving the program random access to any of the eight display positions You can program each display position in either of two modes character or cursor By flashing the cursor all segments on alternately with another character you can draw attention to one or more of the display positions Also you can use the cursor asalamptest The display can have any combination of characters and cursors present In the character display mode you can load each display position with any of the characters shown Fig 3 3 Use the SPACE character to blank the position Note that the display uses 7 bit ASCII code Each display position has its own ASCII character memory ASCII to 16 segment decoder and lamp drivers In the cursor display mode each display position can show the cursor character and each position has a separate cursor memory in addition to its character memory Since setting the cursor on memory bit does not alter the content of the ASCII character memory you can flash the cursor and an ASCII character alternately by setting and clearing the cursor memory The functions of the two onboard output ports differ between character display mode and cursor display mode including display clearing We discuss these two modes separately also we provide separat
54. dressed input port Write 31 Low active Indicates that the processor is writing to the addressed output port Priority 52 level serial interrupt priority trace High active maintains continuity on 7303 Figure 5 3 STD BUS Edge Connector Signals for the 7303 see also STD BUS pin list Fig 2 7 Note Unused pins are open pads are provided on some unused pins for user signals DESCRIPTION COMMENTS Display digit address High active Selects one of four digits in each half of the display Display chip select Low active Selects the left hand four digits A2 1 or the right hand four digits of the display A2 0 Input port bits Low active IDO ID5 are used to read key closures from the keypad matrix ID6 is used to read the state of rocker switch S1 107 is used to read the state of rocker switch S2 Input port select Decoder output used to read input port DO Output latch bit High active bO0 b6 are used as the ASCII character bus to the display digits b7 selects cursor mode when low char acter mode when high Output latch bit Low active Used to strobe the keypad for key reading decoding operations Output select Rising edge Used to latch data bus data to output ports DO D1 as shipped Low active Buffered SYSRESET used to reset the out put ports and the binary LED display RST Figure 5 4 Internal 7303 Signals Keyboard Label Replacement change a keyboard label grasp the clea
55. e Te TE RERO rere E Ng NOTE TYP 25 PLES A RIM CONTACT CENTER CONTACT gt gt ZA Ee 19 5 em es E SPARE GATES 7415244 0 1407 74 532 8 ASSEMBLY NO 104974 wc pue NC PARIS UST NO 104975 AUX GND 2 ALL RESISTORS 47K LA RO LOG CORPORATION PORTS ARE MAPPED AT DO AND DI AS SHOWN SCHEMATIC 7303 AUX GND SZ SELECTS OF 4 PORTS ADDRESSES KEYBOARD DISPLAY SY SELECTS OF 8 BLOCK 4 PORTS PER BLOCK 5 MARULLO 2 M79 CARD X SELECTS CF BLOCK 32 PORTS PER BLOCK i G PAPPE 22179 NOTES UNLESS OTHERWISE SPECIFIED EET 24975 EE 1 Figure 5 1 Schematic for 7303 reference only AX USE JIG AF70007 FIX HEIGHT OF KEY BOARD INSTALL SPACERS PRIOR TD SOLDERING SWITCHES WITH ASSEMBLY REV LETTER USING RUBBER STAMP amp REFERENCE DESIGNATIONS ARE FOR LOCATING PURPOSES ONLY ANO MAY NOT APPEAR OM ACTUAL PART 7 IMMERSE CARD IN SOLVENT AS APPLY LOCKTITE SCREWS ALS MOUNT KEYBOARD WITH LETTERING 2N CIRC SIDE UPSIDE DOWN BREAK OFF DOTTED AREA OF CARD MAPPED TO PORTS DO AND Di AX DENOTES PIN END OF 15 BOARD TO CONFORM ASSY STANDARD 5004 NOTES UNLESS OTHERWISE SPECIFIED Figure 5 2 Assembly for 7303 reference only c DETAIL B PLACES gt DETAIL 4 PLCS D REVISED PER PCN 0895 DELETE RUBBER SPACE
56. e subroutines can be linked to work together at system level The software in this section can be used without license from Pro Log Although tested and believed correct this software is not represented to be free from errors or copyright infringement or appropriate for any specific application The subroutines are in STD instruction mnemonics using 8080 assembly codes They execute in 8080 8085 Z80 NSC 800 and other code compatible microprocessor systems The coding forms are grouped atthe end of this section following the flowcharts Flowcharts which do not refer to microprocessor characteristics allow the subroutines to be easily adapted to other microprocessor types The subroutines are grouped in functional modules Each module specification describes the module s content including flowcharts Individual subroutine specifications give memory entry and exit requirements for each path plus timing and other necessary information Memory Addresses Full memory addresses are given They are preferred addresses that allow the subroutines to work with those provided for other Series 7000 STD BUS cards from Pro Log The program addresses correspond to the Series 7800 processor cards onboard ROM EPROM and RAM sockets If your system can not use the memory addresses in the 7303 s software package simply change the memory page addresses as required when loading these modules into your system Memory addresses that must be located
57. e subroutine modules for the 7303 s alphanumeric display operation in each mode see Section 4 LEFT HALF RIGHT HALF 7 6 5 4 3 2 1 0 POSITION MODE ASCII SELECT SELECT CONTROL PORT DATA PORT Figure 3 2 Alphanumeric Display Programming Model for the 7303 O 0 1 2 3 4 5 6 7 8 9 lt lt gt V l Awe Note Underscore Figure 3 3 Hexadecimal Values of ASCII Characters Initialization Reset Characteristics The 7303 s SYSRESET input clears its output ports but does not clear the alphanumeric display or its character and cursor memories If SYSRESET occurs while the program is changing the content of the alphanumeric display the content may unpredictably Therefore make sure you restore or clear the alphanumeric display after a system reset Also after power on the display s content is unpredictable So initialization by a programmed instruction sequence is generally needed soon after power on To blank the display load the SPACE character ASCII hexadecimal 0 in each display position Note that a separate instruction sequence is required to clear the cursors ASCII Character Set The 7303 can display 64 different characters These characters and the hexadecimal code to produce each one are given in Fig 3 3 To use this figure identify the character you wish displayed The code to
58. ents are unknown or meaningless 4 Bits 4 7 converted to an ASCII code and displayed in specified display position bits 0 3 displayed as ASCII character in adjacent display position on right 5 Bits 0 2 specify display position and must be nonzero do not specify position O Figure 4 35 Register and Memory Allocation for 7303 Subroutine DISP 2 IN C UNITS COMMENT PARAMETER MAX 17 8085 80 5 1 8085 time states are variable 413 if both digits are HEX B C D E 410 if one character is BCD 0 9 407 if both characters are BCD 2 Subroutine used DISP HEX E12 Fig 4 33 Figure 4 36 Characteristics of 7303 Subroutine DISP 2 IN C Denotes subroutine label Low level active E R Entry return path identifier encircled 4 28 O Formatted Messages Module This program module see Fig 4 37 for flowchart uses the hardware level subroutines to format and display messages of the designer s choice Two styles are available 1 MESSAGE displays a static 8 character ASCII message from anywhere in memory 2 BILLBOARD displays a dynamic message of 8 characters or more from anywhere in memory rotated across the display in billboard fashion These formats can be used repeatedly and in combination to show system status prompt the system s operator and other ap
59. essor card an 8 bit binary LED display and two rocker switches This section shows how each of these elements works and how they are programmed Actual program examples are found in Section 4 Figure 3 1 shows the physical layout of the 7303 s switches and indicators It also shows the display position numbers 7 0 the numeric values of the keys in hexadecimal 0 17 and the rocker switch numbers 51 and 52 These designations are important when programming the 7303 and you will probably wantto refer back to Fig 3 1 while reading the rest of this section ALPHANUMERIC DISPLAY LEFT LEFT HALF RIGHT HALF RIGHT 52 Qe 09 09 60 s1 7 6 5 4 2 1 0 LED DISPLAY BZDEU KEYBOARD V Figure 3 1 7303 Keyboard Display Alphanumeric Display The display consists of eight 16 segment alphanumeric positions Each position displays any character from the 64 character ASCII set It can also display a cursor character all segments on Each display position has an ASCII character memory and a separate cursor memory These separate memories allow the cursor to be displayed and removed without altering the ASCII character memory Each display position is randomly addressable Two onboard output ports drive the
60. his subroutine moves the on off status of the two rocker switches into the processor s flag register F This allows conditional jump instructions to alter the program flow according to the on off closed open status of the two uncommitted rocker switches Upon exit use the following conditional jump instructions 1 JP S1 or JP 20 will cause a jump if the right hand rocker switch is closed 2 JP 0 or JP Z1 will cause a jump if the right hand rocker switch is open 3 JP C1 will cause a jump if the left hand rocker switch is closed 4 JP will cause a jump if the left hand rocker switch is open PARAMETER ENTRY e RETURN sh COMMENT ELEMENT ADDRESS NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless SUBROUTINE PARAMETER Figure 4 47 Register and Memory Allocation for 7303 Subroutine ROCKER STATUS RETURN SYMBOL UNITS COMMENTS Stack memory memor Total program Bytes memory RAM memory Execution 8085 time 280 Figure 4 48 Characteristics of 7303 Subroutine ROCKER STATUS Denotes subroutine label Low level active E R Entry return path identifier encircled 4 37 co n lt Auxiliary Timing Module This module contains captive subroutines used by the key and
61. irejumpersto implement ports DO and D1 In such cases cutthe jumper trace and remove itfrom the board with a sharp knife taking care not to damage the board or any other traces then proceed to install the new jumper s Alternatives to Soldered Wire Jumpers If occasional or frequent changes in address mapping jumpers are anticipated remove the wire jumpers and populate the jumper pads with 0 025 in square posts which are availableindividually and in single and double strips corresponding to the 0 100 in gridjumper pad spacing onthe The posts may then be connected by wirewrap by jumper clips available from several sources Check the height above the board that these parts may protrude in order to avoid interference with adjacent cards The recommended wirewrap square post for SX and SY is AMP No 87215 5 or equivalent For SZ itis AMP No 87215 1 orequivalent The recommended jump clip is AMP No 530153 2 or equivalent Electrical and Environmental Specifications PARAMETER Free air temperature o a Noncondensing RECOMMENDED OPERATING LIMITS ABSOLUTE NONOPERATING LIMITS Figure 2 5 Electrical Specifications 7303 Keyboard Display Card re w STO BUS supply curom so 9 m sorger sro sus onpas Secr S9 eR All segments driven Figure 2 6 STD BUS Electrical Characteristics over
62. me states Figure 4 21 Characteristics of 7303 Subroutine CLEAR DISPLAY Denotes subroutine label Low level active E R Entry return path identifier encircled 4 18 Subroutine CLEAR BOTH E7 Starting Address 101A This subroutine removes all cursor characters from the display and blanks the alphanumeric display by loading the SPACE character in all eight positions Register B is cleared by this subroutine LX JL 4 Register B 9 2 2 Eee lw mcs Register D 7 5 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 22 Register and Memory Allocation for 7303 Subroutine CLEAR BOTH SUBROUTINE SYMBOL PARAMETER COMMENT Program memory Total program memory RAM memory T Execution time NOTE Subroutines used CLR CURSORS E5 Fig 4 17 DISPLAY E1 Fig 4 8 Figure 4 23 Characteristics of 7303 Subroutine CLEAR BOTH Denotes subroutine label Low level active E R Entry return path identifier encircled 4 19 Subroutine DISPLAY 8 E8 Starting Address 104D This subroutine displays the same ASCII character in all eight display positions simultaneously Itis a service routine for implementing the CLEAR DISPLAY su
63. memory RAM memory Execution 8085 27 24N rs count in Figure 4 55 Characteristics of 7303 Subroutine DEBOUNCE DELAY Denotes subroutine label Low level active E R Entry return path identifier encircled 4 42 Demonstration Test Program DISPLAY DEMO Starting Address 1100 This program demonstrates a technique for displaying a long message on a display with a limited number of positions then performs a lamp test It repeats the message PRO LOG 7303 twice turns on all LED segments then repeats See Fig 4 56 for flowchart Requires no initialization except setting the stack pointer NOTE This is an endless loop demonstration program not a subroutine DISPLAY DEMO SET TO RUN BILLBOARD TWICE SAVE MESSAGE START ADDRESS IN RAM RUN FULL BILLBOARD MESSAGE ONCE DECREMENT COUNT TURN ON ALL DISPLAY LEDS SEGMENTS Fig 4 52 CLEAR THE DISPLAY Figure 4 56 Flowchart DISPLAY DEMO Demonstration Test Program for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 43 Demonstration Test Program DISPLAY SELF Displays address data for every location in memory page 10 which is where the software package s display subroutines are stored Shows full hexadecimal address 1000 10FF and hexadecimal data stored at each address then repeats See Fig 4 57 for flowchart
64. n 48 To program the 7303 as load substitute instruction sequences for the single read write instructions normally used These sequences are as follows WRITE Sequence Select AO 0 1 select the 7303 s data or control output ports Write output data to d0 through 47 at the 7303 Set WR 0 Set WR 1 Float the data bus drivers READ Sequence Set A0 0 select the 7303 s input port Set RD 0 Read the input data from 7303 s dO through d7 Set RD 1 Panel Mounting The recommended cutouts for mounting the 7303 in a panelare detailed in Fig A 2 Mount the 7303 in panel stock of up to 0 125 in thickness using the four mounting holes provided on the card The display bezel is recessed approximately 0 375 in below the keycaps and binary LEDs This recessing allows for beveling around the display cutout while the keys and LEDs protrude from the panel front Fig A 3 213 in dia 8 Plcs Figure A 2 Cutout Details of 7303 Panel Mounting dimensions inches A 3 ALPHANUMERIC DISPLAY BINARY LED DISPLAY KEYBOARD 1 8 PANEL PANEL THICKNESS 0 125 in 0 318 cm 950 gt Figure A 3 Profile Mounting of 7303 in User s 1 8 in Panel A 4 USER S MANUAL 2411 Garden Road Monterey California 93940 Telephone 408 372 4593 TWX 910 360 7082 Q 105
65. ning that the keyboard is idle and it will not proceed until itis It then waits until a key is pressed and it decodes the key s value after rejecting noise and switch bounce Once entered the subroutine cannot exit until a valid key closure has occurred The 7303 card is shipped with labels attached to the keys The hexadecimal labels in the 00 to 17 range are the values that will be decoded by READ KEY for the key pressed Fig 3 1 shows label values note that the RESET key is electrically isolated from the other 24 keys and is not read by this subroutine Even if you relabel the keys to nonnumeric functions such as MOTOR START or CLEAR ENTRY you would still use this subroutine to read the keyboard Simply use the decoded value to determine which function to perform see the CALCULATOR demonstration program for an example Upon exit the decoded key value is in both register A forimmediate use and in register B where it can be held momentarily if the accumulator is needed for other functions PARAMETER ENTRY RETURN COMMENT ELEMENT ADDRESS __ ewe ister X J pec 2 NOTES 1 For registers not shown entry contents are not used and remain unaitered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 43 Register and Memory Allocation for 7
66. ntents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 52 Register and Memory Allocation for 7303 Subroutine LONG DELAY SUBROUTINE SYMBOL PARAMETER Stack memory Program memory Total program memory Execution time Figure 4 53 Characteristics of 7303 Subroutine LONG DELAY Denotes subroutine label b Low level active E R Entry return path identifier encircled 4 41 Subroutine DEBOUNCE DELAY E22 Starting Address 10E5 This captive subroutine is used to debounce the key switches producing a delay in the range of 15 25 ms Because the time delay is approximate varying with microprocessortype and clock frequency this subroutine should not be used for other timing applications COMMENT PARAMETER ENTRY RETURN ELEMENT ADDRESS 5 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Register Register Register SUBROUTINE PARAMETER Figure 4 54 Register and Memory Allocation for 7303 Subroutine DEBOUNCE DELAY Stack memory RETURN 6 RETURN SYMBOL UNITS COMMENTS Program memor Total program Bytes
67. nts as shown in Section 3 of this manual Controls all eight cursor on off states Does all hardware manipulation One 8 bit word specifies cursor pattern See DISPLAY DEMO program for application example Contents CURSORS Turns on off any combination of cursors CLR CURSORS Removes cursors not ASCII characters Fig 4 15 Fig 4 17 Fig 4 16 Fig 4 18 SET CURSOR BIT PATTERN TO ALL ZEROS OUTPUT CURSOR BIT PATTERN FOR POSITIONS 0 1 2 3 TO DISPLAY S RIGHT SIDE Fig 4 13 OUTPUT CURSOR BIT PATTERN FOR POSITIONS 4 5 6 7 TO DISPLAY S LEFT SIDE STROBE THE DISPLAY RETURN Fig 4 13 Figure 4 14 Flowchart Cursor Control Module for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 13 Subroutine CURSORS E4 Starting Address 1082 This subroutine allows any combination of cursors to be displayed or removed in one operation using a single 8 bit word to specify the cursor on off pattern NOTE Each display position must have a valid ASCII character present in its character memory before it can display the cursor character The SPACE character satisfies this requirement use the CLEAR DISPLAY or other subroutine to preload valid ASCII characters at least once before using the CURSORS subroutine a Preset register B with the desired cursor pattern Registe
68. ocessor s operating program The 7303 is enabled when a jumper selected combination of address lines AO through A7 is present and when the following control lines are active IORQ IOEXP and either RD or WR The 7303 occupies two consecutive I O addresses regardless of its mapping assignment The is shipped with the control port mapped at D1 and the data port mapped at DO You may retain these addresses or change them by moving the installed jumper wires By using DO and D1 the preferred addresses you can easily adapt standard Pro Log software While the card s port addresses are generally arbitrary they must differ from all other port addresses in the system If they do not differ multiple cards will respond to the same READ instruction resulting in BUS contention 7800 SERIES CPU CARD STD BUS KEYBOARD DISPLAY CARD Figure 2 1 Mapped Operation Local Rack Changing the Port Addresses Locate decoders 03 04 and 5 74 542 next to the STD BUS edge connector Each decoder device hasa dual row of pads that form decoder output select matrices Make one and only one connection to each of the matrices next to 03 and U4 and two connections next to U5 The decoder pad numbering Fig 2 2 shows the numbering of the pads next the decoder chips the 7303 Also shown are the jumpers at X6 Y4 20 Z1 that produce the hexadecimal port address 00 and 01 the selection made when the
69. oduces an approximate time delay which depends upon both microprocessor type and clock frequency and is not recommended for other timing applications PARAMETER PARAMETER RETURN 6 iens ELEMENT ADDRESS RER ssp SE NEN Wes mee s _ oe 3X J NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 50 Register and Memory Allocation for 7303 Subroutine DISPLAY DELAY SUBROUTINE RETURN Stack Bytes memory memor Total program 19 Bytes memory Execution 8085 27 24N 280 27 24 Figure 4 51 Characteristics of 7303 Subroutine DISPLAY DELAY Denotes subroutine label Low level active E R Entry return path identifier encircled S 4 40 Subroutine LONG DELAY E21 Starting Address 10EA This captive subroutine is used by a demonstration program to pause about 625 ms between display opera tions LONG DELAY produces an approximate time delay which varies with microprocessor type and clock frequency and is not recommended for other timing applications PARAMETER ENTRY RETURN 14 COMMENTS ELEMENT ADDRESS w meme Register XX XX XX Register XX lo mood NOTES 1 For registers not shown entry co
70. oftware waits until the operator releases the previous key then waits again until he presses the next key then decodes the next key This technique ensures two important characteristics 1 The system will react one and only one time to one key closure p 2 The system s reaction will take place immediately after the key is closed and not when it is released Figure 3 16 shows a flow diagram of the major events during the READ KEY subroutine READ KEY PREVIOUS KEY STILL CLOSED Figure 3 16 Recommended System Level Keyboard Procedure for the 7303 Note Contact bounce and noise rejection are not shown 3 10 Binary LED Display The 8 bit binary LED display Fig 3 17 is driven directly by output data port DO the same output port that strobes the keyboard and supplies ASCII data to the alphanumeric display When a bit from this port is in the high state the corresponding LED lights up The LED display is cleared by the SYSRESET input Because output data port DO is used in both alphanumeric display and keyboard decoding operations the binary LEDs change when you address either the display or keyboard The binary LEDs are useful in training or in developing programs for the alphanumeric display and keyboard You can also use the binary LEDs to display data that 15 unrelated to the alphanumeric display and keyboard but when you do 1 Refresh the binary LED display after any keyboard scan o
71. plications Use the Hexadecimal ASCII Conversion Module and the Cursor Control Module for more variations on these basic formats Static 8 character ASCII message display Dynamic billboard display for messages of 8 characters or longer See DISPLAY DEMO and CALCULATOR demonstration programs for application examples START AT DISPLAY POSITION 7 Fig 4 38 Fig 4 39 DISPLAY ONE Fig 4 10 CHARACTER FROM MEMORY POSITION LOADED INCREMENT MEMORY POINTER DECREMENT DISPLAY POSITION ADDRESS BILLBOARD READ MESSAGE S START ADDRESS FROM MEMORY 03 SAVE CURRENT START ADDRESS 103D DISPLAY EIGHT CHARACTERS Fig 4 40 Fig 4 41 e Fig 4 40 Fig 4 50 OF MESSAGE 1040 PAUSE APPROX 315 ms 1043 SAVE NEXT CHARACTER OF MESSAGE 1045 RESTORE CURRENT START ADDRESS 1046 END OF TEXT FLAG NEXT NO 1049 INCREMENT CURRENT START ADDRESS Figure 4 37 Flowchart Formatted Messages Module for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 29 Subroutine MESSAGE E14 Starting Address 102B This subroutine displays an 8 character ASCII message from anywhere in memory The job of creating a variable format display can be simplified by manipulating an 8 character text buffer in RAM memory then unconditionally displaying the content of the buffer using MESSA
72. processor card s memory Figures 4 4 and 4 5 map the specific subroutines within memory pages 10 and 11 hexadecimal locations 1000 11FF Figure 4 6 shows the RAM mailbox area within memory page 21 hexadecimal locations 2100 2109 PROM 0 SOCKET 1 SOCKET User s Program PROM 2 SOCKET PROM 3 SOCKET lt lt N RECOMMENDED NOT USED NOTES 1 7801 8085A and 7303 280 processor cards have sockets for 8K ROM PROM sockets labeled 0 PROM 3 These cards are shipped with these sockets empty Also the cards have sockets for 4K RAM and the card is shipped with 1st 1K loaded and 2nd 3rd and 4th 1K sockets empty 2 This map shows the 7303 software loaded in user supplied PROM 2 Ten locations 2100 2109 in the RAM supplied with the processor card are used by the software Page 20 memory addresses 2000 20FF is recommended for the subroutine return address stack Figure 4 3 16K Memory Map 7303 Software Package in 7801 7803 Processor Card Onboard Memory Sockets LABEL MEM DISP LABEL LINE LINE o af d oe e STROBE gt DISP AY 8 gt 54 e gt N CLEAR BOTH gt 1B CLEAR DISPLAY 5E DEMO MESSAGE 63 NINI NINININI N o o TM OO
73. r 7303 Subroutine MESSAGE Characteristics of 7303 Subroutine MESSAGE Register and Memory Allocation for 7303 Subroutine BILLBOARD Characteristics of 7303 Subroutine BILLBOARD Flowchart Key and Switch Data Entry Module for the 7303 Register and Memory Allocation for 7303 Subroutine READ KEY Characteristics of 7303 Subroutine READ KEY Register and Memory Allocation for 7303 Subroutine SCAN Characteristics of 7303 Subroutine Register and Memory Allocation for 7303 Subroutine ROCKER STATUS Figures continued 4 48 4 49 4 50 4 51 4 52 4 53 4 54 4 55 4 56 4 57 4 58 4 59 4 60 5 1 5 2 5 3 5 4 5 5 A 1 A 2 A 3 Characteristics of 7303 Subroutine 4 37 Flowchart Auxiliary Timing Module for the 7303 4 39 Register and Memory Allocation for 7303 Subroutine 5 4 40 Characteristics of 7303 Subroutine DISPLAY DELAY 4 40 Register and Memory Allocation for 7303 Subroutine
74. r B s bits have 1 1 correspondence with the eight displays bit 7 controls the cursor in display position 7 Set the bit 1 to turn the cursor on or bit Oto remove the cursor Upon exit the cursor pattern in register B is unaltered PARAMETER ENTRY RETURN COMMENT ELEMENT ADDRESS emm comment X Pu NM Umm r xx NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 15 Register and Memory Allocation for 7303 Subroutine CURSORS SYMBOL SUBROUTINE PARAMETER Total program memory RAM memory Absolute time varies Figure 4 16 Characteristics of 7303 Subroutine CURSORS Denotes subroutine label Low level active E R Entry return path identifier encircled Subroutine CLR CURSORS E5 Starting Address 1080 This subroutine removes all eight cursors from the alphanumeric display The ASCII characters loaded into the display s ASCII memories before displaying the cursors will reappear when the cursors are removed Register B is cleared by this subroutine PARAMETER ENTRY RETURN 82 COMMENT ELEMENT ADDRESS NOTES 1 For registers not shown entry contents are not
75. r alphanumeric display operation 2 Note that the binary LEDs will show dynamic keyboard scanning activity for as long as a keyboard key is depressed using the subroutine in Section 4 3 Do not output binary display information to the LEDs unless the alphanumeric display s WRITE bit output port D1 bit 3 is first set to the 0 state to inhibit changes in alphanumeric display DATA PORT Low Level Active Figure 3 17 Binary LED Display for the 7303 Rocker Switches Two rocker type toggle switches uncommitted provide general mode selection They connect directly to bits 6 and 7 of input port DO respectively Fig 3 18 Their condition ON or OFF can be read by the program at any time Figure 3 19 shows the logic state returned according to switch position Switch 51 is on the right side of the display and S2 is on the left DATA PORT 5 ON UP LEFT 52 OFF DOWN lt 5 RIGHT 51 OFF DOWN Figure 3 18 Rocker Switches for the 7303 ROCKER SWITCH St FESSES up muro SWITCH POSITION Figure 3 19 Rocker Switch Status for the 7303 3 11 3 12 4 Operating Software Introduction This section contains hardware level subroutine modules with which to operate the display and keyboard It also includes short programs that may help you in testing or repairing the card and that illustrate how th
76. r from memory STROBE Pulses the display s WRITE line e Fig 4 8 Fig 4 10 Fig 4 12 Fig 4 9 Fig 4 11 Fig 4 13 DISPLAY STROBE FETCH ASCII CHARACTER FROM MEMORY OUTPUT WITH PARITY 1 TO DATA PORT OUTPUT DISPLAY POSITION ADDRESS TO CONTROL PORT WITH WRITE BIT 0 SET WRITE 1 SET WRITE 0 1016 RETURN Figure 4 7 Flowchart ASCIl Display Driver Module for the 7303 Denotes subroutine label Low level active E R Entry return path identifier encircled 4 9 Subroutine DISPLAY E1 Starting Address 1001 This subroutine allows any one ASCII character to be displayed in any one of the eight alphanumeric display positions Preset register B with the desired display position Use the 3 bit codes shown in Fig 3 6to specify one of eight positions loading the code in register B s bits 2 1 with bits 3 through 7 0 For example load register B with hexadecimal 06 to specify display position 6 second display from the left Preset the accumulator register A with the desired ASCII character s hexadecimal code as shown in Fig 3 3 The DISPLAY subroutine sets the parity bit bit 7 1 as required by the 7303 s displays so that the character may be brought in from an external interface and displayed without code alteration Upon exit from the subroutine the display position remains unaltered in register B but the ASCII
77. r keyswitch cover at the top and bottom edges with the fingernails of your thumb and index or middle finger then pull directly out and away from the keyboard The clear plastic cover will snap free from the keyswitch exposing the legend area below The legend may then be replaced or covered over by a new legend such as those legends provided by Pro Log or appropriate sized legends provided by the customer Replace the clear plastic cover on the keyswitch WARNING Do not expose the 7303 keyboard to fluxes solvents cleaning solutions or their fumes Keyboard Disassembly To replace an individual key take out the eight slotted screws located underneath the keyboard Holes in the circuit card provide accessto these screws from the card s rear When the screws are removed the keycaps fall free with the cover for easy removal When re assembling the keyboard use a mechanical screw starter Special Parts The following parts Fig 5 5 may not be readily identifiable by markings on the parts themselves Should the user desire to obtain these parts from local sources other than Pro Log the following information is given concerning their manufacture PRO LOG MANUFACTURER S PART PART NUMBER PART NUMBER Alphanumeric 902085 LITRONIX DL 1416 Display Keyboard 902084 K B DENVER MOD 25 01 02 00 Rocker Switch 901359 C amp K COMPONENTS 7810 77 or JBT SUBMINIATURE SWITCH Please note that replacement of part
78. red display position address constant This is explained in detail in Section 3 Use STROBE to adapt the 7303 s display to an application for which the other subroutines in the software package are not suitable It is important to note that other methods for driving the control line may result in unwanted changes in the display unless the programming rules outlined in Section 3 are followed PARAMETER ELEMENT ADDRESS ENTRY J RETURN COMMENT r x T lt NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 12 Register and Memory Allocation for 7303 Subroutine STROBE SUBROUTINE SYMBOL PARAMETER Program memory RAM memory Execution time Total program memory Figure 4 13 Characteristics of 7303 Subroutine STROBE Denotes subroutine label Low level active E R Entry return path identifier encircled 4 12 Cursor Control Module This program module controls the on off state of the cursor characters The module s subroutines handle all of the hardware requirements of the cursors The full 8 position cursor on off pattern is specified by a single 8 bit pattern preset in a register mailbox Fig 4 14 for flowchart The subroutines are based on the 7303 programming requireme
79. rical Specifications 7303 Keyboard Display _ 2 5 2 6 STD BUS Electrical Characteristics over Recommended Operating 5 2 5 2 7 Edge Connector Pins for the 7303 cci PPS 2 6 2 8 Switching Characteristics over Recommended Operating Limits 7303 Card 2 6 2 9 7303 Alphanumeric Display Timing Waveforms 1 2 7 2 10 gt Mechanical Characteristics over Recommended Operating Limits 7303 2 7 3 1 7303 Kevboard DISDlay ene 3 1 3 2 Alphanumeric Display Programming Model for the 7303 3 2 3 3 Hexadecimal Values of ASCII Characters 3 3 3 4 Data Port Bit Assignments for Character Mode 7303 Card _ _ Met 3 4 3 5 Control Port Bit Assignments for Character Mode 7303 3 4 3 6 Display Position Addressing 7303 3 4 3 7 Flow Diagram of Character Mode Events for the 7303 3 5 3 8 Character Mode Timing Waveforms 7303 3 5 3 9 Data Port Bit Assignments for Cursor Mode 7303 3 6 3 10 Control Port Bit Assignments for Cursor Mode 7303 _
80. ry location in ROM or RAM where the ASCII character to be displayed is located Figure 3 3 shows the ASCII character set that can be displayed and the range of codes that must be preloaded in memory before MEM DISP can be used successfully Use the MEM ASCII subroutine in advance to translate raw binary memory data into ASCII if necessary Upon exit from the subroutine the display position in register B and the memory address in pair H L remain unaltered PARAMETER ELEMENT ADDRESS ENTRY E2 RETURN COMMENT 1 H L points to ASCII Register B Dipeyposon 00 00 x x gt Register r x O NOTES 1 For registers not shown entry contents are not used and remain unaltered at exit 2 means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 10 Register and Memory Allocation for 7303 Subroutine MEM DISP RETURN E Max SYMBOL es _ SUBROUTINE Time states Figure 4 11 Characteristics of 7303 Subroutine MEM DISP Execution time 8085 Z80 Denotes subroutine label Low level active E R Entry return path identifier encircled Subroutine STROBE E3 Starting Address 1007 This captive subroutine is used by other subroutines to drive the 7303 display s write line WR low high low while maintaining the desi
81. s by the customer may VOID THE PRO LOG WARRANTY Pro Log assumes no responsibility for the continued availability of these parts Figure 5 5 Special Parts for 7303 Return for Repair Procedures Domestic Customers 1 Call our factory direct at 408 372 4593 and ask for CUSTOMER SERVICE 2 Explain the problem and we may be able to solve it on the phone If not we will give you a Customer Return Order CRO number Mark the CRO number on the shipping label packing slip and other paperwork accompanying the return We cannot accept returns without a CRO 3 Please be sure to enclose a packing slip with CRO number serial number of the equipment if applicable reason for return and the name and telephone number of the person we should contact preferably the user if we have any further questions 4 Package the equipment in a solid cardboard box secured with packing material CAUTION Loose MOS integrated circuits or any product containing CMOS integrated circuits must be protected from electrostatic discharge during shipment Use conductive foam pads or conductive plastic bags and never place MOS or CMOS circuitry in contact with Styrofoam materials 5 Ship prepaid and insured to Pro Log Corporation 2411 Garden Road Monterey California 93940 Reference International Customers Equipment repair is handled by your local Pro Log Distributor If you need to contact Pro Log the factory can be
82. shown in Fig 3 15 1 1 SCAN KEYBOARD ACCEPT DETECT REJECT DETECT KEY K AS EY KEY amp CLOSURE NOISE CLOSURE DECODE DELAY DELAY SAVE KEY COORDINATES TIME DELAY 15ms FOR SWITCH BOUNCE KEY COORDINATES UNCHANGED 5 DECODE THE KEY 1 Example of Program Flow 5 GND Voltage Waveform at Row in Key Matrix Figure 3 15 Programming Key Bounce and Noise Rejection for the 7303 Note This figure illustrates the technique of read delay re read compare which allows the program to differentiate between noise and a legitimate key closure and to pause while the key contacts settle In most instances it is desirable for the key to be effective when pressed not when released Because of the speed of microprocessors there is also a real possibility that the system might react more than once to the same key closure before the operator can remove his finger with practice an operator can deliberately close and release a small pushbutton in about 50ms however this represents an absolute minimum and the program should not make assumptions about the operator s characteristics The READ KEY subroutine in Section 4 shows how to combine the key decode process with procedural controls to produce reliable error free keyboard entries The basic assumption in the READ KEY routine is that when the subroutine is entered the operator s finger is J still on the key that was just decoded The s
83. switch data entry module and by the demon stration and test programs in the 7303 s software package See Fig 4 49 for flowchart The subroutines in this module are designed to provide satisfactory operation with a wide variety of micro processor types including 8080 8085A Z80 and NSC 800 all presumed to operate at the maximum clock frequency Accordingly these subroutines are not capable of generating accurate timing and should not be used in any application requiring accurate timing They are intended only to reduce the processor s execution rate to maintain human readability of the display in the demonstration programs and to provide switch debounce time for the 7303 s keyboard Approximate time delays used for display readability and switch debouncing Captive subroutines used by other 7303 program modules only Fig 4 50 DISPLAY DELAY LOAD DELAY LOOP COUNT 315 ms Fig 4 52 Fig 4 54 DEBOUNCE DELAY LOAD DELAY LOOP COUNT 20 ms LONG DELAY LOAD DELAY LOOP COUNT 625 ms DECREMENT LOOP COUNTER Figure 4 49 Flowchart Auxiliary Timing Module for the 7303 Denotes subroutine label E Low level active E R Entry return path identifier encircled 4 39 Subroutine DISPLAY DELAY E20 Starting Address 10 This captive subroutine is used by BILLBOARD to pause about 315 ms between display shift operations DISPLAY DELAY pr
84. the right of the character is a two digit hexadecimal number that uniquely identifies the character Forthe 64 characters that the 7303 can display the codes range from through DF For example the hexadecimal code for the SPACE character is AO for the number 3 it is B3 and for the letter M it is CD The use of hexadecimal codes not listed in the figure results in either a blanked display position if bit 7 of the code is 1 or undefined cursor activity if bit 7 is O NOTE on Port Addresses Section 2 shows how you can remap the 7303 s address decoders to allow the card to occupy any two consecutive port addresses in the 00 FF hexadecimal range The 7303 is shipped with port addresses DO and D1 selected by jumper wires and all of the explanation of the card s operation and programming in this section assumes that these addresses remain connected If you elect to remap the 7303 regard the onboard ports as the Data Port and the Control Port ports DO and 01 respectively Output Port Bit Assignments for Character Mode Data Port Output port DO selects character mode bit 7 1 and specifies one of the 64 ASCII characters to be displayed in bits 0 6 Figure 3 4 shows the bit assignments in the data port for character mode DATA BUS DESCRIPTION 1 Character mode 7 bit ASCII character _ __ ow NEC own
85. two separate operations Setting clearing the left half or right half cursor memories requires four steps in the program 1 Output the desired states of four of the cursors to the data port Fig 3 9 2 Output the left right select bit with write 0 to the control port Fig 3 10 3 Repeat step 2 but set the write bit 1 4 Repeat step 2 write bit returns to zero protecting the display These steps are summarized as a flow diagram and resulting waveforms in Figs 3 12 and 3 13 below STEP 1 STEP 4 DISPLAY CURSORS WRITE 4 CURSOR TATES T DATA PORT o o WRITE CONTROL PORT S R s EFT RIG DISPLAYS AND WR 0 WRITE CONTROL PORT SELECTING LEFT RIG DISPLAYS AND WR 1 WRITE CONTROL PORT SELECTING LEFT RIGHT DISPLAYS AND WR 0 PROGRAM STEP LEFT HALF wee Program Values for Steps 2 3 4 Figure 3 12 Flow Diagram of Cursor Mode Events for the 7303 STEP 1 DATA PORT LEFT 1 A RIGHT 0 CONTROL PORT b0 b3 4 BIT CURSOR PATTERN VALID I STEP 2 STEP 3 STEP 4 Sar EE kp pL NN A2 L R SELECT VALID 1 I ACTIVE WRITE WR 0 Z WR 0 Figure 3 13 Cursor Mode Timing Wavetforms for the 7303 Note Waveforms illustrate program values WR is low active in hardware Keyboard The keyboard consists of a RESET key and 24 program definable keys
86. ue 5 bit hexadecimal number range 00 17 for each of 24 uncommitted keys use table lookup and change key labels to perform any numeric or nonnumeric program function Performs all procedures including switch debounce noise rejection activate on depression ignore key release e READ KEY reads single key only use other subroutines in module for multiple key closures and different procedures ROCKER STATUS moves on off states of switches to processor status flags for conditional jumps See CALCULATOR and KEY TEST for application examples E R Denotes subroutine label Low level active Entry return path identifier encircled ROTATE A SINGLE BIT ACROSS KEY COLUMNS SAVE ROW AND COLUMN COORDINATES COMPARE SAVED AND PRESENT COORDINATES TO KEY VALUE qu 11A7 STROBE ALL KEY COLUMNS SIMULTANEOUSLY KEY ROWS SIMULTANEOUSLY 11 Fig 4 45 SET 2 FLAG IF Ki Fig 4 47 READ ROCKER SWITCH STATUS SET CARRY IS S2 CLOSED SET SIGN FLAG AND CLEAR Z FLAG IF S1 1 CLOSED Figure 4 42 Flowchart Key and Switch Data Entry Module for the 7303 4 33 Subroutine READ KEY E16 Starting Address 1155 This subroutine is recommended for most keyboard read decode operations regardless of the functional assignments associated with the keys and their labels READ KEY begins by determi
87. used and remain unaltered at exit 2 XX means no specific data required at entry but entry contents will be lost 3 means contents are unknown or meaningless Figure 4 17 Register and Memory Allocation for 7303 Subroutine CLR CURSORS _ SUBROUTINE PARAMETER UNITS COMMENT Subroutine STROBE used Fig 4 12 Figure 4 18 Characteristics of 7303 Subroutine CLR CURSORS Denotes subroutine label Low level active E R Entry return path identifier encircled lt Display Service Routines Module This program module provides hardware level service routines for clearing and testing the 73035 alpha numeric display See Fig 4 19 for flowchart The subroutines in this module are used to initialize the 7303 after power on to clearthe display when desired and to provide general service functions needed in incoming inspection field testing and repair of the 7303 card CLEAR DISPLAY removes ASCII characters only CLEAR BOTH removes both ASCII and cursor characters DISPLAY 8 allows the testing of each ASCII character in each display it finds bad latches decoders drivers and LED segments 5 allows the testing of all alphanumeric and binary LED segments See DISPLAY TEST program for application example Fig 4 20 Fig 4 22 Fig 4 24 Fig 4 26 Fig 4 21 Fig 4 23 Fig 4 25 Fig 4 27 CLEAR DIS
88. ware package can be linked together Monitor the execution of these programs with an M800 system analyzer and other test equipment to facilitate repair of the 7303 or use them as programming examples or for educational purposes PROGRAM NAME FUNCTION DISPLAY DEMO Uses BILLBOARD and LAMP TEST subroutines Illustrates a technique for displaying a long message on a display witha limited number of positions Repeats the message PRO LOG 7303 twice tests LED segments then repeats DISPLAY SELF Displays address data for the 256 memory bytes in memory page 10 which is where the display subroutines are stored Displays information on the program coding forms in this section then repeats Uses DISP 2 IN C CALCULATOR Illustrates how READ KEY and MESSAGE can work together with memory manipulation to create calculator style data entry with keystrokes shifted from right to left across the display DISPLAY TEST Uses DISPLAY 8 to step the 7303 s display through the entire ASCII character set with each character displayed in sequence in all eight display positions KEY TEST Uses READ KEY and DISP 2 IN C to display the 2 digit hex value of each key when the key is pressed Allows the operator to test each key or to monitor the decode and display pro cesses on the M800 system analyzer Denotes subroutine labels Figure 4 1 Index of Demonstration and Test Programs for the 7303 Note Because these progr
89. with and use microprocessors and the STD BUS products You may find the following Pro Log documents useful in your work Microprocessor User s Guide and the Series 7000 STD BUS Technical Manual If you would like a copy of these documents please write to us on your company letterhead Contents Page OF WOE u u u lu uu uttter te DUAE ii t Ede H Section 1 Purpose and Features 1 1 Section 2 Installation and Specifications 2 1 I O Mapped Card Addressing ttt ttt r r r ar r r aa a ttt ttt 2 1 Changing the Port Addresses oret oec t dicio ae totas Sua sd a 2 2 Alternatives to Soldered Wire Jumpers 2 5 Electrical and Environmental Specifications mor Mechanical Specifications ee eae 2 7 Section 3 Operation and 3 1 E 3 2 Output Port Bit Assignments for Character Mode 2222 22 22 3 4 CUES OR m u a ma TETUER 3 6 Output Port Bit Assignments for Cursor Mode 2 2 3 6 Keyboard CRIME x
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