CX1-BAND User's Manual
Contents
1. 33 Ordering Informati n PPP 37 4 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller About this Manual This manual describes the technical aspects of the CX1 BAND required for installation and system integration It is intended for the experienced user only Edition History Document Contents Changes Author Date Text 4 2443 1 1 Edition User Manual CX1 BAND gn 2001 03 30 cx1mle wpd English 2 Corrected wrong I O port offsets gn 2001 05 21 Added info on which port the 826251 are connected to the SJA1000 Nomenclature Signal names used herein with an attached designate active low lines Trade Marks Some terms used herein are property of their respective owners e g i960 RP Intel CompaciPC amp PICMG Windows 98 Windows NT Windows 2000 Microsoft EKF does not claim this list to be complete Legal Exclaimer Liability Exclusion This manual has been edited as carefully as possible We apologize for any potential mistake Information provided herein is designated exclusively to the proficient user system integrator engineer EKF can accept no responsibility for any damage caused by the use of this manual 5 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM2. 13 Configuration Jumper Field JCNF Initialization Mode Setting Options 15 Configuration Jumper Field JCNF BIST Setting Options 16 Configuration Jumper Field JCNF CPCI Reset Setting Options 16 Flash Device Read And Write Wait State Settings 17 DRAM Initialization Parameters 18 VO Device Offset Definitions 20 CAN Controller SJA1000 Register Offset Definitions 20 UART Data Transmission Bit Rates 23 UART 16C550 Register Offset Definitions 24 Read And Write Wait State 5 5 25 CompactPCI Connector J2 Pin Assignment 26 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Diagnostics Display Information 28 Address Translation Unit Configuration Header Format 31 ATU Extended PCI Configuration Header Format 31 CompactPCI Connector 11 Pin Assignment
3. J2 oua s be i E ER ER IR entero d erc E 26 mnl c r 27 Diagnostics Display 28 CompactPCI Interface 29 PCI PPM 29 Address Translation Unit ATU 29 Systemi t DEI SEDI T Sasra sues eh eee os EY Eoo eee ecd 33 Technical Specifications d uS ta 35 Ordering Information e E 37 Figures Block Diagrami EOS S ea dos 7 installing board into the system rack 9 Removing board from the system rack 10 Component Assembly Drawing 11 Factory Default ION t UR Edd oir dh ed A Eb exes 11 Clock Selection Jumper JCNF 5 Setting Options 14 J mper Field aec EEE RR He eget 15 General C Addressing Byte Format 19 Serial EEPROM 24C32 Addressing Byte Format 19 Male D Sub 9 CAN Port Connectors CPT Y CP2 22 RS 232 Port Connect r SPI aos cae 24 Tables i960 RP Related Documentation
4. CX1 BAND CompactPCl intelligent Dual CAN2 0B Fieldbus Controller User s Manual Document No 2443 Edition 2 Released in May 2001 Valid for Rev 1 of the board CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Contents Contents 2 arrra EEEE rss 2 gt ee 3 Tables ae 3 Abo t this Sidi s versus eee we nodes tes bee a i ingre Oe 5 Edition Caec kso qr aoe oe moh ca Mid ee oe 5 Nomenclature sx as Soca a ope ea ea eg ace E un Ce ace a a Be Saw SS 5 Trade Marks hehe hace hd ee ee eed 5 Legal Exclaimer Liability Exclusion 5 Introduction and Overview 6 itera SAEI Te INR E DET TI E esas E T T E D LIII TET 7 Handling Information ore ee d ac a om Ex rds 8 Precautiohs s 8 Guidelines to EMC Protection 8 laci welvoe A C 9 Removing Boards n 10 Connectors Jumper Fields Factory Defaults 11 OMINCGLOMS 11 Jumper Field Factory Defaults
5. Initialization JCNF 1 JCNF 2 CompactPCI Interface i960RP core DTN Modo 0 accepts transactions transactions heldinreset in reset Mode 1 removed retries all config transactions held in reset Mode 2 removed accepts transactions initializes Mode 3 removed removed retries all config transactions initializes Not useful on the CX1 BAND ibe EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC intelligent Dual CAN2 0B Fieldbus Controller Mode 0 allows a host processor to configure the i960 RP peripherals while the i960 core processor is held in reset The host processor configures the PCI to PCI bridge by assigning bus numbers allocating PCI address space and assigning IRQ numbers The memory controller and ATU can also be initialized by the host processor Program code for the i960 core processor may be downloaded into local DRAM or Flash EEPROM by the host processor The host processor then clears the i960 reset signal by clearing the Core Processor Reset bit in the Extended Bridge Control Register EBCR bit 1 This deasserts the internal reset signal on the i960 core processor and the processor begins its initialization process Mode 2 allows configuration cycles on the PCI to PCI bridge at any time and allows the i960 core processor to initialize after
6. rack before taking out the board of the packaging by touching the packaging and metallic parts of the rack at the same time or better by wearing a ground strap Please keep the original packaging for the case of return Notice that installing or removing of boards or other system components may done only by authorized persons Guidelines to EMC Protection To fulfill the CE specifications with regard to EMC take notice of the following guidelines Installation and operation only in EMC systems Close unused system slots with dummy panels Close unused front elements e g RS 232 interfaces with metallic caps Use shielded cables only Use ferrites to prevent electromagnetic interference EMI Protect sensible interfaces e g Cheapernet with plastic caps 8 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Installing boards Switch off the main power supply Touch the system rack to guarantee electrostatic discharge Move board carefully along the guide rails in the chosen slot of the rack Caution is given especially to the devices mounted on the backside of the circuit board Press the CompactPCI connectors of the board into the backplane receptacles pushing the ejectors in the front panel together see illustra
7. 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller translated from a 32 bit PCI address to a 32 bit local address For that the incoming PCI Address is first bitwise ANDed with the bitwise inverse of the Limit Register This result is bitwise ORed with the ATU Translate Value Register The result is the 32 bit local address Local Address PCI Address amp Limit Register Translate Value Register In addition the ATU provides address detection and translation for i960 core processor initiated cycles targeted to one of the PCI buses The ATU supports two different translation modes Address Translation Windows Direct Addressing Window The address translation windows are located from 0x8000 0000 to 0x9001 FFFF within the 32 bit local address space of 1960 processor This range consists of two 128 Mbyte memory windows and two 64 Kbyte windows for the primary and secondary ATU respectively Each memory window is divided into two areas 64 Mbyte for 32 bit PCI address cycles and 64 Mbyte for PCI double address cycles DAC The type of the PCI transfer is dependent from the area that is hit within the address translation window by the i960 core The translation mechanism used is very similar to the algorithm for the inbound transactions descript above For memory and DAC accesses it is PCI Address Local Address amp OxO3FF FFFF Memo
8. 11 SB RP Processor a Aor he be bera ere PX NE E E Es 212 General Features eee eee ee huh xr aha 12 Additional Documentation 13 Clock and Reset Generation 14 Clock Generation 14 Power On and Manual lt 14 Hardware Watchdog 15 i960 RP Initialization Modes Local Memory Devices 17 Flash EEPROM 2 17 Dynamic Random Access Memory DRAM 18 FC Interface oue ek aee iadair RU RP IAA A EEA 19 Serial EEPROM 24032 19 Devices 2 ss 20 CAN Interfaces 20 Serial Interface 23 Wait States Settings ot ade ooo ee ba eg fo ee Papx dedu 25 NN EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC intelligent Dual CAN2 0B Fieldbus Controller 3 2 eC Oe ee sue O Int rfaces
9. A max 4 12 V 596 0 mA max 4 12 V 5 96 0 mA max WB Temperature Humidity X Operating temperature 0 70 C Humidity 5 90 non condensing Technical specifications are subject to change Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Ordering Information Ordering Information BAND CX1 1 BAND 3U intelligent dual CAN 2 0B host adapter 2 x CAN controller SJA1000 optically isolated CPU i960RP 33MHz 8MB DRAM 4MB Flash ROM RS 232 CompactPCI Interface 32 Bit 132 Mbit s CR9 1 ADAPT Front panel expansion adapter for 3U board mounting in 6U racks suitable for all EKF 4HP boards mounting kit includes all required parts EG EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de
10. Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Introduction and Overview The CX1 BAND is a CompactPCl based intelligent fieldbus controller with two independent CAN Controller Area Network ports The 3U Eurocard is provided with the i960RP D Intel microprocessor a powerful 32 bit machine giving freedom for any local data sampling and preprocessing With its 8MB DRAM and AMB Flash the CX1 BAND offers a generous amount of memory Two SJA1000 Philips act as CAN controllers incorporating all common protocol levels up to the latest version 2 0B Both physical transceivers PCA82C251 are optically isolated between themselves and the remaining circuitry Each CAN port has its own connector 9 pole D Sub wiring according CiA Draft 102 An additional UART RS232 can be used as a general communications port hence simplifying development and testing of on board firmware and allowing stand alone operation of the CX1 BAND The CAN connectors CP1 and CP2 protrude through the boards front panel Two push buttons for reset and NMI are indent mounted in order to prevent from being used inadvertently A dual LED display reflects the board status The serial port SP1 is available from a dual row 2x5 pin PCB receptacle When using a flat microribbon cable with a 10 pole IDC header on the one end
11. Reserved Max Latency Interrupt Pin Interrupt Line The next table shows the i960 RP specific registers of the ATU configuration space ATU Extended PCI Configuration Header Format Primary Outbound I O Window Value Register POIOWVR Primary Outbound DAC Window Value Register PODWVR ETE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompactPCI Intelligent Dual CAN2 0B Fieldbus Controller ATU Extended PCI Configuration Register Space Address Offset Primary Outbound Upper 64 bit DAC Register POUDR Secondary ATU Status Register Secondary Outbound DAC Window Value Register SODWVR Secondary Outbound Memory Window Value Register SOMWVR Nom EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller System Connector J1 The CompactPCI specification defines the usage of shielded 2 mm pitch 5 row connectors on CompactPCI boards according IEC 917 and IEC 1076 4 101 The 32 bit PCI interface is implemented via the J1 connector while the 64 bit option requires the connector J2 Since the CX1 BAND has a 32 bit CompactPCI interface the J2 connector is not necessary Alternatively the J2 connector can be used to rea
12. and a 9 pole D Sub connector on the other the result is a PC compatible RS232 serial interface port EKF Elektronik GmbH Philipp Rei CX1 BAND Dual CAN Controller 6 s Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Block Diagram CP1 N SO TL BB DIS q o S SP RS 232 TTL S CiA MUX DRAFT Modules 102 Front Banal EKF 2001 PCI 32 bit CX1 BAND Block Diagram i960RP D Q S o PCI Bridge CPU DRAM FLASH Block Diagram ie EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompactPCI Intelligent Dual CAN2 0B Fieldbus Controller Handling Information Precautions This CompactPCI board contains electrostatic sensitive devices The board should therefore remain in its original EKF packaging until it is used The antistatic coated film and box provide double protection against electromagnetic discharging as well as against dust corrosion and mechanical damaging Be sure to equalize the electrical potential of the board and the CompactPCI
13. master the slave acknowledges the transfer General 1 C Addressing Byte Format On write operations R W 0 the master may send then further data bytes to the slave until the master generates a stop condition Each byte transferred is acknowledged by the recipient Read operations are working in the same way except that R W 1 and that the data flow is reversed Serial EEPROM 24C32 The CX1 BAND offers a serial EEPROM 24C32 with a capacity of 4 Kbytes This device can be used e g to permanently store important parameters that should be non volatile even if the power disappears It is accessible as slave device via the 1 C bus Write accesses to the memory array of the serial EEPROM are possible any time because the hardware write protection feature of the 24C32 is not enabled on CX1 BAND Serial EEPROM 24C32 Addressing Byte Format The above figure shows the I C bus device addressing byte that must be written to the serial EEPROM in order to read RW 1 DeviceAddr 0xA1 or write R W 0 DeviceAddr O0xA0 data from or to it the 3 external address lines offered by the 24C32 are hard wired to GND on the CX1 BAND Read and write accesses with the IC bus maximum speed of 400 Kbit s are supported by the device Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC intelligent Dua
14. rate errors in dependency of the clock in use UART Data Transmission Bit Rates Clock Baud Divisor iDiv Error 14745600 75 12288 0 12288 0 00 14745600 110 8378 2 8378 0 00 14745600 150 6144 0 6144 0 00 14745600 300 3072 0 3072 0 00 14745600 600 15360 1536 0 00 14745600 1200 768 0 768 0 00 14745600 1800 512 0 512 0 00 14745600 2400 384 0 384 0 00 14745600 4800 192 0 192 0 00 14745600 7200 128 0 128 0 00 14745600 9600 960 96 0 00 14745600 14400 64 0 64 0 00 14745600 19200 48 0 48 0 00 14745600 38400 24 0 24 0 00 14745600 56000 16 5 16 2 78 14745600 57600 16 0 16 0 00 14745600 115200 8 0 8 0 00 14745600 128000 7 2 7 2 78 14745600 230400 4 4 0 00 Bel 2 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Clock Baud Divisor iDiv Error 14745600 460800 2 2 0 00 14745600 921600 1 1 0 00 The UART is connected to bank 1 of the i960 RP s memory controller See table O Device Offset Definitions above for the address of the serial port controller within the i960 RP s memory map The following table shows the addressing of the registers of the UART relative to its base address UART 16C550 Register Offset Definitions Base Address Read Access Offset i i Line Status Register LSR not allowed Scratch Register SCR Scratc
15. to the processor via 8 maskable XINTO XINT7 and one non maskable interrupt inputs Four bits within the PCI interrupt routing select register PIRSR decide for each XINTZ pin whether the interrupt is lead to the 1960 core or to the CompactPCI interface The CX1 BAND owns the following peripheral interrupt devices 1 the CAN controllers SJA1000 and the UART XINTO 2 the NMI push button NMI non maskable For a description of the CAN controller respective the serial controller interrupts refer to the corresponding section of this manual The NMI push button is a nice tool when debugging software on the CX1 BAND A debugger can enter the control of a running program when pushing the NMI push button Because this interrupt can not be masked by a program getting program control is always possible The interrupt request of the NMI button is active while the button is pushed It can be identified by checking the NMI interrupt status register NISR bit 8 OF EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Diagnostics Display There are two LEDs on the CX1 BAND indicating the current state of the board These LEDs are mounted in the front panel and having to following meaning Diagnostics Display Information build i
16. 28F016SV Intel 28 16055 Intel These devices distinguish in access times and programming algorithms Programming tools currently running on LINUX or WinXX are offered by EKF and are available on request The following table shows the necessary initializations in the read and write wait state registers MBRWSO MBWWSO of the i960 RP memory controller dependent on the devices in use All timing parameters are based on a clock frequency of 33 33 MHz corresponding to 30 ns cycle time Flash Device Read And Write Wait State Settings Flash Device 28F160S5 0x00000220 0x00000220 EE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompactPCI Intelligent Dual CAN2 0B Fieldbus Controller Dynamic Random Access Memory DRAM The CX1 BAND offers a working memory space of 8 Mbyte The memory is organized in two banks of non interleaved DRAM each 4 Mbyte in size The data path width is 32 bit without parity Similar to the Flash EEPROMs different types of DRAM devices are in use Possible types are Fast Page Mode FPM DRAMs Extended Data Out EDO DRAMs with an access time of at least 70 ns The following table shows typical values to program to the i960 RP memory controller to setup the DRAM interface All timing parameters are based on a clock frequency of 33 33 MHz correspondi
17. cifications System Processor i960 RP and local Devices CPU Core gt Based on the i960JF high performance core gt Highest throughput at low power consumption 33 MHz 3 3 V gt Integrated 4 KB instruction and 2 KB data cache gt 1 KB internal data RAM Memory gt 8 MB FPM or EDO DRAM gt 4 MB Flash ROM 32 Bit on board programmable gt Up to 4 KB burst transfers gt 32 Kbit serial EEPROM CAN2 0B interfaces on male D Sub 9 front panel connectors CP1 CP2 max 1 MBit s connected also to CompactPCI J2 connector gt RS 232 serial interface on 10 pin header max 230 kBit s connected also to CompactPCI J2 connector TTL signals J Diagnostics Debugging gt LED ERR i960RP initializing fault gt LED LOC access to local peripherals or memory gt Reset push button switch gt NMI push button switch software abort function CompactPCI Bus 3 U height 20 32 mm width 32 Bit PCI interface 33 MHz max data transfer rate 132 MB s PCI 64 Bit dual address cycles Up to 64 byte PCI bursts 5 Complies to CompactPCI Specification revision 2 1 eee 285 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC intelligent Dual CAN2 0B Fieldbus Controller WB Power Consumption 4 5 V 5 1 0 A max 3 3V 0 3V 1 1
18. ctPCI rack with a system controller and possibly other boards In this case always the bus clock signal should be used as clock source 0 5 removed To support a single stand alone operation without system controller the CX1 BAND provides an on board 33 MHz oscillator that generates the necessary clock When setting the jumper JCFN 5 the oscillators output is connected to the clock input of the board CAUTION Note that in this case the clock signal also occurs on the clock pin of the CompactPCI connector J1 Pin D6 This will lead to clock signal crashing on the bus if more than one board drives the clock The clock signal is distributed on the CX1 BAND via a dedicated clock buffer to provide a low skew well conditioned signal as required by the PCI specification Power On and Manual Reset There are a lot of reasons which trigger a reset on the CX1 BAND Power On switching on the power supply Vics drops below 4 65V power failed drops below 3 0V power failed Pushing the RESET Push Button in the front panel Triggering the CompactPCI reset signal J1 Pin C5 JCNF 4 on Reaching time out of the hardware watchdog Software reset caused by the i960 RP processor p YS eww a Em EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC intell
19. figuration space that is accessible through the CompactPCI bus or the i960 core The DMA Controller allows low latency high throughput data transfers between PCI bus agents and i960 RP local memory Three separate DMA channels accommodate data transfers two for the CompactPCI bus one for the secondary PCI bus not usable on the CX1 BAND The DMA Controller supports chaining and unaligned data transfers The Messaging Unit MU provides data transfer between the PCI system and the i960 It uses interrupts to notify each system when new data arrives The MU has four messaging mechanisms Message Registers Doorbell Registers Circular Queues and Index Registers Each allows a host processor or external PCI device and the i960 RP to communicate through message passing and interrupt generation The MU makes it easy to realize the Intelligent I O Interface 1 The Memory Controller allows direct control of the external memory on the CX1 BAND including DRAM and Flash EEPROM It features programmable chip selects and a wait state Em EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller generator External memory can be configured as PCI addressable memory or private i960 RP memory Since there is no need for it the secondary PCI interface of the
20. gh speed accesses from the CompactPCI interface to the local bus devices like Flash EEPROM or DRAM Normally a BIOS running on a host system detects these PCI devices at boot time Address Translation Unit ATU The Address Translation Unit ATU provides an interface between the CompactPCI bus and the i960 local bus It consists of two parts the primary ATU for accesses from CompactPCI and the secondary ATU for accesses from the secondary PCI bus not used on the CX1 BAND Data transfers initiated by any PCI bus master to a local bus device are called inbound transactions If the i960 core starts a data access to any PCI bus slave this is called an outbound transfer The ATU fulfils both address filtering and address translation For inbound transactions the ATU uses three registers Inbound ATU Base Register Inbound ATU Limit Register Inbound ATU Translate Value Register A PCI address is detected as an inbound transaction by the ATU if PCI Address amp Limit Register Base Register The incoming 32 bit PCI Address is bitwise ANDed with the Limit Register When the result matches the Base Register the PCI Address is detected as being within the inbound translation window This opens a PCI address window from Base Register to Base Register Limit Register Once the transaction is claimed the address must be Be EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax
21. h Register SCR The next figure shows the pin assignment of the 10 pin header SP1 providing the serial RS 232 port RS 232 Port Connector SP1 RXD S d RTS TXD 5 6 CTS RTS ee GND 9 10 Note This signal is pulled up by a 2 4kQ resistor to 5V EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Wait States Settings In order to get a proper function of the CAN controllers and the UART the following values should be programmed to the wait state registers of memory bank 1 Burst accesses to these devices are not allowed I O Devices Read And Write Wait State Settings 0x00000302 0x00000302 Interrupts Both the CAN controllers and the UART are able to request i960 RP core interrupts On the CX1 BAND all these devices share the common interrupt request XINTO An IRQ can be identified by checking the interrupt status register of either the CAN controllers or the UART in the interrupt service routine The request is released by accessing the corresponding register of the device that caused the interrupt e g reading the interrupt status register of a CAN controller or reading an incoming character from the RBR of the UART See the data sheets of the SJA1000 the 16C550 and the i960 RP manual for detailed description of i
22. i960 RP is unconnected on the CX1 BAND Therefore it whether makes sense to use the PCI to PCI Bridge unit nor the secondary ATU Additional Documentation A detailed description of these and other features including the programming of the i960 RP processor could be find in the documentation listed below Electronic information can be obtained via http www intel com i960 RP Related Documentation Document Title Order Number i960 Rx Microprocessor Developer s Manual Intel Order 272736 i9609 Rx I O Processor Specification Update Intel Order 272918 i960 RP RD Processor at 3 3 Volts data sheet Intel Order 273001 i960 Jx Microprocessor User s Guide Intel Order 272483 REGE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Clock and Reset Generation Clock Generation The CX1 BAND is clocked by a single 33 MHz signal This master clock controls the entire timing of the i960 RP The main clock input is fed by one of two possible sources chosen by jumper 5 of the 5x2 configuration jumper JCNF near the CPU on the CX1 BAND Clock Selection Jumper JCNF 5 Setting Options Clock Source JCNF 5 CompactPCI Bus Clock Signal J1 Pin 06 33 MHz Oscillator on the CX1 BAND Normally the CX1 BAND will be integrated in a Compa
23. igent Dual CAN2 0B Fieldbus Controller The first 6 sources will reset all devices on the CX1 BAND to a known state An integrated power supervisor generates a clean reset signal with a minimum length of 140 ms even if the voltages haven t stabilized at power on The signal is fed to the i960 RP the Flash 5 the two CAN controllers SJA1000 and the serial controller 16C550 The processor can reset all the SJA1000s and the 16C550 by triggering the local bus reset signal in the Extended Bridge Control Register EBCR bit 5 Hardware Watchdog The CX1 BAND is equipped with a hardware watchdog The watchdog is disabled after a hardware reset It is activated by toggling the general purpose output OUT1 of the 16C550 This is done by changing bit 2 in the Modem Control Register MCR of the UART see section Serial Controller 16C550 for details of the UART s registers If the processor once touched MCR 2 the watchdog is armed and must be triggered at least every 1000 ms A hardware reset will occur after a maximum time of 1 6 sec after the last watchdog trigger pulse i960 RP Initialization Modes The behavior of the i960 RP after reset is controlled by the configuration selection jumper field JCNF The processor supports four initialization modes 0 to 3 where mode 1 makes no sense the CX1 BAND QOQOLIOKO BOO OO 4 5 Jumper Field JCNF Configuration Jumper Field JCNF Initialization Mode Setting Options
24. l CAN2 0B Fieldbus Controller Devices The CX1 BAND contains two CAN2 0B compatible interfaces and one serial RS 232 interface These devices are connected to bank 1 of the i960 RP s memory controller The following table shows the addressing of the devices relative to the base address of memory bank 1 Device Offset Definitions UART CAN Port 1 CAN Port 2 Base Address Offset 0x0000 0x2000 0x3000 CAN Interfaces The two CAN2 0B compatible interfaces on the CX1 BAND are realized with a SJA1000 Philips CAN controller and a 82C251 CAN bus transceiver for each port Therefore the board is designed to connect to standard 24 V systems according the ISO 11898 24 V standard with transfer rates up to 1 MBaud Both ports are opto isolated against the CompactPCI backplane and also against each other The bus transceivers connect to the CAN controller via port O TXO RXO of the SJA1000 The CAN controllers are connected to bank 1 of the i960 RP s memory controller See table O Device Offset Definitions above for the address of the CAN port controllers within the i960 RP s memory map The following table shows the addressing of the registers of the SJA1000 relative to its base address CAN Controller SJA1000 Register Offset Definitions Base Address Read Access Offset bus timing 0 bus timing 0 bus timing 1 bus timing 1 output control output control NOE EKF Elektronik GmbH Philipp Reis St
25. lize rear Since this requires a special CompactPCI back plane J2 is mounted only when rear is requested The J1 connector also defines the supported signaling voltage A coding key in this connector is used to distinguish boards with 3 3 V cadmium yellow key Vj 5 V brilliant blue key or both no key The CX1 BAND is laid out for 5 V only and equipped with a blue coding key CAUTION Do not use the CX1 BAND within 3 3 V CompactPCI system CompactPCI Connector J1 Pin Assignment AD10 1 PLIA 2 6 EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller eer e wo we wo o o s w s we ewm a ee wo wes wey anne We ome gt pos ow m oo o Low ow omm ox 09 5 a Notes 1 These pin positions are not connected on the CX1 BAND This signal is hardwired to GND on the CX1 BAND Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompactPCI Intelligent Dual CAN2 0B Fieldbus Controller Technical Spe
26. n self test failed both build in self test and local bus or local bus confidence test failed confidence test passed or processor held in reset state core is in executing mode core execution stopped LOC access to local DRAM Flash CAN no access to any local device Controllers or UART NOSE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC intelligent Dual CAN2 0B Fieldbus Controller CompactPCI Interface The CX1 BAND offers a CompactPCI interface complying to the CompactPCI Specification Revision 2 1 CompactPCI is an industrial implementation of the familiar Peripheral Component Interconnect PCI bus It combines the well known electrical features of PCI with the more robust mechanical 19 inch rack mounting technology The interface supports 64 bit address and 32 bit data transfers It is designed for a clock frequency of 33 MHz with a transfer rate of up to 132 Mbyte s PCI Devices The CompactPCI interface is realized by the 1960 RP processor It consists of two PCI functions thus it is a multi function PCI device The first function PCI function 0 is the PCI to PCI bridge unit which creates data path between the primary the CompactPCI and the secondary interface not used on CX1 BAND PCI function 1 is the primary Address Translation Unit ATU This unit allows hi
27. ng to 30 ns cycle time DRAM Initialization Parameters DRAM Bank Read Wait State 0x00000000 RAS to CAS delay 1 5 cycles CAS pulse width 1 5 cycles no additional recovery wait states DRAM Bank Write Wait State 0x00000000 RAS to CAS delay 1 5 cycles CAS pulse width 1 5 cycles no additional recovery wait states DRAM Refresh Interval 0x00010204 Refresh enabled 15 625 us refresh interval DRAM Parity Enable 0x00000000 DRAM parity disabled DRAM Bank Control High current drives disabled DRAM bank enables 0x0000000D Fast Page Mode FPM 2 banks or 0x0000004D Extended Data Out EDO 2 banks REGE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller lC Interface The i960 RP supports a master and slave interface to the popular 1 C Inter Integrated Circuit bus This simple two wire serial bus allows an easy connection to other devices Transfer rates of up to 400 Kbit s are possible It could be programmed via the 1 C unit registers of the i960 RP An lC message consists of a device addressing byte and additional data bytes The device address byte also contains the information whether the following operations are read or write transfers If the address of an slave device on the bus matches the device address byte sent by a
28. nterrupt programming NODE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompaciPCl Intelligent Dual CAN2 0B Fieldbus Controller Interfaces on J2 To allow a maximum flexibility the CX1 BAND offers an interface to external transition modules via the CompactPCI connector J2 The signals of both CAN ports as well as the serial interface TTL signals are connected to J2 CompactPCI Connector J2 Pin Assignment CANRX2 NOGE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Interrupts The i960 RP provides an on chip programmable interrupt controller that allows a flexible priority level based reaction to internal and external events The processor uses interrupt vector numbers to enter the interrupt service routine ISR This mechanism leads to fast reaction and low interrupt latency To optimize interrupt performance the vectors can be hold in the i960 RP internal RAM and the ISR can be frozen in the instruction cache See the i960 RP manual for details Internal interrupt events have their origin by the different units within the i960 RP like the I C unit the messaging unit etc External requests are fed
29. ped CompactPCI connector J2 for each CAN port see also the block diagram of the CX1 BAND That allows the use of a customer specific transition module on the back side of a CompactPCI rack In this configuration the transition module should also include the CAN bus transceivers Ask EKF for such a solution Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Serial Interface For service or debugging the CX1 BAND provides a serial RS 232 interface The signals of this port are fed to the 10 pin header SP1 and to the optional equipped CompactPCI connector 12 TTL signals only Adapters to change to a common used 9 pin D Sub connector are available by EKF This allows to make simple links to serial interfaces of terminals personal computers modems etc with usual cables The serial interface is based on the well known Asynchronous Communication Element ACE 16C550 This UART is clocked with a separate 14 7456 MHz oscillator leading to transfer rates of up to 921 6 kBaud Due to the fact that the 16C550 could be clocked up to 16 MHz higher baud rates are also possible by using an accordingly oscillator deliverable on request The next table shows the transmission bit rates the value of the UART s divisor latch register iDiv and the resulting baud
30. r 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Base Address Read Access Offset RTR and DLC RTR and DLC o RTR and DLC RTR and DLC Ox1F clock divider Notes Register set is shown in BasicCAN mode Only valid for reset mode Some bits are writeable in reset mode only A detailed description of the SJA1000 operation is given in the SJA7000 Stand alone CAN controller data sheet delivered by Philips Semiconductors EE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller The signals of the CAN ports are fed to the two 9 pin D Sub connectors CP1 and CP2 in the front panel of the board The illustration below shows the pin assignments of the connectors CP1 CP2 front view of the connectors which was chosen according the CiA Draft 102 N o 0000 0 000 5 Male D Sub 9 CAN Port Connectors 1 CP2 CP1 CP2 1 CAN GND 6 2 CAN LOW CAN HIGH 7 3 CAN GND 8 4 9 5 SHIELD The CX1 BAND offers the possibility to be used in CompactPCI rear environment The receive and transmit signals provided by the SJA1000 are fed to the optional equip
31. reset Mode 2 allows each unit of the i960 RP to be initialized in its own manner Be aware that race conditions may exist between i960 core operation after reset and host processor PCI configuration Mode 3 allows the i960 core processor to initialize and control the initialization process before the host processor is allowed to configure the i960 RP peripherals During this time the CompactPCI interface signals Retry on all configuration cycles it receives until the i960 core processor clears the Configuration Cycle Disable bit in the EBCR The 3 jumper of JCNF exists to enable or disable the i960 RP s build in self test BIST If enabled the processor tries to check all its internal units If the check failed the processor asserts a signal that lights the red on board LED CPU FAIL and core execution stops Because BIST needs about 414000 CPU cycles it may be necessary to disable it when the restart time needs to be minimized Configuration Jumper Field JCNF BIST Setting Options JCNF 3 Processor BIST Jumper 4 of JCNF is used to forward the reset signal from the CompactPCI bus to the CPU and the other local devices on the board Configuration Jumper Field JCNF CPCI Reset Setting Options JCNF 4 CPCI Reset It is a good idea to remove JCNF 4 when the BIOS of the main CPU board within the CompactPCI does not recognize the CX1 BAND after system reset REGE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM German
32. ry Window Value Register transactions are translated by PCI Address Local Address amp 0x0000 FFFF Window Value Register In addition the i960 RP provides a direct addressing scheme This methode of outbound PCI transactions is limited to memory transfers and works within the local address range from 0x0000 2000 to Ox7FFF FFFF only If enabled any access to these locations are forwarded to the PCI bus Which of the PCI buses are used will be decided by a bit in the ATU control register ATUCR This register also contains the direct addressing enable bit As every PCI device the ATU implements its own configuration space This space is 256 bytes in size whereas the first 64 bytes must adhere to a predefined header format The ATU is programmed on the CompactPCI interface via type 0 configuration commands to PCI function number one Besides the i960 core processor can access the configuration space via memory mapped registers at local address 0x1200 Some of the read only registers can also be written by the i960 The following table shows the configuration header according the PC Local Bus Specification revision 2 1 Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND CompactPCI Intelligent Dual CAN2 0B Fieldbus Controller Address Translation Unit Configuration Header Format Reserved
33. th powerful features to create an intelligent processor and integrates it into a Peripheral Components Interconnect PCI environment This multi function PCI device is fully compliant with the PC Local Bus Specification revision 2 1 The i960 RP local bus a 32 bit multiplexed burst bus is a high speed interface to system memory Physical and logical memory attributes are programmed memory mapped control registers MMRs The core can maintain a sustained execution rate of one instruction per clock of most instructions The i960 RP features include Single clock execution of most instructions PCI to PCI Bridge Unit Independent Multiply Divide Unit Address Translation Unit e 128 bit register bus speeds local register caching DMA Controller 4 Kbyte two way integrated instruction cache Messaging Unit 2 Kbyte direct mapped integrated data cache Memory Controller 1 Kbyte integrated zero wait state data RAM e l C Bus Interface Unit The Address Translation Unit ATU permits direct data access from the CompactPCI interface to local memory This allows for example the programming of the FLASH devices or downloading software to local memory via the primary CompactPCI interface without interaction of the i960 RP core Address translation is controlled through programmable memory mapped registers accessible from both the PCI interface and the 1960 core processor The primary ATU has a dedicated PCI con
34. tion below Optionally screw board and rack together Switch on the main power supply Push down to insert move board at the ejectors carefully into the system rack HHEH CAUTION backside mounted devices gt lt Push up to insert Installing board into the system rack NOE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Removing boards Switch off the main power supply Touch the system rack to guarantee electrostatic discharge Optionally remove screws if board and rack are mounted together Press the board out of the CompactPCI backplane by pushing the ejectors in the front panel apart each other see illustration below Move board carefully along the guide rails out of the rack Caution is given especially to the devices mounted on the backside of the circuit board Put the removed board in the original EKF packaging box Push up to eject Remove board at the ejectors carefully out of the system rack BBR HHHE CAUTION backside mounted devices Push down to eject Removing board from the system rack EE EKF Elektronik GmbH Philipp Reis S
35. tr 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http Avww ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Connectors Jumper Fields Factory Defaults cr lOdjoedwoyg OOO 0000000 0000000000 LP lOdoeduo2 0000000000 Component Assembly Drawing Connectors J1 CompactPCI Connector J2 CompactPCI Connector CAN Ports 1 2 serial Port optional CP1 2 CAN Port 1 and 2 Connectors 9 pin D Sub SP1 RS 232 Serial Interface 10 pin Header Jumper Field Factory Defaults OOOMO B Factory Default JCNF i960 RP Configuration Selector 2 3 4 5 Initialization mode 3 CPU starts after reset Retry CPCI configuration cycles BIST active CPCI reset passed through to local reset CPCI bus clock in use EE EKF Elektronik GmbH Philipp Reis Str 4 D 59065 HAMM Germany Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller i960 RP Processor General Features The central unit on the CX1 BAND is an i960 RP Processor a member of the 80960 family of high performance processors It combines a high speed CPU wi
36. y Tel 49 0 2381 6890 0 Fax 49 0 2381 6890 90 E Mail info ekf de Internet http www ekf de CX1 BAND GompactPC Intelligent Dual CAN2 0B Fieldbus Controller Local Memory Devices Flash EEPROM The CX1 BAND is equipped with on board programmable Flash EEPROM devices The data bus width to these devices is 32 bit allowing the i960 RP to execute program code from Flash in full speed Therefore it is not necessary to copy the code into DRAM The Flash devices are connected to the memory bank 0 of the i960 RP Memory Controller They are readable and especially writeable any time with no need to enable the programming voltage Caution is given when the processor itself tries to program the Flash devices while executing code from the Flashs This will lead to a hanging processor core To program the Flash devices use one of the following alternates 1 Programming by i960 RP core processor Copy the program data and the Flash programming algorithm code to DRAM Run the programming code from DRAM Return to the calling function or restart the code loaded into the Flash devices 2 Programming via CompactPCI interface Reset the CX1 BAND with JCNF setting to initialization mode 0 Alternatively the i960 RP core processor could be halted by executing the HALT instruction Program the Flash devices via the primary ATU Restart the processor Depending on the version of the CX1 BAND there are different types of Flash devices in use
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