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1. 179 eais InOut real Activation energy for IBCIP 180 eane InOut real Activation energy for IBEN 181 eanc InOut real Activation energy for IBCN IBENP 182 eans InOut real Activation energy for IBCNP 183 xis InOut real Temperature exponent of IS 184 xii InOut real Temperature exponent of IBEI IBCI IBEIP IBCIP 185 xin InOut real Temperature exponent of IBEN IBCN IBENP IBCNP 186 tnf InOut real Temperature exponent of NF 187 tave InOut real Temperature exponent of AVC2 188 rth InOut real Thermal resistance 189 cth InOut real Thermal capacitance 190 vrt InOut real Punch through voltage of internal B C junction 191 art InOut real Smoothing parameter for reach through 192 ccso InOut real Fixed C S capacitance 193 qbm InOut real Select SGP qb formulation 194 nkf InOut real High current beta rolloff 195 xikf InOut real Temperature exponent of IKF 196 xrcx InOut real Temperature exponent of RCX 197 xrbx InOut real Temperature exponent of RBX 198 xrbp InOut real Temperature exponent of RBP 199 isrr InOut real Separate IS for fwd and rev 200 xisr InOut real Temperature exponent of ISR 201 dear InOut real Delta activation energy for ISRR 202 eap InOut real Exitivation energy for ISP 203 vbbe InOut real B E breakdown voltage 204 nbbe InOut real B E breakdown emission coefficient 2
2. Name Direction Type Description 1 de InOut real DC value of source 2 acmag InOut real AC magnitude 3 acphase InOut real AC phase 5 pulse In real vector Pulse description 6 sine In real vector Sinusoidal source description 6 sin In real vector Sinusoidal source description 7 exp In real vector Exponential source description 8 pwl In real vector Piecewise linear description 9 sffm In real vector Single freq FM description 21 am In real vector Amplitude modulation description 10 neg_node Out integer Negative node of source 11 pos_node Out integer Positive node of source 12 acreal Out real AC real part 13 acimag Out real AC imaginary part 14 function Out integer Function of the source 15 order Out integer Order of the source function 16 coeffs Out real vector Coefficients of the source 20 v Out real Voltage across the supply 17 p Out real Power supplied by the source 4 ac In real vector AC magnitude phase vector lic In real Current through current source 22 current Out real Current in DC or Transient mode 18 distofl In real vector f1 input for distortion 19 distof2 In real vector f2 input for distortion 483 484 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 2 3 Vsource Independent voltage source 30 2 3 1 Vsource instance parameters
3. Name Direction Type Description 1 area InOut real Area factor 2 off InOut flag Device initially off 3 jic In real vector Initial condition vector 4 icvbe InOut real Initial B E voltage 5 icvce InOut real Initial C E voltage 6 temp InOut real Instance temperature 7 dtemp InOut real Instance delta temperature 8 m InOut real Multiplier 212 collnode Out integer Number of collector node 213 basenode Out integer Number of base node 214 emitnode Out integer Number of emitter node 215 subsnode Out integer Number of substrate node 216 collCXnode Out integer Internal collector node 217 collCInode Out integer Internal collector node 218 baseBXnode Out integer Internal base node 219 baseBInode Out integer Internal base node 220 baseBPnode Out integer Internal base node 221 emitEInode Out integer Internal emitter node 222 subsSInode Out integer Internal substrate node 223 vbe Out real B E voltage 224 vbc Out real B C voltage 225 ic Out real Collector current 226 ib Out real Base current 227 ie Out real Emitter current 228 is Out real Substrate current 229 gm Out real Small signal transconductance dIc dVbe 230 go Out real Small signal output conductance dIc dVbc 231 gpi Out real Small signal input conductance dIb dVbe 232 gmu Out real Small signal conductance dIb dVbc 233 gx Out real Conductance from base to internal
4. Name Direction Type Description 6 vl InOut real Initial voltage at end 1 8 v2 InOut real Initial voltage at end 2 7111 InOut real Initial current at end 1 9 i2 InOut real Initial current at end 2 10 ic In real vector Initial condition vector v1 11 v2 12 13 pos_nodel Out integer Positive node of end 1 of t line 14 neg_nodel Out integer Negative node of end 1 of t line 15 pos_node2 Out integer Positive node of end 2 of t line 16 neg_node2 Out integer Negative node of end 2 of t line 30 3 2 2 LTRA model parameters Name Direction Type Description O ltra InOut flag LTRA model lir InOut real Resistance per meter 21 InOut real Inductance per meter 3 8 InOut real 4 c InOut real Capacitance per meter 5 len InOut real length of line 11 rel Out real Rel rate of change of deriv for bkpt 12 abs Out real Abs rate of change of deriv for bkpt 28 nocontrol InOut flag No timestep control 32 steplimit InOut flag always limit timestep to 0 8 delay of line 33 nosteplimit InOut flag don t always limit timestep to 0 8 delay of line 34 lininterp InOut flag use linear interpolation 35 quadinterp InOut flag use quadratic interpolation 36 mixedinterp InOut flag use linear interpolation if quadratic results look unacceptable 46 truncnr InOut flag use N R iterations for step calculation in LTRAt
5. Ri 0 01U CLPF 10K RLPF2 CLK ABRIDGE3 o IN OUT FILT OUT A OUT Vv Y LPF OUT XFILTER ES T RLPF1 XLPF1 Y Figure 26 1 Example Circuit C3 Example Mixed IO types This circuit contains a mixture of IO types including analog digital user defined real and null The circuit demonstrates the use of the digital and user defined node capability to model system level designs such as sampled data filters The simulated circuit contains a digital oscillator enabled after 100us The square wave oscillator output is divided by 8 with a ripple counter The result is passed through a digital filter to convert it to a sine wave E E EX ACA KF KF HE tran le 5 le 3 vl 1 O 0 0 pulse 0 1 le 4 le 6 rl 10 Ik abridgel 1 enable atod model atod adc_bridge aclk enable clk clk nand model nand d_nand rise_delay le 5 fall_delay le S adiv2 div2_out clk NULL NULL NULL div2_out dff adiv4 div4_out div2_out NULL NULL NULL div4_out dff adiv8 div8_out div4_out NULL NULL NULL div8_out dff model dff d_dff 26 2 XSPICE ADVANCED USAGE 387 Example continued abridge2 div8_out enable filt_in node_bridge2 model node_bridge2 d_to_real zero 1 one 1 x xfilter filt_in clk filt_out dig_filter k abridge3 filt_out a_out node_bridge3 model node_bridge3 real_to_v x rlpfl a_out oa_minus 10k k xlpf O oa_minus Ipf_out opamp
6. Note there are intentional redundancies in expression syntax e g x4y x y and pwr x y all have nearly the same result 2 9 FUNC 57 2 8 6 Reserved words In addition to the above function names and to the verbose operators not and or div mod other words are reserved and cannot be used as parameter names and or not div mod if else end while macro funct defined include for to downto is var sqr sqrt sin cos exp In arctan abs pwr 2 8 7 Alternative syntax The amp sign is tolerated to provide some historical parameter notation amp as the first character of a line is equivalent to param Inside a line the notation amp is equivalent to and identifier means the same thing as identifier Comments in the style of C line trailers are detected and erased Warning this is NOT possible in embedded control parts of a source file these lines are outside of this scope Now there is some possible confusion in ngspice because of multiple numerical expression features The param lines and the braces expressions see next chapter 2 9 are evaluated in the front end that is just after the subcircuit expansion Technically the X lines are kept as comments in the expanded circuit so that the actual parameters can correctly be substituted So after the netlist expansion and before the internal data setup all number attributes in the circuit are known con
7. 216 temp InOut real Temperature in degree Celcius 217 vdd InOut real Maximum Vds 218 vgg InOut real Maximum Vgs 219 vbb InOut real Maximum Vbs 220 cgso InOut real Gate source overlap capacitance per unit channel width m 221 cgdo InOut real Gate drain overlap capacitance per unit channel width m 222 cgbo InOut real Gate bulk overlap capacitance per unit channel length m 223 xpart InOut real Flag for channel charge partitioning 224 rsh InOut real Source drain diffusion sheet resistance in ohm per square 225 js InOut real Source drain junction saturation current per unit area 226 pb InOut real Source drain junction built in potential 227 mj InOut real Source drain bottom junction capacitance grading coefficient 228 pbsw InOut real Source drain side junction capacitance built in potential 229 mjsw InOut real Source drain side junction capacitance grading coefficient 230 cj InOut real Source drain bottom junction capacitance per unit area 231 cjsw InOut real Source drain side junction capacitance per unit area 232 wdf InOut real Default width of source drain diffusion in um 233 dell InOut real Length reduction of source drain diffusion 236 kf InOut real Flicker noise coefficient 237 af InOut real Flicker noise exponent 234 nmos In flag Flag to indicate NMOS 235 pmos In flag Flag to indicate PMOS 30 5 MOSFETS 527 30 5 8 BSIM3 Deta
8. The following types of lines have been implemented so far e RLC uniform transmission line with series loss only e RC uniform RC line e LC lossless transmission line e RG distributed series resistance and parallel conductance only Any other combination will yield erroneous results and should not be tried The length LEN of the line must be specified NOSTEPLIMIT is a flag that will remove the default restriction of limiting time steps to less than the line delay in the RLC case NOCONTROL is a flag that prevents the default limiting of the time step based on convolution error criteria in the RLC and RC cases This speeds up simulation but may in some cases reduce the accuracy of results LININTERP is a flag that when specified will use linear interpolation instead of the default quadratic interpolation for calculating delayed signals MIXEDINTERP is a flag that when spec ified uses a metric for judging whether quadratic interpolation is not applicable and if so uses linear interpolation otherwise it uses the default quadratic interpolation TRUNCDONTCUT is a flag that removes the default cutting of the time step to limit errors in the actual calculation of impulse response related quantities COMPACTREL and COMPACTABS are quantities that control the compaction of the past history of values stored for convolution Larger values of these lower accuracy but usually increase simulation speed These are to be used with the TRYT
9. Name Direction Type Description 1 de InOut real D C source value 3 acmag InOut real A C Magnitude 4 acphase InOut real A C Phase 5 pulse In real vector Pulse description 6 sine In real vector Sinusoidal source description 6 sin In real vector Sinusoidal source description 7 exp In real vector Exponential source description 8 pwl In real vector Piecewise linear description 9 sffm In real vector Single freq FM descripton 22 am In real vector Amplitude modulation descripton 16 pos_node Out integer Positive node of source 17 neg_node Out integer Negative node of source 11 function Out integer Function of the source 12 order Out integer Order of the source function 13 coeffs Out real vector Coefficients for the function 14 acreal Out real AC real part 15 acimag Out real AC imaginary part 2 ac In real vector AC magnitude phase vector 18 i Out real Voltage source current 19 p Out real Instantaneous power 20 distof1 In real vector f1 input for distortion 21 distof2 In real vector f2 input for distortion 23 r In real pwl repeat start time value 24 td In real pwl delay time value 30 2 VOLTAGE AND CURRENT SOURCES 30 2 4 CCCS Current controlled current source 30 2 4 1 CCCS instance parameters Name Direction Type Description 1 gain InOut real Gain of source 2 control
10. help Print a summary of the options to configure and exit quiet silent q Do not print messages saying which checks are being made To suppress all normal output redirect it to dev null any error messages will still be shown srcdir DIR Look for the package s source code in directory DIR Usually configure can determine that directory automatically version Print the version of Autoconf used to generate the configure script and exit configure also accepts some other not widely useful options 31 2 NGSPICE COMPILATION UNDER WINDOWS OS 31 2 1 How to make ngspice with MINGW and MSYS Creating ngspice with MINGW is now a straight forward procedure if you have MS YS MINGW installed properly Unfortunately the installation is rather tedious because you will need several enhancements to the standard install especially if you want to include XSpice Some links are given below which describe the procedures The default installation location of ngspice is the Windows path C spice The install path can be altered by passing prefix NEWPATH as an argument to configure during the build process nn Put the install path you desire inside e g D NewSpice Be careful to use forward slashes not backward slashes something still to be fixed Then add prefix D NewSpice as an argument to configure in the normal way The procedure of compi
11. 30 5 MOSFETS 507 66 sens_w_imag Out real imag part of ac sensitivity wrt width 67 sens_w_mag Out real sensitivity wrt w of ac magnitude 68 sens_w_ph Out real sensitivity wrt w of ac phase 69 sens_w_cplx Out complex ac sensitivity wrt width 30 5 2 2 MOS2 model parameters Name Direction Type Description 141 type Out string N channel or P channel MOS 101 vto InOut real Threshold voltage 101 vt0 InOut real 102 kp InOut real Transconductance parameter 103 gamma InOut real Bulk threshold parameter 104 phi InOut real Surface potential 105 lambda InOut real Channel length modulation 106 rd InOut real Drain ohmic resistance 107 rs InOut real Source ohmic resistance 108 cbd InOut real B D junction capacitance 109 cbs InOut real B S junction capacitance 110 is InOut real Bulk junction sat current 111 pb InOut real Bulk junction potential 112 cgso InOut real Gate source overlap cap 113 cgdo InOut real Gate drain overlap cap 114 cgbo InOut real Gate bulk overlap cap 122 rsh InOut real Sheet resistance 115 cj InOut real Bottom junction cap per area 116 mj InOut real Bottom grading coefficient 117 cjsw InOut real Side junction cap per area 118 mjsw InOut real Side grading
12. and also but only if you unset noglob first This makes them rather useless for typing algebraic expressions so you should set noglob again after you are done with wildcard expansion Note that the pattern abc matchs all characters except a b and c If X is being used the cursor may be positioned at any point on the screen when the window is up and characters typed at the keyboard are added to the window at that point The window may then be sent to a printer using the xpr 1 program 17 11 Bugs old stuff has to be checked for relevance When defining aliases like alias pdb plot db 1 2 you must be careful to quote the argument list substitutions in this manner If you quote the whole argument it might not work properly In a user defined function the arguments cannot be part of a name that uses the plot vec syntax For example define check v 1 cos tran1 v 1 does not work The name param notation might not work with trace iplot etc yet 320 CHAPTER 17 INTERACTIVE INTERPRETER Chapter 18 Ngspice User Interfaces ngspice offers a variety of user interfaces For an overview several screen shots please have a look at the ngspice web page 18 1 MS Windows Graphical User Interface If compiled properly e g using the with windows flag for configure under MINGW ngspice for Windows offers a simple graphical user interface In fact this interface does not offer much more for data i
13. If the relative dielectric constant is not specified the one for SiO2 is used The values of the constants are 8 85421487le 12 and Esio 3 4531479969e 11 The nominal capacitance is then computed as After the nominal capacitance is calculated it is adjusted for temperature by the formula C T C TNOM 1 TC T TNOM TC T TNOM 3 12 where C TNOM Crom In the above formula T represents the instance temperature which can be explicitly set using the temp keyword or calculated using the circuit temperature and dtemp if present 3 2 8 Capacitors dependent on expressions behavioral capacitor General form CXXXXXXX n n C expression lt tcl value gt lt tc2 value gt CXXXXXXX n n expression lt tcl value gt lt tc2 value gt Examples Cl cc 0 c V cc lt Vt Cl Ch tcel le 03 tc2 1 3e 05 3 2 ELEMENTARY DEVICES 69 Expression may be an equation or an expression containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 Example input file Behavioral Capacitor param Cl 5n Ch 1n Vt lm Il 100n ic v cc 0 v cc2 0 x capacitor depending on control voltage V cc Cl cc O c Vicc lt Vt Cl Ch Cl cc 0 c Ch I1 O 1 Il Exxx nl copy n2 n2 cc2 1 Cxxx nl copy n2 1 Bxxx cc2 n2 I V c
14. The following sections provide some guidance and descriptions for many but not all of these options 31 1 4 1 Options Specific to Using Ngspice enable adms ADMS is an experimental model compiler that translates Verilog A compact models into C code that can be compiled into ngspice This is still experimental but working with some limitations to the models e g no noise models If you want to use it please refer to the ADMS section on ngspice web site enable cider Cider is a mixed level simulator that couples Spice3 and DSIM to simulate devices from their technological parameters This part of the simulator is not compiled by default enable ndev Enable NDEV interface experimental A TCP IP interface to external device simulator such as GSS For more information please visit the homepage of GSS at http gss tcad sourceforge net enable newpred Enable the NEWPRED symbol in the code enable xspice Enable XSpice enhancements experimental A mixed signal simulator built upon spice3 with codemodel dynamic loading support See chapter 12 and section II for details with editline yes Enables the use of the BSD editline library libedit See http www thrysoee dk editline with readline yes Enable GNU readline support for the command line interface with tcl tcldir When configured with this option the tcl module tclspice is compiled and installed instead of plain ngspice enable openmp Compile ngspice
15. CONTENTS I 24 25 26 27 XSPICE Software User s Manual XSPICE Basics 24 1 ngspice with the XSPICE option o 24 2 The ASPICE Code Model Subsystem 25 ee ba ee hed eee ee eS 24 3 KSPICE Top Level Digg coc ke ea ee ee Se hee oS Execution Procedures 25 1 Simulation and Modeling Overview o e e 25 1 Describing TLE roms aa 23 2 Circuit Description Syntax o e sou rs 25 2 1 XSPICE Syntax Extensions 2 24424 542645434 bbe hoe bes 25 3 How to create code models 000 eee eee eee Example circuits 26 1 Amplifier with XSPICE model gain o 20 2 XSPICE advanced usage ca Sad Bee BOR Gre BE a 20 21 TE ea rara a eoh ee eee ed oA 20 22 Ruming example C3 o cca tedden eeecad Cab e eS ERSEES Code Models and User Defined Nodes 27 1 Code Model Data Type Definitions lt lt sae sense cde eae os 27 2 Creating Code Models o nek socs saoi macu saou ORR EEE EHR RES 27 3 Creating User Defined Nodes 222 nee bee e 27 4 Adding anew code model library lt lt lt 27 5 Compiling and loading the new code model library 27 0 Interface Specification Mile 25 2 lt a os scoet ioa nerad ated nd nig 270 1 The Name Table acosa rt ad a eX 21 6 2 Th P rt Table 22642454644 6486454882 eHEE RES 210 3 The Parameter Table lt lt coos ecc See eee A natka 2168 State Variable Table o eco m eni Se a AAA eS a 27 7 M
16. Computer based circuit simulation is often used as a tool by designers test engineers and others who want to analyze the operation of a design without examining the physical circuit Simulation allows you to change quickly the parameters of many of the circuit elements to determine how they affect the circuit response Often it is difficult or impossible to change these parameters in a physical circuit However to be practical a simulator must execute in a reasonable amount of time The key to efficient execution is choosing the proper level of modeling abstraction for a given problem To support a given modeling abstraction the simulator must provide appropriate algorithms Historically circuit simulators have supported either an analog simulation algorithm or a digital simulation algorithm Ngspice inherits the XSPICE framework and supports both analog and digital algorithms and is a mixed mode simulator 1 1 1 Analog Simulation Analog simulation focuses on the linear and non linear behavior of a circuit over a continuous time or frequency interval The circuit response is obtained by iteratively solving Kirchhoff s Laws for the circuit at time steps selected to ensure the solution has converged to a stable value and that numerical approximations of integrations are sufficiently accurate Since Kirchhoff s laws form a set of simultaneous equations the simulator operates by solving a matrix of equa tions at each time point This
17. Description The Limiter is a single input single output function similar to the Gain Block However the output of the Limiter function is restricted to the range specified by the output lower and upper limits This model will operate in DC AC and Transient analysis modes Note that the limit range is the value BELOW THE UPPER LIMIT AND ABOVE THE LOWER LIMIT at which smoothing of the output begins For this model then the limit range represents the delta WITH RESPECT TO THE OUTPUT LEVEL at which smoothing occurs Thus for an input gain of 2 0 and output limits of 1 0 and 1 0 volts the output will begin to smooth out at 0 9 volts which occurs when the input value is at 0 4 Example SPICE Usage a5 1 2 limits model limit5 limit in_offset 0 1 gain 2 5 out_lower_limit 5 0 out_upper_limit 5 0 limit_range 0 10 fraction FALSE 12 2 6 Controlled Limiter NAME_TABLE 144 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE C_Function_Name Spice_Model_Name Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits
18. Header files may be used throughout the state in file and continuation lines can be discarded completely if you so choose continuation lines are primarily provided as a convenience Example SPICE Usage a4 2 3 4 5 1 12 22 23 24 25 26 27 28 29 statel model statel d_state clk_delay 13 0e 9 reset_delay 27 0e 9 state file newstate txt reset_state 2 12 4 19 Frequency Divider NAME_TABLE C_Function_Name cm_d fdiv Spice_Model_Name d_fdiv Description digital frequency divider PORT_TABLE Port Name freq_in freq_out Description frequency input frequency output Direction in out Default_Type d d Allowed_Types a d CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed no no no no div_factor divide factor high cycles of cycles for high out int int 2 1 1 1 div_factor 1 no no yes yes i_count divider initial count v
19. The time of the breakpoint to be set int cm_event_queue time double time The time of the event to be queued cm_analog_set_perm_bkpt takes as input a time value This value is posted to the analog simulator algorithm and is used to force the simulator to choose that value as a breakpoint at 418 CHAPTER 27 CODE MODELS AND USER DEFINED NODES some time in the future The simulator may choose as the next time point a value less than the input but not greater Also regardless of how many time points pass before the breakpoint is reached it will not be removed from posting Thus a breakpoint is guaranteed at the passed time value Note that a breakpoint may also be set for a time prior to the current time but this will result in an error if the posted breakpoint is prior to the last accepted time i e T 1 cm_analog_set_temp_bkpt takes as input a time value This value is posted to the simulator and is used to force the simulator for the next time step only to not exceed the passed time value The simulator may choose as the next time point a value less than the input but not greater In addition once the next time step is chosen the posted value is removed regardless of whether it caused the break at the given time point This function is useful in the event that a time point needs to be retracted after its first posting in order to recalculate a new breakpoint based on new input data for controlled oscillators control
20. is the type given in the ifspec ifs file The same accessor macro can be used regardless of type If y is a vector then OUTPUT y would resolve to a pointer OUTPUT_CHANGED a may be assigned one of two values for any particular output from a digital code model If assigned the value TRUE the default then an output state strength and delay must be posted by the model during the call If on the other hand no change has occurred during that pass the OUTPUT_CHANGED a value for an output can be set to FALSE In this case no state strength or delay values need subsequently be posted by the model Remember that this macro applies to a single output port Ifa model has multiple outputs that have not changed OUTPUT_CHANGED a must be set to FALSE for each of them OUTPUT_DELAY y may be assigned a double value representing a delay associated with a particular digital or User Defined Node output port Note that this macro must be set for each digital or User Defined Node output from a model during each pass unless the 410 CHAPTER 27 CODE MODELS AND USER DEFINED NODES OUTPUT_CHANGED a macro is invoked see above Note also that a non zero value must be assigned to OUTPUT_DELAY Assigning a value of zero or a negative value will cause an error OUTPUT_STATE a may be assigned a state value for a digital output node Valid values are ZERO ONE and UNKNOWN This is the normal way of posting an output state from a digital code
21. listed incorrectly as Transient iterations per point 17 5 COMMANDS 289 17 5 53 Save Save a set of outputs General Form save all allv alli output Save a set of outputs discarding the rest Maybe used to dramatically reduce memory RAM requirements if only a few useful nodes or branches are saved If a node has been mentioned in a save command it appears in the working plot after a run has completed or in the rawfile if ngspice is run in batch mode If a node is traced or plotted see below it is also saved For backward compatibility if there are no save commands given all outputs are saved When the keyword all or the keyword allv appears in the save command all node voltages voltage source currents and inductor currents are saved in addition to any other values listed If the keyword alli appears in the save command all device currents are saved Note the current implementation saves only the currents of devices which have internal nodes i e MOSFETs with non zero RD and RS BJTs with non zero RC RB and RE DIODEs with non zero RS etc Resistor and capacitor currents are not saved with this option These deficiencies will be addressed in a later revision Save voltage and current save vd_node vs branch Note save will not accept vectors in contrast to save Nodes or branches have to be speci fied for lt output gt In the control endc section save should occur befor
22. no yes clk load clk load value F real 1 0e 12 no yes reset_load 12 4 DIGITAL MODELS Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed set load value F real 1 0e 12 no yes rise_delay rise delay real 1 0e 9 1 0e 12 no yes 197 reset load F real 1 0e 12 no yes fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital jk type flip flop is a one bit edge triggered storage element which will store data whenever the clk input line transitions from low to high ZERO to ONE In addition asynchronous set and reset signals exist and each of the three methods of changing the stored output of the d_jkff have separate load values and delays associated with them Additionally you may specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN inputs other than j or k cause the output to go UNKNOWN automatically Example SPICE Usage a8 1234567 flop2 model flop2 d_jkff clk_delay 13 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise_delay 10 0e 9 fall_delay 3e 9 12 4 14 Toggle Flip
23. ntref 1 0el7 conemod sg fieldmod sg elec major mumax 1000 0 mumin 100 0 ntexp 0 8 vsat 1 0e7 vwarm 3 0 e6 elec minor mumax 1000 0 mumin 200 0 ntexp 0 9 hole major mumax 500 0 mumin 50 0 ntexp 0 7 vsat 8 0e6 vwarm 1 0e6 hole minor mumax 500 0 mumin 150 0 ntexp 0 8 The electron surface mobility is changed by the following mobility mat 1 elec mus 800 0 ec a 3 0e5 ec b 9 0e5 Finally the default Scharfetter Gummel parameters can be used in Si with the GaAs velocity saturation model even though it doesn t make physical sense mobility mat 1 mobility mat 1 mobility mat 1 init elec major fieldmodel sg init hole major fieldmodel sg fieldmodel ga 29 11 4 SEE ALSO material 458 CHAPTER 29 CIDER USER S MANUAL 29 11 55 BUGS The surface mobility model does not include temperature dependence for the transverse field parameters Those parameters will need to be adjusted by hand 29 12 MODELS Specify which physical models should be simulated SYNOPSIS models model flags 29 12 1 DESCRIPTION The models card indicates which physical effects should be modeled during a simulation Ini tially none of the effects are included A flag can be set false by preceding by a caret 29 12 2 Parameters Name Type Description BGN Flag Bandgap narrowing SRH Flag Shockley Reed Hall recombination ConcTau Flag Concentration dependent SRH lifetimes Auger Flag Auger recombination Avalanche Fla
24. rlpf2 oa_minus Ipf_out 10k clpf Ipf_out oa_minus 0 01uF K K K K K OOOO K K K K subckt dig_filter filt_in clk filt_out model nO real_gain gain 1 0 model nl real_gain gain 2 0 model n2 real_gain gain 1 0 model gl real_gain gain 0 125 model zml real_delay model dOa real_gain gain 0 75 model dla real_gain gain 0 5625 model d0b real_gain gain 0 3438 model dlb real_gain gain 1 0 anOa filt_in x0a nO anla filt_in xla nl an2a filt_in x2a n2 k azOa x0a clk xla zml azla xla clk x2a zml ad0a x2a x0a dOa adla x2a xla dla az2a x2a filtl_out gl az3a filtl_out clk filt2_ in zml an0b filt2_in x0b nO anlb filt2_in xlb nl an2b filt2_in x2b n2 k az0b x0b clk xlb zml azlb xlb clk x2b zml x ad0 x2b x0b dOb adl x2b xlb dlb x az2b x2b clk filt_out zml ends dig filter 388 CHAPTER 26 EXAMPLE CIRCUITS Example continued subckt opamp plus minus out ok rl plus minus 300k al vd plus minus outint lim model lim limit out_lower_limit 12 out_upper_limit 12 fraction true limit_range 0 2 gain 300e3 r3 outint out 50 0 r2 out O lel2 ends opamp end This circuit is a high level design of a sampled data filter An analog step waveform created from a ngspice pulse waveform is introduced as v1 and converted to digital by code model instance abridge This digital data is used to enable a Nand Gate oscillator aclk after a short
25. rm input fifo rm output fifo mkfifo input fifo mkfifo output fifo NGSPICE_COMMAND p i lt input fifo gt output fifo amp exec 3 gt input fifo echo I can write to input fifo echo Start processing echo echo source circuit cir gt amp 3 echo set noaskquit gt amp 3 echo set nobreak gt amp 3 echo tran 0 01ms 0 1ms gt 83 echo print nO gt amp 3 echo quit gt amp 3 echo Try to open output fifo exec 4 lt output fifo echo I can read from output fifo echo Ready to read while read output do echo output done lt amp 4 exec 3 gt amp exec 45 amp echo End processing The input file for spice is 260 CHAPTER 16 STARTING NGSPICE Circuit cir Circuit cir Vl n0 0 SIN O 10 1kHz Cl nl nO 3 3nF RI O nl Ik end 16 13 Compatibility ngspice is a direct derivative of spice3f5 from UC Berkeley and thus inherits all of the com mands available in its predecessor Thanks to the open source policy of UCB original spice3 from 1994 s still available here several commercial variants have sprung off either being more dedicated to IC design or more concentrating on simulating discrete and board level electronics None of the commercial and almost none of the freely downloadable spice providers publishes the source code All of them have proceeded with the development by adding functionality or by adding a more dedicated user interface Some have kept the
26. 1 0e 9 no yes trigger pw Description This function is a controlled oneshot with parametrizable values of low and high peak output input trigger value level delay and output rise and fall times It takes an 174 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE input voltage or current value This value is used as the independent variable in the piecewise linear curve described by the coordinate points of the cntl_array and pw_array pairs From the curve a pulse width value is determined The one shot will output a pulse of that width triggered by the clock signal rising or falling edge delayed by the delay value and with specified rise and fall times A positive slope on the clear input will immediately terminate the pulse which resets with its fall time From the above it is easy to see that array sizes of 2 for both the cntl_array and the pw_array will yield a linear variation of the pulse width with respect to the control input Any sizes greater than 2 will yield a piecewise linear transfer characteristic For more detail refer to the description of the piecewise linear controlled source which uses a similar method to derive an output value given a control input Example SPICE Usage ain 1 2 3 4 pulse2 model pulse2 oneshot cntl_array 1 0 10 11 pw_array 1e 6 1e 6 1le 4 1e 4 clk_ trig 0 9 pos_edge_ trig FALSE out_low 0 0 out_high 4 5 rise_delay 20 0 9 fall_delay 35 0e 9
27. 17 12 1 UFZ ae Loading the input port from an ac source Up via a resistor with resistance value Zp we obtain the relation Uo Zol U1 17 13 Entering this into 17 12 we get 2U Uo a ae A 17 14 11 Do For s21 we obtain similarly b 591 2 17 15 aj a 0 U2 Zoln 2U Za U a Equations 17 14 and 17 16 now tell us how to measure s and s21 Measure U4 at the input port multiply by 2 using an E source subtracting Up which for simplicity is set to 1 and divide by Up At the same time measure U at the output port multiply by 2 and divide by Up Biasing and measuring is done by subcircuit S_ PARAM To obtain s22 and s12 you have to exchange the input and output ports of your two port and do the same measurement again This is achieved by switching resistors from low 1mQ to high 1TQ and thus switching the input and output ports 17 9 3 Usage Copy and then edit s param cir You will find this file in directory examples control_structs of the ngspice distribution The reference resistance often called characteristic impedance for the measurements is added as a parameter param Rbase 50 The bias voltages at the input and output ports of the circuit are set as parameters as well param Vbias_in 1 Vbias_out 2 Place your circuit at the appropriate place in the input file e g replacing the existing example circuits The input port of your circuit has two nodes in 0 The output port has the two nodes 1
28. 8S OT g1 ur poquosaq Agjaysog OEE ENISA 6t 8 IPO9 UOISIOA INIA AMI YTE TE TEAEWISA 6Y 8 nosadog ueqiag Aq suorsuo Xxa A9 9x19g TE IAENISE 6t 8 aIdS9 10 UB y Aq suorsu x Aapeysog 0 OACINISE 6t 8 ards uey 6SOW 6 T ur poquoseq Aajaylog 9SOW 9 ur paquosag A9 9x199 TNISA S ul paquosag pyg TWIS 7 1 998 popow peonrdwo ruos y A9 9I9 ESON z ur paquosaq Agpoyslog UBUIOYIH 3AOIL TSON 17 Popow oneaIpenb eo1sse o ay ST STYL Ko 9x19g S93POH UBUIYIMYS ISOW I S3JON SIDUBIOJIY Jadopaasg USIA PPOJA JUN PAIT Table 11 1 MOSFET model summary 124 CHAPTER 11 MOSFETS the KAPPA parameter has been detected see 10 The supplied fix has been implemented in Spice3f2 and later Since this fix may affect parameter fitting the option badmos3 may be set to use the old implementation see the section on simulation variables and the options line Ngspice level 3 implementation takes into account length and width mask adjustments xl and xw and device width narrowing due to diffusion wd 11 2 4 MOS Level 6 This model is described in 2 The model can express the current characteristics of short channel MOSFETs at least down to 0 25 um channel length GaAs FET and resistance inserted MOSFETs The model evaluation time is about 1 3 of the evaluation time of the spice3 mos level 3 model The model also enables analytical treatments of circu
29. Forward and reverse beta temp exp 140 eg InOut real Energy gap for IS temp dependency 141 xti InOut real Temp exponent for IS 148 trel InOut real Temp coefficient 1 for RE 149 tre2 InOut real Temp coefficient 2 for RE 150 trel InOut real Temp coefficient 1 for RC 151 tre2 InOut real Temp coefficient 2 for RC 152 trb1 InOut real Temp coefficient 1 for RB 153 trb2 InOut real Temp coefficient 2 for RB 154 trbml InOut real Temp coefficient 1 for RBM 155 trbm2 InOut real Temp coefficient 2 for RBM 142 fc InOut real Forward bias junction fit parameter 301 invearlyvoltf Out real Inverse early voltage forward 302 invearlyvoltr Out real Inverse early voltage reverse 303 invrollofff Out real Inverse roll off forward 304 invrolloffr Out real Inverse roll off reverse 305 collectorconduct Out real Collector conductance 306 emitterconduct Out real Emitter conductance 307 transtimevbcfact Out real Transit time VBC factor 308 excessphasefactor Out real Excess phase fact 143 thom InOut real Parameter measurement temperature 145 kf InOut real Flicker Noise Coefficient 144 af InOut real Flicker Noise Exponent 498 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 4 3 VBIC Vertical Bipolar Inter Company Model 30 4 3 1 VBIC instance parameters
30. Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed cm_climit climit controlled limiter block in input in v v vd i id vnam no no cntl_lower lower limit control input in v v vd i id vnam no no in_offset input offset real 0 0 no yes upper_delta output upper delta real 0 0 no yes limit_range upper amp lower sm range real 1 0e 6 no yes cntl_upper upper lim control input in V v vd i id vnam no no out output out V v vd i id no no gain gain real 1 0 no yes lower_delta output lower delta real 0 0 no yes fraction smoothing abs switch boolean FALSE no yes 12 2 ANALOG MODELS 145 Description The Controlled Limiter is a single input single output function similar to the Gain Block However the output of the Limiter function is restricted to the range specified by the output lower and upper limits This model will operate in DC AC and Transient anal ysis modes Note that the limit range is the value BELOW THE CNTL_UPPER LIMIT AND ABOVE THE CNTL_LOWER LIMIT at which smoothing of the output begins minimum positive value of voltage must exist between the CNTL_UPPER input and the CNTL_LOWER input at all times For this model then the limit range represents the delta WITH RESPECT TO THE OUTPUT
31. altermod mod mod2 modl15 file lt model file name gt Example altermod nch file BSIM3_nmos mod altermod pch nch file BSIM4_mos mod Be careful that the new model file corresponds to the existing model selected by modn The ex isting models are defined during circuit setup at start up of ngspice Models have been included by model statements 2 3 in your input file or included by the include command In the example given above the models nch or nch and pch have to be already available before call ing altermod If they are not found in the active circuit ngspice will terminate with an error message There is no checking however of the version and level parameters So you have to be responsible for offering model data of the same model level e g level 8 for BSIM3 Thus no new model is selectable by altermod but the parameters of the existing model s may be changed partially completely temporarily 17 5 5 Asciiplot Plot values using old style character plots General Form asciiplot plotargs Produce a line printer plot of the vectors The plot is sent to the standard output so you can put it into a file with asciiplot args gt file The set options width height and nobreak determine the width and height of the plot and whether there are page breaks respectively Note that you will have problems if you try to asciiplot something with an X scale that isn t monotonic i e something like sin TIME because as
32. is less than Y Warning Pd Warning Ps 0 0 No of Data Rows 568 ngspice 2 gt plot vss branch ngspice 3 gt DiSpice_WinjExam_BSIM3ttestl_v31 sp Figure 18 1 MS Windows GUI The output window displays messages issued by ngspice You may scroll the window to get more of the text The input box white box may be activated by a mouse click to accept any of the valid ngspice commends The lower left output bar displays the actual input file ngspice progress during setup and simulation is shown in the progress window ready The Quit button allow to interrupt ngspice If ngspice is actively simulating due to using only a single thread this interrupt has to wait until the window is accessible from within ngspice e g during an update of the progress window In the plot window there is the upper left button which activated a drop down menu You may select to print the plot window shown a very simple printer interface to be improved set up any of the printers available on your computer or issue a postscript file of the actual plot window either black amp white or colored 18 2 MS WINDOWS CONSOLE 323 Instead of plotting with black background you may set the background to any other color preferably to white using the command shown below Input file modification for white background control run x white background set color0 white x black grid and text only needed with X
33. otherwise dumped to your console Example usage after ngspice has started x Dump matrix and RHS values after 10 and 20 steps x of a transient simulation source rc cir step 10 mdump ml txt mrdump mrl txt step 10 mdump m2 txt mrdump mr2 txt just to continue to the end step 10000 You may create a loop using the control structures chapt 17 6 17 5 39 Noise Noise analysis See the NOISE analysis 15 3 4 for details The noise command will generate two plots typically named noisel and noise2 with Noise Spectral Density Curves and Integrated Noise data To write these data into output file s you may use the following command sequence 17 5 COMMANDS 283 Command sequence for writing noise data to file s control tran le 6 le 3 write test_tran raw noise V out vinp dec 333 1 les 16 print inoise_total onoise_total first option to get all of the output two files setplot noisel write test_noisel raw all setplot noise2 write test_noise2 raw all x second option all in one raw file write testall raw noisel all noise2 all endc 17 5 40 Op Perform an operating point analysis General Form op Do an operating point analysis See chapter 15 3 5 for more details 17 5 41 Option Set a ngspice option General Form option option val option val Set any of the simulator variables as listed in chapt 15 1 See this chapter also for more information on the available options The o
34. yes 1 no address address input line s in d a yes 1 no select chip select line s in d a yes 1 16 no select_value memory data_out data output line s out d a yes data_in no write_en write enable line in d a no no decimal active value for select line comparison int 1 0 32767 no yes ic initial bit state dc CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter _ Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed int 2 0 2 no yes read_delay read delay from address select write en active real 100 0e 9 1 0e 12 no yes data_load data_in load value F real 1 0e 12 no yes select_load select load value F real 1 0e 12 no yes enable_load address_load addr load value F real 1 0e 12 no yes enable line load valu
35. 13 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise delay 10 0e 9 fall_delay 3e 9 t_load 0 2e 12 12 4 15 Set Reset Flip Flop NAME_TABLE C_Function_Name cm_d_srff Spice_Model_Name d_srff Description digital set reset flip flop PORT_TABLE Port Name s r Description set input reset input Direction in in Default_Type d d Allowed_Types a ad Vector no no Vector_Bounds Null Allowed no no PORT_TABLE 200 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type clk clock in d no no set asynchronous set in d a no yes out data output out d a no yes clk_delay delay from clk real 1 0e 9 1 0e 12 no yes reset_delay delay from reset real 1 0e 9 1 0e
36. 19 p Out real Instantaneous power 76 sens_1 de Out real dc sensitivity wrt length 70 sens_l real Out real real part of ac sensitivity wrt length 71 sens_l_ imag Out real imag part of ac sensitivity wrt length 74 sens_1_cplx Out complex ac sensitivity wrt length 72 sens_1_mag Out real sensitivity wrt l of ac magnitude 73 sens_1_ph Out real sensitivity wrt l of ac phase 75 sens_w_dc Out real de sensitivity wrt width 65 sens_w_real Out real real part of ac sensitivity wrt width 66 sens_w_imag Out real imag part of ac sensitivity wrt width 67 sens_w_mag Out real sensitivity wrt w of ac magnitude 68 sens_w_ph Out real sensitivity wrt w of ac phase 69 sens_w_cplx Out complex ac sensitivity wrt width 518 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 5 MOSFETS 30 5 5 2 MOS9 model parameters Name Direction Type Description 144 type Out string N channel or P channel MOS 133 nmos In flag N type MOSfet model 134 pmos In flag P type MOSfet model 101 vto InOut real Threshold voltage 101 vt0 InOut real 102 kp InOut real Transconductance parameter 103 gamma InOut real Bulk threshold parameter 104 phi InOut real Surface potential 105 rd InOut real Drain ohmic resistance 106 rs InOut real So
37. 1f you have installed ngspice according to chapter 31 1 5 This procedure will install the code model libraries into a directory lt prefix gt lib spice e g C Spice lib spice for standard Win dows install or usr local lib spice for LINUX Thus the code model libraries are not linked into ngspice at compile time by may be loaded at runtime using the codemodel command see chapt 17 5 10 This is done automatically for the predefined code model libraries upon starting ngspice The appropriate commands are provided in the start up file spinit see chapt 16 5 So if you have added a new code model inside of one of the existing libraries nothing has to be done you will have immediate access to your new model If you have generated a new code model library e g new_lib cm then you have to add the line XSPICEINIT codemodel prefix libname spice new_lib cm to spinit in in ng spice rework src This will create a new spinit if ngspice is recompiled from scratch To avoid the need for recompilation of ngspice you also may directly edit the file spinit by adding the line codemodel C Spice lib spice new_lib cm OS MS Windows or the appropriate LINUX equivalent Upon starting ngspice the new library will be loaded and you have access to the new code model s The codemodel command has to be executed upon start up of ngspice so that the model information is available as soon as the circuit is parsed Failing to do so will lead to a
38. 4 12 2 24 Capacitance Meter NAME_TABLE C_Function_Name cm_cmeter Spice _Model_Name cmeter Description capacitance meter PORT_TABLE Port Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds 3 Null_ Allowed no no PARAMETER_TABLE Parameter_Name gain Description gain Data_Type real Default_Value 1 0 Limits Vector no Vector_Bounds Null1_Allowed yes Description The capacitance meter is a sensing device which is attached to a circuit node and produces as an output a scaled value equal to the total capacitance seen on its input multiplied by the gain parameter This model is primarily intended as a building block for 12 3 HYBRID MODELS 175 other models which must sense a capacitance value and alter their behavior based upon it Example SPICE Usage atesti 1 2 ctest model ctest cmeter gain 1 0e12 12 2 25 Inductance Meter NAME_TABLE C_Function_Name cm_lmeter Spice_Model_Name lmeter Description inductance meter PORT_TABLE Port Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds E Null Allowed no no PARAMETER_TABLE Parameter_Name gain Description gain Data_Type real Default_Value 1 0 Limits Vector no Vector Bounds Null_ Allowed yes Descript
39. 4299 Transient analysis timestep backups 87 392 CHAPTER 26 EXAMPLE CIRCUITS From this printout we see that digital node values are composed of a two character string The first character 0 1 or U gives the state of the node logic zero logic one or unknown logic state The second character s r z u gives the strength of the logic state strong resistive hi impedance or undetermined If you wish examine other nodes in this circuit with either the plot or eprint commands When you are done enter the quit command to exit the simulator and return to the operating system prompt ngspice 6 gt quit So long Chapter 27 Code Models and User Defined Nodes The following sections explain the steps required to create code models and User Defined Nodes UDNSs store them in shared libraries and load them into the simulator at runtime The ngspice simulator already includes XSPICE libraries of predefined models and node types that span the analog and digital domains These have been detailed earlier in this document see Sections 12 2 12 3 and 12 4 However the real power of the XSPICE is in its support for extending these libraries with new models written by users ngspice includes an XSPICE code model generator Adding code models to ngspice will require a model definition plus some simple file operations which are explained in this chapter The original manual cited an XSPICE Code Model Toolkit that enabled
40. CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed i_limit_source current sourcing limit real 1 0e 12 no yes i_limit_sink current sinking limit real 1 0e 12 no yes V_pwr_range i_source_range upper amp lower power sourcing current supply smoothing range smoothing range real real 1 0e 6 1 0e 9 1 0e 15 1 0e 15 no no yes yes i_sink range sinking current smoothing range real 1 0e 9 1 0e 15 no yes r_out_domain internal external voltage delta smoothing range real 1 0e 9 1 0e 15 no yes Description The Current Limiter models the behavior of an operational amplifier or compara tor device at a high level of abstraction All of its pins act as inputs three of the four 12 2 ANALOG MODELS 155 also act as outputs The model takes
41. Enom LENGTH __ MUx igxNT2xCSECT Lnom LENGTH if MU is specified otherwise with uo 1 25663706143592e 62 After the nominal inductance is calculated it is adjusted for temperature by the formula L T L TNOM 1 TC T TNOM TC T TNOM 3 17 where L TNOM Lnom In the above formula T represents the instance temperature which can be explicitly using the temp keyword or calculated using the circuit temperature and dtemp 1f present 3 2 11 Coupled Mutual Inductors General form KXXXXXXX LYYYYYYY LZZZZZZZ value Examples K43 LAA LBB 0 999 KXFRMR L1 L2 0 87 LYYYYYYY and LZZZZZZZ are the names of the two coupled inductors and value is the coefficient of coupling K which must be greater than O and less than or equal to 1 Using the dot convention place a dot on the first node of each inductor 3 2 12 Inductors dependent on expressions behavioral inductor General form LXXXXXXX n n L expression lt tcl value gt lt tc2 value gt LXXXXXXX n n expression lt tcl value gt lt tc2 value gt Examples L1 12 111 L 1 Vm lt It LI Lh tcl 4e 03 tc2 6e 05 Expression may be an equation or an expression containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 12 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS Example in
42. LIB libname lt gt ENDL statements If the compatibility mode 16 13 is set to ps by set ngbehavior ps 17 7 in spinit 16 5 or spiceinit 16 6 then a simplyfied syntax LIB filename is available a warning is issued and filename is simply included as described in chapt 2 6 2 8 PARAM Parametric netlists Ngspice allows for the definition of parametric attributes in the netlists This is an enhancement of the ngspice front end which adds arithmetic functionality to the circuit description language 2 8 1 param line General form param lt ident gt lt expr gt lt ident gt lt expr gt Examples param pippo 5 param pp 6 param pippp pippo pp param p pp param pap pp tp This line assigns numerical values to identifiers More than one assignment per line is possible using the separator The param lines inside subcircuits are copied per call like any other line All assignments are executed sequentially through the expanded circuit Before its first use a parameter name must have been assigned a value Expression defining a parameter have to be put into braces p p2 alternatively into single quotes p p2 2 8 PARAM PARAMETRIC NETLISTS 53 2 8 2 Brace expressions in circuit elements General form lt expr gt Examples These are allowed in model lines and in device lines A spice number is a floating point number with an optional scaling suffix immediately
43. NMF PMF o o 10 2 1 10 2 2 10 2 3 Model by Statz a oo co eet haapt poh et ea RS EH ES Model by Ytterdal e a coccion ad ES el oee be bb She HRALS EERE REREEG EERE E GEG 10924 Te kee ee Se ac Rw ec Ee a BE eee Re 11 MOSFETs 11 1 MOSFET devices 2 6 6 6 6 6 bod css Bec ee a ee be 11 2 MOSFET models NMOS PMOS 0 0 0 0 000 2 ee eens 11 21 UTA L23 11 2 4 112 5 11 2 6 11 2 7 11 2 8 11 2 9 MOS Level T o peos boce pa saa g AE AAA MOS Level Z socs cs eet RR po kek OK RAR OK SG MOS Level 3 SI MO LEG lt a so aa ak he oy Bete Kee BES HS Notes on Level 1 6 models oc oe ee eRe OE ee ees BSIM Models ocres rasero BSIM1I model level 4 ooo isa es BSIM2 model level Si ooco cioriococoro os BSIM3 model levels 8 49 coco cincn mosas s s 11 2 10 BSIM4 model levels 14 54 HA AI 11 2 12 BSIMSOI models levels 10 58 55 56 57 11 2 13 SO model level 60 reso 64454264 Be hee sd 11 2 14 HiSIM models of the University of Hiroshima 12 Mixed Mode and Behavioral Modeling with XSPICE 12 1 Code Model Element amp MODEL Cards 22 AMS Madels rac Aa sa 12 2 1 12 2 2 123 12 2 4 12 25 1226 2 2 7 PIE soose koe ye ah RARA Diydor 3 ir A ER ER DEE Re E ok eK RARE REEHEEE REDE ARERERER PEL EED ES Controlled Limiter ociosos MR RR EE RRR EE RS PWL Controlled Source coccion 119 119
44. Perform an operating point analysis 283 17 5 41 Option Set a ngspice option co ura eS 283 17 5 42 Plot Plot values on the display 284 17 5 43 Print Print val es lt co o 6G e ea BR AR 285 17 5 44 Quit Leave Ngspice or Nutmeg 2 4 285 17 5 45 Rehash Reset internal hash tables 286 17 5 46 Remcirc Remove the current circuit 286 17 5 47 Reset Reset an analysis c coocc0 coo 286 17 5 48 Reshape Alter the dimensionality or dimensions of a vector 286 17 5 49 Resume Continue a simulation after a stop 287 17 5 50 Rspice Remote ngspice submission o 287 17 5 51 Run Run analysis from the input file 287 17 5 52 R sage Resource usage o e sn u ue u AA 287 17 5 53 Save Save a s t oT Outputs 2 s a t a a t a a 289 17 5 54 Sens Run a sensitivity analysis o 289 17 5 55 Set Set the value of a variable oo 14 0 cac conc acarrean 290 17 5 56 Setcirc Change the current circuit ocios ir 290 17 5 57 Setplot Switch the current set of vectors 290 17 5 58 Setscale Set the scale vector for the current plot 290 17 5 59 Settype Set the type of a vector ke kh eee a REESE SS 291 17 5 60 Shell Call the command interpreter 6 562 co oo 291 17 5 61 Shift Alter a list variable lt oocoo
45. al 1 0 cap model cap capacitor c 1000uf ic 1 ri 1 0 ik a2 2 0 ind model ind inductor 1 1H ic 1 r2 20 1 0 control tran 0 01 3 plot v 1 v 2 endc end 3 2 14 Switches Two types of switches are available a voltage controlled switch type SXXXXXX model SW and a current controlled switch type WXXXXXXX model CSW A switching hysteresis may be defined as well as on and off resistances 0 lt R lt General form SXXXXXXX N N NC NC MODEL lt ON gt lt OFF gt WYYYYYYY N N VNAM MODEL lt ON gt lt OFF gt Examples sl 1 2 3 4 switchl ON s2 5 6 3 0 sm2 off Switchl 1 2 10 O smodell wl 1 2 vclock switchmodl W2 3 0 vramp sml ON wreset 5 6 vclck lossyswitch OFF Nodes 1 and 2 are the nodes between which the switch terminals are connected The model name is mandatory while the initial conditions are optional For the voltage controlled switch nodes 3 and 4 are the positive and negative controlling nodes respectively For the current controlled switch the controlling current is that through the specified voltage source The direction of positive controlling current flow is from the positive node through the source to the negative node The instance parameters ON or OFF are required when the controlling voltage current starts inside the range of the hysteresis loop different outputs during forward vs backward voltage or current ramp Then ON or OFF determine the initial state of the s
46. by a small fraction of its value zero valued parameters are not analyzed this has the benefit of reducing what is usually a very large amount of data 40 CHAPTER 1 INTRODUCTION 1 2 7 Noise Analysis The noise analysis portion of Ngspice does analysis device generated noise for the given cir cuit When provided with an input source and an output port the analysis calculates the noise contributions of each device and each noise generator within the device to the output port voltage It also calculates the input noise to the circuit equivalent to the output noise referred to the specified input source This is done for every frequency point in a specified range the calculated value of the noise corresponds to the spectral density of the circuit variable viewed as a stationary Gaussian stochastic process After calculating the spectral densities noise analysis integrates these values over the specified frequency range to arrive at the total noise voltage cur rent over this frequency range This calculated value corresponds to the variance of the circuit variable viewed as a stationary Gaussian process 1 2 8 Periodic Steady State Analysis Experimental code not yet made publicly available PSS is a radio frequency periodical large signal dedicated analysis The implementation is based on a time domain shooting like method which make use of Transient analysis As it is in early development stage PSS performs analysis only on autonom
47. cf models card is enabled then the model will apply to all semiconductor portions of the device within this estimated distance of the interface If a point lies within the estimated layer width of more than one interface it belong to the interface specified first in the input file If the layer width given is less than or equal to zero it is automatically replaced by an estimate calculated from the doping near the interface As a consequence if the doping varies so will the layer width estimate Each edge of the bounding box can be specified in terms of its location or its mesh index in the relevant dimension or defaulted to the respective boundary of the simulation mesh 444 CHAPTER 29 CIDER USER S MANUAL 29 2 2 PARAMETERS Name Type Description Units Domain Integer ID number of primary domain Neighbor Integer ID number of neighboring domain X Low Real Lowest X location of bounding box um IX Low Integer Lowest X mesh index of bounding box X High Real Highest X location of bounding box um IX High Integer Highest X mesh index of bounding box Y Low Real Lowest Y location of bounding box um TY Low Integer Lowest Y mesh index of bounding box Y High Real Highest Y location of bounding box um IY High Integer Highest Y mesh index of bounding box Qf Real Fixed interface charge C cm SN Real Surface recombination velocity electrons m s SP Real Surface recombination velocity holes cm s
48. copying and comparison Unlike the Model Definition File which uses the Code Model Preprocessor to translate Accessor Macros the User Defined Node Definition file is a pure C language file This file uses macros to isolate you from data structure definitions but the macros are defined in a standard header file EVTudn h and translations are performed by the standard C Preprocessor When a directory is created for a new User Defined Node with mkudndir a structure of type Evt_Udn_Info_t is placed at the bottom of the User Defined Node Definition File This structure contains the type name for the node a description string and pointers to each of the functions that define the node This structure is complete except for a text string that describes the node type This string is stubbed out and may be edited by you if desired 27 8 1 Macros You must code the functions described in the following section using the macros appropriate for the particular function You may elect whether not to provide the optional functions It is an error to use a macro not defined for a function Note that a review of the sample directories for the real and int UDN types will make the function usage clearer The macros used in the User Defined Node Definition File to access and assign data values are defined in Table 27 4 The translations of the macros and of macros used in the function argu ment lists are defined in the document Interface
49. digital to analog node bridge PORT_TABLE Port Name in out Description input output Direction in out Default_Type d v Allowed_Types a v vd i id d Vector yes yes Vector_Bounds Null_ Allowed no no PARAMETER_TABLE Parameter Name out_low Description O valued analog output Data_Type real Default_Value 0 0 Limits Vector no Vector Bounds Nul1_Allowed yes PARAMETER_TABLE Parameter_Name out high Description 1 valued analog output Data_Type real Default_Value 1 0 Limits Vector no Vector Bounds Nul1_Allowed yes PARAMETER_TABLE Parameter Name out_undef input_load Description U valued analog output input load F Data_Type real real Default_Value 0 5 1 0e 12 Limits 12 3 HYBRID MODELS 177 Vector no no Vector Bounds Null_Allovwed yes yes PARAMETER_TABLE Parameter_Name t_rise t_fall Description rise time 0 gt 1 fall time 1 gt 0 Data_Type real real Default_Value 1 0e 9 1 0e 9 Limits Vector no no Vector Bounds Null_ Allowed yes yes Description The dac_bridge is the first of two node bridge devices designed to allow for the ready transfer of digital information to analog values and back again The second device is the adc_bridge which takes an analog value and maps it to a digital one The dac_bridge takes as input a digital value from a digital node This value by definition may take on only one of the values
50. give it the host TYPE option TYPE can either be a short name for the system type such as sun4 or a canonical name with three fields CPU COMPANY SYSTEM See the file config sub for the possible values of each field If config sub isn t included in this package then this package doesn t need to know the host type If you are building compiler tools for cross compiling you can also use the target TYPE option to select the type of system they will produce code for and the build TYPE option to select the type of system on which you are compiling the package 31 1 11 Sharing Defaults If you want to set default values for configure scripts to share you can create a site shell script called config site that gives default values for variables like CC cache_file and prefix 31 2 NGSPICE COMPILATION UNDER WINDOWS OS 535 configure looks for PREFIX share config site if it exists then PREFIX etc config site if it exists Or you can set the CONFIG_SITE environment variable to the location of the site script A warning not all configure scripts look for a site script 31 1 12 Operation Controls configure recognizes the following options to control how it operates cache file FILE Use and save the results of the tests in FILE instead of config cache Set FILE to dev null to disable caching for debugging configure
51. is then iterated to solution with the interfaces between analog nodes and event driven nodes iterated for consistency across the entire system 38 CHAPTER 1 INTRODUCTION Once stable values are obtained for all nodes in the system the analysis halts and the results may be displayed or printed out as you request them A dc analysis is automatically performed prior to a transient analysis to determine the transient initial conditions and prior to an ac small signal analysis to determine the linearized small signal models for nonlinear devices If requested the dc small signal value of a transfer function ratio of output variable to input source input resistance and output resistance is also computed as a part of the dc solution The dc analysis can also be used to generate dc transfer curves a specified independent voltage current source resistor or temperature is stepped over a user specified range and the dc output variables are stored for each sequential source value 1 2 2 AC Small Signal Analysis AC analysis is limited to analog nodes and represents the small signal sinusoidal solution of the analog system described at a particular frequency or set of frequencies This analysis is similar to the DC analysis in that it represents the steady state behavior of the described system with a single input node at a given set of stimulus frequencies The program first computes the dc operating point of the circuit and determines linear
52. models used within the subcircuit Each vertical segment is actually a step with a width equal to the model delay 1e 9 seconds Plotting nodes internal to subcircuits works for both analog and event driven nodes r i tranl mixed io types l y pf out filt in Figure 26 3 Nutmeg Plot of Subcircuit Internal Node To examine data such as the closely spaced events inside the subcircuit at node xfilter xla it is often convenient to use the eprint command to produce a tabular listing of events Try this by entering the following command ngspice 4 gt eprint xfilter xla Results Data Time or Step xfilter xla 0 000000000e 000 0 000000e 000 1 010030000e 004 2 000000e 000 1 010040000e 004 2 562500e 000 1 210020000e 004 2 812500e 000 1 210030000e 004 4 253906e 000 1 410020000e 004 2 332031e 000 1 410030000e 004 3 283447e 000 1 610020000e 004 2 014893e 000 26 2 XSPICE ADVANCED USAGE 391 1 610030000e 004 1 469009e 000 1 810020000e 004 2 196854e 000 1 810030000e 004 1 176232e 000 9 610030000e 004 3 006294e 001 9 810020000e 004 2 304755e 000 9 810030000e 004 9 506230e 001 9 810090000e 004 3 049377e 000 9 810100000e 004 4 174377e 000 xx Messages x x eee Statistics xx Operating point analog event alternations 1 Operating point load calls 37 Operating point event passes 2 Transient analysis load calls 4299 Transient analysis timestep backups 87 This command produces a tabular
53. numerator gain real 1 0 no yes den_gain denominator gain real 1 0 no yes denominator lower limit real 1 0e 10 no yes den_domain denominator smoothing domain real 1 0e 10 no yes fraction smoothing fraction absolute value switch boolean false no yes out_gain out_offset 142 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed output gain real 1 0 no yes output offset real 0 0 no yes Description This function is a two quadrant divider It takes two inputs num numerator and den denominator Divide offsets its inputs multiplies them by their respective gains divides the results multiplies the quotient by the output gain and offsets the result The denominator is limited to a value above zero via a user specified lower limit This limit is approached through a quadratic smoothing function the domain of which may be spec ified as a fraction of the lower limit value default or as an absolute value This model will operate in DC AC and Transient analysis modes However in ac analysis it is im portant to remember that results are invalid unless only ONE INPUT of the divider is connected to a node which bears an AC signal this is exemplified by the use of the di vider to perform a potentiometer function one input is DC the other carries the AC
54. signal Example SPICE Usage a4 1 2 4 divider model divider divide num_offset 0 1 num _gain 2 5 den _offset 0 1 den _gain 5 0 den_lower limit 1e b den_domain 1e 6 fraction FALSE out_gain 1 0 out_offset 0 0 12 2 5 Limiter NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector cm_limit limit limit block in input in v v vd i id no no in_offset input offset real 0 0 no out output out V v vd i id no no gain gain real 1 0 no 12 2 ANALOG MODELS Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name 143 yes yes out_lower_limit out_upper_limit output lower limit output upper limit real real 0 0 1 0 no no yes yes limit_range upper amp lower smoothing range real 1 0e 6 no yes fraction Description smoothing fraction absolute value switch Data_Type boolean Default_Value FALSE Limits Vector no Vector Bounds Null_ Allowed yes
55. source FBl4 cir set rl0r12 math optimize minimumSteepestDescent cost 10000 10000 0 1 50 regexp 0 9 0O 9 rl0r12 r10r12 rl0 r12 Outputs optimization result 19 5 EXAMPLES 335 Results spice alter rl0 r10 spice alter r12 r12 foreach point temperatures_blt range 0 expr temperatures_blt length 1 tref_blt append iteration point disp_curve r10 r12 19 5 3 Progressive display This example is quite simple but it is very interesting It displays a transient simulation result on the fly You may now be familiar with most of the lines of this script It uses the ability of BLT objects to automatically update When the vector data is modified the strip chart display is modified accordingly 19 5 3 1 testbench2 tcl bin sh WishFix exec wish f 0 1 HHH package require BLT package require spice this avoids to type blt before the blt class commands namespace import blt wm title Vector Test script wm geometry 800x600 40 40 pack propagate false A strip chart with labels but without data is created and displayed packed 336 CHAPTER 19 TCLSPICE stripchart chart pack chart side top fill both expand true chart axis configure x title Time spice source example cir spice bg run after 1000 vector create a0 vector create bO vectorry create al vector create bl vector create stime proc blt
56. 0 1 or U The dac_bridge then outputs the value out_low out_high or out_undef or ramps linearly toward one of these final values from its current analog output level The speed at which this ramping occurs depends on the values of t_rise and t_fall These parameters are interpreted by the model such that the rise or fall slope generated is always constant Note that the dac_bridge includes test code in its cfunc mod file for determining the presence of the out_undef parameter If this parameter is not specified by you and if out_high and out_low values are specified then out_undef is assigned the value of the arithmetic mean of out_high and out_low This simplifies coding of output buffers where typically a logic family will include an out_low and out_high voltage but not an out_undef value This model also posts an input load value in farads based on the parameter input load Example SPICE Usage abridgel 7 2 daci model daci dac_bridge out_low 0 7 out_high 3 5 out_undef 2 2 input_load 5 0e 12 t_rise 50e 9 t_fall 20e 9 12 3 2 Analog to Digital Node Bridge NAME_TABLE C_Function_Name Spice_Model_Name cm_adc_bridge adc_bridge Description analog to digital node bridge PORT_TABLE Port Name in out Description input output Direction in out Default_Type v d Allowed_Types v vd i id d d Vector yes yes 178 CHAPTER 12 MIXED MODE AND BEHA
57. 1 0e 12 no yes enable_delay delay from enable set_delay delay from SET real real 1 0e 9 1 0e 9 1 0e 12 1 0e 12 no no yes yes reset_delay ic delay from RESET output initial state real boolean 1 0e 9 0 1 0e 12 no no yes yes sr_load enable load s amp r input loads F enable load value F real real 1 0e 12 1 0e 12 no no yes yes set_load reset_load set load value F reset load F real real 1 0e 12 1 0e 12 no no 206 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter Name rise_delay fall_delay Description rise delay fall delay Data_Type real real Default_Value 1 0e 9 1 0e 9 Limits 1 0e 12 1 0e 12 Vector no no Vector Bounds Null_ Allowed yes yes Description The digital sr type latch is a one bit level sensitive storage element which will output the value dictated by the state of the s and r pins whenever the enable input line is high ONE This value is stored i e held on the out line whenever the enable line is low ZERO The particular value chosen is as shown below s ZERO r ZERO gt out current value i e not change in output s ZERO r 0NE gt out ZERO s ONE r ZERO gt out 0NE s ONE r 0NE gt out UNKNOWN Asynchronous set and reset signals exist and each of the four methods of changing the stored output of the d srlatch 1 e
58. 10 100 1000Meg plot v 2 v 3 let flen length frequency length of the vector let loopcounter 0 echo output test gt text txt start new file test txt x loop while loopcounter It flen let vout2 v 2 loopcounter generate a single point complex vector let vout2re real vout2 generate a single point real vector let vout2im imag vout2 generate a single point imaginary vector let vout3 v 3 loopcounter generate a single point complex vector let vout3re real vout3 generate a single point real vector let vout3im imag vout3 generate a single point imaginary vector let freq frequency loopcounter generate a single point vector echo bbb amp freq amp vout2re amp vout2im amp vout3re amp vout3im gt gt text txt append text and data to file continued fromm line above let loopcounter loopcounter 1 end endc MODEL N1 NMOS LEVEL 14 VERSION 4 3 0 TNOM 27 end 17 9 Scattering parameters s parameters 17 9 1 Intro A command line script available from the ngspice distribution at examples control_structs s param cir together with the command wrs2p see chapt 17 5 83 allows to calculate print and plot the scattering parameters S11 S21 S12 and S22 of any two port circuit at varying frequencies The printed output using wrs2p is a Touchstone version 1 format file The file follows the format according to The Touchstone File Format Specification Version 2 0 availab
59. 10k sl 10 0 1 O switchl OFF s2 20 0 2 0 switchl OFF s3 30 0 2 0 switchl ON model switch sw vt 1 vh 0 2 ron 1 roff 10k x wl 40 0 vm3 wswitchl off model wswitchl csw it Ilm ih 0 2m ron 1 roff 10k x control run plot v 1 v 10 plot v 10 vs v 1 lt get hysteresis loop plot v 2 v 20 lt different initial values plot v 20 vs v 2 lt get hysteresis loop plot v 2 v 30 lt different initial values plot v 30 vs v 2 lt get hysteresis loop plot v 40 vs vm3 branch lt current controlled switch hysteresis endc end 76 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS Chapter 4 Voltage and Current Sources 4 1 Independent Sources for Voltage or Current General form VXXXXXXX N N lt lt DC gt DC TRAN VALUE gt lt AC lt ACMAG lt ACPHASE gt gt gt lt DISTOFI lt FIMAG lt FIPHASE gt gt gt lt DISTOF2 lt F2MAG lt F2PHASE gt gt gt IYYYYYYY N N lt lt DC gt DC TRAN VALUE gt lt AC lt ACMAG lt ACPHASE gt gt gt lt DISTOFI lt FIMAG lt FIPHASE gt gt gt lt DISTOF2 lt F2MAG lt F2PHASE gt gt gt Examples VCC 10 0 DC 6 VIN 13 2 0 001 AC 1 SIN O 1 1MEG ISRC 23 21 AC 0 333 45 0 SFFM O 1 10K 5 1K VMEAS 12 9 VCARRIER 1 0 DISTOF1 0 1 90 0 VMODULATOR 2 0 DISTOF2 0 01 IIN1 1 5 AC 1 DISTOF1 DISTOF2 0 001 n and n are the positive and negative nodes respectively Note that voltage sources need not be grounded Positive c
60. 12 no yes sr_load set reset loads F real reset asynchronous reset in d a no yes Nout inverted data output out d a no yes set_delay delay from set real 1 0e 9 1 0e 12 no yes ic output initial state int 0 0 2 no yes clk load clk load value F real 12 4 DIGITAL MODELS Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed 1 0e 12 no a set_load set load value F real 1 0e 12 no yes rise_ delay rise delay real 1 0e 9 1 0e 12 no yes 201 1 0e 12 no yes reset_load reset load F real 1 0e 12 no yes fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital sr type flip flop is a one bit edge triggered storage element which will store data whenever the clk input line transitions from low to high ZERO to ONE The value stored i e the out value will depend on the s and r input pin values and will be out 0NE out ZERO out previous value out UNKNOWN if s 0NE and r ZERO if s ZERO and r ONE if s ZERO and r ZERO if s 0NE and r ONE In addition asynchronous set and reset signal
61. 18u 30u IRTS3 10 0 DC O trnoise 0 0 0 O 10m 20u 40u IALL 10 0 DC O trnoise Im lu 1 0 0 1m 15m 22u 50u R10 10 0 1 IWlof 9 0 DC trnoise lm lu 1 0 0 1m Rall 9 0 1 x sample points tran lu 500u control run plot v 13 v 21 plot v 10 v 9 endc end Some details on RTS noise modeling are available in a recent article 20 available here Anyhow this transient noise feature is still experimental The following questions among others are to be solved e clarify the theoretical background noise limit of plain ngspice numerical solver fft etc time step NT selection calibration of noise spectral density e how to generate noise from a transistor model application benefits and limits 15 4 MEASUREMENTS AFTER OP AC AND TRANSIENT ANALYSIS 235 15 3 11 PSS Periodic Steady State Analysis Experimental code not yet made publicly available General form pss gfreq tstab oscnob psspoints harms sciter steadycoeff lt uic gt Examples pss 150 200e 3 2 1024 11 50 5e 3 uic pss 624e6 lu v_plus 1024 10 150 5e 3 uic pss 624e6 500n bout 1024 10 100 5e 3 uic gfreq is guessed frequency of fundamental suggested by user When performing transient analysis the PSS algorithm tries to infer a new rough guess rgfreq on the fundamental If gfreq is out of 10 with respect to rgfreq then gfreq is discarded tstab is stabilization time before the shooting begin to search for the PSS It has to be noticed that
62. 1999 see chapt 32 21 32 2 ngspice license The SPICE license is the Modified BSD license see http embedded eecs berkeley edu pubs downloads spice index htm ngspice adopts this Modified BSD license as well for all of its source code except of 32 2 NGSPICE LICENSE 545 tclspice and numparam which are under LGPLv2 and XSPICE which is public domain see 32 2 2 Fis FAS 28 28 FAS E E K K E K K k FAS 2 k FAS 28 E K k K K K K K K K k K K K K K K KK K K K K K K K K KK O K K K K K K K K 2K K K K Copyright c 1985 1991 The Regents of the University of California All rights reserved Permission is hereby granted without written agreement and without license or royalty fees to use copy modify and distribute this software and its documentation for any purpose provided that the above copyright notice and the following two paragraphs appear in all copies of this software IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE THE SOFT WARE PROVIDED HEREUNDER IS ON AN AS IS BASIS AND THE UNIVERSITY OF CA
63. 2 o 2 o Ax y gt e y Q Ay VIN ag 1 375 see A T O e4 Zz 7 SZ Z WZ Y Figure 25 2 Example Circuit 2 25 1 1 2 Models and Subcircuits The file discussed in the previous section illustrated the most basic syntax rules of a circuit description file However ngspice and other SPICE based simulators include many other features which allow for accurate modeling of semiconductor devices such as diodes and tran sistors and for grouping elements of a circuit into a macro or subcircuit description which can be reused throughout a circuit description For instance the file shown below is a representation of the schematic shown in Figure 25 2 Small Signal Amplifier with Limit Diodes This circuit simulates a small signal amplifier with a diode limiter dc Vin 1 1 05 Vin Input 0 DC 0 R_source Input Amp_In 100 D_Neg O Amp_In 1n4148 D_Pos Amp_In 0 1n4148 C1 Amp_In 0 1uF X1 Amp_In O Amp Out Amplifier R_Load Amp_Out O 1000 model 1n4148 D is 2 495E 09 rs 4 755E 01 n 1 679E 00 tt 3 030E 09 cjo 1 700E 12 vj 1 m 1 959E 01 bv 1 000E 02 ibv 1 000E 04 subckt Amplifier Input Common Output El Output Common Input Common 10 R_Input Input Common imeg ends Amplifier end 25 1 SIMULATION AND MODELING OVERVIEW 375 This is the same basic circuit as in the initial example with the addition of two components and some changes to the simulation file The two diodes have been in
64. 20 6 2 4 1 SUBCKT Line General form SUBCKT subnam NI lt N2 N3 gt Examples SUBCKT OPAMP 1 2 3 4 A circuit definition is begun with a SUBCKT line SUBNAM is the subcircuit name and N1 N2 are the external nodes which cannot be zero The group of element lines which immediately follow the SUBCKT line define the subcircuit The last line in a subcircuit definition is the ENDS line see below Control lines may not appear within a subcircuit definition however subcircuit definitions may contain anything else including other subcircuit definitions device models and subcircuit calls see below Note that any device models or subcircuit definitions included as part of a subcircuit definition are strictly local 1 e such models and definitions are not known outside the subcircuit definition Also any element nodes not included on the SUBCKT line are strictly local with the exception of 0 ground which is always global If you use parameters the SUBCKT line will be extended see 2 8 3 2 5 GLOBAL 51 2 4 2 ENDS Line General form ENDS lt SUBNAM gt Examples ENDS OPAMP The ENDS line must be the last one for any subcircuit definition The subcircuit name if included indicates which subcircuit definition is being terminated if omitted all subcircuits being defined are terminated The name is needed only when nested subcircuit definitions are being made 2 4 3 Subcircuit Calls General
65. 3 2 4 TNOM 27 TOX 7 4E 9 end The device identifier is the first letter extracted from the device name e g m for a MOS tran sistor Please note that the parameter tables presented below do not provide the detailed information available about the parameters provided in the section on each device and model but are pro vided as a quick reference guide 30 1 ELEMENTARY DEVICES 30 1 Elementary Devices 30 1 1 Resistor 30 1 1 1 Resistor instance parameters Name Direction Type Description 1 resistance InOut real Resistance 10 ac InOut real AC resistance value 8 temp InOut real Instance operating temperature 14 dtemp InOut real Instance temperature difference with the rest of the circuit 311 InOut real Length 2 w InOut real Width 12 m InOut real Multiplication factor 16 tc InOut real First order temp coefficient 16 tcl InOut real First order temp coefficient 17 tc2 InOut real Second order temp coefficient 13 scale InOut real Scale factor 15 noisy InOut integer Resistor generate noise 5 sens_resist In flag flag to request sensitivity WRT resistance 6 i Out real Current 7 p Out real Power 206 sens_dc Out real dc sensitivity 201 sens_real Out real dc sensitivity and real part of ac sensitivity 202 sens_imag Out real dc sensitivity and imag part of ac sensitivity 203 sens_mag Out real ac sensitivity of m
66. 3 6 PZ Pole Zero Analysis we eR Oe eee ES es 4 230 15 3 7 SENS DC or Small Signal AC Sensitivity Analysis 230 15 3 8 TF Transfer Function Analysis 2 6 hh ee e 231 15 3 9 TRAN Transient Analysis aoaaa e 231 15 3 10 Transient noise analysis at low frequency 231 15 3 11 PSS Periodic Steady State Analysis 235 15 4 Measurements after Op Ac and Transient Analysis 235 1541 meas Ore e e e Se a A a ESE a 235 15 4 2 batch versus interactive mode cece a 236 Seo General remarks coc card AA 236 DAA DOUE ee os ees node E REA 237 LES Tos Tag iso a oe ooo A OER EES EER EERE SS 237 Ao Findes WO oe eg Gr os Oe he Yee AAA 238 15 4 7 AVGIMINIMAXIPPIRMSIMIN_ATIMAX_AT 240 LIM ES lt a re Oe AR Se Bore Shee ROK OG Re 240 LAS PM Sue Se BM eS Ee EH EOE EEG EE Ed ed BESO 240 AA II expression e oci sco ie eke Giese ROS RRR Bl Ewa es 241 i ADE we bck ee ode dc Hedeed eed eeenh lt eega nse 241 154 12 M re example co ee a eR Re OS BS ES 241 UNS BAA cesos A A ARE EEE OEE EEE A 242 15 5 1 SAVE Name vector s to be saved in raw file 242 e a PRINT LIS a aa A ENT A RA ARAS ARA 243 15 5 3 PLOT Lines soarge RR RRA hr aer 244 15 5 4 FOUR Fourier Analysis of Transient Analysis Output 244 15 5 5 PROBE Name vector s to be saved in raw file 245 15 5 6 par expression Algebraic expressions for output 245 15
67. 4 v 1 2 vd 3 4 Example 3 Identical to the previous example parenthesis are added for additional clarity 4v 1 2 vd 3 4 Example 4 Specifies that the node numbers are to be treated in the default fashion for the particular model If this model had v as a default for this port then this notation would represent four single ended voltage connections 1 2 3 4 136 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Port Type Modifiers Modifier Interpretation Jon represents a single ended voltage port one node name or number is expected for each port Jal represents a single ended current port one node name or number is expected for each port hg represents a single ended voltage input current output VCCS port one node name or number is expected for each port This type of port is auto matically an input output h represents a single ended current input voltage output CCVS port one node name or number is expected for each port This type of port is auto matically an input output d represents a digital port one node name or number is expected for each port This type of port may be either an input or an output vnam represents the name of a voltage source the current through which is taken as an input This notation is provided primarily in order to allow models defined using SPICE2G6 syntax to operate properly in XSPICE vd represents a differ
68. 5 7 PION cercos ii e a a a 245 CONTENTS 16 Starting ngspice 16 1 SIONS dors Bek Bh GG hw A A A T ae a A A a 16 2 Where to obtain naspice nec hehe Re ES 16 3 Command line options for starting ngspice andngnutmeg 16 4 Stanne AA IGN Ps eae er ee AA AA nan ESSERE ERE ES 16 4 2 Interactive mode lt c coso a AA OES 16 4 3 Interactive mode with control file or control section 16 5 Standard configuration file spinit aaa 16 6 User defined configuration file spiceinit ooa o 16 7 Environmental variables lt ias daa AA AAA RRA Ss 16 7 1 Nespice specific variables o coooooooo ona s 16 7 2 Common environment variables co ooooosors rs es LN a o AE 16 9 Simulation time cocos er 16 10Ngspice on multi core processors using OpenMP 16 10 1 Introduction lt ss ec s scoe HR EES EEL ESE EE RES BEES S 16 10 2 Some results occipital IGIS A E E E E Ea a Ge Fee I A E Bs 1610 4 Literature e oec ee ed oS AS ESL E AR S 16 11 Server mode option S n aooaa 16 12Ngspice control via input output fifos aoaaa e 16 13Compatibility s ee s e ee naa de a ai OSES y a a a A 16 13 1 Compatibility mode aoaaa e 16 13 2 Missing functions o se s reren eo Pew Poe Pees IADE o e e ae e e a u aaea a OM RHE oS a a RE 16 13 4 Controls and commands a 16 14Reporting bugs and errors occ eR ew Ro Pee Pan oes 24 17 Interactive Interpreter 17 1 UU o oc e Se
69. AC values of the actual harmonic components and are not equal to HD2 and HD3 To obtain HD2 and HD3 one must divide by the corresponding AC values at F obtained from an ac line This division can be done using ngnutmeg commands If the optional f20verf1 parameter is specified it should be a real number between and not equal to 0 0 and 1 0 in this case disto does a spectral analysis It considers the circuit with sinusoidal inputs at two different frequencies F and F2 F is swept according to the disto control line options exactly as in the ac control line F gt is kept fixed at a single frequency as F sweeps the value at which it is kept fixed is equal to f2overf1 times fstart Each independent source in the circuit may potentially have two superimposed sinusoidal inputs for distortion at the frequencies F and F2 The magnitude and phase of the F component are specified by the arguments of the distof1 keyword in the source s input line see the descrip tion of independent sources the magnitude and phase of the Fy component are specified by the arguments of the distof2 keyword The analysis produces plots of all node voltages branch currents at the intermodulation product frequencies F Fo F Fo and 2F Fy vs the swept frequency F The IM product of interest may be selected using the setplot command and displayed with the print and plot commands It is to be noted as in the harmonic analysis case the results
70. ANALYSES AND OUTPUT CONTROL BATCH MODE 15 5 3 PLOT Lines General form plot pltype ovl lt plol phil gt lt ov2 lt plo2 phi2 gt ov8 gt Examples plot de v 4 v 5 v 1 plot tran v 17 5 2 5 1 vin v 17 1 9 plot ac vm 5 vm 31 24 vdb 5 vp 5 plot disto hd2 hd3 R sim2 plot tran v 5 3 v 4 0 5 v 7 0 10 The plot line defines the contents of one plot of from one to eight output variables pltype is the type of analysis DC AC TRAN NOISE or DISTO for which the specified outputs are desired The syntax for the ovi is identical to that for the print line and for the plot command in the interactive mode The overlap of two or more traces on any plot is indicated by the letter X When more than one output variable appears on the same plot the first variable specified is printed as well as plotted If a printout of all variables is desired then a companion print line should be included There is no limit on the number of plot lines specified for each type of analysis The par expression option 15 5 6 allows to use algebraic expressions in the plot lines 15 5 4 FOUR Fourier Analysis of Transient Analysis Output General form four freq ovl lt ov2 ov3 gt Examples four 100K v 5 The four or Fourier line controls whether ngspice performs a Fourier analysis as a part of the transient analysis freq is the fundamental frequency and ov1 is the desired vector
71. B source ASRC 5 1 1 Syntax and usage General form BXXXXXXX n n lt i expr gt lt v expr gt lt tcl value gt lt tc2 value gt lt temp value gt lt dtemp value gt Examples B1 0 1 I cos v 1 sin v 2 B2 0 1 V In cos log v 1 2 2 v 3 444 v 2 4v 1 B3 3 4 I 17 B4 3 4 V exp pi 1 vdd B5 20V V 1 lt Vlow Vlow V 1 gt Vhigh Vhigh V 1 n is the positive node and n is the negative node The values of the V and I parameters determine the voltages and currents across and through the device respectively If I is given then the device is a current source and if V is given the device is a voltage source One and only one of these parameters must be given A simple model is implemented for temperature behaviour by the formula I T 1 TNOM 1 TC T TNOM TC T TNOM 5 1 or 85 86 CHAPTER 5 NON LINEAR DEPENDENT SOURCES BEHAVIORAL SOURCES V T V TNOM 1 TC T TNOM TCa T TNOM 5 2 In the above formula T represents the instance temperature which can be explicitly set using the temp keyword or calculated using the circuit temperature and dtemp if present If both temp and dtemp are specified the latter is ignored The small signal AC behavior of the nonlinear source is a linear dependent source or sources with a proportionality constant equal to the derivative or derivatives of the source at the DC operating point The expressions give
72. Bulk Source conductance 223 cbd Out real Bulk Drain capacitance 224 cbs Out real Bulk Source capacitance 233 cgs Out real Gate Source capacitance 236 cgd Out real Gate Drain capacitance 239 cgb Out real Gate Bulk capacitance 235 cqgs Out real Capacitance due to gate source charge storage 238 cqgd Out real Capacitance due to gate drain charge storage 241 cqgb Out real Capacitance due to gate bulk charge storage 243 cqbd Out real Capacitance due to bulk drain charge storage 245 cqbs Out real Capacitance due to bulk source charge storage 225 cbdO Out real Zero Bias B D junction capacitance 226 cbdsw0 Out real 227 cbsO Out real Zero Bias B S junction capacitance 228 cbsswO Out real 234 qgs Out real Gate Source charge storage 237 qgd Out real Gate Drain charge storage 240 qgb Out real Gate Bulk charge storage 242 qbd Out real Bulk Drain charge storage 244 qbs Out real Bulk Source charge storage 19 p Out real Instaneous power 256 sens_1_de Out real dc sensitivity wrt length 246 sens_l real Out real real part of ac sensitivity wrt length 247 sens_l_imag Out real imag part of ac sensitivity wrt length 248 sens_l_mag Out real sensitivity wrt l of ac magnitude 249 sens_l_ph Out real sensitivity wrt l of ac phase 250 sens_l_cplx Out complex ac sensitivity wrt length 257 sens_w_dc Out real dc sensitivity wrt width 251 sens_w_real Out real real part of ac sensitivity wrt width 252 sens_w_imag Out r
73. Collector conductance 306 emitterconduct Out real Emitter conductance 307 transtimevbcfact Out real Transit time VBC factor 308 excessphasefactor Out real Excess phase fact 143 tnom InOut real Parameter measurement temperature 145 kf InOut real Flicker Noise Coefficient 144 af InOut real Flicker Noise Exponent 30 4 BJTS 495 30 4 2 BJT Bipolar Junction Transistor Level 2 30 4 2 1 BJT2 instance parameters Name Direction Type Description 2 off InOut flag Device initially off 3 icvbe InOut real Initial B E voltage 4 icvce InOut real Initial C E voltage 1 area InOut real Emitter Area factor 10 areab InOut real Base area factor 11 areac InOut real Collector area factor 9 m InOut real Parallel Multiplier 5 ic In real vector Initial condition vector 6 sens_area In flag flag to request sensitivity WRT area 202 colnode Out integer Number of collector node 203 basenode Out integer Number of base node 204 emitnode Out integer Number of emitter node 205 substnode Out integer Number of substrate node 206 colprimenode Out integer Internal collector node 207 baseprimenode Out integer Internal base node 208 emitprimenode Out integer Internal emitter node 211 ic Out real Current at collector node 212 ib Out real
74. Current at base node 236 ie Out real Emitter current 237 is Out real Substrate current 209 vbe Out real B E voltage 210 vbe Out real B C voltage 215 gm Out real Small signal transconductance 213 gpi Out real Small signal input conductance pi 214 gmu Out real Small signal conductance mu 225 gx Out real Conductance from base to internal base 216 go Out real Small signal output conductance 227 geqcb Out real d Ibe d Vbc 228 gcsub Out real Internal Subs cap equiv cond 243 gdsub Out real Internal Subs Diode equiv cond 229 geqbx Out real Internal C B base cap equiv cond 239 cpi Out real Internal base to emitter capactance 240 cmu Out real Internal base to collector capactiance 241 cbx Out real Base to collector capacitance 242 csub Out real Substrate capacitance 218 cqbe Out real Cap due to charge storage in B E jet 220 cqbc Out real Cap due to charge storage in B C jct 222 cqsub Out real Cap due to charge storage in Subs jct 224 cqbx Out real Cap due to charge storage in B X jct 226 cexbe Out real Total Capacitance in B X junction 217 qbe Out real Charge storage B E junction 219 qbc Out real Charge storage B C junction 496 CHAPTER 30 MODEL AND DEVICE PARAMETERS 221 qsub Out real Charge storage Subs junction 223 qbx Out real C
75. Default Mask Width m DefL Real Default Mask Length m Base Area Real 1D BJT base area relative to emitter area Base Length Real Real 1D BJT base contact length um Base Depth Real ID BJT base contact depth um TNom Real Nominal measurement temperature C 29 13 3 Examples Normally a numos device model is used for MOSFET devices However it can be changed into a bipolar with substrate contact model by specifying a bipolar structure using the other cards and indicating the device structure type as shown here The default length is set to 1 0 um so that when mask area is specified on the element line it can be devided by this default to obtain the device width options bipolar defl 1 0 Specify that a 1D BJT has base area 1 10th that of the emitter has an effective depth of 0 2 um and a length between the internal and external base contacts options base area 0 1 base depth 0 2 base len 1 5 If a circuit contains two instances of a bipolar transistor model named q1 and q2 the fol lowing line tells the simulator to look for initial conditions in the OP1 q2 respectively The period in the middle of the names is added automatically options unique ic file 0Pl 29 13 4 See also numd nbjt numos 29 14 OUTPUT 461 29 14 OUTPUT Identify information to be printed or saved SYNOPSIS output debugging flags general info saved solutions 29 14 1 DESCRIPTION The output card i
76. Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector no Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector 165 cm_core core magnetic core mc magnetic core inout gd g gd no H_array magnetic field array real B_array flux density array real yes 2 no yes 2 no area cross sectional area real length core length real no no no no input_domain input sm domain real 0 01 1e 12 0 5 no yes fraction smoothing fraction abs switch boolean TRUE no 166 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Defau
77. Design Document for the XSPICE Simulator of the Automatic Test Equipment Software Support Environment ATESSE 27 8 2 Function Library The functions required and optional that define a User Defined Node are listed below For optional functions the function stub can be deleted from the udnfunc c file template created by mkudndir and the pointer in the Evt_Udn_Info_t structure can be changed to NULL Required functions create Allocate data structure used as inputs and outputs to code models initialize Set structure to appropriate initial value for first use as model input copy Make a copy of the contents into created but possibly uninitialized structure compare Determine if two structures are equal in value 27 8 USER DEFINED NODE DEFINITION FILE 421 Name Type Description MALLOCED_PTR void Assign pointer to allocated structure to this macro STRUCT_PTR void A pointer to a structure of the defined type STRUCT_PTR_1 void A pointer to a structure of the defined type STRUCT_PTR_2 void A pointer to a structure of the defined type EQUAL Mif_Boolean_t Assign TRUE or FALSE to this macro according to the results of structure comparison INPUT_STRUCT_PTR void A pointer to a structure of the defined type OUTPUT_STRUCT_PTR void A pointer to a structure of the defined type INPUT_STRUCT_PTR_ARRAY void An array of pointers to structures of
78. ELECTRODE Set location of a contact to the device SYNOPSIS electrode number position 29 7 1 DESCRIPTION Each device has several electrodes which are used to connect the device to the rest of the circuit The number of electrodes depends on the type of device For example a MOSFET needs 4 electrodes A particular electrode can be identified by its position in the list of circuit nodes on the device element line For example the drain node of a MOSFET is electrode number 1 while the bulk node is electrode number 4 Electrodes for which an ID number has not been specified are assigned values sequentially in the order they appear in the input file For ID devices the positions of two of the electrodes are predefined to be at the ends of the simulation mesh The first electrode is at the low end of the mesh and the last electrode is at the high end The position of the special ID BJT base contact is set on the options card Thus electrode cards are used exclusively for 2D devices Each card associates a portion of the simulation mesh with a particular electrode In contrast to domains which are specified only in terms of boxes electrodes can also be specified in terms of line segments Boxes and segments for the same electrode do not have to overlap If they don t it is assumed that the electrode is wired together outside the area covered by the simulation mesh However pieces of different electrodes must not overlap since this woul
79. FOR A PAR TICULAR PURPOSE THE SOFTWARE PROVIDED HEREUNDER IS ON AN AS IS BA SIS AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATIONS TO PROVIDE MAINTENANCE SUPPORT UPDATES ENHANCEMENTS OR MODIFICATIONS 32 1 2 XSPICE SOFTWARE documentation copyright Code added to SPICE3 to create the XSPICE Simulator and the XSPICE Code Model Subsys tem was developed at the Computer Science and Information Technology Laboratory Georgia Tech Research Institute Atlanta GA and is covered by license agreement the following copy right 543 544 CHAPTER 32 COPYRIGHTS AND LICENSES Copyright 1992 Georgia Tech Research Corporation All Rights Reserved This material may be reproduced by or for the U S Government pursuant to the copyright license under the clause at DFARS 252 227 7013 Oct 1988 Refer to U C Berkeley and Georgia Tech license agreements for additional information This license is now superceeded by chapt 32 2 2 32 1 3 CIDER RESEARCH SOFTWARE AGREEMENT superseded by 32 2 1 This chapter specifies the terms under which the CIDER software and documentation coming with the original distribution are provided This agreement is superseded by 32 2 1 the modi fied BSD licence Software is distributed as is completely without warranty or service support The University of California and its employees are not liable for the condition or performance of the software The University does not warrant that it owns the copyri
80. Flop NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed cm_d_tff d_tff digital toggle flip flop t toggle input in d a no no clk clock in d a no no CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default_Value Limits Vector Vector _Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description set set in d d no yes out data output out d a no yes clk_delay delay from clk real 1 0e 9 1 0e 12 no yes reset_delay delay from reset real 1 0 1 0e 12 no yes t_load toggle load value F real 1 0e 12 i ee set_load set load value F reset reset in d La no yes Nout inverted data output
81. Frequency extrapolation limited to 1le 16 This error occurs whenever the controlling input value is such that the output frequency ordi narily would be set to a negative value Consequently the output frequency has been clamped to a near zero value square_array_error xx xx xx x Error x SQUARE Size of control array different than frequency array This error message normally occurs whenever the controlling input array and the frequency array are different sizes 438 CHAPTER 28 ERROR MESSAGES 28 3 12 Code Model triangle triangle allocation_error KKKK Error x TRIANGLE Error allocating triangle block storage Generic storage allocation error triangle freq_clamp 2 2k KK Warning 2K k KK TRIANGLE Extrapolated Minimum Frequency Set to 1e 16 Hz This error occurs whenever the controlling input value is such that the output frequency ordi narily would be set to a negative value Consequently the output frequency has been clamped to a near zero value triangle array_error KKKK Error x TRIANGLE Size of control array different than frequency array This error message normally occurs whenever the controlling input array and the frequency array are different sizes Part HI CIDER 439 Chapter 29 CIDER User s Manual The CIDER User s Manual that follows is derived from the original manual being part of the PhD thesis from David A Gates from UC Berkeley Unfortunately the manual here is not yet com
82. InOut instance Name of controlling source 6 sens_gain In flag flag to request sensitivity WRT gain 4 neg_node Out integer Negative node of source 3 pos_node Out integer Positive node of source 7 i Out real CCCS output current 9 jv Out real CCCS voltage at output 8 p Out real CCCS power 206 sens_dc Out real dc sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real imag part of ac sensitivity 203 sens_mag Out real sensitivity of ac magnitude 204 sens_ph Out real sensitivity of ac phase 205 sens_cplx Out complex ac sensitivity 30 2 5 CCVS Current controlled voltage source 30 2 5 1 CCVS instance parameters Name Direction Type Description 1 gain InOut real Transresistance gain 2 control InOut instance Controlling voltage source 7 sens_trans In flag flag to request sens WRT transimpedance 3 pos_node Out integer Positive node of source 4 neg_node Out integer Negative node of source 8 1 Out real CCVS output current 10 v Out real CCVS output voltage 9 p Out real CCVS power 206 sens_dc Out real dc sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real imag part of ac sensitivity 203 sens_mag Out real sensitivity of ac magnitude 204 sens_ph Out real sensitivity of ac phase 205 sens_cplx Out complex ac sensitivity 485 486 C
83. K K K K K K K K K end and start ngspice in interactive mode e g by running the command ngspice inputfile meas lt ure gt then prints its user defined data analysis to the standard output The analysis in cludes propagation delay rise time fall time peak to peak voltage minimum or maximum voltage the integral or derivative over a specified period and several other user defined values 15 4 3 General remarks The measure type DCIACITRANISP depends on the data which are to be evaluated either originating from a dc analysis an ac analysis a transient simulation SP to analyse a spectrum from the spec or fft commands is only available when executed in a meas command see 17 300 result will be a vector containing the result of the measurement trig_variable targ_variable and out_variable are vectors stemming from the simulation e g a voltage vector v out VAL val expects a real number val It may be as well a parameter in or expanding to a real number TD td and AT time expect a time value if measure type is tran For ac and sp AT will be a frequency value TD is ignored For de analysis AT is a voltage or current TD is ignored as well CROSS requires an integer number CROSS LAST is possible as well The same is expected by RISE and FALL 15 4 MEASUREMENTS AFTER OP AC AND TRANSIENT ANALYSIS 237 Frequency and time values may start at 0 and extend to positive real numbers Voltage or current input
84. LEVEL at which smoothing occurs Thus for an input gain of 2 0 and output limits of 1 0 and 1 0 volts the output will begin to smooth out at 0 9 volts which occurs when the input value is at 0 4 Note also that the Controlled Limiter code tests the input values of cntl_lower and cntl_upper to make sure that they are spaced far enough apart to guarantee the existence of a linear range be tween them The range is calculated as the difference between cntl_upper upper_delta limit_range and cntl_lower lower_delta limit_range and must be greater than or equal to zero Note that when the limit range is specified as a fractional value the limit range used in the above is taken as the calculated fraction of the difference between cntl upper and cntl lower Still the potential exists for too great a limit range value to be specified for proper operation in which case the model will return an error message Example SPICE Usage a6 3 6 8 4 varlimit model varlimit climit in_offset 0 1 gain 2 5 upper_delta 0 0 lower_delta 0 0 limit_range 0 10 fraction FALSE 12 2 7 PWL Controlled Source NAME_TABLE C_Function_Name cm_pwl Spice_Model_ Name pwl Description piecewise linear controlled source PORT_TABLE Port_Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id vnam v vd i id Vector no no Vector Bounds Null_Allowed no no PARAMETER_TABLE Parameter_Name X_arra
85. Layer Width Real Width of surface layer um 29 2 3 EXAMPLES The following shows how the surface recombination velocities at an Si S102 interface might be set interface dom 1 neigh 2 sn 1 0e4 sp 1 0Oe4 In a MOSFET with a 2 0m gate width and 0 1 um source and drain overlap the surface channel can be restricted to the region between the metallurgical junctions and within 100 A 0 01 um of the interface interface dom 1 neigh 2 x l 1 1 x h 2 9 layer w 0 01 The inversion layer width in the previous example can be automatically determined by setting the estimate to 0 0 interface dom 1 neigh x l 1 1l x h 2 9 layer w 0 0 29 3 COMMENT Add explanatory comments to a device definition SYNOPSIS comment text text text text 29 4 CONTACT 445 29 3 1 DESCRIPTION Annotations can be added to a device definition using the comment card All text on a comment card is ignored Several popular commenting characters are also supported as aliases from SPICE from PISCES and from LINUX shell scripts 29 3 2 EXAMPLES A SPICE like comment is followed by a PISCES like comment and shell script comment CIDER and SPICE would ignore this input line CIDER and PISCES would ignore this but SPICE wouldn t CIDER and LINUX Shell scripts would ignore this input line 29 4 CONTACT Specify properties of an electrode SYNOPSIS contact number workfunction 29 4 1 DESCRIPT
86. Mode mode 2 The core model in HYSTERESIS mode takes as input a voltage which it treats as a magnetomo tive force mmf value This value is used as input to the equivalent of a hysteresis code model block The parameters defining the input low and high values the output low and high values and the amount of hysteresis are as in that model The output from this mode as in PWL mode is a current value which is seen across the mc port An example of the core model used in this fashion is shown below 168 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Example SPICE Usage al 2 0 3 0 primary model primary lcouple num_turns 155 a2 3 4 iron_core model iron_core core mode 2 in_low 7 0 in_high 7 0 out_lower_limit 2 5e 4 out_upper_limit 2 5e 4 hyst 2 3 a3 5 0 4 0 secondary model secondary lcouple num_turns 310 One final note to be made about the two core model nodes is that certain parameters are avail able in one mode but not in the other In particular the in_low in_high out_lower_limit out_upper_limit and hysteresis parameters are not available in PWL mode Likewise the H_array B_array area and length values are unavailable in HYSTERESIS mode The input domain and fraction parameters are common to both modes though their behavior is somewhat different for explanation of the input domain and fraction values for the HYSTERESIS mode you should refer to the hysteresis code model di
87. Monte Carlo Simulation The ngspice scripting language may be used to run Monte Carlo simulations with statistically varying device or model parameters Calls to the functions sgauss 0 or sunif 0 see 17 2 will return Gaussian or uniform distributed random numbers real numbers stored in a vector You may define see 17 5 13 your own function using sgauss or sunif e g to change the mean or range In a loop see 17 6 then you may call the alter 17 5 3 or altermod 17 5 4 statements with random parameters followed by an analysis like op dc ac tran or other 21 5 1 Example 1 The first examples is a LC band pass filter where L and C device parameters will be changed 100 times Each change is followed by an ac analysis All graphs of output voltage versus frequency are plotted The file is available in the distribution as examples Monte_Carlo MonteCarlo sp as well as from the CVS repository 354 CHAPTER 21 STATISTICAL CIRCUIT ANALYSIS Monte Carlo example 1 Perform Monte Carlo simulation in ngspice N001 0 AC 1 DC O N002 NOOI 141 v1 R1 Cl LI C2 L2 L3 C3 R2 C OUT 0 OUT 0 le 09 10e 06 N002 0 le 09 N002 0 10e 06 N003 N002 40e 06 OUT N003 250e 12 0 OUT ontrol 141 let mc_runs 100 let run 1 set curplot new create a new plot set scratch curplot store its name to scratch define define define define unif nom var nom nomxvar sunif 0 aunif
88. PARAMETERS escroto OSS EER EEE SEM RES 444 tee ESO oa She he eee oh ee ee oe eet ee 444 29 3 COMMENT o o o ehk Ke ER EERE AAA AAA FER EERE 444 2 DESCRIPTION aora a GSS 445 29932 EXAMPLES Bs ss RA 445 TAR CONTACT ca Baw A ORK RR AR AR AAA ARA 445 294 1 DESCRIPTION ec aena drenan aa 445 294 2 PARAMETERS 2 444255 nan ahu 49S a A See A AR ia 445 OSs PASS cas eh ee hee eee ee hee e a e e 445 2944 SEEALSO oo o a RS HS GE Oe Seb GS a i i 445 29 5 DOMAIN REGION 22444444 4444544 4444 4 6 4 434468 446 CONTENTS 21 29 5 1 DESCRIPTION ae hace ease scena acd BIE oe AA 446 29 5 2 PARAMETERS cca ede ssa ER ns ara RS ROS KG 446 29539 EXAMPLES Sar pi ee OR NA 446 AA EE ee SS RE AOE BS OES BE RG ME ES a 447 ls E 447 2961 DESCRIPTION scoica AAA AAA A a 447 2902 PARAMETERS 454454605 4044654654 A A 450 2963 EXAMPLES ba Se omaa a a i ie OE a 450 DIGS DEE ALSO oranti amanea iana a a a 451 29 7 ELECTRODE oo dicas e CRE ORE e a EM EG t 451 29 1 DESCRIPTION 425 54 4 deidan o a Ei ae e a BS 451 20 7 2 PARAMETERS oscars ERE EER EES 452 2 BAAMPLES o soci oe a Gh A HE AA 452 29 74 SERALSO dar pu s ERR ERR OOK OR Ee OR Ee Ee 452 MEN END he re ae See ee Oe OO OG A Bo ROS BOS RO KG 452 298 1 DESCRIPTION po c s su aea toeaina Pow Pee ai 453 2 MATERIAL sia a A a ea G SUG ar aa I S aih ee da 453 299 1 DESCRIPTION s aoso maio om oe ee e RAR AR aoa 453 29 9 2 PARAMETERS 2 Se 6 84 S a ca cii kst watea 454 29003 EXAMPLES rantaa ma nadd ad kaa A 454 29094 SEEAL
89. PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed STATIC_VAR_TABLE Static_Var_Name Data_Type in out input output in out Vv Vv v vd i id v vd i id no no in_offset gain input offset gain real real 0 0 1 0 no no yes yes num_coeff numerator polynomial coefficients real yes 1 no den_coeff denominator polynomial coefficients real yes 1 no int_ic integrator stage initial conditions real 0 0 yes den_coeff yes X pointer 27 6 INTERFACE SPECIFICATION FILE 399 Description x coefficient array 27 6 1 The Name Table The name table is introduced by the Name_Table keyword It defines the code model s C function name the name used on a MODEL card and an optional textual description The following sections define the valid fields that may be specified in the Name Table 27 6 1 1 C Function Name The C function name is a valid C identifier which is the name of the function for the code model It is introduced by the C_Function_Name keyword followed by a valid C identifier To reduce the chance of name conflicts it is recommended that user written code model names use the prefix ucm_ for this entry Thus in the example given above the model name is xfer but the C function is ucm_xfer Note that when you subsequently write the model function in the Model Def
90. SPICE Usage a2 9 pullupi model pullupi d_pullup load 20 0e 12 12 4 11 Pulldown NAME_TABLE C_Function_Name Spice_Model_Name cm_d_pulldown d_pulldown Description digital pulldown resistor PORT_TABLE Port Name out Description output 12 4 DIGITAL MODELS Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed 193 out a no no load load value F real 1 0e 12 no yes Description The digital pulldown resistor is a device which emulates the behavior of an analog resistance value tied to a low voltage level The pulldown may be used in conjunction with tristate buffers to provide open collector wired or constructs or any other logical constructs which rely on a resistive pulldown common to many tristated output devices The model posts an input load value in farads based on the parameters load Example SPICE Usage a4 9 pulldown1 model pulldowni d_pulldown load 20 0e 12 12 4 12 D Flip Flop NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector cm_d_dff d_dff digital d type flip flop
91. Si AROR82 the University of Florida UF parameters for minority carriers in Si SOLL90 and a set of parameters appropriate for GaAs GA The velocity saturation models are the Caughey Thomas CT and Scharfetter Gummel SG models for Si and the PISCES model for GaAs GA There is also a set of Arora AR parameters for the Caughey Thomas model 29 11 MOBILITY 29 11 2 Parameters 457 Name Type Description Material Integer ID number of material Electron Hole Flag Mobile carrier Majority Minority Flag Mobile carrier type MUS Real Maximum surface mobility cm2 Vs gt EC A Real Surface mobility 1st order critical field V cm gt EC B Real Real Surface mobility 2nd order critical field V2 cm2 MuMax Real Maximum bulk mobility cm2 Vs MuMin Real Minimum bulk mobility cm2 Vs NtRef Real Ionized impurity reference concentration cm 3 NtExp Real Ionized impurity exponent Vsat Real Saturation velocity cm s Vwarm Real Warm carrier reference velocity cm s ConcModel String Ionized impurity model CT AR UF SG Dr GA FieldModel String Velocity saturation model CT AR SG or GA Init Flag Copy model specific defaults 29 11 3 Examples The following set of cards completely updates the bulk mobility parameters for material 1 mobility mat 1 mobility mat 1 ntref 1 0el6 mobility mat 1 ntref 1 0el7 mobility mat 1 ntref 1 0el6 mobility mat 1
92. St maa BS OSM SR a o a ES a a 8 17 2 Expressions Functions and Constants oaoa a e PE AA A ee a 17 4 Command Interpretation 2 er ds e id TES Commands sico dd ds e a ds e a e aa 13 247 247 247 248 250 250 250 250 251 252 253 253 253 254 254 254 254 255 256 257 257 258 260 260 260 261 261 262 14 CONTENTS 17 5 1 Ac Perform an AC small signal frequency response analysis 269 17 5 2 Alias Create an alias for a command 269 17 5 3 Alter Change a device or model parameter 270 17 5 4 Altermod Change model parameter S 270 17 5 5 Asciiplot Plot values using old style character plots 271 17 5 6 Aspice Asynchronous ngspicerun 2 212 175 7 Bus Mail a MERO sas rr AE 212 17 5 8 Cd Change AAA 272 17 5 9 Cdump Dump the control flow to the screen 272 17 5 10 Codemodel Load an XSPICE code model library 273 17 5 11 Compose Compose a vector nk ke o esa 273 17 5 12 Dc Perform a DC sweep analysis 274 17 513 Define Defnea fonction oo oso sea ssa setes nra Trate 274 17 5 14 Deftype Define a new type for a vector or plot 274 17 5 15 Delete Remove a trace or breakpoint 274 17 5 16 Destroy Delete an output dataset o 275 17 5 17 Devhelp information on available devices 275 17 5 18 Diff Compare Vectors
93. The gate produces a O value if all inputs are 0 if neither of these two conditions holds the output is unknown The delays associated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output 1t will always drive the output strongly with the specified delays Example SPICE Usage a6 1 2 3 8 ori model ori d_or rise_delay input_load 0 5e 12 12 4 6 Nor NAME TABLE C_Function_Name cm_d_nor Spice _Model_Name d_nor Description digital nor gate PORT_TABLE Port Name in Description input Direction in Default_Type d Allowed_Types a Vector yes Vector_Bounds 2 0 5e 9 fall_delay 0 3e 9 out output out d d no 188 Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value F real 1 0e 12 no yes CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE no fall_delay fall delay real 1 0e 9 1 0e 12 no yes D
94. Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction cm_d_srlatch d_srlatch digital sr type latch set in d d yes 2 no enable enable in d d no no set set in d d no yes out data output out reset in a yes no reset reset in d a no yes Nout inverted data output out 12 4 DIGITAL MODELS Default_Type Allowed_Types Vector no no Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector 205 a a no no sr_delay delay from s or r input change real 1 0e 9
95. Vector Bounds Null_Allowed no no 12 2 ANALOG MODELS PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER TABLE Parameter Name Description Data_Type Default _Value Limits Vector no Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed cntl_array control array real 0 0 yes 2 no out_low output peak low value real 1 0 no yes duty_cycle duty cycle real 0 5 1e 6 0 999999 yes fall time output fall time real 1 0e 9 no yes 171 freq_array frequency array real 1 0e3 o yes cntl_array no out_high output peak high value real 1 0 no yes rise time output rise time real 1 0e 9 yes Description This function is a controlled square wave oscillator with parametrizable values of low and high peak output duty cycle rise time and fall time It takes an input voltage or current value This value is used as the independent variable in the piecewise linear curve described by the coordinate points of the cntl_array and freq_array pairs From the curve a frequency value is determined and the oscillator will o
96. and memory usage e Exiting the simulator The remainder of the section from chapter 20 2 onwards lists several circuits which have been accompanying any ngspice distribution and may be regarded as the classical SPICE circuits 20 1 AC coupled transistor amplifier The circuit shown in Figure 20 1 is a simple one transistor amplifier The input signal is ampli fied with a gain of approximately Rc Re 3 9K 1K 3 9 The circuit description file for this example is shown below 337 338 CHAPTER 20 EXAMPLE CIRCUITS e VES O E 3 S tz vcc 5 5 12 A COLL 10U 1 CCOUPLE A EMIT VIN S 3 x x E Ps al e NA Figure 20 1 Transistor Amplifier Simulation Example Example A Berkeley SPICE3 compatible circuit x x This circuit contains only Berkeley SPICE3 components The circuit is an AC coupled transistor amplifier with a sinewave input at node I a gain of approximately 3 9 and output on node coll tran le 5 2e 3 ok vec vcc 0 12 0 vin 1 0 0 0 ac 1 0 sin 0 1 Ik ccouple 1 base 10uF rbiasl vcc base 100k rbias2 base O 24k ql coll base emit generic rcollector vce coll 3 9k remitter emit O Ik ok model generic npn ok end To simulate this circuit move into a directory under your user account and copy the file xspice_c1 cir from directory examples xspice 20 1 AC COUPLED TRANSISTOR AMPLIFIER 339 cp examples xspice xspice_ci cir xspice_c1
97. and thus iteration steps is more than doubled For MS Visual Studio compilation there is currently no simple way to exclude XSPICE during compilation You may enforce higher speed setting the option trtol 7 in your spiceinit initialization file via the option command 17 5 41 or in your circuit input file via an options line 15 1 to obtain standard spice3 tolerances and a speed gain of two Beware however of convergence or precision issues if you use XSPICE A devices If your circuit comprises mostly of MOS transistors and you have a multi core processor at hand you may benefit from OpenMP parallel processing as described next 16 10 16 10 Ngspice on multi core processors using OpenMP 16 10 1 Introduction Today s computers typically come with CPUs having more than one core It will thus be useful to enhance ngspice to make use of such multi core processors 16 10 NGSPICE ON MULTI CORE PROCESSORS USING OPENMP 255 Using circuits comprising mostly of transistors and e g the BSIM3 model around 2 3 of the CPU time is spent in evaluating the model equations e g in the BSIM3Load function The same happens with other advanced transistor models Thus this function should be paralleled if possible Resulting from that the parallel processing has to be within a dedicated device model Interestingly solving the matrix takes only about 10 of the CPU time so paralleling the matrix solver is of secondary interest here A rece
98. are the actual AC voltages and currents at the intermodulation frequencies and need to be normalized with respect to ac values to obtain the IM parameters If the distof1 or distof2 keywords are missing from the description of an independent source then that source is assumed to have no input at the corresponding frequency The default values of the magnitude and phase are 1 0 and 0 0 respectively The phase should be specified in degrees It should be carefully noted that the number f2overf1 should ideally be an irrational number and that since this is not possible in practice efforts should be made to keep the denominator in its fractional representation as large as possible certainly above 3 for accurate results 1 e if f2overf1 is represented as a fraction 4 8 where A and B are integers with no common factors B should be as large as possible note that A lt B because f2overf1 is constrained to be lt 1 To illustrate why consider the cases where f20verf1 is 49 100 and 1 2 Ina spectral analysis the outputs produced are at F Fo F F and 2F Fy In the latter case F Fy Fy so the result at the F F2 component is erroneous because there is the strong fundamental F gt component at the same frequency Also Fj Fy 2F F gt in the latter case and each result is erroneous individually This problem is not there in the case where f2overf1 49 100 because F Fy 51 100 F lt gt 49 100 F F gt In
99. array subscript required A parameter was referenced that is specified as an array vector in the Interface Specification File A subscript is required e g myparam i Port lt port name gt is not an array subscript prohibited A port was referenced that is not specified as an array vector in the Interface Specification File A subscript is not allowed Parameter lt parameter name gt is not an array subscript prohibited A parameter was referenced that is not specified as an array vector in the Interface Specifica tion File A subscript is not allowed Static variable lt static variable name gt is not an array subscript prohibited Array static variables are not supported Use a POINTER type for the static variable Buffer overflow try reducing the complexity of CM macro array subscripts The argument to a code model accessor macro was too long Unmatched An open was found with no corresponding closing Unmatched An open was found with no corresponding closing 432 CHAPTER 28 ERROR MESSAGES 28 2 Simulator Error Messages The following is a list of error messages that may be encountered while attempting to run a simulation with the exception of those error messages generated by individual code models Most of these errors are generated by the simulator while attempting to parse a SPICE deck These are listed individually and explanations follow the name listing ERROR Scalar port e
100. as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 34 id Out real Drain current 34 cd Out real Drain current 36 ibd Out real B D junction current 35 ibs Out real B S junction current 18 is Out real Source current 17 ig Out real Gate current 16 ib Out real Bulk current 50 vgs Out real Gate Source voltage 51 vds Out real Drain Source voltage 49 vbs Out real Bulk Source voltage 48 vbd Out real Bulk Drain voltage 8 nrd InOut real Drain squares 7 nrs InOut real Source squares 9 off In flag Device initially off 12 icvds InOut real Initial D S voltage 13 icvgs InOut real Initial G S voltage 11 icvbs InOut real Initial B S voltage 10 ic InOut real vector Vector of D S G S B S voltages 77 temp InOut real Instance operating temperature 81 dtemp InOut real Instance temperature difference 15 sens_l In flag flag to request sensitivity WRT length 14 sens_w In flag flag to request sensitivity WRT width 22 dnode Out integer Number of drain node 23 gnode Out integer Number of gate node 24 snode Out integer Number of source node 25 bnode Out integer Number of bulk node 26 dnodeprime Out integer Number of internal drain node 27 snodeprime Out integer Number of internal source node 30 von Out real Turn on voltage 31 vdsat Out real Saturation drain voltage 32 sourcevcrit Out real Critical source voltage 33 drainvcrit Out real Critical drain
101. as input a voltage value from the in connector It then applies an offset and a gain and derives from it an equivalent internal voltage veq which it limits to fall between pos pwr and neg pwr If veq is greater than the output voltage seen on the out connector a sourcing current will flow from the output pin Conversely if the voltage is less than vout a sinking current will flow into the output pin Depending on the polarity of the current flow either a sourcing or a sinking resistance value r_out_source r_out_sink is applied to govern the vout i_out relationship The chosen resistance will continue to control the output current until it reaches a maximum value specified by either i_limit_source or i_limit_sink The latter mimics the current limiting behavior of many operational amplifier output stages During all operation the output current is reflected either in the pos_pwr connector cur rent or the neg_pwr current depending on the polarity of 1_out Thus realistic power consumption as seen in the supply rails is included in the model The user specified smoothing parameters relate to model operation as follows v_pwr_range controls the voltage below vpos_pwr and above vneg_pwr inputs beyond which veq gain vin voffset is smoothed i_source_range specifies the current below i_limit_source at which smoothing begins as well as specifying the current increment above i_out 0 0 at which 1_pos_pwr begins to transition to
102. ascii SPICE_NEWS default SPICE_LIB_DIR news A file which is copied verbatim to stdout when ngspice starts in interactive mode SPICE_HELP DIR default SPICE_LIB_DIR helpdir Help directory not used in Windows mode SPICE_HOST default empty string Used in the rspice command probably obsolete to be documented SPICE_SCRIPTS default SPICE_LIB_DIR scripts In this directory the spinit file will be searched SPICE_PATH default SPICE_EXEC_DIR ngspice Used in the aspice command probably obsolete to be documented NGSPICE_MEAS PRECISION default 5 Sets the number of digits if output values are printed by the meas ure command SPICE_NO_DATASEG_ CHECK default undefined If defined will suppress memory resource info probably obsolete not used on Windows or where the proc information system is available NGSPICE_INPUT_DIR default undefined If defined using a valid directory name will add the given directory to the search path when looking for input files cir inc lib 16 7 2 Common environment variables TERM LINES COLS DISPLAY HOME PATH EDITOR SHELL POSIXLY_CORRECT 254 CHAPTER 16 STARTING NGSPICE 16 8 Memory usage Ngspice started with batch option b and rawfile output r rawfile will store all simulation data immediately into the rawfile without keeping them in memory Thus very large circuits may be simulated the memory requested upon ngspice start up will depend on the circuit size but will not
103. available for this model Details of any revision are to be found in the Berkeley user s manuals a pdf download of the most recent edition is to be found here We recommend that you use only the most recent BSIM4 model version 4 7 0 because 1t contains corrections to all known bugs To achieve that change the version parameter in your modelcard files to VERSION 4 7 The older models will typically not be supported they are made available for reference only 11 2 11 EKV model Level 44 model EKV is not available in the standard distribution since it is not released in source form by the EKV group To obtain the code please refer to the EKV model home page EKV group home page A verilog A version is available contributed by Ivan Riis Nielsen 11 2006 11 2 12 BSIMSOI models levels 10 58 55 56 57 BSIMSOI is a SPICE compact model for SOI Silicon On Insulator circuit design This model is formulated on top of the BSIM3 framework It shares the same basic equations with the bulk model so that the physical nature and smoothness of BSIM3v3 are retained Four models are supported in ngspice those based on BSIM3 and modeling fully depleted FD level 55 partially depleted PD level 57 and both DD level 56 as well as the modern BSIMSOI version 4 model levels 10 58 Detailed descriptions are beyond the scope of this manual but see e g BSIMSOI 4 3 1 Users_manual for a very extensive description of the recent model vers
104. base 247 cbe Out real Internal base to emitter capacitance 248 cbex Out real External base to emitter capacitance 249 cbe Out real Internal base to collector capacitance 250 cbex Out real External Base to collector capacitance 251 cbep Out real Parasitic Base to emitter capacitance 252 cbcp Out real Parasitic Base to collector capacitance 259 p Out real Power dissipation 243 geqcb Out real Internal C B base cap equiv cond 246 geqbx Out real External C B base cap equiv cond 234 qbe Out real Charge storage B E junction 235 cqbe Out real Cap due to charge storage in B E jet 236 qbc Out real Charge storage B C junction 30 4 BJTS 499 237 cqbe Out real Cap due to charge storage in B C jct 238 qbx Out real Charge storage B X junction 239 cqbx Out real Cap due to charge storage in B X jct 258 sens_dc Out real DC sensitivity 253 sens_real Out real Real part of AC sensitivity 254 sens_imag Out real DC sens amp imag part of AC sens 255 sens_mag Out real Sensitivity of AC magnitude 256 sens_ph Out real Sensitivity of AC phase 257 sens_cplx Out complex AC sensitivity 30 4 3 2 VBIC model parameters Name Direction Type Description 305 type Out string NPN or PNP 101 npn InOut flag NPN type device 102
105. be created Models may be constructed which pass information back and forth via these nodes Such models are constructed in the manner described in the previous sections with appropriate changes to the Interface Specification and Model Definition Files Because of the need of electrical engineers to have ready access to both digital and analog simulation capabilities the digital node type is provided as a built in node type along with standard SPICE analog nodes For digital nodes extensive support is provided in the form 396 CHAPTER 27 CODE MODELS AND USER DEFINED NODES of macros and functions so that you can treat this node type as a standard type analogous to standard SPICE analog nodes when creating and using code models In addition to analog and digital nodes the node types real and int are also provided with the simulator These were created using the User Defined Node UDN creation facilities described below and may serve as a template for further node types The first step in creating a new node type within XSPICE is to set up a node type directory along with the appropriate template files needed cd ng spice rework src xspice icm xtraevt mkdir lt directory name gt lt directory name gt should be the name of the new type to be defined Copy file udnfunc c from icm xtraevt int into the new directory Edit this file according to the new type you want to create Notify ngspice about this ne
106. be set If the first stop condition is met the simulation is interrupted the commands following run or tran e g alter or altermod are executed then the simulation may continue at the first resume command The next breakpoint requires another resume to continue automatically Otherwise the simulation stops and ngspice waits for user input If you try to stop at stop when V 1 eq 1 or similar during a transient simulation you probably will miss this point because it is not very likely that at any time step the vector v 1 will have the exact value of 1 Then ngspice simply will not stop 17 5 69 Strcmp Compare two strings General Form strcmp _flag stringl string2 The command compares two strings either given by a variable string1 or as a string in quotes string2 _flag is set as an output variable to 0 if both strings are equal A value greater than zero indicates that the first character that does not match has a greater value in strl than in str2 and a value less than zero indicates the opposite like the C strcmp function 17 5 70 Sysinfo Print system information General Form sysinfo The command prints system information useful for sending bug report to developers Informa tion consists of e Name of the operating system e CPU type e Number of physical processors not available under Windows OS number of logical processors Total amount of DRAM available e DRAM currently av
107. block for event driven real data 181 12 3 7 Node bridge from real to analog voltage 181 124 Digital Models raros si Glee aoe aig GORY Gogh ave Y gta a 182 LA BUE otek Beh Soe A Be tk ee a eh Se 182 A AAN 183 EEE A Se Be eh Gre OH He gra Be BS 184 1248 Nad 6 ce ete eet Reade etee A A 185 E Ore oe ee ee OS Oe Se A SE SOM ASSO EEE WES BE 186 ARABE serias nat eee oer det eed oe G 6 ade e e 187 LO XO eee eee Pee ERS AA LEER EERE ERE SRS 188 ee WO eaea Ge kb ek a a eh ee a Eh A 189 CONTENTS 12 4 9 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 1 12 4 2 12 4 2 UES AA E Gea Send O d s PW oe koe Be ae ee HE oe oe eee eS Se ROS HS MUR ema ea GA Ges BSE eet aie te ed mE PI oe 3 we Se od e 2 34 Se SO HS Oe See Oe Sees SIR FlipFlop 6452444424 Re RRES A RSS Peele PUG Flop s se sra a ee oR eee ee See HOw eee SE 3 SelReset Fip EE CPIM oasis a a ia a ae A e e T Set Reset Lateh cae be he eh ee hee Ee RED ta utaa ca osae Machine os esos paa Se Sct RR HS eee KGS KRG KE 9 Frequency IAVI S wb oh sed a OD RRR Oe Cera es URAM 2 eee ee eee eee ASS Re OES eM ED wR EE SESS 1 Digital Source heh eh eRe H ERE EL EERE SELES 12 5 Predefined Node AA eed acesa dts 4 doe dre K aoe ds 12 5 1 12 5 2 Real Node EI Int Node Type sea rras arre Ree ie e RES 13 Verilog A Device models 13 1 Introduction 240 22 ee hw neksu a bee See es 13 2 adms 13 3 How to integrate a
108. coefficient 119 js InOut real Bulk jet sat current density 120 tox InOut real Oxide thickness 121 ld InOut real Lateral diffusion 123 u0 InOut real Surface mobility 123 uo InOut real 124 fc InOut real Forward bias jct fit parm 135 nmos In flag N type MOSfet model 136 pmos In flag P type MOSfet model 125 nsub InOut real Substrate doping 126 tpg InOut integer Gate type 127 nss InOut real Surface state density 129 delta InOut real Width effect on threshold 130 uexp InOut real Crit field exp for mob deg 134 ucrit InOut real Crit field for mob degradation 131 vmax InOut real Maximum carrier drift velocity 132 xj InOut real Junction depth 508 CHAPTER 30 MODEL AND DEVICE PARAMETERS 133 neff InOut real Total channel charge coeff 128 nfs InOut real Fast surface state density 137 thom InOut real Parameter measurement temperature 139 kf InOut real Flicker noise coefficient 140 af InOut real Flicker noise exponent 30 5 MOSFETS 509 30 5 3 MOS3 Level 3 MOSFET model with Meyer capacitance model 30 5 3 1 MOS3 instance parameters Name Direction Type Description 80 m InOut real Multiplier 211 InOut real Length liw InOut real Width 4 ad InOut real Drain area 3
109. contain any simu lation output voltage or current vectors because it is simply not yet available The syntax is described in chapt 2 8 5 During the circuit setup all functions are evaluated all parameters are replaced by their resulting numerical values Thus it will not be possible to get feedback from a later stage during or after simulation to change any of the parameters 2 11 2 Nonlinear sources During the simulation the B source chapt 5 and their associated E and G sources as well as some devices R C L may contain expressions These expressions may contain parameters from above evaluated immediately upon ngspice start up numerical data predefined func tions but also node voltages and branch currents which are resulting from the simulation The source or device values are continuously updated during the simulation Therefore the sources are powerful tools to define non linear behavior you may even create new devices by yourself Unfortunately the expression syntax see chapt 5 1 and the predefined functions may deviate from the ones for parameters listed in 2 8 1 2 11 3 Control commands Command scripts Commands as described in detail in chapt 17 5 may be used interactively but also as a com mand script enclosed in control endc lines The scripts may contain expressions see chapt 17 2 The expressions may work upon simulation output vectors of node voltages branch currents as well as upon pre
110. containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 or may be used to delimit the function 5 2 2 VALUE Optional syntax EXXXXXXX n n value expr Examples E41 4 0 value V 3 V 3 Offs 5 2 3 TABLE Data may be entered from the listings of a data table similar to the pwl B Source 5 1 3 Data are grouped into x y pairs Expression may be an equation or an expression containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 or may be used to delimit the function Expression delivers the x value which is used to generate a corresponding y value according to the tabulated value pairs using linear interpolation If the x value is below x0 yO is returned above x2 y2 is returned limiting function The value pairs have to be real numbers parameters are not allowed Syntax for data entry from table Exxx nl n2 TABLE expression x0 y0 xl yl x2 y2 Example simple comparator ECMP 11 0 TABLE V 10 9 SMV OV SMV 5V 5 2 4 POLY General form EXXXX N N POLY ND NC1 NCI NC2 NC2 PO Pl Example ENONLIN 100 101 POLY 2 3 0 4 0 0 0 13 6 0 2 0 005 92 CHAPTER 5 NON LINEAR DEPENDENT SOURCES BEHAVIORAL SOURCES POLY N
111. correctly It finds headers and libs which are not really available in the mno cygwin port of MINGW32 Therefore config h is not o k To Do find appropriate presets for variables rewrite tests for headers and libs search exclu sively in mingw directories 31 2 7 ngspice mingw or cygwin console executable If you omit the configure flag with windows you will obtain a console application configure enable xspice enable cider enable openmp disable debug CFLAGS m32 LDFLAGS m32 prefix C Spice is an example for TDM mingw 32 Bit ngspice console 31 3 REPORTING ERRORS 541 31 3 Reporting errors Setting up ngspice is a complex task The source code contains over 1500 files ngspice should run on various operating systems Therefore errors may be found some still evolving from the original spice3f5 code others introduced during the ongoing code enhancements If you happen to experience an error during compilation of ngspice please send a report to the development team Ngspice is hosted on sourceforge the preferred place to post a bug report is the ngspice bug tracker We would prefer to have your bug tested against the actual source code available at CVS but of course a report using the most recent ngspice release is welcome Please provide the following information with your report Ngspice version Operating system Small input file to reproduce the bug if to report a runtime error Actual output versus th
112. d Allowed_Types a a d 12 4 DIGITAL MODELS 191 Vector no no no Vector Bounds Null Allowed no no no PARAMETER_TABLE Parameter_Name delay Description delay Data_Type real Default_Value 1 0e 9 Limits 1 0e 12 Vector no Vector_Bounds a Null_ Allowed yes PARAMETER_TABLE Parameter Name input_load Description input load value F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name yes enable load Description enable load value F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null_ Allowed yes Description The digital tristate is a simple tristate gate which can be configured to allow for open collector behavior as well as standard tristate behavior The state seen on the input line is reflected in the output The state seen on the enable line determines the strength of the output Thus a ONE forces the output to its state with a STRONG strength A ZERO forces the output to go to a HI IMPEDANCE strength The delays associated with an output state or strength change cannot be specified independently nor may they be spec ified independently for rise or fall conditions other gate models may be used to provide such delays if needed The model posts input and enable load values in farads based on the parameters input load and enable The output of this model does NOT h
113. data clk input data clock in in d d d a no no no no set reset asynch set asynch reset in in d d a a no no 194 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE yes out data output out d a no yes clk_delay delay from clk real 1 0e 9 1 0e 12 no yes reset_delay delay from reset real 1 0 1 0e 12 no yes data_load data load value F real 1 0e 12 E set_load Set load value F real 1 0e 12 no yes yes Nout inverted data output out d a no yes set_delay delay from set real 1 0e 9 1 0e 12 no yes ic output initial state int 0 o 2 no yes clk load clk load value F real 1 0e 12 no
114. delay The Nand Gate oscillator generates a square wave clock signal with a period of approximately two times the gate delay which is specified as le 5 seconds This 50 KHz clock is divided by a series of D Flip Flops adiv2 adiv4 adiv8 to produce a square wave at approximately 6 25 KHz Note particularly the use of the reserved word NULL for certain nodes on the D Flip Flops This tells the code model that there is no node connected to these ports of the flip flop The divide by 8 and enable waveforms are converted by the instance abridge2 to the format required by the User Defined Node type real which expected real valued data The output of this instance on node filt_in is a real valued square wave which oscillates between values of l and 1 Note that the associated code model d_to_real is not part of the original XSPICE code model library but has been added later to ngspice This signal is then passed through subcircuit xfilter which contains a digital low pass filter clocked by node clk The result of passing this square wave through the digital low pass filter is the production of a sampled sine wave the filter passes only the fundamental of the square wave input on node filt_out This signal is then converted back to ngspice analog data on node a_out by node bridge instance abridge3 The resulting analog waveform is then passed through an op amp based low pass analog filter constructed around subcircuit xlpf
115. during a simulation and the pa rameters of these methods Most of these methods are optimizations that reduce run time but may sacrifice accuracy or reliable convergence For majority carrier devices such as MOSFETs one carrier simulations can be used to save simulation time The systems of equations in AC analysis may be solved using either direct or successive over relaxation techniques Successive over relaxation is faster but at high fre quencies it may fail to converge or may converge to the wrong answer In some cases it is desirable to obtain AC parameters as functions of DC bias conditions If necessary a one point AC analysis is performed at a predefined frequency in order to obtain these small signal param eters The default for this frequency is 1 Hz The Jacobian matrix for DC and transient analyses can be simplified by ignoring the derivatives of the mobility with respect to the solution vari ables However the resulting analysis may have convergence problems Additionally if they are ignored during AC analyses incorrect results may be obtained A damped Newton method is used as the primary solution technique for the device level partial differential equations This algorithm is based on an iterative loop that terminates when the error in the solution is small enough or the iteration limit is reached Error tolerances are used when determining if the error is small enough The tolerances are expressed in terms of an absolut
116. e ee eee e eea pa Eet Dl SOALE UGG 0 2 AAA ARA HS ARAS A 2 ANDE oir a dia e 33 34 34 35 35 36 37 37 38 38 38 39 39 40 40 40 42 42 42 43 CONTENTS ee COMMON cr si Sgr aie Ser deg ia soe a e 48 228 End f line comments 2 or set mares Gud bee bee os 48 2 gt Device Wigdels cercat Gere he view hee betr Stig dc 48 24A EO oo ees cee ch A Seg he Bg SSH is Sud G 49 2AL SUBCET LUG ooe hos SAS eee A ah ee AA as 50 2242 ENDS LNS 24244 cc gexec a a aa Seid e dde 31 AAS SUBO Calls e sii a ae 51 a AE IE 51 oe ANCLUDE vis a a A AA 51 O A ek Ger Sede Sign do gpa Stes de Bw S Giga are he Sigh 52 28 PARAM Parametri netlists gt cs 2 58445 258 20544248844 54 52 281 par m line io sa orocota diad creara a 52 2 8 2 Brace expressions in circuit elements o oo 53 283 UCI parameters o s A BAD we RRA a 53 2 8 4 Symbol scope nonoa aa 54 26 3 Sya Of o o cocs scese Se a e i gh ee we a 54 28 0 Reserved words oo os ee sad saud nod rek auaka EEES 57 2 8 7 Alternative syntax sssaaa e 57 A E he Suge S 57 LAIO A e oe eee oe ee ed oe ASS AR 58 2 11 Parameters functions expressions and command scripts 58 214 1 TOO escombreras FoR Posy FoR 2 4 58 2 11 2 Nonlingar erect os s oc sace saci AER EEE EEE EEE EES SE 59 2 11 3 Control commands Command scripts 59 Circuit Elements and Models 61 3 1 General options and information e 61 3 1 1 Simulating more devic
117. equal to 10 For a totally unconstrained range a single hyphen with no surrounding brackets may be used The parameter value limit is introduced by the Limits keyword and is followed by a range 27 6 3 7 Vector The Vector field is used to specify whether a parameter is a vector or a scalar Like the PORT TABLE Vector field it is introduced by the Vector keyword and followed by a boolean value TRUE or YES specify that the parameter is a vector FALSE or NO specify that it is a scalar 27 6 3 8 Vector Bounds The valid sizes for a vector parameter are specified in the same manner as are port sizes see Section 27 6 2 7 However in place of using a numeric range to specify valid vector bounds it is also possible to specify the name of a port When a parameter s vector bounds are specified in this way the size of the vector parameter must be the same as the associated vector port 27 6 4 Static Variable Table The Static Variable table is introduced by the Static_Var_Table keyword It defines the set of valid static variables available to the code model These are variables whose values are retained between successive invocations of the code model by the simulator The following sections define the valid fields that may be specified in the Static Variable Table 27 6 INTERFACE SPECIFICATION FILE 403 27 6 4 1 Name The Static variable name is a valid C identifier that will be used in the
118. h start 0 001 h max 05 ratio 2 0 mesh width 2 5 h start 0 05 ratio 2 0 EEES 29 16 4 SEE ALSO domain 466 CHAPTER 29 CIDER USER S MANUAL 29 17 NUMD Diode two terminal numerical models and elements SYNOPSIS Model MODEL model name NUMD level SYNOPSIS Element DXXXXXXX nl n2 model name geometry temperature initial conditions SYNOPSIS Output SAVE small signal values 29 17 1 DESCRIPTION NUMD is the name for a diode numerical model In addition this same model can be used to simulate other two terminal structures such as semiconductor resistors and MOS capacitors See the options card for more information on how to customize the device type Both 1D and 2D devices are supported These correspond to the LEVEL l and LEVEL 2 models respectively If left unspecified it is assumed that the device is one dimensional All numerical two terminal element names begin with the letter D The element name is then followed by the names of the positive n1 and negative n2 nodes After this must come the name of the model used for the element The remaining information can come in any order The layout dimensions of an element are specified relative to the geometry of a default device For 1D devices the default device has an area of 1m and for 2D devices the default device has a width of 1 m However these defaults can be overridden on an options card The operating temperature of a device can b
119. ical values constants simulator output like v n1 or i vdb parameters predefined by a param statement and the variables hertz temper and time Internally expression is replaced by an internally generated voltage node which is the output of a B source one node and B source per par Several parC are allowed in each line up to 99 per input file The internal nodes are named pa_00 to pa_99 If your input file already contains such node names an error will occur unless you rename these nodes In four plot print save but notin measure an alternative syntax output par expression is possible par expression may be used as described above output is the name of the new node to replace the expression So output has to be unique and a valid node name The syntax of output par expression is strict no spaces between par and or between and are allowed and both are required Also there is not much error checking on your input if there is a typo for example an error may pop up at an unexpected place 15 5 7 width Set the width of a print out or plot with the following card with out 256 246 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE Parameter out yields the maximum number of characters plotted in a row if printing in columns or an ASCII plot is selected Chapter 16 Starting ngspice 16 1 Introduction Ngspice consists of the simulator and a front end
120. identn gt is the name of a subcircuit defined beforehand node node is the list of actual nodes where the subcircuit is connected lt value gt is either a spice number or a brace expression lt expr gt The sequence of lt value gt items on the X line must exactly match the number and the order of formal parameters of the subcircuit 54 CHAPTER 2 CIRCUIT DESCRIPTION Subcircuit example with parameters x Param example param amplitude 1V k subckt myfilter in out rval 100k cval 100nF Ra in pl 2 rval Rb pl out 2 rval Cl pl 0 2x cval Ca in p2 cval Cb p2 out cval RI p2 0 rval ends myfilter X1 input output myfilter rval 1k cval 1n V1 input 0 AC amplitude end 2 8 4 Symbol scope All subcircuit and model names are considered global and must be unique The param symbols that are defined outside of any subckt ends section are global Inside such a section the pertaining params symbols and any param assignments are considered local they mask any global identical names until the ends line is encountered You cannot reassign to a global number inside a subckt a local copy is created instead Scope nesting works up to a level of 10 For example if the main circuit calls A which has a formal parameter xx A calls B which has a param xx and B calls C which also has a formal param xx there will be three versions of xx in the symbol table but only the most loca
121. if index gt 1 echo jump2 goto starthere2 end end echo jump goto inhere end echo We are at end with index gindex and loop amp loop 312 CHAPTER 17 INTERACTIVE INTERPRETER Control structure examples continued test goto in while loop let loop 0 if 1 outer loop to allow nested forward label endlabel while loop lt 10 if loop gt 5 echo jump goto endlabel end let loop loop 1 end echo before never reached label endlabel echo after amp loop end test for using variables simple test for label goto set loop 0 label starthe echo start loop let loop loop 1 expression needs vector at lhs set loop g loop convert vector contents to variable if loop lt 3 goto starthe end echo end loop endc 17 8 5 Example script spectrum A typical example script named spectrum is delivered with the ngspice distribution Even if it is made obsolete by the internal spec command see 17 5 65 and especially by the much faster fft command see 17 5 23 1t may act as a good example for getting acquainted with the ngspice or nutmeg post processor language As a suitable input for spectrum you may run a ring oscillator delivered with ngspice in e g test bsim3soi ring51_41 cir For an adequate resolution you will need a simulation time of 1 us Then a small control script may start ngspice by loading the R O simulation data and start spectrum Small script to start ngspice read the simul
122. implements both the original spice3f5 transmission lines models and the one intro duced with kspice The latter provide an improved transient analysis of lossy transmission lines Unlike spice models which uses the state based approach to simulate lossy transmission lines kspice simulates lossy transmission lines and coupled multiconductor line systems using the recursive convolution method The impulse response of an arbitrary transfer function can be determined by deriving a recursive convolution from the Pade approximations of the function We use this approach for simulating each transmission line s characteristics and each multi conductor line s modal functions This method of lossy transmission line simulation has been proved to give a speedup of one to two orders of magnitude over spice3f5 6 1 Lossless Transmission Lines General form TXXXXXXX N1 N2 N3 N4 ZO VALUE lt ID VALUE gt lt F FREQ lt NL NRMLEN gt gt lt IC V1 Il V2 12 gt Examples Tl 1 0 2 0 Z0 50 TD 10NS ni and n2 are the nodes at port 1 n3 and n4 are the nodes at port 2 zO is the characteristic impedance The length of the line may be expressed in either of two forms The transmission delay td may be specified directly as td 10ns for example Alternatively a frequency f may be given together with n1 the normalized electrical length of the transmission line with respect to the wavelength in the line at the frequency f If a frequency is speci
123. in ngspice which you may use by their name They are stored in plot 17 3 const and are listed in the table below Name Description Value pi T 3 14159 e e the base of natural logarithms 2 71828 c c the speed of light 299 792 500 m sec i i the square root of 1 y 1 kelvin absolute zero in centigrade 273 15 C echarge q the charge of an electron 1 60219e 19 C boltz k Boltzmann s constant 1 38062e 23 k planck h Planck s constant 6 62620e 34 yes boolean 1 no boolean 0 TRUE boolean 1 FALSE boolean 0 These constants are all given in MKS units If you define another variable with a name that conflicts with one of these then it takes precedence Additional constants may be generated during circuit setup see csparam 2 10 17 3 Plots The output vectors of any analysis are stored in plots a traditional SPICE notion A plot is a group of vectors A first tran command will generate several vectors within a plot tranl A 268 CHAPTER 17 INTERACTIVE INTERPRETER subsequent tran command will store their vectors in tran2 Then a linearize command will linearize all vectors from tran2 and store them in tran3 which then becomes the current plot A fft will generate a plot specl again now the current plot The display command always will show all vectors in the current plot Setplot followed by Return will show all plots Setplot name will change the c
124. in version 3 2 4 nor in any other BSIM3 model in BSIM4 versions 4 6 5 or 4 7 not in any other BSIM4 model and in B4SOI version 4 3 1 not in any other SOI model Older parameter files of version 4 6 x x any number up to 5 are accepted you have to check for compatibility Under LINUX you may run autogen sh configure enable openmp make install The same has been tested under MS Windows with CYGWIN and MINGW as well and deliv ers similar results Under MS Windows with Visual Studio Professional you have to place an additional pre processor flag USE_OMP and then enable openmp Visual Studio Express is not sufficient due to lack of OpenMP support Even Visual Studio Professional lacks debugging support for OpenMP There are local preprocessor flags USE_OMP3 in bsim3def h USE_OMPA in bsim4def h and USE_OMP4SOI in b4soidef h which you may modify individually if you want to switch off OpenMP in only one of the models BSIM3 BSIM4 or B4SOI The number of threads has to be set manually by placing set num_threads 4 into spinit or spiceinit If OpenMP is enabled but num_threads not set a default value num_threads 2 is set internally If you run a circuit please keep in mind to select BSIM3 levels 8 49 version 3 3 0 11 2 9 by placing this version number into your parameter files BSIM4 levels 14 54 version 4 6 5 or 4 7 11 2 10 or B4SOI levels 10 58 version 4 3 1 11 2 12 If you run configure without e
125. increase during simulation If you start ngspice in interactive mode or interactively with control section all data will be kept in memory to be available for later evaluation A large circuit may outgrow even Gigabytes of memory The same may happen after a very long simulation run with many vectors and many time steps to be stored Issuing the save lt nodes gt command will help to reduce memory requirements by saving only the data defined by the command 16 9 Simulation time Simulating large circuits may take an considerable amount of CPU time If this is of importance you should compile ngspice with the flags for optimum speed set during configuring ngspice compilation Under LINUX MINGW and CYGWIN you should select the following option to disable the debug mode which slows down ngspice configure disable debug Adding disable debug will set the O2 optimization flag for compiling and linking Under MS Visual Studio you will have to select the release version which includes optimization for speed If you have selected XSPICE see chapters 12 and II as part of your compilation configuration by adding the option enable xspice to your configure command the value of trtol see 15 1 3 is set internally to 1 instead of default 7 for higher precision if XSPICE code model A devices included in the circuit This may double or even triple the CPU time needed for any transient simulation because the amount of time steps
126. instance temperature 8 dtemp InOut real instance temperature delta from circuit 30 4 1 2 BJT model parameters Name Direction Type Description 309 type Out string NPN or PNP 101 npn InOut flag NPN type device 102 pnp InOut flag PNP type device 103 is InOut real Saturation Current 104 bf InOut real Ideal forward beta 105 nf InOut real Forward emission coefficient 106 vaf InOut real Forward Early voltage 106 va InOut real 107 ikf InOut real Forward beta roll off corner current 107 ik InOut real 108 ise InOut real B E leakage saturation current 110 ne InOut real B E leakage emission coefficient 111 br InOut real Ideal reverse beta 112 nr InOut real Reverse emission coefficient 113 var InOut real Reverse Early voltage 113 vb InOut real 114 ikr InOut real reverse beta roll off corner current 115 isc InOut real B C leakage saturation current 117 ne InOut real B C leakage emission coefficient 118 rb InOut real Zero bias base resistance 119 irb InOut real Current for base resistance rb rbm 2 120 rbm InOut real Minimum base resistance 121 re InOut real Emitter resistance 122 rc InOut real Collector resistance 123 cje InOut real Zero bias B E depletion capacitance 124 vje InOut real B E built in potential 124 pe InOut real 125 mje InOut real B E junction grading coefficient 125 me InOut real 494 CHAPTER 30 MODEL A
127. is used to change model parameters The above example will change the parameter tox in all devices using the model nc1 which is defined as k BSIM3v3 model MODEL nci nmos LEVEL 8 version 3 2 2 acm 2 mobmod 1 capmod 1 noimod 1 rs 2 84E 03 rd 2 84E 03 rsh 45 tox 20E 9 xj 0 25E 6 nch 1 7E 17 17 5 COMMANDS 271 If you invoke the model by the MOS device M1 d g s b nc1 w 10u 1 1u you might also insert the device name M1 for mod as in altermod M1 tox 10e 9 The model parameter tox will be modified however not only for device M1 but for all devices using the associated MOS model nc1 If you want to run corner simulations within a single simulation flow the following option of altermod may be of help The parameter set with name modn may be overrun by the altermod command specifying a model file All parameter values fitting to the existing model which is defined as modn will be modified As usual the reset command see 17 5 47 restores the original values The model file see 2 3 has to use the standard specifications for an input file the model section is the relevant part However the first line in the model file will be ignored by the input parser so it should contain only some title information The mode1 statement should appear then in the second or any later line More than one model section may reside in the file General form altermod mod mod2 mod15 file lt model file name gt
128. junction diode is the basic semiconductor device and the simplest one modeled in ngspice but it s model is quite complex even if not all the physical phenomena affecting a pn junction are modeled The diode is modeled in three different regions e Forward bias the anode is more positive than the cathode the diode is on and can conduct large currents To avoid convergence problems and unrealistic high current it is better to specify a series resistance to limit current with rs model parameter 104 CHAPTER 7 DIODES e Reverse bias the cathode is more positive than the anode and the diode is off A reverse bias diode conducts a small leakage current e Breakdown the breakdown region is model led only if the bv model parameter is given When a diode enters breakdown the current increase exponentially remember to limit it bv is a positive value Parameters Scaling Model parameters are scaled using the unit less parameters area and pj and the multiplier m as depicted below AREA AREA M PJeff PJ M ISeff IS AREA of JSW PJeff IBVeff IBV AREAeff IKeff IK AREA 51 IKReff IKR AREA ff CJer CJO AREAe ff CI Pep CIP Phere Diode DC Transient and AC model equations V IS pf eN 1 Vp GMIN if Vp gt 3 NE Ip 4 ISefpll E Vpx GMIN if BVepp lt Vp lt 3 7 1 4 BVe Vp ISep e NT Vp GMIN if Vp lt BVe ry The breakdown region must be describe
129. libraries Adding a new library is described in chapter 27 4 The first step in creating a new code model within XSPICE is to create a model directory inside of the selected library directory The new directory name is the name of the new code model As an example you may add a directory d_counter to the library directory digital 27 3 CREATING USER DEFINED NODES 293 cd ng spice rework src xspice icm digital mkdir d_counter Into this new directory you copy the following template files e Interface Specification File ifspec ifs e Model Definition File cfunc mod You may choose any of the existing files which are similar to the new code model you intend to integrate The template Interface Specification File ifspec ifs is edited to define the model s in puts outputs parameters etc see chapt 27 6 You then edit the template Model Definition File cfunc mod to include the C language source code that defines the model behavior see chapt 27 7 As a final step you have to notify ngspice of the new code model You have to edit the file modpath lst which resides in the library directory ng spice rework src xspice icm digital Just add the entry d_counter to this file The Interface Specification File is a text file that describes in a tabular format information needed for the code model to be properly interpreted by the simulator when it is placed with other circuit components into a SPICE deck This information includes such thi
130. line model referred to as the LTRA model hence forth models a uniform constant parameter distributed transmission line The RC and LC cases may also be modeled using the URC and TRA models however the newer LTRA model is usu ally faster and more accurate than the others The operation of the LTRA model is based on the convolution of the transmission line s impulse responses with its inputs see 8 The LTRA model takes a number of parameters some of which must be given and some of which are optional 6 2 LOSSY TRANSMISSION LINES 97 Name Parameter Units Type Default Example R resistance length Q unit 0 0 0 2 L inductance length H unit 0 0 9 13e 9 G conductance length mhos unit 0 0 0 0 C capacitance length F unit 0 0 3 65e 12 LEN length of line no default 1 0 REL breakpoint control arbitrary unit 1 0 5 ABS breakpoint control 1 5 NOSTEPLIMIT don t limit time step to less flag not set set than line delay NOCONTROL don t do complex time step flag not set set control LININTERP use linear interpolation flag not set set MIXEDINTERP use linear when quadratic flag not set set seems bad COMPACTREL special reltol for history RELTOL 1 0e 3 compaction COMPACTABS special abstol for history ABSTOL 1 0e 9 compaction TRUNCNR use Newton Raphson method flag not set set for time step control TRUNCDONTCUT don t limit time step to keep flag not set set impulse response errors low
131. listing of event times in the first column and node values in the second column The 1 ns delays can be clearly seen in the fifth decimal place of the event times Note that the eprint command also gives statistics from the event driven algorithm portion of XSPICE For this example the simulator alternated between the analog solution algorithm and the event driven algorithm one time while performing the initial DC operating point solution prior to the start of the transient analysis During this operating point analysis 37 total calls were made to event driven code model functions and two separate event passes or iterations were required before the event nodes obtained stable values Once the transient analysis commenced there were 4299 total calls to event driven code model functions Lastly the analog simulation algorithm performed 87 time step backups that forced the event driven simulator to backup its state data and its event queues A similar output is obtained when printing the values of digital nodes For example print the values of the node div8 out as follows ngspice 5 gt eprint div8_out ek Results Data Time or Step div8_out 0 000000000e 000 is 1 810070000e 004 Os 2 610070000e 004 1s 9 010070000e 004 1s 9 810070000e 004 Os x x Messages x x eee Statistics xkx Operating point analog event alternations 1 Operating point load calls 37 Operating point event passes 2 Transient analysis load calls
132. matrix processing generally results in slower simulation times when compared to digital circuit simulators 1 1 SIMULATION ALGORITHMS 35 The response of a circuit is a function of the applied sources Ngspice offers a variety of source types including DC sine wave and pulse In addition to specifying sources the user must define the type of simulation to be run This is termed the mode of analysis Analysis modes include DC analysis AC analysis and transient analysis For DC analysis the time varying behavior of reactive elements is neglected and the simulator calculates the DC solution of the circuit Swept DC analysis may also be accomplished with ngspice This is simply the repeated application of DC analysis over a range of DC levels for the input sources For AC analysis the simulator determines the response of the circuit including reactive elements to small signal sinusoidal inputs over a range of frequencies The simulator output in this case includes amplitudes and phases as a function of frequency For transient analysis the circuit response including reactive elements is analyzed to calculate the behavior of the circuit as a function of time 1 1 2 Digital Simulation Digital circuit simulation differs from analog circuit simulation in several respects A primary difference is that a solution of Kirchhoff s laws is not required Instead the simulator must only determine whether a change in the logic state of a node ha
133. name of a voltage source through which the controlling current flows The direction of positive controlling current flow is from the positive node through the source to the negative node of vnam value is the current gain 4 2 4 Linear Current Controlled Voltage Sources CCVS General form HXXXXXXX n n vnam value Examples HX 5 17 VZ 0 5K n and n are the positive and negative nodes respectively vnam is the name of a voltage source through which the controlling current flows The direction of positive controlling current flow is from the positive node through the source to the negative node of vnam value is the transresistance in ohms 4 2 5 Polynomial Source Compatibility Dependent polynomial sources available in SPICE2G6 are fully supported in ngspice using the XSPICE extension Dependent polynomial sources are not supported in SPICE3 but were rein stated in XSPICE to allow existing third party models to be incorporated readily into XSPICE The form used to specify these sources is shown in Table 4 1 Chapter 5 Non linear Dependent Sources Behavioral Sources The non linear dependent sources B see chapt 5 1 E see 5 2 G see 5 3 described in this chapter allow to generate voltages or currents which result from evaluating a mathematical expression Internally E and G sources are converted to the more general B source All three sources may be used to introduce behavioral modeling and analysis 5 1
134. only be of value to a hybrid model such as the adc bridge or the dac bridge INIT is an integer int that takes the value 1 or 0 depending on whether this is the first call to the code model instance or not respectively ANALYSIS is an enumerated integer that takes values of DC AC or TRANSIENT FIRST TIMEPOINT is an integer that takes the value 1 or O depending on whether this is the first call for this instance at the current analysis step 1 e time point or not respectively 408 CHAPTER 27 CODE MODELS AND USER DEFINED NODES TIME is a double representing the current analysis time in a transient analysis T n is a double vector giving the analysis time for a specified time point in a transient analysis where n takes the value 0 or 1 T O is equal to TIME T 1 is the last accepted time point T 0 T 1 is the time step i e the delta time value associated with the current time RAD_FREQ is a double representing the current analysis frequency in an AC analysis ex pressed in units of radians per second TEMPERATURE is a double representing the current analysis temperature 27 7 1 3 Parameter Data PARAM gain PARAM_SIZE gain PARAM NULL gain PARAM gain resolves to the value of the scalar 1 e non vector parameter gain which was defined in the Interface Specification File tables The type of gain is the type given in the ifspec ifs file The same accessor macro can be used regardless of type If gai
135. or spiceinit 16 6 Its value a11 will inprove compatibility to commercial simulators Full compat ibility is however not the intension of ngspice This value may be set as a standard in the future ps hs and spice3 are available See chapt 16 13 17 7 VARIABLES 305 noaskquit Do not check to make sure that there are no circuits suspended and no plots unsaved Normally ngspice warns the user when he tries to quit if this is the case nobjthack BJTs can have either 3 or 4 nodes which makes it difficult for the subcircuit ex pansion routines to decide what to rename If the fourth parameter has been declared as a model name then it is assumed that there are 3 nodes otherwise it is considered a node To disable this you can set the variable nobjthack which forces BJTs to have 4 nodes for the purposes of subcircuit expansion at least nobreak Don t have asciiplot and print col break between pages noasciiplotvalue Don t print the first vector plotted to the left when doing an asciiplot nobjthack Assume that BJTs have 4 nodes noclobber Don t overwrite existing files when doing IO redirection noglob Don t expand the global characters 2 P and This is the default nomoremode If nomoremode is not set whenever a large amount of data is being printed to the screen e g the print or asciiplot commands the output is stopped every screenful and continues when a carriage return is t
136. out d a no yes set_delay delay from set real 1 0e 9 1 0e 12 no yes ic output initial state int 0 0 2 no yes clk load clk load value F real 1 0e 12 no yes reset_load reset load F 12 4 DIGITAL MODELS Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed real 1 0e 12 no yes rise_ delay rise delay real 1 0e 9 1 0e 12 no yes 199 real 1 0e 12 no yes fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital toggle type flip flop is a one bit edge triggered storage element which will toggle its current state whenever the clk input line transitions from low to high ZERO to ONE In addition asynchronous set and reset signals exist and each of the three meth ods of changing the stored output of the d_tff have separate load values and delays asso ciated with them Additionally you may specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN inputs other than t immediately cause the output to go UN KNOWN Example SPICE Usage a8 2 12 4 5 6 3 flop3 model flop3 d_tff clk_delay
137. overlap To fix the problem you can either spread the x_array coordinates out or make the input domain value smaller 28 3 9 Code Model s_xfer num_size_ error AERROR S_XFER Numerator coefficient array size greater than denominator coefficient array size This error message indicates that the order of the numerator polynomial specified is greater than that of the denominator For the s_xfer model the orders of numerator and denominator polynomials must be equal or the order of the denominator polynomial must be greater than that or the numerator 28 3 CODE MODEL ERROR MESSAGES 437 28 3 10 Code Model sine allocation_error KKKK Error x SINE Error allocating sine block storage Generic storage allocation error sine_freq_clamp 2k KK Warning 2 2k KK SINE Extrapolated frequency limited to le 16 Hz This error occurs whenever the controlling input value is such that the output frequency ordi narily would be set to a negative value Consequently the output frequency has been clamped to a near zero value array error KKKK Error x SINE Size of control array different than frequency array This error message normally occurs whenever the controlling input array and the frequency array are different sizes 28 3 11 Code Model square square _allocation_error KKKK Error x xkx SQUARE Error allocating square block storage Generic storage allocation error square_freq_clamp xo WARNING SQUARE
138. page and the STAG 18 one There is partial support for a couple of HFET models and one model for MESA devices 33 34 CHAPTER 1 INTRODUCTION Ngspice supports mixed level simulation and provides a direct link between technology param eters and circuit performance A mixed level circuit and device simulator can provide greater simulation accuracy than a stand alone circuit or device simulator by numerically modeling the critical devices in a circuit Compact models can be used for noncritical devices The mixed level extensions to ngspice are two e CIDER a mixed level circuit and device simulator integrated into ngspice code CIDER was originally the name of the mixed level extension made to spice3f5 e GSS GSS now called GENIUS TCAD is a 2D simulator developed independently from ngspice The device simulator itself is free and not included into ngspice but a socket interface is provided Ngspice supports mixed signal simulation through the integration of XSPICE code into it XSPICE software developed as an extension to Spice3C1 from GeorgiaTech has been ported to ngspice to provide board level and mixed signal simulation New devices can be added to ngspice by two means the xspice old code model interface and the new ADMS interface based on Verilog A and XML Finally numerous small bugs have been discovered and fixed and the program has been ported to a wider variety of computing platforms 1 1 Simulation Algorithms
139. parallel a release version of ngspice 31 1 NGSPICE INSTALLATION UNDER LINUX AND OTHER UNIXES 533 configure disable debug So if you intend to create a separate object file tree like ng spice rework ngbuild release you may do the following starting from the default directory ng spice rework mkdir p release cd release configure lt some options gt make install This will create an object file directory tree similar to the source file directory tree the object files are now separated from the source files For the debug version you may do the same as described above replacing release by debug and obtain another separated object file directory tree If you already have run configure in ng spice rework you have to do a maintainer clean before the above procedure will work 31 1 6 Compilers and Options Some systems require unusual options for compilation or linking that the configure script does not know about You can give configure initial values for variables by setting them in the environment Using a Bourne compatible shell you can do that on the command line like this CC c89 CFLAGS 02 LIBS 1posix configure Or on systems that have the env program you can do it like this env CPPFLAGS 1 usr local include LDFLAGS s configure 31 1 7 Compiling For Multiple Architectures You can compile the package for more than one kind of computer at the same time by placin
140. param res 10k param ttime 12000m param varia 100 param ttimelO ttime varia x random control voltage Gaussian distribution VR2 r2 0 de O trrandom 2 ttimelO O 1 behavioral resistor R2 4 6 R res 0 033 x res V r2 7 So within a single simulation run you will obtain 100 different frequency values issued by the Wien bridge oscillator The voltage sequence VR2 is shown below 352 CHAPTER 21 STATISTICAL CIRCUIT ANALYSIS 5 A trani opwien cir opamp wien bridge oscillator 8 V E do ee MM LA A W AA MA A A A aea A A AN L AP UII L PCT A taea 21 4 ngspice scripting language The ngspice scripting language is described in detail in chapter 17 8 All commands listed in chapter 17 5 are available as well as the built in functions decried in chapter 17 2 the control structures listed in chapter 17 6 and the predefined variables from chapt 17 7 Variables and functions are typically evaluated after a simulation run You may created loops with several simulation runs and change device and model parameters with the alter 17 5 3 or altermod 17 5 4 commands as shown in the next section 21 5 You may even interrupt a simulation run by proper usage of the stop 17 5 68 and resume 17 5 49 commands After stop you may change device or model parameters and then go on with resume continuing the simulation with the new parameter values The statistical functions provided for scr
141. pay for transient noise analysis the number of required time steps for simulation will increase and thus the simulation time But modern computers deliver a lot of speed and it may be well worth of trying and experimenting In addition to white and 1 f noise the independent voltage and current sources offer a random telegraph signal RTS noise source also known as burst noise or popcorn noise again for transient analysis For each voltage current source offering RTS noise an individual noise amplitude is required for input as well as a mean capture time and a mean emission time The amplitude resembles the influence of a single trap on the current or voltage The capture and emission times emulate the filling and emptying of the trap typically following a Poisson process They are generated from an random exponential distribution with their respective mean values given by the user To simulate an ensemble of traps you may combine several current or voltage sources with different parameters 234 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE All three sources white 1 f and RTS may be combined in a single command line RTS noise example white noise 1 f noise RTS noise voltage source VRTS2 13 12 DC O trnoise 0 0 0 O 5m 18u 30u VRTS3 11 0 DC O trnoise 0 0 0 O 10m 20u 40u VALL 12 11 DC O trnoise lm lu 1 0 0 1m 15m 22u 50u VWlof 21 0 DC trnoise lm lu 1 0 0 1m x current source IRTS2 10 0 DC O trnoise 0 0 0 O 5m
142. pnp InOut flag PNP type device 103 thom InOut real Parameter measurement temperature 104 rex InOut real Extrinsic coll resistance 105 rci InOut real Intrinsic coll resistance 106 vo InOut real Epi drift saturation voltage 107 gamm InOut real Epi doping parameter 108 href InOut real High current RC factor 109 rbx InOut real Extrinsic base resistance 110 rbi InOut real Intrinsic base resistance 111 re InOut real Intrinsic emitter resistance 112 rs InOut real Intrinsic substrate resistance 113 rbp InOut real Parasitic base resistance 114 is InOut real Transport saturation current 115 nf InOut real Forward emission coefficient 116 nr InOut real Reverse emission coefficient 117 fe InOut real Fwd bias depletion capacitance limit 118 cbeo InOut real Extrinsic B E overlap capacitance 119 cje InOut real Zero bias B E depletion capacitance 120 pe InOut real B E built in potential 121 me InOut real B E junction grading coefficient 122 aje InOut real B E capacitance smoothing factor 123 cbco InOut real Extrinsic B C overlap capacitance 124 eje InOut real Zero bias B C depletion capacitance 125 qco InOut real Epi charge parameter 126 cjep InOut real B C extrinsic zero bias capacitance 127 pe InOut real B C built in potential 128 mc InOut real B C junction grading coefficient 129 ajc InOut real B C capacitance smoothing factor 130 cjcp InOut real Ze
143. qgd Out real Gate Drain charge storage 59 qgb Out real Gate Bulk charge storage 61 qbd Out real Bulk Drain charge storage 19 p Out real Instantaneous power 76 sens_1 de Out real dc sensitivity wrt length 70 sens_l real Out real real part of ac sensitivity wrt length 71 sens_l_ imag Out real imag part of ac sensitivity wrt length 74 sens_1_cplx Out complex ac sensitivity wrt length 72 sens_1_mag Out real sensitivity wrt l of ac magnitude 73 sens_1_ph Out real sensitivity wrt l of ac phase 75 sens_w_dc Out real de sensitivity wrt width 65 sens_w_real Out real real part of ac sensitivity wrt width 66 sens_w_imag Out real imag part of ac sensitivity wrt width 67 sens_w_mag Out real sensitivity wrt w of ac magnitude 68 sens_w_ph Out real sensitivity wrt w of ac phase 69 sens_w_cplx Out complex ac sensitivity wrt width 30 5 MOSFETS 511 512 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 5 3 2 MOS3 model parameters Name Direction Type Description 144 type Out string N channel or P channel MOS 133 nmos In flag N type MOSfet model 134 pmos In flag P type MOSfet model 101 vto InOut real Threshold voltage 101 vt0 InOut real 102 kp InOut real Transconductance parameter 103 gamma InOut real Bulk threshold
144. rd Out real Drain resistance 30 5 MOSFETS 517 29 drainconductance Out real Drain conductance 38 gm Out real Transconductance 39 gds Out real Drain Source conductance 37 gmb Out real Bulk Source transconductance 37 gmbs Out real Bulk Source transconductance 40 gbd Out real Bulk Drain conductance 41 gbs Out real Bulk Source conductance 42 cbd Out real Bulk Drain capacitance 43 cbs Out real Bulk Source capacitance 52 cgs Out real Gate Source capacitance 55 cgd Out real Gate Drain capacitance 58 cgb Out real Gate Bulk capacitance 54 cqgs Out real Capacitance due to gate source charge storage 57 cqgd Out real Capacitance due to gate drain charge storage 60 cqgb Out real Capacitance due to gate bulk charge storage 62 cqbd Out real Capacitance due to bulk drain charge storage 64 cqbs Out real Capacitance due to bulk source charge storage 44 cbdO Out real Zero Bias B D junction capacitance 45 cbdsw0 Out real Zero Bias B D sidewall capacitance 46 cbsO Out real Zero Bias B S junction capacitance 47 cbsswO Out real Zero Bias B S sidewall capacitance 63 qbs Out real Bulk Source charge storage 53 qgs Out real Gate Source charge storage 56 qgd Out real Gate Drain charge storage 59 qgb Out real Gate Bulk charge storage 61 qbd Out real Bulk Drain charge storage
145. s r combination changing with enable ONE enable changing to ONE from ZERO with an output changing combination of s and r raising set and raising re set have separate delays associated with them You may also specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN inputs other than on the s and r lines when enable ZERO immedi ately cause the output to go UNKNOWN Example SPICE Usage a4 12 4 5 6 3 14 16 latch2 model latch2 d_srlatch sr_delay 13 0e 9 enable delay 22 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise_delay 10 0e 9 fall_delay 3e 9 12 4 18 State Machine NAME_TABLE C_Function_Name cm_d_state Spice_Model_Name d_state Description digital state machine PORT_TABLE Port Name in clk 12 4 DIGITAL MODELS Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type D
146. simulation technology We also gratefully acknowledge the participation and support of our U S Air Force spon sors the Aeronautical Systems Center and the Warner Robins Air Logistics Command without which the development of XSPICE would not have been possible 32 CONTENTS Chapter 1 Introduction Ngspice is a general purpose circuit simulation program for nonlinear and linear analyses Cir cuits may contain resistors capacitors inductors mutual inductors independent or dependent voltage and current sources loss less and lossy transmission lines switches uniform distributed RC lines and the five most common semiconductor devices diodes BJTs JFETs MESFETs and MOSFETs Some introductory remarks on how to use ngspice may be found in chapter 20 Ngspice is an update of Spice3f5 the last Berkeley s release of Spice3 simulator family Ngspice is being developed to include new features to existing Spice3f5 and to fix its bugs Improving a complex software like a circuit simulator is a very hard task and while some improvements have been made most of the work has been done on bug fixing and code refactoring Ngspice has built in models for the semiconductor devices and the user need specify only the pertinent model parameter values There are three models for bipolar junction transistors all based on the integral charge model of Gummel and Poon however if the Gummel Poon param eters are not specified the basic model B
147. some room for parameter selection e g the geometries of transistors or values of passive elements to best fit the specific purpose This is what automatic circuit optimization will deliver In addition you may fine tune optimize and verify the circuit over voltage process or temperature corners So circuit optimization is a valuable tool in the hands of an experienced designer It will relieve you from the routine task of endless repetitions of re simulating your design You have to choose circuit variables as parameters to be varied during optimization e g device size component values bias inputs etc Then you may pose performance constraints onto you circuits e g Vnode lt 1 2V gain gt 50 etc Optimization objectives are the variables to be minimized or maximized The n objectives and m constraints are assembled into a cost function The optimization flow is now the following The circuit is loaded Several perhaps only one simulations are started with a suitable starter set of variables Measurements are done on the simulator output to check for the performance constraints and optimization objectives These data are fed into the optimizer to evaluate the cost function A sophisticated algorithm now determines a new set of circuit variables for the next simulator run s Stop conditions have to be defined by the user to tell the simulator when to finish e g fall below a cost function value parameter changes fall below a
148. text variable amp vector Echos the given text variable or vector to the screen echo without parameters issues a blank line 17 5 21 Edit Edit the current circuit General Form edit file Print the current ngspice input file into a file call up the editor on that file and allow the user to modify it and then read it back in replacing the original file If a file name is given then edit that file and load it making the circuit the current one The editor may be defined in spiceinit or spinit by a command line like set editor emacs Using MS Winows to allow the edit command calling an editor you will have to add the editor s path to the PATH variable of the command prompt windows see here edit then calls cmd exe with e g notepad and file as parameter if you have set set editor notepad exe to spiceinit or spinit 17 5 22 Eprint Print an event driven node only used with XSPICE op tion General Form eprint node Print an event driven node generated or used by an XSPICE A device These nodes are vectors not organized in plots See chapt 26 2 2 for an example 17 5 COMMANDS 277 17 5 23 FFT fast Fourier transform of vectors General Form fft vectorl vector2 This analysis provides a fast Fourier transform of the input vector s fft is much faster than spec 17 5 65 about a factor of 50 to 100 for larger vectors The fft command will create a new plot consisting of
149. the Fourier transforms of the vectors given on the command line Each vector given should be a transient analysis result i e it should have time as a scale You will have got these vectors by the tran Tstep Tstop Tstart command The vector should have a linear equidistant time scale Therefore linearization using the linearize command is recommended before running fft Be careful selecting a Tstep value small enough for good interpolation e g much smaller than any signal period to be resolved by fft see linearize command The Fast Fourier Transform will be computed using a window func tion as given with the specwindow variable Its code is based on the FFT function provided at http local wasp uwa edu au pbourke other dft downloaded April 5th 2008 A new plot named specx will be generated with a new vector having the same name as the input vector see command above containing the transformed data How to compute the fft from a transient simulation output ngspice 8 gt setplot tranl ngspice 9 gt linearize V 2 ngspice 9 gt set specwindow blackman ngspice 10 gt fft V 2 ngspice 11 gt plot mag V 2 Linearize will create a new vector V 2 in a new plot tran2 The command fft V 2 will create a new plot speci with vector V 2 holding the resulting data The variables listed in the following table control operation of the fft command Each can be set with the set command before calling fft specwin
150. the continuous ramping of the input value provides for any associated delays in the digitized signal Example SPICE Usage abridge2 1 8 adc_buff model adc_buff adc_bridge in_low 0 3 in high 3 5 12 3 3 Controlled Digital Oscillator NAME_TABLE 12 3 HYBRID MODELS 179 C_Function_Name cm_d_osc Spice_Model_ Name d_osc Description controlled digital oscillator PORT_TABLE Port Name cntl_in out Description control input output Direction in out Default_Type v d Allowed_Types v vd i id a Vector no no Vector_Bounds Null Allowed no no PARAMETER_TABLE Parameter_Name cntl_array freq_array Description control array frequency array Data_Type real real Default_Value 0 0 1 0e6 Limits 5 0 Vector yes yes Vector_Bounds 2 cntl_array Null_Allowed no no PARAMETER_TABLE Parameter_Name duty_cycle init_phase Description duty cycle initial phase of output Data_Type real real Default_Value 0 5 0 Limits 1e 6 0 999999 180 0 360 0 Vector no no Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter Name rise_delay fall_delay Description rise delay fall delay Data_Type real real Default_Value le 9 le 9 Limits 0 o Vector no no Vector_Bounds Null_Allowed yes yes Description The digital oscillator is a hybrid model which accepts as input a voltage or cur rent This input is compared to the voltage to frequency transfer charact
151. the control input Any sizes greater than 2 will yield a piecewise linear transfer characteristic For more detail refer to the description of the piecewise linear controlled source which uses a similar method to derive an output value given a control input Example SPICE Usage asine 1 2 in sine model in sine sine cntl_array 1 0 5 6 freq_array 10 10 1000 1000 out_low 5 0 out_high 5 0 12 2 21 Controlled Triangle Wave Oscillator NAME_TABLE C_Function_Name cm_triangle Spice_Model_ Name triangle Description controlled triangle wave oscillator PORT_TABLE Port Name cntl_in out Description control input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds Null_ Allowed no no PARAMETER_TABLE Parameter Name cntl_array freq_array Description control array frequency array Data_Type real real Default_Value 0 0 1 0e3 Limits 0 Vector yes yes Vector_Bounds 2 cntl_array Null_Allowed no no PARAMETER_TABLE Parameter_Name out_low out_high Description output peak low value output peak high value 170 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Data_Type real real Default_Value 1 0 1 0 Limits Vector no no Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter Name rise duty Description rise time duty cycle Data_Type real Default_Value 0 5
152. the current plot General Form setscale vector Defines the scale vector for the current plot If no argument is given the current scale vector is printed The scale vector delivers the values for the x axis in a 2D plot 17 5 COMMANDS 291 17 5 59 Settype Set the type of a vector General Form settype type vector Change the type of the named vectors to type Type names can be found in the following table Type Unit Type Unit notype pole time S Zero frequency Hz s param voltage V temp sweep Celsius current A res sweep Ohms onoise spectrum V or A 2 Hz impedance Ohms onoise integrated VorA admittance Mhos inoise spectrum V or A 2 Hz power W inoise integrated VorA phase Degree decibel dB 17 5 60 Shell Call the command interpreter General Form shell command Call the operating system s command interpreter execute the specified command or call for interactive use 17 5 61 Shift Alter a list variable General Form shift varname number If varname is the name of a list variable it is shifted to the left by number elements i e the number leftmost elements are removed The default varname is argv and the default number is 1 17 5 62 Show List device state General Form show devices parameters The show command prints out tables summarizing the operating condition of selected devices If devices is missing a def
153. the following transfer function describes a Chebyshev low pass filter with a corner pass band frequency of 1 rad s N s 0 139713 ra presT In order to define an s_xfer model for the above but with the corner frequency equal to 1500 rad s 9425 Hz the following instance and model lines would be needed a12 nodel node2 chebyl model cheby1 s_xfer num_coeff 1 den_coeff 1 1 09773 1 10251 int_ic 0 O 0 denormalized_freg 1500 In the above you add the normalized coefficients and scale the filter through the use of the denormalized freq parameter Similar results could have been achieved by performing the de normalization prior to specification of the coefficients and setting denormalized freq to the value 1 0 or not specifying the frequency as the default is 1 0 rad s Note in the above that frequencies are ALWAYS SPECIFIED AS RADIANS SECOND Truncation error checking is included in the s domain transfer block This should provide for more accurate simulations since the model will inherently request smaller time increments between simulation points if truncation errors would otherwise be excessive The int_ic parameter is an array that must be of the same size as the array of values specified for the den_coeff parameter Even if a 0 start value is required you have to add the specific int_ic vector to the set of coefficients see the examples above and below Example SPICE Usage al4 9 22 cheby_LP_3KHz model cheby_LP_3
154. the new code model by editing file ng spice rework src xspice icm xtradev modpath st Add a line with the new model name d_xxor Redo ngspice by entering directory ng spice rework release and issuing the commands make sudo make install And that s it In ng spice rework release src xspice icm xtradev you now will find cfunc c and ifspec c and the corresponding object files The new code model d_xxor resides in the shared library xtradev cm and is available after ngspice is started As a test example you may edit ng spice rework src xspice examples digital_models1 deck and change line 60 to the new model model d_xor1 d_xxor rise_delay 1 0e 6 fall_delay 2 0e 6 input_load 1 0e 12 The complete input file follows 25 3 HOW TO CREATE CODE MODELS 381 Code Model Test new xxor analysis type tran 0ls 4s input sources v2 200 0 DC PWL 0 0 0 2 0 0 2 0000000001 1 0 3 1 0 vi 100 0 DC PWL 0 0 0 1 0 0 0 1 0000000001 1 0 2 1 0 2 0000000001 0 0 3 0 0 lt 3 0000000001 1 0 4 1 0 xxx resistors to ground ri 100 O ik r2 200 O 1k adc_bridge blocks aconverter 200 100 2 1 adc_bridgel model adc_bridgel adc_bridge in_low 0 1 in_high 0 9 rise_delay 1 0e 12 fall_delay 1 0e 12 x xor block a7 1 2 70 d_xor1 model d_xori d_xxor rise _delay 1 0e 6 fall _delay 2 0e 6 input_load 1 0e 12 xxx dac_bridge blocks abridge
155. the part of the simulator Example SPICE Usage a3 23456780910 11 12 13 14 15 16 17 input_vector model input_vector d_source input_file source_simple text 12 5 PREDEFINED NODE TYPES 215 12 5 Predefined Node Types The following prewritten node types are included with the XSPICE simulator These along with the digital node type built into the simulator should provide you not only with valuable event driven modeling capabilities but also with examples to use for guidance in creating new UDN types 12 5 1 Real Node Type The real node type provides for event driven simulation with double precision floating point data This type is useful for evaluating sampled data filters and systems The type implements all optional functions for User Defined Nodes including inversion and node resolution For inversion the sign of the value is reversed For node resolution the resultant value at a node is the sum of all values output to that node 12 5 2 Int Node Type The int node type provides for event driven simulation with integer data This type is useful for evaluating round off error effects in sampled data systems The type implements all optional functions for User Defined Nodes including inversion and node resolution For inversion the sign of the integer value is reversed For node resolution the resultant value at a node is the sum of all values output to that node 216 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELIN
156. the show command does not use this format Some variables are listed as both input and output and their output simply returns the previously input value or the default value after the simulation has been run Some parameter are input only because the output system can not handle variables of the given type yet or the need for them as output variables has not been apparent Many such input variables are available as output variables in a different format such as the initial condition vectors that can be retrieved as individual initial condition values Finally internally derived values are output only and are provided for debugging and operating point output purposes If you want to access a device parameter of a device used inside of a subcircuit you may use the syntax as shown below 475 476 CHAPTER 30 MODEL AND DEVICE PARAMETERS General form device_identifier subcircuit_name lt subcircuit_name_nn gt device_name parameter Example input file transistor output characteristics two nested subcircuits vdd dl 0 2 0 vss vsss 0 0 vsig gl vsss 0 xmosl dl gl vsss levell subckt levell d3 g3 v3 xmos2 d3 g3 v3 level2 ends subckt level2 d4 g4 v4 ml d4 g4 v4 v4 nmos w le 5 1 3 5e 007 ends de vdd 0 5 0 1 vsig 05 1 control save all Om xmosl xmos2 ml vdsat run plot vss branch current measured at the top level plot m xmos1 xmos2 ml vdsat endc MODEL NMOS NMOS LEVEL 8 VERSION
157. the simulation as specified in the input file If there were any of the control lines ac op tran or dc they are executed The output is put in rawfile if it was given in addition to being available interactively 17 5 52 Rusage Resource usage General Form rusage resource Print resource usage statistics If any resources are given just print the usage of that resource Most resources require that a circuit be loaded Currently valid resources are decklineno Number of lines in deck netloadtime Nelist loading time netparsetime Netlist parsing time 288 CHAPTER 17 INTERACTIVE INTERPRETER elapsed The amount of time elapsed since the last rusage elapsed call faults Number of page faults and context switches BSD only space Data space used time CPU time used so far temp Operating temperature tnom Temperature at which device parameters were measured equations Circuit Equations time Total Analysis Time totiter Total iterations accept Accepted time points rejected Rejected time points loadtime Time spent loading the circuit matrix and RHS reordertime Matrix reordering time lutime L U decomposition time solvetime Matrix solve time trantime Transient analysis time tranpoints Transient time points traniter Transient iterations trancuriters Transient iterations for the last time point tranlutime Transient L U decomposition time transolvetime Transient matrix solve time everything All of the above
158. the temp keyword or calculated using the circuit tem perature and dtemp if present If both temp and dtemp are specified the latter is ignored Ngspice improves spice s resistors noise model adding flicker noise 1 f to it and the noisy keyword to simulate noiseless resistors The thermal noise in resistors is modeled according to the equation 5 AkT where k is the Boltzmann s constant and T the instance temperature Flicker noise model is KFIAF iR fn e Af 3 5 A small list of sheet resistances in 2 0 for conductors is shown below The table represents typical values for MOS processes in the 0 5 1 um range The table is taken from N Weste K Eshraghian Principles of CMOS VLSI Design 2nd Edition Addison Wesley Material Min Typ Max Inter metal metall metal2 0 005 0 007 0 1 Top metal metal3 0 003 0 004 0 05 Polysilicon poly 15 20 30 Silicide 2 3 6 Diffusion n p 10 25 100 Silicided diffusion 2 4 10 n well 1000 2000 5000 3 2 4 Resistors dependent on expressions behavioral resistor General form RXXXXXXX n n R expression lt tcl value gt lt tc2 value gt RXXXXXXX n n expression lt tcl value gt lt tc2 value gt Examples RI rr Or V rr lt Vt RO 2 RO tcl 2e 03 tc2 3 3e 06 66 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS Expression may be an equation or an expre
159. the voltages on two of the internal nodes of the transistor amplifier circuit ngspice 3 gt plot vcc coll emit The plot shown in Figure 20 3 should appear Notice in the circuit description that the power supply voltage source and the node it is connected to both have the name vcc The plot 20 1 AC COUPLED TRANSISTOR AMPLIFIER 341 command above has plotted the node voltage vcc However it is also possible to plot branch currents through voltage sources in a circuit ngspice always adds the special suffix branch to voltage source names Hence to plot the current into the voltage source named vcc we would use a command such as plot vec branch X ngspice Figure 20 3 VCC Collector and Emitter Voltages Now let s run a simple DC simulation of this circuit and examine the bias voltages with the print command One way to do this is to quit the simulator using the quit command edit the input file to change the tran line to op for operating point analysis re invoke the simulator and then issue the run command However ngspice allows analysis mode changes directly from the ngspice prompt All that is required is to enter the control line e g op without wow the leading ngspice will interpret the information on the line and start the new analysis run immediately without the need to enter a new run command To run the DC simulation of the transistor amplifier issue the fo
160. then the model built in geometry formulaes Each size range described by the additional model param eters LMIN LMAX WMIN and WMAX has its own model parameter set These model cards are defined by a number extension like nch 1 NGSPICE has a algorithm to choose the right model card by the requested W and L This is implemented for BSIM3 and BSIM4 model 3 1 4 Transistors and Diodes The area factor m often called parallel multiplier used on the diode BJT JFET and MES FET devices determines the number of equivalent parallel devices of a specified model The affected parameters are marked with an asterisk under the heading area in the model descrip tions see the various chapters on models below Several geometric factors associated with the channel and the drain and source diffusions can be specified on the MOSFET device line Two different forms of initial conditions may be specified for some devices The first form is included to improve the de convergence for circuits that contain more than one stable state If a device is specified OFF the dc operating point is determined with the terminal voltages for that device set to zero After convergence is obtained the program continues to iterate to obtain the exact value for the terminal voltages If a circuit has more than one dc stable state the OFF option can be used to force the solution to correspond to a desired state If a device is specified OFF when in reality the dev
161. this case there are two very closely spaced frequency components at F and F F gt One of the advantages of the Volterra series technique is that it computes distortions at mix frequencies expressed symbolically i e 15 3 ANALYSES 229 nF mF therefore one is able to obtain the strengths of distortion components accurately even if the separation between them is very small as opposed to transient analysis for example The disadvantage is of course that if two of the mix frequencies coincide the results are not merged together and presented though this could presumably be done as a postprocessing step Currently the interested user should keep track of the mix frequencies himself or herself and add the distortions at coinciding mix frequencies together should it be necessary 15 3 4 NOISE Noise Analysis General form noise v output lt ref gt sre dec lin oct pts fstart fstop lt pts_per_summary gt Examples noise v 5 VIN dec 10 1kHZ 100Mhz noise v 5 3 V1 oct 8 1 0 1 0e6 1 The noise line does a noise analysis of the circuit output is the node at which the total output noise is desired if ref is specified then the noise voltage vCoutput v ref is calculated By default ref is assumed to be ground src is the name of an independent source to which input noise is referred pts fstart and fstop are ac type parameters that specify the frequency range over which plots are desired pts_per_summary is a
162. this parameter heavily influence the possibility to reach the PSS Thus is a good practice to ensure a circuit to have a right tstab e g perfoming a separate TRAN analysis before to run PSS analysis oscnob is the node or branch where the oscillation dynamic is expected PSS analysis will give a brief report of harmonic content at this node or branch psspoints is number of step in evaluating predicted period after convergence is reached It is useful only in Time Domain plots However this number should be higher than 2 times the requested harms Otherwise the PSS analysis will properly adjust it harms number of harmonics to be calculated as requested by the user sciter number of allowed shooting cycle iterations Default is 50 steady_coeff is the weighting ceofficient for calculating the Global Convergence Error GCE which is the reference value in order to infer is convergence is reached The lower steady_coeff is set the higher the accuracy of predicted frequency can be reached but at longer analysis time and sciter number Default is le 3 uic use initial conditions is an optional keyword which indicates that the user does not want ngspice to solve for the quiescent operating point before beginning the transient analysis If this keyword is specified ngspice uses the values specified using IC on the various elements as the initial transient condition and proceeds with the analysis If the ic control line has been specified the
163. to be analyzed The Fourier analysis is performed over the interval lt TSTOP period TSTOP gt where TSTOP is the final time specified for the transient analysis and period is one period of the fundamental frequency The de component and the first nine harmonics are determined For maximum accuracy TMAX see the tran line should be set to period 100 0 or less for very high Q circuits The par expression option 15 5 6 allows to use algebraic expressions in the four lines 15 5 BATCH OUTPUT 245 15 5 5 PROBE Name vector s to be saved in raw file General form probe vector lt vector vector gt Examples probe i vin input output probe Oml id Same as SAVE see chapt 15 5 1 15 5 6 par expression Algebraic expressions for output General form par expression output par expression not in measure Examples four 1001 sql par v 1 v 1 Measure tran vtest find par v 2 v 1 AT 2 3m print tran output par v 1 v 2 v 1 v 2 plot de v 1 diff par v 4 v 2 0 01 out222 In the output lines four plot print save and in the measure evaluation it is pos sible to add algebraic expression for output in addition to vectors All of these output lines accept par expression where expression is any expression as has already been defined for the B source see chapter 5 1 Thus expression may contain predefined functions numer
164. to reduce the speed and sometimes the accuracy of the complete simulator On the other hand the use of a glued mode simulator allows the component models developed for the separate executables to be used without modification Ngspice is a native mode simulator providing both analog and event based simulation in the same executable The underlying algorithms of ngspice coming from XSPICE and its Code Model Subsystem allow use of all the standard SPICE models provide a pre defined collection of the most common analog and digital functions and provide an extensible base on which to build additional models 36 CHAPTER 1 INTRODUCTION 1 1 3 1 User Defined Nodes Ngspice supports creation of User Defined Node types User Defined Node types allow you to specify nodes that propagate data other than voltages currents and digital states Like digital nodes User Defined Nodes use event driven simulation but the state value may be an arbitrary data type A simple example application of User Defined Nodes is the simulation of a digital signal processing filter algorithm In this application each node could assume a real or integer value More complex applications may define types that involve complex data such as digital data vectors or even non electronic data Ngspice digital simulation is actually implemented as a special case of this User Defined Node capability where the digital state is defined by a data structure that holds a Boolean lo
165. udn_int_plot_val PLOT_VAL_ARGS E int int_struct STRUCT_PTR Output a value for the int struct 426 CHAPTER 27 CODE MODELS AND USER DEFINED NODES PLOT_VAL int_struct J void udn_int_print_val PRINT_VAL_ARGS int int_struct STRUCT_PTR Allocate space for the printed value PRINT_VAL malloc 30 Print the value into the string sprintf PRINT_VAL 8d int_struct F void udn_int_ipc_val IPC_VAL_ARGS Simply return the structure and its size IPC_VAL STRUCT_PTR IPC_VAL_SIZE sizeof int Evt_Udn_Info_t udn_int_info int integer valued data udn_int_create udn_int_dismantle udn_int_initialize udn_int_invert udn_int_copy udn_int_resolve udn_int_compare udn_int_plot_val udn_int_print_val udn_int_ipc_val Chapter 28 Error Messages Error messages may be subdivided into three categories These are 1 Error messages generated during the development of a code model Preprocessor Error Messages 2 Error messages generated by the simulator during a simulation run Simulator Error Mes sages 3 Error messages generated by individual code models Code Model Error Messages These messages will be explained in detail in the following subsections 2
166. voltage 78 rs Out real Source resistance 28 sourceconductance Out real Source conductance 79 rd Out real Drain resistance 510 CHAPTER 30 MODEL AND DEVICE PARAMETERS 29 drainconductance Out real Drain conductance 38 gm Out real Transconductance 39 gds Out real Drain Source conductance 37 gmb Out real Bulk Source transconductance 37 gmbs Out real Bulk Source transconductance 40 gbd Out real Bulk Drain conductance 41 gbs Out real Bulk Source conductance 42 cbd Out real Bulk Drain capacitance 43 cbs Out real Bulk Source capacitance 52 cgs Out real Gate Source capacitance 55 cgd Out real Gate Drain capacitance 58 cgb Out real Gate Bulk capacitance 54 cqgs Out real Capacitance due to gate source charge storage 57 cqgd Out real Capacitance due to gate drain charge storage 60 cqgb Out real Capacitance due to gate bulk charge storage 62 cqbd Out real Capacitance due to bulk drain charge storage 64 cqbs Out real Capacitance due to bulk source charge storage 44 cbdO Out real Zero Bias B D junction capacitance 45 cbdsw0 Out real Zero Bias B D sidewall capacitance 46 cbsO Out real Zero Bias B S junction capacitance 47 cbsswO Out real Zero Bias B S sidewall capacitance 63 qbs Out real Bulk Source charge storage 53 qgs Out real Gate Source charge storage 56
167. voltage source 02 CCCS Current controlled current source CCVS Current controlled voltage source VCCS Voltage controlled current source VCVS Voltage controlled voltage source Transmission Lines ssas cc cds ee ee eR eR ee 30 3 1 30 3 2 30 3 3 30 3 4 30 3 5 30 4 3 CplLines Simple Coupled Multiconductor Lines LTRA Lossy transmission line Tranline Lossless transmission line TransLine Simple Lossy Transmission Line URC Uniform R C line 2d eh eee wee eR EER EER ES BJT Bipolar Junction Transistor BJT Bipolar Junction Transistor Level2 VBIC Vertical Bipolar Inter Company Model 30 5 MOSFETs 30 5 1 MOSI Level 1 MOSFET model with Meyer capacitance model 30 5 2 MOS2 Level 2 MOSFET model with Meyer capacitance model 30 5 3 MOS3 Level 3 MOSFET model with Meyer capacitance model 23 471 471 472 472 473 475 477 477 479 480 481 482 482 483 484 485 485 486 486 487 487 488 489 490 491 492 492 495 498 502 502 505 509 24 CONTENTS 30 5 4 MOS6 Level 6 MOSFET model with Meyer capacitance model 513 30 5 5 MOS9 Modified Level 3 MOSFET model 516 30 5 6 BSIMI Berkeley Short Channel IGFET Model 520 30 5 7 BSIM2 Berkeley Sho
168. which specifies the time point with which the desired state variable is associated e g timepoint O will retrieve the address of storage for the current time point timepoint 1 will retrieve the address of stor age for the last accepted time point Note that once a model is exited storage to the current time point state storage location i e timepoint 0 will upon the next time point itera tion be rotated to the previous location i e timepoint 1 When rotation is done a copy of the old timepoint 0 storage value is placed in the new timepoint 0 storage location Thus if a value does not change for a particular iteration specific writing to timepoint 0 storage is not required These features allow a model coder to constantly know which piece of state information is being dealt with within the model function at each time point 416 CHAPTER 27 CODE MODELS AND USER DEFINED NODES 27 7 2 4 Integration and Convergence Functions int cm_analog integrate integrand integral partial double integrand The integrand double integral The current and returned value of integral double partial The partial derivative of integral wrt integrand int cm_analog converge state double state The state to be converged void cm_analog not_converged void cm_analog auto_partial double cm_ramp_factor cm_analog_integrate takes as input the integrand the input to the integrator and p
169. wise non linear functions though convergence may be adversely affected The following standard operators are defined unary Logical operators are lt gt gt lt gt lt Il amp amp A ternary function is defined asa b c which means IF a THEN b ELSE c Be sure to place a space in front of to allow the parser distinguishing it from other tokens 5 1 B SOURCE ASRC 87 Example Ternary function x B source test Clamped voltage source C P Basso Switched mode power supplies New York 2008 param Vhigh 4 6 param Vlow 0 4 Vinl 1 0 DC 0 PWL O 0 lu 5 Bel 2 0 V V 1 lt Vlow Vlow V 1 gt Vhigh Vhigh V 1 control set noaskquit tran Sn lu plot V 2 vs V 1 endc end If the argument of log In or sqrt becomes less than zero the absolute value of the argument is used If a divisor becomes zero or the argument of log or In becomes zero an error will result Other problems may occur when the argument for a function in a partial derivative enters a region where that function is undefined Parameters may be used like Vlow shown in the example above Parameters will be evaluated upon set up of the circuit vectors like V 1 will be evaluated during the simulation To get time into the expression you can integrate the current from a constant current source with a capacitor and use the resulting voltage don t forget to set the initial voltage across t
170. writing word If a variable is set to a list of values that are enclosed in parentheses which must be separated from their values by white space the value of the variable is the list The variables used by ngspice are listed in section 17 7 Set entered without any parameter will list all variables set and their values if applicable 17 5 56 Setcirc Change the current circuit General Form setcirce circuit name The current circuit is the one that is used for the simulation commands below When a circuit is loaded with the source command see below 17 5 64 it becomes the current circuit Setcirc followed by return without any parameter will list all circuits loaded 17 5 57 Setplot Switch the current set of vectors General Form setplot plotname Set the current plot to the plot with the given name or if no name is given prompt the user with a menu Note that the plots are named as they are loaded with names like tran1 or op2 These names are shown by the setplot and display commands and are used by diff below If the New plot item is selected the current plot becomes one with no vectors defined Note that here the word plot refers to a group of vectors that are the result of one ngspice run When more than one file is loaded in or more than one plot is present in one file ngspice keeps them separate and only shows you the vectors in the current plot 17 5 58 Setscale Set the scale vector for
171. yes reset_load reset load F real 1 0e 12 no yes 12 4 DIGITAL MODELS 195 Parameter Name rise_delay fall_delay Description rise delay fall delay Data_Type real real Default_Value 1 0e 9 1 0e 9 Limits 1 0e 12 1 0e 12 Vector no no Vector Bounds a Null_ Allowed yes yes Description The digital d type flip flop is a one bit edge triggered storage element which will store data whenever the clk input line transitions from low to high ZERO to ONE In addition asynchronous set and reset signals exist and each of the three methods of chang ing the stored output of the d_dff have separate load values and delays associated with them Additionally you may specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN input on the set or reset lines immediately results in an UN KNOWN output Example SPICE Usage a7 12345 6 flopi model flopi d_dff clk_delay 13 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise delay 10 0e 9 fall_delay 3e 9 12 4 13 JK Flip Flop NAME_TABLE C_Function_Name cm_d_jkff Spice_Model_Name d_jkff Description digital jk type flip flop PORT_TABLE Port Name j k Description j input k input Direction in in Default_Type d d Allowed_Types a ad Vector no no Vector_
172. 001 27 28 CONTENTS Indeed At the end of the day this is engineering and one learns to live within the limitations of the tools Kevin Aylward Warden of the Kings Ale Preface to the actual edition as of January 2011 Due to the wealth of new material and options in ngspice the actual order of chapters has been revised Several new chapters have been added Thy lyx text processors has allowed adding internal cross references The pdf format has become the standard format for distribution of the manual Within each new ngspice distribution starting with ngspice 21 a manual edition is provided reflecting the ngspice status at the time of distribution At the same time located at ngspice manuals the manual is constantly updated Every new ngspice feature should enter this manual as soon as it has been made available in the CVS source code Holger Vogt M lheim 2011 Acknowledgments ngspice contributors Spice was originally written at The University of California at Berkeley USA Since then there have been many people working on the software most of them releasing patches to the original code through the Internet The following people have contributed in some way Vera Albrecht Cecil Aswell Giles C Billingsley Phil Barker Steven Borley Stuart Brorson Mansun Chan Wayne A Christopher Al Davis Glao S Dezai Jon Engelbert Daniele Foci Noah Friedman David A Gates Alan Gillespie John Heidema
173. 01 5 000000e 006 5 439573e 003 3 397117e 002 9 867253e 001 17 5 84 Xgraph use the xgraph 1 program for plotting General Form xgraph file exprs plot options The ngspice ngnutmeg xgraph command plots data like the plot command but via xgraph a popular X11 plotting program If file is either temp or tmp a temporary file is used to hold the data while being plotted For available plot options see the plot command All options except for polar or smith plots are supported 17 6 Control Structures 17 6 1 While End General Form while condition statement end While condition an arbitrary algebraic expression is true execute the statements 17 6 2 Repeat End General Form repeat number statement end Execute the statements number times or forever if no argument is given 17 6 CONTROL STRUCTURES 301 17 6 3 Dowhile End General Form dowhile condition statement end The same as while except that the condition is tested after the statements are executed 17 6 4 Foreach End General Form foreach var value statement end The statements are executed once for each of the values each time with the variable var set to the current one var can be accessed by the var notation see below 17 6 5 If Then Else General Form if condition statement else statement end If the condition is non zero then the first set of statements are executed otherwise the sec
174. 05 ibbe InOut real B E breakdown current 206 tvbbel InOut real Linear temperature coefficient of VBBE 207 tvbbe2 InOut real Quadratic temperature coefficient of VBBE 208 tnbbe InOut real Temperature coefficient of NBBE 209 ebbe InOut real exp VBBE NBBE Vtv 210 dtemp InOut real Locale Temperature difference 211 vers InOut real Revision Version 212 vref InOut real Reference Version 502 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 5 MOSFETs 30 5 1 MOSI Level 1 MOSFET model with Meyer capacitance model 30 5 1 1 MOS1 instance parameters Name Direction Type Description 21 m InOut real Multiplier 2 iil InOut real Length l1 w InOut real Width 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 8 nrd InOut real Drain squares 7 nrs InOut real Source squares 9 off In flag Device initially off 12 icvds InOut real Initial D S voltage 13 icvgs InOut real Initial G S voltage 11 icvbs InOut real Initial B S voltage 20 temp InOut real Instance temperature 22 dtemp InOut real Instance temperature difference 10 ic In real vector Vector of D S G S B S voltages 15 sens_l In flag flag to request sensitivity WRT length 14 sens_w In flag flag to request sensitivity
175. 1 70 out dac1 model daci dac_bridge out_low 0 7 out_high out_undef 2 2 input_load 5 0e 12 t_rise fall 20e 9 3 5 50e 9 xxx simulation and plotting control run plot allv endc end An analog input delivered by the pwl voltage sources is transformed into the digital domain by an adc_bridge processed by the new code model d_xxor and then translated back into the analog domain If you want to change the functionality of the new model you have to edit ifspec ifs for the code model interface and cfunc mod for the detailed functionality of the new model Please see chapter 27 especially chapters 27 6 ff for any details And of course you make take the existing 382 CHAPTER 25 EXECUTION PROCEDURES analog digital mixed signal and other existing code models to be found in the subdirectories to ng spice rework release src xspice icm as stimulating examples for your work Chapter 26 Example circuits The following chapter is designed to demonstrate XSPICE features The first example circuit models the circuit of Figure 25 2 using the XSPICE gain block code model to substitute for the more complex and computationally expensive ngspice transistor model This example illus trates one way in which XSPICE code models can be used to raise the level of abstraction in circuit modeling to improve simulation speed The next example shown in Figure 26 1 illustrates many of the more advanced features
176. 1 FC Coefficient for forward bias 0 5 0 depletion capacitance formula TNOM TREF Parameter measurement C 27 50 temperature TLEV BJT temperature equation selector 0 TLEVC BJT capac temperature equation 0 selector TRE1 1st order temperature coefficient Lee 0 0 le 3 for RE TRE2 2nd order temperature coefficient Lise 0 0 le 5 for RE TRC1 Ist order temperature coefficient Lee 0 0 le 3 for RC TRC2 2nd order temperature coefficient 1 002 0 0 le 5 for RC TRB1 Ist order temperature coefficient Lee 0 0 le 3 for RB TRB2 2nd order temperature coefficient 1 20 0 0 le 5 for RB 8 2 BJT MODELS NPN PNP 113 TRBM1 Ist order temperature coefficient 1 c 0 0 le 3 for RBM TRBM2 2nd order temperature coefficient Lie 0 0 le 5 for RBM TBFl 1st order temperature coefficient 1 c 0 0 le 3 for BF TBF2 2nd order temperature coefficient 1 20 0 0 le 5 for BF TBR1 1st order temperature coefficient 1 c 0 0 le 3 for BR TBR2 2nd order temperature coefficient Lice 0 0 le 5 for BR TIKF1 Ist order temperature coefficient Lee 0 0 le 3 for IKF TIKF2 2nd order temperature coefficient Lec 0 0 le 5 for IKF TIKRI Ist order temperature coefficient Lee 0 0 le 3 for IKR TIKR2 2nd order temperature coefficient Lec 0 0 le 5 for IKR TIRB1 lst order temperature coefficient 1 c 0 0 le 3 for IRB TIRB2 2nd order temperature coefficient 1 20 0 0 le 5 for
177. 11 automatic with MS Win set colorl black x wider grid and plot lines set xbrushwidth 2 plot vss branch endc E dc1 single nmos transistor for bsim3v3 1 general purpose check id vd DER vss branch o ee Esla a C E ae eee m T Y Y A AA op po PO Pee ee es OoOo a A AAA AA Figure 18 2 Plotting with white background 18 2 MS Windows Console If the with windows flag for configure under MINGW is omitted or console_debug or con sole_release is selected in the MS Visual Studio configuration manager then ngspice will com pile without any internal graphical input or output capability This may be useful if you apply ngspice in a pipe inside the MSYS window or use it being called from another program and just generating output files from a given input The plot 17 5 42 command will not do and leads to an error message 324 CHAPTER 18 NGSPICE USER INTERFACES You still may generate graphics output plots or prints by gnuplot 17 5 25 if installed properly 18 7 or by selecting a suitable printing option 18 6 18 3 LINUX If ngspice is compiled with the with x flag for configure the standard user interface is a console for input and the X11 graphics system for output with the interactive plot 17 5 42 command For more sophisticated input user interfaces please have a look at chapt 18 8 18 4 CygWin The CygWin interface is similar to the LINUX interface 18 3 i e console in
178. 1108 0 oo The leakage currents temperature dependence is log factor IS T IS e N 7 8 log factor JSW T JSW e N 7 9 where logfactor is defined EG EG T tor XTI In 7 10 log factor VINOM VT nom 7 10 The contact potentials bottom wall an sidewall temperature dependence is T EGnom EG T VJ T VJ V T 3 1 7 11 T inom UM Nom V TNOM V T AN T T EGnom EG T PHP T PHP V T 13 1 7 12 7 mom O nom VINOM V T cei The depletion capacitances temperature dependence is VI T CJ T CJ MJ 4 0e T TNOM w D 7 13 PHP T CJSW T CISW MJISW 4 0e T TNOM mo 1 7 14 The transit time temperature dependence is TT T TT 14 TTT1 7 TNOM TTT2 7 TNOM 7 15 The junction grading coefficient temperature dependence is MJ T MJ 1 TM1 T TNOM TM2 T TNOM 7 16 The series resistance temperature dependence is RS T RS 1 TRS T TNOM TRS2 T TNOM 1 17 7 3 DIODE EQUATIONS 107 Noise model The diode has three noise contribution one due to the presence of the parasitic resistance rs and the other two shot and flicker due to the pn junction The thermal noise due to the parasitic resistance is gt 4kTAf The shot and flicker noise contributions are KF IAF 2 2qipAf af 7 19 f 108 CHAPTER 7 DIODES Chapter 8 BJTs 8 1 Bipolar Junct
179. 119 119 120 120 120 121 121 122 122 122 122 124 124 127 128 130 130 130 131 131 132 132 CONTENTS ESA A 147 12 2 9 multi_input_pwl block esos ci a AA 149 1220 Analog SUL Series ise rs asa e ae 150 A Zener Diode cr a EA A ad BK AA TADA E 151 124 l2 Current Lime sk ee Re a Re eee Pe ee Pee OH 153 12 2 13 SII Blook ooo a AAA Re eS A 153 12 2 14 Differentiator nc ee oe eR e ae 157 22 S UR oe e os ra rs eia ee GE amp oe Rye Ss 158 12 2 16 S Domain Transfer Function 2 24262 lt lt ocres 160 122 17 Slew Rate Block ce ka kee hace Re hae ERR ER eR RS 162 12 2 18 Inductive Coupling 2 444 544 444645404 22 44 Pek ee es 164 12 22 19 Magneti COS ooo eke ee RES tarda AA 165 12 2 20 Controlled Sine Wave Oscillator 168 12 2 21 Controlled Triangle Wave Oscillator 169 12 2 22 Controlled Square Wave Oscillator 170 12 2 23 Controlled One Shot orcos Re Rea ee Pe ee es 172 1222A perience IBIS ns Sk a BRE ED wee ee eo 174 12 2 25 Inductance Meler AAA 175 12 3 Hybond Models 20 be e moa mai gaus ane saoi miiy aiok cd 175 12 3 1 Digital to Analog Node Bridge o 176 12 3 2 Analog to Digital Node Bridge o 177 12 3 3 Controlled Digital Oscillator o 178 12 3 4 Node bridge from digital to real with enable 180 12 3 5 A Z 1 block working on real data 180 12 3 6 A gain
180. 15 3 1 over the specified frequency range DEC decade variation and N is the number of points per decade OCT stands for octave variation and N is the number of points per octave LIN stands for linear variation and N is the number of points fstart is the starting frequency and fstop is the final frequency Note that in order for this analysis to be meaningful at least one independent source must have been specified with an ac value In this ac analysis all non linear devices are linearized around their actual dc operating point All Ls and Cs get their imaginary value depending on the actual frequency step Each output vector will be calculated relative to the input voltage current given by the ac value Tin equals to 1 in the example below The resulting node voltages and branch currents are complex vectors Therefore you have to be careful using the plot command Example AC test lin 10 AC 1 R1 1 2 100 LI 20 1 control AC LIN 101 10 10K plot v 2 real part plot mag v 2 magnitude plot db v 2 same as vdb 2 plot imag v 2 plot real v 2 plot phase v 2 phase in rad plot 180 PI phase v 2 phase in deg endc end In addition to the plot examples given above you may use the variants of vxx node described in chapter 15 5 2 like vdb 2 17 5 2 Alias Create an alias for a command General Form alias word text Causes word to be aliased to text History substitutions may be us
181. 17 118 CHAPTER 9 JFETS Chapter 10 MESFETs 10 1 MESFETs General form ZXXXXXXX ND NG NS MNAME lt AREA gt lt OFF gt lt IC VDS VGS gt Examples Zl 7 2 3 ZMl1 OFF 10 2 MESFET Models NMF PMF 10 2 1 Model by Statz e a The MESFET model level 1 is derived from the GaAs FET model of Statz et al as described in 11 The de characteristics are defined by the parameters VTO B and BETA which determine the variation of drain current with gate voltage ALPHA which determines saturation voltage and LAMBDA which determines the output conductance The formula are given by B Ves Vr Vis Eb Ve V7 1 AS B Vos Vr y r EAAS LVas for V gt 4 3 1 LVas for0 lt Vas lt 2 10 1 Two ohmic resistances rd and rs are included Charge storage is modeled by total gate charge as a function of gate drain and gate source voltages and is defined by the parameters cgs cgd and pb 119 120 CHAPTER 10 MESFETS Name Parameter Units Default Example Area VTO Pinch off voltage V 2 0 2 0 BETA Transconductance parameter AJv2 1 0e 4 1 0e 3 i B Doping tail extending parameter I v 0 3 0 3 dd ALPHA Saturation voltage parameter I v 2 2 LAMBDA Channel length modulation parameter I v 0 1 0e 4 RD Drain ohmic resistance Q 0 100 ha RS Source ohmic resistance Q 0 100 CGS Zero bias G S junction capacitance F 0 SpF CGD Zero bias G D ju
182. 3 sens_w_mag Out real sensitivity wrt w of ac magnitude 254 sens_w_ph Out real sensitivity wrt w of ac phase 255 sens_w_cplx Out complex ac sensitivity wrt width 30 5 MOSFETS 30 5 4 2 MOS6 model parameters Name Direction Type Description 140 type Out string N channel or P channel MOS 101 vto InOut real Threshold voltage 101 vt0 InOut real 102 kv InOut real Saturation voltage factor 103 nv InOut real Saturation voltage coeff 104 ke InOut real Saturation current factor 105 ne InOut real Saturation current coeff 106 nvth InOut real Threshold voltage coeff 107 ps InOut real Sat current modification par 108 gamma InOut real Bulk threshold parameter 109 gammal InOut real Bulk threshold parameter 1 110 sigma InOut real Static feedback effect par 111 phi InOut real Surface potential 112 lambda InOut real Channel length modulation param 113 lambda0 InOut real Channel length modulation param 0 114 lambdal InOut real Channel length modulation param 1 115 rd InOut real Drain ohmic resistance 116 rs InOut real Source ohmic resistance 117 cbd InOut real B D junction capacitance 118 cbs InOut real B S junction capacitance 119 is InOut real Bulk junction sat current 120 pb InOut real B
183. 3 while loop lt 3 echo within while loop amp loop no output expected let loop loop 1 end echo after while loop amp loop 310 CHAPTER 17 INTERACTIVE INTERPRETER Control structure examples continued test for while repeat if break let loop 0 while loop lt 4 let index 0 repeat let index index 1 if index gt 4 break end end echo index g index loop amp loop let loop loop 1 end test sequence for foreach echo foreach outvar 0 0 5 11 5 echo parameters outvar foreach parameters are variables not vectors end test for if else end echo let loop 0 let index 1 dowhile loop lt 10 let index index 2 if index lt 128 echo kindex lt 128 else echo gindex ge 128 end let loop loop 1 end simple test for label goto echo let loop 0 label starthere echo start amp loop let loop loop 1 if loop lt 3 goto starthere end echo end amp loop 17 8 SCRIPTS 311 Control structure examples continued test for label nested goto echo let loop 0 label startherel echo start nested amp loop let loop loop 1 if loop lt 3 if loop lt 3 goto startherel end end echo end amp loop test for label goto echo let index 0 label starthere2 let loop 0 echo We are at start with index g index and loop amp loop if index lt 6 label inhere let index index 1 if loop lt 3 let loop loop 1
184. 5 Code Model d_source loading error kERROR D_SOURCE source txt file was not read successfully This message occurs whenever the d source model has experienced any difficulty in loading the source txt or user specified file This will occur with any of the following problems e Width of a vector line of the source file is incorrect e A time point value is duplicated or is otherwise not monotonically increasing e One of the output values was not a valid 12 State value Os Is Us Or 1r Ur Oz 1z Uz Ou lu Uu 28 3 6 Code Model d_state loading error KERROR D_STATE state in file was not read successfully The most common cause of this problem is a trailing blank line in the state in file This error occurs when the state in file or user named state machine input file has not been read successfully This is due to one of the following e The counted number of tokens in one of the file s input lines does not equal that required to define either a state header or a continuation line Note that all comment lines are ignored so these will never cause the error to occur e An output state value was defined using a symbol which was invalid 1 e it was not one of the following Os 1s Us Or 1r Ur Oz 1z Uz Ou lu Uu e An input value was defined using a symbol which was invalid 1 e it was not one of the following 0 1 X or x index_error kK ERROR D_STATE An error exists in the order
185. 5 V us will be expressed as 0 5e 6 etc The slew rate block will continue to raise or lower its output until the difference between the input and the output values is zero Thereafter it will resume following the input sig nal unless the slope again exceeds its rise or fall slope limits The range input specifies a smoothing region above or below the input value Whenever the model is slewing and the output comes to within the input or the range value the partial derivative of the output with respect to the input will begin to smoothly transition from 0 0 to 1 0 When the model is no longer slewing output input dout din will equal 1 0 Example SPICE Usage 164 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE a15 1 2 slewl model slew1 slew rise_slope 0 5e6 fall_slope 0 5e6 12 2 18 Inductive Coupling NAME_TABLE C_Function_Name Spice_Model_Name cm_lcouple lcouple Description inductive coupling for use with core model PORT_TABLE Port_Name 1 mmf out Description inductor mmf output in ampere turns Direction inout inout Default_Type hd hd Allowed_Types h hd hd Vector no no Vector Bounds z Null_Allowed no no PARAMETER_TABLE Parameter Name num_ turns Description number of inductor turns Data_Type real Default_Value 1 0 Limits Vector no Vector Bounds Null_Allowed yes Description This function is a conceptual model which is used as a build
186. 55 225 value V 3 V 3 Offs 5 3 3 TABLE A data entry by a tabulated listing is available with syntax similar to the E Source see chapt 5 2 3 Syntax for data entry from table Gxxx nl n2 TABLE expression x0 yO xl yl x2 y2 Example simple comparator with current output and voltage control GCMP 0 11 TABLE V 10 9 SMV OV SMV 5V R 11 0 1k 94 CHAPTER 5 NON LINEAR DEPENDENT SOURCES BEHAVIORAL SOURCES 5 3 4 POLY see E Source at chapt 5 2 4 5 3 5 LAPLACE See E Source chapt 5 2 5 for an equivalent code model replacement 5 3 6 Example An example file is given below Example input file VCCS VCVS non linear dependency param Vi 1 param Offs 0 01 Vi VCCS depending on V 3 B21 intl O V V 3 V 3 Gl 21 22 intl O 1 measure current through VCCS vm 22 0 de 0 R21 21 0 1 x new VCCS depending on V 3 G51 55 225 cur V 3 V 3 Offs measure current through VCCS vm5 225 0 dc O R51 55 0 1 x VCVS depending on V 3 B31 int2 0 V V 3 V 3 El 1 O int2 0 1 RI 1 0 1 x new VCVS depending on V 3 E41 4 0 vol V 3 V 3 Offs R4 4 0 1 x control voltage V1 3 0 PWL O O 100u Vi control set noaskquit tran 10n 100u uic plot i El i E41 plot i vm i vm5 endc end To get this functionality the compatibility mode has to be set in spinit or spiceinit by set ngbehavior all Chapter 6 Transmission Lines Ngspice
187. 7 10 MISCELLANEOUS OLD STUFF HAS TO BE CHECKED FOR RELEVANCE 319 out 0 The bias voltages are connected to your circuit via the resistances of value Rbase at the input and output respectively This may be of importance for the operating point calculations if your circuit draws a large dc current Now edit the ac commands see 17 5 1 according to the circuit provided e g ac lin 100 2 5MEG 250MEG use for Tschebyschef Be careful to keep both ac lines in the control endc section the same and only change both in equal measure Select the plot commands lin log or smith grid or the write to file commands write wrdata or wrs2p according to your needs Run ngspice in interactive mode ngspice s param cir 17 10 MISCELLANEOUS old stuff has to be checked for relevance C shell type quoting with and and backquote substitution may be used Within single quotes no further substitution like history substitution is done and within double quotes the words are kept together but further substitution is done Any text between backquotes is replaced by the result of executing the text as a command to the shell History substitutions similar to C shell history substitutions are also available see the C shell manual page for all of the details The characters and have the same effects as they do in the C Shell 1 e home directory and alternative expansion It is possible to use the wildcard characters
188. 79E 11 C12 9 78265E 12 C22 9 143578E 11 L11 3 83572E 7 L12 8 26253E 8 L22 3 83572E 7 ni1 nix are the nodes at port 1 with gndl noi nox are the nodes at port 2 with gnd2 Optional instance parameter len is the length of the lines may be expressed in m The CPL model takes a number of parameters Name Parameter Units Type Default Example R resistance length O unit 0 0 0 2 L inductance length H unit 0 0 9 13e 9 G conductance length mhos unit 0 0 0 0 C capacitance length F unit 0 0 3 65e 12 LENGTH length of line no default 1 0 All RLGC parameter are given in Maxwell matrix form For R and G matrix the diagonal elements must be specified for L and C matrix the lower or upper triangular elements must specified Model parameter LENGTH is a scalar and is mandatory Chapter 7 Diodes 7 1 Junction Diodes General form DXXXXXXX n n mname lt area val gt lt m val gt lt pj val gt lt off gt lt ic vd gt lt temp val gt lt dtemp val gt Examples DBRIDGE 2 10 DIODE1 DCLMP 3 7 DMOD AREA 3 0 IC 0 2 The pn junction diode implemented in ngspice expands the one found in spice3f5 Perimeter effects and high injection level have been introduced into the original model and temperature dependence of some parameters has been added n and n are the positive and negative nodes respectively mname is the model name Instance parameters may follow dedicated to only the di
189. 8 Subcircuits In some applications describing a device by embedding the required elements in the main circuit file as is done for the amplifier in Figure 25 1 is not desirable A hierarchical approach may be taken by using subcircuits An example of a subcircuit statement is shown in the second circuit file X1 Amp_In O Amp_Out Amplifier Subcircuits are always identified by a device label beginning with X Just as with other devices all of the connected nodes are specified Notice in this example that three nodes are used Finally the name of the subcircuit is specified Elsewhere in the circuit file the simulator looks for a statement of the form subckt lt Name gt lt Nodei gt lt Node2 gt lt Node3 gt This statement specifies that the lines that follow are part of the Amplifier subcircuit and that the three nodes listed are to be treated wherever they occur in the subcircuit definition as referring respectively to the nodes on the main circuit from which the subcircuit was called Normal device model and comment statements may then follow The subcircuit definition is concluded with a statement of the form ends lt Name gt 376 CHAPTER 25 EXECUTION PROCEDURES 25 1 1 3 XSPICE Code Models In the previous example the specification of the amplifier was accomplished by using a NGSPICE Voltage Controlled Voltage Source device This is an idealization of the actual amplifier Prac tical amplifiers inclu
190. 8 1 Preprocessor Error Messages The following is a list of error messages that may be encountered when invoking the directory creation and code modeling preprocessor tools These are listed individually and explanations follow the name listing Usage cmpp ifs mod lt filename gt 1st The Code Model Preprocessor cmpp command was invoked incorrectly ERROR Too few arguments The Code Model Preprocessor cmpp command was invoked with too few arguments ERROR Too many arguments The Code Model Preprocessor cmpp command was invoked with too many arguments ERROR Unrecognized argument 427 428 CHAPTER 28 ERROR MESSAGES The Code Model Preprocessor cmpp command was invoked with an invalid argument ERROR File not found s lt filename gt The specified file was not found or could not be opened for read access ERROR Line lt line number gt of lt filename gt exceeds XX characters The specified line was too long ERROR Pathname on line lt line number gt of lt filename gt exceeds XX characters The specified line was too long ERROR No pathnames found in file lt filename gt The indicated modpath Ist file does not have pathnames properly listed ERROR Problems reading ifspec ifs in directory lt pathname gt The Interface Specification File ifspec ifs for the code model could not be read ERROR Model name lt model name gt is same as internal SPICE model name A model has bee
191. A DEVICE MODELS Under OS CYGWIN tested with actual CYGWIN on MS Windows 7 64 bit please use autogen_cyg sh followed by make and make install Under OS MINGW a direct compilation would require the additional installation of perl module XML LibXML which is not as straightforward as it should be However you may start with a CYGWIN compile as described above If you then go to your MSYS window cd to the adms top directory and start mingw compile sh you will obtain admsXml exe copied to MSYS bin and you are ready to go To facilitate installation under MS Windows a admsXml exe zipped binary is available Just copy it to MSYS bin directory and start working on your verilog models A short test of a successful installation is admsXml v usage release name admsXml version 2 3 0 date Aug 4 2010 time 10 24 18 Compilation of admsXml with MS Visual Studio is not possible because the source code has variable declarations not only at the top of a block but deliberately also in the following lines This is 0 k by the C99 standard but not supported by MS Visual Studio Chapter 14 Mixed Level Simulation ngspice with TCAD 14 1 Cider Ngspice implements mixed level simulation through the merging of its code with CIDER de tails see chapt 29 CIDER is a mixed level circuit and device simulator that provides a direct link between tech nology parameters and circuit performance A mixed level circui
192. ABLE Spice _Model_Name real_delay C_Function_Name ucm_real_delay Description A Z 1 block working on real data PORT_TABLE Port_Name in clk out Description input clock output Direction in in out Default_Type real d real Allowed_Types real d real Vector no no no Vector_Bounds z Null Allowed no no no PARAMETER_TABLE 12 3 HYBRID MODELS Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed NAME_TABLE Spice_Model_Name C_Function_Name Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed NAME_TABLE Spice _Model_Name C_Function_Name 181 delay delay from clk to out real le 9 1e 15 no yes 12 3 6 A gain block for event driven real data real_gain ucm_real_ gain A gain block for event driven real data in out input output in out real real real real no no no no in_offset gain out_offset input offset gain output offset real real real 0 0 1 0 0 0 no no no yes yes yes delay ic delay initial condition real real 1 0e 9 0 0 no no yes
193. AMPLES rantaa ma nadd ad kaa A 465 29 104 BEE ALSO o eos a u mace kaca sane a AAA 465 2917 NUMD gh hb ARA AA 466 ZU AT DESCRIPTION o cesis be ER ERE EERE ER ea kea 466 E 6 bk gh Re RROD RSH EGE ERERERPOEEREESSS 467 BAe eo bg pi a Oe eR eS ee EE OR a Oe ES 467 29 174SER ALSO e voce We kea HR Re pa RO Ke Re OO KG 468 e A hide dood Gig de doe Gow a Gua gia dg 468 ENDIF ie Ne ge Be gy Be eh DAS Be AE th Se A a Ee a 468 2918 1 DESCRIPTION sisas daa Ow RAR AA 468 A 8 885 Soa Sow Boe ed Boe OR He eR OO a 469 DIA Pe canoso RESEND EREE RES d 469 29 134 BEE ALSO oe as a d au Ee OS CEE EES SES ES 470 Pee a 48ehe 4 bee eae beh tie 470 29 19NUMOS iia ee ERE ER EERE ER EER SARE ERPS RSS 470 219 1 DESCRIPTION 224 44 6 644 444 444 4824444489426 4 470 CONTENTS 29 20Cider examples IV Appendices 29 19 2 Parameters a 29 193 EXAMPLES ooo cec whe we we s a E saron ee 29 1V4 SEE ALSO 2 eco amp aoe Gow a be et aa 30 Model and Device Parameters 30 1 Elementary Derick o e coa a RS wR OS eR SR BE 30 2 30 3 30 1 1 Resistor 30 1 2 Capacitor gt Fixed capacitor A ok RR A A 30 1 3 Inductor Fixed inductor 30 1 4 Mutual Mutual Inductor Voltage and current sources coo ee eb ee ee eee ee sr 30 2 1 30 2 2 30 2 3 30 2 4 30 2 5 30 2 6 30 2 7 ASRC Arbitrary source 2 ee ee Pee ee ee 5 Isource Independent current source cw ee eds Vsource Independent
194. ARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed no in_low input low value real 0 0 no yes hyst hysteresis real 0 1 0 0 no yes out_upper_limit output upper limit real 1 0 no yes fraction no in_high input high value real 1 0 no yes out_lower_limit output lower limit real 0 0 no yes input_domain input smoothing domain real 0 01 no yes smoothing fraction absolute value switch boolean TRUE no yes Description The Hysteresis block is a simple buffer stage that provides hysteresis of the output with respect to the input The in low and in high parameter values specify the center voltage or current inputs about which the hysteresis effect operates The output values are limited to out lower limit and out upper limit The value of hyst is added to the in low and in high points in order to specify the points at which the slope of the hysteresis function would normally change abruptly as the input transitions from a low to a high value Likewise the value of hyst is subtracted from the in high and in low values in order to specify the points at which the slope of the hysteresis function would normally change abruptly as the input transitions from a high to a low value In fact the slope of the hysteresis function is never allowed to change abruptly but is smooth
195. Bounds Null Allowed no no PORT_TABLE Port Name clk Description clock Direction in Default_Type d Allowed_Types a Vector no Vector_Bounds 196 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name no set asynchronous set in d a no yes out data output out d a no yes clk_delay delay from clk real 1 0e 9 1 0e 12 no yes reset_delay delay from reset real 1 0 1 0e 12 no yes jk_load j k load values F real 1 0e 12 a oe set_load reset asynchronous reset in d a no yes Nout inverted data output out d d no yes set_delay delay from set real 1 0e 9 1 0e 12 no yes ic output initial state int 0 0 2
196. CAD Group Copyright 1985 1994 Regents of the University of California xx Please get your ngspice manual from http ngspice sourceforge net docs html xx Please file your bug reports at http ngspice sourceforge net bugrep html Creation Date Jan 1 2011 13 36 34 K KK K K K ngspice 2 gt ngspice 11 gt version 14 Note rawfile is version 14 current version is 24 ngspice 12 gt version 24 ngspice 13 gt Note for developers The option listing returned when version is called with the f flag is built at compile time using ifdef blocks When new compile switches are added if you want them to appear on the list you have to modify the code in misccoms c 17 5 80 Where Identify troublesome node or device General Form where When performing a transient or operating point analysis the name of the last node or device to cause non convergence is saved The where command prints out this information so that you can examine the circuit and either correct the problem or make a bug report You may do this either in the middle of a run or after the simulator has given up on the analysis For transient simulation the iplot command can be used to monitor the progress of the analysis When the analysis slows down severely or hangs interrupt the simulator with control C and issue the where command Note that only one node or device is printed there may be problems with more than one node 17 5 81 Wrdata Write data
197. CAPT RTSEMT Examples VNoiw 1 0 DC 0 TRNOISE 20n 0 5n 0 0 white VNoilof 1 0 DC 0 TRNOISE O 10p 1 1 12p 1 f VNoiwlof 1 0 DC 0 TRNOISE 20 10p 1 1 12p white and 1 f IALL 10 0 DC O trnoise Im lu 1 0 0 im 15m 22u 50u white 1 f RTS Transient noise is an experimental feature allowing low frequency transient noise injection and analysis See chapter 15 3 10 for a detailed description NA is the Gaussian noise rms voltage amplitude NT is the time between sample values breakpoints will be enforced on multiples of this value NALPHA exponent to the frequency dependency NAMP rms voltage or current amplitude are the parameters for 1 f noise RTSAM the random telegraph signal amplitude RTSCAPT the mean of the exponential distribution of the trap capture time and RTSEMT its emission time mean White Gaussian 1 f and RTS noise may be combined into a single statement Name Parameter Default value Units NA Rms noise amplitude Gaussian V A NT Time step sec NALPHA 1 f exponent 0 lt a lt 2 NAMP Amplitude 1 f V A RTSAM Amplitude V A RTSCAPT Trap capture time sec RTSEMT Trap emission time sec If you set NT and RTSAM to 0 the noise option TRNOISE is ignored Thus you may switch off the noise contribution of an individual voltage source VNOI by the command alter vnoil trnoise 0000 no noise alter vrts trnoise 000000 0 no noise See chapt 17 5 3 fo
198. CE3 C1 Nutmeg Programmer s Manual Department of Electrical Engineering and Computer Sciences University of California Berkeley California April 1987 Thomas L Quarles SPICE3 Version 3C1 User s Guide Department of Electrical En gineering and Computer Sciences University of California Berkeley California April 1989 Brian Kernighan and Dennis Ritchie The C Programming Language Second Edition Prentice Hall Englewood Cliffs New Jersey 1988 Code Level Modeling in XSPICE F L Cox W B Kuhn J P Murray and S D Tynor published in the Proceedings of the 1992 International Symposium on Circuits and Sys tems San Diego CA May 1992 vol 2 pp 871 874 A Physically Based Compact Model of Partially Depleted SOI MOSFETs for Analog Cir cuit Simulation Mike S L Lee Bernard M Tenbroek William Redman White James Benson and Michael J Uren IEEE JOURNAL OF SOLID STATE CIRCUITS VOL 36 NO 1 JANUARY 2001 pp 110 121 A Realistic Large signal MESFET Model for SPICE A E Parker and D J Skellern IEEE Transactions on Microwave Theory and Techniques vol 45 no 9 Sept 1997 pp 1563 1571 Integrating RTS Noise into Circuit Analysis T B Tang and A F Murray IEEE ISCAS 2009 Proc of IEEE ISCAS Taipei Taiwan May 2009 pp 585 588 link R Storn and K Price Differential Evolution technical report TR 95 012 ICSI March 1995 see report download or the DE web page
199. Controlled Source warrant special attention These are the han dling of endpoints and the smoothing of the described transfer function near coordinate points In order to fully specify outputs for values of in outside of the bounds of the PWL function i e less than x_array 0 or greater than x_array n where n is the largest user specified coordinate index the PWL Controlled Source model extends the slope found between the lowest two coordinate pairs and the highest two coordinate pairs This has the effect of making the transfer function completely linear for in less than x_array 0 and in greater than x_array n It also has the potentially subtle effect of unrealistically causing an output to reach a very large or small value for large inputs You should thus keep in mind that the PWL Source does not inherently provide a limiting capability In order to diminish the potential for non convergence of simulations when using the PWL block a form of smoothing around the x_array y_array coordinate points is neces sary This is due to the iterative nature of the simulator and its reliance on smooth first derivatives of transfer functions in order to arrive at a matrix solution Consequently the input_domain and fraction parameters are included to allow you some control over the amount and nature of the smoothing performed Fraction is a switch that is either TRUE or FALSE When TRUE the default setting the si
200. D Specifies the number of dimensions of the polynomial The number of pairs of controlling nodes must be equal to the number of dimensions N and N nodes are output nodes Positive current flows from the node through the source to the node The lt NC1 gt and lt NC1 gt are in pairs and define a set of controlling voltages A particular node can appear more than once and the output and controlling nodes need not be different The example yields a voltage output controlled by two input voltages v 3 0 and v 4 0 Four polynomal coefficients are given The equivalent function to generate the output is O 13 6 v 3 0 2 v 4 0 005 v 3 v 3 Generally you will set the equation according to POLY 1 y pO k1 X1 p2 X1 X1 p3 X1 X1 X1 POLY 2 y pO p1 X1 p2 X2 p3 X1 X1 p4 X2 X1 p5 X2 X2 p6 X1 X1 X1 p7 X2 X1 X1 p8x X2 X2x X1 p9 X2 X2 X2 prs POLY 3 y pO p1x X1 p2 X2 p3 X3 p4 X1 X1 p5 X2 X1 p6 X3 X1 p7 X2 X2 p8 X2 X3 p9 X3x X3 where X1 is the voltage difference of the first input node pair X2 of the second pair and so on Keeping track of all polynomal coefficient obviously becomes rather tedious for larger polynomals 5 2 5 LAPLACE Currently ngspice does not offer a direct E Source element with the LAPLACE option There 1s however a XSPICE code model equivalent called x_fer see chapt 12 2 16 which you may invoke manually The XSPICE optio
201. DEFINED NODES value is used If there is no default value an undefined value is passed to the code model and the PARAM_NULL macro will return a value of TRUE so that defaulting can be handled within the model itself If the value of Null _Allowed is FALSE or NO then the simulator will flag an error if the SPICE MODEL card omits a value for this parameter 27 6 3 5 Default Value If the Null_Allowed field specifies TRUE for this parameter then a default value may be specified This value is supplied for the parameter in the event that the SPICE MODEL card does not supply a value for the parameter The default value must be of the correct type The De fault Value field is introduced by the Default_Value keyword and is followed by a numeric boolean complex or string literal as appropriate 27 6 3 6 Limits Integer and real parameters may be constrained to accept a limited range of values The follow ing range syntax is used whenever such a range of values is required A range is specified by a square bracket followed by a value representing a lower bound separated by space from another value representing an upper bound and terminated with a closing square bracket e g 0 10 The lower and upper bounds are inclusive Either the lower or the upper bound may be replaced by a hyphen to indicate that the bound is unconstrained e g 10 is read as the range of values greater than or
202. E may be read as NGSPICE with XSPICE code model sub system enabled You may enable the option by adding enable xspice to the configure command The MS Windows distribution already contains the XSPICE option 24 2 The XSPICE Code Model Subsystem The new component of ngspice the Code Model Subsystem provides the tools needed to model the various parts of your system While NGSPICE is targeted primarily at integrated circuit IC analysis XSPICE includes features to model and simulate board level and system level designs as well The Code Model Subsystem is central to this new capability providing XSPICE with an extensive set of models to use in designs and allowing you to add your own models to this model set The NGSPICE simulator at the core of XSPICE includes built in models for discrete com ponents commonly found within integrated circuits These model primitives include compo nents such as resistors capacitors diodes and transistors The XSPICE Code Model Subsystem 369 370 CHAPTER 24 XSPICE BASICS extends this set of primitives in two ways First it provides a library of over 40 additional prim itives including summers integrators digital gates controlled oscillators s domain transfer functions and digital state machines See chapter 12 for a description of the library entries Second it adds a code model generator to ngspice which provides a set of programming utili ties to make it easy for you to crea
203. Flag to indicate NMOS 179 pmos In flag Flag to indicate PMOS 30 5 MOSFETS 30 5 7 BSIM2 Berkeley Short Channel IGFET Model 30 5 7 1 BSIM2 instance parameters Name Direction Type Description 21l InOut real Length liw InOut real Width 14 m InOut real Parallel Multiplier 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 8 nrd InOut real Number of squares in drain 7 nrs InOut real Number of squares in source 9 off InOut flag Device is initially off 11 vds InOut real Initial D S voltage 12 vgs InOut real Initial G S voltage 10 vbs InOut real Initial B S voltage 13 ic In unknown vector Vector of DS GS BS initial voltages 30 5 7 2 BSIM2 model parameters 523 Name Direction Type Description 101 vfb InOut real Flat band voltage 102 lvfb InOut real Length dependence of vfb 103 wvfb InOut real Width dependence of vfb 104 phi InOut real Strong inversion surface potential 105 Iphi InOut real Length dependence of phi 106 wphi InOut real Width dependence of phi 107 kl InOut real Bulk effect coefficient 1 108 Ik1 InOut real Length dependence of k1 109 wkl InOut real Width dependence of k1 110 k2 InOut real Bulk effect
204. G WITH XSPICE Chapter 13 Verilog A Device models 13 1 Introduction The ngspice adms interface will implement extra HICUM level0 and level2 HICUM model web page MEXTRAM MEXTRAM model web page EKV EKV model web page and PSP NXP MOS model 9 web page models written in Verilog A behavior language 13 2 adms To compile Verilog A compact models into ngspice ready C models the the program admsXml is required Details of this software are described in adms home page 13 3 How to integrate a Verilog A model into ngspice 13 3 1 How to setup a va model for ngspice The root entry for new Verilog A models is src spicelib devices adms Below the modelname entry the Verilog A code should reside in folder admsva e g ng spice rework src spicelib devices adms ekv admsva ekv va The file extension is fixed to va Certain files must modified to create the interface to ngspice see the guideline README adms in the ngspice root 13 3 2 Adding admsXml to your build environment To facilitate the installation of adms a source code package has been assembled for use with ngspice available as a zip file for download It is based on adms source code from the subver sion repository downloaded on August 1st 2010 and has been slightly modified see ChangeLog Under OS LINUX tested with SUSE 11 2 64 bit you may expand the zip file and run autogen_lin sh followed by make and make install 217 218 CHAPTER 13 VERILOG
205. HAPTER 30 MODEL AND DEVICE PARAMETERS 30 2 6 VCCS Voltage controlled current source 30 2 6 1 VCCS instance parameters Name Direction Type Description 1 gain InOut real Transconductance of source gain 8 sens_trans In flag flag to request sensitivity WRT transconductance 3 pos_node Out integer Positive node of source 4 neg_node Out integer Negative node of source 5 cont_p_node Out integer Positive node of contr source 6 cont_n_node Out integer Negative node of contr source 2 ic In real Initial condition of controlling source 911 Out real Output current ll v Out real Voltage across output 10 p Out real Power 206 sens_dc Out real dc sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real imag part of ac sensitivity 203 sens_mag Out real sensitivity of ac magnitude 204 sens_ph Out real sensitivity of ac phase 205 sens_cplx Out complex ac sensitivity 30 2 7 VCVS Voltage controlled voltage source 30 2 7 1 VCVS instance parameters Name Direction Type Description 1 gain InOut real Voltage gain 9 sens_gain In flag flag to request sensitivity WRT gain 2 pos_node Out integer Positive node of source 3 neg_node Out integer Negative node of source 4 cont_p_node Out integer Positive node of contr source 5
206. ION The properties of an electrode can be set using the contact card The only changeable property is the work function of the electrode material and this only affects contacts made to an insulating material All contacts to semiconductor material are assumed to be ohmic in nature 29 4 2 PARAMETERS Name Type Description Number Integer ID number of the electrode Work function Real Work function of electrode material eV 29 4 3 EXAMPLES The following shows how the work function of the gate contact of a MOSFET might be changed to a value appropriate for a P polysilicon gate contact num 2 workf 5 29 29 4 4 SEE ALSO electrode material 446 CHAPTER 29 CIDER USER S MANUAL 29 55 DOMAIN REGION Identify material type for section of a device SYNOPSIS domain number material position region number material position 29 5 1 DESCRIPTION A device is divided into one or more rectilinear domains each of which has a unique identifica tion number and is composed of a particular material Domain aka region cards are used to build up domains by associating a material type with a box shaped section of the device A single domain may be the union Of multiple boxes When multiple domain cards overlap in space the one occurring last in the input file will determine the ID number and material type of the overlapped region Each edge of a domain box can be specified in terms of its location or
207. IRB TNC1 1st order temperature coefficient 1 c 0 0 le 3 for NC TNC2 2nd order temperature coefficient 1 20 0 0 le 5 for NC TNE1 1st order temperature coefficient 1 c 0 0 le 3 for NE TNE2 2nd order temperature coefficient Lfeg 0 0 le 5 for NE TNF1 1st order temperature coefficient sc 0 0 le 3 for NF TNF2 2nd order temperature coefficient Lic 0 0 le 5 for NF TNRI Ist order temperature coefficient Lec 0 0 le 3 for IKF TNR2 2nd order temperature coefficient 1 20 0 0 le 5 for IKF TVAF1 lst order temperature coefficient 1 c 0 0 le 3 for VAF TVAF2 2nd order temperature coefficient 1 20 0 0 le 5 for VAF TVARI lst order temperature coefficient 1 c 0 0 le 3 for VAR 114 CHAPTER 8 BJTS TVAR2 2nd order temperature coefficient Life 0 0 le 5 for VAR CTC Ist order temperature coefficient Lee 0 0 le 3 for CJC CTE Ist order temperature coefficient 18 0 0 le 3 for CJE CTS 1st order temperature coefficient Lee 0 0 le 3 for CJS TVJC Ist order temperature coefficient 1 0 0 0 le 5 for VJC TVJE 1st order temperature coefficient Lee 0 0 le 3 for VJE TITF1 Ist order temperature coefficient 1 c 0 0 le 3 for ITF TITF2 2nd order temperature coefficient 1 0 0 0 le 5 for ITF TTF1 lst order temperature coefficient Lee 0 0 le 3 for TF TTF2 2nd order temperature coefficient Lee 0 0 le 5 for TF TTRI Ist order temperature coefficient Lec 0 0 le 3 for TR TTR2 2nd o
208. In flag Device initially off 12 icvds InOut real Initial D S voltage 13 icvgs InOut real Initial G S voltage 11 icvbs InOut real Initial B S voltage 77 temp InOut real Instance operating temperature 81 dtemp InOut real Instance temperature difference 10 ic In real vector Vector of D S G S B S voltages 15 sens_l In flag flag to request sensitivity WRT length 14 sens_w In flag flag to request sensitivity WRT width 22 dnode Out integer Number of drain node 23 gnode Out integer Number of gate node 24 snode Out integer Number of source node 25 bnode Out integer Number of bulk node 26 dnodeprime Out integer Number of internal drain node 27 snodeprime Out integer Number of internal source node 30 von Out real 31 vdsat Out real Saturation drain voltage 32 sourcevcrit Out real Critical source voltage 33 drainvcrit Out real Critical drain voltage 78 rs Out real Source resistance 506 CHAPTER 30 MODEL AND DEVICE PARAMETERS 28 sourceconductance Out real Source conductance 79 rd Out real Drain resistance 29 drainconductance Out real Drain conductance 38 gm Out real Transconductance 39 gds Out real Drain Source conductance 37 gmb Out real Bulk Source transconductance 37 gmbs Out real 40 gbd Out real Bulk Drain conductance 41 gbs Out real Bulk Source conduc
209. JT reduces to the simpler Ebers Moll model In either case and in either models charge storage effects ohmic resistances and a current dependent output conductance may be included The second bipolar model BJT2 adds de current com putation in the substrate diode The third model VBIC contains further enhancements for advanced bipolar devices The semiconductor diode model can be used for either junction diodes or Schottky barrier diodes There are two models for JFET the first JFET is based on the model of Shichman and Hodges the second JFET2 is based on the Parker Skellern model All the original six MOSFET models are implemented MOS1 is described by a square law I V characteristic MOS2 1 is an analytical model while MOS3 1 is a semi empirical model MOS6 2 is a simple analytic model accurate in the short channel region MOSS is a slightly modified Level 3 MOSFET model not to confuse with Philips level 9 BSIM 1 3 4 BSIM2 5 are the old BSIM Berkeley Short channel IGFET Model models MOS2 MOS3 and BSIM include second order effects such as channel length modulation subthreshold conduction scattering limited velocity saturation small size effects and charge controlled capacitances The recent MOS models for submicron devices are the BSIM3 Berkeley BSIM3 web page and BSIM4 Berkeley BSIM4 web page models Silicon on insulator MOS transistors are described by the SOI models from the BSIMSOI family Berkeley BSIMSOI web
210. KHz s_xfer in_offset 0 0 gain 1 0 int_ic 0 0 0 num_coeff 1 0 den_coeff 1 0 1 42562 1 51620 12 2 17 Slew Rate Block NAME_TABLE C_Function_Name cm_slew Spice_Model_Name slew Description A simple slew rate follower block PORT_TABLE Port Name in out Description input output 12 2 ANALOG MODELS Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds Null_ Allowed no no PARAMETER_TABLE Parameter Name rise_slope Description maximum rising slope value Data_Type real Default_Value 1 0e9 Limits Vector no Vector_Bounds Null1_Allowed yes PARAMETER_TABLE Parameter_Name fall_slope Description maximum falling slope value Data_Type real Default_Value 1 0e9 Limits Vector no Vector Bounds 5 Null_Allowed yes PARAMETER_TABLE Parameter_Name range Description smoothing range Data_Type real Default_Value 0 1 Limits Vector no Vector Bounds Nul1_Allowed yes 163 Description This function is a simple slew rate block that limits the absolute slope of the output with respect to time to some maximum or value The actual slew rate effects of over driving an amplifier circuit can thus be accurately modeled by cascading the ampli fier with this model The units used to describe the maximum rising and falling slope values are expressed in volts or amperes per second Thus a desired slew rate of 0
211. L LAST gt Measure statement measure tran teval WHEN v 2 v 1 RISE LAST measures the time point when v 2 and v 1 are equal v 2 rising for the last time General form 4 MEASURE DCI ACITRANI SP result FIND out_variable WHEN out_variable2 val lt ID td gt lt FROM val gt lt TO val gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt Measure statement Measure tran yeval FIND v 2 WHEN v 1 0 4 FALL LAST returns the dependent y variable drawn from v 2 at the time point when v 1 equals a value of 0 4 v 1 falling for the last time General form 5 MEASURE DCIACITRANISP result FIND out_variable WHEN out_variable2 out_variable3 lt ID td gt lt CROSS CROSS LAST gt lt RISE IRISE LAST gt lt FALL FALL LAST gt Measure statement Measure tran yeval FIND v 2 WHEN v 1 v 3 FALL 2 returns the dependent y variable drawn from v 2 at the time point when v 1 crosses v 3 v 1 falling for the second time General form 6 MEASURE DC IACITRANISP result FIND out_variable AT val Measure statement measure tran yeval FIND v 2 AT 2m returns the dependent y variable drawn from v 2 at the time point 2 ms given by AT time 240 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE 15 4 7 AVGIMINIMAXIPPIRMSIMIN_ATIMAX AT General form 7 MEASURE DCIACITRANISP result AVGIMINIMAXI PP IRMSIMIN_ATI MAX_AT out_variable lt ID td gt lt FROM val gt lt TO v
212. L model name NBJT level SYNOPSIS Element QXXXXXXX nl n2 n3 model name geometry temperature initial conditions SYNOPSIS Output SAVE small signal values 29 18 1 DESCRIPTION NBJT is the name for a bipolar transistor numerical model In addition the 2D model can be used to simulate other three terminal structures such as a JFET or MESFET However the 1D model is customized with a special base contact and cannot be used for other purposes See the options card for more information on how to customize the device type and setup the 1D base contact Both 1 and 2D devices are supported These correspond to the LEVEL l and models respec tively If left unspecified it is assumed that the device is one dimensional All numerical three terminal element names begin with the letter Q If the device is a bipolar transistor then the nodes are specified in the order collector nl base n2 emitter n3 For a JFET or MESFET the node order is drain n1 gate n2 source n3 After this must come the name of the model used for the element The remaining information can come in any order The layout dimensions of an element are specified relative to the geometry of a default device For the 1D BJT the default device has an area of Im and for 2D devices the default device has a width of Im In addition it is assumed that the default 1D BJT has a base contact with area equal to the emitter area length of l
213. LE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed cm_s_xfer s_ xfer s domain transfer function in out input output in out V V v vd i id v vd i id no no no no in_offset gain input offset gain real real 0 0 1 0 no no yes yes num_coeff numerator polynomial coefficients real yes 1 no den_coeff denominator polynomial coefficients real yes 1 no 12 2 ANALOG MODELS 161 PARAMETER_TABLE Parameter Name int_ic Description integrator stage initial conditions Data_Type real Default_Value 0 0 Limits Vector yes Vector Bounds den_coeff Null_ Allowed yes PARAMETER_TABLE Parameter Name denormalized_freq Description denorm corner freq radians for 1 rad s coeffs Data_Type real Default_Value 1 0 Limits Vector no Vector Bounds Null_Allowed yes Description The s domain transfer function is a single input single output transfer function in the Laplace transform variable s that allows for flexible modulation of the frequency domain characteristics of a signal Ac and transient simulations are supported The code model may be configured to produce an arbitrary s domain transfer function with the following restrictions 1 The degree of the numerator polynomial cannot exceed that of the denominator polynomial in the variable s 2 The coefficients for a polynomial must b
214. LIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE SUPPORT UP DATES ENHANCEMENTS OR MODIFICATIONS EKKE E E E K K K K K K K K K K K K K K K K K K K K K K K K K K K KK K K K K K K K K K K K K K K K K K K K KK K K K K K K K K K K K K K K K 2K K K K 32 2 1 Modified BSD license All old BSD licenses of SPICE or CIDER have been changed to the modified BSD license according to the following publication see ftp ftp cs berkeley edu pub 4bsd README Impt License Change July 22 1999 To All Licensees Distributors of Any Version of BSD As you know certain of the Berkeley Software Distribution BSD source code files require that further distributions of products containing all or portions of the software acknowledge within their advertising materials that such products contain software developed by UC Berke ley and its contributors Specifically the provision reads 3 All advertising materials mentioning features or use of this software must display the following acknowledgment This product includes software developed by the University of California Berkeley and its contributors Effective immediately licensees and distributors are no longer required to include the acknowl edgment within advertising materials Accordingly the foregoing paragraph of those BSD Unix files containing it is hereby deleted in its entirety William Hoskins Director Office of Technology Licensing University of California Be
215. Limits 1e 10 0 999999999 Vector no Vector Bounds Null_ Allowed yes Description This function is a controlled triangle ramp wave oscillator with parametrizable values of low and high peak output and rise time duty cycle It takes an input voltage or current value This value is used as the independent variable in the piecewise linear curve described by the coordinate points of the cntl_array and freq_array pairs From the curve a frequency value is determined and the oscillator will output a triangle wave at that frequency From the above it is easy to see that array sizes of 2 for both the cntl_array and the freq_array will yield a linear variation of the frequency with respect to the control input Any sizes greater than 2 will yield a piecewise linear transfer charac teristic For more detail refer to the description of the piecewise linear controlled source which uses a similar method to derive an output value given a control input Example SPICE Usage ain 1 2 rampl model rampi triangle cntl_array 1 0 5 6 freq_array 10 10 1000 1000 out_low 5 0 out_high 5 0 duty_cycle 0 9 12 2 22 Controlled Square Wave Oscillator NAME_TABLE C_Function_Name cm_square Spice_Model_ Name square Description controlled square wave oscillator PORT_TABLE Port Name cntl_in out Description control input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no
216. M J M Pelgrom e a Matching Properties of MOS Transistors IEEE J Sol State Circ vol 24 no 5 Oct 1989 pp 1433 1440 Part Il XSPICE Software User s Manual 367 Chapter 24 XSPICE Basics 24 1 ngspice with the XSPICE option The XSPICE option allows you to add event driven simulation capabilities to NGSPICE NGSPICE now is the main software program that performs mathematical simulation of a circuit specified by you the user It takes input in the form of commands and circuit descriptions and produces output data e g voltages currents digital states and waveforms that describe the circuit s behavior Plain NGSPICE is designed for analog simulation and is based exclusively on matrix solution techniques The XSPICE option adds even driven simulation capabilities Thus designs that contain significant portions of digital circuitry can be efficiently simulated together with analog components NGSPICE with XSPICE option also includes a User Defined Node capability that allows event driven simulations to be carried out with any type of data The XSPICE option has been developed by the Computer Science and Information Technology Laboratory at Georgia Tech Research Institute of the Georgia Institute of Technology Atlanta Georgia 30332 at around 1990 and enhanced by the NGSPICE team The manual is based on the original XSPICE user s manual made available from Georgia Tech In the following the term XSPIC
217. NAND SUBCKT ONEBIT 1 2 3 4 5 6 AND X2 1 7 8 6 NAND X3 2 7 9 6 NAND X4 8 9 10 6 NAND X5 3 10 11 6 NAND X6 3 11 12 6 NAND X7 10 11 13 6 NAND X8 1213 4 6 NAND X9 11 7 5 6 NAND ENDS ONEBIT SUBCKT TWOBIT 1 2 3456789 x NODES INPUT BITO 2 BIT1 2 OUTPUT BITO BITI CARRY IN CARRY OUT VCC X1 1 2 7 510 9 ONEBIT X2 3 4 10 6 8 9 ONEBIT ENDS TWOBIT SUBCKT FOURBIT 1 2 3 456789 10 11 12 13 14 15 xNODES INPUT BITO 2 BIT1 2 BIT2 2 BIT3 2 OUTPUT BITO BIT1 BIT2 BIT3 CARRY IN CARRY OUT VCC XI 1 2 3 4 9 10 I3 16 15 TWOBIT X2 5 6 7 8 11 12 16 14 15 TWOBIT ENDS FOURBIT 20 7 TRANSMISSION LINE INVERTER 347 Continue 4 Bit adder MOS xxx DEFINE NOMINAL CIRCUIT VCC 99 0 DC 3 3V VINIA 1 0 PULSE O 3 0 10NS 10NS 10NS 50NS VINIB 2 0 PULSE 0 3 0 10NS 10NS 20NS 100NS VIN2A 3 0 PULSE 0O 3 0 10NS 10NS 40NS 200N5 VIN2B 4 0 PULSE 0O 3 0 10NS 10NS 80NS 400NS VINBA 5 0 PULSE O 3 0 10NS 10NS 160NS 800NS VIN3B 6 0 PULSE O 3 0 10NS 10NS 320NS 1600NS VIN4A 7 0 PULSE 0O 3 0 10NS 10NS 640NS 3200NS VIN4B 8 0 PULSE 0O 3 0 10NS 10NS 1280NS 6400NS X1 1 2 3 4 5 6 7 8 9 10 11 12 O 13 99 FOURBIT option acct TRAN INS 1000NS x save VINIA VINIB VIN2A VIN2B VIN3A VIN3B VIN4A VIN4B save V 1 V 2 V 3 V 4 V 5 V 6 V 7 V 8 include Modelcards modelcard nmos include Modelcards modelcard pmos END 20 7 Transmission Line Inverter The following deck simulates a transmis
218. ND DEVICE PARAMETERS 126 tf InOut real Ideal forward transit time 127 xtf InOut real Coefficient for bias dependence of TF 128 vtf InOut real Voltage giving VBC dependence of TF 129 itf InOut real High current dependence of TF 130 ptf InOut real Excess phase 131 cjc InOut real Zero bias B C depletion capacitance 132 vje InOut real B C built in potential 132 pe InOut real 133 mjc InOut real B C junction grading coefficient 133 me InOut real 134 xcje InOut real Fraction of B C cap to internal base 135 tr InOut real Ideal reverse transit time 136 cjs InOut real Zero bias C S capacitance 136 ccs InOut real Zero bias C S capacitance 137 vjs InOut real Substrate junction built in potential 137 ps InOut real 138 mjs InOut real Substrate junction grading coefficient 138 ms InOut real 139 xtb InOut real Forward and reverse beta temp exp 140 eg InOut real Energy gap for IS temp dependency 141 xti InOut real Temp exponent for IS 142 fc InOut real Forward bias junction fit parameter 301 invearlyvoltf Out real Inverse early voltage forward 302 invearlyvoltr Out real Inverse early voltage reverse 303 invrollofff Out real Inverse roll off forward 304 invrolloffr Out real Inverse roll off reverse 305 collectorconduct Out real
219. ND OUTPUT CONTROL BATCH MODE General form options optl opt2 or opt optval Examples options reltol 005 trtol 8 The options line allows the user to reset program control and user options for specific simulation purposes Options specified to Ngspice via the option command see chapt are also passed on as if specified on a options line Any combination of the following options may be included in any order x below represents some positive number 15 1 1 General Options ACCT causes accounting and run time statistics to be printed NOACCT no printing of statistics no printing of the Initial Transient Solution NOINIT suppresses only printing of the Initial Transient Solution maybe combined with ACCT LIST causes the summary listing of the input data to be printed NOMOD suppresses the printout of the model parameters NOPAGE suppresses page ejects NODE causes the printing of the node table OPTS causes the option values to be printed TEMP x Resets the operating temperature of the circuit The default value is 27 C 300K TEMP can be overridden by a temperature specification on any temperature dependent instance TNOM x resets the nominal temperature at which device parameters are measured The de fault value is 27 C 300 deg K TNOM can be overridden by a specification on any temperature dependent device model 15 1 2 DC Solution Options The following options controls properties pertaini
220. Ngspice Users Manual Version 24plus Describes ngspice made from actual sources in CVS Paolo Nenzi Holger Vogt February 20 2012 Locations The project and download pages of ngspice may be found at Ngspice home page http ngspice sourceforge net Project page at sourceforge http sourceforge net projects ngspice Download page at sourceforge http sourceforge net projects ngspice files CVS source download http sourceforge net scm type cvs amp group_id 38962 Status This manual is a work in progress Some to dos are listed in the following More is surely needed You are invited to report bugs missing items wrongly described items bad English style etc To Do 1 Review of chapt 1 3 2 hfet1 2 jfet2 model descriptions 3 tclspice compilation chapt 19 6 How to use this manual The manual is a work in progress It may accompany a specific ngspice release e g ngspice 24 as manual version 24 If its name contains Version xxplus it describes the actual code status found at the date of issue in the concurrent version system CVS The manual is in tended to provide a complete description of the ngspice functionality its features commands or procedures It is not a book about learning spice usage but the novice user may find some hints how to start using ngspice Chapter 20 1 gives a short introduction how to set up and simulate a small circuit Chapter 31 is about compiling and installing ngspice fr
221. O for which the specified outputs are desired The form for voltage or current output variables is the same as given in the previ ous section for the print command Spice restricts the output variable to the following forms though this restriction is not enforced by ngspice V N1 lt N2 gt specifies the voltage difference between nodes N1 and N2 If N2 and the preceding comma is omitted ground 0 is assumed See the print command in the previous section for more details For compatibility with spice2 the following five additional values can be accessed for the ac analysis by replacing the V in V N1 N2 with VR Real part VI Imaginary part VM Magnitude VP Phase VDB 20log10 magnitude I VXXXXXXX specifies the current flowing in the independent voltage source named VXXXXXXX Positive current flows from the positive node through the source to the negative node Not yet implemented For the ac analysis the corresponding replacements for the letter I may be made in the same way as described for voltage outputs Output variables for the noise and distortion analyses have a different general form from that of the other analyses There is no limit on the number of print lines for each type of analysis The par expression option 15 5 6 allows to use algebraic expressions in the print lines width 15 5 7 selects the maximum number of characters per line 244 CHAPTER 15
222. OCED_ PTR malloc sizeof int r ccc cc rr cr ror void udn_int_dismantle DISMANTLE_ ARGS Do nothing There are no internally malloc ed things to dismantle void udn_int_initialize INITIALIZE_ ARGS int int_struct STRUCT_PTR Initialize to zero int struct 0 J void udn_int_invert INVERT_ARGS int int_struct STRUCT_PTR Invert the state int Struct int struct 27 8 USER DEFINED NODE DEFINITION FILE 425 void udn_int_copy COPY_ARGS E int int_from_struct INPUT_STRUCT_PTR int int_to_struct OUTPUT_STRUCT_PTR Copy the structure int_to_struct int from _struct J void udn_int_resolve RESOLVE_ARGS int array INPUT_STRUCT_PTR_ARRAY int out OUTPUT_STRUCT_PTR int num struct INPUT_STRUCT_PTR_ARRAY_SIZE int sum int i Sum the values for i 0 sum 0 i num_struct i sum array i Assign the result out sum void udn_int_compare COMPARE ARGS int int_structi STRUCT_PTR_1 int int_struct2 STRUCT_PTR_2 Compare the structures if int_struct1 int_struct2 EQUAL TRUE else EQUAL FALSE ccc ccc rrr ror void
223. OCOMPACT option described in the OPTIONS section TRUNCNR is a flag that turns on the use of Newton Raphson iterations to determine an appropriate time step in the time step control routines The 98 CHAPTER 6 TRANSMISSION LINES default is a trial and error procedure by cutting the previous time step in half REL and ABS are quantities that control the setting of breakpoints The option most worth experimenting with for increasing the speed of simulation is REL The default value of 1 is usually safe from the point of view of accuracy but occasionally increases computation time A value greater than 2 eliminates all breakpoints and may be worth trying depending on the nature of the rest of the circuit keeping in mind that it might not be safe from the viewpoint of accuracy Breakpoints may usually be entirely eliminated if it is expected the circuit will not display sharp discontinuities Values between 0 and 1 are usually not required but may be used for setting many breakpoints COMPACTREL may also be experimented with when the option TRYTOCOMPACT is specified in a OPTIONS card The legal range is between 0 and 1 Larger values usually decrease the accuracy of the simulation but in some cases improve speed If TRYTOCOMPACT is not specified ona OPTIONS card history compaction is not attempted and accuracy is high NOCONTROL TRUNCDONTCUT and NOSTEPLIMIT also tend to increase speed at the expense of accuracy 6 3 Uniform Distributed RC Li
224. OSFET device models which differ in the formulation of the I V characteristic 11 2 1 MOS Level 1 This model is also known as the Schichman Hodges model This is the first model written and the one often described in the introductory textbooks of electronics This model i applicable only to long channel devices and the use of Meyer s model for the C V part makes it non charge conserving 11 2 2 MOS Level 2 This model tries to overcome the limitations of the Level 1 model addressing several short channel effect like velocity saturation The implementation of this model is complicated and this leads to many convergence problems C V calculations can be done with the original Meyer model non conserving 11 2 3 MOS Level 3 This is a semi empirical model derived from the Level 2 one This model is often used for digital design and in the years has proved to be robust A discontinuity in the model with respect to 123 11 2 MOSFET MODELS NMOS PMOS SOW 10 UOISIDA ASTIOA YSTH ewtysonH TTI AH NISH 79 ewrysony TST CINIS H 19 uojdueyynos CIOS DVIS 09 Kapoyog ddIOS d LS Kapayog daadlosed 9 Kapoyog HIOSEY SS poinsyuos supe NEeIQUIPTID COT dSd SV poinsyuos supe THdH AMA vv Log OLT PISA ps vI K9 9x199 Cor 9AYINIS4 ps VI A9 9x19g OST CAPWNISE ys pl IPO9 UOISIIA INIA AMM Yp 0p PAPINISA pS pI Kpg Ver IOSrd
225. Out real Oxide thickness 121 Id InOut real Lateral diffusion 123 u0 InOut real Surface mobility 123 uo InOut real 124 fc InOut real Forward bias jct fit parm 128 nmos In flag N type MOSfet model 129 pmos In flag P type MOSfet model 125 nsub InOut real Substrate doping 126 tpg InOut integer Gate type 127 nss InOut real Surface state density 130 tnom InOut real Parameter measurement temperature 131 kf InOut real Flicker noise coefficient 132 af InOut real Flicker noise exponent 30 5 MOSFETS 505 30 5 2 MOS2 Level 2 MOSFET model with Meyer capacitance model 30 5 2 1 MOS 2 instance parameters Name Direction Type Description 80 m InOut real Multiplier 211 InOut real Length liw InOut real Width 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 34 id Out real Drain current 34 cd Out real 36 ibd Out real B D junction current 35 ibs Out real B S junction current 18 is Out real Source current 17 ig Out real Gate current 16 ib Out real Bulk current 50 vgs Out real Gate Source voltage 51 vds Out real Drain Source voltage 49 vbs Out real Bulk Source voltage 48 vbd Out real Bulk Drain voltage 8 nrd InOut real Drain squares 7 nrs InOut real Source squares 9 off
226. SIS Element MXXXXXXX nl n2 n3 n4 model name geometry temperature initial conditions SYNOPSIS Output SAVE small signal values 29 19 1 DESCRIPTION NUMOS is the name for a MOSFET numerical model In addition the 2D model can be used to simulate other four terminal structures such as integrated bipolar and JFET devices with substrate contacts However silicon controlled rectifiers SCRs cannot be simulated because of the snapback in the transfer characteristic See the options card for more information on how to customize the device type The LEVEL parameter of two and three terminal devices is not needed because only 2D devices are supported However it will accepted and ignored if provided 29 19 NUMOS 471 All numerical four terminal element names begin with the letter M If the device is a MOSFET or JFET with a bulk contact then the nodes are specified in the order drain n1 gate n2 source n3 bulk n4 If the device is a BJT the node order is collector n1 base n2 emitter n3 substrate n4 After this must come the name of the model lused for the element The remaining information can come in any order The layout dimensions of an element are specified relative to the geometry of a default device The default device has a width of lm However this default can be overridden on an options card In addition the element line will accept a length parameter L but does not use it in any calcula
227. SO o oone a u mace kaca Sty a ba BEES A EHS 454 29 10METHOD coo rr 455 29 10 1 DESCRIPTION oce a4e 4 be ER ER ER EER ikea ked 455 29 10 2 Parameters coser rara rr EES EREE EES 455 RU AM ia CE eh oe oe es 455 ATI os se sace Sr ete Be Se me GR he me AAA Oe de Ok A 456 ESA 6 nw goes garde Sie diode aig do aves Y e ky ave Y aces G 456 29 LAPRES e Sy A A ee ee a 457 JAILLI AMA 457 CO AVA ALSO oe Se BARA Bl AD He eR BR a 457 ON SBS l 52 oH BERR aa e SHES ESE REERS SE 458 BMA eo ce HK e Ga e OM A Mow Kad e Soy SM OB AEE AOR ES ES 458 29 121 DESCRIPTION s chet ho eee be eh eo eee ie 458 29 12 2 Parameters cadencia ERLE AAA ES 458 29 12 3 Examples A 458 CONTENTS W TAS aG e e nae nde Sie ae Gee Ge de BUY Sah BUH Soe 459 AE AMET 459 TRAPS pace oce paoe AE e ee Sg 459 2913 DESCRIPTION AAA eS OES ek Be A eR eG E a 459 EA ee Ah eR Reh Raha Can Faw Pam 2 460 29 133 1 A 460 E AIN 460 SAMOA cra o o a o A 461 29 141 DESCRIPTION sico eend de ebaansse 4 461 29 14 2 Parameters ge ae aE eR AR A A De 462 29 14 3 Examples 6 MSE RE EKEE EEE EERE EE EERE EEE 462 29144SEE ALSO ainia HERERO ER ER A A DEES 463 ASTUTO ES ne ks ee SG bods ete Sk Gh AR A Soe se Be A 463 29 15 1 DESCRIPTION crisis RR eek Oe Eee OR ER Ee 463 29 13 2 EXAMPLES ua kea FR Rm Oe Oe KOS KOS KO KG 463 ZISA BUGS aoad a ERA ERAS ARH de ara G deni Fee 4 463 E A A occain a E OG SS SG ar a E D ee Ae 463 29 161 DESCRIPTION cornada aa t ai a at i 464 29 10 2 ParamictetS RS 465 29 IDA EX
228. Sens of subthreshold slope to drain bias RSH Drain and source diffusion sheet resistance Q JS Source drain junction current density Alm PB Built in potential of source drain junction V MJ Grading coefficient of source drain junction PBSW Built in potential of source drain junction V sidewall MJSW Grading coefficient of source drain junction sidewall CJ Source drain junction capacitance per unit area F m CJSW source drain junction sidewall capacitance per F m unit length WDF Source drain junction default width m DELL Source drain junction length reduction m xpart 0 selects a 40 60 drain source charge partition in saturation while xpart 1 selects a 0 100 drain source charge partition nd ng and ns are the drain gate and source nodes respectively mname is the model name area is the area factor and off indicates an optional initial condition on the device for dc analysis If the area factor is omitted a value of 1 0 is assumed The optional initial condition specification using ic vds vgs is intended for use 130 CHAPTER 11 MOSFETS with the uic option on the tran control line when a transient analysis is desired starting from other than the quiescent operating point See the ic control line for a better way to set initial conditions 11 2 8 BSIM2 model level 5 This model contains many improvements over BSIM1 and is suitable for analog simulation Nevertheless even BSIM2 breaks transistor operation into sev
229. Sequences of commands functions and control structures 17 6 may be assembled as a script 17 8 into a file and then activated by just typing the file name into the console input of an interactive ngspice session Finally and most useful is it to add a script to the input file in addition the the netlist and dot commands This is achieved by enclosing the script into control endc see 16 4 3 and 17 8 7 for an example This feature enables a wealth of control options You may set internal 17 7 and other variables start a simulation evaluate the simulation output start a new simulation based on these data and finally make use of many options for outputting the data graphically or into output files 17 2 Expressions Functions and Constants Ngspice and ngnutmeg store data in the form of vectors time voltage etc Each vector has a type and vectors can be operated on and combined algebraically in ways consistent with their types Vectors are normally created as the output of a simulation or when a data file output raw file is read in again ngspice ngnutmeg see the load command 17 5 35 or when the initial data file is loaded directly into ngnutmeg They can also be created with the let command 817 3 32 An expression is an algebraic formula involving vectors and scalars a scalar is a vector of length 1 and the following operations 263 264 CHAPTER 17 INTERACTIVE INTERPRETER D is the modulo o
230. Sorel CUR Lira Gm RR SG eS AA 93 See IRTE A ee Aw AA BSE SG REO A 93 Jar TAPLE ii AA A a eR G 93 ee MA e pa er E a A he ee ee eee 94 A o LAPLACE coman rs h AA A AN A A 94 E asrnane eee ee a ewe eS ERS ERE ER 94 6 Transmission Lines 95 6 1 Lossless Transmission Lines lt se Gn s saca ewa ew n eS ee a 95 6 2 Lossy Transmission Lines 42 6 ogc bd re e RSE DEE EEE 96 6 2 1 Lossy Transmission Line Model LTRA 96 6 3 Uniform Distributed RC Lines cias eek Fade eR EER BRE ORES 98 6 3 1 Uniform Distributed RC Model URC 98 64 KSPICE Lossy Transmission Lines 246446444444 o 99 6 4 1 Single Lossy Transmission Line TXL 99 6 4 2 Coupled Multiconductor Line CPL 100 7 Diodes 101 Wal Junction Diod s o eea aoe he hee ee eR Re Ee OR EE SER ha 101 Ta DodeModel D e poe a Rw Rw ewe Meee ek WO os 101 Tes Diode BGO e ee a km aw ahem a a AAN i a i a 103 8 BJTs 109 8 1 Bipolar Junction Transistors BITS 22 eee eee ee ee eae 109 S2 BIT Mode NPN PNPY oo e Se Swe Bo Ses Dia Se ee Raed 109 9 JFETs 115 9 1 Junction Field Effect Transistors JFETs 00 000 115 9 2 JFET Models NJF PJF 3 6 6 4 eR aw HRD ERE ER ee Oo 115 9 2 1 Model by Parker and S kellern 614244824244 4454 054 115 9 2 2 Modified Parker Skellern model 116 CONTENTS 10 MESFETs AI o ob 42S 4 2 Se aaa a e a a a E EE EERSTE RDERES 10 2 MESFET Models
231. T The resulting voltage waveform is differentiable and thus does not require any modifications of the matrix solving algorithms White noise is generated by the ngspice random number generator applying the Box Muller transform Values are generated on the fly each time when a breakpoint is hit The 1 f noise is generated with an algorithm provided by N J Kasdin Discrete simulation of colored noise and stochastic processes and 1 f power law noise generation Proceedings of the IEEE Volume 83 Issue 5 May 1995 Page s 802 827 The noise sequence one for each voltage current source with 1 f selected is generated upon start up of the simulator and stored for later use The number of point is determined by the total simulation time divided by NT rounded up the the nearest power of 2 Each time a breakpoint nx NT relevant to the noise signal is hit the next value is retrieved from the sequence If you want a random but reproducible sequence you may select a seed value for the random number generator by adding set rndseed nn to the spinit or spiceinit file nn being a positive integer number The transient noise analysis will allow the simulation of the three most important noise sources Thermal noise is described by the Gaussian white noise Flicker noise pink noise or 1 over f noise with an exponent between 0 and 2 is provided as well Shot noise is dependent on the current flowing through a device and may be simulate
232. TER_TABLE Parameter Name limit _switch Description switch for on board limiting convergence aid Data_Type boolean Default_Value FALSE Limits Vector no Vector Bounds Null Allowed yes STATIC_VAR_TABLE Static_Var_Name previous_voltage Data_Type pointer Description iteration holding variable for limiting Description The Zener Diode models the DC characteristics of most zeners This model differs from the Diode Rectifier by providing a user defined dynamic resistance in the reverse breakdown region The forward characteristic is defined by only a single point since most data sheets for zener diodes do not give detailed characteristics in the forward region The first three parameters define the DC characteristics of the zener in the breakdown region and are usually explicitly given on the data sheet The saturation current refers to the relatively constant reverse current that is produced when the voltage across the zener is negative but breakdown has not been reached The reverse leakage current determines the slight increase in reverse current as the voltage across the zener becomes more negative It is modeled as a resistance parallel to the zener with value v breakdown i rev Note that the limit switch parameter engages an internal limiting function for the zener This can in some cases prevent the simulator from converging to an unrealistic solution if the voltage across or current into the device is exc
233. T_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name cm_mult mult mul in tiplier block input vector in Vv v vd i id yes 2 no in offset 0 2 in_gain 2 0 1 0 out output out V v vd i id no no in_gain 140 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed input offset vector real 0 0 yes in yes out_gain output gain real 1 0 no yes input gain vector real 1 0 yes in yes out_offset output offset real 0 0 no yes Description This function is a multiplier block with 2 to N input ports Individual gains and offsets can be applied to each input and to the output Each input is added to its respective offset and then multiplied by its gain The results are multiplied along with the output gain and are added to the output offset This model will operate in DC AC and Transient analysis modes However in ac analysis it is important to remember that results are invalid unless only ONE INPUT of the multiplier is connected to a node which bears an AC signal this is exemplified by the use of a multiplier to perform a potentio
234. Transit time sec 0 0 1ns 7 3 DIODE EQUATIONS 103 Temperature effects Name Parameter Units Default Example Scale fac 1 11 Si EG Activation energy eV 1 11 0 69 Sbd 0 67 Ge TMI Ist order tempco for MJ 1 c 0 0 TM2 2nd order tempco for MJ Leg 0 0 TNOM TREF Parameter measurement temperature C 27 50 TRS1 TRS Ist order tempco for RS Via 0 0 TRS2 2nd order tempco for RS 1 00 0 0 TMI Ist order tempco for MJ E 0 0 TM2 2nd order tempco for MJ 1 002 0 0 TTT1 Ist order tempco for TT 1 c 0 0 TTT2 2nd order tempco for TT 1 002 0 0 3 0 pn XTI Saturation current temperature exponent 3 0 20 Sbd TLEV Diode temperature equation selector 0 TLEVC Diode capac temperature equation selector 0 CTA CTC Area junct cap temperature coefficient 1 c 0 0 CTP Perimeter junct cap temperature coefficient 1 c 0 0 TCV Breakdown voltage temperature coefficient 1 c 0 0 Noise modeling Name Parameter Units Default Example Scale factor KF Flicker noise coefficient 0 AF Flicker noise exponent 1 Diode models may be described in the input file or an file included by inc according to the following example General form model mname type pnamel pvall pname2 pval2 Examples model DMOD D bf 50 is le 13 vbf 50 7 3 Diode Equations The
235. VCC X1 1 2 7 5 10 9 ONEBIT X2 3 4 10 6 8 9 ONEBIT ENDS TWOBIT SUBCKT FOURBIT 1 2 3 4567 8 9 10 11 12 13 14 15 x NODES INPUT BITO 2 BIT1 2 BIT2 2 BIT3 2 x OUTPUT BITO BIT1 BIT2 BIT3 CARRY IN CARRY OUT VCC X1 123 4 9 10 13 16 15 TWOBIT X2 5 67 8 11 12 16 14 15 TWOBIT ENDS FOURBIT xxx DEFINE NOMINAL CIRCUIT MODEL DMOD D MODEL QMOD NPN BF 75 RB 100 CJE 1PF CJC 3PF VCC 99 0 DC 5V VINIA 1 O PULSE O 3 0 10NS IONS 10NS 50NS VINIB 2 0 PULSE O 3 0 10NS 10NS 20NS 100N5 VIN2A 3 0 PULSE O 3 0 10NS 10NS 40NS 200NS VIN2B 4 0 PULSE O 3 0 10NS 10NS 80NS 400N5 VIN3A 5 0 PULSE O 3 0 10NS IONS 160NS 800NS VIN3B 6 O PULSE O 3 O 10NS 10NS 320NS 1600N5 VIN4A 7 O PULSE O 3 O 10NS 10NS 640NS 3200N5 VIN4B 8 O PULSE O 3 0 10NS IONS 1280NS 6400NS Xl 12345 678 9 10 11 12 0 13 99 FOURBIT RBITO 9 0 IK RBIT1 10 0 1K RBIT2 11 0 1K RBIT3 12 0 1K RCOUT 13 0 1K xxx FOR THOSE WITH MONEY AND MEMORY TO BURN TRAN INS 6400NS END 346 CHAPTER 20 EXAMPLE CIRCUITS 20 6 Four Bit Binary Adder MOS The following deck simulates a four bit binary adder using several subcircuits to describe vari ous pieces of the overall circuit Example ADDER 4 BIT ALL NAND GATE BINARY ADDER x SUBCIRCUIT DEFINITIONS SUBCKT NAND inl in2 out VDD NODES INPUT 2 OUTPUT VCC M1 out in2 Vdd Vdd pl W 3u L 1u M2 net 1 in2 0 O nl W 3u L 2u M3 out inl Vdd Vdd pl W 3u L 1u M4 out inl net 1 O nl W 3u L 2u ENDS
236. VIORAL MODELING WITH XSPICE Vector Bounds Null_Allowed no no PARAMETER_TABLE Parameter Name in_low Description maximum O valued analog input Data_Type real Default_Value 1 0 Limits Vector no Vector Bounds Null_ Allowed yes PARAMETER_TABLE Parameter Name in_high Description minimum 1 valued analog input Data_Type real Default_Value 2 0 Limits Vector no Vector Bounds Null_Allowed yes PARAMETER_TABLE Parameter Name rise_delay fall_delay Description rise delay fall delay Data_Type real real Default_Value 1 0e 9 1 0e 9 Limits 1 0e 12 1 0e 12 Vector no no Vector Bounds Null_ Allowed yes yes Description The adc_bridge is one of two node bridge devices designed to allow for the ready transfer of analog information to digital values and back again The second device is the dac_bridge which takes a digital value and maps it to an analog one The adc_bridge takes as input an analog value from an analog node This value by definition may be in the form of a voltage or a current If the input value is less than or equal to in_low then a digital output value of 0 is generated If the input is greater than or equal to in_high a digital output value of 1 is generated If neither of these is true then a digital UNKNOWN value is output Note that unlike the case of the dac_bridge no ramping time or delay is associated with the adc_bridge Rather
237. Verilog A model into ngspice 1331 13 3 2 How to setup a va model forngspice Adding admsXml to your build environment 14 Mixed Level Simulation ngspice with TCAD 14 1 Cider 14 2 GSS Gems 6 06 n rss s m 15 Analyses and Output Control batch mode 15 1 Simulator Variables options lt lt Bw Dae ewe ae Se es 131 1 15 1 2 13 1 3 15 1 4 15 1 5 15 1 6 PaO conse oe eer heehee ii a e e e DC Solution Options oaaae ee a eS Transient Analysis Options es cir eos oe Bee aw ee ee MOSFET Specific op onsS s s s sece sha a a i a Transmission Lines Specific Options o Precedence of option and options commands 11 190 192 192 193 195 197 199 202 204 206 209 211 213 215 215 215 217 217 217 217 217 217 219 219 220 CONTENTS 15 2 WN Conditions so eese ead Suge dad Siete BGS GRY Geek age H Bre d s 225 15 2 1 NODESET Specify Initial Node Voltage Guesses 225 15 2 2 IC Set Initial Conditions ke ae Ee ee Ree 225 Oe POS ie ee Se RS AAR OD Ra ER a ee aA S iph s 226 15 3 1 AC Small Signal AC Analysis 226 153 2 AG DC Transfer Pugin o a a a a 227 15 3 3 DISTO Distortion Analysis 227 13 44 NOISE Noise Analysis oo ges Sone a RE ee OS 229 15 3 5 OP Operating Point Analysis 2 00 229 15
238. Vx 2 1 DC OVolts Drive the current through Rx back into the circuit Fx pos neg Vx 1 ends Xres 33 10 nlres rb 1k Rres 33 10 1k Vres 10 0 DC O control define check a b vecmax abs a b ac lin 10 100 Ik some checks print v 1 v 2 v 3 if check v 1 frequency lt le 12 echo INFO ok end plot vres branch endc end 5 1 2 par expression The B source syntax may also be used in output lines like plot as algebraic expressions for output see chapt 15 5 6 5 1 3 Piecewise Linear Function pwl Both B source types may contain a piece wise linear dependency of one network variable Example pwl_current Bdio 1 0 I pwl v A 0 0 33 10m 100 33m 200 50m 5 1 B SOURCE ASRC 89 v A is the independent variable x Each pair of values following describes the x y functional relation In this example at node A voltage of OV the current of 0A is generated next pair gives 10mA flowing from ground to node 1 at 33V on node A and so forth The same is possible for voltage sources Example pwl_voltage Blimit b 0 V pwl v 1 4 0 2 2 2 4 4 5 6 5 Monotony of the independent variable in the pwl definition is checked non monotonic x entries will stop the program execution v 1 may be replaced by a controlling current source v 1 may also be replaced by an expression e g 2 1 Vin The value pairs may also be parameters which have to be defined before by a param statement An examp
239. W Real Multiplicative width factor L Real Unused length factor Temp Real Element operating temperature IC File String Initial conditions filename Off Flag Device initially in OFF state gI Flag Conductance element G Q clJ Flag Capacitance element C F yIJ Flag Admittance element Y Q 29 19 3 EXAMPLES A numerical MOSFET with a gate width of 5um and length of 1um is described below How ever the model can only be used for lum length devices so the length parameter is redun dant The device is initially biased near its threshhold by taking an initialstate from the file NM1 vth 472 CHAPTER 29 CIDER USER S MANUAL MI 1 2 3 4 M NMOS 1UM W 5um L lum IC FILE NMI1 vth MODEL MNMOS_1UM NUMOS x Description of a lum device This example saves the definite admittance matrix of the previous MOSFET where the source terminal 3 is used as the reference The definite admittance matrix is formed by deleting the third row and column from the indefinite admittance matrix SAVE Oml y11 ml y12 Om y14 SAVE Oml y21 ml y22 ml y24 SAVE Oml y41 Oml y42 ml y44 Bipolar transistors are usually specified in terms of their area relative to a unit device The following example creates a unit sized device MQ NC NB NE NS N_BJT MODEL M_BJT NUMOS LEVEL 2 options bipolar defw 3um 29 19 4 SEE ALSO options output 29 20 Cider examples The original Cider User s manual in its App
240. WRT width 215 id Out real Drain current 18 is Out real Source current 17 ig Out real Gate current 16 ib Out real Bulk current 217 ibd Out real B D junction current 216 ibs Out real B S junction current 231 vgs Out real Gate Source voltage 232 vds Out real Drain Source voltage 230 vbs Out real Bulk Source voltage 229 vbd Out real Bulk Drain voltage 203 dnode Out integer Number of the drain node 204 gnode Out integer Number of the gate node 205 snode Out integer Number of the source node 206 bnode Out integer Number of the node 207 dnodeprime Out integer Number of int drain node 208 snodeprime Out integer Number of int source node 211 von Out real 212 vdsat Out real Saturation drain voltage 213 sourcevcrit Out real Critical source voltage 214 drainverit Out real Critical drain voltage Name Direction Type Description 30 5 MOSFETS 503 Name Direction Type Description 258 rs Out real Source resistance 209 sourceconductance Out real Conductance of source 259 rd Out real Drain conductance 210 drainconductance Out real Conductance of drain 219 gm Out real Transconductance 220 gds Out real Drain Source conductance 218 gmb Out real Bulk Source transconductance 218 gmbs Out real 221 gbd Out real Bulk Drain conductance 222 gbs Out real
241. _STRENGTH enum name i Strength of digital output STRONG RESISTIVE HI_IMPEDANCE or UNDETERMINED OUTPUT_TYPE char name i The port type of the output PARAM CD name i Value of the parameter PARAM_NULL Boolean_t name i Was the parameter not included on the SPICE model card PARAM_SIZE int name Size Of parameter vector PARTIAL double y i1 x 1 Partial derivative of output y with respect to input x PORT_NULL Mif Boolean_t name Has this port been specified as uncomnected PORT_SIZE int name Size of port vector RAD_FREQ double lt none gt Current analysis frequency in radians per second STATIC_VAR CD name Value of a static variable STATIC _VAR_SIZE int name Size of static var vector currently unused Tn int index Current and previous analysis times T 0 TIME current analysis time T 1 previous analysis time TEMPERATURE double lt none gt Current analysis temperature TIME double lt none gt Current analysis time same as T 0 TOTAL_LOAD double name i The total of all loads on the node attached to this event driven port 27 7 MODEL DEFINITION FILE 413 27 7 2 Function Library 27 7 2 1 Overview Aside from the accessor macros the simulator also provides a library of functions callable from within code models The header file containing prototypes to these functions is automatically inserted into the Model Definition File for you The complete list of available funct
242. _TABLE Parameter_Name in_offset gain Description input offset gain Data_Type real real Default_Value 0 0 1 0 Limits gt E Vector no no Vector Bounds 12 2 ANALOG MODELS Null_ Allowed PARAMETER_TABLE Parameter Name yes out_lower_limit yes out_upper_limit Description output lower limit output upper limit Data_Type real real Default Value s Limits Vector no no Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter Name limit_range 159 Description upper amp lower limit smoothing range Data_Type real Default_Value 1 0e 6 Limits Vector no Vector_Bounds Null Allowed yes PARAMETER_TABLE Parameter Name out_ic Description output initial condition Data_Type real Default_Value 0 0 Limits Vector no Vector Bounds Nul1_Allowed yes Description The Integrator block is a simple integration stage that approximates the integral with respect to time of an input signal The block also includes gain and input offset parameters to allow for tailoring of the required signal and output upper and lower limits to prevent convergence errors resulting from excessively large output values Note that these limits specify integrator behavior similar to that found in an operational amplifier based integration stage in that once a limit is reached additional storage does not occur Thus the input of a negative value to an integra
243. _plot_val Assign STRUCT_PTR to a pointer variable of the defined type Then access the member of the structure specified by the string in STRUCT_MEMBER_ID and assign some real valued quantity for this member to PLOT_VALUE 27 8 2 9 Function udn_XXX_print_val Assign STRUCT_PTR to a pointer variable of the defined type Then access the member of the structure specified by the string in STRUCT_MEMBER_ID and assign some string valued quantity for this member to PRINT_VALUE If the string is not static a new string should be allocated on each call Do not free the allocated strings 27 8 2 10 Function udn XXX ipc val Use STRUCT_PTR to access the value of the node data Assign to IPC_VAL a binary repre sentation of the data Typically this can be accomplished by simply assigning STRUCT_PTR to IPC_VAL Assign to IPC_VAL_SIZE an integer representing the size of the binary data in bytes 424 CHAPTER 27 CODE MODELS AND USER DEFINED NODES 27 8 3 Example UDN Definition File The following is an example UDN Definition File which is included with the XSPICE system It illustrates the definition of the functions described above for a User Defined Node type which is included with the XSPICE system in this case the int for integer node type include EVTudn h void malloc unsigned void udn_int_create CREATE_ARGS Malloc space for an int MALL
244. a no no set set in d d no yes out data output out d a no no data_delay delay from data real 1 0e 9 1 0e 12 no yes enable_delay delay from enable real 1 0e 9 1 0e 12 no enable enable input in d a no no reset reset in d a no yes Nout inverter data output out d a no no set_delay delay from SET real 1 0e 9 1 0e 12 no 12 4 DIGITAL MODELS Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed yes reset_delay delay from RESET real 1 0e 9 1 0e 12 no yes data_load data load F real 1 0e 12 no yes set_load set load value F real 1 0e 12 no yes rise_delay rise delay real 1 0e 9 1 0e 12 no yes 203 yes ic output initial state boolean 0 no yes enable_load enable load value F real 1 0e 12 no yes reset_load reset load F real 1 0e 12 no y
245. action TRUE a8 3 gd 6 7 switch3 model switch3 aswitch cntl_off 0 0 cntl_on 5 0 r_off 1e6 r_on 10 0 log TRUE 12 2 Analog Models The following analog models are supplied with XSPICE The descriptions included consist of the model Interface Specification File and a description of the model s operation This is followed by an example of a simulator deck placement of the model including the MODEL card and the specification of all available parameters 12 2 1 Gain NAME_TABLE C_Function_Name cm_gain Spice_Model_Name gain Description A simple gain block PORT_TABLE Port Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no 138 Vector Bounds Null Allowed PARAMETER_TABLE Parameter _ Name Description Data_Type Default_Value Limits Vector Vector_Bounds Null_Allowed no no in_offset gain input offset gain real real 0 0 1 0 no no yes yes CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE out_offset output offset real 0 0 no yes Description This function is a simple gain block with optional offsets on the input and the output The input offset is added to the input the sum is then multiplied by the gain and the result is produced by adding the output offset This model will operate in DC AC and Transient analysis modes Example al 1 2 amp model amp gain in_offset 0 1
246. age reference sees its output voltage controlled by two resistors r10 r12 and a thermistor r11 The simulation is run at a given temperature The thermistor is modeled in spice by a regular resistor Its resistivity is assessed by the TCL script It is set with a spice alter command before running the simulation This script uses an iterative optimization approach to try to converge to a set of two resistor values which minimizes the error between the expected floating voltage and the TL431 output 19 5 2 1 Invocation This script can be executed by the user by simply executing the file in a terminal testbench3 tcl Two issues are important to point out 2For those who are really interested in optimizing circuits Some parameters are very important for quick and correct convergence The optimizer walks step by step to a local minimum of the cost function you define Starting from an initial vector YOU provide it converges step by step Consider trying another start vector if the result is not the one you expected The optimizer will carry on walking until it reaches a vector which resulting cost is smaller than the target cost YOU provide it You will also provide a maximum iteration count in case the target can not be achieved Balance your time specifications and every other parameters For a balance between quick and accurate convergence adjust the factor variable at the beginning of minimumSteepestDescent in the file differen
247. agnitude 204 sens_ph Out real ac sensitivity of phase 205 sens_cplx Out complex ac sensitivity 477 478 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 1 1 2 Resistor model parameters Name Direction Type Description 103 rsh InOut real Sheet resistance 105 narrow InOut real Narrowing of resistor 105 dw InOut real 108 short InOut real Shortening of resistor 108 dlr InOut real 101 tcl InOut real First order temp coefficient 102 tc2 InOut real Second order temp coefficient 104 defw InOut real Default device width 104 w InOut real 109 kf InOut real Flicker noise coefficient 110 af InOut real Flicker noise exponent 107 thom InOut real Parameter measurement temperature 106 r In flag Device is a resistor model 30 1 ELEMENTARY DEVICES 30 1 2 Capacitor Fixed capacitor 30 1 2 1 Capacitor instance parameters Name Direction Type Description 1 capacitance InOut real Device capacitance 1 cap InOut real Device capacitance lle InOut real Device capacitance 2 ic InOut real Initial capacitor voltage 8 temp InOut real Instance operating temperature 9 dtemp InOut real Instance temperature difference from the rest of the circuit 3 w InOut real Device width 4 1 InOut real Device length 11 m InOut real Parallel mu
248. ailable 17 5 COMMANDS 295 The example below shows the use of this command ngspice 1 gt sysinfo OS CYGWIN_NT 5 1 1 5 25 0 156 4 2 2008 06 12 19 34 CPU Intel R Pentium R 4 CPU 3 40GHz Logical processors 2 Total DRAM available 1535 480469 MB DRAM currently available 984 683594 MB ngspice 2 gt This command has been tested under Windows OS and LINUX It may not be available in your operating system environment 17 5 71 Tf Run a Transfer Function analysis General Form tf output_node input_source The tf command performs a transfer function analysis returning e the transfer function output input e output resistance e and input resistance between the given output node and the given input source The analysis assumes a small signal DC slowly varying input The following example file Example input file Tf test circuit vs 1 0 de 5 rl 100 r2 50 r3 150 r4 200 NWN Re O Ou Dn control tf v 3 5 vs print all endc end will yield the following output transfer_function 3 750000e 001 output_impedance_at_v 3 5 6 662500e 001 vs input_impedance 2 000000e 002 296 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 72 Trace Trace nodes General Form trace node For every step of an analysis the value of the node is printed Several traces may be active at once Tracing is not applicable for all analyses To remove a trace use the delete command 17 5 73 Tra
249. al gt Measure statements mMeasure tran ymax MAX v 2 from 2m to 3m returns the maximum value of v 2 inside the time interval between 2 ms and 3 ms Measure tran tymax MAX_AT v 2 from 2m to 3m returns the time point of the maximum value of v 2 inside the time interval between 2 ms and 3 ms measure tran ypp PP v 1 from 2m to 4m returns the peak to peak value of v 1 inside the time interval between 2 ms and 4 ms Measure tran yrms RMS v 1 from 2m to 4m returns the root mean square value of v 1 inside the time interval between 2 ms and 4 ms mMeasure tran yavg AVG v 1 from 2m to 4m returns the average value of v 1 inside the time interval between 2 ms and 4 ms 15 4 8 Integ General form 8 MEASURE DCIACITRANISP result INTEG lt RAI gt out_variable lt ID td gt lt FROM val gt lt TO val gt Measure statement Measure tran yint INTEG v 2 from 2m to 3m returns the area under v 2 inside the time interval between 2 ms and 3 ms 15 4 9 param General form 9 MEASURE DCIACITRANISP result param expression Measure statement param fval 5 measure tran yadd param fval 7 will evaluate the given expression fval 7 and return the value 12 param vout_diff 50k meas tran bw_chk param vout_diff lt 100k 1 0 15 4 MEASUREMENTS AFTER OP AC AND TRANSIENT ANALYSIS 241 will evaluate the given ternary function and return the value 1 Expression is evaluated accor
250. al time zero value of inductor current in Amps that flows from n through the inductor to n Note that the initial conditions if any apply only if the UIC option is specified on the tran analysis line Ngspice calculates the nominal inductance as described below a value x scale 3 13 m 3 2 10 Inductor model The inductor model contains physical and geometrical information that may be used to compute the inductance of some common topologies like solenoids and toroids wound in air or other material with constant magnetic permeability Name Parameter Units Default Example IND model inductance H 0 0 le 3 CSECT cross section m 0 0 le 3 LENGTH length m 0 0 le 2 TCl first order temperature coeff Alec 0 0 0 001 TC2 second order temperature coeff A C 0 0 0 0001 TNOM parameter measurement temperature C 27 50 NT number of turns 0 0 10 MU relative magnetic permeability H m 0 0 The inductor has an inductance computed as If value is specified on the instance line then m If model inductance is specified then IND x scale Enom 3 15 m If neither value nor IND are specified then geometrical and physical parameters are take into account In the following formulas 3 2 ELEMENTARY DEVICES 71 NT refers to both instance and model parameter instance parameter overrides model parameter If LENGTH is not zero _ Ug NT CSECT 3 16
251. al Conductance from base to internal base 216 go Out real Small signal output conductance 227 geqcb Out real d Ibe d Vbc 228 gccs Out real Internal C S cap equiv cond 229 geqbx Out real Internal C B base cap equiv cond 239 cpi Out real Internal base to emitter capactance 240 cmu Out real Internal base to collector capactiance 241 cbx Out real Base to collector capacitance 242 ccs Out real Collector to substrate capacitance 218 cqbe Out real Cap due to charge storage in B E jet 220 cqbc Out real Cap due to charge storage in B C jct 222 cqcs Out real Cap due to charge storage in C S jet 224 cqbx Out real Cap due to charge storage in B X ject 226 cexbc Out real Total Capacitance in B X junction 493 30 4 BJTS 217 qbe Out real Charge storage B E junction 219 qbc Out real Charge storage B C junction 221 qcs Out real Charge storage C S junction 223 qbx Out real Charge storage B X junction 238 p Out real Power dissipation 235 sens_de Out real dc sensitivity 230 sens_real Out real real part of ac sensitivity 231 sens_imag Out real dc sens amp imag part of ac sens 232 sens_mag Out real sensitivity of ac magnitude 233 sens_ph Out real sensitivity of ac phase 234 sens_cplx Out complex ac sensitivity 7 temp InOut real
252. alue int 0 no yes rise_delay fall_delay rise delay fall delay real real 1 0e 9 1 0e 9 1 0e 12 1 0e 12 yes yes in in yes yes freq_in_load freq_in load value F real 1 0e 12 no yes Description The digital frequency divider is a programmable step down divider which accepts an arbitrary divisor div_factor a duty cycle term high_cycles and an initial count value i_count The generated output is synchronized to the rising edges of the input signal Rise delay and fall delay on the outputs may also be specified independently Example SPICE Usage a4 3 7 divider model divider d_fdiv div_factor 5 high_cycles 3 12 4 DIGITAL MODELS 12 4 20 RAM NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description 211 i_count 4 rise delay 23e 9 fall_delay 9e 9 cm_d_ram d_ram digital random access data_in data input line s in d a
253. alues for particular kinds of files Run configure help for a list of the directories you can set and what kinds of files go in them If the package supports it you can cause programs to be installed with an extra prefix or suf fix on their names by giving configure the option program prefix PREFIX or program suffix SUFFIX When installed on MinGW with MSYS alternative paths are not fully supported See How to make ngspice with MINGW and MSYS below for details 31 1 9 Optional Features Some packages pay attention to enable FEATURE options to configure where FEATURE indicates an optional part of the package They may also pay attention to with PACKAGE options where PACKAGE is something like gnu as or x for the X Window System The README should mention any enable and with options that the package recognizes For packages that use the X Window System configure can usually find the X include and li brary files automatically but if it doesn t you can use the configure options x includes DIR and x libraries DIR to specify their locations 31 1 10 Specifying the System Type There may be some features configure can not figure out automatically but needs to determine by the type of host the package will run on Usually configure can figure that out but if it prints a message saying it can not guess the host type
254. ameters vth u0 tox L and W shall be varied statistically between each simulation run The frequency of oscillation will be measured by a fft and stored Finally a histogram of all measured frequencies will be plotted The function calls to sunif 0 and sgauss 0 return uniformly or Gaussian distributed ran dom numbers A function unif defined by the line define unif nom var nom nom var sunif 0 will return a value with mean nom and deviation var relative to nom The line set nivth0 n1 vtho will store the threshold voltage vthO given by the model parameter set into a variable nivtho ready to be used by unif aunif gauss or agauss function calls In the simulation loop the altermod command changes the model parameters before a call to tran After the transient simulation the resulting vector is linearized a fft is calculated and the maximum of the fft signal is measured by the meas command and stored in a vector maxffts Finally the contents of the vector maxffts is plotted in a histogram For more details please have a look at the strongly commented input file MCring sp 21 6 Data evaluation with Gnuplot Run the example file examples Monte_Carlo OpWien sp described in chapt 21 3 Generate a plot with Gnuplot by the ngspice command gnuplot pl4mag v4mag xlimit 500 1500 Open and run the command file in the Gnuplot command line window by load pl v4mag p A Gaussian curve will be fitted to the simulat
255. ameters describing the junctions e g the reverse current can be input either as is in A or as js in 4 m Whereas the first is an absolute value the second is multiplied by ad and as to give the reverse current of the drain and source junctions respectively This methodology has been chosen since there is no sense in relating always junction charac teristics with ad and as entered on the device line the areas can be defaulted The same idea applies also to the zero bias junction capacitances cbd and cbs in F on one hand and cj in F m on the other The parasitic drain and source series resistance can be expressed as either rd and rs in ohms or rsh in ohms sq the latter being multiplied by the number of squares nrd and nrs input on the device line 11 2 MOSFET MODELS NMOS PMOS 125 NGSPICE level 1 2 3 and 6 parameters 126 CHAPTER 11 MOSFETS Name Parameter Units Default Example LEVEL Model index 1 VTO Zero bias threshold voltage V 0 0 1 0 Vro KP Transconductance A y 2 0e 5 3 1e 5 parameter GAMMA Bulk threshold parameter JV 0 0 0 37 PHI Surface potential U V 0 6 0 65 LAMBDA Channel length modulation 1 v 0 0 0 02 MOS 1 and MOS2 only A RD Drain ohmic resistance Q 0 0 1 0 RS Source ohmic resistance Q 0 0 1 0 CBD Zero bias B D junction F 0 0 20fF capacitance CBS Zero bias B S junction F 0 0 20fF capacitance IS B
256. ameters to file Touchstone format 299 17 5 84 Xgraph use the xgraph 1 program for plotting 300 17 6 Control BIS gt socs ss a Be ee ee ROS KO KS 300 176 1 PS A 300 EA A E 300 170 3 Dowlile End ow a a dada e a A de 301 17 64 Foreach End os e cos 6 88 6S OREN Oe ER oS ESE 301 170o Ve Oe os coil dl EEE RSEES 301 1760 Label os oye Se Gx adem Bad GoGo ey SAS Ae BARE ES WEE HS 301 1767 G00 235 63 S RAE KE RAEEEEEEAEE SLES ERS 302 176 8 COIE e ye eee ee Be ee Laia Ee EER EEE RS 302 1769 Beak 265 5444 26444 444 26 244 4444444444464 302 La e Bae Ok So bree By ee a Ce OE ee ee eS 302 ITE ORO aos e ora aoe Sos giy Ge See Bee Pee ho ee Dk oe eS 307 Sd VEO ooo ci qos daveb aided dood Gig ko aig Y acy EVG Y ace a 307 e e YEO ooe a a ee Bk ee Be Ss ee a ee a 308 EXEC AA 308 LAA COMISIONES oe 2 o E Sl Se a a OE at AGE a 308 17 8 5 Example script spect 2c cc eee ra 312 17 8 6 Example script for random numbers 314 178 7 Parmeter sweep ccc ee wig c heehee dead eehe ese 315 17 6 8 Output redirection ke dR aR EMR eR REA RE a 315 17 9 Scattering parameters s parameters o 316 CONTENTS 17 ES AO y do ta pogo aos n signado orgs Sig aclara 316 17 9 2 S parameter measurement basics o 317 AE Se ee oc e Boe Bk eS OH oS OEM aR So ee Hees 318 17 1OMISCELLANEOUS old stuff has to be checked for relevance 319 17 11 Bugs old stuff has to be
257. and 0 0 respectively Any independent source can be assigned a time dependent value for transient analysis If a source is assigned a time dependent value the time zero value is used for de analysis There are eight independent source functions e pulse e exponential sinusoidal e piece wise linear single frequency FM e AM transient noise and random voltages or currents If parameters other than source values are omitted or set to zero the default values shown are assumed TSTEP is the printing increment and TSTOP is the final time see the TRAN control line for explanation 4 1 1 Pulse General form PULSE V1 V2 TD TR TF PW PER Examples VIN 3 0 PULSE 1 1 2NS 2NS 2NS 50NS 100N5 Name Parameter Default Value Units V1 Initial value V A V2 Pulsed value V A TD Delay time 0 0 sec TR Rise time TSTEP sec TF Fall time TSTEP sec PW Pulse width TSTOP sec PER Period TSTOP sec A single pulse so specified is described by the following table Time Value 0 Vi TD Vi TD TR V2 TD TR PW V2 TD TR PW TF VI TSTOP VI 4 1 INDEPENDENT SOURCES FOR VOLTAGE OR CURRENT Intermediate points are determined by linear interpolation 4 1 2 Sinusoidal General form SIN VO VA FREQ TD THETA Examples VIN 3 0 SIN O 1 100MEG INS 1E10 Name Parameter Default Value Units VO Offset VA VA Amplitu
258. and PARAM2 depend on the type selected TYPE description PARAMI default PARAM2 default 1 Uniform Range 1 Offset 0 2 Gaussian Standard Dev 1 Mean 0 3 Exponential Mean 1 Offset 0 4 Poisson Lambda 1 Offset 0 4 1 9 Arbitrary Phase Sources The XSPICE option supports arbitrary phase independent sources that output at TIME 0 0 a value corresponding to some specified phase shift Other versions of SPICE use the TD delay time parameter to set phase shifted sources to their time zero value until the delay time has elapsed The XSPICE phase parameter is specified in degrees and is included after the SPICE3 parameters normally used to specify an independent source Partial XSPICE deck examples of usage for pulse and sine waveforms are shown below Phase shift is specified after Berkeley defined parameters on the independent source cards Phase shift for both of the following is specified as 45 degrees 4 2 LINEAR DEPENDENT SOURCES 83 vi 100 0 sin 0 1 1k 0 O 45 0 ri 10 1k v2 2 0 0 0 pulse 1 1 0 le 5 le 5 5e 4 le 3 45 0 r2 2 0 1k x 4 2 Linear Dependent Sources Ngspice allows circuits to contain linear dependent sources characterized by any of the four equations i gv v ev i fi v hi where g e f and h are constants representing transconductance voltage gain current gain and transresistance respectively Non linear dependent sources for voltages or curre
259. anguage file that the preprocessor creates could not be created or opened Check permissions on directory Error parsing mod file lt filename gt Problems were encountered by the preprocessor in interpreting the indicated Model Definition File ERROR File not found lt filename gt The indicated file was not found or could not be opened Error parsing interface specification file Problems were encountered by the preprocessor in interpreting the indicated Interface Specifi cation File ERROR Can t create file lt filename gt The indicated file could not be created or opened Check permissions on directory ERROR write port info Number of allowed types cannot be zero There must be at least one port type specified in the list of allowed types 430 CHAPTER 28 ERROR MESSAGES illegal quoted character in string expected or A string was found with an illegal quoted character in it unterminated string literal A string was found that was not terminated Unterminated comment A comment was found that was not terminated Port lt port name gt not found The indicated port name was not found in the Interface Specification File Port type vnam is only valid for in ports The port type vnam was used for a port with direction out or inout This type is only allowed on in ports Port types g gd h hd are only valid for inout
260. apacitor Model C The capacitor model contains process information that may be used to compute the capacitance from strictly geometric information Name Parameter Units Default Example CAP model capacitance F 0 0 le 6 CJ junction bottom capacitance F m Se 5 CJSW junction sidewall capacitance F m 2e 11 DEFW default device width m le 6 2e 6 DEFL default device length m 0 0 le 6 NARROW narrowing due to side etching m 0 0 le 7 SHORT shortening due to side etching m 0 0 le 7 TC1 first order temperature coeff F c 0 0 0 001 TC2 second order temperature coeff Ffo 0 0 0 0001 TNOM parameter measurement temperature C 27 50 DI relative dielectric constant F m 1 THICK insulator thickness m 0 0 le 9 68 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS The capacitor has a capacitance computed as If value is specified on the instance line then Cnom Value x scale x m 3 7 If model capacitance is specified then Chom CAP x scale x m 3 8 If neither value nor CAP are specified then geometrical and physical parameters are take into account Co CJ 1 SHORT w NARROW 2CJSW J SHORT w NARROW 3 9 CJ can be explicitly given on the model line or calculated by physical parameters When CJ is not given is calculated as If THICK is not zero _ Dike spn E CJ THICK if DIis specified 12 1 CJ ack otherwise 3 10
261. ar function computed for last voltage and the linear approximation of the same current computed with the actual voltage k l k n iE oa lt RELTOL lbrmax Y ABSTOL 1 9 where a E TD k lbrmas 7 MAX a na ad 10 In the two expressions above the ipranch indicates the linear approximation of the current 1 4 3 Convergence failure Although the algorithm used in ngspice has been found to be very reliable in some cases it fails to converge to a solution When this failure occurs the program terminates the job Failure to converge in de analysis is usually due to an error in specifying circuit connections element values or model parameter values Regenerative switching circuits or circuits with positive feedback probably will not converge in the dc analysis unless the OFF option is used for some of the devices in the feedback path nodeset control line is used to force the circuit to converge to the desired state 44 CHAPTER 1 INTRODUCTION Chapter 2 Circuit Description 2 1 General Structure and Conventions The circuit to be analyzed is described to ngspice by a set of element lines which define the cir cuit topology and element values and a set of control lines which define the model parameters and the run controls All lines are assembled in an input file to be read by ngspice Two lines are essential e The first line in the input file must be the title which is the only comment line that does not need an
262. ar mechanism exists for the select lines If they are unknown then it is assumed that the chip is not selected Detailed timing checking routines are not provided in this model other than for the enable delay and select delay restrictions on read operations You are advised therefore to carefully check the timing into and out of the RAM for correct read and write cycle times setup and hold times etc for the particular device they are attempting to model Example SPICE Usage a4 3 45 6 3 4 5 6 12 13 14 15 16 17 18 19 30 22 23 24 ram2 model ram2 d_ram select_value 2 ic 2 read delay 80e 9 12 4 21 Digital Source NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector cm_d_source d_source digital signal source out output out d a yes no input_file digital input vector filename string source txt no 214 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null_Allowed no PARAMETER_TABLE Parameter Name input_load Description input loading capacitance F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds 5 Null_Allowed no Description The digital source provides for straightforward descriptions o
263. as in a pure analog simulator This chapter describes the predefined models available in ngspice stemming from the original XSPICE simulator The instructions for writing new code models are given in chapter 27 To make use of the XSPICE extensions you need to compile them in LINUX CYGWIN MINGW and other users may add the flag enable xspice to their configure command and then recompile The prebuilt ngspice for Windows distribution has XSPICE already en abled For detailed compiling instructions see chapter 31 1 12 1 Code Model Element amp MODEL Cards Ngspice includes a library of predefined Code Models that can be placed within any circuit description in a manner similar to that used to place standard device models Code model instance cards always begin with the letter A and always make use of a MODEL card to describe the code model desired Section of this document goes into greater detail as to how a code model similar to the predefined models may be developed but once any model is created and linked into the simulator it may be placed using one instance card and one MODEL card note here we conform to the SPICE custom of referring to a single logical line of information as a card As an example the following uses the predefined gain code model which takes as an input some value on node 1 multiplies it by a gain of 5 0 and outputs the new value to node 2 Note that by convention input ports are specif
264. at the period is an integral part of the name 48 CHAPTER 2 CIRCUIT DESCRIPTION 2 2 3 Comments General Form lt any comment gt Examples x RF 1K Gain should be 100 Check open loop gain and phase margin The asterisk in the first column indicates that this line is a comment line Comment lines may be placed anywhere in the circuit description 2 2 4 End of line comments General Form lt any command gt lt any comment gt Examples RF2 1K Gain should be 100 Cl 10p Check open loop gain and phase margin ngspice supports comments that begin with single characters or double characters or or 2 3 Device Models General form model mname type pnamel pvall pname2 pval2 Examples model MODI npn bf 50 is le 13 vbf 50 Most simple circuit elements typically require only a few parameter values However some de vices semiconductor devices in particular that are included in ngspice require many parameter values Often many devices in a circuit are defined by the same set of device model parameters For these reasons a set of device model parameters is defined on a separate model line and assigned a unique model name The device element lines in ngspice then refer to the model name For these more complex device types each device element line contains the device name the nodes to which the device is connected and the device model name In addition other opti
265. ated and stored in visualc debug or visualc re lease The executable will be stored to visualc debug bin or visualc release bin An installation tree as provided with MINGW make install and also used by vngspice in its current distribution is shown in the following table maybe created manually If you intend to install vngspice into another directory e g D MySpice you have to edit visualc include config h and alter the following entries from define NGSPICEBINDIR C Spice bin define NGSPICEDATADIR C Spice share ng spice rework to define NGSPICEBINDIR D MySpice bin define NGSPICEDATADIR D MySpice share ng spice rework nghelp exe is deprecated and no longer offered but still available in the binary distribution If the code model files cm are not available you will get warning messages but you may use ngspice in the normal way of course without XSPICE extensions To Do Some commands in how to ngspice vstudio txt and mentioned above have to be translated to English 31 2 4 make ngspice with pure CYGWIN If you don t have libdl a you may need to link libcygwin a to libdl a symbolically for example cd lib 1n s libcygwin a libdl a The procedure of compiling is the same as with Linux see chapt 31 1 31 2 5 make ngspice with CYGWIN and external MING W32 The next two compilation options are deprecated and not tested according to http www geocrawler com lists 3 SourceForge 6013 0 7321042 c
266. ated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Example SPICE Usage a6 1 2 3 8 nand1 model nandi d_nand rise_delay 12 4 5 Or NAME_TABLE C_Function_Name Spice _Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds input_load 0 5e 12 cm_d_or d_or digital or gate in input in d a yes 2 0 5e 9 fall_delay 0 3e 9 out output out d d no 12 4 DIGITAL MODELS Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value F real 1 0e 12 no yes 187 no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital or gate is an n input single output or gate which produces an active 1 value if at least one of its inputs is a 1 value
267. ation data and start spectrum x test for script spectrum control load ring51_41 out spectrum 10MEG 2500MEG IMEG v out25 v outS0 endc 17 8 SCRIPTS 313 314 CHAPTER 17 INTERACTIVE INTERPRETER 17 8 6 Example script for random numbers Generation and test of random numbers with Gaussian distribution agauss test in ngspice generate a sequence of gaussian distributed random numbers test the distribution by sorting the numbers into a histogram buckets control define agauss nom avar sig nom avar sig sgauss 0 let mc_runs 200 let run 0 let no_buck 8 number of buckets let bucket unitvec no_buck each element contains 1 let delta 3e 11 width of each bucket depends on avar and sig let lolimit le 09 3xdelta let hilimit le 09 3x delta dowhile run lt mc_runs let val agauss le 09 le 10 3 get the random number 1f val lt lolimit let bucket 0 bucket 0 1 lowest bucket end let part 1 dowhile part lt no_buck 1 if val lt lolimit partxdelta amp val gt lolimit part 1 delta let bucket part bucket part 1 break end let part part 1 end if val gt hilimit x highest bucket let bucket no_buck 1 bucket no_buck 1 1 end let run run 1 end let part 0 dowhile part lt no_buck let value bucket part 1 set value amp value print the buckets contents ec
268. ature exponent The nominal temperature at which these parame ters were measured is tnom which defaults to the circuit wide value specified on the options control line Reverse breakdown is modeled by an exponential increase in the reverse diode current and is determined by the parameters bv and ibv both of which are positive numbers Junction DC parameters Name Parameter Units Default Example Scale factor BV Reverse breakdown voltage V 00 40 IBV Current at breakdown voltage A 1 0e 3 1 0e 4 IK IKF Forward knee current A 1 0e 3 1 0e 6 IKR Reverse knee current A 1 0e 3 1 0e 6 IS JS Saturation current A 1 0e 14 1 0e 16 area JSW Sidewall saturation current A 1 0e 14 1 0e 15 perimeter N Emission coefficient 1 1 5 RS Ohmic resistance Q 0 0 100 area Junction capacitance parameters Name Parameter Units Default Example Scale factor CJO CJO Zero bias junction bottom wall F 0 0 2pF area capacitance CJP CJSW Zero bias junction sidewall F 0 0 1pF perimeter capacitance FC Coefficient for forward bias 0 5 depletion bottom wall capacitance formula FCS Coefficient for forward bias 0 5 depletion sidewall capacitance formula M MJ Area junction grading coefficient 0 5 0 5 MJSW Periphery junction grading 0 33 0 5 coefficient VJ PB Junction potential V 1 0 6 PHP Periphery junction potential V 1 0 6 TT
269. ault set of devices are listed if devices is a single letter devices of that type are listed A device s full name may be specified to list only that device Finally devices may be selected by model by using the form modelname 292 CHAPTER 17 INTERACTIVE INTERPRETER If no parameters are specified the values for a standard set of parameters are listed If the list of parameters contains a the default set of parameters is listed along with any other specified parameters For both devices and parameters the word all has the obvious meaning Note there must be spaces separating the that divides the device list from the parameter list 17 5 63 Showmod List model parameter values General Form showmod models parameters The showmod command operates like the show command above but prints out model param eter values The applicable forms for models are a single letter specifying the device type letter e g m or c a device name e g m xbuf22 m4b or modelname e g p1 17 5 64 Source Read a ngspice input file General Form source infile For ngspice read the ngspice input file infile containing a circuit netlist Ngnutmeg and ngspice commands may be included in the file and must be enclosed between the lines control and endc These commands are executed immediately after the circuit is loaded so a control line of ac works the same as the corresponding ac card The fi
270. b0 InOut real Quadratic VGS dependence of mobility 165 lubO InOut real Length dependence of ub0 166 wub0 InOut real Width dependence of ub0 167 ubb InOut real VBS dependence of ub 168 lubb InOut real Length dependence of ubb 169 wubb InOut real Width dependence of ubb 30 5 MOSFETS 525 170 ul0 InOut real VDS depence of mobility 171 lulO InOut real Length dependence of u10 172 wuld InOut real Width dependence of u10 173 ulb InOut real VBS depence of ul 174 lulb InOut real Length depence of ulb 175 wulb InOut real Width depence of ulb 176 uld InOut real VDS depence of ul 177 luld InOut real Length depence of uld 178 wuld InOut real Width depence of uld 179 nO InOut real Subthreshold slope at VDS 0 VBS 0 180 In0 InOut real Length dependence of nO 181 wn0 InOut real Width dependence of nO 182 nb InOut real VBS dependence of n 183 Inb InOut real Length dependence of nb 184 wnb InOut real Width dependence of nb 185 nd InOut real VDS dependence of n 186 Ind InOut real Length dependence of nd 187 wnd InOut real Width dependence of nd 188 vof0 InOut real Threshold voltage offset AT VDS 0 VBS 0 189 lvof0 InOut real Length dependence of vof0 190 wvof0 InOut real Width de
271. be interpreted as an actual node name The tilde when prepended to a digital node name specifies that the logical value of that node be inverted prior to being passed to the code model This allows for simple inversion of input and output polarities of a digital model in order to handle logically equivalent cases and others that frequently arise in digital system design The following example defines a NAND gate one input of which is inverted al 1 2 3 nandi model nandi d_nand rise_delay 0 1 fall_delay 0 2 The optional symbols v i Yovd etc specify the type of port the simulator is to expect for the subsequent port or port vector The meaning of each symbol is given in Table 12 1 The symbols described in Table 12 1 may be omitted if the default port type for the model is desired Note that non default port types for multi input or multi output vector ports must be specified by placing one of the symbols in front of EACH vector port On the other hand if all ports of a vector port are to be declared as having the same non default type then a symbol may be specified immediately prior to the opening bracket of the vector The following examples should make this clear Example 1 Specifies two differential voltage connections one to nodes 1 amp 2 and one to nodes 3 amp 4 vd 1 2 3 4 Example 2 Specifies two single ended connections to node 1 and at node 2 and one differential connection to nodes 3 amp
272. become a voltage or current 238 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE General form 1 MEASURE DCIACITRANISP result TRIG trig variable VAL val lt TD td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt lt TRIG AT time gt TARG targ_ variable VAL val lt TD td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt lt TARG AT time gt Measure statement example for use in the input file given above measure tran tdiff TRIG v 1 VAL 0 5 RISE 1 TARG v 1 VAL 0 5 RISE 2 measures the time difference between v 1 reaching 0 5 V for the first time on its first rising slope TRIG versus reaching 0 5 V again on its second rising slope TARG Le it measures the signal period Output tdiff 1 000000e 003 targ 1 083343e 003 trig 8 334295e 005 Measure statement example measure tran tdiff TRIG v 1 VAL 0 5 RISE 1 TARG v 1 VAL 0 5 RISE 3 measures the time difference between v 1 reaching 0 5 V for the first time on its rising slope versus reaching 0 5 V on its rising slope for the third time i e two periods Measure statement measure tran tdiff TRIG v 1 VAL 0 5 RISE 1 TARG v 1 VAL 0 5 FALL 1 measures the time difference between v 1 reaching 0 5V for the first time on its rising slope versus reaching 0 5 V on its first falling slope Measure statement measure tran tdiff TRIG v 1 VAL 0 FALL 3 TARG v 2 VAL 0 FALL 3 measures the time d
273. bed by you in the H array B array coordinate pairs B is then multiplied by the cross sectional area of the core to find the Flux value which is output as a current The pertinent mathematical equations are listed below H mmf L where L Length Here H the Magnetic Field Intensity is expressed in ampere turns meter B f H The B value is derived from a piecewise linear transfer function described to the model via the H_array B_array parameter coordinate pairs This transfer function does not include hysteretic effects for that you would need to substitute a HYST model for the core BA where A Area The final current allowed to flow through the core is equal to This value in turn is used by the Icouple code model to obtain a value for the voltage reflected back across its terminals to the driving electrical circuit The following example code shows the use of two Icouple models and one core model to produce a simple primary secondary transformer Example SPICE Usage al 2 0 3 0 primary model primary lcouple num_turns 155 a2 3 4 iron_core model iron_core core H_array 1000 500 375 250 188 125 63 0 63 125 188 250 375 500 1000 B_array 3 13e 3 2 63e 3 2 33e 3 1 93e 3 1 5e 3 6 25e 4 2 5e 4 0 2 5e 4 6 25e 4 1 5e 3 1 93e 3 2 33e 3 2 63e 3 3 13e 3 area 0 01 length 0 01 a3 5 0 4 0 secondary model secondary lcouple num_turns 310 4 4 4 HYSTERESIS
274. behave as virtually any type of counter or clocked combinatorial logic block and can be used to replace very large digital circuit schematics with an identically functional but faster representation The d state model is configured through the use of a state definition file state in which resides in a directory of your choosing The file defines all states to be understood by the model plus input bit combinations which trigger changes in state An example state in file is shown below Saree begin file This is an example state in file This file defines a simple 2 bit counter with one input The value of this input determines whether the counter counts up in 1 or down in 0 0 Os Os 0 gt 3 1 gt 1 1 Os 1z 0 gt 0 1 gt 2 2 1z Os 0 gt 1 1 gt 3 3 1z 1z 0 gt 2 3 1z 1z 1 gt 0 Several attributes of the above file structure should be noted First ALL LINES IN THE FILE MUST BE ONE OF FOUR TYPES These are 12 4 DIGITAL MODELS 209 1 A comment beginning with a in the first column 2 A header line which is a complete description of the current state the outputs corre sponding to that state an input value and the state that the model will assume should that input be encountered The first line of a state definition must ALWAYS be a header line 3 A continuation line which is a partial description of a state consisting of an input value and the state that the model wi
275. by previous commands may be used in commands following their definition data may be stored plotted or grouped into new vectors for additional charts supporting data evaluation 17 8 1 Variables Variables are defined and initialized with the set command 17 5 set output 10 will de fined the variable output and set it to a real number 10 Predefined variables which are used inside ngspice for specific purposes are listed in chapt 17 7 Variables are accessible globally The values of variables may be used in commands by writing varname where the value of the variable is to appear e g output The special variables and lt refer to the process ID of the program and a line of input which is read from the terminal when the variable is evaluated 308 CHAPTER 17 INTERACTIVE INTERPRETER respectively If a variable has a name of the form amp word then word is considered a vector see below and its value is taken to be the value of the variable If foo is a valid variable and is of type list then the expression foo low high represents a range of elements Either the upper index or the lower may be left out and the reverse of a list may be obtained with foo len 0 Also the notation foo evaluates to 1 if the variable foo is defined O otherwise and foo evaluates to the number of elements in foo if it is a list 1 if it is a number or string and 0 if it is a Boolean variable 17 8 2 Vectors Ngspice and ngnutmeg data i
276. c vds vgs vbs gt lt temp t gt Examples M1 24 2 0 20 TYPEI M31 2 17 6 10 MODM L 5U W 2U M1 2 9 3 0 MODI L 10U W 5U AD 100P AS 100P PD 40U PS 40U 66 199 Note the suffixes in the example the suffix u specifies microns le 6 m and p sq microns 1e 12 m In the instance card nd ng ns and nb are the drain gate source and bulk substrate nodes 13 respectively mname is the model name and m is the multiplicity parameter which simulates m paralleled devices All MOS models support the m multiplier parameter Instance parameters 1 and w channel length and width respectively are expressed in meters The areas of drain and source diffusions ad and as in squared meters m7 If any of 1 w ad or as are not specified default values are used The use of defaults simplifies input file preparation as well as the editing required if device geometries are to be changed pd and ps are the perimeters of the drain and source junctions in meters nrd and nrs designate the equivalent number of squares of the drain and source diffusions these values multiply the sheet resistance rsh specified on the model control line for an accurate representation of the parasitic series drain and source resistance of each transistor pd and ps default to 0 0 while nrd and nrs to 1 0 off indicates an optional initial condition on the device for de analysis The 121 122 CHAPTER 11 MOSFETS optional initial con
277. c2 lt Vt CI Ch 1 Exxx I2 n2 22 Il vn2 n2 0 DC 0 x measure charge by integrating current aintl id 1 cc 2 time_count aint2 id 22 cc2 3 time_count model time_count int in_offset 0 0 gain 1 0 out_lower_limit lel2 out_upper_limit lel2 limit_range le 9 out_ic 0 0 control set noaskquit tran 100n 100u plot v 2 plot v cc v cc2 endc end 3 2 9 Inductors General form LYYYYYYY n n lt value gt lt mname gt lt nt val gt lt m val gt lt scale val gt lt temp val gt lt dtemp val gt lt ic init_condition gt Examples LLINK 42 69 1UH LSHUNT 23 51 10U IC 15 7MA The inductor device implemented into ngspice has many enhancements over the original one n and n are the positive and negative element nodes respectively value is the inductance in Henry Inductance can be specified in the instance line as in the examples above or in a model line as in the example below 70 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS L1 15 5 indmodl L2 2 7 indmodl model indmodl L ind 3n Both inductors have an inductance of 3nH The nt is used in conjunction with a model line and is used to specify the number of turns of the inductor If you want to simulate temperature dependence of an inductor you need to specify its temperature coefficients using a model line like in the example below Lload 1 2 lu indl dtemp 5 MODEL ind L tc1 0 001 The optional initial condition is the initi
278. certain threshold number of iterations exceeded The optimizer algorithms its parameters and the starting point influence the convergence be havior The algorithms have to provide measures to reaching the global optimum not to stick to a local one and thus are tantamount for the quality of the optimizer ngspice does not have an integral optimization processor Thus this chapter will rely on work done by third parties to introduce ngspice optimization capability ngspice provides the simula tion engine a script or program controls the simulator and provides the optimizer functionality Four optimizers are presented here using ngspice scripting language using tclspice using a Python script and using ASCO a c coded optimization program 357 358 CHAPTER 22 CIRCUIT OPTIMIZATION WITH NGSPICE 22 2 ngspice optimizer using ngspice scripts Friedrich Schmidt see his web site has intensively used circuit optimization during his devel opment of Nonlinear loadflow computation with Spice based simulators He has provided an optimizer using the internal ngspice scripting language see chapt 17 8 His original scripts are found here A slightly modified and concentrated set of his scripts is available from the ngspice optimizer directory The simple example given in the scripts is o k with current ngspice Real circuits have still to be tested 22 3 ngspice optimizer using tclspice ngspice offers another scripting capability namely
279. ch S1 2311 0 SW MODEL SW VSWITCH VON 5V VOFF 0V RON 0 1 ROFF 100K may become al 11 2 3 sw MODEL SW aswitch cntl_off 0 0 cntl_on 5 0 r_off 1e5 r_on 0 1 log TRUE The XSPICE option has to be enabled 16 13 4 Controls and commands 16 13 4 1 lib The ngspice lib command see 2 7 requires two parameters a file name followed by a library name If no library name is given the line lib filename should be replaced by inc filename Alternatively the compatibility mode 16 13 1 may be set to ps 16 13 4 2 step Repeated analysis in ngspice if offered by a short script inside of a control section see chapt 17 8 7 added to the input file A simple application multiple de sweeps is shown below 262 CHAPTER 16 STARTING NGSPICE Input file with parameter sweep parameter sweep x resistive divider Rl swept from start_r to stop_r x replaces STEP RI 1k 10k 1k RI 1 2 Ik R2 2 0 1k VDD 1 0 DC 1 de VDD O 1 1 control let start_r 1k let stop_r 10k let delta_r 1k let r_act start_r loop while r_act le stop_r alter rl r_act run write dc sweep out v 2 set appendwrite let r_act r_act delta_r end plot dcl v 2 de2 v 2 de3 v 2 de4 v 2 deS v 2 dc6 v 2 dc7 v 2 dc8 v 2 dc9 v 2 dcl0 v 2 endc end 16 14 Reporting bugs and errors Ngspice is a complex piece of software The source code contains over 1500 files Various models and simulation procedures are provided
280. checked for relevance 319 18 Ngspice User Interfaces 321 18 1 MS Windows Graphical User Interface 321 18 2 MS Windows Console e 323 18 3 LINUX cinco ra A AAA AA AA A AA A 324 ISA Re rc rr es e 324 NA Emrorhadinge lt lt Boa ia AAA ARICA Da a a AA 324 18 6 Postscript printing options ce lt ee ye PRES RE eee 324 E AHR HR ERR KEE DEAR EREL SEDER EEL ES 326 18 8 Integration with CAD software and third party GUIs 326 ISSI KIA cciosios drid ore whe bbe oe Gos 326 li GNU Spics GUI oa eoe so ee EK ARA a ea a we A 326 A do AUTO oae Bone pos s he A eR A A ae 326 183 84 GEDA he Ha EE ER a 326 19 TCLspice 327 19 1 telspice framework 6 cosida a 327 19 2 telpice documentation ee ERE eR EEE eie rae Eha 327 PAS II a HOR ROE ee EE EHS EOS ES 327 94 Runnine TOLPE nion ee em a A A AAA AAA 328 ESE A Oo ee ee ee ee eee Ss 328 19 5 1 Active capacitor Measurement o o 328 19 5 2 Optimization of a linearization circuit for a Thermistor 331 19 5 3 Progressive display gt Sh a A ee Eee Ee es 335 UNS Comping oo he da SAREE A SS oe eee A es 336 LAA AA 336 19 6 2 MS Windows occ 5 be EHR GER GH RSS 336 18 CONTENTS 20 Example Circuits 337 20 1 AC coupled transistor amplifier 2 44 2 wk So 2h Swe Soe Ele dee ee 337 20 2 Diferential Pair c tt he a hee eoh eee Phe eGes 342 20 3 MOSFET Characterization s
281. cible random num bers you may start ngspice setting the command set rndseed lt int value gt into spinit or spiceinit The following three chapters offer a short introduction to the statistical methods available in ngspice The diversity of approaches stems from historical reasons and from some efforts to make ngspice compatible to other simulators 21 2 Using random parameters The ngspice frontend with its numparam parser contains the param see chapt 2 8 1 and func see chapt 2 9 commands Among the built in functions supported see 2 8 5 you will find the following statistical functions 349 350 CHAPTER 21 STATISTICAL CIRCUIT ANALYSIS Built in function Notes gauss nom rvar sigma nominal value plus variation drawn from Gaussian distribution with mean 0 and standard deviation rvar relative to nominal divided by sigma agauss nom avar sigma nominal value plus variation drawn from Gaussian distribution with mean 0 and standard deviation avar absolute divided by sigma unif nom rvar nominal value plus relative variation to nominal uniformly distributed between rvar aunif nom avar nominal value plus absolute variation uniformly distributed between avar limit nom avar nominal value avar depending on random number in 1 1 being gt 0 or lt 0 The frontend parser evaluates all param or func statements upon start up of ngspice before the circuit is evalua
282. ciiplot uses a simple minded linear interpolation The asciiplot command doesn t deal with log scales or the delta keywords 272 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 6 Aspice Asynchronous ngspice run General Form aspice input file output file Start an ngspice run and when it is finished load the resulting data The raw data is kept in a temporary file If output file is specified then the diagnostic output is directed into that file otherwise it is thrown away 17 5 7 Bug Mail a bug report General Form bug Send a bug report Please include a short summary of the problem the version number and name of the operating system that you are running the version of ngspice that you are running and the relevant ngspice input file If you have defined BUGADDR the mail is delivered to there 17 5 8 Cd Change directory General Form cd directory Change the current working directory to directory or to the user s home directory if none is given 17 5 9 Cdump Dump the control flow to the screen General Form cdump Dumps the control sequence to the screen all statements inside the control endc structure before the line with cdump Indentations show the structure of the sequence The example below is printed if you add cdump to examples Monte_Carlo MonteCarlo sp 17 5 COMMANDS 273 Example abbreviated let mc_runs 5 let run 0 define agauss nom avar sig nom avar sig sgaus
283. cir Now invoke the simulator on this circuit as follows ngspice xspice_ci cir After a few moments you should see the ngspice prompt ngspice 1 gt At this point ngspice has read in the circuit description and checked it for errors If any errors had been encountered messages describing them would have been output to your terminal Since no messages were printed for this circuit the syntax of the circuit description was correct To see the circuit description read by the simulator you can issue the following command ngspice 1 gt listing The simulator shows you the circuit description currently in memory a berkeley spice3 compatible circuit 1 a berkeley spice3 compatible circuit 2 global gnd 10 tran le 5 2e 3 12 vec vec O 12 0 13 vin 1 0 0 0 ac 1 0 sin 0 1 1k 14 ccouple 1 base 10uf 15 rbias1 vcc base 100k 16 rbias2 base O 24k 17 qi coll base emit generic 18 rcollector vcc coll 3 9k 19 remitter emit O 1k 21 model generic npn 24 end The title of this circuit is A Berkeley SPICE3 compatible circuit The circuit description contains a transient analysis control command TRAN 1E 5 2E 3 requesting a total simulated time of 2ms with a maximum time step of 10us The remainder of the lines in the circuit description describe the circuit of Figure 20 1 Now execute the simulation by entering the run command ngspice 1 gt run The simulator will run the simulation and when e
284. circuit instance is flattened during parsing and thus ngspice is not a hierarchical simulator The subcircuit is defined in the input deck by a grouping of element cards delimited by the subckt and the ends cards or the keywords defined by the substart and subend options see 17 7 the program then automatically inserts the defined group of elements wherever the subcircuit is referenced Instances of subcircuits within a larger circuit are defined through the use of an instance card which begins with the letter X A complete example of all three of these cards follows 50 CHAPTER 2 CIRCUIT DESCRIPTION Example The following is the instance card xdivi 10 7 O vdivide The following are the subcircuit definition cards subckt vdivide 1 2 3 ri 1 2 10K r2 2 3 5K ends The above specifies a subcircuit with ports numbered 1 2 and 3 e Resistor R1 is connected from port 1 to port 2 and has value 10 kOhms e Resistor R is connected from port 2 to port 3 and has value 5 kOhms The instance card when placed in an ngspice deck will cause subcircuit port 1 to be equated to circuit node 10 while port 2 will be equated to node 7 and port 3 will equated to node 0 There is no limit on the size or complexity of subcircuits and subcircuits may contain other subcircuits An example of subcircuit usage is given in chapter
285. citly in the function When this function is called no values should be assigned to the PARTIAL macro since these values will be computed automat ically by the simulator The automatic calculation of partial derivatives can save considerable time in designing and coding a model since manual computation of partial derivatives can be come very complex and error prone for some models However the automatic evaluation may also increase simulation run time significantly Function cm_analog_auto_partial causes the model to be called N additional times for a model with N inputs with each input varied by a small amount le 6 for voltage inputs and le 12 for current inputs The values of the par tial derivatives of the outputs with respect to the inputs are then approximated by the simulator through divided difference calculations cm_analog ramp_factor will then return a value from 0 0 to 1 0 which indicates whether or not a ramp time value requested in the SPICE analysis deck with the use of option ramp time lt duration gt has elapsed If the RAMPTIME option is used then cm_analog_ramp_ factor 27 7 MODEL DEFINITION FILE 417 returns a 0 0 value during the DC operating point solution and a value which is between 0 0 and 1 0 during the ramp A 1 0 value is returned after the ramp is over or if the RAMPTIME option is not used This value is intended as a multiplication factor to be used with all model outputs which would ordinarily experie
286. class is represented by a section in the card parameter table in the same order as it appears in the synopsis line Classes which contain optional parameters are surrounded by brackets Sometimes it only makes sense for a single parameter to take effect For example a material can not simultaneously be both Si and Si02 In such cases the various choices are listed sequentially separated by colons The same parameter often has a number of different acceptable names some of which are listed in the parameter tables These aliases are separated by vertical bars I Finally in the card examples the model continuation pluses have been removed from the card lines for clarity s sake 29 1 1 Examples The model description for a two dimensional numerical diode might look something like what follows This example demonstrates many of the features of the input format described above Notice how the MODEL line and the leading pluses form a border around the model descrip tion Some of the possibilities are not listed in order to shorten the lengths of the parameter tables This makes the use of parameter abbreviations somewhat troublesome since an unlisted parameter may abbreviate to the same name as one that is listed CIDER will produce a warning when this occurs Many of the undocumented parameter names are the PISCES names for the same parameters The adventurous soul can discover these names by delving through the cards dir
287. cluded to illustrate the use of device models and the amplifier is implemented with a subcircuit Additionally this file shows the use of the swept DC control card Device Models Device models allow you to specify when required many of the parameters of the devices being simulated In this example model statements are used to define the silicon diodes Electrically the diodes serve to limit the voltage at the amplifier input to values between about 700 millivolts The diode is simulated by first declaring the instance of each diode with a device statement Instead of attempting to provide parameter information separately for both diodes the label 1n4148 alerts the simulator that a separate model statement is included in the file which provides the necessary electrical specifications for the device 1n4148 is the part number for the type of diode the model is meant to simulate The model statement that provides this information is model 1n4148 D is 2 495E 09 rs 4 755E 01 n 1 679E 00 tt 3 030E 09 cjo 1 700E 12 vj 1 m 1 959E 01 bv 1 000E 02 ibv 1 000E 04 The model statement always begins with the string model followed by an identifier and the model type D for diode NPN for NPN transistors etc The optional parameters is rs n etc shown in this example configure the simulator s mathematical model of the diode to match the specific behavior of a particular part e g a 1n414
288. code model to refer to this static variable It is introduced by the Static_Var_Name keyword followed by a valid C identifier 27 6 4 2 Description The description string is used to describe the purpose and function of the static variable It is introduced by the Description keyword followed by a string literal 27 6 4 3 Data Type The static variable s data type is specified by the Data Type field The Data Type field is in troduced by the keyword Data_Type and is followed by a valid data type Valid data types include boolean complex int real string and pointer Note that pointer types are used to specify vector values in such cases the allocation of memory for vectors must be handled by the code model through the use of the malloc or calloc C function Such allocation must only occur during the initialization cycle of the model which is identified in the code model by testing the INIT macro for a value of TRUE Otherwise memory will be unnecessarily allocated each time the model is called Following is an example of the method used to allocate memory to be referenced by a static pointer variable x and subsequently use the allocated memory The example assumes that the value of size is at least 2 else an error would result The references to STATIC_VAR x that appear in the example illustrate how to set the value of and then access a static variable named x In order to use the variabl
289. coefficient 2 111 1k2 InOut real Length dependence of k2 112 wk2 InOut real Width dependence of k2 113 etaO InOut real VDS dependence of threshold voltage at VDD 0 114 letaO InOut real Length dependence of eta0 115 weta0 InOut real Width dependence of eta0 116 etab InOut real VBS dependence of eta 117 letab InOut real Length dependence of etab 118 wetab InOut real Width dependence of etab 119 dl InOut real Channel length reduction in um 120 dw InOut real Channel width reduction in um 121 mud InOut real Low field mobility at VDS 0 VGS VTH 122 mu0b InOut real VBS dependence of low field mobility 123 Imu0b InOut real Length dependence of mu0b 524 CHAPTER 30 MODEL AND DEVICE PARAMETERS 124 wmu0b InOut real Width dependence of mu0b 125 musO InOut real Mobility at VDS VDD VGS VTH 126 ImusO InOut real Length dependence of musO 127 wmus0 InOut real Width dependence of mus 128 musb InOut real VBS dependence of mus 129 Imusb InOut real Length dependence of musb 130 wmusb InOut real Width dependence of musb 131 mu20 InOut real VDS dependence of mu in tanh term 132 Imu20 InOut real Length dependence of mu20 133 wmu20 InOut real Width dependence of mu20 134 mu2b InOut real VBS dependence of mu2 135 Imu2b InO
290. command Will be overridden by direct entry of gridstyle in the plot command A linear grid is standard for both x and y axis Al lowed values are lingrid loglog xlog ylog smith smithgrid polar nogrid 304 CHAPTER 17 INTERACTIVE INTERPRETER hcopydev If this is set when the hardcopy command is run the resulting file is automatically printed on the printer named hcopydev with the command lpr Phcopydev g file hcopyfont This variable specifies the font name for hardcopy output plots The value is device dependent hcopyfontsize This is a scaling factor for the font used in hardcopy plots hcopydevtype This variable specifies the type of the printer output to use in the hardcopy com mand If hcopydevtype is not set Postscript format is assumed plot 5 is recognized as an alternative output format When used in conjunction with hcopydev hcopydevtype should specify a format supported by the printer hcopyscale This is a scaling factor for the font used in hardcopy plots between 0 and 10 hcopywidth Sets width of the hardcopy plot hcopyheight Sets height of the hardcopy plot hcopypscolor Sets the color of the hardcopy output If not set black amp white plotting is as sumed with different linestyles for each output vector plotted Setting to any valid color integer value yields a colored plot background 0 black 1 white others see below and colored solid lines This is valid for postscript only hcopypstxcolor This variable se
291. cont_n_node Out integer Negative node of contr source 7 ic In real Initial condition of controlling source 10 i Out real Output current 12 v Out real Output voltage 11 p Out real Power 206 sens_dc Out real dc sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real imag part of ac sensitivity 203 sens_mag Out real sensitivity of ac magnitude 204 sens_ph Out real sensitivity of ac phase 205 sens_cplx Out complex ac sensitivity 30 3 TRANSMISSION LINES 30 3 Transmission Lines 30 3 1 CplLines Simple Coupled Multiconductor Lines 30 3 1 1 CplLines instance parameters Name Direction Type Description 1 pos_nodes InOut string vector in nodes 2 neg_nodes InOut string vector out nodes 3 dimension InOut integer number of coupled lines 4 length InOut real length of lines 30 3 1 2 CplLines model parameters Name Direction Type Description 101 r InOut real vector resistance per length 104 1 InOut real vector inductance per length 102 c InOut real vector capacitance per length 103 g InOut real vector conductance per length 105 length InOut real length 106 cpl In flag Device is a cpl model 488 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 3 2 LTRA Lossy transmission line 30 3 2 1 LTRA instance parameters
292. controlling signal exceeds the specified OFF state or ON state value the resistance may become excessively large or excessively small in the case of logarithmic dependence or may become negative in the case of linear de pendence For the experienced user these excursions may prove valuable for modeling certain devices but in most cases you are advised to add limiting of the controlling input 1f the possibility of excessive control value variation exists Example SPICE Usage a8 3 6 7 switch3 model switch3 aswitch cntl_off 0 0 cntl_on 5 0 r_off 1e6 12 2 11 Zener Diode NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type r_on 10 0 log TRUE cm_zener zener Zener diode Zz Zener inout gd gd no no v_breakdown breakdown voltage real i_breakdown breakdown current real 152 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Default_Value 2 0e 2 Limits 1 0e 6 1 0e6 1 0e 9 Vector no no Vector_Bounds Null_ Allowed no yes PARAMETER_TABLE Parameter Name i_sat n forward Description saturation current forward emission coefficient Data_Type real real Default_Value 1 0e 12 1 0 Limits 1 0e 15 0 1 10 Vector no no Vector Bounds Null_Allowed yes yes PARAME
293. ctor vector Delete the specified vector s See also let 17 5 32 17 5 78 Unset Clear a variable General Form unset word Clear the value of the specified variable s word 17 5 79 Version Print the version of ngspice General Form version s f lt version id gt Print out the version of ngnutmeg that is running if invoked without argument or with s or f If the argument is a lt version id gt any string different from s or f is considered a lt version id gt the command checks to make sure that the arguments match the current version of ngspice This is mainly used as a Command line in rawfiles Options description e No option The output of the command is the message you can see when running ngspice from the command line no more no less s hort A shorter version of the message you see when calling ngspice from the com mand line e f ull You may want to use this option if you want to know what extensions are included into the simulator and what compilation switches are active A list of compilation options and included extensions is appended to the normal not short message May be useful when sending bug reports The following example shows what the command returns is some situations 298 CHAPTER 17 INTERACTIVE INTERPRETER Use of the version command ngspice 10 gt version K KK K K K ngspice 24 Circuit level simulation program xx The U C Berkeley
294. ctor see 17 8 2 from a parameter in plot 17 3 const General form csparam lt ident gt lt expr gt Examples param pippo 5 param pp 6 csparam pippp pippo pp param p pp csparam pap pp p In the example shown vectors pippp and pap are added to the constants which already reside in plot const with length one and real values These vectors are generated during circuit parsing and thus cannot be changed later same as with ordinary parameters They may be used in ngspice scripts and control sections see chapt 17 The use of csparam is still experimental and has to be tested A simple usage is shown below test csparam param TEMPS 27 csparam newt 3 TEMPS csparam mytemp 2 TEMPS control echo gnewt xmytemp endc end 2 11 Parameters functions expressions and command scripts In ngspice there are several ways to describe functional dependencies In fact there are three independent function parsers being active before during and after the simulation So it might be due to have a few words on their interdependence 2 11 1 Parameters Parameters chapt 2 8 1 and functions either defined within the param statement or with the func statement chapt 2 9 are evaluated before any simulation is started that is during 2 11 PARAMETERS FUNCTIONS EXPRESSIONS AND COMMAND SCRIPTS 59 the setup of the input and the circuit Therefore these statements may not
295. cussion NGSPICE syntax was reviewed and those features of NGSPICE that are specifically supported by the XSPICE simulator were enumerated In addition to these features there exist extensions to the NGSPICE capabilities that provide much more flexibility in describing and simulating a circuit The following sections describe these capabilities as well as the syntax required to make use of them 378 CHAPTER 25 EXECUTION PROCEDURES 25 2 1 1 Convergence Debugging Support When a simulation is failing to converge the simulator can be asked to return convergence diag nostic information that may be useful in identifying the areas of the circuit in which convergence problems are occurring When running through the Nutmeg user interface these messages are written directly to the terminal 25 2 1 2 Digital Nodes Support is included for digital nodes that are simulated by an event driven algorithm Because the event driven algorithm is faster than the standard SPICE matrix solution algorithm and because all digital real int and User Defined Node types make use of the event driven algorithm reduced simulation time for circuits that include these models can be anticipated compared to simulation of the same circuit using analog code models and nodes 25 2 1 3 User Defined Nodes Support is provided for User Defined Nodes that operate with the event driven algorithm These nodes allow the passing of arbitrary data structures amon
296. d by applying a non linear source as demonstrated in the following example 15 3 ANALYSES 233 Example x Shot noise test with B source diode x voltage on device diode forward Vdev out 0 DC 0 PULSE 0 4 0 45 10u x diode forward direction to be modeled with noise D1 mess 0 DMOD model DMOD D IS le 14 N 1 X1 0 mess out ishot x device between 1 and 2 new output terminals of device including noise 1 and 3 subckt ishot 1 2 3 white noise source with rms 1V x 20000 sample points VNG 0 11 DC 0 TRNOISE 1 In 0 0 measure the current i vl Vl 2 3 DC O x calculate the shot noise x sqrt 2 current q bandwidth BI 1 3 I sqrt 2 abs i vl 1 6e 19 1le7 v 11 ends ishot tran In 20u control run plot 1 i vdev endc end The selection of the delta time step NT is worth discussing Gaussian white noise has unlim ited bandwidth and thus unlimited energy content This is unrealistic The bandwidth of real noise is limited but it is still called White if it is the same level throughout the frequency range of interest e g the bandwidth of your system Thus you may select NT to be a factor of 10 smaller than the frequency limit of your circuit A thorough analysis is still needed to clar ify the appropriate factor The transient method is probably most suited for circuits including switches which are not amenable to the small signal NOISE analysis chapter 15 3 4 This is the price you have to
297. d in file extract P_OUT see chapter 7 4 of the ASCO man ual In this example measurement statements are used They allow using parameters from param statements because they will be located outside of control sections but do not allow to do data post processing inside of ngspice You may use ASCO post processing instead Chapter 23 Notes 23 1 Glossary card A logical SPICE input line A card may be extended through the use of the sign in SPICE thereby allowing it to take up multiple lines in a SPICE deck code model A model of a device function component etc which is based solely on a C programming language based function In addition to the code models included with the XSPICE option of the ngspice simulator you can use code models that you develop for circuit modeling deck A collection of SPICE cards which together specify all input information required in order to perform an analysis A deck of cards will in fact be contained within a file on the host computer system element card A single logical line in an ngspice circuit description deck which describes a circuit element Circuit elements are connected to each other to form circuits e g a logical card which describes a resistor such as R1 2 0 10K is an element card instance A unique occurrence of a circuit element See element card in which the instance R1 is specified as a unique element instance in a hypothetical circuit descr
298. d ng spice rework export PATH cygdrive g gcc_mingw bin PATH autoconf rm config cache 31 2 NGSPICE COMPILATION UNDER WINDOWS OS C Spice bin ngspice exe nghelp exe ngmakeidx exe ngnutmeg exe cmpp exe lib spice analog cm digital cm spice2poly cm extradev cm extravt cm share info dir ngspice info ngspice info 1 ngspice info 10 man man 1 ngmultidec ngnutmeg 1 ngsconvert ngspice ng spice rework helpdir ngspice idx ngspice txt scripts ciderinit devaxis devload setplot spectrum spinit Table 31 1 ngspice standard installation tree under MS Windows 539 540 CHAPTER 31 COMPILATION NOTES configure with windows prefix cygdrive g gcc_mingw bin make clean make 2 gt make err cp config h config ming h ngspice exe is 0 k but make tests does not work cannot direct console output into file Needs to add save what where test to every input cir file Also all given output files have to be adapted to WINDOWS CR LF instead of only LF at each line ending for allowing proper comparison 31 2 6 make ngspice with CYGWIN and internal MINGW32 use con fig h made above cd ng spice rework rm config cache export CFLAGS mno cygwin g 02 export LDFLAGS L 1lib mingw export CPPFLAGS I usr include mingw configure with windows cp config ming h config h make clean make 2 gt make err configure does not work
299. d represent a short circuit Each electrode box or segment can be specified in terms of the locations or mesh indices of its boundaries A missing value defaults to the corresponding mesh boundary 452 CHAPTER 29 CIDER USER S MANUAL 29 7 2 PARAMETERS Name Type Description Number Integer ID number of this domain X Low Real Lowest X location of electrode um IX Low Integer Lowest X mesh index of electrode X High Real Highest X location of electrode um IX High Integer Highest X mesh index of electrode Y Low Real Lowest Y location of electrode um IY Low Integer Lowest Y mesh index of electrode Y High Real Highest Y location of electrode um IY High Integer Highest Y mesh index of electrode 29 7 3 EXAMPLES The following shows how the four contacts of a MOSFET might be specified DRAIN electrode x 1 0 0 x h 0 5 y 1 0 0 y h 0 0 GATE electrode x 1 1 0 x h 3 0 iy 1 0 iy h 0 SOURCE electrode x 1 3 0 x h 4 0 y 1 0 0 y h 0 0 x BULK electrode x 1 0 0 x h 4 0 y 1 2 0 y h 2 0 The numbering option can be used when specifying bipolar transistors with dual base contacts EMITTER electrode num 3 x 1 1 0 x h 2 0 y 1 0 0 y h 0 0 BASE electrode num 2 x 1 0 0 x h 0 5 y 1 0 0 y h 0 0 electrode num 2 x 1 2 5 x h 3 0 y 1 0 0 y h 0 0 COLLECTOR electrode num 1 x 1 0 0 x h 3 0 y 1 1 0 y h 1 0 29 7 4 SEE ALSO domain contact 29 8 END Ter
300. d with more depth since the breakdown is not modeled in physically As written before the breakdown modeling is based on two model parameters the nominal breakdown voltage bv and the current at the onset of breakdown ibv For the diode model to be consistent the current value cannot be arbitrary chosen since the reverse bias and breakdown regions must match When the diode enters breakdown region from reverse bias the current is calculated using the formula Daia ISepp e TT 1 7 2 The computed current is necessary to adjust the breakdown voltage making the two regions match The algorithm is a little bit convoluted and only a brief description is given here Most real diodes shows a current increase that at high current levels does not follow the expo nential relationship given above This behavior is due to high level of carriers injected into the junction High injection effects as they are called are modeled with ik and ikr lif you look at the source code in file diotemp c you will discover that the exponential relation is replaced with a first order Taylor series expansion 7 3 DIODE EQUATIONS 105 Algorithm 7 1 Diode breakdown current calculation if IBV ef lt Ibdwn then IBVeff Ibawn BVeff BV else 7 Very eS es SPV GA 14 Ip q pepe 7 3 2 otherwise E ME A IRR ff Diode capacitance is divided into two different terms e Depletion capacitance e Diffusion capacitanc
301. de V A FREQ Frequency 1 TSTOP Hz TD Delay 0 0 sec THETA Damping factor 0 0 sec The shape of the waveform is described by the following formula i vo if0 lt t lt TD VO VAe TD THETA sin 22FREQ t TD if TD lt t lt TSTOP 4 1 3 Exponential General Form EXP V1 V2 TD1 TAUI TD2 TAU2 Examples VIN 3 0 EXP 4 1 2NS 30NS 60NS 40NS Name Parameter Default Value Units V1 Initial value V A V2 pulsed value VA TDI rise delay time 0 0 sec TAU1 rise time constant TSTEP sec TD2 fall delay time TD1 TSTEP sec TAU2 fall time constant TSTEP sec The shape of the waveform is described by the following formula Let V21 V2 V1V12 V1 V2 vi ifO lt t lt TDI t TD1 V t V1 V21 1 e7 Tar if TDI lt t lt TD2 VI V21 1 e TAT V12 1 e rare if TD2 lt t lt TSTOP 4 79 1 4 2 80 CHAPTER 4 VOLTAGE AND CURRENT SOURCES 4 1 4 Piece Wise Linear General Form PWL T1 V1 lt T2 V2 T3 V3 T4 V4 gt lt r value gt lt td value gt Examples VCLOCK 7 5 PWL 0 7 10NS 7 11NS 3 17NS 3 18NS 7 50NS 7 r 0 td 15NS Each pair of values 7 Vi specifies that the value of the source is V in Volts or Amps at time 7 The value of the source at intermediate values of time is determined by using linear interpolation on the input values The parameter r determines a repeat time point If r is not given the who
302. de numerous non ideal effects such as offset error voltages and non ideal input and output impedances The accurate simulation of complex real world components can lead to cumbersome subcircuit files long simulation run times and difficulties in synthesizing the behavior to be modeled from a limited set of internal devices known to the simulator To address these problems XSPICE allows you to create Code Models which simulate complex non ideal effects without the need to develop a subcircuit design For example the following file provides simulation of the circuit in Figure 25 2 but with the subcircuit amplifier replaced with a Code Model called Amp that models several non ideal effects including input and output impedance and input offset voltage Small Signal Amplifier This circuit simulates a small signal amplifier with a diode limiter dc Vin 1 1 05 Vin Input 0 DC O R_source Input Amp_In 100 D_Neg O Amp_In 1n4148 D_Pos Amp_In 0 1n4148 C1 Amp_In 0 1uF Al Amp_In O Amp_Out Amplifier R_Load Amp_Out O 1000 model 1n4148 D is 2 495E 09 rs 4 755E 01 n 1 679E 00 tt 3 030E 09 cjo 1 700E 12 vj 1 m 1 959E 01 bv 1 000E 02 ibv 1 000E 04 model Amplifier Amp gain 10 in_offset le 3 rin imeg rout 0 4 end A statement with a device label beginning with A alerts the simulator that the device uses a Code Model The model statement is similar in form to the one used to specify the
303. de s to which it is connected and then by any required parameter information The first character of a device name tells the simulator what kind of device it is e g R resistor C capacitor E voltage controlled voltage source Nodes may be labeled with any alphanumeric identifier The only specific labeling re quirement is that 0 must be used for ground A line that begins with a dot is a control directive Control directives are used most frequently for specifying the type of analysis the simulator is to carry out 25 1 SIMULATION AND MODELING OVERVIEW 373 e An end statement must be included at the end of the file e With the exception of the Title and end statements the order in which the circuit file is defined is arbitrary All identifiers are case insensitive the identifier npn is equivalent to NPN and to y nPn Spaces and parenthesis are treated as white space e Long lines may be continued on a succeeding line by beginning the next line with a in the first column In this example the title of the circuit is Small Signal Amplifier Three comment lines are included before the actual circuit description begins The first device in the circuit is voltage source Vin which is connected between node Input and O ground The parameters after the nodes specify that the source has an initial value of 0 a wave shape of SIN and a DC offset amplit
304. defined or user defined vectors and variables and are in voked after the simulation Parameters from 2 8 1 are not allowed in these expressions Again the expression syntax see chapt 17 2 will deviate from the one for parameters or B sources listed in 2 8 1 and 5 1 If you want to use parameters from 2 8 1 inside your control script you may apply a trick by defining a voltage source with the parameter as its value and then have it available as a vector e g after a transient simulation with a then constant output the parameter A feedback from here back into parameters 2 11 1 is never possible Also you cannot access non linear sources of the preceding simulation However you may start a first simulation inside your control script then evaluate its output using expressions change some of the element or model parameters with the alter and altermod statements see chapt 17 5 3 and then automatically start a new simulation Expressions and scripting are powerful tools within ngspice and we will enhance the examples given in chapt 20 continuously to describe these features 60 CHAPTER 2 CIRCUIT DESCRIPTION Chapter 3 Circuit Elements and Models Data fields that are enclosed in less than and greater than signs lt gt are optional All indi cated punctuation parentheses equal signs etc is optional but indicate the presence of any delimiter Further future implementations may require the punctuation as stated A con
305. del 491 492 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 4 BJTs 30 4 1 BJT Bipolar Junction Transistor 30 4 1 1 BJT instance parameters Name Direction Type Description 2 off InOut flag Device initially off 3 icvbe InOut real Initial B E voltage 4 icvce InOut real Initial C E voltage 1 area InOut real Emitter Area factor 10 areab InOut real Base area factor 11 areac InOut real Collector area factor 9 m InOut real Parallel Multiplier 5 ic In real vector Initial condition vector 6 sens_area In flag flag to request sensitivity WRT area 202 colnode Out integer Number of collector node 203 basenode Out integer Number of base node 204 emitnode Out integer Number of emitter node 205 substnode Out integer Number of substrate node 206 colprimenode Out integer Internal collector node 207 baseprimenode Out integer Internal base node 208 emitprimenode Out integer Internal emitter node 211 ic Out real Current at collector node 212 ib Out real Current at base node 236 ie Out real Emitter current 237 is Out real Substrate current 209 vbe Out real B E voltage 210 vbe Out real B C voltage 215 gm Out real Small signal transconductance 213 gpi Out real Small signal input conductance pi 214 gmu Out real Small signal conductance mu 225 gx Out re
306. del carbon resistors 64 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS VALUExscale acxscale 3 1 m Rnom Racnom If you are interested in temperature effects or noise equations read the next section on semi conductor resistors 3 2 2 Semiconductor Resistors General form RXXXXXXX n n lt value gt lt mname gt lt l length gt lt w width gt lt temp val gt lt dtemp val gt m lt val gt lt ac val gt lt scale val gt lt noisy 0l1 gt Examples RLOAD 2 10 10K RMOD 3 7 RMODEL L 10u W 1u This is the more general form of the resistor presented before 3 2 1 and allows the modeling of temperature effects and for the calculation of the actual resistance value from strictly geometric information and the specifications of the process If value is specified 1t overrides the geo metric information and defines the resistance If mname is specified then the resistance may be calculated from the process information in the model mname and the given length and width If value is not specified then mname and length must be specified If width is not specified then it is taken from the default width given in the model The optional temp value is the temperature at which this device is to operate and overrides the temperature specification on the option control line and the value specified in dtemp 3 2 3 Semiconductor Resistor Model R The resistor model consists of process related device data that allow the res
307. del card The end of the indicated model line was reached before all required information was supplied ERROR model s Array parameter must have at least one value An array parameter was encountered that had no values ERROR model s Bad boolean value A bad values was supplied for a Boolean Value used must be TRUE FALSE T or F ERROR model s Bad integer octal or hex value A badly formed integer value was found ERROR model s Bad real value A badly formed real value was found ERROR model s Bad complex value A badly formed complex number was found Complex numbers must be enclosed in lt gt delim iters 28 3 Code Model Error Messages The following is a list of error messages that may be encountered while attempting to run a simulation with certain code models These are listed alphabetically based on the name of the code model and explanations follow the name and listing 28 3 1 Code Model aswitch cntl_error doo ERROR ok ASWITCH CONTROL voltage delta less than 1 0e 12 This message occurs as a result of the cntl_off and cntl_on values with editline yes being less than 1 0e 12 volts amperes apart 434 CHAPTER 28 ERROR MESSAGES 28 3 2 Code Model climit climit_range_error xxkx ERROR CLIMIT function linear range less than zero This message occurs whenever the difference between the upper and lower control input values are close enough that there is no effective room for proper
308. dels have been added to allow simulation of state of the art devices These include trans verse field mobility degradation GATE90 that is important in scaled down MOSFETs and a polysilicon model for poly emitter bipolar transistors Temperature dependence has been in cluded for most physical models over the range from 50 C to 150 C The numerical models can be used to simulate all the basic types of semiconductor devices resistors MOS capaci tors diodes BJTs JFETs and MOSFETs BJTs and JFETs can be modeled with or without a substrate contact Support has been added for the management of device internal states Post processing of device states can be performed using the NUTMEG user interface of SPICE3 219 220 CHAPTER 14 MIXED LEVEL SIMULATION NGSPICE WITH TCAD Previously computed states can be loaded into the program to provide accurate initial guesses for subsequent analyses Finally numerous small bugs have been discovered and fixed and the program has been ported to a wider variety of computing platforms Berkeley tradition calls for the naming of new versions of programs by affixing a number letter number triplet to the end of the program name Under this scheme CIDER should instead be named CODECS2A 1 However tradition has been broken in this case because major incompatibilities exist between the two programs and because it was observed that the acronym CODECS is already used in the analog design community to refer to co
309. der decoder circuits Details of the basic semiconductor equations and the physical models used by CIDER are not provided in this manual Unfortunately no other single source exists which describes all of the relevant background material Comprehensive reviews of device simulation can be found in PINT90 and the book SELB84 CODECS and its inversion layer mobility model are described in MAYA88 and LGATE90 respectively PISCES and its models are described in PINT85 Temperature dependencies for the PISCES models used by CIDER are available in SOLL90 14 2 GSS Genius For LINUX users the cooperation of the TCAD software GSS with ngspice might be of interest see http ngspice sourceforge net gss html This project is no longer maintained however but has moved into the Genius simulator still available as open source cogenda genius Chapter 15 Analyses and Output Control batch mode The command lines described in this chapter are specifying analyses and outputs within the circuit description file They start with a gt dot commands Specifying analyses and plots or tables in the input file with dot commands is used with batch runs Batch mode is entered when either the b option is given or when the default input source is redirected from a file see also chapt 16 4 1 In batch mode the analyses specified by the control lines in the input file e g ac tran etc are immediately executed If the r rawfi
310. ding to the rules given in chapt 2 8 5 during start up of ngspice Thus it may not contain vectors like v 10 e g anything resulting from a simulation 15 4 10 parC expression The par expression option 15 5 6 allows to use algebraic expressions in the measure lines Every out_variable may be replaced by par expression within the general forms 1 9 described above Internally par expression will be substituted by a vector according to the rules of the B source chapt 5 1 A typical example of the general form is shown below General form 10 MEASURE DCIACITRANISP result FIND par expression AT val Measure statement measure tran vtest find par v 2 v 1 AT 2 3m will return the product of the two voltages at time point 2 3 ms 15 4 11 Deriv General form MEASURE DCIACITRANISP result DERIV lt ATIVE gt out_variable AT val MEASURE DCIACITRANISP result DERIV lt ATIVE gt out_variable WHEN out_variable2 val lt TD td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt MEASURE DCIACITRANISP result DERIV lt ATIVE gt out_variable WHEN out_variable2 out_variable3 lt ID td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt MEASURE DC AC TRAN SP result DERIV lt ATIVE gt is not yet available 15 4 12 More examples Some other examples also showing the use of parameters are given below Corr
311. diode The model label Amp directs XSPICE to use the code model with that name Parameter information has been added to specify a gain of 10 an input offset of 1 millivolt an input impedance of 1 meg ohm and an output impedance of 0 4 ohm Subsequent sections of this document detail the steps required to create such a Code Model and include it in the XSPICE simulator 25 2 CIRCUIT DESCRIPTION SYNTAX 377 25 1 1 4 Node Bridge Models When a mixed mode simulator is used some method must be provided for translating data between the different simulation algorithms XSPICE s Code Model support allows you to develop models that work under the analog simulation algorithm the event driven simulation algorithm or both at once In XSPICE models developed for the express purpose of translating between the different al gorithms or between different User Defined Node types are called Node Bridge models For translations between the built in analog and digital types predefined node bridge models are included in the XSPICE Code Model Library 25 1 1 5 Practical Model Development In practice developing models often involves using a combination of NGSPICE passive de vices device models subcircuits and XSPICE Code Models XSPICE s Code Models may be seen as an extension to the set of device models offered in standard NGSPICE The collection of over 40 predefined Code Models included with XSPICE provides you with an enriched set of
312. dition specification using ic vds vgs vbs is intended for use with the uic option on the tran control line when a transient analysis is desired starting from other than the quiescent operating point See the ic control line for a better and more convenient way to specify transient initial conditions The optional temp value is the temperature at which this device is to operate and overrides the temperature specification on the option control line The temperature specification is ONLY valid for level 1 2 3 and 6 MOSFETs not for level 4 or 5 BSIM devices BSIM3 2 version is also supporting the instance parameter delvto and mul1u0 for local mis match and NBTI negative bias temperature instability modeling Name Parameter Units Default Example delvto Threshold voltage shift V 0 0 0 07 mulu0 Low field mobility multiplier UO 1 0 0 9 11 2 MOSFET models NMOS PMOS MOSFET models are the central part of ngspice probably because they are the most widely used devices in the electronics world Ngspice provides all the MOSFETs implemented in the original Spice3f and adds several models developed by Berkeley s Device Group and other independent groups The variable level specifies the model to be used and a short summary of available device is show in 11 1 Note not all models below are included in the standard ngspice distribution because of copy right restrictions Ngspice provides four M
313. ditline may be used If a problem is found with the build process please submit a report to the Ngspice development team Please provide information about your system and any configure arguments you are using together with any error messages Ideally you would have tried to fix the problem yourself first If you have fixed the problem then the development team will love to hear from you 31 1 3 Install from a tarball e g ngspice rework 24 tgz This covers installation from a tarball for example ngspice rework 24 tgz to be found at http sourceforge net projects ngspice files After downloading the tar ball to a local direc tory unpack it using tar zxvf ngspice rework 24 tgz Now change directories in to the top level source directory where this text from the INSTALL file can be found You should be able to do configure with x enable xspice disable debug with readline yes make sudo make install The default install dir is usr local bin See the section titled Advanced Install for instructions about arguments that can be passed to configure to customize the build and installation 31 1 NGSPICE INSTALLATION UNDER LINUX AND OTHER UNIXES 531 31 1 4 Advanced Install Some extra options can be provided to configure To get all available options do configure help Some of these options are generic to the GNU build process that is used by Ngspice other are specific to Ngspice
314. dow This variable is set to one of the following strings which will determine the type of windowing used for the Fourier transform in the spec command If not set the default is hanning none No windowing rectangular Rectangular window bartlet Bartlett also triangle window blackman Blackman window hanning Hanning also hann or cosine window hamming Hamming window gaussian Gaussian window 278 CHAPTER 17 INTERACTIVE INTERPRETER flattop Flat top window hanning blacknan bartlett hanning gaussian flattop 8 588 1880 1508 20098 2508 3608 3508 4608 4508 Figure 17 1 Spec and FFT window functions Gaussian order 4 specwindoworder This can be set to an integer in the range 2 8 This sets the order when the Gaussian window is used in the spec command If not set order 2 is used 17 5 24 Fourier Perform a Fourier transform General Form fourier fundamental_frequency value Does a fourier analysis of each of the given values using the first 10 multiples of the funda mental frequency or the first nfreqs if that variable is set see below The output is like that of the four ngspice line chapter 15 5 4 The values may be any valid expression The values are interpolated onto a fixed space grid with the number of points given by the fourgridsize variable or 200 if it is not set The interpolation is of degree polydegree if that variable is set or 1 If polydegree is 0 then no interpolatio
315. dows Typical fonts are courier times arial and all others found on your machine Default is courier wfont_size The size of the windows font Default is depending on systems settings something like width The width of the page for asciiplot and print col see also 15 5 7 x1llineararcs Some X11 implementations have poor arc drawing If you set this option Ngspice will plot using an approximation to the curve using straight lines xbrushwidth Linewidth for grid border and graph xfont Set the font for the graphics plot in X11 LINUX Cygwin etc Input format has still to be checked 17 8 Scripts Expressions functions constants commands variables vectors and control structures may be assembled into scripts within a control endc section of the input file The script allows to automate a more complex ngspice behavior simulations are performed output data are the analyzed simulations repeated with modified parameters output vectors for plotting are as sembled The ngspice scripting language is not very powerful but easily integrated into the simulation flow The ngspice input file for scripting contains the usual circuit netlist modelcards and a script enclosed in the control endc section ngspice is started in interactive mode with the input file in the command line or sourced later with the source command After reading the input file the command sequence is immediately processed Variables or vectors set
316. ds InOut real Initial D S voltage 13 icvgs InOut real Initial G S voltage 11 icvbs InOut real Initial B S voltage 20 temp InOut real Instance temperature 21 dtemp InOut real Instance temperature difference 10 ic In real vector Vector of D S G S B S voltages 15 sens_l In flag flag to request sensitivity WRT length 14 sens_w In flag flag to request sensitivity WRT width 203 dnode Out integer Number of the drain node 204 gnode Out integer Number of the gate node 205 snode Out integer Number of the source node 206 bnode Out integer Number of the node 207 dnodeprime Out integer Number of int drain node 208 snodeprime Out integer Number of int source node 258 rs Out real Source resistance 209 sourceconductance Out real Source conductance 259 rd Out real Drain resistance 210 drainconductance Out real Drain conductance 211 von Out real Turn on voltage 212 vdsat Out real Saturation drain voltage 213 sourcevcrit Out real Critical source voltage 514 CHAPTER 30 MODEL AND DEVICE PARAMETERS 214 drainvcrit Out real Critical drain voltage 218 gmbs Out real Bulk Source transconductance 219 gm Out real Transconductance 220 gds Out real Drain Source conductance 221 gbd Out real Bulk Drain conductance 222 gbs Out real Bulk Source conductance 233 cgs Out rea
317. e Depletion capacitance is composed by two different contributes one associated to the bottom of the junction bottom wall depletion capacitance and the other to the periphery sidewall depletion capacitance The basic equations are Chiode SS Caif fusion Cdepletion Where the depletion capacitance 1 defined as Caepletion Caepl ER Caeplsy The diffusion capacitance due to the injected minority carriers is modeled with the transit time tt OIDeff Caif fusion TT OVp The depletion capacitance is more complex to model since the function used to approximate it diverges when the diode voltage become greater than the junction built in potential To avoid function divergence the capacitance function is approximated with a linear extrapolation for applied voltage greater than a fraction of the junction built in potential Cles 1 BM if Vp lt FC VJ Caeplo 1 FC 14MJ7 MJ 12 7 4 Ceff EA otherwise A gap if Vp lt FCS PHP Cdeplyw 1 FCS 14MISW MISW p 7 5 CIP et 1 FCS MISW otherwise 106 CHAPTER 7 DIODES Temperature dependence The temperature affects many of the parameters in the equations above the following equa tions show how One of the most significant parameter that varies with the temperature for a semiconductor is the band gap energy TNOM EGnom 1 16 7 02e 7 6 lt 6 7 02 TNOM 1108 0 wg 4 T EG T 1 16 7 02e 7 7 7 TNOM
318. e x in this manner it must be declared in the Static Variable Table of the code model s Interface Specification File Define local pointer variable double local x Allocate storage to be referenced by the static variable x Do this only if this is the initial call of the code model if INIT TRUE STATIC_VAR x calloc size sizeof double Assign the value from the static pointer value to the local pointer variable local_x STATIC_VAR x Assign values to first two members of the array local_x 0 1 234 local x 1 5 678 404 CHAPTER 27 CODE MODELS AND USER DEFINED NODES 27 7 Model Definition File The Model Definition File is a C source code file that defines a code model s behavior given input values which are passed to it by the simulator The file itself is always given the name cfunc mod In order to allow for maximum flexibility passing of input output and simulator specific information is handled through accessor macros which are described below In addi tion certain predefined library functions e g smoothing interpolators complex arithmetic rou tines are included in the simulator in order to ease the burden of the code model programmer These are also described below 27 7 1 Macros The use of the accessor macros is illustrated in the following example Note that the argument to most accessor macros is the name of a parameter or port as d
319. e solution independent error and a relative solution dependent error The absolute error limit can be set on this card The relative error is computed by multiplying the size of the solution by the circuit level SPICE parameter RELTOL 29 10 2 Parameters Name Type Description OneCarrier Flag Solve for majority carriers only AC analysis String AC analysis method either DIRECT or SOR NoMobDeriv Flag Ignore mobility derivatives Frequency Real AC analysis frequency Hz ItLim Integer Newton iteration limit DevTol Real Maximum residual error in device equations 29 10 3 Examples Use one carrier simulation for a MOSFET and choose direct method AC analysis to ensure accurate high frequency results 456 CHAPTER 29 CIDER USER S MANUAL method onec ac an direct Tolerate no more than 1071 as the absolute error in device level equations and perform no more than 15 Newton iterations in any one loop method devtol le 10 itlim 15 29 11 Mobility Specify types and parameters of mobility models SYNOPSIS mobility material carrier parameters models initialize 29 11 1 Description The mobility model is one of the most complicated models of a material s physical properties As a result separate cards are needed to set up this model for a given material Mobile carriers in a device are divided into a number of different classes each of which has different mobility modellin
320. e F real 1 0e 12 no yes Description The digital RAM is an M wide N deep random access memory element with programmable select lines tristated data out lines and a single write read line The width of the RAM words M is set through the use of the word width parameter The depth of the RAM N is set by the number of address lines input to the device The value 12 4 DIGITAL MODELS 213 of N is related to the number of address input lines P by the following equation 2 N There is no reset line into the device However an initial value for all bits may be specified by setting the ic parameter to either 0 or 1 In reading a word from the ram the read delay value is invoked and output will not appear until that delay has been satisfied Separate rise and fall delays are not supported for this device Note that UNKNOWN inputs on the address lines are not allowed during a write In the event that an address line does indeed go unknown during a write THE ENTIRE CONTENTS OF THE RAM WILL BE SET TO UNKNOWN This is in contrast to the data in lines being set to unknown during a write in that case only the selected word will be corrupted and this is corrected once the data lines settle back to a known value Note that protection is added to the write en line such that extended UNKNOWN values on that line are interpreted as ZERO values This is the equivalent of a read operation and will not corrupt the contents of the RAM A simil
321. e bee ee ee ee kee eee 4 1 6 Amplitude modulated source AM 4 1 7 Transient noise source 2 000 ee eee ee eee 4 1 8 Random voltage SQUICE e o 4 1 9 Arbitrary Phase Sources o 4 2 Linear Dependent Sources s an he se 4 2 1 Linear Voltage Controlled Current Sources VCCS 4 2 2 Linear Voltage Controlled Voltage Sources VCVS 4 2 3 Linear Current Controlled Current Sources CCCS 4 2 4 Linear Current Controlled Voltage Sources CCVS 4 2 5 Polynomial Source Compatibility 5 Non linear Dependent Sources Behavioral Sources 5 1 Peoc el ASRO T eoi u ee eee eee E a ew a ae ee thee Be e a 5 1 1 Syntax a d usage teh Reha EE DEES Deh EES HO 51 2 par expression cee kd ee hk eR aR eee Eee EERE cs 5 1 3 Piecewise Linear Function pwl 65 66 67 67 68 69 70 71 71 72 73 74 77 Jg 78 79 79 80 80 80 81 82 82 83 83 83 84 84 84 8 CONTENTS 5 2 E source non linear voltage source o o o eee 91 A hee goa eg aya Gees Gugsa ete ae iasac gia e goa gue gen Hg 91 EEE VALUE oo ba ok A Oh OH RH OD A Oe RS Oe SES 91 Bee TABLE Lira RRO EAP EEE MASSA SAS 4 G4 RS EH 91 Sim POLY 664 poh ke RAPESEED e SE HEARSE RES 91 AE a ik He RE CHRON ESE wR we HE eS Es 92 5 3 G source non linear current source 93
322. e current plot curplottitle Sets the title a short description of the current plot debug If set then a lot of debugging information is printed device The name dev tty of the graphics device If this variable isn t set then the user s terminal is used To do plotting on another monitor you probably have to set both the device and term variables If device is set to the name of a file nutmeg dumps the graphics control codes into this file this is useful for saving plots diff_abstol The relative tolerance used by the diff command default is le 12 diff_reltol The relative tolerance used by the diff command default is 0 001 diff_vntol The absolute tolerance for voltage type vectors used by the diff command default is le 6 echo Print out each command before it is executed editor The editor to use for the edit command filetype This can be either ascii or binary and determines the format of the raw file com pact binary or text editor readable ascii The default is binary fourgridsize How many points to use for interpolating into when doing Fourier analysis gridsize If this variable is set to an integer this number is used as the number of equally spaced points to use for the Y axis when plotting Otherwise the current scale is used which may not have equally spaced points If the current scale isn t strictly monotonic then this option has no effect gridstyle Sets the grid during plotting with the plot
323. e description maintains strict continuity in its high order derivatives which is essential for prediction of distortion and intermodulation Frequency dependence of output conductance and transconductance is described as a function of bias Both drain gate and source gate potentials modulate the pinch off potential which is con sistent with S parameter and pulsed bias measurements Self heating varies with frequency Extreme operating regions subthreshold forward gate bias controlled resistance and breakdown regions are included Parameters provide independent fitting to all operating regions It is not necessary to compromise one region in favor of another Strict drain source symmetry is maintained The transition during drain source potential reversal is smooth and continuous The model equations are described in this pdf document and in 19 9 2 JFET MODELS NJF PJF Name Description Unit Type Default ID Device IDText Text PF1 ACGAM Capacitance modulation None 0 BETA Linear region transconductance scale None 1074 CGD Zero bias gate source capacitance Capacitance OF CGS Zero bias gate drain capacitance Capacitance OF DELTA Thermal reduction coefficient None OW FC Forward bias capacitance parameter None 0 5 HFETA High frequency VGS feedback parameter None 0 HFE1 HFGAM modu
324. e expected output 542 CHAPTER 31 COMPILATION NOTES Chapter 32 Copyrights and licenses 32 1 Documentation license 32 1 1 Spice documentation copyright Copyright 1996 The Regents of the University of California Permission to use copy modify and distribute this software and its documentation for educa tional research and non profit purposes without fee and without a written agreement is hereby granted provided that the above copyright notice this paragraph and the following three para graphs appear in all copies This software program and documentation are copyrighted by The Regents of the University of California The software program and documentation are supplied as is without any accompanying services from The Regents The Regents does not warrant that the operation of the program will be uninterrupted or error free The end user understands that the program was developed for research purposes and is advised not to rely exclusively on the program for any reason IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES INCLUDING LOST PROFITS ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN AD VISED OF THE POSSIBILITY OF SUCH DAMAGE THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
325. e for loop This of course is made possible only thanks to the OpenMP guys and the clever trick on no synchronization introduced by the above cited authors The time measuring function getrusage used with LINUX or Cygwin to determine the CPU time usage with the rusage option enabled counts tics from every core adds them up and thus reports a CPU time value enlarged by a factor of 8 if 8 threads have been chosen So now ngspice is forced to use ftime for time measuring if OpenMP is selected 16 10 2 Some results Some results on an inverter chain with 627 CMOS inverters running for 200ns compiled with Visual Studio professional 2008 on Windows 7 full optimization or gcc 4 4 SUSE LINUX 11 2 02 on a 17 860 machine with four real cores and 4 virtuals using hyperthreading are shown in table 16 1 So we see a ngspice speed up of nearly a factor of two Even on an older notebook with dual core processor I have got more than 1 5x improvement using two threads Similar results are to be expected from BSIM4 256 CHAPTER 16 STARTING NGSPICE Table 16 1 OpenMP performance Threads CPU time s CPU time s Windows LINUX 1 standard 167 165 1 OpenMP 174 167 2 110 110 3 95 94 120 4 83 107 6 94 90 8 93 91 16 10 3 Usage To state it clearly OpenMP is installed inside the model equations of a particular model So for the moment it is available only in BSIM3 version 3 3 0 not
326. e ngspice starting simulating and then plotting immediately Control section x ADDER 4 BIT ALL NAND GATE BINARY ADDER control set noaskquit save vcc branch run plot vec branch rusage all endc 16 5 STANDARD CONFIGURATION FILE SPINIT 251 Any suitable command listed in chapter 17 5 may be added to the control section as well as control structures described in chapter 17 6 Batch like behavior may be obtained by changing the control section to Control section with batch like behavior x ADDER 4 BIT ALL NAND GATE BINARY ADDER control set noaskquit save vcc branch run write adder raw vcc branch quit endc If you put this control section into a file say adder start sp you may just add the line include adder start sp to your input file adder mos cir to obtain the batch like behavior In the following example the line tran from the input file is overridden by the tran command given in the control section Control section overriding the tran command x ADDER 4 BIT ALL NAND GATE BINARY ADDER control set noaskquit save vcc branch tran In 500n plot vcc branch rusage all endc 16 5 Standard configuration file spinit Upon start up ngspice reads its configuration file spinit spinit may be found in C Spice share ngspice scripts Windows or usr local share ngspice scripts LINUX The path may be overridden by setting the environmental variable SPICE_LIB_DIR to a path where
327. e parameters Name Direction Type Description 1 pos_node In integer Positive node of txl 2 neg_node In integer Negative node of txl 3 length InOut real length of line 30 3 4 2 TransLine model parameters Name Direction Type Description 101 r InOut real resistance per length 104 1 InOut real inductance per length 102 c InOut real capacitance per length 103 g InOut real conductance per length 105 length InOut real length 106 txl In flag Device is a txl model 30 3 TRANSMISSION LINES 30 3 5 URC Uniform R C line 30 3 5 1 URC instance parameters Name Direction Type Description 1 1 InOut real Length of transmission line 2 n InOut real Number of lumps 3 pos_node Out integer Positive node of URC 4 neg_node Out integer Negative node of URC 5 gnd Out integer Ground node of URC 30 3 5 2 URC model parameters Name Direction Type Description 101 k InOut real Propagation constant 102 fmax InOut real Maximum frequency of interest 103 rperl InOut real Resistance per unit length 104 cperl InOut real Capacitance per unit length 105 isperl InOut real Saturation current per length 106 rsperl InOut real Diode resistance per length 107 urc In flag Uniform R C line mo
328. e set independently from that of the rest of the circuit in order to simulate non isothermal circuit operation Finally the name of a file containing an initial state for the device can be specified Remember that if the filename contains capital letters they must be protected by surrounding the filename with double quotes Alternatively the device can be placed in an OFF state thermal equilibrium at the beginning of the analysis For more information on the use of initial conditions see the NGSPICE User s Manual chapt 7 1 In addition to the element input parameters there are output only parameters that can be shown using the NGSPICE show command 17 5 62 or captured using the save SAVE 17 5 53 15 5 1 command These parameters are the elements of the indefinite conductance G capacitance C and admittance Y matrices where Y G j C By default the parameters are com puted at 1 Hz Each element is accessed using the name of the matrix g c or y followed by the node indices of the output terminal and the input terminal e g g11 Beware that names are case sensitive for save show so lower case letters must be used 29 17 NUMD 467 29 17 2 Parameters Name Type Description Level Integer Dimensionality of numerical model Area Real Multiplicative area factor W Real Multiplicative width factor Temp Real Element operating temperature IC File String Initial conditions filename Off Flag D
329. e stated explicitly That is if a coefficient is zero it must be included as an input to the num coeff or den coeff vector The order of the coefficient parameters is from that associated with the highest powered term decreasing to that of the lowest Thus for the coefficient parameters specified below the equa tion in s is shown model filter s_xfer gain 0 139713 int_ic 0 0 0 num_coeff 1 0 0 0 0 07464102 den_coeff 1 0 0 998942 0 01170077 specifies a transfer function of the form _ s 0 7464 102 N s 0 139713 21099894254 0 00117077 7 The s domain transfer function includes gain and in_offset input offset parameters to allow for tailoring of the required signal There are no limits on the internal signal values or on the output value of the s domain transfer function so you are cautioned to specify gain and coefficient values that will not cause the model to produce excessively large values In AC 162 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE analysis the value returned is equal to the real and imaginary components of the total s domain transfer function at each frequency of interest The denormalized_freq term allows you to specify coefficients for a normalized filter i e one in which the frequency of interest is 1 rad s Once these coefficients are included specifying the denormalized frequency value shifts the corner frequency to the actual one of interest As an example
330. e the run or tran command to become effective Save allows to store and later access internal device parameters e g in a command like Save internal parameters save all mnl gm which saves all analysis output data plus gm of transistor mn1 to the internal memory see also 17 2 save may store data from a device residing indside of a subcircuit Save internal parameters save Om xmos3 mnl gm Please see chapter 30 for an explanation of the syntax 17 5 54 Sens Run a sensitivity analysis General Form sens output_variable sens output_variable ac DEC OCT LIN N Fstart Fstop Perform a Sensitivity analysis output_variable is either a node voltage ex v 1 or v A out or a current through a voltage source ex i vtest The first form calculates DC sensitivities the second form calculates AC sensitivities The output values are in dimen sions of change in output per unit change of input as opposed to percent change in output or per percent change of input 290 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 55 Set Set the value of a variable General Form set word set word value Set the value of word to be value if it is present You can set any word to be any value numeric or string If no value is given then the value is the Boolean true If you enter a string containing spaces you have to enclose it with double quotes The value of word may be inserted into a command by
331. e values YES and TRUE are equivalent and specify that it is legal to leave this port unconnected NO or FALSE specify that the port must be connected 27 6 3 The Parameter Table The parameter table is introduced by the Parameter_Table keyword It defines the set of valid parameters available to the code model The following sections define the valid fields that may be specified in the parameter table 27 6 3 1 Parameter Name The parameter name is a valid SPICE identifier which will be used on SPICE MODEL cards to refer to this parameter It is introduced by the Parameter_Name keyword followed by a valid SPICE identifier 27 6 3 2 Description The description string is used to describe the purpose and function of the parameter It is introduced by the Description keyword followed by a string literal 27 6 3 3 Data Type The parameter s data type is specified by the Data Type field The Data Type field is introduced by the keyword Data_Type and is followed by a valid data type Valid data types include boolean complex int real and string 27 6 3 4 Null Allowed The Null_Allowed field is introduced by the Null_Allowed keyword and is followed by a boolean literal A value of TRUE or YES specify that it is valid for the corresponding SPICE MODEL card to omit a value for this parameter If the parameter is omitted the default 402 CHAPTER 27 CODE MODELS AND USER
332. eal Drain current 34 cd Out real Drain current 36 ibd Out real B D junction current 35 ibs Out real B S junction current 18 is Out real Source current 17 ig Out real Gate current 16 ib Out real Bulk current 50 vgs Out real Gate Source voltage 51 vds Out real Drain Source voltage 49 vbs Out real Bulk Source voltage 48 vbd Out real Bulk Drain voltage 8 nrd InOut real Drain squares 7 nrs InOut real Source squares 9 off In flag Device initially off 12 icvds InOut real Initial D S voltage 13 icvgs InOut real Initial G S voltage 11 icvbs InOut real Initial B S voltage 10 ic InOut real vector Vector of D S G S B S voltages 77 temp InOut real Instance operating temperature 81 dtemp InOut real Instance operating temperature difference 15 sens_l In flag flag to request sensitivity WRT length 14 sens_w In flag flag to request sensitivity WRT width 22 dnode Out integer Number of drain node 23 gnode Out integer Number of gate node 24 snode Out integer Number of source node 25 bnode Out integer Number of bulk node 26 dnodeprime Out integer Number of internal drain node 27 snodeprime Out integer Number of internal source node 30 von Out real Turn on voltage 31 vdsat Out real Saturation drain voltage 32 sourcevcrit Out real Critical source voltage 33 drainvcrit Out real Critical drain voltage 78 rs Out real Source resistance 28 sourceconductance Out real Source conductance 79
333. eal imag part of ac sensitivity wrt width 253 sens_w_mag Out real sensitivity wrt w of ac magnitude 254 sens_w_ph Out real sensitivity wrt w of ac phase 255 sens_w_cplx Out complex ac sensitivity wrt width Name Direction Type Description 30 5 1 2 MOS1 model parameters 504 CHAPTER 30 MODEL AND DEVICE PARAMETERS Name Direction Type Description 133 type Out string N channel or P channel MOS 101 vto InOut real Threshold voltage 101 vtO InOut real 102 kp InOut real Transconductance parameter 103 gamma InOut real Bulk threshold parameter 104 phi InOut real Surface potential 105 lambda InOut real Channel length modulation 106 rd InOut real Drain ohmic resistance 107 rs InOut real Source ohmic resistance 108 cbd InOut real B D junction capacitance 109 cbs InOut real B S junction capacitance 110 is InOut real Bulk junction sat current 111 pb InOut real Bulk junction potential 112 cgso InOut real Gate source overlap cap 113 cgdo InOut real Gate drain overlap cap 114 cgbo InOut real Gate bulk overlap cap 122 rsh InOut real Sheet resistance 115 cj InOut real Bottom junction cap per area 116 mj InOut real Bottom grading coefficient 117 cjsw InOut real Side junction cap per area 118 mjsw InOut real Side grading coefficient 119 js InOut real Bulk jet sat current density 120 tox In
334. ectory of the source code distribution looking for the C parameter tables 29 2 BOUNDARY INTERFACE 443 Example Numerical diode MODEL M_ NUMERICAL NUPD LEVEL 2 cardnamel numberl vall number2 val2 number3 val3 cardname2 numberl vall stringl namel cardname3 numberl vall flagl flag2 number2 val2 flag3 4 The element line for an instance of this model might look something like the following Double quotes are used to protect the file name from decapitalization dl 1 2 M NUMERICAL area lOOpm 2 ic file diode IC 29 2 BOUNDARY INTERFACE Specify properties of a domain boundary or the interface between two boundaries SYNOPSIS boundary domain bounding box properties interface domain neighbor bounding box properties 29 2 1 DESCRIPTION The boundary and interface cards are used to set surface physics parameters along the boundary of a specified domain Normally the parameters apply to the entire boundary but there are two ways to restrict the area of interest If a neighboring domain is also specified the parameters are only set on the interface between the two domains In addition if a bounding box is given only that portion of the boundary or interface inside the bounding box will be set If a semiconductor insulator interface is specified then an estimate of the width of any inversion or accumulation layer that may form at the interface can be provided If the surface mobility model
335. ed as in C shell aliases 270 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 3 Alter Change a device or model parameter Alter changes the value for a device or a specified parameter of a device or model General Form alter dev lt expression gt alter dev param lt expression gt alter dev param lt expression gt lt expression gt must be real complex isn t handled right now integer is fine though but no strings For booleans use 0 1 Old style pre 34 alter device value alter device parameter value parameter value Using the old style its first form is used by simple devices which have one principal value re sistors capacitors etc where the second form is for more complex devices bjt s etc Model parameters can be changed with the second form if the name contains a For specifying vectors as values start the vector with followed by the values in the vector and end with Be sure to place a space between each of the values and before and after the and Some examples are given below Examples Spice3f4 style alter vd 0 1 alter vg de 0 6 alter Oml w 15e 06 alter vg sin 1 1 5 2MEG alter Vi pwl O 1 2 100p O 17 5 4 Altermod Change model parameter s General form altermod mod param lt expression gt altermod mod param lt expression gt Example altermod ncl tox 10e 9 altermod ncl tox 10e 9 Altermod operates on models and
336. ed here with the command meas instead of meas ure Using meas inside the control endc section offers additional features com pared to the meas use meas will print the results as usual but in addition will store its mea surement result typically the token result given in the command line in a vector This vector may be used in following command lines of the script as an input value of another command For details of the command see chapt 15 4 The measurement type SP is only available here because a fft command will prepare the data for SP measurement Unfortunately par expression 15 5 6 will not work here i e inside the control section You may use an expression by the let command instead giving let vec_new expression Replacement for par expression in meas inside the control section let vdiff v nl v n0 meas tran vtest find vdiff at 0 04e 3 the following will not do here meas tran vtest find par v nl v n0 at 0 04e 3 282 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 37 Mdump Dump the matrix values to a file or to console General Form mdump lt filename gt If lt filename gt is given the output will be stored in file lt filename gt otherwise dumped to your console 17 5 38 Mrdump Dump the matrix right hand side values to a file or to console General Form mrdump lt filename gt If lt filename gt is given the output will be appended to file lt filename gt
337. efault Value Limits Vector yes yes Vector Bounds 1 1 Nul1_Allowed yes yes PARAMETER_TABLE Parameter Name file Description file name Data_Type string Default Value filesource txt Limits Vector no Vector Bounds Null_ Allowed yes Description The File Source is similar to the Piece Wise Linear Source except that the wave form data is read from a file instead of being taken from parameter vectors The file format is line oriented ASCII and are comment characters all characters from a comment character until the end of the line are ignored Each line consists of two or more real values The first value is the time subsequent values correspond to the outputs Values are separated by spaces Time values are absolute and must be monotonically increasing unless timerelative is set to TRUE in which case the values specify the interval between two samples and must be positive Waveforms may be scaled and shifted in the time dimension by setting timescale and timeoffset Amplitudes can also be scaled and shifted using amplscale and amploffset Amplitudes are normally interpolated between two samples unless amplstep is set to TRUE Example SPICE Usage a8 vd 1 0 2 0 filesrc 12 2 ANALOG MODELS 149 model filesrc filesource file sine m amploffset 0 0 amplscale 1 1 timeoffset 0 timescale 1 timerelative false amplstep false Example input file name sine m two out
338. efault Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits input in d a yes 1 yes reset reset in d d no yes clk_delay delay from CLK real 1 0e 9 1 0e 12 no yes Parameter_Name 207 clock in a no no out output out d a yes 1 no reset_delay delay from RESET real 1 0e 9 1 0e 12 no yes state_file state transition specification file name string state txt no no reset_state default state on RESET amp at DC int 0 no no input_load input loading capacitance F real 1 0e 12 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector no Vector Bounds Null_ Allowed yes PARAMETER_TABLE Parameter Name clk_ load Description clock loading capacitance F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null_ Allowed yes PARAMETER_TABLE Parameter Name reset_load Description reset loading capacitance F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null_Allowed yes Description The digital state machine provides for straightforward descriptions of clocked combinational logic blocks with a variable number of inputs and outputs and with an unlimited number of possible states The model can be configured to
339. efault_Value 1 0e 9 1 0e 9 Limits 1 0e 12 1 0e 12 Vector no no Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter Name input_load Description input load value F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null_Allowed yes Description The digital xnor gate is an n input single output xnor gate which produces an active 0 value if an odd number of its inputs are also 1 values It produces a 1 output when an even number of 1 values occurs on its inputs The delays associated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Note also that to maintain the technology independence of the model any UNKNOWN input or any floating input causes the output to also go UNKNOWN Example SPICE Usage a9 1 2 8 xnor3 model xnor3 d_xnor rise_delay 0 5e 9 fall _delay 0 3e 9 12 4 9 Tristate NAME_TABLE C_Function_Name input_load cm_d_tristate 0 5e 12 Spice_Model_Name d_tristate Description digital tristate buffer PORT_TABLE Port Name in enable out Description input enable output Direction in in out Default_Type d d
340. efined in the Interface Specifi cation File Note also that all accessor macros except ARGS resolve to an lvalue C language terminology for something that can be assigned a value Accessor macros do not implement expressions or assignments void code model ARGS private structure accessed by accessor macros The following code fragments are intended to show how information in the argument list is accessed The reader should not attempt to relate one fragment to another del Consider each fragment as a separate example double p variable for use in the following code fragments code fragments code fragments X variable for use in the following y variable for use in the following int i indexing variable for use in the following j indexing variable for use in the following UDN_Example_Type a_ptr y_ ptr A pointer used to access a User Defined Node type A pointer used to access a User Defined Node type Initializing and outputting a User Defined Node result 27 7 MODEL DEFINITION FILE 405 if INIT OUTPUT y malloc sizeof user defined struct y_ptr OUTPUT y y_ptr gt component1 0 0 y_ptr gt component2 0 0 else y_ptr OUTPUT y y_ptr gt componenti xl y_ptr gt component2 x2 Determining analysis type if ANALYSIS AC Perform AC analysis dependent operati
341. elligent copy and paste As an example an extra code model d_xxor is created in the xtradev shared library reusing the existing d_xor model from the digital library More detailed information will be made available in chapter 27 You should have downloaded ngspice either the most recent distribution or from the CVS sources and compiled and installed it properly according to your operating system and the in structions given in chapter 31 of the Appendix especially chapt 31 1 5 for LINUX users or chapt 31 2 1 for MINGW and MS Windows MS Visual Studio will not do because we not yet have integrated the code model generator into this compiler You may however use all code models later with any ngspice executable Then Cd into directory ng spice rework src xspice icm xtradev 380 CHAPTER 25 EXECUTION PROCEDURES Create a new directory mkdir d_xxor Copy the two files cfunc mod and ifspec ifs from ng spice rework src xspice icm digital d_xor to ng spice rework src xspice icm xtradev d_xxor These two files may serve as a template for your new model For simplicity reasons we do only a very simple editing to these files here in fact the function ality is not changed just the name translated to a new model Edit the new cfunc mod In lines 5 28 122 138 167 178 replace the old name d_xor by the new name d_xxor Edit the new ifspec ifs In lines 16 23 24 replace cm_d_xor by cm_d_xxor and d_xor by d_xxor Make ngspice aware of
342. endence of phi 106 wphi InOut real Width dependence of phi 107 kl InOut real Bulk effect coefficient 1 108 Ik1 InOut real Length dependence of k1 109 wkl InOut real Width dependence of k1 110 k2 InOut real Bulk effect coefficient 2 111 1k2 InOut real Length dependence of k2 112 wk2 InOut real Width dependence of k2 113 eta InOut real VDS dependence of threshold voltage 114 leta InOut real Length dependence of eta 115 weta InOut real Width dependence of eta 116 x2e InOut real VBS dependence of eta 117 Ix2e InOut real Length dependence of x2e 118 wx2e InOut real Width dependence of x2e 119 x3e InOut real VDS dependence of eta 120 Ix3e InOut real Length dependence of x3e 121 wx3e InOut real Width dependence of x3e 122 dl InOut real Channel length reduction in um 123 dw InOut real Channel width reduction in um 30 5 MOSFETS 521 124 muz InOut real Zero field mobility at VDS 0 VGS VTH 125 x2mz InOut real VBS dependence of muz 126 Ix2mz InOut real Length dependence of x2mz 127 wx2mz InOut real Width dependence of x2mz 128 mus InOut real Mobility at VDS VDD VGS VTH channel length modulation 129 Imus InOut real Length dependence of mus 130 wmus InOut real Width dependence of mus 131 x2ms InOut real VBS dependence of mus 132 Ix2ms InOut real Length dependence of x2ms 133 wx2ms I
343. endix A lists a lot of examples starting at page 226 We do not reproduce these pages here but ask you to refer to the original document If you experience any difficulties downloading it please send a note to the ngspice users mailing list Part IV Appendices 473 Chapter 30 Model and Device Parameters The following tables summarize the parameters available on each of the devices and models in ngspice There are two tables for each type of device supported by ngspice Input parameters to instances and models are parameters that can occur on an instance or model definition line in the form keyword value where keyword is the parameter name as given in the tables Default input parameters such as the resistance of a resistor or the capacitance of a capacitor obviously do not need the keyword specified Output parameters are those additional parameters which are available for many types of in stances for the output of operating point and debugging information These parameters are specified as device keyword and are available for the most recent point computed or if specified in a save statement for an entire simulation as a normal output vector Thus to monitor the gate to source capacitance of a MOSFET a command save ml cgs given before a transient simulation causes the specified capacitance value to be saved at each time point and a subsequent command such as plot ml cgs produces the desired plot Note that
344. ent dependent Base charge storage is modelled by forward and reverse transit times tf and tr the forward transit time tf being bias dependent if desired and nonlinear depletion layer capacitances which are determined by cje vje and nje for the B E junction cjc vjc and njc for the B C junction and cjs vjs and mjs for the C S Collector Substrate junction Level 1 and 2 model defines a substrate capacitance that will be connected to device s base or collector to model lateral or vertical devices dependent from the parameter subs The temper ature dependence of the saturation currents is and iss for level 2 model is determined by the energy gap eg and the saturation current temperature exponent xti Additionally base current temperature dependence is modeled by the beta temperature exponent xtb in the new model The values specified are assumed to have been measured at the tempera ture tnom which can be specified on the options control line or overridden by a specification on the model line Level 4 model VBIC has the following improvements beyond the GP models Improved Early effect modeling Quasi saturation modeling Parasitic substrate transistor modeling Parasitic fixed oxide capacitance modeling Includes an avalanche multiplication model Improved tem perature modeling Base current is decoupled from collector current Electrothermal modeling Smooth continuous mode The BJT parameters used in the modified Gumme
345. ential voltage port two node names or numbers are ex pected for each port id represents a differential current port two node names or numbers are ex pected for each port gd represents a differential VCCS port two node names or numbers are expected for each port hd represents a differential CCVS port two node names or numbers are expected for each port Table 12 1 Port Type Modifiers 12 2 ANALOG MODELS 137 The parameter names listed on the MODEL card must be identical to those named in the code model itself The parameters for each predefined code model are described in detail in Sections 12 2 analog 12 3 Hybrid A D and 12 4 digital The steps required in order to specify parameters for user defined models are described in Chapter 27 The following is a list of instance card and associated MODEL card examples showing use of predefined models within an XSPICE deck al 1 2 amp model amp gain in_offset 0 1 gain 5 0 out_offset 0 01 a2 i 1 2 3 sumi model sumi summer in_offset 0 1 0 2 in_gain 2 0 1 0 out_gain 5 0 out_offset 0 01 a21 il1t fvd 2 5 7 10 3 sum2 model sum2 summer out_gain 10 0 a5 1 2 limit5 model limit5 limit in_offset 0 1 gain 2 5 out_lower limit 5 0 out_upper_limit 5 0 limit_domain 0 10 fraction FALSE a7 2 fid 4 7 xfer cntl1 model xfer_cntl1 pwl x_array 2 0 1 0 2 0 4 0 5 0 y _array 0 2 0 2 0 1 2 0 10 0 input_domain 0 05 fr
346. ependence of nd 161 tox InOut real Gate oxide thickness in um 162 temp InOut real Temperature in degree Celcius 163 vdd InOut real Supply voltage to specify mus 164 cgso InOut real Gate source overlap capacitance per unit channel width m 165 cgdo InOut real Gate drain overlap capacitance per unit channel width m 166 cgbo InOut real Gate bulk overlap capacitance per unit channel length m 167 xpart InOut real Flag for channel charge partitioning 168 rsh InOut real Source drain diffusion sheet resistance in ohm per square 169 js InOut real Source drain junction saturation current per unit area 522 CHAPTER 30 MODEL AND DEVICE PARAMETERS 170 pb InOut real Source drain junction built in potential 171 mj InOut real Source drain bottom junction capacitance grading coefficient 172 pbsw InOut real Source drain side junction capacitance built in potential 173 mjsw InOut real Source drain side junction capacitance grading coefficient 174 cj InOut real Source drain bottom junction capacitance per unit area 175 cjsw InOut real Source drain side junction capacitance per unit area 176 wdf InOut real Default width of source drain diffusion in um 177 dell InOut real Length reduction of source drain diffusion 180 kf InOut real Flicker noise coefficient 181 af InOut real Flicker noise exponent 178 nmos In flag
347. equivalent and specify that this port is a vector Likewise NO and FALSE specify that the port is not a vector Vector ports must have a corresponding vector bounds field that specifies valid sizes of the vector port 27 6 2 7 Vector Bounds If a port is a vector limits on its size must be specified in the vector bounds field The Vector Bounds field specifies the upper and lower bounds on the size of a vector The Vector Bounds 27 6 INTERFACE SPECIFICATION FILE 401 field is usually introduced by the Vector_Bounds keyword followed by a range of integers e g 1 7 or 3 207 The lower bound of the vector specifies the minimum number of elements in the vector the upper bound specifies the maximum number of elements If the range is unconstrained or the associated port is not a vector the vector bounds may be specified by a hyphen Using the hyphen convention partial constraints on the vector bound may be defined e g 2 indicates that the least number of port elements allowed is two but there is no maximum number 27 6 2 8 Null Allowed In some cases it is desirable to permit a port to remain unconnected to any electrical node in a circuit The Null_Allowed field specifies whether this constitutes an error for a particular port The Null_Allowed field is introduced by the Null_Allowed keyword and is followed by a boolean constant YES TRUE NO or FALSE Th
348. er abs vector The absolute value of vector same as mag sqrt vector The square root of vector sin vector The sine of vector cos vector The cosine of vector tan vector The tangent of vector atan vector The inverse tangent of vector sinh vector The hyperbolic sine of vector cosh vector The hyperbolic cosine of vector tanh vector The hyperbolic tangent of vector floor vector Largest integer that is less than or equal to vector ceil vector Smallest integer that is greater than or equal to vector norm vector The vector normalized to 1 i e the largest magnitude of any component is 1 mean vector The result is a scalar a length 1 vector that is the mean of the elements of vector elements values added divided by number of elements avg vector The average of a vector Returns a vector where each element is the mean of the preceding elements of the input vector including the actual element group_delay vector Calculates the group delay dphase rad dw rad s Input is the complex vector of a system transfer function versus frequency resembling damping and phase per frequency value Output is a vector of group delay values real values of delay times versus frequency vector number The result is a vector of length number with elements 0 1 number 1 If number is a vector then just the first element is taken and if it isn t an integer then the floor of the magnitude is used unitvec nu
349. er is smaller tmax is useful when one wishes to guarantee a computing interval which is smaller than the printer increment tstep uic use initial conditions is an optional keyword which indicates that the user does not want ngspice to solve for the quiescent operating point before beginning the transient analysis If this keyword is specified ngspice uses the values specified using IC on the various elements as the initial transient condition and proceeds with the analysis If the ic control line has been specified then the node voltages on the ic line are used to compute the initial conditions for the devices Look at the description on the ic control line for its interpretation when uic is not specified 15 3 10 Transient noise analysis at low frequency In contrast to the analysis types described above the transient noise simulation noise current or voltage versus time is not implemented as a dot command but is integrated with the indepen 232 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE dent voltage source vsre isre still not yet available see 4 1 7 and used in combination with the tran transient analysis 15 3 9 Transient noise analysis deals with noise currents or voltages added to your circuits as a time dependent signal of randomly generated voltage excursion on top of a fixed dc voltage The sequence of voltage values has random amplitude but equidistant time intervals selectable by the user parameter N
350. eral distinct regions and this leads to discontinuities in the first derivative in C V and I V characteristics that can cause numerical problems during simulation 11 2 9 BSIM3 model levels 8 49 BSIM3 solves the numerical problems of previous models with the introduction of smoothing functions It adopts a single equation to describe device characteristics in the operating regions This approach eliminates the discontinuities in the I V and C V characteristics The origi nal model BSIM3 evolved through three versions BSIM3v1 BSIM3v2 and BSIM3v3 Both BSIM3v1 and BSIM3v2 had suffered from many mathematical problems and were replaced by BSIM3v3 The latter is the only surviving release and has itself a long revision history The following table summarizes the story of this model Release Date Notes BSIM3v3 0 10 30 1995 BSIM3v3 1 12 09 1996 BSIM3v3 2 06 16 1998 Two minor revisions available BSIM3v3 2 1 and BSIM3v3 2 2 BSIM3v3 3 07 29 2005 Parallel processing with OpenMP is available for this model BSIM3v2 and 3v3 models has proved for accurate use in 0 18 um technologies The model is publicly available in source code form from University of California Berkeley at http www device eecs berkeley edu bsim3 get html A detailed description is given in the user s manual available at http www device eecs berkeley edu bsim3 ftpv330 Mod_doc b3v33manu tar We recommend that you use only
351. eristic specified by the cntl_array freq_array coordinate pairs and a frequency is obtained which repre sents a linear interpolation or extrapolation based on those pairs A digital time varying signal is then produced with this fundamental frequency The output waveform which is the equivalent of a digital clock signal has rise and fall delays which can be specified independently In addition the duty cycle and the phase of the waveform are also variable and can be set by you 180 Example SPICE Usage ab 1 8 var_clock model var_clock d_osc cntl_array freq_array duty_cycle rise_delay CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE 2 1 1 2 1e3 1e3 10e3 10e3 0 4 init_phase 180 0 10e 9 fall_delay 8e 9 12 3 4 Node bridge from digital to real with enable NAME _ TABLE Spice_Model_Name d_to_real C_Function_Name ucm_d_to_real Description Node bridge from d igital to real with enable PORT_TABLE Port_Name in enable out Description input enable output Direction in in out Default_Type d d real Allowed_Types d a real Vector no no no Vector_Bounds z Null_Allowed no yes no PARAMETER_TABLE Parameter_Name zero one delay Description value for 0 value for 1 delay Data_Type real real real Default_Value 0 0 1 0 le 9 Limits 1e 15 Vector no no no Vector Bounds Null Allowed yes yes yes 12 3 5 A Z 1 block working on real data NAME_T
352. es clk_trig clock trigger value real 0 5 no no pos_edge_trig cntl_in control input in v v vd i id no yes out output out V v vd i id no no retrig retrigger switch boolean FALSE no yes positive negative edge trigger switch boolean TRUE no 12 2 ANALOG MODELS Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed no cntl_array control array real 0 0 yes yes out_low output low value real 0 0 no yes fall time output fall time real 1 0e 9 no yes rise_delay output delay from real 1 0e 9 no yes fall_delay output delay from real 1 0e 9 no yes 173 pw_array pulse width array real 1 0e 6 0 00 yes cntl_array yes out_high output high value real 1 0 no yes rise_time output rise time real
353. es fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital d type latch is a one bit level sensitive storage element which will output the value on the data line whenever the enable input line is high ONE The value on the data line is stored i e held on the out line whenever the enable line is low ZERO In addition asynchronous set and reset signals exist and each of the four methods of changing the stored output of the d_dlatch 1 e data changing with enable ONE enable changing to ONE from ZERO with a new value on data raising set and raising reset have separate delays associated with them You may also specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful 204 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN inputs other than on the data line when enable ZERO imme diately cause the output to go UNKNOWN Example SPICE Usage a4 12 4 5 6 3 14 latchi model latchi d_dlatch data_delay 13 0e 9 enable delay 22 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise_delay 10 0e 9 fall_delay 3e 9 12 4 17 Set Reset Latch NAME_TABLE C_Function_Name Spice _Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types
354. es in parallel 2 44 24 2 eG bee ee es 61 3 1 2 Technology stale 224 cb eed gdb ee ee es 62 Sle M delDinmning e ou sbs oe ee eee ah eee eee eee Se 62 3 1 4 Transistors and Diodes 2 lt a ee Se Hed Oe Se 62 3 2 Elementary Devices 24 242444 h 448 4 44446465445 0464 63 Sl IES eo ar ee ds Oe as eh ee eee se oe Ss 63 3 2 2 Semiconductor Resistors MAA 64 3 2 3 Semiconductor Resistor Model R 64 CONTENTS 3 2 4 Resistors dependent on expressions behavioral resistor 3249 Capacitors 6 bh hb eR Re RR ROGERS REED E REED ES 3 2 6 Semiconductor Capacitors 0 02 ee 3 2 7 Semiconductor Capacitor Model C 3 2 8 Capacitors dependent on expressions behavioral capacitor EA 66 bh aS Re HRS DOERR EwREHRD ERG a 3 2 10 Inductor model o o co pe eae i a ER eR OER Oe HS 3 2 11 Coupled Mutual Inductors 2 2200 3 2 12 Inductors dependent on expressions behavioral inductor 3 2 13 Capacitor or inductor with initial conditions AA coe we Hae ad HH SMA EES EPA EER ESS 3 2 15 Switch Model SW CSW lt lt 256 e be bee rida 4 Voltage and Current Sources 4 1 Independent Sources for Voltage or Current ALI Pabe e aaie peie korege ee OE Oe ee we g a g ag OAD BUSA oec recece teta REESE ELE tret HS BAe Exponential o cia circa cia EEE EEE BS 414 Plece Wise Linear 2 0 0 3 1 5 Single Frequency FM 2 222 64 Ge
355. escription The digital nor gate is an n input single output nor gate which produces an active 0 value if at least one of its inputs is a 1 value The gate produces a 0 value if all inputs are 0 if neither of these two conditions holds the output is unknown The delays associated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output 1t will always drive the output strongly with the specified delays Example SPICE Usage anor12 1 2 3 4 8 nor12 model nori2 d_or rise_delay 0 5be 9 fall _delay 0 3e 9 input_load 0 5e 12 12 4 7 Xor NAME_TABLE C_Function_Name cm_d_xor Spice_Model_Name d_xor Description digital exclusive or gate PORT_TABLE Port Name in out Description input output Direction in out Default_Type d d Allowed_Types a a Vector yes no Vector_Bounds 2 12 4 DIGITAL MODELS Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input l
356. ese variables are unset Note that if a command file calls another it must save its argv and argc since they are altered Also command files may not be re entrant since there are no local variables Of course the procedures may explicitly manipulate a stack This way one can write scripts analogous to shell scripts for ngnutmeg and ngspice Note that for the script to work with ngspice it must begin with a blank line or whatever else since it is thrown away and then a line with control on it This is an unfortunate result of the source command being used for both circuit input and command file execution Note also that this allows the user to merely type the name of a circuit file as a command and it is automatically run The commands are executed immediately without running any analyses that may be specified in the circuit to execute the analyses before the script executes include a run command in the script There are various command scripts installed in usr local lib spice scripts or what ever the path is on your machine and the default sourcepath includes this directory so you can use these command files almost like built in commands 17 5 Commands Commands marked with a are only available in ngspice not in ngnutmeg 17 5 COMMANDS 269 17 5 1 Ac Perform an AC small signal frequency response analysis General Form ac DEC OCT LIN N Fstart Fstop Do an small signal ac analysis see also chapter
357. esponding demonstration input files are distributed with ngspice in folder examples measure 242 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE Other examples meas tran inv_delay2 trig v in val vp 2 td 1n fall 1 targ v out val vp 2 rise 1 meas tran test_datal trig AT In targ v out val vp 2 rise 3 meas tran out_slew trig v out val 0 2 vp rise 2 targ v out val 0 8 vp rise 2 meas tran delay_chk param inv_delay lt 100ps 1 0 meas tran skew when v out 0 6 meas tran skew2 when v out skew_meas meas tran skew3 when v out skew_meas fall 2 meas tran skew4 when v out skew_meas fall LAST meas tran skew5 FIND v out AT 2n meas tran vO_min min i v0 from dfall to dfall period meas tran vO_avg avg 1 v0 from dfall to dfall period meas tran vO_integ integ 1 v0 from dfall to dfall period meas tran vO_rms rms i v0 from dfall to dfall period meas de is_at FIND i vs AT 1 meas dc is_max max i vs from 0 to 3 5 meas dc vds_at when i vs 0 01 meas ac vout_at FIND v out AT 1MEG meas ac vout_atd FIND vdb out AT 1MEG meas ac vout_max max v out from 1k to 10MEG meas ac freq_at when v out 0 1 meas ac vout_diff trig v out val 0 1 rise 1 targ v out val 0 1 fall 1 meas ac fixed_diff trig AT 10k targ v out val 0 1 rise l meas ac vout_avg avg v out from 10k to 1MEG meas ac vout_integ integ v out fr
358. essages are explained in chapter 28 18 6 Postscript printing options This info is compiled from Roger L Traylor s web page All the commands and variables you can set are described in chapt 17 5 The corresponding input file for the examples given below is listed in chapt 20 1 Just add the control section to this file and run in interactive mode by 18 6 POSTSCRIPT PRINTING OPTIONS 323 ngspice xspice_ci_print cir One way is to setup your printing like this control set hcopydevtype postscript op run plot vcc coll emit hardcopy temp ps vcc coll emit endc Then print the postscript file temp ps to a postscript printer You can add color traces to it if you wish control set hcopydevtype postscript allow color and set background color if set to value gt 0 set hcopypscolor 1 color0 is background color colori is the grid and text color colors 2 15 are for the vectors set color0 rgb f f f set colort rgb 0 0 0 op run hardcopy temp ps vcc coll emit endc Then print the postscript file temp ps to a postscript printer You can also direct your output directly to a designated printer not available in MS Windows control set hcopydevtype postscript send output to the printer kec3112 clr set hcopydev kec3112 clr hardcopy out tmp vcc coll emit 326 CHAPTER 18 NGSPICE USER INTERFACES 18 7 Gnuplot Install GnuPlot on LINUX available from the distribution on Windows available here On W
359. essive If use of this feature fails to yield acceptable results the convlimit option should be tried add the following statement to the SPICE input deck options convlimit Example SPICE Usage a9 3 4 vref10 12 2 ANALOG MODELS 153 model vref10 zener v_breakdown 10 0 i_breakdown 0 02 r_breakdown 1 0 i_rev le 6 i_sat 1e 12 12 2 12 Current Limiter NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE cm_ilimit ilimit current limiter block in input in v v vd no no neg pwr negative power supply inout 8 lg gd no yes in_offset input offset real 0 0 no yes r_out_source sourcing resistance real 1 0 1 0e 9 1 0e9 no yes pos_pwr positive power supply inout 8 g gd no yes out output inout 8 g gd no no gain gain real 1 0 no yes r_out_sink sinking resistance real 1 0 1 0e 9 1 0e9 no yes
360. evel of abstraction Speed improvements vary and are most pronounced when a large amount of low level circuitry can be replaced by a small number of code models and additional components 26 2 XSPICE advanced usage 26 2 1 Circuit example C3 An equally important use of code models is in creating models for circuits and systems that do not easily lend themselves to synthesis using standard ngspice primitives resistors capacitors diodes transistors etc This occurs often when trying to create models of ICs for use in simu lating board level designs Creating models of operational amplifiers such as an LM741 or timer ICs such as an LM555 is greatly simplified through the use of XSPICE code models Another example of code model use is shown in the next example where a complete sampled data system is simulated using XSPICE analog digital and User Defined Node types simultaneously The circuit shown in Figure 26 1 is designed to demonstrate several of the more advanced features of XSPICE In this example you will be introduced to the process of creating code models and linking them into ngspice You will also learn how to print and plot the results of event driven analysis data The ngspice XSPICE circuit description for this example is shown below 386 CHAPTER 26 EXAMPLE CIRCUITS ENABLE ADIV2 ADIV4 ADIV8 ABRIDGE1 ACLK gt D CLK p DIV2_0 N DIV4_O p ABRIDGE2 GH Q vi FILT_IN o
361. evice initially in OFF state gl Flag Conductance element G Q clJ Flag Capacitance element C F yIJ Flag Admittance element Y Q 29 17 3 EXAMPLES A one dimensional numerical switching diode element model pair with an area twice that of the default device which has a size of 1 um x 1 um can be specified using DSWITCH 1 2 M_SWITCH_DIODE AREA 2 MODEL M_SWITCH_DIODE NUMD options defa 1p A two dimensional two terminal MOS capacitor with a width of 20 um and an initial condition of 3 V is created by DMOSCAP 11 12 M_MOSCAP W 20um IC 3v MODEL M_MOSCAP NUMD LEVEL 2 options moscap defw lm The next example shows how both the width and area factors can be used to create a power diode with area twice that of a 6um wide device i e a 12um wide device The device is assumed to be operating at a temperature of 100 C D1 POSN NEGN POWERMOD AREA 2 W 6um TEMP 100 0 MODEL POWERMOD NUMD LEVEL 2 This example saves all the small signal parameters of the previous diode SAVE dl gl1 dl g12 dl g21 dl g22 SAVE dl cll dl cl2 dl c21 dl c22 SAVE dl y11 dl y12 dl y21 dl y22 468 CHAPTER 29 CIDER USER S MANUAL 29 17 4 SEE ALSO options output 29 17 5 BUGS Convergence problems may be experienced when simulating MOS capacitors due to singulari ties in the current continuity equations 29 18 NBJT Bipolar three terminal numerical models and elements SYNOPSIS Model MODE
362. f drain current with gate voltage lambda which determines the output conductance and is the saturation current of the two gate junctions Two ohmic resistances rd and rs are included Charge storage is modeled by nonlinear depletion layer capacitances for both gate junctions which vary as the 1 2 power of junction voltage and are defined by the parameters cgs cgd and pb Note that in Spice3f and later a fitting parameter b has been added For details see 9 115 116 CHAPTER 9 JFETS Name Parameter Units Default Example Scaling factor VTO Threshold voltage Vro V 2 0 2 0 BETA Transconductance parameter B A v 1 0e 4 1 0e 3 area LAMBDA Channel length modulation 1 v 0 1 0e 4 parameter A RD Drain ohmic resistance Q 0 100 area RS Source ohmic resistance Q 0 100 area CGS Zero bias G S junction capacitance F 0 SpF area Cos CGD Zero bias G D junction F 0 1pF area capacitance Cog PB Gate junction potential V 1 0 6 IS Gate saturation current Is A 1 0e 14 1 0e 14 area B Doping tail parameter 1 1 1 KF Flicker noise coefficient 0 AF Flicker noise exponent 1 FC Coefficient for forward bias 0 5 depletion capacitance formula TNOM Parameter measurement C 27 50 temperature 9 2 2 Modified Parker Skellern model The level 2 model is an improvement to level 1 Details are available from Macquarie Univer sity Some important items are Th
363. f a vector may be modified by appending a subscript to name ex name 0 If there are no arguments let is the same as display The command let creates a vector in the current plot use setplot 17 5 57 to create a new plot See also unlet 17 5 77 compose 17 5 11 17 5 33 Linearize Interpolate to a linear scale General Form linearize vec Create a new plot with all of the vectors in the current plot or only those mentioned as argu ments to the command all data linearized onto an equidistant time scale How compute the fft from a transient simulation output ngspice 8 gt setplot tranl ngspice 9 gt linearize V 2 ngspice 9 gt set specwindow blackman ngspice 10 gt fft V 2 ngspice 11 gt plot mag V 2 tstep Linearize will create new vectors vec or renew all vectors of the current plot if no arguments are given The new vectors are interpolated onto a linear time scale which is determined by the values of tstep tstart and tstop in the currently active transient analysis The currently loaded input file must include a transient analysis a tran command may be run interactively before the last reset alternately and the current plot must be from this transient analysis The length of the new vector is tstop tstart tstep 1 5 This command is needed for example if you want to do a fft analysis 17 5 23 Please note that the parameter tstep of your transient analysis see chapter 15 3 9 has
364. f digital signal vec tors in a tabular format The model reads input from the input file and at the times specified in the file generates the inputs along with the strengths listed The format of the input file is as shown below Note that comment lines are delineated through the use of a single character in the first column of a line This is similar to the way the SPICE program handles comments Oo BH FH 0000 Uu Uu Us Uu 234e 9 Os is is Oz 376e 9 Os Os is Oz be 7 1s Os is Oz 5006e 7 s is 1s Oz 0e 7 Os is 1s Oz NNNR RAR ROXA XX A Note that in the example shown whitespace any combination of blanks tabs commas is used to separate the time and strength state tokens The order of the input columns is important the first column is always interpreted to mean time The second through the N th columns map to the out 0 through out N 2 output nodes A non commented line which does not contain enough tokens to completely define all outputs for the digital source will cause an error Also time values must increase monotonically or an error will result in reading the source file Errors will also occur if a line exists in source txt which is neither a comment nor vector line The only exception to this is in the case of a line that is completely blank this is treated as a comment note that such lines often occur at the end of text within a file ignoring these in particular prevents nuisance errors on
365. falls A 00 0 1 area halfway to its min value RBM Minimum base resistance at high Q RB 10 area currents RE Emitter resistance Q 0 1 area RC Collector resistance Q 0 10 area CJE B E zero bias depletion F 0 2pF area capacitance VJE PE B E built in potential V 0 75 0 6 MJE ME B E junction exponential factor 0 33 0 33 TF Ideal forward transit time sec 0 0 1ns XTF Coefficient for bias dependence of 0 TF VTF Voltage describing VBC V oo dependence of TF ITF High current parameter for effect A 0 area on TF PTF Excess phase at freq 1 0 TF 2PI deg 0 112 CHAPTER 8 BJTS CJC B C zero bias depletion F 0 2pF area capacitance area is areab for vertical devices and areac for lateral VJC PC B C built in potential V 0 75 0 5 MJC B C junction exponential factor 0 33 0 5 XCJC Fraction of B C depletion 1 capacitance connected to internal base node TR Ideal reverse transit time sec 0 10ns CJS Zero bias collector substrate F 0 2pF area capacitance area is areac for vertical devices and areab for lateral VJS PS Substrate junction built in V 0 75 potential MJS MS Substrate junction exponential 0 0 5 factor XTB Forward and reverse beta 0 temperature exponent EG Energy gap for temperature effect eV 1 11 on IS XTI Temperature exponent for effect on 3 IS KF Flicker noise coefficient 0 AF Flicker noise exponent
366. fied ngspice will terminate immediately 17 5 45 Rehash Reset internal hash tables General Form rehash Recalculate the internal hash tables used when looking up UNIX commands and make all UNIX commands in the user s PATH available for command completion This is useless unless you have set unixcom first see above 17 5 46 Remcirc Remove the current circuit General Form remcirc This command removes the current circuit from the list of circuits sourced into ngspice To select a specific circuit use setcire 17 5 56 To load another circuit refer to source 17 5 64 The new actual circuit will the circuit on top of the list of the remaining circuits 17 5 47 Reset Reset an analysis General Form reset Throw out any intermediate data in the circuit e g after a breakpoint or after one or more analyses have been done already and re parse the input file The circuit can then be re run from it s initial state overriding the affect of any set or alter commands Reset may be required in simulation loops preceeding any run or tran command 17 5 48 Reshape Alter the dimensionality or dimensions of a vector General Form reshape vector vector or reshape vector vector dimension dimension or reshape vector vector dimension dimension This command changes the dimensions of a vector or a set of vectors The final dimension may be left off and it will be filled in automatical
367. fied breakpoints and traces The debug numbers are those shown by the status command unless you do status gt file in which case the debug numbers are not printed 17 5 COMMANDS 275 17 5 16 Destroy Delete an output data set General Form destroy plotnames all Release the memory holding the output data the given plot or all plots for the specified runs 17 5 17 Devhelp information on available devices General Form devhelp csv device_name parameter Devhelp command shows the user information about the devices available in the simulator If called without arguments it simply displays the list of available devices in the simulator The name of the device is the name used inside the simulator to access that device If the user spec ifies a device name then all the parameters of that device model and instance parameters will be printed Parameter description includes the internal ID of the parameter id the name used in the model card or on the instance line Name the direction Dir and the description of the parameter Description All the fields are self explanatory except the direction Direction can be in out or inout and corresponds to a write only read only or a read write parameter Read only parameters can be read but not set write only can be set but not read and read write can be both set and read by the user The csv option prints the fields se
368. fied but n1 is omitted 0 25 is assumed that is the frequency is assumed to be the quarter wave frequency Note that although both forms for expressing the line length are indicated as optional one of the two must be specified Note that this element models only one propagating mode If all four nodes are distinct in the ac tual circuit then two modes may be excited To simulate such a situation two transmission line elements are required see the example in chapt 20 7 for further clarification The optional initial condition specification consists of the voltage and current at each of the transmission line ports Note that the initial conditions if any apply only if the UIC option is specified on the TRAN control line 93 96 CHAPTER 6 TRANSMISSION LINES Note that a lossy transmission line see below with zero loss may be more accurate than than the lossless transmission line due to implementation details 6 2 Lossy Transmission Lines General form OXXXXXXX nl n2 n3 n4 mname Examples 023 1 0 2 0 LOSSYMOD OCONNECT 10 5 20 5 INTERCONNECT This is a two port convolution model for single conductor lossy transmission lines ni and n2 are the nodes at port 1 n3 and n4 are the nodes at port 2 Note that a lossy transmission line with zero loss may be more accurate than than the lossless transmission line due to implementation details 6 2 1 Lossy Transmission Line Model LTRA The uniform RLC RC LC RG transmission
369. file function at that point Empirical profiles must first be normalized by the value at 0 0 to provide a usable profile functions Alternatively the second dimension can be included by assigning the same concentration to all points equidistant from the edges of the constant box The contours of the profile are the circular Unless otherwise specified the added impurities are assumes to be N type However the name of a specific dopant species is needed when extracting concentration information for that impu rity from a SUPREM3 exported file Several parameters are used to adjust the basic shape of a profile functions so that the final constructed profile matches the doping profile in the real device The constant box region 448 CHAPTER 29 CIDER USER S MANUAL N X de Meee Peak Conc A os P PS de i 4 i i 1 A 1 1 i p i i a i i t gt i i i 1 DD i i b i i 1 Q gt i i i 1 T 4 k 1 i i 4 Fi ad ped S e Ya er Minimin X Low XHigh X um Location Figure 29 1 1D doping profiles with location gt 0 should coincide with a region of constant concentration in the device For uniform profiles its boundaries default to the mesh boundaries For the other profiles the constant box starts as a point and only acquires width or height if both the appropriate edges are specified The location of the peak of the primary profile can be moved away from the edge of the constant box A positive locati
370. fined output OUTPUT_DELAY out5 1 0e 9 27 7 1 1 Macro Definitions The full set of accessor macros is listed below Arguments shown in parenthesis are examples only Explanations of the accessor macros are provided in the subsections below Circuit Data ARGS CALL_TYPE INIT ANALYSIS FIRST_TIMEPOINT TIME T n RAD_FREQ TEMPERATURE Parameter Data PARAM gain PARAM_SIZE gain PARAM_NULL gain Port Data PORT_SIZE a PORT_NULL a 27 7 MODEL DEFINITION FILE 407 LOAD a TOTAL LOAD a Input Data INPUT a INPUT_STATE a INPUT_STRENGTH a Output Data OUTPUT y OUTPUT_CHANGED a OUTPUT_DELAY y DUTPUT_STATE a OUTPUT_STRENGTH a Partial Derivatives PARTIAL y a AC Gains AC_GAIN y a Static Variable STATIC_VAR x 27 7 1 2 Circuit Data ARGS CALL_TYPE INIT ANALYSIS FIRST _TIMEPOINT TIME T n RAD FREQ TEMPERATURE ARGS is a macro which is passed in the argument list of every code model It is there to provide a way of referencing each model to all of the remaining macro values It must be present in the argument list of every code model it must also be the only argument present in the argument list of every code model CALL_TYPE is a macro which returns one of two possible symbolic constants These are EVENT and ANALOG Testing may be performed by a model using CALL TYPE to determine whether it is being called by the analog simulator or the event driven simulator This will in general
371. for data analysis and plotting Input to the simulator is a netlist file including commands for circuit analysis and output control Interactive ngspice can plot data from a simulation on a PC or a workstation display Ngspice on LINUX and OSs like Cygwin BCD Solaris uses the X Window System for plotting see chapter 18 3 if the environment variable DISPLAY is available Otherwise a con sole mode non graphical interface is used If you are using X on a workstation the DISPLAY variable should already be set if you want to display graphics on a system different from the one you are running ngspice or ngutmeg on DISPLAY should be of the form machine 0 0 See the appropriate documentation on the X Window System for more details The MS Windows versions of ngspice and ngnutmeg will have a native graphics interface see chapter 18 1 The front end may be run as a separate stand alone program under the name ngnutmeg ngnut meg is a subset of ngspice dedicated to data evaluation still made available for historical rea sons Ngnutmeg will read in the raw data output file created by ngspice r or by the write command during an interactive ngspice session 16 2 Where to obtain ngspice The actual distribution of ngspice may be downloaded from the ngspice download web page The installation for LINUX or MS Windows is described in the file INSTALL to be found in the top level directory You may also have a look at chapter 31 of this ma
372. for multi core processors Paralleling is done by OpenMP see chapt 16 10 The following options are seldom used today not tested some may even no longer be imple mented enable capbypass Bypass calculation of cbd cbs in the mosfets if the vbs vbd voltages are unchanged enable capzerobypass Bypass all the cbd cbs calculations if Czero is zero This is en abled by default since rework 18 enable cluster Clustering code for distributed simulation This is a contribution never tested This code comes from TCLspice implementation and is implemented for transient anal ysis only 532 CHAPTER 31 COMPILATION NOTES enable expdevices Enable experimental devices This option is used by developers to mask devices under development Almost useless for users enable experimental This enables some experimental code Specifically it enables support for altering options in interactive mode by adding the interactive keyword options The ability to save and load snapshots adds interactive keywords savesnap and loadsnap enable help Force building nghelp This is deprecated enable newtrunc Enable the newtrunc option enable nodelimiting Experimental damping scheme enable nobypass Don t bypass recalculations of slowly changing variables enable nosqrt Use always log exp for non linear capacitances enable predictor Enable a predictor method for convergence enable sense2 Use spice2 sensitivity analy
373. form XYYYYYYY N1 lt N2 N3 gt SUBNAM Examples X1 2 4 17 3 1 MULTI Subcircuits are used in ngspice by specifying pseudo elements beginning with the letter X followed by the circuit nodes to be used in expanding the subcircuit If you use parameters the subcircuit call will be modified see 2 8 3 2 5 GLOBAL General form GLOBAL nodename Examples GLOBAL gnd vcc Nodes defined in the GLOBAL statement are available to all circuit and subcircuit blocks inde pendently from any circuit hierarchy After parsing the circuit these nodes are accessible from top level 2 6 INCLUDE General form INCLUDE filename Examples INCLUDE users spice common wattmeter cir 52 CHAPTER 2 CIRCUIT DESCRIPTION Frequently portions of circuit descriptions will be reused in several input files particularly with common models and subcircuits In any ngspice input file the INCLUDE line may be used to copy some other file as if that second file appeared in place of the INCLUDE line in the original file There is no restriction on the file name imposed by ngspice beyond those imposed by the local operating system 2 7 LIB General form LIB filename libname Examples LIB users spice common mosfets lib mosl The LIB statement allows to include library descriptions into the input file Inside the lib file a library libname will be selected The statements of each library inside the lib file are enclosed in
374. formation General Form Status Display all of the traces and breakpoints currently in effect 17 5 67 Step Run a fixed number of time points General Form step number Iterate number times or once and then stop 17 5 68 Stop Set a breakpoint General Form stop after n when value cond value 6699 Set a breakpoint The argument after n means stop after iteration number n and the argument when value cond value means stop when the first value is in the given relation with the second value the possible relations being Symbol Alias Meaning eq equal to lt gt ne not equal gt gt greater than lt It less than gt ge greater than or equal to lt le less than or equal to Symbol or alias may be used alternatively All stop commands have to be given in the control flow before the run command The values above may be node names in the running circuit or real values If more than one condition is given e g stop after 4 when v 1 gt 4 when v 2 lt 2 294 CHAPTER 17 INTERACTIVE INTERPRETER the conjunction of the conditions is implied If the condition is met the simulation and control flow are interrupted and ngspice waits for user input In a transient simulation the or eq will only work with vector time in commands like stop when time 200n Internally a breakpoint will be set at the time requested Multiple breakpoints may
375. g There are three levels of division First electrons and holes are obviously handled separately Second carriers in surface inversion or accumulation layers are treated differently than carriers in the bulk Finally bulk carriers can be either majority or minority carriers For surface carriers the normal field mobility degradation model has three user modifiable pa rameters For bulk carriers the ionized impurity scattering model has four controllable pa rameters Different sets of parameters are maintained for each of the four bulk carrier types majority electron minority electron majority hole and minority hole Velocity saturation mod elling can be applied to both surface and bulk carriers However only two sets of parameters are maintained one for electrons and one for holes These must be changed on a majority carrier card 1 e when the majority flag is set Several models for the physical effects are available along with appropriate default values Initially a universal set of default parameters usable with all models is provided These can be overridden by defaults specific to a particular model by setting the initialization flag These can then be changed directly on the card itself The bulk ionized impurity models are the Caughey Thomas CT model and the Scharfetter Gummel SG model CAUG671 SCHA69 Three alternative sets of defaults are available for the Caughey Thomas expression They are the Arora AR parameters for
376. g the object files for each architecture in their own directory To do this you must use a version of make that supports the VPATH variable such as GNU make cd to the directory where you want the object files and executables to go and run the configure script configure automatically checks for the source code in the directory that configure is in and in If you have to use a make that does not supports the VPATH variable you have to compile the package for one architecture at a time in the source code directory After you have installed the package for one architecture use make distclean before reconfiguring for another architecture 534 CHAPTER 31 COMPILATION NOTES 31 1 8 Installation Names By default make install will install the package s files in usr local bin usr local man etc You can specify an installation prefix other than usr local by giving configure the option prefix PATH You can specify separate installation prefixes for architecture specific files and architecture independent files If you give configure the option exec prefix PATH the package will use PATH as the prefix for installing programs and libraries Documentation and other data files will still use the regular prefix In addition if you use an unusual directory layout you can give options like bindir PATH to specify different v
377. g Conduction band potential V PhiV Flag Valence band potential V E Field Flag Electric field V cm JC Flag Conduction current density A cm JD Flag Displacement current density A cm JN Flag Electron current density A cm JP Flag Hole current density A cm JT Flag Total current density A cm Unet Flag Net recombination 1 cm s MuN Flag Electron mobility low field cm Vs gt MuP Flag Hole mobility low field cm Vs gt 29 14 3 Examples The following example activates all potentially valuable diagnostic output output all debug mater stat Energy band diagrams generally contain the potential the quasi fermi levels the energies and the vacuum energy The following example enables saving of the r values needed to make energy band diagrams output phin phjp phic phiv vac psi Sometimes it is desirable to save certain key solutions and then reload them subsequent simu lations In such cases only the essential values 9 n and p 1 saved This example turns off the nonessential default values and indicates th ones explicitly 29 15 TITLE 463 output psi n conc p conc e f jn jp jd 29 14 4 SEE ALSO options numd nbjt numos 29 15 TITLE Provide a label for this device s output SYNOPSIS title text 29 15 1 DESCRIPTION The title card provides a label for use as a heading in various output files The text can be any length but titles that fit on a s
378. g Local avalanche generation TempMob Flag Temperature dependent mobility ConcMob Flag Concentration dependent mobility FieldMob Flag Lateral field dependent mobility TransMob Flag Transverse field dependent surface mobility SurfMob Flag Activate surface mobility model 29 12 3 Examples Turn on bandgap narrowing and all of the generation recombination effects models bgn srh conctau auger aval Amend the first card by turning on lateral and transverse field dependent mobility in surface charge layers and lateral field dependent mobility in the bulk Also this line turns avalanche generation modeling off models surfmob transmob fieldmob aval 29 13 OPTIONS 459 29 12 4 See also material mobility 29 12 5 Bugs The local avalanche generation model for 2D devices does not compute the necessary contri butions to the device level Jacobian matrix If this model is used it may cause convergence difficulties and it will cause AC analyses to produce incorrect results 29 13 OPTIONS Provide optional device specific information SYNOPSIS options device type initial state dimensions measurement temperature 29 13 1 DESCRIPTION The options card functions as a catch all for various information related to the circuit device interface The type of a device can be specified here but will be defaulted 1f none is given Device type is used primarily to determine how to limit the changes in voltage bet
379. g a maximum space size but this option is only available when one of the two end lengths is given Note that once the number of new lines is determined using the desired ratio the actual spacing ratio may be adjusted so that the spaces exactly fill the interval 29 16 2 Parameters Name Type Description Location Real Location of this mesh line um Width Real Width between this and previous mesh lines um Number Node Integer Number of this mesh line Ratio Real Ratio of sizes of adjacent spaces H Start H1 Real Space size at start of interval um H End H2 Real Space size at end of interval um H Max H3 Real Maximum space size inside interval um 29 16 3 EXAMPLES A 50 node uniform mesh for a 5 um long semiconductor resistor can be specified as x mesh loc 0 0 n 1 x mesh loc 5 0 n 50 An accurate mesh for a 1D diode needs fine spacing near the junction In this example the junc tion is assumed to be 0 75 um deep The spacing near the diode ends is limited to a maximum of 0 1 um x mesh w 0 75 h e 0 001 h m 0 1 ratio 1 5 x mesh w 2 25 h s 0 001 h m 0 1 ratio 1 5 The vertical mesh spacing of a MOSFET can generally be specified as uniform through the gate oxide very fine for the surface inversion layer moderate down to the so source drain junction depth and then increasing all the way to the bulk contact mesh loc 0 04 node 1 mesh loc 0 0 node 6 mesh width 0 5
380. g models The real and integer node types supplied with XSPICE are actually predefined User Defined Node types 25 2 1 4 Supply Ramping A supply ramping function is provided by the simulator as an option to a transient analysis to simulate the turn on of power supplies to a board level circuit To enable this option the compile time flag XSPICE_EXP has to be set e g by adding CFLAGS DXSPICE_EXP to the configure command line The supply ramping function linearly ramps the values of all independent sources and the capacitor and inductor code models code model extension with initial conditions toward their final value at a rate which you define A complete ngspice deck example of usage of the ramptime option is shown below 25 3 HOW TO CREATE CODE MODELS 379 Example Supply ramping option This circuit demonstrates the use of the option ramptime which ramps independent sources and the capacitor and inductor initial conditions from zero to their final value during the time period specified kk XA A A kk XA X tran 0 1 5 option ramptime 0 2 al 1 0 cap model cap capacitor c 1000uf ic 1 ri 10 1k a2 2 0 ind model ind inductor 1 1H ic 1 r2 20 1 0 vi 3 1 0 r3 3 0 1k il 4 0 1le 3 14 4 0 ik v2 5 0 0 0 siato 1 0 3 O 0 45 0 r5 5 0 1k o end 25 3 How to create code models The following instruction to create an additional code model uses the ngspice infrastructure and some int
381. gain 5 0 out_offset 0 01 12 2 2 Summer NAME_TABLE C_Function Name Spice Model Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type cm summer summer A summer block in input vector in v v vd i id yes no in_offset out output out V v vd i no no input offset vector real id in_gain input gain vector real 12 2 ANALOG MODELS Default Value Limits Vector Vector _Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed yes in yes out_gain output gain real 1 0 no yes 139 yes in yes out_offset output offset real 0 0 no yes Description This function is a summer block with 2 to N input ports Individual gains and offsets can be applied to each input and to the output Each input is added to its respective offset and then multiplied by its gain The results are then summed multiplied by the output gain and added to the output offset This model will operate in DC AC and Transient analysis modes Example usage a2 1 2 3 sumt model suml summer in_offset 0 1 out_gain 5 0 out_offset 0 01 12 2 3 Multiplier NAME_TABLE C_Function_Name Spice_Model_Name Description POR
382. ght or other proprietary rights to all soft ware and documentation provided under this agreement notwithstanding any copyright notice and shall not be liable for any infringement of copyright or proprietary rights brought by third parties against the recipient of the software and documentation provided under this agreement THE UNIVERSITY OF CALIFORNIA HEREBY DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE THE UNIVERSITY IS NOT LIABLE FOR ANY DAM AGES INCURRED BY THE RECIPIENT IN USE OF THE SOFTWARE AND DOCUMEN TATION INCLUDING DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUEN TIAL DAMAGES The University of California grants the recipient the right to modify copy and redistribute the software and documentation both within the recipient s organization and externally subject to the following restrictions a The recipient agrees not to charge for the University of California code itself The recipient may however charge for additions extensions or support b In any product based on the software the recipient agrees to acknowledge the research group that developed the software This acknowledgment shall appear in the product documentation c The recipient agrees to obey all U S Government restrictions governing redistribution or export of the software and documentation All BSD licenses have been changed to the modified BSD license by UCB in
383. gic state and a strength value 1 1 4 Mixed Level Simulation Ngspice can simulate numerical device models for diodes and transistors in two different ways either through the integrated DSIM simulator or interfacing to GSS TCAD system DSIM is an internal C based device simulator which is part of the CIDER simulator the mixed level simulator based on spice3f5 CIDER within ngspice provides circuit analyses compact models for semiconductor devices and one or two dimesional numerical device models 1 1 4 1 CIDER DSIM DSIM provides accurate one and two dimensional numerical device models based on the so lution of Poisson s equation and the electron and hole current continuity equations DSIM incorporates many of the same basic physical models found in the Stanford two dimensional device simulator PISCES Input to CIDER consists of a SPICE like description of the circuit and its compact models and PISCES like descriptions of the structures of numerically modeled devices As a result CIDER should seem familiar to designers already accustomed to these two tools CIDER is based on the mixed level circuit and device simulator CODECS and is a replacement for this program The basic algorithms of the two programs are the same Some of the differences between CIDER and CODECS are described below The CIDER input format has greater flexibility and allows increased access to physical model parameters New physical models have been added to allow s
384. glued to the numeric tokens see chapt 2 8 5 Brace expressions cannot be used to parametrize node names or parts of names All identifiers used within an lt expr gt must have known values at the time when the line is evaluated else an error is flagged 2 8 3 Subcircuit parameters General form subckt lt identn gt node node lt ident gt lt value gt lt ident gt lt value gt Examples subckt myfilter in out rval 100k cval 100nF lt identn gt is the name of the subcircuit given by the user node is an integer number or an identifier for one of the external nodes The first lt ident gt lt value gt introduces an optional section of the line Each lt ident gt is a formal parameter and each lt value gt is either a spice number or a brace expression Inside the subckt ends context each formal parameter may be used like any identifier that was defined on a param control line The lt value gt parts are supposed to be default values of the parameters However in the current version of they are not used and each invocation of the subcircuit must supply the _exact_ number of actual parameters The syntax of a subcircuit call invocation is General form X lt name gt node node lt identn gt lt ident gt lt value gt lt ident gt lt value gt Examples Xl input output myfilter rval 1k cval 1n Here lt name gt is the symbolic name given to that instance of the subcircuit lt
385. gn STRUCT_PTR to a pointer variable of defined type and then initialize the value of the structure 27 8 2 3 Function udn_XXX_compare Assign STRUCT_PTR_1 and STRUCT_PTR_2 to pointer variables of the defined type Com pare the two structures and assign either TRUE or FALSE to EQUAL 27 8 2 4 Function udn_XXX_ copy Assign INPUT_STRUCT_PTR and OUTPUT_STRUCT_PTR to pointer variables of the de fined type and then copy the elements of the input structure to the output structure 27 8 USER DEFINED NODE DEFINITION FILE 423 27 8 2 5 Function udn_XXX_ dismantle Assign STRUCT_PTR to a pointer variable of defined type and then free any allocated sub structures but not the structure itself If there are no substructures the body of this function may be left null 27 8 2 6 Function udn_XXX_ invert Assign STRUCT_PTR to a pointer variable of the defined type and then invert the logical value of the structure 27 8 2 7 Function udn XXX resolve Assign INPUT_STRUCT_PTR_ARRAY to a variable declared as an array of pointers of the defined type e g lt type gt struct_array struct_array INPUT_STRUCT_PTR_ARRAY Then the number of elements in the array may be determined from the integer valued IN PUT_STRUCT_PTR_ARRAY_ SIZE macro Assign OUTPUT_STRUCT_PTR to a pointer variable of the defined type Scan through the array of structures compute the resolved value and assign it into the output structure 27 8 2 8 Function udn_XXX
386. grom on MOS transistor matching 22 the AGAUSS parameters are calculated as ABeta W W AGAUSS W 1076 1 22 1 V2 W L m 100 Ge AVT delvto AGAUSS 0 107 1 222 Mar 022 The ALTER command is not available in ngspice However a new option in ngspice to the altermod command 17 5 4 enables the simulation of design corners The Alter section in inv cfg gives details Specific to ngspice again several control section are used ALTER control gate oxide thickness varied altermod nm pm file b3 min b3 typ b3 max endc control power supply variation alter vdd 2 0 2 1 2 2 endc control 362 CHAPTER 22 CIRCUIT OPTIMIZATION WITH NGSPICE run endc NMOS nm and PMOS pm model parameter sets are loaded from three different model files each containing both NMOS and PMOS sets b3 typ is assembled from the original parameter files n typ and p typ provided with original ASCO with some adaptation to ngspice BSIM3 The min and max sets are artificially created in that only the gate oxide thickness deviates 1 nm from what is found in model file b3 typ In addition the power supply voltage is varied so in total you will find 3 x 3 simulation combinations in the input file lt computer name gt sp after running asco test 22 5 3 Bandpass This example is taken from chapter 6 2 4 Tutorial 4 from the ASCO manual S11 in the passband is to be maximised S21 is used to extract side lobe
387. harge storage B X junction 238 p Out real Power dissipation 235 sens_dc Out real dc sensitivity 230 sens_real Out real real part of ac sensitivity 231 sens_imag Out real dc sens amp imag part of ac sens 232 sens_mag Out real sensitivity of ac magnitude 233 sens_ph Out real sensitivity of ac phase 234 sens_cplx Out complex ac sensitivity 7 temp InOut real instance temperature 8 dtemp InOut real instance temperature delta from circuit 30 4 2 2 BJT2 model parameters Name Direction Type Description 309 type Out string NPN or PNP 101 npn InOut flag NPN type device 102 pnp InOut flag PNP type device 147 subs InOut integer Vertical or Lateral device 103 is InOut real Saturation Current 146 iss InOut real Substrate Jct Saturation Current 104 bf InOut real Ideal forward beta 105 nf InOut real Forward emission coefficient 106 vaf InOut real Forward Early voltage 106 va InOut real 107 ikf InOut real Forward beta roll off corner current 107 ik InOut real 108 ise InOut real B E leakage saturation current 110 ne InOut real B E leakage emission coefficient 111 br InOut real Ideal reverse beta 112 nr InOut real Reverse emission coefficient 113 var InOut real Reverse Early voltage 113 vb InOut real 114 ikr InOut real reverse beta roll off corner current 115 isc InOut real B C leakage saturation current 117 nc InOut real B C leakage emission coefficie
388. he capacitor Non linear resistors capacitors and inductors may be synthesized with the nonlinear dependent source Nonlinear resistors capacitors and inductors are implemented with their linear counter parts by a change of variables implemented with the nonlinear dependent source The following subcircuit will implement a nonlinear capacitor Example Non linear capacitor Subckt nlcap pos neg x Bx calculate f input voltage Bx 1 O v f v pos neg Cx linear capacitance Cx 2 0 1 x Vx Ammeter to measure current into the capacitor Vx 2 1 DC OVolts Drive the current through Cx back into the circuit Fx pos neg Vx 1 ends Example for f v pos neg Bx 1 0 V v pos neg v pos neg Non linear resistors or inductors may be described in a similar manner An example for a nonlinear resistor using this template is shown below 88 CHAPTER 5 NON LINEAR DEPENDENT SOURCES BEHAVIORAL SOURCES Example Non linear resistor x use of hertz variable in nonlinear resistor param rbase 1k some tests Bl 10 V hertz v 33 B2 2 0 V v 33 hertz b3 3 0 V 6 283e3 hertz 6 283e3 v 33 V1 33 0 DC 0 AC 1 xxx Translate R1 10 O R 1k sqrt HERTZ to B source Subckt nlres pos neg rb rbase x Bx calculate f input voltage Bx 1 0 v l rb sqrt HERTZ x v pos neg x Rx linear resistance Rx 2 0 1 Example Non linear resistor continued x Vx Ammeter to measure current into the resistor
389. he algorithm to compute instance temperature is described below Algorithm 1 1 Instance temperature computation IF TEMP is specified THEN instance_temperature TEMP ELSE IF instance_temperature circuit_temperature DTEMP END IF 1 3 ANALYSIS AT DIFFERENT TEMPERATURES 4 Temperature dependent support is provided for all devices except voltage and current sources either independent and controlled and BSIM models BSIM MOSFETs have an alternate tem perature dependency scheme which adjusts all of the model parameters before input to ngspice For details of the BSIM temperature adjustment see 6 and 7 Temperature appears explicitly in the exponential terms of the BJT and diode model equations In addition saturation currents have a built in temperature dependence The temperature dependence of the saturation current in the BJT models is determined by XTI K i 15 Tp 7 G aam a1 where k is Boltzmann s constant q is the electronic charge E is the energy gap which is a model parameter and XTZ is the saturation current temperature exponent also a model param eter and usually equal to 3 The temperature dependence of forward and reverse beta is according to the formula B T B T ae 12 where T and 7 are in degrees Kelvin and XTB is a user supplied model parameter Tempera ture effects on beta are carried out by appropriate adjustment to the values of Br Isg Br and Isc spice model parameter
390. he dc transfer curve and the transient pulse response of a simple RTL inverter The input is a pulse from 0 to 5 Volts with delay rise and fall times of 2ns and a pulse width of 30ns The transient interval is 0 to 100ns with printing to be done every nanosecond 344 CHAPTER 20 EXAMPLE CIRCUITS Example SIMPLE RTL INVERTER Vcc 4 0 5 VIN 1 O PULSE O 5 2NS 2NS 2NS 30NS RB 1 2 10K QI 3 2 0 QI RC 3 4 1K MODEL Q1 NPN BF 20 RB 100 TF 1NS CJC 2PF DC VIN O 5 0 1 TRAN INS 100NS END 20 5 Four Bit Binary Adder Bipolar The following deck simulates a four bit binary adder using several subcircuits to describe vari ous pieces of the overall circuit Example ADDER 4 BIT ALL NAND GATE BINARY ADDER xxx SUBCIRCUIT DEFINITIONS _SUBCKT NAND 1 2 3 4 NODES INPUT 2 OUTPUT VCC QI 9 5 1 QMOD DICLAMP 0 1 DMOD Q2 9 5 2 QMOD D2CLAMP 0 2 DMOD RB 4 5 4K R1 4 6 1 6K Q3 6 9 8 QMOD R2 8 0 1K RC 4 7 130 Q4 7 6 10 QMOD DVBEDROP 10 3 DMOD Q5 3 8 0 QMOD ENDS NAND 20 5 FOUR BIT BINARY ADDER BIPOLAR 345 Continue 4 Bit adder SUBCKT ONEBIT 1 2 3 4 5 6 x NODES INPUT 2 CARRY IN OUTPUT CARRY OUT VCC X1 1 2 7 6 NAND X2 1 7 8 6 NAND X3 2 7 9 6 NAND X4 8 9 10 6 NAND X5 3 10 11 6 NAND X6 3 11 12 6 NAND X7 10 11 13 6 NAND X8 12 13 4 6 NAND X9 11 7 5 6 NAND ENDS ONEBIT SUBCKT TWOBIT 12 3 4567 8 9 x NODES INPUT BITO 2 BIT1 2 OUTPUT BITO BITI x CARRY IN CARRY OUT
391. her by plots and written out as such i e if the expression list contained three vectors from one plot and two from another then two plots are written one with three vectors and one with two Additionally if the scale for a vector isn t present it is automatically written out as well The default format is a compact binary but this can be changed to ASCII with the set file type ascii command The default file name is rawspice raw or the argument to the r flag on the command line if there was one and the default expression list is all If variable appendwrite is set the data may be added to an existing file 17 5 83 Wrs2p Write scattering parameters to file Touchstone format General Form wrs2p file Writes out the s parameters of a two port to file In the active plot the following is required vectors frequency S11 S12 S21 S22 all having the same length and having complex values as a result of an ac analysis and vector Rbase For details how to generate these data see chapt 17 9 The file format is Touchstone Version 1 ASCH frequency in Hz real and imaginary parts of Snn versus frequency 300 CHAPTER 17 INTERACTIVE INTERPRETER The default file name is s param s2p output example 12 port S parameter file Title test for scattering parameters Generated by ngspice at Sat Oct 16 13 51 18 2010 Hz S RI R 50 lfreq Res11 ImS11 Res21 ca 2 500000e 006 1 358762e 003 1 726349e 002 9 966563e 0
392. ho value let part part 1 end endc end 17 8 SCRIPTS 315 17 8 7 Parameter sweep While there is no direct command to sweep a device parameter during simulation you may use a script to emulate such behavior The example input file contains of an resistive divider with R1 and R2 where R1 is swept from a start to a stop value inside of the control section using the alter command see 17 5 3 Input file with parameter sweep parameter sweep x resistive divider Rl swept from start_r to stop_r VDD 1 0 DC 1 RI 1 R2 2 0 1k control let start_r 1k let stop_r 10k let delta_r 1k let r_act start_r x loop while r_act le stop_r alter rl r_act op print v 2 let r_act r_act delta_r end endc end 17 8 8 Output redirection The console outputs delivered by commands like print 17 5 43 echo 17 5 20 or others may be redirected into a text file print vec gt filename will generate a new file or overwrite an existing file named filename echo text gt gt filename will append the new data to the file filename Output redirection may be mixed with commands like wrdata 316 CHAPTER 17 INTERACTIVE INTERPRETER Input file with output redirection gt and gt gt MOSFET Gain Stage AC Benchmarking Implementation of BSIM4 0 0 by We xx output redirection into file M1 3 2 0 0 NI L lu W 4u Rsource 1 2 100k Rload 3 vdd 25k Vdd vdd O 1 8 Vin 1 O 1 2 ac 0 1 control ac dec
393. i d_buffer rise_delay 12 4 2 Inverter NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types input_load cm_d_inverter d_inverter 0 5e 9 fall_delay 0 3e 9 0 5e 12 digital one bit wide inverter in input in d a out output out d d 184 Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed no no rise_ delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value real 1 0e 12 F no yes CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE no no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The inverter is a single input single output digital inverter which produces as output an inverted time delayed copy of its input The delays associated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Exam
394. icative area factor W Real Multiplicative width factor Temp Real Element operating temperature IC File String Initial conditions filename Off Flag Device initially in OFF state gI Flag Conductance element G Q clJ Flag Capacitance element C F yIJ Flag Admittance element Y Q 29 18 3 EXAMPLES A one dimensional numerical bipolar transistor with an emitter stripe 4 times as wide as the default device is created using Q2 1 2 3 M_BJT AREA 4 This example saves the output conductance go transconductance gm and input conductance gp1 of the previous transistor in that order SAVE q2 gl1 q2 g12 q2 g22 The second example is for a two dimensional JFET with a width of 5pm and initial conditions obtained from file IC jfet QJ1 11 12 13 M_JFET W 5um IC FILE IC jfet MODEL M_JFET NBJT LEVEL 2 options jfet 470 CHAPTER 29 CIDER USER S MANUAL A final example shows how to use symmetry to simulate half of a 2D BJT avoiding having the user double the area of each instance Q2 NC2 NB2 NE2 BJTMOD AREA 1 Q3 NC3 NB3 NE3 BJTMOD AREA 1 MODEL BJTMOD NBJT LEVEL 2 options defw 2um Define half of the device now 29 18 4 SEE ALSO options output 29 18 5 BUGS MESFETs cannot be simulated properly yet because Schottky contacts have not been imple mented 29 19 NUMOS MOSFET four terminal numerical models and elements SYNOPSIS Model MODEL model name NUMOS level SYNOP
395. ice is conducting the program still obtains the correct solution assuming the solutions converge but more iterations are required since the program must independently converge to two separate solutions The NODESET control line see chapt 15 2 1 serves a similar purpose as the OFF option The NODESET option is easier to apply and is the preferred means to aid convergence The second form of initial conditions are specified for use with the transient analysis These are true initial conditions as opposed to the convergence aids above See the description of the IC control line chapt 15 2 2 and the TRAN control line chapt 15 3 9 for a detailed explanation of initial conditions 3 2 ELEMENTARY DEVICES 63 3 2 Elementary Devices 3 2 1 Resistors General form RXXXXXXX n n value lt ac val gt lt m val gt lt scale val gt lt temp val gt lt dtemp val gt lt noisy 0I1 gt Examples RI 1 2 100 RC1 12 17 1K R2 5 7 1K ac 2K RL 1 4 2K m 2 Ngspice has a fairly complex model for resistors It can simulate both discrete and semicon ductor resistors Semiconductor resistors in ngspice means resistors described by geometrical parameters So do not expect detailed modeling of semiconductor effects n and n are the two element nodes value is the resistance in ohms and may be positive or negative but not zero Simulating small valued resistors If you need to simulate very small resis tors 0 001 Ohm
396. ice_c exe console executable of ngspice into the directory and run asco test ngspice amp3 from the console window Several files will be created during checking If you look at lt computer name gt sp this is the input file for ngspice_c generated by ASCO You will find the additional measure commands and control sections The quit command will be added automatically just before the end command in its own control section asco test will display error mes sages on the console if the simulation or communication with ASCO is not o k The out put file lt computer name gt out generated by ngspice during each simulation contains symbols like zac_power0 zdc_gainl zunity_gain_frequency2 zphase_margin3 zphase_margin4 and zamp3_slew_rate5 These are used to communicate the ngspice output data to ASCO ASCO is searching for something like zdc_gain1 and then takes the next token as the input value Calling phase_margin twice in amp3 cfg has lead to two measurements in two control sections with different symbols zphase_margin3 zphase_margin4 A failing test may result in an error message from ASCO Sometimes however ASCO freezes after some output statements This may happen if ngspice issues an error message which cannot be handled by ASCO Here it may help calling ngspice directly with the input file generated by ASCO ngspice_c lt computer name gt sp Thus you may evaluate the ngspice messages directly R
397. ied first on code models Output ports follow the inputs 133 134 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Example al 1 2 amp model amp gain gain 5 0 In this example the numerical values picked up from single ended i e ground referenced input node 1 and output to single ended output node 2 will be voltages since in the Interface Specification File for this code model i e gain the default port type is specified as a voltage more on this later However if you didn t know this the following modifications to the instance card could be used to insure it Example al v 1 v 2 amp model amp gain gain 5 0 The specification v preceding the input and output node numbers of the instance card indi cate to the simulator that the inputs to the model should be single ended voltage values Other possibilities exist as described later Some of the other features of the instance and MODEL cards are worth noting Of particular interest is the portion of the MODEL card which specifies gain 5 0 This portion of the card assigns a value to a parameter of the gain model There are other parameters which can be assigned values for this model and in general code models will have several In addition to numeric values code model parameters can take non numeric values such as TRUE and FALSE and even vector values All of these topics will be discussed at length in the following pages In general however
398. ifference between v 1 reaching OV its third falling slope versus v 2 reach ing O V on its third falling slope Measure statement measure tran tdiff TRIG v 1 VAL 0 6 CROSS 1 TARG v 2 VAL 0 8 CROSS 1 measures the time difference between v 1 crossing 0 6 V for the first time any slope versus v 2 crossing 0 8 V for the first time any slope Measure statement measure tran tdiff TRIG AT 1m TARG v 2 VAL 0 8 CROSS 3 measures the time difference between the time point 1ms versus the time when v 2 crosses 0 8 V for the third time any slope 15 4 6 Find When The FIND and WHEN functions allow to measure any dependent or independent time fre quency or dc parameter when two signals cross each other or a signal crosses a given value Measurements start after a delay TD and may be restricted to a range between FROM and TO 15 4 MEASUREMENTS AFTER OP AC AND TRANSIENT ANALYSIS 239 General form 2 MEASURE DCIACITRANISP result WHEN out_variable val lt TD td gt lt FROM val gt lt TO val gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt Measure statement measure tran teval WHEN v 2 0 7 CROSS LAST measures the time point when v 2 crosses 0 7 V for the last time any slope General form 3 MEASURE DCIACITRANISP result WHEN out_variable out_variable2 lt TD td gt lt FROM val gt lt TO val gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FAL
399. iled descriptions will not be given here Please refer to the excellent pdf manual issued by University of California at Berkeley 30 5 9 BSIM4 Detailed descriptions will not be given here Please refer to the excellent pdf manual issued by University of California at Berkeley 528 CHAPTER 30 MODEL AND DEVICE PARAMETERS Chapter 31 Compilation notes This file describes the procedures to install ngspice from sources 31 1 Ngspice Installation under LINUX and other UNIXes 31 1 1 Prerequisites Ngspice is written in C and thus a complete C compilation environment is needed Almost any UNIX comes with a complete C development environment Ngspice is developed on GNU Linux with gcc and GNU make The following software must be installed in your system to compile ngspice bison flex and X11 headers and libs The X11 headers and libraries are typically available in an X11 development package from your LINUX distribution If you want to compile the CVS source you need additional software autoconf automake libtool texinfo The following software may be needed when enabling additional features editline tcl tk blt 31 1 2 Install from CVS This section describes how to install from source code taken direct from CVS This will give you access to the most recent enhancements and corrections However be careful as the code in CVS may be unstable For user install instructions using source from released distributions plea
400. imulation of state of the art devices These include trans verse field mobility degradation important in scaled down MOSFETs and a polysilicon model for poly emitter bipolar transistors Temperature dependence has been included over the range from 50C to 150C The numerical models can be used to simulate all the basic types of semi conductor devices resistors MOS capacitors diodes BJTs JFETs and MOSFETs BJTs and JFETs can be modeled with or without a substrate contact Support has been added for the management of device internal states Post processing of device states can be performed using the ngnutmeg user interface 1 1 4 2 GSS TCAD GSS is a TCAD software which enables two dimensional numerical simulation of semiconduc tor device with well known drift diffusion and hydrodynamic method GSS has Basic DDM 1 2 SUPPORTED ANALYSES 37 drift diffusion method solver Lattice Temperature Corrected DDM solver EBM energy bal ance method solver and Quantum corrected DDM solver which based on density gradient the ory The GSS program is directed via input statements by a user specified disk file Supports triangle mesh generation and adaptive mesh refinement Employs PMI physical model inter face to support various materials including compound semiconductor materials such as SiGe and AlGaAs Supports DC sweep transient and AC sweep calculations The device can be stimulated by voltage or current source s GSS is no longer updated b
401. indows expand the zip file to a directory of your choice add the path lt any directory gt gnuplot bin to the PATH variable and go The command to invoke Gnuplot 17 5 25 is limited however to x y plots no polar etc 18 8 Integration with CAD software and third party GUIs In this chapter you will find some links and comments on GUIs for ngspice offered from other projects and on the integration of ngspice into a circuit development flow The data given rely mostly on information available from the web and thus is out of our control It also may be far from complete The GUIs KJWaves and GNUSpiceGUI help you to navigate the commands to need to perform your simulation XCircuit and the GEDA tools gschem and gnetlist offer integrating schematic capture and simulation 18 8 1 KJWaves KJWaves was written to be a cross platform SPICE tool in pure Java It aids in viewing mod ifying and simulating SPICE CIRCUIT files Output from SPICE3 ngspice can be read and displayed Resulting graphs may be printed and saved The Java executable will run under LINUX and Windows and maybe other OSs The development site is available at http sourceforge net projects kjwaves You may find the project home page at http www comefly us 18 8 2 GNU Spice GUI Another GUI to be found at http sourceforge net projects gspiceui 18 8 3 XCircuit CYGWIN and especially LINUX users may find XCircuit valuable to establish a development flow incl
402. ing block to create a wide variety of inductive and magnetic circuit models This function is normally used in conjunction with the core model but can also be used with resistors hysteresis blocks etc to build up systems which mock the behavior of linear and nonlinear components The lcouple takes as an input on the T port a current This current value is multiplied by the num_turns value N to produce an output value a voltage value which appears on the mmf_out port The mmf_out acts similar to a magnetomotive force in a magnetic circuit when the Icouple is connected to the core model or to some other resistive device a current will flow This current value which is modulated by whatever the Icouple is connected to is then used by the lcouple to calculate a voltage seen at the I port The voltage is a function of the derivative with respect to time of the current value seen at mmf_out The most common use for lcouples will be as a building block in the construction of transformer models To create a transformer with a single input and a single output you would require two lcouple models plus one core model The process of building up such a transformer is described under the description of the core model below Example SPICE Usage a150 7 0 9 10 lcouplet model lcouple1 lcouple num_turns 10 0 12 2 ANALOG MODELS 12 2 19 Magnetic Core NAME_TABLE C_Function_Name Spice _Model_Name
403. ing of states values in the states gt state array This is usually caused by non contiguous state definitions in the state in file This error is caused by the different state definitions in the input file being non contiguous In general it will refer to the different states not being defined uniquely or being broken up in some fashion within the state in file 436 CHAPTER 28 ERROR MESSAGES 28 3 7 Code Model oneshot oneshot_allocation_error KKKK Error x ONESHOT Error allocating oneshot block storage Generic storage allocation error oneshot_array_error KKKK Error x xkx ONESHOT Size of control array different than pulse width array This error indicates that the control array and pulse width arrays are of different sizes oneshot_pw_clamp 2 2k KK Warning 2k KK ONESHOT Extrapolated Pulse Width Limited to zero This error indicates that for the current control input a pulse width of less than zero is indicated The model will consequently limit the pulse width to zero until the control input returns to a more reasonable value 28 3 8 Code Model pwl allocation_error kKERROR PWL Allocation calloc failed Generic storage allocation error limit_error ERROR PWL Violation of 50 rule in breakpoints This error message indicates that the pwl model has an absolute value for its input domain and that the x_array coordinates are so close together that the required smoothing regions would
404. ingle line will produce more aesthetically pleasing output 29 15 2 EXAMPLES Set the title for a minimum gate length NMOSFET in a 1 0um BiCMOS proces title L 1 0um NMOS Device 1 0um BiCMOS Process 29 15 3 BUGS The title is currently treated like a comment 29 16 X MESH Y MESH Define locations of lines and nodes in a mesh SYNOPSIS x mesh position numbering method spacing parameters y mesh position numbering method spacing parameters 464 CHAPTER 29 CIDER USER S MANUAL 29 16 1 DESCRIPTION The domains of a device are discretized onto a rectangular finite difference mesh using x mesh cards for 1D devices or x mesh and y mesh cards for 2D devices Both uniform and non uniform meshes can be specified A typical mesh for a 2D device is shown in Figure 29 3 Reference Lines Location 0 0 Automatic Lines Location 0 5 Width 1 0 Interval Location 15 Uniform Spacing Nonuniform Spacing Figure 29 3 Typical mesh for 2D devices The mesh is divided into intervals by the reference lines The other lines in each interval are automatically generated by CIDER using the mesh spacing parameters In general each new mesh card adds one reference line and multiple automatic lines to the mesh Conceptually a 1D mesh is similar to a 2D mesh except that there are no reference or automatic lines needed in the second dimension The location of a reference line in the mesh must either be given explicitly u
405. inition File this name must agree with that of the function i e ucm_xfer or an error will result in the linking step 27 6 1 2 SPICE Model Name The SPICE model name is a valid SPICE identifier that will be used on SPICE MODEL cards to refer to this code model It may or may not be the same as the C function name It is introduced by the Spice_Model_Name keyword followed by a valid SPICE identifier Description The description string is used to describe the purpose and function of the code model It is introduced by the Description keyword followed by a C string literal 27 6 2 The Port Table The port table is introduced by the Port_Table keyword It defines the set of valid ports available to the code model The following sections define the valid fields that may be specified in the port table 27 6 2 1 Port Name The port name is a valid SPICE identifier It is introduced by the Port_Name keyword followed by the name of the port Note that this port name will be used to obtain and return input and output values within the model function This will be discussed in more detail in the next section 27 6 2 2 Description The description string is used to describe the purpose and function of the code model It is introduced by the Description keyword followed by a C string literal 400 CHAPTER 27 CODE MODELS AND USER DEFINED NODES Default Types Type De
406. ins with background material on simulation and modeling and then discusses the analysis modes supported in XSPICE and the circuit description syntax used for modeling Detailed descriptions of the predefined Code Models and Node Types provided in the XSPICE libraries are also included 25 1 Simulation and Modeling Overview This section introduces the concepts of circuit simulation and modeling It is intended primarily for users who have little or no previous experience with circuit simulators and also for those who have not used circuit simulators recently However experienced SPICE users may wish to scan the material presented here since it provides background for new Code Model and User Defined Node capabilities of the XSPICE option 25 1 1 Describing the Circuit This section provides an overview of the circuit description syntax expected by the XSPICE simulator A general understanding of circuit description syntax will be helpful to you should you encounter problems with your circuit and need to examine the simulator s error messages or should you wish to develop your own models This section will introduce you to the creation of circuit description input files using the Nutmeg user interface Note that this material is presented in an overview form Details of circuit description syntax are given later in this chapter and in the previous chapters of this manual 25 1 1 1 Example Circuit Description Input Although different SPICE ba
407. int plot Standard is ox abcdefhgijklmnpqrstuvwyz Characters are not allowed 306 CHAPTER 17 INTERACTIVE INTERPRETER polydegree The degree of the polynomial that the plot command should fit to the data If polydegree is N then nutmeg fits a degree N polynomial to every set of N points and draw 10 intermediate points in between each end point If the points aren t monotonic then it tries rotating the curve and reducing the degree until a fit is achieved polysteps The number of points to interpolate between every pair of points available when doing curve fitting The default is 10 program The name of the current program argv 0 prompt The prompt with the character replaced by the current event number Single quotes are required around the string entered rawfile The default name for rawfiles created remote_shell Overrides the name used for generating rspice runs default is rsh renumber Renumber input lines when an input file has includes rndseed Seed value for random number generator used by sgauss sunif and rnd functions If not set the process Id is used as seed value rhost The machine to use for remote ngspice runs instead of the default one see the descrip tion of the rspice command below rprogram The name of the remote program to use in the rspice command sourcepath A list of the directories to search when a source command is given The default is the current directory and the standa
408. ion OpenMP support is available for levels 10 58 version 4 3 1 132 CHAPTER 11 MOSFETS 11 2 13 SOI3 model level 60 see literature citation 18 for a description 11 2 14 HiSIM models of the University of Hiroshima There are two model implementations available see also HiSIM Research Center 1 HiSIM2 model Surface Potential Based MOSFET Model for Circuit Simulation version 2 5 1 level 61 see link to HiSIM2 for source code and manual 2 HiSIM_HV model Surface Potential Based HV LD MOSFET Model for Circuit Simu lation version 1 2 2 level 62 see link to HiSIM_HV for source code and manual Chapter 12 Mixed Mode and Behavioral Modeling with XSPICE Ngspice implements XSPICE extensions for behavioral and mixed mode analog and digital modeling In the XSPICE framework this is referred to as code level modeling Behavioral modelling may benefit dramatically because XSPICE offers a means to add analog function ality programmed in C Many examples amplifiers oscillators filters are presented in the following Even more flexibility is available because you may define your own models and use them in addition and in combination with all the already existing ngspice functionality Mixed mode simulation is speeded up significantly by simulating the digital part in an event driven manner in that state equations use only a few allowed states and are evaluated only during switching and not continuously in time and signal
409. ion The inductance meter is a sensing device which is attached to a circuit node and produces as an output a scaled value equal to the total inductance seen on its input multiplied by the gain parameter This model is primarily intended as a building block for other models which must sense an inductance value and alter their behavior based upon it Example SPICE Usage atest2 1 2 ltest model ltest lmeter gain 1 0e6 12 3 Hybrid Models The following hybrid models are supplied with XSPICE The descriptions included below con sist of the model Interface Specification File and a description of the model s operation This 176 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE is followed by an example of a simulator deck placement of the model including the MODEL card and the specification of all available parameters A note should be made with respect to the use of hybrid models for other than simple digital to analog and analog to digital translations The hybrid models represented in this section address that specific need but in the development of user defined nodes you may find a need to translate not only between digital and analog nodes but also between real and digital real and int etc In most cases such translations will not need to be as involved or as detailed as shown in the following 12 3 1 Digital to Analog Node Bridge NAME_TABLE C_Function_Name cm_dac_bridge Spice_Model_Name dac_bridge Description
410. ion Transistors BJTs General form QXXXXXXX nc nb ne lt ns gt mname lt area val gt lt areac val gt lt areab val gt lt m val gt lt off gt lt ic vbe vce gt lt temp val gt lt dtemp val gt Examples Q23 10 24 13 QMOD IC 0 6 5 0 Q50A 11 26 4 20 MODI nc nb and ne are the collector base and emitter nodes respectively ns is the optional substrate node If unspecified ground is used mname is the model name area areab areac are the area factors emitter base and collector respectively and off indicates an optional initial condition on the device for the dc analysis If the area factor is omitted a value of 1 0 is assumed The optional initial condition specification using ic vbe vce is intended for use with the uic option on a tran control line when a transient analysis is desired starting from other than the quiescent operating point See the ic control line description for a better way to set transient initial conditions The optional temp value is the temperature at which this device is to operate and overrides the temperature specification on the option control line Using dtemp option you can specify instance s temperature relative to the circuit temperature 8 2 BJT Models NPN PNP Ngspice provides three BJT device models The level keyword specifies the model to be used e level 1 This is the original spice BJT model and it is the default model if the level keyword is not specified
411. ion data The mean oscillator frequency and its deviation are printed in the curve fitting log in the Gnuplot window 356 CHAPTER 21 STATISTICAL CIRCUIT ANALYSIS Gnuplot script for data evaluation This file pl v4mag p ngspice file OpWien sp ngspice command gnuplot pl4mag v4mag xlimit 500 1500 a gnuplot manual http www duke edu hpgavin gnuplot html H H H Gauss function to be fitted f1 x c1 al rsqrt 2x3 14159 exp x b1 x 2 2 ra1 x x2 Gauss function to plot start graph 2 x c2 a2 sqrt 2x3 14159 exp x b2 x 2 2 ra2 x x2 start values al 50 b1 900 c1 50 keep start values in a2 b2 c2 a2 al b2 b1 c2 c1 curve fitting fit f1 x pl4mag data using 1 2 via al bi cl plot original and fitted curves with new al b1 cl plot pl4mag data using 1 2 with lines f1 x f2 x opwien cir opamp wien bridge oscillator pl4mag data using 1 2 f x 12 x 600 800 1000 1200 1400 403 174 0 861680 pl4mag data is the simulation data f2 x the starting curve f1 x the fitted Gaussian distribution This is just a simple example You might explore the powerful built in functions of Gnuplot to do a much more sophisticated statistical data analysis Chapter 22 Circuit optimization with ngspice 22 1 Optimization of a circuit Your circuit design analog maybe mixed signal has already the best circuit topology There might be still
412. ion or options lines are set by the user internal default values are given for each of the simula tor variables You may set options in the init files spinit or spiceinit via the option command see chapt 17 5 41 The values given here will supersede the default values If you set options via the options line in your input file their values will supersede the default and init file data Finally if you set options inside a control endc section these values will supersede any values of the respective simulator variables given so far 15 2 Initial Conditions 15 2 1 NODESET Specify Initial Node Voltage Guesses General form NODESET V NODNUM VAL V NODNUM VAL Examples NODESET V 12 4 5 V 4 2 23 The nodeset line helps the program find the dc or initial transient solution by making a pre liminary pass with the specified nodes held to the given voltages The restriction is then released and the iteration continues to the true solution The nodeset line may be necessary for con vergence on bistable or a stable circuits In general this line should not be necessary 15 2 2 IC Set Initial Conditions General form ic v nodnum val v nodnum val Examples 1c v 11 5 v 4 5 v 2 2 2 The ic line is for setting transient initial conditions It has two different interpretations de pending on whether the uic parameter is specified on the tran control line Also one should not confuse this line with the node
413. ions follows Smoothing Functions void cm_smooth_corner void cm_smooth_discontinuity double cm_smooth_pwl Model State Storage Functions void cm_analog_alloc void cm_event_alloc void cm_analog get_ptr void cm_event_get_ptr Integration and Convergence Functions int cm_analog integrate int cm_analog converge void cm_analog not_converged void cm_analog auto_partial double cm_analog ramp factor Message Handling Functions char cm_message_get_errmsg void cm_message_send Breakpoint Handling Functions int cm_analog set_temp_bkpt int cm_analog set_perm_bkpt int cm_event_queue Special Purpose Functions void cm_climit_fcn double cm_netlist_get_c double cm_netlist_get_l Complex Math Functions complex_t cm_complex_set complex_t cm_complex_add complex_t cm_complex_sub complex_t cm_complex_mult complex_t cm_complex_div 27 7 2 2 Smoothing Functions void cm_smooth_corner x_input x_center y_center domain lower_slope upper_slope y_output dy_dx double x_input The value of the x input 414 CHAPTER 27 CODE MODELS AND USER DEFINED NODES double x_center The x intercept of the two slopes double y_center The y intercept of the two slopes double domain The smoothing domain double lower_slope The lower slope double upper_slope The upper slope double y_output The smoothed y output double dy_dx The partial of y wrt x void cm_smooth_discontinuity x_input x_lower y_lowe
414. ipting are listed in the following table 21 5 MONTE CARLO SIMULATION 353 Name Function rnd vector A vector with each component a random integer between 0 and the absolute value of the input vector s corresponding integer element value sgauss vector Returns a vector of random numbers drawn from a Gaussian distribution real value mean 0 standard deviation 1 The length of the vector returned is determined by the input vector The contents of the input vector will not be used A call to sgauss 0 will return a single value of a random number as a vector of length 1 sunif vector Returns a vector of random real numbers uniformly distributed in the interval 1 1 The length of the vector returned is determined by the input vector The contents of the input vector will not be used A call to sunif O will return a single value of a random number as a vector of length 1 poisson vector Returns a vector with its elements being integers drawn from a Poisson distribution The elements of the input vector real numbers are the expected numbers i Complex vectors are allowed real and imaginary values are treated separately exponential vector Returns a vector with its elements real numbers drawn from an exponential distribution The elements of the input vector are the respective mean values real numbers Complex vectors are allowed real and imaginary values are treated separately 21 5
415. iption macro A macro in the context of this document refers to a C language macro which sup ports the construction of user defined models by simplifying input output and parameter passing operations within the Model Definition File mod Refers to the Model Definition File in XSPICE The file suffix reflects the file name of the model definition file cfunc mod model Refers to a model card associated with an element card in ngspice A model card allows for data defining an instance to be conveniently located in the ngspice deck such that the general layout of the elements is more readable Nutmeg The ngspice default post processor This provides a simple stand alone simulator interface which can be used with the ngspice simulator to display and plot simulator raw files 363 364 CHAPTER 23 NOTES subcircuit A device within an ngspice deck which is defined in terms of a group of element cards and which can be referenced in other parts of the ngspice deck through element cards 23 2 Acronyms and Abbreviations ATE Automatic Test Equipment CAE Computer Aided Engineering CCCS Current Controlled Current Source CCVS Current Controlled Voltage Source FET Field Effect Transistor IDD Interface Design Document IFS Refers to the Interface Specification File The abbreviation reflects the file name of the Interface Specification File ifspec ifs MNA Modified Nodal Analysis MOSFET Metal Oxide Semiconductor Field Effect Tran
416. ique in the list of a card s parameters Numeric parameter values are treated identically as in SPICE3 so exponential notation engineering scale factors and units can be attached to parameter values tau 10ns nc 3 0e19cm 3 In SPICE3 the value of a FLAG model parameter is changed to TRUE simply by listing its name on the model line In CIDER the value of a numerical model FLAG parameter can be turned back to FALSE by preceding it by a caret This minimizes the amount of input change needed when features such as debugging are turned on and off In certain cases it is necessary to include file names in the input description and these names may contain capital letters If the file name is part of an element line the inout parser will convert these capitals to lowercase 669999 letters To protect capitalization at any time simply enclose the string in double quotes The remainder of this manual describes how numerically analyzed elements and models can be used in CIDER simulations The manual consists of three parts First all of the model cards and their parameters are described This is followed by a section describing the three basic types of numerical models and their corresponding element lines In the final section several complete examples of CIDER simulations are presented Several conventions are used in the card descriptions In the card synopses the name of a card is followed by a list of parameter classes Each
417. is two tools give tclspice all of its relevance with the insurance that the functionality is maintained by competent people Making tclspice see 19 6 produces two files libspice so and pkgIndex tcl libspice so is the executable binary that the TCL interpreter calls to handle spice commands pkgIndex tcl take place in the TCL directory tree providing the spice package to the TCL user BLT is a TCL package It is quite well documented It permits to handle mathematical vector data structure for calculus and display in a Tk interpreter like wish 19 2 tclspice documentation A detailed documentation on tclspice commands is available on the original tclspice web page 19 3 spicetoblt Tclspice opens its doors to TCL and BLT with a single specific command spicetoblt package has to be understood as the TCL package 327 328 CHAPTER 19 TCLSPICE TCLspice gets its identity in the command spice vectoblt This command copies data computed by the simulation engine into a tcl variable vectoblt is composed of three words vec to and blt Vec means spice vector data To is the English preposition and blt is a useful tcl package providing a vector data structure Example blt vector create lex Spice vectoblt Vex branch lex Here an empty blt vector is created It is then filled with the vector representation of the current flowing out of source Vex Vex branch is native spices syntax lex is the name of the BLT vector The re
418. istance to be calcu lated from geometric information and to be corrected for temperature The parameters available are Name Parameter Units Default Example TC1 first order temperature coeff 2Q C 0 0 TC2 second order temperature coeff Qoc 0 0 RSH sheet resistance Q 50 DEFW default width m le 6 2e 6 NARROW narrowing due to side etching m 0 0 le 7 SHORT shortening due to side etching m 0 0 le 7 TNOM parameter measurement temperature C 27 50 KF flicker noise coefficient 0 0 le 25 AF flicker noise exponent 0 0 1 0 The sheet resistance is used with the narrowing parameter and 1 and w from the resistor device to determine the nominal resistance by the formula l SHORT nom 2 Rnom rsh NARROW pa 3 2 ELEMENTARY DEVICES 65 DEFW is used to supply a default value for w if one is not specified for the device If either rsh or 1 is not specified then the standard default resistance value of 1 kOhm is used TNOM is used to override the circuit wide value given on the options control line where the parameters of this model have been measured at a different temperature After the nominal resistance is calculated it is adjusted for temperature by the formula R T R TNOM 1 TC T TNOM T7O T TNOM 3 3 where R TNOM Rnom Racnom In the above formula T represents the instance tempera ture which can be explicitly set using
419. its in short channel region and makes up for a missing link between a complicated MOSFET current characteristics and circuit behaviors in the deep submicron region 11 2 5 Notes on Level 1 6 models The dc characteristics of the level 1 through level 3 MOSFETs are defined by the device param eters vto kp lambda phi and gamma These parameters are computed by ngspice if process parameters nsub tox are given but users specified values always override vto is pos itive negative for enhancement mode and negative positive for depletion mode N channel P channel devices Charge storage is modeled by three constant capacitors cgso cgdo and cgbo which represent overlap capacitances by the nonlinear thin oxide capacitance which is distributed among the gate source drain and bulk regions and by the nonlinear depletion layer capacitances for both substrate junctions divided into bottom and periphery which vary as the mj and mjsw power of junction voltage respectively and are determined by the parameters cbd cbs cj cjsw mj mjsw and pb Charge storage effects are modeled by the piecewise linear voltages dependent capacitance model proposed by Meyer The thin oxide charge storage effects are treated slightly differ ent for the level 1 model These voltage dependent capacitances are included only if tox is specified in the input description and they are represented using Meyer s formulation There is some overlap among the par
420. ized small signal models for all of the nonlinear devices in the circuit The resultant linear circuit is then analyzed over a user specified range of frequencies The desired output of an ac small signal analysis is usually a transfer function voltage gain transimpedance etc If the circuit has only one ac input it is convenient to set that input to unity and zero phase so that output variables have the same value as the transfer function of the output variable with respect to the input 1 2 3 Transient Analysis Transient analysis is an extension of DC analysis to the time domain A transient analysis be gins by obtaining a DC solution to provide a point of departure for simulating time varying behavior Once the DC solution is obtained the time dependent aspects of the system are rein troduced and the two simulator algorithms incrementally solve for the time varying behavior of the entire system Inconsistencies in node values are resolved by the two simulation algorithms such that the time dependent waveforms created by the analysis are consistent across the entire simulated time interval Resulting time varying descriptions of node behavior for the specified time interval are accessible to you All sources which are not time dependent for example power supplies are set to their dc value The transient time interval is specified on a TRAN control line 1 2 4 Pole Zero Analysis The pole zero analysis portion of Ngspice computes
421. l Gate Source capacitance 236 cgd Out real Gate Drain capacitance 239 cgb Out real Gate Bulk capacitance 223 cbd Out real Bulk Drain capacitance 224 cbs Out real Bulk Source capacitance 225 cbd0 Out real Zero Bias B D junction capacitance 226 cbdsw0 Out real 227 cbsO Out real Zero Bias B S junction capacitance 228 cbsswO Out real 235 cqgs Out real Capacitance due to gate source charge storage 238 cqgd Out real Capacitance due to gate drain charge storage 241 cqgb Out real Capacitance due to gate bulk charge storage 243 cqbd Out real Capacitance due to bulk drain charge storage 245 cqbs Out real Capacitance due to bulk source charge storage 234 qgs Out real Gate Source charge storage 237 qgd Out real Gate Drain charge storage 240 qgb Out real Gate Bulk charge storage 242 qbd Out real Bulk Drain charge storage 244 qbs Out real Bulk Source charge storage 19 p Out real Instaneous power 256 sens_1_de Out real dc sensitivity wrt length 246 sens_l real Out real real part of ac sensitivity wrt length 247 sens_l_imag Out real imag part of ac sensitivity wrt length 248 sens_l_mag Out real sensitivity wrt l of ac magnitude 249 sens_l_ph Out real sensitivity wrt l of ac phase 250 sens_1_cplx Out complex ac sensitivity wrt length 257 sens_w_dc Out real dc sensitivity wrt width 251 sens_w_real Out real real part of ac sensitivity wrt width 252 sens_w_imag Out real imag part of ac sensitivity wrt width 25
422. l Poon model are listed below The parameter names used in earlier versions of spice2 are still accepted Gummel Poon BJT Parameters incl model extensions Name Parameters Units Default Example Scale factor SUBS Substrate connection for vertical 1 geometry 1 for lateral geometry level 2 only IS Transport saturation current A 1 0e 16 1 0e 15 area 8 2 BJT MODELS NPN PNP 111 Hz ISS Reverse saturation current A 1 0e 16 1 0e 15 area substrate to collector for vertical device or substrate to base for lateral level 2 only BF Ideal maximum forward beta 100 100 NF Forward current emission 1 0 1 coefficient VAF VA Forward Early voltage V 00 200 IKF Corner for forward beta current A 00 0 01 area roll off NKF High current Beta rolloff exponent 0 5 0 58 ISE B E leakage saturation current A 0 0 le 13 area NE B E leakage emission coefficient 1 5 2 BR Ideal maximum reverse beta 1 0 1 NR Reverse current emission 1 1 coefficient VAR VB Reverse Early voltage V 00 200 IKR Corner for reverse beta high A oo 0 01 area current roll off ISC B C leakage saturation current A 0 0 le 13 area area is areab for vertical devices and areac for lateral NC B C leakage emission coefficient 2 1 5 RB Zero bias base resistance Q 0 100 area IRB Current where base resistance
423. l one belonging to C is visible A word of caution Nespice allows to define circuits with nested subcircuits Currently it is not possible however to issue param statements inside of a subckt ends section when there are additional nested subckt ends in the same section This is a bug which will be removed asap 2 8 5 Syntax of expressions lt expr gt optional parts within An expression may be one of lt atom gt where lt atom gt is either a spice number or an identifier lt unary operator gt lt atom gt lt function name gt lt expr gt lt expr gt lt atom gt lt binary operator gt lt expr gt lt expr gt As expected atoms built in function calls and stuff within parentheses are evaluated before the other operators The operators are evaluated following a list of precedence close to the one of the C language For equal precedence binary ops evaluation goes left to right 2 8 PARAM PARAMETRIC NETLISTS Operator Alias Precedence Precedence 1 unary not 1 unary not kE A 2 power ig 3 multiply 3 divide mod 3 modulo div 3 integer divide 4 add 4 subtract 5 equality lt gt 5 un equal lt 5 less or equal gt 5 greater or equal lt 5 less than gt 5 greater than and amp amp 6 and or II 7 or The result of logical operators is 1 or 0 for True or Fa
424. lation by VGD None ov HFE2 HFGAM modulation by VGS None 0 V 1 HFGAM High frequency VGD feedback parameter None 0 HFG1 HFGAM modulation by VSG None 0 V 1 HFG2 HFGAM modulation by VDG None 0 V 1 IBD Gate junction breakdown current Current OA IS Gate junction saturation current Current 10 14A LFGAM Low frequency feedback parameter None 0 LFG1 LFGAM modulation by VSG None 0 V 1 LFG2 LFGAM modulation by VDG None 0 V 1 MVST Subthreshold modulation None 0 V 1 N Gate junction ideality factor None 1 P Linear region power law exponent None 2 Q Saturated region power law exponent None 2 RS Source ohmic resistance Resistance 0 Ohm RD Drain ohmic resistance Resistance 0 Ohm TAUD Relaxation time for thermal reduction Time Os TAUG Relaxation time for gamma feedback Time Os VBD Gate junction breakdown potential Voltage 1V VBI Gate junction potential Voltage 1V VST Subthreshold potential Voltage OV VTO Threshold voltage Voltage 2 0 V XC Capacitance pinch off reduction factor None 0 XI Saturation knee potential factor None 1000 Z Knee transition parameter None 0 5 RG Gate ohmic resistance Resistance 0 Ohm LG Gate inductance Inductance OH LS Source inductance Inductance OH LD Drain inductance Inductance OH CDSS Fixed Drain source capacitance Capacitance OF AFAC Gate width scale factor None 1 NFING Number of gate fingers scale factor None 1 TNOM Nominal Temperature Not implemented Temperature 300 K TEMP Temperature Temperature 300K 1
425. le for the pwl function using all of these options is shown below 90 CHAPTER 5 NON LINEAR DEPENDENT SOURCES BEHAVIORAL SOURCES Example pwl function in B source Demonstrates usage of the pwl function in an B source ASRC x Also emulates the TABLE function with limits param x0 4 y0 0 param xl 2 yl 2 param x2 2 y2 2 param x3 4 y3 1 param xx0 x0 1 param xx3 x3 1 Vin 10 DC 0V R10 2 no limits outside of the tabulated x values continues linearily Btest2 2 0 I pwl v 1 7x0 4 yO Ox ALS x2 y2 x3 y3 x like TABLE function with limits Btest3 3 0 I v 1 lt x0 y0 v 1 lt x3 pwl v 1 PROA YA FAA AL x2 y2 x3 y3 NS x more efficient and elegant TABLE function with limits x voltage controlled Btest4 4 0 I pwl v 1 EROS NOS ROA y0 o ate 12 5 V2 TO WSO HERS YO x x more efficient and elegant TABLE function with limits x controlled by current Btest5 5 0 I pwl 2 i Vin xx0 y0 7 xO yO ASAS PO N2 ANO A YO Rint2 2 0 1 Rint3 3 0 1 Rint4 4 0 1 RintS 5 0 1 control dc Vin 66 0 2 plot v 2 v 3 v 4 0 5 v 5 0 5 endc end 5 2 E SOURCE NON LINEAR VOLTAGE SOURCE 91 5 2 E source non linear voltage source 5 2 1 VOL General form EXXXXXXX n n vol expr Examples E41 4 0 vol V 3 V 3 Offs Expression may be an equation or an expression
426. le from here An example is given as number 13 on page 15 of that specification 17 9 SCATTERING PARAMETERS S PARAMETERS 317 17 9 2 S parameter measurement basics S parameters allow a two port description not just by permutating J1 U1 h U2 but using a superposition leading to a power view of the port We only look at two ports here because multi ports are not yet implemented You may start with the effective power being negative or positive P u i 17 1 The value of P may be the difference of two real numbers with K being another real number ui P a b a b a b a b KK a b K a b K a b 17 2 Thus you get KTlu a b 17 3 Ki a b 17 4 and finally u Ki 17 5 a gt K 17 5 u K i b 17 6 IK 17 6 By introducing the reference resistance Zo K gt 0 we get finally the Heaviside transformation u Zoi u Zoi 17 7 ma A a In case of our two port we subject our variables to a Heaviside transformation Ui Zoh Ui Zol EE 17 8 ay NA 1 NA 17 8 U2 Zoh U2 Zoh 2 pS E 17 9 a2 2 Zo 2 Z 17 9 The s matrix for a two port then is bi S11 512 a 17 10 CS de a 318 CHAPTER 17 INTERACTIVE INTERPRETER Two obtain s we have to set a2 0 This is accomplished by loading the output port exactly with the reference resistance Zo which sinks a current h U2 Zo from the port b s11 2 17 11 aj a 0 Ui Zol S11
427. le option is given then all data generated is written to a ngspice rawfile The rawfile may later be read by the interactive mode of ngspice using the load command see 17 5 35 In this case the save line see 15 5 may be used to record the value of internal device variables see Appendix chapter 30 If a rawfile is not specified then output plots in line printer form and tables can be printed according to the print plot and four control lines described in chapter 15 5 If ngspice is started in interactive mode see chapt 16 4 2 the dot commands are not executed immediately but are waiting for manually giving the command run A a much larger set of commands including command similar to the dot commands exists in the interactive command interpreter detailed in section 17 These commands are used inside control lt commands gt endc sections control endc sections of the input file like a script Ngspice may now be started in interactive mode see chapt 16 4 3 but still executing the dot commands immediately 1f command run is added to the script 15 1 Simulator Variables options Various parameters of the simulations available in Ngspice can be altered to control the ac curacy speed or default values for some devices These parameters may be changed via the option command described in chapt 17 5 41 or via the options line 221 222 CHAPTER 15 ANALYSES A
428. le sequence of values 7 V is issued once then the output stays at its final value If r 0 the whole sequence from time O to time Tn is repeated forever If r 10ns the sequence between 10ns and 50ns is repeated forever the r value has to be one of the time points T1 to Tn of the PWL sequence If td is given the whole PWL sequence is delayed by a delay time time td The current source still needs to be patched td and r are not yet available 4 1 5 Single Frequency FM General Form SFFM VO VA FC MDI FS Examples V1 12 0 SFFM 0 IM 20K 5 1K Name Parameter Default value Units VO Offset VA VA Amplitude V A FC Carrier frequency 1 TSTOP Hz MDI Modulation index FS Signal frequency 1 TSTOP Hz The shape of the waveform is described by the following equation V t Vo Va sin 24FCt MDI sin 22F St 4 3 4 1 6 Amplitude modulated source AM General Form AM VA VO MEF FC TD Examples V1 12 0 AM 0 5 1 20K SMEG Im 4 1 INDEPENDENT SOURCES FOR VOLTAGE OR CURRENT 81 Name Parameter Default value Units VA Amplitude V A VO Offset V A MF Modulating frequency Hz FC Carrier frequency 1 TSTOP Hz TD Signal delay S The shape of the waveform is described by the following equation V t Va VO sin 2nMFt x sin 2mFCt 4 4 4 1 7 Transient noise source General Form TRNOISE NA NT NALPHA NAMP RTSAM RTS
429. led one shots etc since temporary breakpoints automatically go away if not reposted each time step Note that a breakpoint may also be set for a time prior to the current time but this will result in an error if the posted breakpoint is prior to the last accepted time i e T 1 cm_event_queue is similar to cm_analog_set_perm_bkpt but functions with event driven models When invoked this function causes the model to be queued for calling at the specified time All other details applicable to cm_analog_set_perm_bkpt apply to this function as well 27 7 2 7 Special Purpose Functions void cm_climit_fcn in in_offset cntl_upper cntl_lower lower_delta upper_delta limit_range gain fraction out_final pout_pin final pout_pcntl_lower_final pout_pcntl_upper_final double in The input value double in offset The input offset double cntl_upper The upper control input value double cntl_lower The lower control input value double lower_delta The delta from control to limit value double upper_delta The delta from control to limit value double limit_range The limiting range double gain The gain from input to output int percent The fraction vs absolute range flag double out_final The output value double pout_pin_final The partial of output wrt input double pout_pcntl_lower_final The partial of output wrt lower control input d
430. limiting to occur this indicates an error in the control input values 28 3 3 Code Model core allocation_error kERROR CORE Allocation calloc failed This message is a generic message related to allocating sufficient storage for the H and B array values limit_error kK ERROR CORE Violation of 50 rule in breakpoints This message occurs whenever the input domain value is an absolute value and the H coordinate points are spaced too closely together overlap of the smoothing regions will occur unless the H values are redefined 28 3 4 Code Model d_osc d_osc_allocation_error KKKK Error x D_OSC Error allocating VCO block storage Generic block storage allocation error d_osc_array_error KKKK Error x D_OSC Size of control array different than frequency array Error occurs when there is a different number of control array members than frequency array members d_osc_negative_freq_error xxxk Error D_OSC The extrapolated value for frequency has been found to be negative Lower frequency level has been clamped to 0 0 Hz Occurs whenever a control voltage is input to a model which would ordinarily given the speci fied control freq coordinate points cause that model to attempt to generate an output oscillating at zero frequency In this case the output will be clamped to some DC value until the control voltage returns to a more reasonable value 28 3 CODE MODEL ERROR MESSAGES 435 28 3
431. ling a distribution for example a the most recent stable distribution from the ngspice website e g ngspice 24 tar gz is as follows cd ng spice rework cd release configure with windows and other options make make install The useful options are enable xspice this requires FLEX and BISON available in MSYS see below enable cider 536 CHAPTER 31 COMPILATION NOTES disable debug O2 optimization no debug information A complete ngspice release version no debug info optimized executable may be made avail able just by cd ng spice rework compile min sh If you want to compile the CVS source you need additional software packages cvs autoconf automake libtool available from the MSYS distribution Define and enter a directory of your choice e g d spice Download the source code from CVS for example by anonymous access by issuing the command cvs z3 d pserver anonymous ngspice cvs sourceforge net cvsroot ngspice co P 1 You will find the sources in directory d spice ngspice ng spice rework Now enter the ngspice top level directory ng spice rework To compile the code just obtained from the CVS repository the procedure is a little bit different cd ng spice rework autogen sh mkdir release cd release configure with windows and other options make make install The user defined build tree saves the object files instead of putting them into the s
432. ll assume should that input be encountered Note that continuation lines may only be used after the initial header line definition for a state 4 A line containing nothing but whitespace space form feed newline carriage return tab vertical tab A line which is not one of the above will cause a file loading error Note that in the example shown whitespace any combination of blanks tabs commas is used to separate values and that the character gt is used to underline the state transition implied by the input preceding it This particular character is not critical in of itself and can be replaced with any other character or non broken combination of characters that you prefer e g gt gt gt resolves_to etc The order of the output and input bits in the file is important the first column is always inter preted to refer to the zeroth bit of input and output Thus in the file above the output from state 1 sets out 0 to 0s and out 1 to 1z The state numbers need not be in any particular order but a state definition which consists of the sum total of all lines which define the state its outputs and all methods by which a state can be exited must be made on contiguous line numbers a state definition cannot be broken into sub blocks and distributed randomly throughout the file On the other hand the state definition can be broken up by as many comment lines as you desire
433. llowing command ngspice 4 gt op After a moment the ngspice prompt returns Now issue the print command to examine the emitter base and collector DC bias voltages ngspice 5 gt print emit base coll ngspice responds with emit 1 293993e 00 base 2 074610e 00 coll 7 003393e 00 To run an AC analysis enter the following command 342 CHAPTER 20 EXAMPLE CIRCUITS ngspice 6 gt ac dec 10 0 01 100 This command runs a small signal swept AC analysis of the circuit to compute the magnitude and phase responses In this example the sweep is logarithmic with decade scaling 10 points per decade and lower and upper frequencies of 0 01 Hz and 100 Hz Since the command sweeps through a range of frequencies the results are vectors of values and are examined with the plot command Issue to the following command to plot the response curve at node coll ngspice 7 gt plot coll This plot shows the AC gain from input to the collector Note that our input source in the circuit description vin contained parameters of the form AC 1 0 designating that a unit amplitude AC signal was applied at this point To produce a more traditional Bode gain phase plot with logarithmic scaling on the frequency axis we use the expression capability of the plot command and the built in Nutmeg functions db log and ph together with the vs keyword ngspice 8 gt plot db coll ph coll vs log frequency The last analysis s
434. lly by ngspice The compatibility mode of ngspice has to be set in spinit by set ngbehavior all If the standard path for the libraries see standard spinit above or usr local lib spice un der CYGWIN and LINUX is not adequate you may add for example the configure options prefix usr libdir usr 1ib64 to set the codemodel search path to usr 1ib64 spice Besides the standard lib only 1ib64 is acknowledged 16 6 User defined configuration file spiceinit In addition to spinit you may define a file spiceinit and put it into the current directory or in your home directory This file will be read in and executed after spinit but before any other input file is read It may contain any script and override the commands given in spinit If the command line option n is used upon ngspice start up this file will be ignored 16 7 ENVIRONMENTAL VARIABLES 253 16 7 Environmental variables 16 7 1 Ngspice specific variables SPICE_LIB_DIR default usr local share ngspice LINUX CYGWIN C Spice share ngspice Windows SPICE_EXEC_DIR default usr local bin LINUX CYGWIN C Spice bin Windows SPICE_BUGADDR default http ngspice sourceforge net bugrep html Where to send bug reports on ngspice SPICE_EDITOR default vi LINUX CYGWIN notepad exe MINGW Visual Studio Set the editor called in the edit command Always overrides the EDITOR env variable SPICE_ASCIIRAWFILE default 0 Format of the rawfile O for binary and 1 for
435. lly will not plot the scale vector but all other real y values The command plot alli will yield all current vectors the command plot allv all voltage vectors If the vector name to be plotted contains or or other tokens which may be taken for oper ators of an expression and plotting fails try enclosing the name in double quotes e g plot vout 17 5 43 Print Print values General Form print col line expr Prints the vector s described by the expression expr If the col argument is present print the vectors named side by side If line is given the vectors are printed horizontally col is the default unless all the vectors named have a length of one in which case line is the default The options width length and nobreak are effective for this command see asciiplot If the expression is all all of the vectors available are printed Thus print col all gt file prints everything in the file in SPICE2 format The scale vector time frequency is always in the first column unless the variable noprintscale is true You may use the vectors alli allv ally with the print command but then the scale vector will not be printed Examples set width 300 print all set length 500 17 5 44 Quit Leave Ngspice or Nutmeg General Form quit 286 CHAPTER 17 INTERACTIVE INTERPRETER Quit ngnutmeg or ngspice Ngspice will ask for an acknowledgment if parameters have not been saved If set noaskquit is speci
436. locity of m s 0 0 5 0e4 carriers NEFF Total channel charge fixed 1 0 5 0 and mobile coefficient MOS2 only KF Flicker noise coefficient 0 0 1 0e 26 AF Flicker noise exponent 1 0 1 2 FC Coefficient for forward bias 0 5 depletion capacitance formula DELTA Width effect on threshold 0 0 1 0 voltage MOS2 and MOS3 THETA Mobility modulation I v 0 0 0 1 MOS3 only ETA Static feedback MOS3 0 0 1 0 only KAPPA Saturation field factor 0 2 0 5 MOS3 only TNOM Parameter measurement E 27 50 temperature 11 2 6 BSIM Models Ngspice implements many of the BSIM models developed by Berkeley s device group BSIM stands for Berkeley Short Channel IGFET Model and groups a class of models that are contin uously updated In general all parameters of BSIM model are obtained from process character ization in particular level 4 and level 5 BSIM1 and BSIM2 parameters are can be generated automatically J Pierret 4 describes a means of generating a process file and the program ngproc2mod provided with ngspice converts this file into a sequence of BSIM1 mode1 lines suitable for inclusion in an ngspice input file Parameters marked below with an in the 1 w column also have corresponding parameters with a length and width dependency For example vfb is the basic parameter with units of Volts 128 CHAPTER 11 MOSFETS and lvfb and wvfb also exist and have units of Volt meter The formula Pr P
437. lse 56 CHAPTER 2 CIRCUIT DESCRIPTION Built in function Notes defined returns 1 if symbol is defined else 0 sqr x sqrt x sin x cos x exp x In x arctan x abs x floor x Largest integer that is less than or equal to x ceil x Smallest integer that is greater than or equal to x pow x y x raised to the power of y C runtime library pwr x y exp y In fabs x min x y max X y sgn x 1 0 for x gt 0 0 0 for x 0 1 0 for x lt 0 ternary_fcn x y Z X y Z gauss nom rvar sigma nominal value plus variation drawn from Gaussian distribution with mean 0 and standard deviation rvar relative to nominal divided by sigma agauss nom avar sigma nominal value plus variation drawn from Gaussian distribution with mean O and standard deviation avar absolute divided by sigma unif nom rvar nominal value plus relative variation to nominal uniformly distributed between rvar aunif nom avar nominal value plus absolute variation uniformly distributed between avar limit nom avar nominal value avar depending on random number in 1 1 being gt 0 or lt 0 The scaling suffixes any decorative alphanumeric string may follow suffix value g le9 meg le6 le3 le 3 le 6 le 9 le 12 le 15 gt ols cl
438. lt s s as s seoa ra t a a t a a a 275 17 5 19 Display List known vectors and types aooaa a 275 173W Eho Pint Xi A 276 17 5 21 Hot Edit th current circuit lt c coc 9 REE EE REGRESS 276 17 5 22 Eprint Print an event driven node only used with XSPICE option 276 17 5 23 FFT fast Fourier transform of vectors o 277 17 5 24 Fourier Perform a Fourier transform 278 17 5 25 Gnuplot Graphics output viaGnuplot 278 17 5 26 Hardcopy Save a plot to a file for printing 279 17 5 27 Inventory Print circuit inventory co coso a 279 17 5 28 Help Print summaries of Ngspice commands 279 17 5 29 History Review previous commands aaao e 279 17 5 30 Iplot Incremental plot s e c ee e me Ble e eR Re a a e a 279 17 5 31 Jobs List active asynchronous ngspice runs 280 17 5 32 Let Assign a value to a vector 645 eee eee a 280 17 5 33 Linearize Interpolate to a linear scale 280 17 5 34 Listing Print a listing of the current circuit 281 17 5 35 Load Load rawfile data c000 00 281 CONTENTS 15 17 5 36 Meas Mesurements on simulation data 281 17 5 37 Mdump Dump the matrix values to a file or to console 282 17 5 38 Mrdump Dump the matrix right hand side values to a file or to console 282 17 5 39 INDI Noise analysis o osa A a A AAA 282 17 5 40 Op
439. lt Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed yes mode mode switch 1 pwl 2 hyst int 1 1 2 no yes in_low in_high input low value input high value real real 0 0 1 0 no no yes yes hyst out_lower_limit hysteresis output lower limit real real 0 1 0 0 0 no no yes yes out_upper_limit output upper limit real 1 0 no yes Description This function is a conceptual model which is used as a building block to create a wide variety of inductive and magnetic circuit models This function is almost always expected to be used in conjunction with the Icouple model to build up systems which mock the behavior of linear and nonlinear magnetic components There are two funda mental modes of operation for the core model These are the pwl mode which is the default and which is the most likely to be of use to you and the hysteresis mode These are detailed below PWL Mode mode 1 12 2 ANALOG MODELS 167 The core model in PWL mode takes as input a voltage which it treats as a magnetomotive force mmf value This value is divided by the total effective length of the core to produce a value for the Magnetic Field Intensity H This value of H is then used to find the corresponding Flux Density B using the piecewise linear relationship descri
440. ltiplier 10 scale InOut real Scale factor 5 sens_cap In flag flag to request sens WRT cap 6 i Out real Device current 7 p Out real Instantaneous device power 206 sens_dc Out real dc sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real de sens amp imag part of ac sens 203 sens_mag Out real sensitivity of ac magnitude 204 sens_ph Out real sensitivity of ac phase 205 sens_cplx Out complex ac sensitivity 30 1 2 2 Capacitor model parameters Name Direction Type Description 112 cap InOut real Model capacitance 101 cj InOut real Bottom Capacitance per area 102 cjsw InOut real Sidewall capacitance per meter 103 defw InOut real Default width 113 defl InOut real Default length 105 narrow InOut real width correction factor 106 short InOut real length correction factor 107 tcl InOut real First order temp coefficient 108 tc2 InOut real Second order temp coefficient 109 thom InOut real Parameter measurement temperature 110 di InOut real Relative dielectric constant 111 thick InOut real Insulator thickness 104 c In flag Capacitor model 479 480 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 1 3 Inductor Fixed inductor 30 1 3 1 Inductor instance parameters Name Direction Type Descri
441. luding ASCO parameter S YM BOL see file extract unity_gain_frequency It also may contain a control section see file extract phase_margin_min During set up S YMBOLL is replaced by the file name a leading z and a trailing number according to the above sequence starting with 0 amp3 sp This is the basic circuit description Entries like LM2 are ASCO specific defined in the Parameters section of file amp3 cfg ASCO will replace these parameter placeholders with real values for simulation determined by the optimization algorithm The control ende section is specific to ngspice Entries to this section may deliver work arounds of some com mands not available in ngspice but used in other simulators You may also define additional measurements get access to variables and vectors or define some data manipulation In this example the control section contains an op measurement required later for slew rate calcula tion as well as the ac simulation which has to occur before any further data evaluation Data from the op simulation are stored in a plot op1 Its name is saved in variable dt The ac mea surements sets another plot acl To retrieve op data from the former plot you have to use the dt lt vector gt notation see file extract amp3_slew_rate n typ p typ MOSFET parameter files to be included by amp3 sp 360 CHAPTER 22 CIRCUIT OPTIMIZATION WITH NGSPICE Testing the set up Copy asco test exe and ngsp
442. ly If no dimensions are specified then the dimensions of the first vector are copied to the other vectors An error message of the form dimensions of x were inconsistent can be ignored 17 5 COMMANDS 287 17 5 49 Resume Continue a simulation after a stop General Form resume Resume a simulation after a stop or interruption control C 17 5 50 Rspice Remote ngspice submission General Form rspice input file Runs a ngspice remotely taking the input file as a ngspice input file or the current circuit if no argument is given Ngnutmeg or ngspice waits for the job to complete and passes output from the remote job to the user s standard output When the job is finished the data is loaded in as with aspice If the variable rhost is set ngnutmeg connects to this host instead of the default remote ngspice server machine This command uses the rsh command and thereby requires authentication via a rhosts file or other equivalent method Note that rsh refers to the remote shell program which may be remsh on your system to override the default name of rsh set the variable remote_she11 If the variable rprogram is set then rspice uses this as the pathname to the program to run on the remote system Note rspice will not acknowledge elements that have been changed via the alter or altermod commands 17 5 51 Run Run analysis from the input file General Form run rawfile Run
443. ly varied whenever the input domain smoothing parameter is set greater than zero 12 2 ANALOG MODELS Example SPICE Usage aii 1 2 schmitti 157 model schmitt1 hyst in_low 0 7 in_high 2 4 hyst 0 5 out_lower_limit 0 5 out_upper_limit 3 0 input_domain 0 01 fraction TRUE 12 2 14 Differentiator NAME_TABLE C_Function_Name Spice_Model_ Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector cm_d_dt d_dt time derivative block in input in v v vd i id no no gain gain real 1 0 no yes out_lower_limit output lower limit real no yes limit_range out output out Vv v vd i id no no out_offset output offset real 0 0 no yes out_upper_limit output upper limit real no yes upper amp lower limit smoothing range real 1 0e 6 no CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null_ Allowed yes Description The Differentiator block is a simple derivative stage that approximate
444. m Ne Real Conduction band density cm3 Nv Real Valence band density cm Eg Real Energy band gap eV dEg dT Real Bandgap narrowing with temperature eV k Eg Tref Real Bandgap reference temperature K dEg dN Real Bandgap narrowing with N doping eV cm gt Eg Nref Real Bandgap reference concentration N type cm dEg dP Real Bandgap narrowing with P doping eV cm 3 Eg Pref Real Bandgap reference concentration P type cm TN Real SRH lifetime electrons sec SRH Nref Real SRH reference concentration electrons cm TP Real SRH lifetime holes sec SRH Pref Real SRH reference concentration holes cm gt CN Real Auger coefficient electrons cm sec CP Real Auger coefficient holes cm sec ARichN Real Richardson constant electrons 4 cn ARichP Real Richardson constant holes 4 m 29 9 3 EXAMPLES Set the type of material 1 to silicon then adjust the values of the temperature dependent bandgap model parameters material num 1 silicon eg 1 12 deg dt 4 7e 4 eg tref 640 0 The recombination lifetimes can be set to extremely short values to simulate imperfect semi conductor material material num 2 silicon tn lps tp lps 29 9 4 SEE ALSO domain mobility contact boundary 29 10 METHOD 455 29 10 METHOD Choose types and parameters of numerical methods SYNOPSIS method types parameters 29 10 1 DESCRIPTION The method card controls which numerical methods are used
445. mands Prints help This help information however is spice3f5 like stemming from 1991 and thus is outdated If the argument all is given a short description of everything you could possibly type is printed If commands are given descriptions of those commands are printed Otherwise help for only a few major commands is printed On Windows this help command is no longer available Spice3f5 compatible help may be found at Spice 3 User manual For ngspice please use this manual 17 5 29 History Review previous commands General Form history number Print out the history or the last number commands typed at the keyboard 17 5 30 Iplot Incremental plot General Form iplot node Incrementally plot the values of the nodes while ngspice runs The iplot command can be used with the where command to find trouble spots in a transient simulation 280 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 31 Jobs List active asynchronous ngspice runs General Form jobs Report on the asynchronous ngspice jobs currently running Ngnutmeg checks to see if the jobs are finished every time you execute a command If it is done then the data is loaded and becomes available 17 5 32 Let Assign a value to a vector General Form let name expr Creates a new vector called name with the value specified by expr an expression as described above If expr is a zero length vector then the vector becomes undefined Individual ele ments o
446. mber The result is a vector of length number all elements having a value 1 length vector The length of vector 265 266 CHAPTER 17 INTERACTIVE INTERPRETER Name Function interpolate plot vector The result of interpolating the named vector onto the scale of the current plot This function uses the variable polydegree to determine the degree of interpolation deriv vector Calculates the derivative of the given vector This uses numeric differentiation by interpolating a polynomial and may not produce satisfactory results particularly with iterated differentiation The implementation only calculates the derivative with respect to the real component of that vector s scale vecd vector Compute the differential of a vector vecmin vector Returns the value of the vector element with minimum value vecmax vector Returns the value of the vector element with maximum value Several functions offering statistical procedures are listed in the following table Name Function rnd vector A vector with each component a random integer between 0 and the absolute value of the input vector s corresponding integer element value sgauss vector Returns a vector of random numbers drawn from a Gaussian distribution real value mean 0 standard deviation 1 The length of the vector returned is determined by the input vector The contents of the input vector will not be used A call
447. mesh index in the relevant dimension or defaulted to the respective boundary of the simulation mesh 29 5 2 PARAMETERS Name Type Description Number Integer ID number of this domain Material Integer ID number of material used by this domain X Low Real Lowest X location of domain box um IX Low Integer Lowest X mesh index of domain box X High Real Highest X location of domain box um IX High Integer Highest X mesh index of domain box Y Low Real Lowest Y location of domain box um IY Low Integer Lowest Y mesh index of domain box Y High Real Highest Y location of domain box um IY High Integer Highest Y mesh index of domain box 29 5 3 EXAMPLES Create a 4 0 pm wide by 2 0 pm high domain out of material 1 domain num 1 material 1 x 1 0 0 x h 4 0 y 1 0 0 y h 2 0 The next example defines the two domains that would be typical of a planar MOSFET simula tion One occupies all of the mesh below y 0 and the other occupies the mesh above y 0 Because the x values are left unspecified the low and high x boundaries default to the edges of the mesh 29 6 DOPING 4AT domain n m Il y 1 0 0 domain n 2 m 2 y h 0 0 29 5 4 SEE ALSO x mesh material 29 6 DOPING Add dopant to regions of a device SYNOPSIS doping domains profile type lateral profile type axis impurity typel constant box profile specifications 29 6 1 DESCRIPTION Doping cards a
448. meter function one input is DC the other carries the AC signal Example SPICE Usage a3 1 2 3 4 sigmult model sigmult mult in_offset 0 1 0 1 0 1 in_gain 10 0 10 0 10 0 12 2 4 Divider NAME_TABLE C_Function_Name Spice Model _Name Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds cm_divide divide divider block num numerator in v v vd i id vnam no den denominator in v v vd i id vnam no out_gain 5 0 out_offset 0 05 out output out V v vd i id no 12 2 ANALOG MODELS Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name no num_ offset numerator offset real 0 0 no yes den_offset denominator offset real 0 0 no yes den_lower_limit 141 no no num_gain
449. minate processing of a device definition SYNOPSIS end 29 9 MATERIAL 453 29 8 1 DESCRIPTION The end card stops processing of a device definition It may appear anywhere within a definition Subsequent continuation lines of the definition will be ignored If no end card is supplied all the cards will be processed 29 9 MATERIAL Specify physical properties of a material SYNOPSIS material number type physical constants 29 9 1 DESCRIPTION The material card is used to create an entry in the list of materials used in a device Each entry needs a unique identification number and the type of the material Default values are assigned to the physical properties of the material Most material parameters are accessible either here or on the mobility or contact cards However some parameters remain inaccessible e g the ionization coefficient parameters Parameters for most physical effect models are collected here Mobility parameters are handled separately by the mobility card Properties of electrode materials are set using the contact card 454 CHAPTER 29 CIDER USER S MANUAL 29 9 2 PARAMETERS Name Type Description Number Integer ID number of this material Semiconductor Silicon Flag Type of this material Polysilicon GaAs Insulator Oxide Nitride Affinity Real Electron affinity eV Permittivity Real Dielectric permittivity F c
450. model OUTPUT_STRENGTH a may be assigned a strength value for a digital output node This is the normal way of posting an output strength from a digital code model Valid values are 1 STRONG 2 RESISTIVE 3 HI_IMPEDANCE 4 UNDETERMINED 27 7 1 7 Partial Derivatives PARTIAL y a PARTIAL y n a PARTIAL y alm PARTIAL y n alm PARTIAL y a resolves to the value of the partial derivative of scalar output y with respect to scalar input a The type is always double since partial derivatives are only defined for nodes with real valued quantities i e analog nodes The remaining uses of PARTIAL are shown for the cases in which either the output the input or both are vectors Partial derivatives are required by the simulator to allow it to solve the non linear equations that describe circuit behavior for analog nodes Since coding of partial derivatives can become difficult and error prone for complex analog models you may wish to consider using the cm analog auto partial code model support function instead of using this macro 27 7 1 8 AC Gains AC_GAIN y a AC_GAIN Cy In a AC_GAIN y alm AC_GAIN y n a m AC_GAIN y a resolves to the value of the AC analysis gain of scalar output y from scalar input a The type is always a structure Complex_t defined in the standard code model header file typedef struct Complex_s double real The real part of the complex number d
451. model parameters are grouped onto cards Each type of card has its own set of valid parameters In all cases the relative ordering of different types of cards is unimportant However for cards of the same type such as mesh specification cards their order in the input file can be important in determining the device structure Each card begins on a separate line of the input file In order to let CIDER know that card lines are continuations of a numerical model description each must begin with the continuation character If there are too many parameters on a given card to allow it fit on a single line the card can be continued by adding a second to the beginning of the next line However the name and value of a parameter should always appear on the same line 441 442 CHAPTER 29 CIDER USER S MANUAL Several features are provided to make the numerical model format more convenient Blank space can follow the initial to separate it from the name of a card or the card con tinuation Blank lines are also permitted as long as they also begin with an initial Parentheses and commas can be used to visually group or separate parameter definitions In addition while it is common to add an equal sign between a parameter and its value this is not strictly necessary The name of any card can be abbreviated provided that the abbreviation is unique Parameter name abbreviations can also be used if they are un
452. modeling primitives with which to build subcircuit models In general you should first attempt to construct your models from these available primitives This is often the quickest and easiest method If you find that you cannot easily design a subcircuit to accomplish your goal using the available primitives then you should turn to the code modeling approach Because they are written in a general purpose programming language C code models enable you to simulate virtually any behavior for which you can develop a set of equations or algorithms 25 2 Circuit Description Syntax If you need to debug a simulation if you are planning to develop your own models or if you are using the XSPICE simulator through the Nutmeg user interface you will need to become familiar with the circuit description language The previous sections presented example circuit description input files The following sections provide more detail on XSPICE circuit descriptions with particular emphasis on the syntax for creating and using models First the language and syntax of the NGSPICE simulator are described and references to additional information are given Next XSPICE extensions to the ngspice syntax are detailed Finally various enhancements to NGSPICE operation are discussed including polynomial sources arbitrary phase sources supply ramping matrix conditioning convergence options and debugging support 25 2 1 XSPICE Syntax Extensions In the preceding dis
453. mp points should be plotted If an xdelta or a ydelta parameter is present it specifies the spacing between grid lines on the X and Y axis These parameter names may be abbreviated to xl yl xind xcomp xdel and ydel respectively The xname argument is an expression to use as the scale on the x axis If xlog or ylog are present then the X or Y scale respectively is logarithmic loglog is the same as specifying 17 5 COMMANDS 285 both The xlabel and ylabel arguments cause the specified labels to be used for the X and Y axes respectively If samep is given the values of the other parameters other than xname from the previous plot hardcopy or asciiplot command is used unless re defined on the command line The title argument is used in the place of the plot name at the bottom of the graph The linear keyword is used to override a default logscale plot as in the output for an AC analy sis Finally the keyword polar generates a polar plot To produce a smith plot use the keyword smith Note that the data is transformed so for smith plots you will see the data transformed by the function x 1 x 1 To produce a polar plot with a smith grid but without performing the smith transform use the keyword smithgrid If you specify plot all all vectors including the scale vector are plotted versus the scale vector see commands display 17 5 19 or setscale 17 5 58 on viewing the vectors of the current plot The command plot a
454. mulator assumes that the specified input domain value is to be interpreted as a frac tional figure Otherwise it is interpreted as an absolute value Thus if fraction TRUE and input_domain 0 10 The simulator assumes that the smoothing radius about each co ordinate point is to be set equal to 10 of the length of either the x_array segment above 12 2 ANALOG MODELS 147 each coordinate point or the x_array segment below each coordinate point The specific segment length chosen will be the smallest of these two for each coordinate point On the other hand if fraction FALSE and input 0 10 then the simulator will begin smoothing the transfer function at 0 10 volts or amperes below each x_array coordi nate and will continue the smoothing process for another 0 10 volts or amperes above each x_array coordinate point Since the overlap of smoothing domains is not allowed checking is done by the model to ensure that the specified input domain value is not ex cessive One subtle consequence of the use of the fraction TRUE feature of the PWL Controlled Source is that in certain cases you may inadvertently create extreme smoothing of func tions by choosing inappropriate coordinate value points This can be demonstrated by considering a function described by three coordinate pairs such as 1 1 1 1 and 2 1 In this case with a 10 input_domain value specified fraction TRUE input do main 0 10 you would expect to see rounding occur bet
455. n is a string then PARAM gain would resolve to a pointer PARAM gain n resolves to the value of the nth element of a vector parameter gain PARAM_SIZE gain resolves to an integer int representing the size of the gain vector which was dynamically determined when the SPICE deck was read PARAM_SIZE gain is undefined if gain is a scalar PARAM_NULL gain resolves to an integer with value 0 or 1 depending on whether a value was specified for gain or whether the value is defaulted respectively 27 7 1 4 Port Data PORT_SIZE a PORT_NULL a LOAD a TOTAL _LOAD a 66 99 PORT_SIZE a resolves to an integer int representing the size of the a port which was dynamically determined when the SPICE deck was read PORT_SIZE a is undefined if gain is a scalar PORT_NULL a resolves to an integer int with value 0 or 1 depending on whether the SPICE deck has a node specified for this port or has specified that the port is null respectively LOAD a is used in a digital model to post a capacitive load value to a particular input or output port during the INIT pass of the simulator All values posted for a particular event driven node using the LOAD macro are summed producing a total load value which TOTAL_LOAD a returns a double value which represents the total capacitive load seen on a specified node to which a digital code model is connected This information may be used after the INIT pass by the code m
456. n AC_GAIN Complex_t y i1 x 1 AC gain of output y with respect to input x ANALYSIS enum lt none gt Type of analysis DC AC TRANSIENT ARGS Mif_Private_t lt none gt Standard argument to all code model function CALL_TYPE enum lt none gt Type of model evaluation call ANALOG or EVENT INIT Boolean_t lt none gt Is this the first call to the model INPUT double or void name i Value of analog input port or value of structure pointer for User Defined Node port INPUT_STATE enum name i State of a digital input ZERO ONE or UNKNOWN INPUT_STRENGHT enum name i Strength of digital input STRONG RESISTIVE HI IMPEDANCE or UNDETERMINED INPUT_TYPE char name i The port type of the input LOAD double name i The digital load value placed on a port by this model 412 CHAPTER 27 CODE MODELS AND USER DEFINED NODES Table 27 3 Accessor macros MESSAGE char name i A message output by a model on an event driven node OUTPUT double or void name i Value of the analog output port or value of structure pointer for User Defined Node port OUTPUT_CHANGED Boolean_t name i Has a new value been assigned to this event driven output by the model OUTPUT_DELAY double name i Delay in seconds for an event driven output OUTPUT_STATE enum name i State of a digital output ZERO ONE or UNKNOWN OUTPUT
457. n Perform a transient analysis General Form tran Tstep Tstop Tstart Tmax UIC Perform a transient analysis See chapter 15 3 9 of this manual for more details 17 5 74 Transpose Swap the elements in a multi dimensional data set General Form transpose vector vector This command transposes a multidimensional vector No analysis in ngspice produces mul tidimensional vectors although the DC transfer curve may be run with two varying sources You must use the reshape command to reform the one dimensional vectors into two dimen sional vectors In addition the default scale is incorrect for plotting You must plot versus the vector corresponding to the second source but you must also refer only to the first segment of this second source vector For example circuit to produce the transfer characteristic of a MOS transistor How to produce the transfer characteristic of a MOS transistor ngspice gt dc vgg 0 5 1 vdd 0 5 1 ngspice gt plot i vdd ngspice gt reshape all 6 6 ngspice gt transpose i vdd v drain ngspice gt plot i vdd vs v drain 0 17 5 75 Unalias Retract an alias General Form unalias word Removes any aliases present for the words 17 5 COMMANDS 297 17 5 76 Undefine Retract a definition General Form undefine function Definitions for the named user defined functions are deleted 17 5 77 Unlet Delete the specified vector s General Form unlet ve
458. n error message of a model missing So spinit or spiceinit for personal code model libraries is the correct place for codemodel 27 6 Interface Specification File The Interface Specification IFS file is a text file that describes the model s naming informa tion its expected input and output ports its expected parameters and any variables within the model that are to be used for storage of data across an entire simulation These four types of data are described to the simulator in IFS file sections labeled NAME TABLE PORT TA BLE PARAMETER TABLE and STATIC VAR TABLE respectively An example IFS file is given below The example is followed by detailed descriptions of each of the entries what they signify and what values are acceptable for them Keywords are case insensitive NAME_TABLE C_Function_Name ucm_xfer Spice _Model_Name xfer Description arbitrary transfer function 398 CHAPTER 27 CODE MODELS AND USER DEFINED NODES PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector no no Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default_Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed
459. n for V and I may be any function of voltages and cur rents through voltage sources in the system In addition the variables time and temper are available in a transient analysis reflecting the actual simulation time and circuit temperature The variable hertz is available in an AC analysis time is zero in the AC analysis hertz is zero during transient analysis Using the variable hertz may cost some CPU time if you have a large circuit because for each frequency the operating point has to be determined before calculating the AC response The following functions of a single real variable are defined Trigonometric functions cos sin tan acos asin atan Hyperbolic functions cosh sinh acosh asinh atanh Exponential and logarithmic exp In log Other abs sqrt u u2 uramp floor ceil Functions of two variables are min max pow Functions of three variables are a b c 66 199 The function u is the unit step function with a value of one for arguments greater than zero and a value of zero for arguments less than zero The function u2 returns a value of zero for arguments less than zero one for arguments greater than one and assumes the value of the argument between these limits The function uramp is the integral of the unit step for an input x the value is zero if x is less than zero or if x is greater than zero the value is x These three functions are useful in synthesizing piece
460. n given the same name as an intrinsic SPICE device ERROR Model name lt model name gt in directory lt pathname gt is same as model name lt model name gt in directory lt pathname gt Two models in different directories have the same name ERROR C function name lt function name gt in directory lt pathname gt is same as C function name lt function name gt in directory lt pathname gt Two C language functions in separate model directories have the same names these would cause a collision when linking the final executable ERROR Problems opening CMextrn h for write 28 1 PREPROCESSOR ERROR MESSAGES 429 The temporary file CMextern h used in building the XSPICE simulator executable could not be created or opened Check permissions on directory ERROR Problems opening CMinfo h for write The temporary file CMinfo h used in building the XSPICE simulator executable could not be created or opened Check permissions on directory ERROR Problems opening objects inc file for write The temporary file objects inc used in building the XSPICE simulator executable could not be created or opened Check permissions on directory ERROR Could not open input mod file lt filename gt The Model Definition File that contains the definition of the Code Model s behavior usually cfunc mod was not found or could not be read ERROR Could not open output c lt filename gt The indicated C l
461. n has to enabled 31 1 AC 15 3 1 and transient analysis 15 3 9 is supported The following E Source ELOPASS 4 0 LAPLACE V 1 10 s 6800 1 may be replaced by AELOPASS 1 int_4 filterl model filterl x_fer gain 10 int_ic 0 0 num_coeff 1 den_coeff 1 1 47e 4 ELOPASS 4 0 int_4 0 1 where you have the voltage of node 1 as input an intermediate output node int_4 and an E source as buffer so to keep the name ELOPASS available if further processing is required If the controlling expression is more complex than just a voltage node you may add a B Source 5 1 for evaluating the expression before enmtering the A device 5 3 G SOURCE NON LINEAR CURRENT SOURCE 93 E Source with complex controlling expression ELOPASS 4 0 LAPLACE V 1 v 2 10 s 6800 1 may be replaced by BELOPASS int_1 0 V V 1 v 2 AELOPASS int_1 int_4 filterl model filterl x_fer gain 10 int_ic 0 0 num_coeff 1 den_coeff 1 1 47e 4 ELOPASS 4 O int_4 0 1 5 3 G source non linear current source 5 3 1 CUR General form GXXXXXXX n n cur expr Examples G51 55 225 cur V 3 V 3 Offs Expression may be an equation or an expression containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 5 3 2 VALUE Optional syntax GXXXXXXX n n value expr Examples G51
462. n is done This is likely to give erroneous results if the time scale is not monotonic though 17 5 25 Gnuplot Graphics output via Gnuplot General Form gnuplot file plotargs Like plot but using gnuplot for graphics output and further data manipulation ngspice creates a file called file plt containing the gnuplot command sequence a file called file data con taining the data to be plotted and a file called file eps containing a postscript hard copy of 17 5 COMMANDS 279 the plot On LINUX gnuplot is called via xterm which offers a gnuplot console to manipulate the data On Windows a gnuplot command console window is opened as well as the plot win dow Of course you have to have gnuplot installed properly on your system This option will work with Gnuplot version 4 2 6 not with version 4 4 but again with 4 5 as of August 2011 17 5 26 Hardcopy Save a plot to a file for printing General Form hardcopy file plotargs Just like plot except that it creates a file called file containing the plot The file is a postscript image As an alternative the plot 5 format is available by setting the hcopydevtype variable to plot5 and can be printed by either the plot 1 program or Ipr with the g flag 17 5 27 Inventory Print circuit inventory General Form inventory This commands accepts no argument and simply prints the number of instances of a particular device in a loaded netlist 17 5 28 Help Print summaries of Ngspice com
463. n optional integer if specified the noise contributions of each noise generator is produced every pts_per_summary frequency points The noise control line produces two plots 1 one for the Noise Spectral Density curves and 2 one for the total Integrated Noise over the specified frequency range All noise voltages currents are in squared units V Hz and 4 Hz for spectral density V and A for integrated noise 15 3 5 OP Operating Point Analysis General form Op The inclusion of this line in an input file directs ngspice to determine the dc operating point of the circuit with inductors shorted and capacitors opened Note a DC analysis is automatically performed prior to a transient analysis to determine the transient initial conditions and prior to an AC small signal Noise and Pole Zero analysis to determine the linearized small signal models for nonlinear devices see the KEEPOPINFO variable 15 1 2 230 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE 15 3 6 PZ Pole Zero Analysis General form pz nodel node2 node3 node4 cur pol pz nodel node2 node3 node4 cur zer pz nodel node2 node3 node4 cur pz pz nodel node2 node3 node4 vol pol pz nodel node2 NODE3 node4 vol zer pz nodel node2 node3 node4 vol pz Examples pz 103 0 cur pol pz 2 3 5 0 vol zer pz 4 14 1 cur pz cur stands for a transfer function of the type output voltage input current while vol stands for a transfer function of the t
464. n the node voltages on the ic line are used to compute the initial conditions for the devices Look at the description on the ic control line for its interpretation when uic is not specified 15 4 Measurements after Op Ac and Transient Analysis 15 4 1 meas ure The meas or measure statement and its equivalent meas command see chapt 17 5 36 are used to analyze the output data of a tran ac or dc simulation The command is executed immediately after the simulation has finished 236 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE 15 4 2 batch versus interactive mode meas analysis may not be used in batch mode b command line option if an output file rawfile is given at the same time r rawfile command line option In this batch mode ngspice will write its simulation output data directly to the output file The data is not kept in memory thus is no longer available for further analysis This is made to allow a very large output stream with only a relatively small memory usage For meas to be active you need to run the batch mode with a plot or print command A better alternative may be to start ngspice in interactive mode If you need batch like operation you may add a control endc section to the input file Example input file tran 1ns 1000ns 3K K K K K K K K K K K e K K K K K K K K K K K K K K K K K K control run write outputfile data endc K K K K K K K K K K K K K K K K K K K K K K K K
465. nOut real Width dependence of x2ms 134 x3ms InOut real VDS dependence of mus 135 Ix3ms InOut real Length dependence of x3ms 136 wx3ms InOut real Width dependence of x3ms 137 ud InOut real VGS dependence of mobility 138 lu0 InOut real Length dependence of u0 139 wud InOut real Width dependence of u0 140 x2u0 InOut real VBS dependence of u0 141 1x2u0 InOut real Length dependence of x2u0 142 wx2u0 InOut real Width dependence of x2u0 143 ul InOut real VDS depence of mobility velocity saturation 144 lul InOut real Length dependence of ul 145 wul InOut real Width dependence of ul 146 x2ul InOut real VBS depence of ul 147 Ix2ul InOut real Length depence of x2ul 148 wx2ul InOut real Width depence of x2ul 149 x3ul InOut real VDS depence of ul 150 Ix3ul InOut real Length dependence of x3ul 151 wx3ul InOut real Width depence of x3ul 152 nO InOut real Subthreshold slope 153 In0 InOut real Length dependence of nO 154 wn0 InOut real Width dependence of nO 155 nb InOut real VBS dependence of subthreshold slope 156 Inb InOut real Length dependence of nb 157 wnb InOut real Width dependence of nb 158 nd InOut real VDS dependence of subthreshold slope 159 Ind InOut real Length dependence of nd 160 wnd InOut real Width d
466. nable openmp or without USE_OMP preprocessor flag under MS Windows you will get the standard not paralleled BSIM3 and BSIM4 model as has been available from Berkeley If OpenMP is selected and the number of threads set to 1 there will be only a very slight CPU time disadvantage typ 3 compared to the standard non OpenMP build 16 11 SERVER MODE OPTION S 257 16 10 4 Literature 1 R K Perng T H Weng and K C Li On Performance Enhancement of Circuit Simulation Using Multithreaded Techniques IEEE International Conference on Computational Science and Engineering 2009 pp 158 165 16 11 Server mode option s A program may write the spice input to the console This output is redirected to ngspice via l ngspice called with the s option writes its output to the console which again is redirected to a receiving program by In the following simple example cat reads the input file and prints it content to the console which is redirected to ngspice by a first pipe ngspice transfers its output similar to a raw file see below to less via another pipe Example command line cat input cirlngspice slless Under MS Windows you will need to compile ngspice as a console application see chapt 31 2 7 for this server mode usage Example input file test s vl 101 rl 1 0 2k options filetype ascil save i vl de vl 1 1 0 5 end If you start ngspice console with ngspice s you may type in
467. nce a power up transition Currently all sources within the simulator are automatically ramped to the final time zero value if a RAMPTIME option is specified 27 7 2 5 Message Handling Functions char cm_message_get_errmsg int cm_message_send char msg char msg The message to output cm_message_get_errmsg is a function designed to be used with other library functions to provide a way for models to handle error situations More specifically whenever a library func tion which returns type int is executed from a model it will return an integer value n If this value is not equal to zero 0 then an error condition has occurred likewise functions which return pointers will return a NULL value if an error has occurred At that point the model can invoke cm_message_get_errmsg to obtain a pointer to an error message This can then in turn be displayed to the user or passed to the simulator interface through the cm_message_send function The C code required for this is as follows err cm_analog integrate in out amp dout_din if err cm_message_send cm_message get_errmsg else cm_message_send sends messages to either the standard output screen or to the simulator interface depending on which is in use 27 7 2 6 Breakpoint Handling Functions int cm_analog_set_perm_bkpt time double time The time of the breakpoint to be set int cm_analog_set_temp_bkpt time double time
468. nction capacitance F 0 1pF t PB Gate junction potential V 1 0 6 KF Flicker noise coefficient 0 AF Flicker noise exponent 1 FC Coefficient for forward bias depletion 0 5 capacitance formula Device instance zl 2 3 0 mesmod area 1 4 Model model mesmod nmf level 1 rd 46 rs 46 vt0 1 3 lambda 0 03 alpha 3 beta 1 4e 3 10 2 2 Model by Ytterdal e a level 2 and levels 3 4 Copyright 1993 T Ytterdal K Lee M Shur and T A Fjeldly to be written M Shur T A Fjeldly T Ytterdal K Lee Unified GaAs MESFET Model for Circuit Simula tion Int Journal of High Speed Electronics vol 3 no 2 pp 201 233 1992 10 2 3 hfetl level 5 to be written no documentation available 10 2 4 hfet2 level6 to be written no documentation available Chapter 11 MOSFETs Ngspice supports all the original mosfet models present in spice3f5 and almost all the newer ones that have been published and made open source Both bulk and SOI Silicon on Insula tor models are available When compiled with the cider option ngspice implements the four terminals numerical model that can be used to simulate a MOSFET please refer to numerical modeling documentation for additional information and examples 11 1 MOSFET devices General form MXXXXXXX nd ng ns nb mname lt m val gt lt l val gt lt w val gt lt ad val gt lt as val gt lt pd val gt lt ps val gt lt nrd val gt lt nrs val gt lt off gt lt i
469. nd which have already been used extensively in the code model library included with the simulator These are detailed below Boolean_t The Boolean type is an enumerated type which can take on values of FALSE integer value 0 or TRUE integer value 1 Alternative names for these enumerations are MIF FALSE and MIF TRUE respectively Complex_t The Complex type is a structure composed of two double values The first of these is the real type and the second is the imag type Typically these values are accessed as shown For complex value data the real portion is data real and the imaginary portion is data imag Digital _State_t The Digital State type is an enumerated value which can be either ZERO integer value 0 ONE integer value 1 or UNKNOWN integer value 2 Digital _Strength_t The Digital Strength type is an enumerated value which can be either STRONG integer value 0 RESISTIVE integer value 1 HI IMPEDANCE integer value 2 or UNDETERMINED integer value 3 Digital_t The Digital type is a composite of the Digital_State_t and Digital_Strength_t enu merated data types The actual variable names within the Digital type are state and strength and are accessed as shown below For Digital_t value data the state portion is data state and the strength portion is data strength 27 2 Creating Code Models The following description deals with extending one of the five existing code model
470. ne using multi dimensional Taylor series to represent the nonlin earities at the operating point Terms of up to third order are used in the series expansions If the optional parameter f2overf1 is not specified disto does a harmonic analysis i e it analyses distortion in the circuit using only a single input frequency F which is swept as 228 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE specified by arguments of the disto command exactly as in the ac command Inputs at this frequency may be present at more than one input source and their magnitudes and phases are specified by the arguments of the distof1 keyword in the input file lines for the input sources see the description for independent sources The arguments of the distof2 keyword are not relevant in this case The analysis produces information about the AC values of all node voltages and branch currents at the harmonic frequencies 2F and vs the input frequency F as it is swept A value of 1 as a complex distortion output signifies cos 27 2F t at 2F and cos 27 3F t at 3F using the convention that 1 at the input fundamental frequency is equivalent to cos 27F 1 The distortion component desired 2F or 3F can be selected using commands in ngnutmeg and then printed or plotted Normally one is interested primarily in the magnitude of the harmonic components so the magnitude of the AC distortion value is looked at It should be noted that these are the
471. nes General form UXXXXXXX nl n2 n3 mname l len lt n lumps gt Examples U1 1 2 0 URCMOD L 50U URC2 1 12 2 UMODL 1 1MIL N 6 ni and n2 are the two element nodes the RC line connects while n3 is the node to which the capacitances are connected mname is the model name len is the length of the RC line in meters lumps if specified is the number of lumped segments to use in modeling the RC line see the model description for the action taken if this parameter is omitted 6 3 1 Uniform Distributed RC Model URC The URC model is derived from a model proposed by L Gertzberrg in 1974 The model is accomplished by a subcircuit type expansion of the URC line into a network of lumped RC segments with internally generated nodes The RC segments are in a geometric progression increasing toward the middle of the URC line with K as a proportionality constant The num ber of lumped segments used if not specified for the URC line device is determined by the following formula log 2 1 Fmax E 201 ee N log K 9 1 The URC line is made up strictly of resistor and capacitor segments unless the ISPERL parame ter is given a nonzero value in which case the capacitors are replaced with reverse biased diodes 6 4 KSPICE LOSSY TRANSMISSION LINES 99 with a zero bias junction capacitance equivalent to the capacitance replaced and with a satu ration current of ISPERL amps per meter of transmission line and an optional se
472. netic permeability 108 1 In flag Inductor model 30 1 ELEMENTARY DEVICES 30 1 4 Mutual Mutual Inductor 30 1 4 1 Mutual instance parameters 481 Name Direction Type Description 401 k InOut real Mutual inductance 401 coefficient InOut real 402 inductorl InOut instance First coupled inductor 403 inductor2 InOut instance Second coupled inductor 404 sens_coeff In flag flag to request sensitivity WRT coupling factor 606 sens_dc Out real dc sensitivity 601 sens_real Out real real part of ac sensitivity 602 sens_imag Out real dc sensitivity and imag part of ac sensitivty 603 sens_mag Out real sensitivity of AC magnitude 604 sens_ph Out real sensitivity of AC phase 605 sens_cplx Out complex mutual model parameters 482 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 2 Voltage and current sources 30 2 1 ASRC Arbitrary source 30 2 1 1 ASRC instance parameters Name Direction Type Description 2 1 In parsetree Current source liv In parsetree Voltage source 7 1 Out real Current through source 6 v Out real Voltage across source 3 pos_node Out integer Positive Node 4 neg_node Out integer Negative Node 30 2 VOLTAGE AND CURRENT SOURCES 30 2 2 Isource Independent current source 30 2 2 1 Isource instance parameters
473. ng input and determines the output value Example SPICE Usage a82 1 0 20 3 0 7 O pwlm model pwlm multi_input_pwl x_array 2 0 y_array 0 2 12 2 10 Analog Switch NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits model and cm_aswitch aswitch analog switch cntl_in input in v v vd i id no no cntl_off control real 0 0 off value no yes r_off off resistance real 1 0e12 oF out resistive output out gd gd no no cntl_on control real 1 0 on value no yes log log linear switch boolean TRUE 12 2 ANALOG MODELS Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed no yes r_on on resistance real 1 0 no yes 131 no yes Description The Analog Switch is a resistor that varies either logarithmically or linearly be tween specified values of a controlling input voltage or current Note that the input is not internally limited Therefore if the
474. ng switch impedances that are close to ideal in all cases aggravates the problem of discontinuities mentioned above Of course when modeling real devices such as MOSFETS the on resistance should be adjusted to a real istic level depending on the size of the device being modeled e If a wide range of ON to OFF resistance must be used in the switches ROFF RON gt le 12 then the tolerance on errors allowed during transient analysis should be de creased by using the OPTIONS control line and specifying TRTOL to be less than the default value of 7 0 e When switches are placed around capacitors then the option CHGTOL should also be re duced Suggested values for these two options are 1 0 and le 16 respectively These changes inform ngspice to be more careful around the switch points so that no errors are made due to the rapid change in the circuit 3 2 ELEMENTARY DEVICES 75 Example input file Switch test tran 2us 5ms switch control voltage vl 1 0 DC 0 0 PWL 0 0 2e 3 2 4e 3 0 switch control voltage starting inside hysteresis window please note influence of instance parameters ON OFF v2 2 0 DC 0 0 PWL 0 0 9 2e 3 2 4e 3 0 4 switch control current 13 3 0 DC 0 0 PWL 0 0 2e 3 2m 4e 3 0 lt switch control current xload voltage v4 4 0 DC 2 0 input load for current source 13 r3 3 33 10k vm3 33 0 dc 0 lt measure the current ouput load resistors rlO 4 10 10k r20 4 20 10k r30 4 30 10k r40 4 40
475. ng to DC analysis and algorithms Since transient analysis is based on DC many of the options affect the latter one ABSTOL x resets the absolute current error tolerance of the program The default value is 1 pA GMIN x resets the value of GMIN the minimum conductance allowed by the program The default value is 1 0e 12 ITL1 x resets the dc iteration limit The default is 100 15 1 SIMULATOR VARIABLES OPTIONS 223 ITL2 x resets the dc transfer curve iteration limit The default is 50 KEEPOPINFO Retain the operating point information when either an AC Distortion or Pole Zero analysis is run This is particularly useful if the circuit is large and you do not want to run a redundant OP analysis PIVREL x resets the relative ratio between the largest column entry and an acceptable pivot value The default value is 1 0e 3 In the numerical pivoting algorithm the allowed min imum pivot value is determined by EPSREL AMAX1 PIVREL MAXVAL PIVTOL where MAXVAL is the maximum element in the column where a pivot is sought partial pivoting PIVTOL x resets the absolute minimum value for a matrix entry to be accepted as a pivot The default value is 1 0e 13 RELTOL x resets the relative error tolerance of the program The default value is 0 001 0 1 RSHUNT x introduces a resistor from each analog node to ground The value of the resistor should be high enough to not interfere with circuit operations VNTOL x resets the absolu
476. ngs as the parameter names parameter default values and the name of the model itself The specific format presented to you in the Interface Specification File template must be followed exactly but is quite straightforward A detailed description of the required syntax along with numerous examples is included in Section 27 6 The Model Definition File contains a C programming language function definition This func tion specifies the operations to be performed within the model on the data passed to it by the simulator Special macros are provided that allow the function to retrieve input data and return output data Similarly macros are provided to allow for such things as storage of information between iteration time points and sending of error messages Section 27 7 describes the form and function of the Model Definition File in detail and lists the support macros provided within the simulator for use in code models To allow compiling and linking see chapt 27 5 you have at least to adapt the names of the functions inside of the two copied files to get unique function and model names If for example you have chosen ifspec ifs and cfunc mod from model d_fdiv as your template simply replace all entries d_fdiv by d_counter inside of the two files 27 3 Creating User Defined Nodes In addition to providing the capability of adding new models to the simulator a facility exists which allows node types other than those found in standard SPICE to
477. ning with column 2 A name field must begin with a letter A through Z and cannot contain any delimiters A number field may be an integer field 12 44 a floating point field 3 14159 either an integer or floating point number followed by an integer exponent le 14 2 65e3 or either an integer or a floating point number followed by one of the following scale factors Suffix Name Factor T Tera 102 G Giga 10 Meg Mega 106 K Kilo 105 mil Mil 25 4x 1079 m milli 1073 u micro 1076 n nano 10 p pico 10717 f femto 10755 Table 2 1 Ngspice scale factors Letters immediately following a number that are not scale factors are ignored and letters im mediately following a scale factor are ignored Hence 10 10V 10Volts and 10Hz all represent the same number and M MA MSec and MMhos all represent the same scale factor Note that 1000 1000 0 1000Hz 1e3 1 0e3 1kHz and 1k all represent the same number Nodes names may be arbitrary character strings and are case insensitive The ground node must be named 0 zero For compatibility reason gnd is accepted as ground node and will internally be treated as a global node and be converted to 0 Each circuit has to have a ground node gnd or 0 Note the difference in ngspice where the nodes are treated as character strings and not evaluated as numbers thus 0 and 00 are distinct nodes in ngspice bu
478. nn Jeffrey M Hsu JianHui Huang S Hwang Chris Inbody Gordon M Jacobs Min Chie Jeng 29 30 Beorn Johnson Stefan Jones Kenneth H Keller Robert Larice Mathew Lew Robert Lindsell Weidong Liu Kartikeya Mayaram Richard D McRoberts Manfred Metzger Wolfgang Muees Paolo Nenzi Gary W Ng Hong June Park Stefano Perticaroli Arno Peters Serban Mihai Popescu Georg Post Thomas L Quarles Emmanuel Rouat Jean Marc Routure Jaijeet S Roychowdhury Lionel Sainte Cluque Takayasu Sakurai Amakawa Shuhei Kanwar Jit Singh Bill Swartz Hitoshi Tanaka Steve Tell Andrew Tuckey Andreas Unger Holger Vogt Dietmar Warning Michael Widlok Charles D H Williams CONTENTS CONTENTS 31 Antony Wilson and many others If someone helped in the development and has not been inserted in this list then this omis sion was unintentional If you feel you should be on this list then please write to lt ngspice devel lists sourceforge net gt Do not be shy we would like to make a list as complete as possible XSPICE The XSPICE simulator is based on the SPICE3 program developed by the Electronics Research Laboratory Department of Electrical Engineering and Computer Sciences University of Cali fornia at Berkeley The authors of XSPICE gratefully acknowledge UC Berkeley s development and distribution of this software and their licensing policies which promote further improve ments to
479. node described in chapter 15 5 2 like vdb 2 see example above 15 3 2 DC DC Transfer Function General form de srcnam vstart vstop vincr src2 start2 stop2 incr2 Examples de VIN 0 25 5 0 0 25 dc VDS 0 10 5 VGS 05 1 dc VCE 0 10 25 IB O 10U 1U dc RLoad 1k 2k 100 dc TEMP 15 75 5 The dc line defines the dc transfer curve source and sweep limits again with capacitors open and inductors shorted srcnam is the name of an independent voltage or current source a resistor or the circuit temperature vstart vstop and vincr are the starting final and in crementing values respectively The first example causes the value of the voltage source VIN to be swept from 0 25 Volts to 5 0 Volts in increments of 0 25 Volts A second source src2 may optionally be specified with associated sweep parameters In this case the first source is swept over its range for each value of the second source This option can be useful for obtaining semiconductor device output characteristics See the example circuit description on transistor characteristics 20 3 15 3 3 DISTO Distortion Analysis General form disto dec nd fstart fstop lt f2overfl gt disto oct no fstart fstop lt f2overfl gt disto lin np fstart fstop lt f2overfl gt Examples disto dec 10 1kHz 100Mhz disto dec 10 1kHz 100Mhz 0 9 The disto line does a small signal distortion analysis of the circuit A multi dimensional Volterra series analysis is do
480. nom avar nom avar sunif 0 gauss nom var sig nom nomx var sig sgauss 0 agauss nom avar sig nom avar sig sgauss 0 dowhile run lt mc_runs alter cl unif le 09 0 1 alter 11 aunif 10e 06 2e 06 alter c2 aunif le 09 100e 12 alter 12 unif l0e 06 0 2 alter 13 aunif 40e 06 8e 06 alter c3 unif 250e 12 0 15 alter cl gauss le 09 0 1 3 alter 11 agauss 10e 06 2e 06 3 alter c2 agauss le 09 100e 12 3 alter 12 gauss 10e 06 0 2 3 alter 13 agauss 40e 06 8e 06 3 alter c3 gauss 250e 12 0 15 3 ac oct 100 250K 10Meg set run amp run create a variable from the vector set dt curplot store the current plot to dt setplot scratch make scratch the active plot x store the output vector to plot scratch let vout run dt v out setplot dt go back to the previous plot let run run 1 end plot db scratch all endc end 21 6 DATA EVALUATION WITH GNUPLOT 355 21 5 2 Example 2 A more sophisticated input file for Monte Carlo simulation is distributed with the file exam ples Monte_Carlo MCring sp or CVS repository Due to its length it is not reproduced here but some comments on its enhancements over example 1 21 5 1 are presented in the following A 25 stage ring oscillator is the circuit used with a transient simulation It comprises of CMOS inverters modeled with BSIM3 Several model par
481. nput than a console would offer e g command line inputs command history and program text output First of all it applies the Windows api for data plotting If you run the sample input file given below you will get an output as shown in fig 16 1 Input file x Single NMOS Transistor For BSIM3V3 1 general purpose check Id Vd xx x xxx circuit description ml 2 1 3 0 nl L 0 6u W 10 0u vgs vds VSS x de vds 0 3 5 0 05 vgs 0 3 5 0 5 x control run plot vss branch endc x x UCB parameters BSIM3v3 2 include Exam_BSIM3 Modelcards modelcard nmos include Exam_BSIM3 Modelcards modelcard pmos x end a 3 UN oo o O uy wow 321 322 CHAPTER 18 NGSPICE USER INTERFACES The GUI consists of an I O port lower window and a graphics window created by the plot command W dc1 single nmos transistor for bsim3v3 1 general purpose check id vd Verschieben Gr be ndern Minimieren O Maximieren X Schlie en Printer Printer setup Postscript file color Postscript file bw The U C Berkeley CAD Group Copyright 1985 1994 Regents of the University of California Please submit bug reports to ngspice bugs lists sourceforge net Creation Date Wed Nov 18 19 14 11 GMT 2009 KEEKEKE Circuit single nmos transistor for bsim3v3 1 general purpose check id vd ngspice 1 gt run Doing analysis at TEMP 27 000000 and TNOM 27 000000 is less than Y
482. nt 118 rb InOut real Zero bias base resistance 119 irb InOut real Current for base resistance rb rbm 2 120 rom InOut real Minimum base resistance 121 re InOut real Emitter resistance 122 rc InOut real Collector resistance 123 cje InOut real Zero bias B E depletion capacitance 124 vje InOut real B E built in potential 124 pe InOut real 125 mje InOut real B E junction grading coefficient 125 me InOut real 30 4 BJTS 497 126 tf InOut real Ideal forward transit time 127 xtf InOut real Coefficient for bias dependence of TF 128 vtf InOut real Voltage giving VBC dependence of TF 129 itf InOut real High current dependence of TF 130 ptf InOut real Excess phase 131 eje InOut real Zero bias B C depletion capacitance 132 vje InOut real B C built in potential 132 pe InOut real 133 mjc InOut real B C junction grading coefficient 133 me InOut real 134 xcje InOut real Fraction of B C cap to internal base 135 tr InOut real Ideal reverse transit time 136 cjs InOut real Zero bias Substrate capacitance 136 csub InOut real 137 vjs InOut real Substrate junction built in potential 137 ps InOut real 138 mjs InOut real Substrate junction grading coefficient 138 ms InOut real 139 xtb InOut real
483. nt are enabled RAMPTIME x this options sets the rate of change of independent supplies and code model inductors and capacitors with initial conditions specified SRCSTEPS x a non zero value causes SPICE to use a source stepping method to find the DC operating point Its value specifies the number of steps TRTOL x resets the transient error tolerance The default value is 7 This parameter is an esti mate of the factor by which ngspice overestimates the actual truncation error If XSPICE is enabled and A devices included the value is internally set to 1 for higher precision This will cost a factor of two in cpu time during transient analysis 15 1 4 MOSFET Specific options BADMOS3 Use the older version of the MOS3 model with the kappa discontinuity DEFAD x resets the value for MOS drain diffusion area the default is 0 0 DEFAS x resets the value for MOS source diffusion area the default is 0 0 DEFL x resets the value for MOS channel length the default is 100 0 um DEFW x resets the value for MOS channel width the default is 100 0 um 15 2 INITIAL CONDITIONS 225 15 1 5 Transmission Lines Specific Options TRYTOCOMPACT Applicable only to the LTRA model see 6 2 1 When specified the simulator tries to condense LTRA transmission line s past history of input voltages and currents 15 1 6 Precedence of option and options commands There are various ways to set the above mentioned options in Ngspice If no opt
484. nt have been assessed spice vectoblt frequency freq Room the graph in the display window pack freqanal Plot the function Iex f V freqanal element create linel xdata freq ydata lex Second simulation Capacitance versus voltage control for set i 0 expr n i incr i set v expr vmin i x pas spice alter vd v spice op spice ac dec 10 100 100k Image capacitance is calculated by spice instead of TCL there is no objective reason spice let Cim real mean Vex branch 2 Pixixfrequency V 5 V 6 spice vectoblt Cim Ctmp Build function vector point by point Cim append Ctmp 0 end Build a control vector to check simulation success 19 5 EXAMPLES 331 spice let err real mean sqrt Vex branch 2 Pixixfrequency Cim V 5 V 6 2 spice vectoblt err Ctmp check append Ctmp 0 end Build abscissa vector FALTA ALGO Vcmd append v Plot pack cimvd cimvd element create linel xdata Vcmd ydata Cim pack checkvd checkvd element create linel xdata Vcmd ydata check 19 5 2 Optimization of a linearization circuit for a Thermistor This example is both the first and the last optimization program I wrote for an electronic circuit It is far from perfect The temperature response of a CTN is exponential It is thus nonlinear In a battery charger application floating voltage varies linearly with temperature A TL431 volt
485. nt publication 1 has described a way to exactly do that using OpenMP which is available on many platforms and is easy to use especially if you want to parallel processing of a for loop I have chosen the BSIM3 version 3 3 0 model located in the BSIM3 directory as the first example The BSIM3load function in b3ld c contains two nested for loops using linked lists models and instances e g individual transistors Unfortunately OpenMP requires a loop with an integer index So in file B3set c an array is defined filled with pointers to all instances of BSIM3 and stored in model gt BSIM3InstanceArray BSIM3load is now a wrapper function calling the for loop which runs through functions BSIM3LoadOMP once per instance Inside BSIM3LoadOMP the model equations are cal culated Typically you now need to synchronize the activities in that storing the results into the matrix has to be guarded The trick offered by the authors now is that the storage is moved out of the BSIM3LoadOMP function Inside BSIM3LoadOMP the updated data are stored in extra locations locally per instance defined in bsim3def h Only after the complete for loop is exer cised the update to the matrix is done in an extra function BSIM3LoadRhsMat in the main thread after the paralleled loop No extra synchronization is required Then the thread programming needed is only a single line pragma omp parallel for num_threads nthreads private here introducing th
486. nts set res_temp expr res exp B x 1 tzero t 1 tzero tref J set thermistance thermistance res_temp return thermistance moe generates the expected floating value as a vector typically run tref_calc res B tempera tures_calc temp_inf temp_sup points proc tref_calc points set tref foreach t points set tref tref expr 6 x 2 275 0 005 t 20 9 return tref In the optimization algorithm this function computes the effective floating voltage at the given temperature NOTE As component values are modified by a spice alter Component values can be considered as global variable R1O and R12 are not passed to iteration function because it is expected to be correct ie to have been modified soon before proc iteration t set tzero 273 15 spice alter rll thermistance_calc 10000 3900 t Temperature simulation often crashes Comment it out spice set temp expr tzero t Spice op spice vectoblt vref_temp tref_tmp NOTE As the library is executed once for the whole script execution it is important to manage the memory and regularly destroy unused data set The data computed here will not be reused Clean it spice destroy all return tref_tmp range 0 O This is the cost function optimization algorithm will try to minimize Itis a square norm of the error across the
487. nts B E G are described in chapter 5 4 2 1 Linear Voltage Controlled Current Sources VCCS General form GXXXXXXX N N NC NC VALUE Examples Gl 2 0 5 0 0 1MMHO n and n are the positive and negative nodes respectively Current flow is from the positive node through the source to the negative node nc and nc are the positive and negative controlling nodes respectively value is the transconductance in mhos 4 2 2 Linear Voltage Controlled Voltage Sources VCVS General form EXXXXXXX N N NC NC VALUE Examples El 23 14 1 2 0 n is the positive node and n is the negative node nc and nc are the positive and negative controlling nodes respectively value is the voltage gain 84 CHAPTER 4 VOLTAGE AND CURRENT SOURCES Dependent Polynomial Sources Source Type Instance Card POLYNOMIAL VCVS EXXXXXXX N N POLY ND NC1 NC1 PO P1 POLYNOMIAL VCCS GXXXXXXX N N POLY ND NC1 NC1 PO P1 POLYNOMIAL CCCS FXXXXXXX N N POLY ND VNAM1 VNAM2 PO P1 POLYNOMIAL CCVS HXXXXXXX N N POLY ND VNAM1 VNAM2 PO P1 Table 4 1 Dependent Polynomial Sources 4 2 3 Linear Current Controlled Current Sources CCCS General form FXXXXXXX N N VNAM VALUE Examples Fl 13 5 VSENS 5 n and n are the positive and negative nodes respectively Current flow is from the positive node through the source to the negative node vnam is the
488. nual for compiling instructions If you want to check out the source code which is actually under development you may have a look at the ngspice source code repository which is stored using the concurrent version system CVS The CVS repository may be browsed on the CVS web page also useful for downloading individual files You may however download or check out the complete source code tree from the console window LINUX CYGWIN or MSYS MINGW by issuing the command in a single line 247 248 CHAPTER 16 STARTING NGSPICE cvs z3 d pserver anonymous ngspice cvs sourceforge net cvsroot ngspice 1f co P ngspice ng spice rework You need to have CVS installed which is available for all three OSs The whole source tree is then available in lt current directory gt ngspice ng spice rework Compilation and local installa tion is again described in INSTALL or chapter 31 If you later want to update your files and download the recent changes from the repository cd into the ng spice rework directory and just type cvs z3 d pserver anonymous ngspice cvs sourceforge net cvsroot ngspice lf update d P 16 3 Command line options for starting ngspice and ngnut meg Command Synopsis ngspice o logfile r rawfile b i input file ngnutmeg datafile Options are 16 3 COMMAND LINE OPTIONS FOR STARTING NGSPICE AND NGNUTMEG 249 Option Long option Meaning Don t try
489. o be data files in binary or ASCII raw file format generated with r in batch mode or the write see 17 5 82 command which are loaded into ngnutmeg If the file is in binary format it may be only partially completed useful for exam ining output before the simulation is finished One file may contain any number of data sets from different analyses 16 4 Starting options 16 4 1 Batch mode Let s take as an example the Four Bit binary adder MOS circuit shown in chapter 20 6 stored in a file adder mos cir You may start the simulation immediately by calling ngspice b r adder raw o adder log adder mos cir ngspice will start simulate according to the tran command and store the output data in a rawfile adder raw Comments warnings and infos go to log file adder log Commands for batch mode operation are described in chapt 15 16 4 2 Interactive mode If you call ngspice adder mos cir ngspice will start load the circuit file parse the circuit same circuit file as above containing only dot commands see chapt 15 for analysis and output control ngspice then just waits for your input You may start the simulation by issuing the run command Following completion of the simulation you may analyze the data by any of the commands given in chapter 17 5 16 4 3 Interactive mode with control file or control section If you add the following control section to your input file adder mos cir you may call ngspice adder mos cir and se
490. o zero as possible is calculated to assess simulation success 19 5 1 1 Invocation This script can be invoked by typing wish testbench1 tcl 19 5 1 2 testbench1 tcl This line loads the simulator capabilities package require spice This is a comment Quite useful if you intend to live with other Human beings Test of virtual capacitore circuit Vary the control voltage and log the resulting capacitance A good example of the calling of a spice command precede it with spice Spice source testCapa cir This reminds that any regular TCL command is of course possible set n 30 set dv 0 2 set vmax expr dv 2 set vmin expr 1 dv 2 set pas expr dv n BLT vector is the structure used to manipulate data Instantiate the vectors blt vector create Ctmp blt vector create Cim blt vector create check blt vector create Vcmd Data is in my coding style plotted into graph objects Instantiate the graph 330 CHAPTER 19 TCLSPICE blt graph cimvd title Cim f Vd blt graph checkvd title Rim f Vd blt vector create lex blt vector create freq blt graph freqanal title Analyse frequentielle First simulation A simple AC plot set v expr vmin n pas 4 spice alter vd v Spice op spice ac dec 10 100 100k Retrieve a the intensity of the current across Vex source Spice vectoblt Vex branch lex Retrieve the frequency at which the curre
491. oad value F real 1 0e 12 no yes 189 no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital xor gate is an n input single output xor gate which produces an active 1 value if an odd number of its inputs are also 1 values The delays associated with an output rise and those associated with an output fall may be specified indepen dently The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Note also that to maintain the technology independence of the model any UNKNOWN input or any floating input causes the output to also go UNKNOWN Example SPICE Usage a9 1 2 8 xor3 model xor3 d_xor rise_delay input_load 12 4 8 Xnor NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector 0 5e 12 cm_d_xnor d_xnor 0 5e 9 fall _ delay 0 3e 9 digital exclusive nor gate in input in d a yes out output out d d no 190 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds 2 Null Allowed no no PARAMETER_TABLE Parameter Name rise_delay fall_delay Description rise delay fall delay Data_Type real real D
492. ode described in the respective line area is the area scale factor which may scale the saturation current given by the model parameters and others see table below pj is the perimeter scale factor scaling the sidewall saturation current and it s associated capacitance m is a multiplier to area and perimeter and off indicates an optional starting condition on the device for de analysis If the area factor is omitted a value of 1 0 is assumed The optional initial condition specification using ic is intended for use with the uic option on the tran control line when a transient analysis is desired starting from other than the quiescent operating point You should supply the initial voltage across the diode there The optional temp value is the temperature at which this device is to operate and overrides the temperature specification on the option control line The temperature of each instance can be can be specified as an offset to the circuit temperature with the dtemp option 7 2 Diode Model D The dc characteristics of the diode are determined by the parameters is and n An ohmic resis tance rs is included Charge storage effects are modeled by a transit time tt and a nonlinear depletion layer capacitance which is determined by the parameters cjo vj and m The temper ature dependence of the saturation current is defined by the parameters eg the energy and xti 101 102 CHAPTER 7 DIODES the saturation current temper
493. odel gain The ngspice circuit description for this circuit is shown below 383 384 CHAPTER 26 EXAMPLE CIRCUITS Example A transistor amplifier circuit x tran le 5 2e 3 x vin 1 0 0 0 ac 1 0 sin O 1 1k k ccouple 1 in 10uF rzin in 0 19 35k k aamp in aout gain_block model gain_block gain gain 3 9 out_offset 7 003 rzout aout coll 3 9k rbig coll O lel2 end Notice the component aamp This is an XSPICE code model device All XSPICE code model devices begin with the letter a to distinguish them from other ngspice devices The actual code model used is referenced through a user defined identifier at the end of the line in this case gain_block The type of code model used and its parameters appear on the associated model card In this example the gain has been specified as 3 9 to approximate the gain of the transistor amplifier and the output offset out_offset has been set to 7 003 according to the DC bias point information obtained from the DC analysis in Example 1 Notice also that input and output impedances of the one transistor amplifier circuit are modeled with the resistors rzin and rzout since the gain code model defaults to an ideal voltage input voltage output device with infinite input impedance and zero output impedance Lastly note that a special resistor rbig with value le12 has been included at the opposite side of the output impedance resistor rzout This resist
494. odel Definition File lt sa sacs a eee OSS ee ode eee Set A Matos o coa eR eR ER SER AEE ER ES a ERE ESS pe Library MAA 27 8 User Defined Node Definition File lt lt o lt lt 0 0 AAA A 282 Putcliot Library o se acara denada ie a a a 27 8 3 Example UDN Definition File 19 367 369 369 369 370 371 371 371 377 377 379 383 383 385 385 388 20 CONTENTS 28 Error Messages 427 28 1 Preprocessor Error Messages cw ok s mos RR AAA 427 28 2 seo Ertor Messages lt lt a Hae aa 432 28 3 Cod Model Minor Mess g s 0 es c aa A a 433 25 3 1 Code Model BWC 2c cos e bbe bbe eda a 433 28 3 2 Code Model climit 4 24424 24 698 6 Se SERED SEER eaaa 434 28 3 3 Code Model coe 2 4 44 44464846440 eh eehPEehES 434 28 3 4 Code Model 0 066 lt lt bk keke Eee we EER Eee EER ES 434 28 3 5 Code Model SOE esa cco See oe Bad Ree ee HR 435 28 36 Code Model d state og ek Be ee RR Ee OR eee we HS 435 28 3 71 Code Model MR 436 25 38 Code Model pwl cocodrilo 436 25 3 9 Code M del s xfer ee socs sacs saci sacs oS ERR E 436 28 3 10 Code Model sine naaa e 437 28 3 11 Code Model square kk he ee 437 28 3 12 Cod Model miangle o oro sdo ah wt BH Re Taria 438 HI CIDER 439 29 CIDER User s Manual 441 29 1 SPECIFICATION 645 55 444 2644 44h GSR E4hSeREEEGESSES 441 E A A 442 29 2 BOUNDARY INTERFACE oso Roe ee Re REDE EH ROD ES 443 292 1 DESCRIPTION pecs eu 24 m GR RED RGR ARA 443 2922
495. odel to modify the delays it posts with its output states and strengths Note that this macro can also be used by non digital event driven code models see LOAD above 27 7 MODEL DEFINITION FILE 409 27 7 1 5 Input Data INPUT a INPUT_STATE a INPUT_STRENGTH a INPUT a resolves to the value of the scalar input a that was defined in the Interface Spec ification File tables a can be either a scalar port or a port value from a vector in the latter case the notation used would be a i where 1 is the index value for the port The type of a is the type given in the ifspec ifs file The same accessor macro can be used regardless of type INPUT_STATE a resolves to the state value defined for digital node types These will be one of the symbolic constants ZERO ONE or UNKNOWN INPUT_STRENGTH a resolves to the strength with which a digital input node is being driven This is determined by a resolution algorithm which looks at all outputs to a node and determines its final driven strength This value in turn is passed to a code model when requested by this macro Possible strength values are 1 STRONG 2 RESISTIVE 3 HI_IMPEDANCE 4 UNDETERMINED 27 7 1 6 Output Data OUTPUT y OUTPUT _CHANGED a OUTPUT_DELAY y OUTPUT_STATE a OUTPUT_STRENGTH a OUTPUT y resolves to the value of the scalar output y that was defined in the Interface Specification File tables The type of y
496. of fered by XSPICE This circuit is a mixed mode design incorporating digital data analog data and User Defined Node data together in the same simulation Some of the important features illustrated include e Creating and compiling Code Models e Creating an XSPICE executable that incorporates these new models The use of node bridge models to translate data between the data types in the simulation e Plotting analog and event driven digital and User Defined Node data e Using the eprint command to print event driven data Throughout these examples we assume that ngspice with XSPICE option has already been installed on your system and that your user account has been set up with the proper search path and environment variable data The examples also assume that you are running under LINUX and will use standard LINUX commands such as cp for copying files etc If you are using a different set up with different operating system command names you should be able to translate the commands shown into those suitable for your installation Finally file system path names given in the examples as sume that ngspice XSPICE has been installed on your system in directory usr local xspice 1 0 If your installation is different you should substitute the appropriate root path name where appropriate 26 1 Amplifier with XSPICE model gain The circuit as has been shown in Figure 25 2 is extended here by using the XSPICE code m
497. of input 15 3 ANALYSES 231 15 3 8 TF Transfer Function Analysis General form tf outvar insrc Examples tf v 5 3 VIN tf i VLOAD VIN The tf line defines the small signal output and input for the de small signal analysis outvar is the small signal output variable and insrc is the small signal input source If this line is included ngspice computes the dc small signal value of the transfer function output input input resistance and output resistance For the first example ngspice would compute the ratio of V 5 3 to VIN the small signal input resistance at VIN and the small signal output resistance measured across nodes 5 and 3 15 3 9 TRAN Transient Analysis General form tran tstep tstop lt tstart lt tmax gt gt lt uic gt Examples tran Ins 100ns tran Ins 1000ns 500ns tran 10ns lus tstep is the printing or plotting increment for line printer output For use with the post processor tstep is the suggested computing increment tstop is the final time and tstart 1s the initial time If tstart is omitted it is assumed to be zero The transient analysis always begins at time zero In the interval lt zero tstart gt the circuit is analyzed to reach a steady state but no outputs are stored In the interval lt tstart tstop gt the circuit is analyzed and outputs are stored tmax is the maximum stepsize that ngspice uses for default the program chooses either tstep or tstop tstart 50 0 whichev
498. ollowing condi tions hold 1 The nonlinear branch currents converge to within a tolerance of 0 1 or 1 picoamp 1 0e 12 Amp whichever is larger 2 The node voltages converge to within a tolerance of 0 1 or 1 microvolt 1 0e 6 Volt whichever is larger 1 4 1 Voltage convergence criterion The algorithm has reached convergence if the difference between the last iteration k and the current one k 1 YD _ 1 lt RELTOLx vna VNTOL 1 7 where Vanas max vf Lyf 1 8 The RELTOL RELative TOLerance parameter which default value is 1073 specifies how small the solution update must be relative to the node voltage to consider the solution to have con verged The VNTOL absolute convergence parameter which has 1uV as default becomes im portant when node voltages have near zero values The relative parameter alone in such case would need too strict tolerances perhaps lower than computer round off error and thus conver gence would never be achieved VNTOL forces the algorithm to consider as converged any node whose solution update is lower than its value 1 4 2 Current convergence criterion Ngspice checks the convergence on the non linear functions that describe the non linear branches in circuit elements In semiconductor devices the functions defines currents through the device and thus the name of the criterion 1 4 CONVERGENCE 43 Ngspice computes the difference between the value of the nonline
499. om 20k to 500k meas ac freq_at2 when v out 0 1 fall LAST meas ac bw_chk param vout_diff lt 100k 1 0 meas ac vout_rms rms v out from 10 to 1G 15 5 Batch Output 15 5 1 SAVE Name vector s to be saved in raw file General form save vector vector vector Examples save 1 vin input output save Omll id save all m2 vdsat 15 5 BATCH OUTPUT 243 The vectors listed on the SAVE line are recorded in the rawfile for use later with ngspice or ngnutmeg ngnutmeg is just the data analysis half of ngspice without the ability to simulate The standard vector names are accepted If no SAVE line is given then the default set of vectors are saved node voltages and voltage source branch currents If SAVE lines are given only those vectors specified are saved For more discussion on internal device data e g m1 id see Appendix chapt 30 If you want to save internal data in addition to the default vector set add the parameter all to the vectors to be saved See also the section on the interactive command interpreter chapter 17 5 for information on how to use the rawfile 15 5 2 PRINT Lines General form print prtype ovl lt ov2 0v8 gt Examples print tran v 4 i vin print de v 2 i vsre v 23 17 print ac vm 4 2 vr 7 vp 8 3 The print line defines the contents of a tabular listing of one to eight output variables prtype 1s the type of the analysis DC AC TRAN NOISE or DIST
500. om a tarball or the actual CVS source code which you may find on the ngspice web pages If you are running a specific LINUX distribution you may check if it provides ngspice as part of the package Some are listed here Part I Ngspice User Manual Contents I Ngspice User Manual 1 Introduction 1 1 1 2 1 3 1 4 Simulation Algorithms s e ese eh nee eh eee dana ls 1 1 1 Analog Simulation 2 kee he hee he ee ER REESE RSS 1 12 Digital SON gt sa Sow a al Boe a a BO 1 1 3 Mixed Mode Simulation 1 14 Mixed Level Simulation 2 oo e sis be dae Supported Analyses lt o o a ooe GG Se acess Ge ke GOR d GOR FSM He Gre FSR S a 121 DAM eee ie bod ee oR RRR AER EE DEER EE SS 1 2 2 AC Small Signal Analysis 2 2 ec ee ee ees 1 2 3 Transient Analysis 2 424 44 404 44444 he 4h G4 ss 124 POle ety Analysis o o aoe a oho e ae oh ot wae a ew da es 1 2 5 Small Signal Distortion Analysis 1 2 6 Sensitivity Analysis socias AAA 1 2 7 Noise Analysis gt ss sa ccs Be ye cesena OS KR OH tania 1 2 8 Periodic Steady State Analysis o a Analysis at Different Temperatures o oo 200 o AN 1 4 1 Voltage convergence criterion 2 2 Lk sas eee ee ee es 1 4 2 Current convergence criterion LAS COMITE Ge s eo s aosa moa aoi Ae eae eee es 2 Circuit Description 2 1 2 2 General Structure and Conventions so oo e e Pasic Mes o cea awr aee
501. on layer width 139 alpha InOut real Alpha 127 eta InOut real Vds dependence of threshold voltage 128 delta InOut real Width effect on threshold 140 input_delta InOut real 130 theta InOut real Vgs dependence on mobility 132 kappa InOut real Kappa 141 thom InOut real Parameter measurement temperature 142 kf InOut real Flicker noise coefficient 143 af InOut real Flicker noise exponent 30 5 MOSFETS 513 30 5 4 MOS6 Level 6 MOSFET model with Meyer capacitance model 30 5 4 1 MOS6 instance parameters Name Direction Type Description l InOut real Length liw InOut real Width 22 m InOut real Parallel Multiplier 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 215 id Out real Drain current 215 cd Out real Drain current 18 is Out real Source current 17 ig Out real Gate current 16 ib Out real Bulk current 216 ibs Out real B S junction capacitance 217 ibd Out real B D junction capacitance 231 vgs Out real Gate Source voltage 232 vds Out real Drain Source voltage 230 vbs Out real Bulk Source voltage 229 vbd Out real Bulk Drain voltage 8 nrd InOut real Drain squares 7 nrs InOut real Source squares 9 off In flag Device initially off 12 icv
502. on places the peak outside the constant box cf Fig 29 1 and a negative value puts it inside the constant box cf Fig 29 2 The concentration in the constant box is then equal to the value of the profile when it intersects the edge of the constant box The argument of the profile function is a distance expressed in terms of the characteristic length by default equal to 1um The longer this length the more gradually the profile will change For example in Fig A 1 and Fig A 2 the profiles marked a have characteristic lengths twice those of the profiles marked b The location and characteristic length for the lateral profile are multiplied by the lateral ratio This allows the use of different length scales for the primary and lateral profiles For rotated profiles this scaling is taken into account and the profile contours are elliptical rather than circular 29 6 DOPING 449 N X ae AAA Peak Conc X Low X High X um Location Figure 29 2 1D doping profiles with location lt 0 450 CHAPTER 29 CIDER USER S MANUAL 29 6 2 PARAMETERS Name Type Description Domains Int List List of domains to dope Uniform Flag Primary profile type Linear Erfc Exponential Suprem3 Ascil Ascii Suprem3 InFile String Name of Suprem3 Ascii or Ascii Suprem3 input file Lat Rotate Flag Lateral profile type Lat Unif Lat Lin Lat Gauss Lat Erfc Lat Exp X Axis Y Axis Flag Primar
503. on the model line e level 2 This is a modified version of the original spice BJT that models both vertical and lateral devices and includes temperature corrections of collector emitter and base resistors 109 110 CHAPTER 8 BJTS e level 4 Advanced VBIC model see http www designers guide org VBIC for details The bipolar junction transistor model in ngspice is an adaptation of the integral charge control model of Gummel and Poon This modified Gummel Poon model extends the original model to include several effects at high bias levels The model automatically simplifies to the simpler Ebers Moll model when certain parameters are not specified The parameter names used in the modified Gummel Poon model have been chosen to be more easily understood by the program user and to reflect better both physical and circuit design thinking The dc model is defined by the parameters is bf nf ise ikf and ne which determine the forward current gain characteristics is br nr isc ikr and nc which determine the reverse current gain characteristics and vaf and var which determine the output conductance for forward and reverse regions Level 1 model has among the standard temperature model a extension which is compatible with most foundry provided process design kits see parameter table below tlev Level 1 and 2 model includes substrate saturation current iss Three ohmic resistances rb rc and re are included where rb can be high curr
504. onal parameters may be specified for some devices geometric factors and an initial condition see the following section on Transistors 8 to 11 and Diodes 7 for more details mname in the above is the model name and type is one of the following fifteen types Parameter values are defined by appending the parameter name followed by an equal sign and the parameter value Model parameters that are not given a value are assigned the default values 2 4 SUBCIRCUITS Code Model Type R Semiconductor resistor model C Semiconductor capacitor model L Inductor model SW Voltage controlled switch CSW Current controlled switch URC Uniform distributed RC model LTRA Lossy transmission line model D Diode model NPN NPN BJT model PNP PNP BJT model NJF N channel JFET model PJF P channel JFET model NMOS N channel MOSFET model PMOS P channel MOSFET model NMF N channel MESFET model PMF P channel MESFET model Table 2 2 Ngspice model types 49 given below for each model type Models are listed in the section on each device along with the description of device element lines Model parameters and their default values are given in chapter 30 2 4 Subcircuits A subcircuit that consists of ngspice elements can be defined and referenced in a fashion similar to device models Subcircuits are the way ngspice implements hierarchical modeling but this is not entirely true because each sub
505. ond set The else and the second set of statements may be omitted 17 6 6 Label General Form label word If a statement of the form goto word is encountered control is transferred to this point otherwise this is a no op 302 CHAPTER 17 INTERACTIVE INTERPRETER 17 6 7 Goto General Form goto word If a statement of the form label word is present in the block or an enclosing block control is transferred there Note that if the label is at the top level it must be before the goto statement i e a forward goto may occur only within a block A block to just include goto on the top level may look like Example noop block to include forward goto on top level if 1 goto gohere label gohere end 17 6 8 Continue General Form continue If there is a while dowhile or foreach block enclosing this statement control passes to the test or in the case of foreach the next value is taken Otherwise an error results 17 6 9 Break General Form break If there is a while dowhile or foreach block enclosing this statement control passes out of the block Otherwise an error results Of course control structures may be nested When a block is entered and the input is the terminal the prompt becomes a number of gt s corresponding to the number of blocks the user has entered The current control structures may be examined with the debugging command cdump see 17 5 9 17 7 Variables The operation of both ng
506. one to define new models and node data types to be passed between them offline independent from ngspice Whereas this Toolkit is still available in the original source code distribution at the XSPICE web page it is neither required nor supported any more So we make use of the existing XSPICE infrastructure provided with ngspice to create new code models With an intelligent copy and paste and the many available code models serving as a guide you will be quickly able to create your own models You have to have a compiler gcc available under LINUX MS Windows Cygwin MINGW maybe also for other OSs including supporting software Flex Bison and the autotools if you start from CVS sources The compilation procedures for ngspice are described in detail in chapter 31 Adding a code model may then require defining the functionality interface and eventually user defined nodes Compiling into a shared library is only a simple make loading the shared lib s into ngspice is done by the ngspice command codemodel see chapt 17 5 10 This will allow you to either add some code model to an existing library or you may generate a new library with your own code models The latter is of interest if you want to distribute your code models independently from the ngspice sources or executables These new code models are handled by ngspice in a manner analogous to its treating of SPICE devices and XSPICE Predefined Code Models The basic steps re
507. ons here Accessing a parameter value from the model card p PARAM gain Accessing a vector parameter from the model card for i 0 i lt PARAM _SIZE Cin_offset i p PARAM in_offset il Accessing the value of a simple real valued input x INPUT a Accessing a vector input and checking for null port if PORT_NULL a for i 0 i lt PORT SIZE Ca i x INPUT a il Accessing a digital input x INPUT a Accessing the value of a User Defined Node input This node type includes two elements in its definition a_ptr INPUT a x a_ptr gt componentl y a_ptr gt component2 Outputting a simple real valued result OUTPUT out1 0 0 Outputting a vector result and checking for null if PORT_NULL a for i 0 i lt PORT SIZE a i 406 CHAPTER 27 CODE MODELS AND USER DEFINED NODES OUTPUT Ca lil 0 0 Outputting the partial of output outi w r t input a PARTIAL out1 a PARAM gain Outputting the partial of output out2 i w r t input b j for i 0 i lt PORT_SIZE out2 i for j 0 j lt PORT_SIZE b j PARTIAL out2 i b j 0 0 Outputting gain from input c to output out3 in an AC analysis complex_gain_real 1 0 complex_gain_imag 0 0 AC_GAIN out3 c complex_gain Outputting a digital result OUTPUT_STATE out4 ONE Outputting the delay for a digital or user de
508. oothly transitioning output y_output that varies between two static values y_lower y_upper as an independent variable x_input transitions between two values x_lower x_upper This function is useful in interpolating between resistances or voltage levels that change abruptly between two values cm_smooth_pwl duplicates much of the functionality of the predefined pwl code model The cm smooth pwl takes an input value plus x coordinate and y coordinate vector values along with the total number of coordinate points used to describe the piecewise linear transfer function and returns the interpolated or extrapolated value of the output based on that transfer function More detail is available by looking at the description of the pwl code model Note that the output value is the function s returned value 27 7 MODEL DEFINITION FILE 415 27 7 2 3 Model State Storage Functions void cm_analog alloc tag size int tag The user specified tag for this block of memory int size The number of bytes to allocate void cm_event_alloc tag size int tag The user specified tag for the memory block int size The number of bytes to be allocated void cm_analog get_ptr tag timepoint int tag The user specified tag for this block of memory int timepoint The timepoint of interest O current 1 previous void cm_event_get_ptr tag timepoint int tag The user specified tag for the memory block in
509. or is required by ngspice s matrix solution formula Without it the resistor rzout would have only one connection to the circuit and an ill formed matrix could result One way to avoid such problems without adding resistors explicitly is to use the ngspice rshunt option described in this document under ngspice Syntax Extensions General Enhancements To simulate this circuit copy the file xspice_c2 cir from the directory src xspice examples into a directory in your account cp examples xspice xspice_c2 cir xspice_c2 cir Invoke the simulator on this circuit ngspice xspice_c2 cir After a few moments you should see the ngspice prompt ngspice 1 gt 26 2 XSPICE ADVANCED USAGE 385 Now issue the run command and when the prompt returns issue the plot command to examine the voltage at the node coll ngspice 1 gt run ngspice 2 gt plot coll The resulting waveform closely matches that from the original transistor amplifier circuit sim ulated in Example 1 When you are done enter the quit command to leave the simulator and return to the command line ngspice 3 gt quit So long Using the rusage command you can verify that this abstract model of the transistor amplifier runs somewhat faster than the full circuit of Example 1 This is because the code model is less complex computationally This demonstrates one important use of XSPICE code models to reduce run time by modeling circuits at a higher l
510. or less you should use CCVS transresistance it is less efficient but improves overall numerical accuracy Think about that a small resistance is a large conductance Ngspice can assign a resistor instance a different value for AC analysis specified using the ac keyword This value must not be zero as described above The AC resistance is used in AC analysis only not Pole Zero nor noise If you do not specify the ac parameter it is defaulted to value If you want to simulate temperature dependence of a resistor you need to specify its temperature coefficients using a model line like in the example below Example REI 1 2 800 newres dtemp 5 MODEL newres R tc1 0 001 Instance temperature is useful even if resistance does not varies with it since the thermal noise generated by a resistor depends on its absolute temperature Resistors in ngspice generates two different noises thermal and flicker While thermal noise is always generated in the resistor to add a flicker noise source you have to add a model card defining the flicker noise parame ters It is possible to simulate resistors that do not generate any kind of noise using the noisy keyword and assigning zero to it as in the following example Example Rmd 134 57 1 5k noisy 0 Ngspice calculates the nominal resistance as described below A negative resistor modeling an active element can cause convergence problems please avoid it 2Flicker noise can be used to mo
511. original spice syntax for their netlist description others have quickly changed some if not many of the commands functions and procedures Thus it is difficult if not impossible to offer a simulator which aknowledges all of these netlist dialects ngspice includes some features which enhance compatibility which are included automatically This selection may be controlled to some extend by setting the com pitibility mode Others may be invoked by the user by small additions to the netlist input file Some of them are listed in this chapter some will be integrated into ngspice at a later stage others will be added if they are reported by users 16 13 1 Compatibility mode The variable 17 7 ngbehavior sets the compatibility mode al11 is set as the default value gt spice3 as invoked by the command set ngbehavior spice3 in spinit or spiceinit will disable some of the advanced ngspice features ps will enable including a library by a simple 1ib lt lib_filename gt statement which is not compatible to the more comfortable library handling described in chapt 2 7 16 13 2 Missing functions You may add one or more function definitions to your input file as listed below func LIMIT x a b min max x a b func PWR x a fabs x a func PWRS x a sgn x PWR x a func stp x u x 16 13 COMPATIBILITY 261 16 13 3 Devices 16 13 3 1 E Source with LAPLACE see chapt 5 2 5 16 13 3 2 VSwitch The VSwit
512. ouble pout_pcntl_upper final The partial of output wrt upper control input double cm_netlist_get_c double cm_netlist_get_1 cm_climit_fcn is a very specific function that mimics the behavior of the climit code model see the Predefined Models section In brief the cm_climit_fcn takes as input an in value 27 7 MODEL DEFINITION FILE 419 an offset and controlling upper and lower values Parameter values include delta values for the controlling inputs a smoothing range gain and fraction switch values Outputs include the final value plus the partial derivatives of the output with respect to signal input and both control inputs These all operate identically to the similarly named inputs and parameters of the climit model The function performs a limit on the in value holding it to within some delta of the controlling inputs and handling smoothing etc The cm_climit_fen was originally used in the ilimit code model to handle much of the primary limiting in that model and can be used by a code model developer to take care of limiting in larger models that require it See the detailed description of the climit model for more in depth description cm_netlist_get_c and cm_netlist_get_1 functions search the analog circuitry to which their input is connected and total the capacitance or inductance respectively found at that node The functions as they are currently written assume they are called by a model
513. ouble imag The imaginary part of the complex number Complex_t 27 7 MODEL DEFINITION FILE 411 The remaining uses of AC_GAIN are shown for the cases in which either the output the input or both are vectors 27 7 1 9 Static Variables STATIC_VAR x STATIC_VAR x resolves to an lvalue or a pointer which is assigned the value of some scalar code model result or state defined in the Interface Spec File tables or a pointer to a value or a vector of values The type of x is the type given in the Interface Specification File The same accessor macro can be used regardless of type since it simply resolves to an lvalue If x is a vector then STATIC_VAR x would resolve to a pointer In this case the code model is responsible for allocating storage for the vector and assigning the pointer to the allocated storage to STATIC_VAR x 27 7 1 10 Accessor Macros Table 27 3 describes the accessor macros available to the Model Definition File programmer and their C types The PARAM and STATIC_VAR macros whose types are labeled CD context dependent return the type defined in the Interface Specification File Arguments listed with 1 take an optional square bracket delimited index if the corresponding port or parameter is a vector The index may be any C expression possibly involving calls to other accessor macros e g OUTPUT out PORT_SIZE out 1 Name Type Args Descriptio
514. ource tree in a release and a debug tree Please see chapt 31 1 5 for instructions If you need updating your local source code tree from CVS just enter ng spice rework and issue the command cvs z3 q d pserver anonymous ngspice cvs sourceforge net cvsroot ngspice lf MINGW and MSYS can be downloaded from http www mingw org The making of the code models cm for XSpice and one of the ngspice parsers require the installation of BISON and FLEX to MSYS A typical installation was tested with bison 2 0 MSYS tar gz flex 2 5 4a 1 bin zip libiconv 1 9 2 1 bin zip libintl 0 14 4 bin zip Bison 2 0 is now superseded by newer releases Bison 2 3 see http sourceforge net project showfiles php group_id 2435 amp package_id 67879 The last three are from http sourceforge net project showfiles php group_id 23617 You may also look at http www mingw org wiki HOWTO_Install_the_MinGW_GCC_Compiler_Suite http www mingw org wiki MSYS http www mingw org wiki HOWTO_Create_an_MSYS_Build_Environment 31 2 NGSPICE COMPILATION UNDER WINDOWS OS 537 31 2 2 64 Bit executables with MINGW w64 Procedure Install MSYS plus bison flex auto tools perl libiconv libintl Install MINGW w64 activate OpenMP support See either http mingw w64 sourceforge net or http tdm gcc tdragon net allows to generate both 32 or 64 bit executables by setting flag m32 or m64 Set path to compiler in msys xx etc fstab e g c MinGW64 mingw Sta
515. ous circuits meaning that it is only able to predict fundamental frequency and amplitude and also harmonics for oscillators VCOs etc The algorithm is based on a minimum search of the error vector taken as the difference of RHS vectors between two occurrences of an estimated period The convergence is reached when the mean of error vector decrease below a given threshold that can be set as a analysis parameter Results of this analysis are the basis of every periodical large signal analysis as PAC or PNoise 1 3 Analysis at Different Temperatures Temperature in ngspice is a property associated to the entire circuit rather an analysis option Circuit temperature has a default nominal value of 27 C 300 15 K that can be changed using the TNOM option in an option control line All analyses are thus performed at circuit temperature and if you want to simulate circuit behavior at different temperatures you should prepare a netlist for each temperature All input data for ngspice is assumed to have been measured at the circuit nominal tempera ture This value can further be overridden for any device which models temperature effects by specifying the TNOM parameter on the model itself Individual instances may further override the circuit temperature through the specification of TEMP and DTEMP parameters on the instance The two options are not independent even if you can specify both on the instance line the TEMP option overrides DTEMP T
516. owever respond to the total loading it sees on its output it will always drive the output with the specified delay Note also that to maintain the technology independence of the model any UNKNOWN input or any floating input causes the output to also go UNKNOWN Likewise any UNKNOWN input on the enable line causes the output to go to an UNDE TERMINED strength value Example SPICE Usage a9 1 2 8 tri7 192 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE model tri7 d_tristate delay 0 5e 9 input_load 0 5e 12 enable_load 0 5e 12 12 4 10 Pullup NAME_TABLE C_Function_Name cm_d_pullup Spice_Model_Name d_pullup Description digital pullup resistor PORT_TABLE Port Name out Description output Direction out Default_Type d Allowed_Types a Vector no Vector_Bounds Null Allowed no PARAMETER_TABLE Parameter Name load Description load value F Data_Type real Default_Value 1 0e 12 Limits Vector no Vector Bounds Null_Allowed yes Description The digital pullup resistor is a device which emulates the behavior of an analog resistance value tied to a high voltage level The pullup may be used in conjunction with tristate buffers to provide open collector wired or constructs or any other logical constructs which rely on a resistive pullup common to many tristated output devices The model posts an input load value in farads based on the parameters load Example
517. parameter 104 phi InOut real Surface potential 105 rd InOut real Drain ohmic resistance 106 rs InOut real Source ohmic resistance 107 cbd InOut real B D junction capacitance 108 cbs InOut real B S junction capacitance 109 is InOut real Bulk junction sat current 110 pb InOut real Bulk junction potential 111 cgso InOut real Gate source overlap cap 112 cgdo InOut real Gate drain overlap cap 113 cgbo InOut real Gate bulk overlap cap 114 rsh InOut real Sheet resistance 115 cj InOut real Bottom junction cap per area 116 mj InOut real Bottom grading coefficient 117 cjsw InOut real Side junction cap per area 118 mjsw InOut real Side grading coefficient 119 js InOut real Bulk jct sat current density 120 tox InOut real Oxide thickness 121 ld InOut real Lateral diffusion 145 xl InOut real Length mask adjustment 146 wd InOut real Width Narrowing Diffusion 147 xw InOut real Width mask adjustment 148 delvto InOut real Threshold voltage Adjust 148 delvt0 InOut real 122 ud InOut real Surface mobility 122 uo InOut real 123 fe InOut real Forward bias jct fit parm 124 nsub InOut real Substrate doping 125 tpg InOut integer Gate type 126 nss InOut real Surface state density 131 vmax InOut real Maximum carrier drift velocity 135 xj InOut real Junction depth 129 nfs InOut real Fast surface state density 138 xd InOut real Depleti
518. parameters The net command is not available in ngspice so S11 and S21 are derived with a script in file bandpass sp as described in chapt 17 9 The measurements requested in bandpass cfg as Measurements Left_Side_Lobe LE 20 Pass_Band_Ripple GE 1 Right_Side_Lobe LE 20 511_In_Band MAX are realized as measure commands inside of control sections see files in directory extract The result of a measure statement is a vector which may be processed by commands in the following lines In file extract S1_In_Band Symbol is made available only after a short calcu lation inversion of sign using the print command quit has been added to this entry because it will become the final control section in lt computer name gt sp A disadvantage of measure inside of a control section is that parameters from param statements may not be used as is done in example 22 5 4 The bandpass example includes the calculation of RF parasitic elements defined in rfmodule cfg see chapt 7 5 of the ASCO manual This calculation is invoked by setting ExecuteRF yes Execute or no the RF module to add RF parasitics in bandpass cfg The two subcircuits LBOND_sub and CSMD_ sub are generated in lt computer name gt sp to simulate these effects 22 5 4 Class E power amplifier This example is taken from chapter 6 2 3 Tutorial 3 from the ASCO manual In this example the ASCO post processing is applie
519. parated by a comma for direct import into a spreadsheet This option is used to generate the simulator documentation Example devhelp devhelp resistor devhelp capacitor ic 17 5 18 Diff Compare vectors General Form diff plotl plot2 vec Compare all the vectors in the specified plots or only the named vectors if any are given If there are different vectors in the two plots or any values in the vectors differ significantly the difference is reported The variables diff_abstol diff_reltol and diff_vntol are used to determine a significant difference 17 5 19 Display List known vectors and types General Form display varname 276 CHAPTER 17 INTERACTIVE INTERPRETER Prints a summary of currently defined vectors or of the names specified The vectors are sorted by name unless the variable nosort is set The information given is the name of the vector the length the type of the vector and whether it is real or complex data Additionally one vector is labeled scale When a command such as plot is given without a VS argument this scale is used for the X axis It is always the first vector in a rawfile or the first vector defined in a new plot If you undefine the scale i e let TIME one of the remaining vectors becomes the new scale which one is unpredictable You may set the scale to another vector of the plot with the command setscale 17 5 58 17 5 20 Echo Print text General Form echo
520. pendence of vof0 191 vofb InOut real VBS dependence of vof 192 lvofb InOut real Length dependence of vofb 193 wvofb InOut real Width dependence of vofb 194 vofd InOut real VDS dependence of vof 195 lvofd InOut real Length dependence of vofd 196 wvofd InOut real Width dependence of vofd 197 a10 InOut real Pre factor of hot electron effect 198 la10 InOut real Length dependence of ai0 199 wai0 InOut real Width dependence of ai0 200 aib InOut real VBS dependence of ai 201 laib InOut real Length dependence of aib 202 waib InOut real Width dependence of aib 203 bi0 InOut real Exponential factor of hot electron effect 204 Ibi InOut real Length dependence of bi0 205 wbi0 InOut real Width dependence of bi0 206 bib InOut real VBS dependence of bi 207 Ibib InOut real Length dependence of bib 208 wbib InOut real Width dependence of bib 209 vghigh InOut real Upper bound of the cubic spline function 210 Ivghigh InOut real Length dependence of vghigh 211 wvghigh InOut real Width dependence of vghigh 212 vglow InOut real Lower bound of the cubic spline function 213 lvglow InOut real Length dependence of vglow 214 wvglow InOut real Width dependence of vglow 215 tox InOut real Gate oxide thickness in um 526 CHAPTER 30 MODEL AND DEVICE PARAMETERS
521. perator and the comma operator has two meanings if it is present in the argument list of a user definable function it serves to separate the arguments Otherwise the term x yis Synonymous with x j y Also available are the logical operations amp and or not and the relational operations lt gt gt lt and lt gt not equal If used in an algebraic expression they work like they would in C producing values of 0 or 1 The relational operators have the following synonyms Operator Synonym gt gt It lt ge gt le lt ne lt gt and amp or l not eq The operators are useful when lt and gt might be confused with IO redirection which is almost always It is however safe to use lt and gt with the define command 17 5 13 The following functions are available 17 2 EXPRESSIONS FUNCTIONS AND CONSTANTS Name Function mag vector Magnitude of vector same as abs vector ph vector Phase of vector cph vector Phase of vector Continuous values no discontinuity at PI j vector i sqrt 1 times vector real vector The real component of vector imag vector The imaginary part of vector db vector 20 log10 mag vector log vector The logarithm base 10 of vector In vector The natural logarithm base e of vector exp vector e to the vector pow
522. ple SPICE Usage a6 1 8 inv1 model invi d_inverter rise_delay 12 4 3 And NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector_Bounds input_load 0 5e 12 cm_d_and d_and digital and gate in input in d a yes 2 0 5e 9 fall_delay 0 3e 9 out output out d d no 12 4 DIGITAL MODELS Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value F real 1 0e 12 no yes 185 no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital and gate is an n input single output and gate which produces an active 1 value if and only if all of its inputs are also 1 values If ANY of the inputs is a 0 the output will also be a 0 if neither of these conditions holds the output will be unknown The delays associated with an output rise and those associated with an output fall may be specified independently The model also posts an input load value in farads based on the parameter input load The outp
523. plete so please refer to the thesis for detailed information Literatur on CODECS the predecessor of CIDER is available here from UCB TechRpt ERL 90 96 and TechRpt ERL 88 71 29 1 SPECIFICATION Overview of numerical device specification The input to CIDER consists of a SPICE like description of a circuit its analyses and its com pact device models and PISCES like descriptions of numerically analyzed device models For a description of the SPICE input format consult the SPICE3 Users Manual JOHN92 To simulate devices numerically two types of input must be added to the input file The first is a model description in which the common characteristics of a device class are collected In the case of numerical models this provides all the information needed to construct a device cross section such as for example the doping profile The second type of input consists of one or more element lines that specify instances of a numerical model describe their connection to the rest of the circuit and provide additional element specific information such as device layout dimensions ans initial bias information The format of a numerical device model description differs from the standard approach used for SPICE3 compact models It begins the same way with one line containing the MODEL keyword followed by the name of the model device type and modeling level However instead of providing a single long list of parameters and their values numerical
524. plied to code models 224 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE CONVABSSTEP x absolute step limit applied to code models GMINSTEPS x sets number of Gmin steps to be attempted If the value is set to zero the gmin stepping algorithm is disabled In such case the source stepping algorithm becomes the standard when the standard procedure fails to converge to a solution ITL3 x resets the lower transient analysis iteration limit the default value is 4 Note not implemented in Spice3 ITL4 x resets the transient analysis time point iteration limit the default is 10 ITL5 x resets the transient analysis total iteration limit the default is 5000 Set ITL5 0 to omit this test Note not implemented in Spice3 ITL6 x synonym for SRCSTEPS MAXEVITER x sets the number of event iterations that are allowed at an analysis point MAXOPALTER x specifies the maximum number of analog event alternations that the sim ulator can use in solving a hybrid circuit MAXORD lt x specifies the maximum order for the numerical integration method used by SPICE Possible values for the Gear method are from 2 the default to 6 Using the value 1 with the trapezoidal method specifies backward Euler integration METHOD name sets the numerical integration method used by SPICE Possible names are Gear or trapezoidal or just trap The default is trapezoidal NOOPALTER TRUEIFALSE if set to false alternations between analog eve
525. ports tn Port type g gd h or hd was used for a port with direction out or in These types are only allowed on inout ports Invalid parameter type POINTER type valid only for STATIC_VARs The type POINTER was used in a section of the Interface Specification file other than the STATIC_VAR section Port default type is not an allowed type A default type was specified that is not one of the allowed types for the port Incompatible port types in allowed_types clause Port types listed under Allowed_Types in the Interface Specification File must all have the same underlying data type It is illegal to mix analog and eventdriven types in a list of allowed types Invalid parameter type saw lt parameter type 1 gt expected lt parameter type 2 gt 28 1 PREPROCESSOR ERROR MESSAGES 431 A parameter value was not compatible with the specified type for the parameter Named range not allowed for limits A name was found where numeric limits were expected Direction of port lt port number gt in lt port name gt is not lt IN or OUT gt or INOUT A problem exists with the direction of one of the elements of a port vector Port lt port name gt is an array subscript required A port was referenced that is specified as an array vector in the Interface Specification File A subscript is required e g myport i Parameter lt parameter name gt is an
526. ption 1 inductance InOut real Inductance of inductor 2 ic InOut real Initial current through inductor 5 sens_ind In flag flag to request sensitivity WRT inductance 9 temp InOut real Instance operating temperature 10 dtemp InOut real Instance temperature difference with the rest of the circuit 8 m InOut real Multiplication Factor 11 scale InOut real Scale factor 12 nt InOut real Number of turns 3 flux Out real Flux through inductor 4 lv Out real Terminal voltage of inductor 4 volt Out real 6 i Out real Current through the inductor 6 current Out real 7 p Out real instantaneous power dissipated by the inductor 206 sens_dc Out real dc sensitivity sensitivity 201 sens_real Out real real part of ac sensitivity 202 sens_imag Out real dc sensitivity and imag part of ac sensitivty 203 sens_mag Out real sensitivity of AC magnitude 204 sens_ph Out real sensitivity of AC phase 205 sens_cplx Out complex ac sensitivity 30 1 3 2 Inductor model parameters Name Direction Type Description 100 ind InOut real Model inductance 101 tcl InOut real First order temp coefficient 102 tc2 InOut real Second order temp coefficient 103 thom InOut real Parameter measurement temperature 104 csect InOut real Inductor cross section 105 length InOut real Inductor length 106 nt InOut real Model number of turns 107 mu InOut real Relative mag
527. ption command without any argument lists the actual options set in the simulator to be verified Multiple options may be set in a single line The following example demonstrates a control section which may be added to your circuit file to test the influence of variable trtol on the number of iterations and on the simulation time 284 CHAPTER 17 INTERACTIVE INTERPRETER Command sequence for testing option trtol control set noinit option trtol 1 echo echo trtol 1 run rusage traniter trantime reset option trtol 3 echo echo trtol 3 run rusage traniter trantime reset option trtol 5 echo echo trtol 5 run rusage traniter trantime reset option trtol 7 echo echo trtol 7 run rusage traniter trantime plot tranl v out25 tranl v out50 v out25 v out50 endc 17 5 42 Plot Plot values on the display General Form plot exprs ylimit ylo yhi xlimit xlo xhi xindices xilo xihi xcompress comp xdelta xdel ydelta ydel xlog ylog loglog vs xname xlabel word ylabel word title word samep linear Plot the given vectors or exprs on the screen if you are on a graphics terminal The xlimit and ylimit arguments determine the high and low x and y limits of the axes respectively The xindices arguments determine what range of points are to be plotted everything between the xilo th point and the xihi th point is plotted The xcompress argument specifies that only one out of every co
528. put and X11 graphics output To avoid the warning of a missing graphical user interface you have to start the X11 window manager by issuing the commands export DISPLAY 0 0 xwin multiwindow clipboard inside of the CygWin window before starting ngspice 18 5 Error handling Error messages and error handling in ngspice have grown over the years include a lot of tra ditional behaviour und thus are not very systematic and consistent Error messages may occur with the token Error Often the errors are non recoverable and will lead to exiting ngspice with error code 1 Sometimes however you will get an error message but ngspice will continue and may either bail out later because the error has propagated into the simulation sometimes ngspice will continue deliver wrong results and exit with error code 0 no error detected In addition ngspice may issue warning messages like Warning These should cover recov erable errors only So there is still work to be done to define a consistent error messaging recovery or exiting A first step is the user defiable variable strict_errorhandling This variable may be set in files spinit 16 5 or spiceinit 16 6 to immediately stop ngspice after an error is detected during parsing the circuit An error message is sent the ngspice exit code is 1 This behaviour deviates from traditional spice errror handling and thus is introduced as an option only XSPICE error m
529. put file Variable inductor param Ll 0 5m Lh 5m It 50u Vi 2m ic v int21 0 x variable inductor depending on control current i Vm Li 12 111 L 1 Ym lt It LI Lh x measure current through inductor vm 111 0 de O voltage on inductor v1 12 0 Vi x fixed inductor L3 33 331 LI measure current through inductor vm33 331 0 de 0 voltage on inductor V3 33 0 Vi non linear inductor discrete setup F21 int21 0 B21 1 L21 int21 0 1 B21 nl n2 V i Vm21 lt It LI Lh v int21 x measure current through inductor vm21 n2 0 de O V21 nl O Vi control set noaskquit tran lu 100u uic plot i Vm i vm33 plot i vm21 1 vm33 plot i vm i vm21 endc end 3 2 13 Capacitor or inductor with initial conditions The simulator supports the specification of voltage and current initial conditions on capacitor and inductor models respectively These models are not the standard ones supplied with SPICES3 but are in fact code models which can be substituted for the SPICE models when realistic initial conditions are required For details please refer to chapt 12 A XSPICE deck example using these models is shown below This circuit contains a capacitor and an inductor with initial conditions on them Each of the components 3 2 ELEMENTARY DEVICES 73 has a parallel resistor so that an exponential decay of the initial condition occurs with a time constant of 1 second
530. put ports column 1 time columns 2 3 values 001 3 90625e 09 0 02454122852291229 0 9996988186962042 7 8125e 09 0 04906767432741801 0 9987954562051724 1 171875e 08 0 07356456359966743 0 9972904566786902 12 2 9 multi_input_pwl block NAME_TABLE C_Function_Name Spice_Model_Name cm_multi_input_pwl multi_input_pwl Description multi_input_pwl block PORT_TABLE Port_Name in out Description input array output Direction in out Default_Type vd vd Allowed_Types vd id vd id Vector yes no Vector_Bounds 2 Null_Allowed no no PARAMETER_TABLE Parameter_Name X y Description x array y array Data_Type real real Default_Value 0 0 0 0 Limits Vector yes yes Vector_Bounds 2 2 Null_Allowed no no PARAMETER_TABLE Parameter Name model Description model type Data_Type string Default Value and Limits Vector no 150 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector Bounds Null_ Allowed Description Multi input gate voltage controlled voltage source that supports and or or gating The x s and y s represent the piecewise linear variation of output y as a function of input x Only one input determines the state of the outputs seleczable by the parameter model and the smallest value of all the inputs is chosen as the controlling input and determines the output value or the smallest value of all the inputs is chosen as the yes controlli
531. quired to create sources for new code models or User Defined Nodes compile them and load them into ngspice are similar They consist of 1 creating the code model or UserDefined Node UDN directory and its asso ciated model or data files 2 inform ngspice about which code model or UDN directories have to be compiled and linked into ngspice 3 compile them into a shared lib and 4 load them into the ngspice simulator upon runtime All code models finally reside in dynamically linkable shared libraries cm which in fact are so files under LINUX or dlls under MS Windows Currently we have 5 of them analog cm digital cm spice2poly cm xtradev cm xtraevt cm 393 394 CHAPTER 27 CODE MODELS AND USER DEFINED NODES Upon start up of ngspice they are dynamically loaded into the simulator by the ngspice code model command which is located in file spinit see chapt 16 5 for the standard code models Once you have added your new code model into one of these libraries or have created a new library file e g my own cm instances of the model can be placed into any simulator deck that describes a circuit of interest and simulated along with all of the other components in that circuit A quick entry to get a new code model has already been presented in chapter 25 3 You may find the details of the XSPICE language in chapters 27 6 ff 27 1 Code Model Data Type Definitions There are three data types which you can incorporate into a model a
532. r x_upper y_upper y_output dy_dx double x_input The x value at which to compute y double x_lower The x value of the lower corner double y_lower The y value of the lower corner double x_upper The x value of the upper corner double y_upper The y value of the upper corner double y_output The computed smoothed y value double dy_dx The partial of y wrt x double cm_smooth_pwl x_input x y size input_domain dout_din double x_input The x input value double x The vector of x values double y The vector of y values int size The size of the xy vectors double input_domain The smoothing domain double dout_din The partial of the output wrt the input cm_smooth_corner automates smoothing between two arbitrarily sloped lines that meet at a single center point You specify the center point x_center y_center plus a domain x valued delta above and below x_center This defines a smoothing region about the center point Then the slopes of the meeting lines outside of this smoothing region are specified lower_slope upper_slope The function then interpolates a smoothly varying output y_output and its derivative dy_dx for the x_input value This function helps to automate the smoothing of piecewise linear functions for example Such smoothing aids the simulator in achieving con vergence cm_smooth_discontinuity allows you to obtain a sm
533. r the alter command You may switch off all TRNOISE noise sources by setting set notrnoise 82 CHAPTER 4 VOLTAGE AND CURRENT SOURCES to your spiceinit file for all your simulations or into your control section in front of the next run or tran command for this specific and all following simulations The command unset notrnoise will reinstate all noise sources The noise generators are implemented into the independent voltage vsrc and current isrc sources 4 1 8 Random voltage source The TRRANDOM option yields statistically distributed voltage values derived from the ngspice random number generator These values may be used in the transient simulation directly within a circuit e g for generating a specific noise voltage but especially they may be used in the con trol of behavioral sources B E G sources 5 voltage controllable A sources 12 capacitors 3 2 8 inductors 3 2 12 or resistors 3 2 4 to simulate the circuit dependence on statistically varying device parameters A Monte Carlo simulation may thus be handled in a single simulation run General Form TRRANDOM TYPE TS lt TD lt PARAMI lt PARAM2 gt gt gt Examples VRI rl 0 de O trrandom 2 10m 0 1 Gaussian TYPE determines the random variates generated 1 is uniformly distributed 2 Gaussian 3 exponential 4 Poisson TS is the duration of an individual voltage value TD is a time delay with 0 V output before the random volage values start up PARAM1
534. rasitic B C saturation current 153 nenp InOut real Nonideal parasitic B C emission coefficient 154 vef InOut real Forward Early voltage 155 ver InOut real Reverse Early voltage 156 ikf InOut real Forward knee current 157 ikr InOut real Reverse knee current 158 ikp InOut real Parasitic knee current 159 tf InOut real Ideal forward transit time 160 qtf InOut real Variation of TF with base width modulation 161 xtf InOut real Coefficient for bias dependence of TF 162 vtf InOut real Voltage giving VBC dependence of TF 163 itf InOut real High current dependence of TF 164 tr InOut real Ideal reverse transit time 165 td InOut real Forward excess phase delay time 166 kfn InOut real B E Flicker Noise Coefficient 167 afn InOut real B E Flicker Noise Exponent 168 bfn InOut real B E Flicker Noise 1 f dependence 169 xre InOut real Temperature exponent of RE 170 xrb InOut real Temperature exponent of RB 171 xrbi InOut real Temperature exponent of RBI 172 xre InOut real Temperature exponent of RC 173 xrci InOut real Temperature exponent of RCI 174 xrs InOut real Temperature exponent of RS 175 xvo InOut real Temperature exponent of VO 176 ea InOut real Activation energy for IS 177 eaie InOut real Activation energy for IBEI 179 eaic InOut real Activation energy for IBCI IBEIP 30 4 BJTS 501
535. rd ngspice library usr loca1 1ib ngspice or whatever LIBPATH is defined to in the ngspice source specwindow Windowing for commands spec 17 5 65 or fft 17 5 23 May be one of the following bartlet blackman cosine gaussian hamming hanning none rectangular triangle specwindoworder Integer value 2 8 default 2 used by commands spec or fft spicepath The program to use for the aspice command The default is cad bin spice strict_errorhandling If set by the user an error detected during circuit parsing will immedi ately lead ngspice to exit with exit code 1 see 18 5 May be set in files spinit 16 5 or Spiceinit 16 6 only subend The card to end subcircuits normally ends subinvoke The prefix to invoke subcircuits normally X substart The card to begin subcircuits normally subckt term The mfb name of the current terminal ticmarks An integer value n n tics a small x will be set on your graph Arrangement of the tics 17 8 SCRIPTS 307 ticlist A list of integers e g 4 14 24 to set tics small x on your graph Arrangement of the tics units If this is degrees then all the trig functions will use degrees instead of radians unixcom If a command isn t defined try to execute it as a UNIX command Setting this option has the effect of giving a rehash command below This is useful for people who want to use ngnutmeg as a login shell wfont Set the font for the graphics plot in MS Win
536. rder temperature coefficient 1 20 0 0 le 5 for TR TMJE1 1st order temperature coefficient 1 c 0 0 le 3 for MJE TMJE2 2nd order temperature coefficient 1 20 0 0 le 5 for MJE TMJC1 1st order temperature coefficient 1 c 0 0 le 3 for MJC TMJC2 2nd order temperature coefficient 1 002 0 0 le 5 for MJC Chapter 9 JFETs 9 1 Junction Field Effect Transistors JFETs General form JXXXXXXX nd ng ns mname lt area gt lt off gt lt ic vds vgs gt lt temp t gt Examples J1 7 2 3 JM1 OFF nd ng and ns are the drain gate and source nodes respectively mname is the model name area is the area factor and off indicates an optional initial condition on the device for de analysis If the area factor is omitted a value of 1 0 is assumed The optional initial condition specification using ic VDS VGS is intended for use with the uic option on the TRAN control line when a transient analysis is desired starting from other than the quiescent operating point See the ic control line for a better way to set initial conditions The optional temp value is the temperature at which this device is to operate and overrides the temperature specification on the option control line 9 2 JFET Models NJF PJF 9 2 1 Model by Parker and Skellern The level 1 JFET model is derived from the FET model of Shichman and Hodges The de characteristics are defined by the parameters vto and beta which determine the variation o
537. re used to add impurities to the various domains of a device Initially each domain is dopant free Each new doping card creates a new doping profile that defines the dopant concentration as a function of position The doping at a particular location is then the sum over all profiles of the concentration values at that position Each profile can be restricted to a subset of a device s domains by supplying a list of the desired domains Otherwise all domains are doped by each profile A profile has uniform concentration inside the constant box Outside this region it varies ac cording to the primary an lateral profile shapes In 1D devices the lateral shape is unused and in 2D devices the y axis is the default axis for the primary profile Several analytic functions can be used to define the primary profile shape Alternatively empirical or simulated profile data can be extracted from a file For the analytic profiles the doping is the product of a profile func tion e g Gaussian and a reference concentration which is either the constant concentration of a uniform profile or the peak concentration for any of the other functions If concentration data is used instead take from an ASCII file containing a list of location concentration pairs or a SUPREM3 exported file the name of the file must be provided If necessary the final concentration at a point is then found by multiplying the primary profile concentration by the value of the lateral pro
538. ribed in the installation tree below The directory visualc with its files vngspice sIn project starter and vngspice vcproj project con tents allows to compile and link ngspice with MS Visual Studio 2008 The project is probably not compatible with Visual Studio 2005 and not yet with 2010 visualc include contains a dedicated config h file It contains the preprocessor definitions re quired to properly compile the code strings h has been necessary during setting up the project Install Microsoft Visual Studio 2008 C The MS VS 2008 C Express Edition which is available at no cost from http www microsoft com express product default aspx is adequate if you do not wish to have OpenMP or 64 bit support So the express edition will allow a 32 bit Release and a Debug version of ngspice using the Win32 flag In addition you may select 538 CHAPTER 31 COMPILATION NOTES a console version without graphics interface The professional edition will offer Release and Debug and Console also for 64 bit flag x64 as well as an OpenMP variant for 32 or 64 bit Procedure Goto ng spice rework visualc Start MS Visual Studio 2008 by double click onto vngspice sIn After MS Visual Studio has opened up select debug or release version by checking Erstellen Konfigurations Manager Debug or Release Start making ngspice called vngspice exe by selecting Erstellen and vngspice neu erstellen Object files will be cre
539. ries resistance equivalent to RSPERL ohms per meter Name Parameter Units Default Example Area K Propagation Constant 2 0 1 2 FMAX Maximum Frequency of interest Hz 10G 6 5 Meg RPERL Resistance per unit length m 1000 10 CPERL Capacitance per unit length F m 10e 15 1 pF ISPERL Saturation Current per unit length 4 m 0 RSPERL Diode Resistance per unit length Q m 0 6 4 KSPICE Lossy Transmission Lines Unlike SPICE3 which uses the state based approach to simulate lossy transmission lines KSPICE simulates lossy transmission lines and coupled multiconductor line systems using the recursive convolution method The impulse response of an arbitrary transfer function can be determined by deriving a recursive convolution from the Pade approximations of the function NGSPICE is using this approach for simulating each transmission line s characteristics and each multiconductor line s modal functions This method of lossy transmission line simulation has shown to give a speedup of one to two orders of magnitude over SPICE3E Additional Documentation Available e S Lin and E S Kuh Pade Approximation Applied to Transient Simulation of Lossy Coupled Transmission Lines Proc IEEE Multi Chip Module Conference 1992 pp 52 55 e S Lin M Marek Sadowska and E S Kuh SWEC A StepWise Equivalent Conduc tance Timing Simulator for CMOS VLSI Circuits European De
540. rkeley 546 CHAPTER 32 COPYRIGHTS AND LICENSES 32 2 2 XSPICE According to http users ece gatech edu mrichard Xspice as of Feb 2012 the XSPICE source code and documentation have been put into the public domain by the Georgia Institute of Technology 32 2 3 tclspice numparam Both software packages are copyrighted and are released under LGPLv2 see http www gnu org licenses lgpl 2 1 html 32 2 4 Linking to GPLd libraries e g readline The readline manual at http tiswww case edu php chet readline rltop html states Readline is free software distributed under the terms of the GNU General Public License version 3 This means that if you want to use Readline in a program that you release or distribute to anyone the program must be free software and have a GPL compatible license According to http www gnu org licenses license list html the modified BSD license thus also the ngspice license belong to the family of GPL Compatible Free Software Licenses Therefore the linking restrictions to readline which have existed with the old BSD license are no longer in effect
541. ro bias S C capacitance 131 ps InOut real S C junction built in potential 132 ms InOut real S C junction grading coefficient 500 CHAPTER 30 MODEL AND DEVICE PARAMETERS 133 ajs InOut real S C capacitance smoothing factor 134 ibei InOut real Ideal B E saturation current 135 wbe InOut real Portion of IBEI from Vbei 1 WBE from Vbex 136 nei InOut real Ideal B E emission coefficient 137 iben InOut real Non ideal B E saturation current 138 nen InOut real Non ideal B E emission coefficient 139 ibci InOut real Ideal B C saturation current 140 nci InOut real Ideal B C emission coefficient 141 ben InOut real Non ideal B C saturation current 142 ncn InOut real Non ideal B C emission coefficient 143 avel InOut real B C weak avalanche parameter 1 144 ave2 InOut real B C weak avalanche parameter 2 145 isp InOut real Parasitic transport saturation current 146 wsp InOut real Portion of ICCP 147 nfp InOut real Parasitic fwd emission coefficient 148 ibeip InOut real Ideal parasitic B E saturation current 149 ibenp InOut real Non ideal parasitic B E saturation current 150 ibcip InOut real Ideal parasitic B C saturation current 151 ncip InOut real Ideal parasitic B C emission coefficient 152 ibcnp InOut real Nonideal pa
542. roduces as output the integral value and the partial of the integral with respect to the integrand The integration itself is with respect to time and the pointer to the integral value must have been previously allocated using cm_analog_alloc and cm_analog_get_ptr This is required be cause of the need for the integrate routine itself to have access to previously computed values of the integral cm_analog_converge takes as an input the address of a state variable that was previously allocated using cm_analog_alloc and cm_analog_get_ptr The function itself serves to notify the simulator that for each time step taken that variable must be iterated upon until it converges cm_analog_not_converged is a function that can and should be called by an analog model whenever it performs internal limiting of one or more of its inputs to aid in reaching conver gence This causes the simulator to call the model again at the current time point and continue solving the circuit matrix A new time point will not be attempted until the code model re turns without calling the cm_analog_not_converged function For circuits which have trouble reaching a converged state often due to multiple inputs changing too quickly for the model to react in a reasonable fashion the use of this function is virtually mandatory cm_analog_auto_partial may be called at the end of a code model function in lieu of calcu lating the values of partial derivatives expli
543. ronoso ses s 291 7 53 62 Show List deyice state so sia 291 17 5 63 Showmod List model parameter values 292 17 5 64 Source Read a ngspice input file 292 17 5 65 Spec Create a frequency domain plot lt lt 2 so 292 17 5 66 Status Display breakpoint information 293 17 5 67 Step Run a fixed number of time points 293 17 00 Ot Seta breakpoint os he eR SEES ERR EER ES 293 17 5 69 Stremp Compare two strings o 0 294 17 5 70 Sysinfo Print system information 294 CONTENTS 17 5 71 Tf Run a Transfer Function analysis 295 a Trace Trace nades oo ssa ONE Oa RRO n ES RSH 296 17 5 73 Tran Perform a transient analysis lt lt lt o lt lt 9 296 17 5 74 Transpose Swap the elements in a multi dimensional data set 296 175 75 Unallas Retract an dls s eoc we eR ea Pe ee eS 296 17 5 76 Undelines Rewact a definition 2 es 4442294444604 4 297 17 5 77 Unlet Delete the specified vectors 3 2 4 sonic 297 17 5 78 Unset Clear a variable oo o soou cr n a a 297 17 5 79 Version Print the version of ngspice aoaaa a 297 17 5 80 Where Identify troublesome node or device 298 17 5 81 Wrdata Write data to a file simple table 298 17 5 82 Write Write data to a file Spice3f5 format 299 17 5 83 Wrs2p Write scattering par
544. rst line in any input file is considered a title line and not parsed but kept as the name of the circuit Thus a ngspice command script in infile must begin with a blank line and then with a control line Also any line starting with the characters is considered as a control line control and endc is placed around this line automatically The exception to these rules are the files spinit 16 5 and Spiceinit 16 6 For ngutmeg reads commands from the file infile Lines beginning with the character are considered comments and are ignored 17 5 65 Spec Create a frequency domain plot General Form spec start_freq stop_freq step_freq vector vector Calculates a new complex vector containing the Fourier transform of the input vector typically the linearized result of a transient analysis The default behavior is to use a Hanning window but this can be changed by setting the variables specwindow and specwindoworder appropri ately Typical usage 17 5 COMMANDS 293 ngspice 13 gt linearize ngspice 14 gt set specwindow blackman ngspice 15 gt spec 10 1000000 1000 v out ngspice 16 gt plot mag v out Possible values for specwindow are none hanning cosine rectangular hamming triangle bartlet blackman gaussian and flattop In the case of a gaussian window specwindoworder is a number specifying its order For a list of window functions see 17 5 23 17 5 66 Status Display breakpoint in
545. rt Channel IGFET Model 523 MaE DAS cos ol be Ab A HSS Z 527 303 9 BSIMA occa ce heehee A Bee EERE RERDED ea 327 31 Compilation notes 529 31 1 Ngspice Installation under LINUX and other UNIXes 329 LAA PESE QUISTES en oe rr a eR AR E E 529 31 1 2 Install from CVS 226 4452 bee eee hee dra 529 31 1 3 Install from a tarball e g ngspice rework 24 t8Z 530 31 14 Advanced Install gt lt o a koe a seast Ree Re Ree ea 531 31 1 5 Compilation using an user defined directory tree for object files 532 S116 COmplicis aid Options es Sos s esa aa a ES OES 533 31 1 7 Compiling For Multiple Architectures 0 533 31 1 8 Installation Names oc 22 hee kee hace be eR DER Ee RHEE SS 534 31 1 9 Optional Features 2 eg eh dR eh RSE SE LEE HEE LES 534 31 1 10 Specifying the System Type coria a eee ss 534 MANE ica o so ssa raasta rha sp ets Bah he re Bee 534 ALA LAICA Controls s s s aos a saa aa ai A ds 535 31 2 NGSPICE COMPILATION UNDER WINDOWS OS 535 31 2 1 How to make ngspice with MINGW and MSYS 535 31 2 2 64 Bit executables with MINGW w64 aaa 537 31 2 3 make ngspice with MS Visual Studio 2008 537 31 2 4 make ngspice with pure CYGWIN aoaaa aaae 538 31 2 5 make ngspice with CYGWIN and external MINGW32 538 31 2 6 make ngspice with CYGWIN and internal MINGW32 use config h made above ec scu rrura draa nindi tense Ee eS 540 31 2 7 ng
546. rt compiling with compile_min sh or compile_min sh 64 Options used in the script adms and enable adms ADMS is an experimental model compiler that translates Verilog A compact models into C code that can be compiled into ngspice This is still experimental but working with some limitations to the models e g no noise models If you want to use it please refer to the ADMS section on ngspice web site CIDER XSPICE and OpenMP may be selected at will disable debug will give O2 optimization versus OO for debug and removes all debugging info The install script will copy all files to C Spice or C Spice64 the code models for XSPICE will be stored in C Spice lib spice or C Spice64 lib spice respectively A word of caution Be aware that there might be some bugs in your 64 bit code We still have some compiler warnings about integer incompatibility e g integer versus size_t etc We will take care of that for the next release 31 2 3 make ngspice with MS Visual Studio 2008 ngspice may be compiled with MS Visual Studio 2008 Support for MS Visual Studio 2010 is not yet available CIDER and XSPICE are included but the code models for XSPICE cm are not yet made You may however use the code models which in fact are dlls created with MINGW as e g found in the ngspice binary distribution There is currently no installation procedure provided you may however install the executable manually as desc
547. rtening of channel um DW Narrowing of channel um U0 Zero bias transverse field mobility degradation I v 3 coefficient U1 Zero bias velocity saturation coefficient u y gt X2MZ Sens of mobility to substrate bias at v 0 cm y sec 11 2 MOSFET MODELS NMOS PMOS 129 Name Parameter Units Vw X2E Sens of drain induced barrier lowering effect I v k to substrate bias X3E Sens of drain induced barrier lowering effect 1 v K to drain bias at Vj Via X2U0 Sens of transverse field mobility degradation 1 y2 effect to substrate bias X2U1 Sens of velocity saturation effect to substrate um y bi bias MUS Mobility at zero substrate bias and at Va Vag cm V sec X2MS Sens of mobility to substrate bias at Vj Vja cm v sec X3MS Sens of mobility to drain bias at Vz Vag cm v sec X3Ul Sens of velocity saturation effect on drain bias m v at Vds Vdd TOX Gate oxide thickness um TEMP Temperature at which parameters were O measured VDD Measurement bias range V CGDO Gate drain overlap capacitance per meter F m channel width CGSO Gate source overlap capacitance per meter F m channel width CGBO Gate bulk overlap capacitance per meter F m channel length XPART Gate oxide capacitance charge model flag NO Zero bias subthreshold slope coefficient NB Sens of subthreshold slope to substrate bias ND
548. runc 47 truncdontcut InOut flag don t limit timestep to keep impulse response calculation errors low 42 compactrel InOut real special reltol for straight line checking 43 compactabs InOut real special abstol for straight line checking 30 3 TRANSMISSION LINES 30 3 3 Tranline Lossless transmission line 30 3 3 1 Tranline instance parameters Name Direction Type Description 1 z0 InOut real Characteristic impedance 1 zo InOut real 4 f InOut real Frequency 2 td InOut real Transmission delay 3 nl InOut real Normalized length at frequency given 5 vl InOut real Initial voltage at end 1 7 v2 InOut real Initial voltage at end 2 6 il InOut real Initial current at end 1 8 12 InOut real Initial current at end 2 9 ic In real vector Initial condition vector v1 11 v2 12 10 rel Out real Rel rate of change of deriv for bkpt 11 abs Out real Abs rate of change of deriv for bkpt 12 pos_nodel Out integer Positive node of end 1 of t line 13 neg_nodel Out integer Negative node of end 1 of t line 14 pos_node2 Out integer Positive node of end 2 of t line 15 neg_node2 Out integer Negative node of end 2 of t line 18 delays Out real vector Delayed values of excitation 489 490 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 3 4 TransLine Simple Lossy Transmission Line 30 3 4 1 TransLine instanc
549. s will ever want to read an on line text version In writing this text I followed the cut of spice3f5 manual both in the chapter sequence and presentation of material mostly because that was already the user manual of spice Ngspice is an open source software users can download the source code compile and run it This manual has an entire chapter describing program compilation and available options to help users in building ngspice see chapt 31 The source package already comes with all safe options enabled by default and activating the others can produce unpredictable results and thus is recommended to expert users only This is the first ngspice manual and I have removed all the historical material that described the differences between ngspice and spice3 since it was of no use for the user and not so useful for the developer who can look for it in the Changelogs of in the revision control system I want to acknowledge the work dome Emmanuel Rouat and Arno W Peters for converting to TPXinfo the original spice3f documentation their effort gave ngspice users the only available documentation that described the changes for many years A good source of ideas for this manual comes from the on line spice3f manual written by Charles D H Williams Spice3f5 User Guide constantly updated and useful for some insight that he gives in it As always errors omissions and unreadable phrases are only my fault Paolo Nenzi Roma March 24th 2
550. s 0 define limit nom avar nom sgauss 0 gt 0 avar avar dowhile run lt mc_runs alter cl unif le 09 0 1 ac oct 100 250k 10meg meas ac bw trig vdb out val 10 rise 1 targ vdb out val 10 fall 1 set run amp run let run run 1 end plot db scratch allv echo print scratch bwh cdump 17 5 10 Codemodel Load an XSPICE code model library General Form codemodel library file Load a XSPICE code model shared library file e g analog cm Only available if ngspice is compiled with the XSPICE option enable xspice or with the Windows executable distributed since ngspice21 This command has to be called from spinit see chapt 16 5 or spiceinit for personal code models 16 6 17 5 11 Compose Compose a vector General Form compose name values valuel value2 compose name parm val parm val The first form takes the values and creates a new vector the values may be arbitrary expressions The second form has the following possible parameters start The value at which the vector should start stop The value at which the vector should end step The difference between successive elements lin The number of points linearly spaced 274 CHAPTER 17 INTERACTIVE INTERPRETER 17 5 12 Dc Perform a DC sweep analysis General Form dc Source Name Vstart Vstop Vincr Source2 Vstart2 Vstop2 Vincr2 Do a dc transfer curve analysis See the previous chap
551. s BF ISE BR and ISC respectively Temperature dependence of the saturation current in the junction diode model is determined by IN Bea mo Is T Is To 2 exp Ga i 1 3 where N is the emission coefficient which is a model parameter and the other symbols have the same meaning as above Note that for Schottky barrier diodes the value of the saturation current temperature exponent XT I is usually 2 Temperature appears explicitly in the value of junction potential U in Ngspice PHI for all the device models The temperature dependence is determined by kT NaNa U T 1 1 4 where k is Boltzmann s constant q is the electronic charge N is the acceptor impurity den sity N is the donor impurity density N is the intrinsic carrier concentration and E is the energy gap Temperature appears explicitly in the value of surface mobility Mo or Uo for the MOSFET model The temperature dependence is determined by Mo T 22 1 5 42 CHAPTER 1 INTRODUCTION The effects of temperature on resistors capacitor and inductors is modeled by the formula R T R T 1 7C EAT 1 6 where T is the circuit temperature 7p is the nominal temperature and TC and TC are the first and second order temperature coefficients 1 4 Convergence Ngspice uses the Newton Raphson algorithm to solve nonlinear equations arising from circuit description The NR algorithm is interactive and terminates when both of the f
552. s exist and each of the three methods of changing the stored output of the d_srff have separate load values and delays associated with them You may also specify separate rise and fall delay values that are added to those specified for the input lines these allow for more faithful reproduction of the output characteristics of different IC fabrication technologies Note that any UNKNOWN inputs other than s and r immediately cause the output to go UN KNOWN Example SPICE Usage a8 2 12 4 5 6 3 14 flop7 model flop7 d_srff clk_delay 13 0e 9 set_delay 25 0e 9 reset_delay 27 0e 9 ic 2 rise_delay 10 0e 9 fall_delay 3e 9 202 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE 12 4 16 D Latch NAME_TABLE C_Function_Name Spice _Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector cm_d_dlatch d_dlatch digital d type latch data input data in d
553. s for the independent scale axis in a de analysis may start or end at arbitrary real valued numbers x EEES Be careful because not all of the measure commands have been implemented so far deriv and error is missing ES x 15 4 4 Input In the following lines you will get some explanation on the measure commands A simple simulation file with two sines of different frequencies may serve as an example The transient simulation delivers time as the independent variable and two voltages as output dependent variables Input file File simple meas tran sp x Simple measurement examples transient simulation of two sine signals with different frequencies vacl 1 0 DC O sin O 1 1k 0 0 vac2 2 0 DC O sin 0 1 2 0 9k 0 0 tran 10u Sm measure tran for the different inputs see below x control run plot v 1 v 2 endc end After displaying the general syntax of the measurement statement some examples are posted referring to the input file given above 15 4 5 Trig Targ measure according to general form 1 measures the difference in dc voltage frequency or time between two points selected from one or two output vectors The current examples all are using transient simulation Measurements for tran analysis start after a delay time td If you run other examples with ac simulation or spectrum analysis time may be replaced by frequency after a de simulation the independent variable may
554. s he ew ee eee OR RE Hs 343 200 RTE EEE eS eee e eRe ESD SOS ee eh eee Gh aS 343 20 5 Four Bit Binary Adder Bipolar o e 344 20 6 Four Bit Binary Adder MOS lt lt o oco lt oo lt 346 20 7 TIAS ALAS ivete s Se a Sg Sion aa A EA Seve 2 347 21 Statistical circuit analysis 349 A AE 349 21 2 Using random param eters o eee ee ee ee 349 21 3 Behavioral sources B E G R L C with random control 351 21 4 ngspice scripting language lt del ARA AA A 352 21 5 Monte Carlo Simulation e e 353 Slol o AAA ae Sige d Stee ae a Gag ke BOR Hg de 353 Did SAGO cobra a See Se Hare Ss 355 21 6 Data evaluation with Gnuplot o 00 0000 000 355 22 Circuit optimization with ngspice 357 22 1 Optimization of a circuit ooa Sake TELE ELE 357 22 2 ngspice optimizer using ngspice scripts ooo oe 358 22 3 ngspice optimizer using telspice fae da mec ee eses eae as 358 22 4 ngspice optimizer using a Python script oaoa 358 22 5 ngspice optimizer using ASCO 2 605 ice cg ee ee Pew Ee ee es 358 22 5 1 Three stage operational amplifier 2 2 24 eee ee es 359 223 2 Digital inverter oops dioh erh arhead SS 360 AE aeo Bk EK a Oa aa RO al a a a et o 362 22 5 4 Class E power amplifier naaa a 362 23 Notes 363 LL WOME e rr a A OE aa EH ES eS 363 23 2 Acronyms and Abbreviations aoaaa 364
555. s in the form of vectors time voltage etc Each vector has a type and vectors can be operated on and combined algebraically in ways consistent with their types Vectors are normally created as a result of a transient or de simulation They are also established when a data file is read in see the load command 17 5 35 They can also be created with the let command 17 5 32 inside a script If a variable has a name of the form amp word then word is considered a vector and its value is taken to be the value of the variable 17 8 3 Commands Commands have been described in chapter 17 5 17 8 4 control structures Control structures have been described in chapter 17 6 Some simple examples will be given below 17 8 SCRIPTS 309 Control structure examples Test sequences for ngspice control structures vectors are used except foreach start in interactive mode control test sequence for while dowhile let loop 0 echo echo enter loop with amp loop dowhile loop lt 3 echo within dowhile loop amp loop let loop loop 1 end echo after dowhile loop amp loop echo let loop 0 while loop lt 3 echo within while loop amp loop let loop loop 1 end echo after while loop amp loop let loop 3 echo echo enter loop with amp loop dowhile loop lt 3 echo within dowhile loop amp loop output expected let loop loop 1 end echo after dowhile loop amp loop echo let loop
556. s occurred and propagate this change to connected elements Such a change is called an event When an event occurs the simulator examines only those circuit elements that are affected by the event As a result matrix analysis is not required in digital simulators By comparison analog simulators must iteratively solve for the behavior of the entire circuit because of the forward and reverse transmission properties of analog components This difference results in a considerable computational advantage for digital circuit simulators which is reflected in the significantly greater speed of digital simulations 1 1 3 Mixed Mode Simulation Modern circuits often contain a mix of analog and digital circuits To simulate such circuits efficiently and accurately a mix of analog and digital simulation techniques is required When analog simulation algorithms are combined with digital simulation algorithms the result is termed mixed mode simulation Two basic methods of implementing mixed mode simulation used in practice are the native mode and glued mode approaches Native mode simulators implement both an analog algo rithm and a digital algorithm in the same executable Glued mode simulators actually use two simulators one of which is analog and the other digital This type of simulator must define an input output protocol so that the two executables can communicate with each other effectively The communication constraints tend
557. s provided with the distribu tion give hints how to start with ASCO The original ASCO manual is provided as well or is available here It elaborates on the examples using a commercial simulator and provides a detailed description how to set up ASCO Installation of ASCO and MPI under Windows is described in a file INSTALL 22 5 NGSPICE OPTIMIZER USING ASCO 359 Some remarks on how to set up ASCO for ngspice are given in the following sections more to be added These a meant not as a complete description but are an addition the the ASCO manual 22 5 1 Three stage operational amplifier This example is taken from chapter 6 2 2 Tutorial 2 from the ASCO manual The directory examples ngspice amp3 contains four files amp3 cfg This file contains all configuration data for this optimization Of special interest is the following section which sets the required measurements and the constraints on the measured parameters Measurements ac_power VDD MIN 0 dc_gain VOUT GE 122 unity_gain_frequency VOUT GE 3 15E6 phase_margin VOUT GE 51 8 phase_margin VOUT LE 70 amp3_slew_rate VOUT GE 0 777E6 Each of these entries is linked to a file in the extract subdirectory having exactly the same names as given here e g ac_power dc_gain unity_gain phase_margin and amp3_slew_rate Each of these files contains an Info section which is currently not used The Com mands section may contain a measurement command inc
558. s the time derivative of an input signal by calculating the incremental slope of that signal since the previous time point The block also includes gain and output offset parameters to allow for tailoring of the required signal and output upper and lower limits to prevent conver gence errors resulting from excessively large output values The incremental value of output below the output upper limit and above the output lower limit at which smoothing begins is specified via the limit range parameter In AC analysis the value returned is equal to the radian frequency of analysis multiplied by the gain Note that since truncation error checking is not included in the d_dt block it is not rec ommended that the model be used to provide an integration function through the use of a feedback loop Such an arrangement could produce erroneous results Instead you should make use of the integrate model which does include truncation error checking for enhanced accuracy Example SPICE Usage a12 7 12 slope_gen model slope_gen d_dt out_offset 0 0 gain 1 0 out_lower_limit 1e 12 out_upper_limit 1e12 12 2 15 Integrator NAME_ TABLE limit_range 1e 9 C_Function_Name cm_int Spice_Model_Name int Description time integration block PORT_TABLE Port Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds Null_Allowed no no PARAMETER
559. s used to control the amount of information that is either presented to or saved for the user Three types of information are available Debugging information is available as a means to monitor program execution This is useful during long simulations when one is unsure about whether the program has become trapped at some stage of the simulation General information about a device such as material parameters and resource usage can be obtained Finally information about the internal and external states of a device is available Since this data is best interpreted using a post processor a facility is available for saving device solutions in auxiliary output files Solution filenames are automatically generated by the simulator If the named file already exists the file will be overwritten A filename unique to a particular circuit or run can be generated by providing a root filename This root name will be added onto the beginning of the automatically generated name This feature can be used to store solutions in a directory other than the current one by specifying the root filename as the path of the desired directory Solutions are only saved for those devices that specify the save parameter on their instance lines The various physical values that can be saved are named below By default the following values are saved the doping the electron and hole concentrations the potential the electric field the electron and hole current densities and
560. scription Valid Directions d digital in or out g conductance VCCS inout gd differential conductance VCCS inout h resistance CCVS inout hd differential resistance CCVS inout i current in or out id differential current in or out v voltage in or out vd differential voltage in or out lt identifier gt user defined type in or out Table 27 1 Port Types 27 6 2 3 Direction The direction of a port specifies the data flow direction through the port A direction must be one of in out or inout It is introduced by the Direction keyword followed by a valid direction value 27 6 2 4 Default Type The Default_Type field specifies the type of a port These types are identical to those used to define the port types on a SPICE deck instance card see Table 12 1 but without the percent sign preceding them Table 27 1 summarizes the allowable types 27 6 2 5 Allowed Types A port must specify the types it is allowed to assume An allowed type value must be a list of type names a blank or comma separated list of names delimited by square brackets e g v vd i id or d The type names must be taken from those listed in Table 27 1 27 6 2 6 Vector A port which is a vector can be thought of as a bus The Vector field is introduced with the Vector keyword followed by a Boolean value YES TRUE NO or FALSE The values YES and TRUE are
561. scripts will be added ngspice for Windows will also search for spinit in the directory where ngspice exe resides If spinit is not found a warning message is issued but ngspice will continue but of course without code models etc 232 CHAPTER 16 STARTING NGSPICE Standard spinit contents x Standard ngspice init file alias exit quit alias acct rusage all set xlllineararcs set rndseed 12 set filetype ascii set ngdebug xunset brief strcmp __flag program ngspice if __flag 0 x For SPICE2 POLYs edit the below line to point to the location of your codemodel codemodel C Spice lib spice spice2poly cm The other codemodels codemodel C Spice lib spice analog cm codemodel C Spice lib spice digital cm codemodel C Spice lib spice xtradev cm codemodel C Spice lib spice xtraevt cm end unset __flag spinit contains a script which is run upon start up of ngspice You may find details of scripting in the next chapter Aliases name equivalences are set set filetype ascii will yield ASCII output in the output data file rawfile a more compact binary format is used otherwise The asterisk will comment out this line If used by ngspice spinit will then load the XSPICE code models from their absolute paths You may also define relative paths here set ngdebug will yield a lot of additional debug output Any other contents of the script e g plotting preferences may be included here and started automatica
562. scussion 12 2 20 Controlled Sine Wave Oscillator NAME_TABLE C_Function_Name cm_sine Spice_Model_Name sine Description controlled sine wave oscillator PORT_TABLE Port Name cntl_in out Description control input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds Null_Allowed no no PARAMETER_TABLE Parameter_Name cntl_array freq_array Description control array frequency array Data_Type real real Default_Value 0 0 1 0e3 Limits 0 Vector yes yes Vector Bounds 2 cntl_array Null_Allowed no no PARAMETER_TABLE Parameter Name out_low out_high Description output peak low value output peak high value Data_Type real real Default_Value 1 0 1 0 Limits 12 2 ANALOG MODELS Vector Vector Bounds Null_ Allowed no yes 169 no yes Description This function is a controlled sine wave oscillator with parameterizable values of low and high peak output It takes an input voltage or current value This value is used as the independent variable in the piecewise linear curve described by the coordinate points of the cntl array and freq array pairs From the curve a frequency value is determined and the oscillator will output a sine wave at that frequency From the above it is easy to see that array sizes of 2 for both the cntl array and the freq array will yield a linear variation of the frequency with respect to
563. se see the sections titled Basic Install and Advanced Install Download source from CVS as described on the sourceforge ngspice CVS page Define and enter a directory of your choice e g home myname software Download the source code from CVS for example by anonymous access by issuing the command cvs z3 d pserver anonymous ngspice cvs sourceforge net cvsroot ngspice co P ngspice ng spice rework 329 530 CHAPTER 31 COMPILATION NOTES You will find the sources in directory home myname software ngspice ng spice rework Now enter the ngspice top level directory ng spice rework where the file INSTALL can be found The project uses the GNU build process You should be able to do the following autogen sh configure with x enable xspice enable cider disable debug with readline yes make sudo make install See the section titled Advanced Install for instructions about arguments that can be passed to configure to customize the build and installation The following arguments are already used here and may be called sort of standard enable xspice Include the XSPICE extensions see chapters 12 and 27 enable cider Include CIDER numerical device simulator see chapter 29 disable debug No debugging information included optimized and compact code with readline yes Include an editor for the input command line command history backspace insert etc If readline is not available e
564. sed simulators may include various enhancements to the basic version from the University of California at Berkeley most use a similar approach in describing circuits This approach involves capturing the information present in a circuit schematic in the form of a text file that follows a defined format This format requires the assignment of alphanumeric identifiers to each circuit node the assignment of component identifiers to each 371 372 CHAPTER 25 EXECUTION PROCEDURES 100 Ay 10 AMP_OUT R_SOURCE IK R_LOAD Figure 25 1 Example Circuit 1 circuit device and the definition of the significant parameters for each device For example the circuit description below shows the equivalent input file for the circuit shown in Figure25 1 Small Signal Amplifier This circuit simulates a simple small signal amplifier Vin Input 0 O SIN O 1 500Hz R_source Input Amp_In 100 C1 Amp_In 0 1uF R_Amp_Input Amp_In 0 1MEG El Amp 0ut 0 Amp_In 0 10 R_Load Amp_Out O 1000 Tran 1 0u 0 01 end This file exhibits many of the most important properties common to all SPICE circuit descrip tion files including the following The first line of the file is always interpreted as the title of the circuit The title may consist of any text string Lines which provide user comments but no circuit information are begun by an asterisk A circuit device is specified by a device name followed by the no
565. set line The nodeset line is only to help de convergence and does not affect final bias solution except for multi stable circuits The two interpretations of this line are as follows 226 CHAPTER 15 ANALYSES AND OUTPUT CONTROL BATCH MODE 1 When the uic parameter is specified on the tran line then the node voltages specified on the ic control line are used to compute the capacitor diode BJT JFET and MOSFET initial conditions This is equivalent to specifying the ic parameter on each device line but is much more convenient The ic parameter can still be specified and takes precedence over the ic values Since no dc bias initial transient solution is computed before the transient analysis one should take care to specify all de source voltages on the ic control line if they are to be used to compute device initial conditions 2 When the uic parameter is not specified on the tran control line the dc bias initial transient solution is computed before the transient analysis In this case the node volt ages specified on the ic control line is forced to the desired initial values during the bias solution During transient analysis the constraint on these node voltages is removed This is the preferred method since it allows ngspice to compute a consistent dc solution 15 3 Analyses 15 3 1 AC Small Signal AC Analysis General form ac dec nd fstart fstop ac oct no fstart fstop ac lin np fstart fstop E
566. sign Automation Conf February 1991 pp 142 148 S Lin and E S Kuh Transient Simulation of Lossy Interconnect Proc Design Au tomation Conference Anaheim CA June 1992 pp 81 86 6 4 1 Single Lossy Transmission Line TXL General form YXXXXXXX N1 0 N2 0 mname lt LEN LENGTH gt Example Y1 1 0 2 0 ymod LEN 2 MODEL ymod txl R 12 45 L 8 972e 9 G 0 C 0 468e 12 length 16 ni and n2 are the nodes of the two ports Optional instance parameter len is the length of the line may be expressed in m The TXL model takes a number of parameters 100 CHAPTER 6 TRANSMISSION LINES Name Parameter Units Type Default Example R resistance length O unit 0 0 0 2 L inductance length A unit 0 0 9 13e 9 G conductance length mhos unit 0 0 0 0 C capacitance length F unit 0 0 3 65e 12 LENGTH length of line no default 1 0 Model parameter length must be specified 6 4 2 Coupled Multiconductor Line CPL The CPL multiconductor line model which in theory should be similar to the RLGC model but without frequency dependent loss neither skin effect and nor frequency dependent dielectric loss Up to 8 coupled lines are supported in NGSPICE General form PXXXXXXX NII NI2 NIX GND1 NOI NO2 NOX GND2 mname lt LEN LENGTH gt Example Pl inl in2 O bl b2 0 PLINE model PLINE CPL length Len R 1 0 1 L L11 L12 L22 G 0 0 0 C C11 C12 C22 param Len 1 Rs 0 C11 9 1435
567. sing Location or defined implicitly relative to the location of the previous reference line by using Width If the first card in either direction is specified using Width an initial reference line is automatically generated at location 0 0 The line number of the reference line can be given explicitly in which case the automatic lines are evenly spaced within the interval and the number of lines is determined from the difference between the current line number and that of the previous reference line However if the interval width is given then the line number is interpreted directly as the number of additional lines to add to the mesh For a nonuniformly spaced interval the number of automatic lines has to be determined using the mesh spacing parameters Nonuniform spacing is triggered by providing a desired ratio for the lengths of the spaces between adjacent pairs of lines This ratio should always be greater than one indicating the ratio of larger spaces to smaller spaces In addition to the ratio one 29 16 X MESH Y MESH 465 or both of the space widths at the ends of the interval must be provided If only one is given it will be the smallest space and the largest space will be at the opposite end of the interval If both are given the largest space will be in the middle of the interval In certain cases it is desirable to limit the growth of space widths in order to control the solution accuracy This can be accomplished by specifyin
568. sion line inverter Two transmission line elements are required since two propagation modes are excited In the case of a coaxial line the first line T1 models the inner conductor with respect to the shield and the second line T2 models the shield with respect to the outside world Example TRANSMISSION LINE INVERTER V1 1 0 PULSE O 1 0 0 1N RI 1 2 50 X1 2 0 0 4 TLINE R2 4 0 50 SUBCKT TLINE 1 2 3 4 Tl 1 2 3 4 Z0 50 TD 1 5NS T2 2 0 4 0 ZO 100 TD 1NS ENDS TLINE TRAN 0 1NS 20NS END 348 CHAPTER 20 EXAMPLE CIRCUITS Chapter 21 Statistical circuit analysis 21 1 Introduction Real circuits do not operate in a world with fixed values of device parameters power supplies and environmental data Even if a ngspice output offers 5 digits or more of precision this should not mislead you thinking that your circuits will behave exactly the same All physical parameters influencing a circuit e g MOS Source drain resistance threshold voltage transcon ductance are distributed parameters often following a Gaussian distribution with a mean value uand a standard deviation O To obtain circuits operating reliably under varying parameters it might be necessary to simulate them taking certain parameter spreads into account ngspice offers several methods supporting this task A powerful random number generator is working in the background Its seed value is derived from the process id upon start up of ngspice If you need reprodu
569. sional vectors a vector of one less dimension is returned Also for multi dimensional vectors the notation expr m n will return the nth element of the mth subvector To get a subrange of a vector use the form expr lower upper To reference vectors in a plot that is not the current plot see the setplot command below the notation plotname vecname can be used Either a plotname or a vector name may be the wildcard all If the plotname is all matching vectors from all plots are specified and if the vector name is all all vectors in the specified plots are referenced Note that you may not use binary operations on expressions involving wildcards it is not obvious what all all should denote for instance Thus some contrived examples of expressions are Expressions example cos TIME db v 3 sin cos log 1 2 3 4567 8 9 10 TIME rnd v 9 15 cos vin branch 7 9e5 8 not ac3 FREQ 32 amp tranl TIME 10 gt 3 sunif 0 ge 0 1 0 2 0 Vector names in ngspice may have look like ddname param where dname is either the name of a device instance or of a device model This vector contains the value of the param parameter of the device or model See Appendix chapt 30 for details of which parameters are available The value is a vector of length 1 This function is also available with the show command and 1s available with variables for convenience for command scripts There are a number of pre defined constants
570. sis enable xgraph Compile the Xgraph plotting program Xgraph is a plotting package for X11 and was once very popular 31 1 4 2 Options Useful for Debugging Ngspice disable debug This option will remove the g option passed to the compiler This speeds up execution time and compilation a lot and is recommended for normal use The following options are seldom used today not tested some may even no longer be imple mented enable ansi Configure will try to find an option for your compiler so that it expects ansi C enable asdebug Debug sensitivity code ASDEBUG enable blktmsdebug Debug distortion code BLOCKTIMES enable checkergcc Option for compilation with checkergcc enable cpdebug Enable ngspice shell code debug enable ftedebug Enable ngspice frontend debug enable gc Enable the Boehm Weiser Conservative Garbage Collector enable pzdebug Debug pole zero code enable sensdebug Debug sensitivity code SENSDEBUG enable smltmsdebug Debug distortion code SMALLTIMES enable smoketest Enable smoketest compile enable stepdebug Turns on debugging of convergence steps in transient analysis 31 1 5 Compilation using an user defined directory tree for object files The procedures described above will store the o files output of the compilation step into the directories where the sources c are located This may not be the best option if you want for example to maintain a debug version and in
571. sis tent style adhering to the punctuation shown here makes the input easier to understand With respect to branch voltages and currents ngspice uniformly uses the associated reference con vention current flows in the direction of voltage drop 3 1 General options and information 3 1 1 Simulating more devices in parallel If you need to simulate more devices of the same kind in parallel you can use the m often called parallel multiplier option which is available for all instances except transmission lines and sources both independent and controlled The parallel multiplier is implemented by mul tiplying the value of m the element s matrix stamp thus it cannot be used to accurately simulate larger devices in integrated circuits The netlist below show how to correctly use the parallel multiplier Multiple device example dl 2 0 mydiode m 10 d01 1 0 mydiode d02 1 0 mydiode d03 1 0 mydiode d04 1 0 mydiode d05 1 0 mydiode d06 1 0 mydiode d07 1 0 mydiode d08 1 0 mydiode d09 1 0 mydiode d10 1 0 mydiode The di instance connected between nodes 2 and O is equivalent to the parallel d01 d10 con nected between 1 and 0 61 62 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS 3 1 2 Technology scaling Still to be implemented and written 3 1 3 Model binning Binning is a kind of range partitioning for geometry dependent models like MOSFET s The purpose is to cover larger geometry ranges Width and Length with higher accuracy
572. sistor PWL Piece Wise Linear RAM Random Access Memory ROM Read Only Memory SDD Software Design Document SI Simulator Interface SPICE Simulation Program with Integrated Circuit Emphasis This program was developed at the University of California at Berkeley and is the origin of ngspice SPICE3 Version 3 of SPICE SRS Software Requirements Specification SUM Software User s Manual UCB University of California at Berkeley UDN User Defined Node s VCCS Voltage Controlled Current Source VCVS Voltage Controlled Voltage Source XSPICE Extended SPICE option to ngspice integrating predefined or user defined code mod els for event driven mixed signal simulation Bibliography 1 2 3 4 5 6 7 8 9 10 11 12 A Vladimirescu and S Liu The Simulation of MOS Integrated Circuits Using SPICE2 ERL Memo No ERL M80 7 Electronics Research Laboratory University of California Berkeley October 1980 T Sakurai and A R Newton A Simple MOSFET Model for Circuit Analysis and its appli cation to CMOS gate delay analysis and series connected MOSFET Structure ERL Memo No ERL M90 19 Electronics Research Laboratory University of California Berkeley March 1990 B J Sheu D L Scharfetter and P K Ko SPICE2 Implementation of BSIM ERL Memo No ERL M85 42 Electronics Research Laboratory University of California Berkeley May 1985 J R Pierret A MOS Parameter Extraction Program for
573. some of them not used and tested intensively Therefore errors may be found some still evolving from the original spice3f5 code others introduced during the ongoing code enhancements If you happen to experience an error during the usage of ngspice please send a report to the development team Ngspice is hosted on sourceforge the preferred place to post a bug report is the ngspice bug tracker We would prefer to have your bug tested against the actual source code available at CVS but of course a report using the most recent ngspice release is welcome Please provide the following information with your report Ngspice version Operating system Small input file to reproduce the bug Actual output versus the expected output Chapter 17 Interactive Interpreter 17 1 Introduction The simulation flow in ngspice input simulation output may be controlled by dot commands see chapt 15 and 16 4 1 in batch mode There is however a much more powerful control scheme available in ngspice traditionally coined Interactive Interpreter but being much more than just that In fact there are several ways to use this feature truely interactively by typing commands to the input but also running command sequences as scripts or as part of your input deck in a quasi batch mode You may type in expressions functions 17 2 or commands 17 5 into the input console to elaborate on data already achieved from the interactive simulation session
574. spice mingw or cygwin console executable 540 31 3 Reporting CSS o na AAA as 541 32 Copyrights and licenses 543 32 1 Docum ntation license lt se s os sda e es 543 32 1 1 Spice documentation copyright 24 644 64264464 be Ges 543 32 1 2 XSPICE SOFTWARE documentation copyright 543 CONTENTS 25 32 1 3 CIDER RESEARCH SOFTWARE AGREEMENT superseded by 32 2 1 544 320 DISPO IEE ck Se Se Be hw ee ESAS SOB SO Ee ee SEE Le 544 32 2 1 Modifed BSD leeiee sc k2cbee bid c 2 oH 545 eee KOPCE o oca OR aR ERE GERBERA EEE ESS 546 32 29 tElispice MENA o ceo eG oe eS ee ee eS 546 32 2 4 Linking to GPLd libraries e g readline 546 26 CONTENTS Prefaces Preface to the first edition This manual has been assembled from different sources 1 The spice3f5 manual 2 the XSPICE user s manual 3 the CIDER user s manual and some original material needed to describe the new features and the newly implemented models This cut and paste approach while not being orthodox allowed ngspice to have a full manual in a fraction of the time that writing a completely new text would have required The use of LaTex and Lyx instead of TeXinfo which was the original encoding for the manual further helped to reduce the writing effort and improved the quality of the result at the expense of an on line version of the manual but due to the complexity of the software I hardly think that user
575. ssion containing node voltages or branch currents in the form of i vm and any other terms as given for the B source and described in chapter 5 1 It may contain parameters 2 8 1 An example file is given below Example input file for non linear resistor Non linear resistor param RO 1k Vi 1 Vt 0 5 resistor depending on control voltage V rr RI rr Or V rr lt Vt RO 2 RO x control voltage V1 rr 0 PWL 0 O 100u Vi control set noaskquit tran 100n 100u uic plot 1 V1 endc end 3 2 5 Capacitors General form CXXXXXXX n n lt value gt lt mname gt lt m val gt lt scale val gt lt temp val gt lt dtemp val gt lt ic init_condition gt Examples CBYP 13 0 1UF COSC 17 23 10U IC 3V Ngspice provides a detailed model for capacitors Capacitors in the netlist can be specified giving their capacitance or their geometrical and physical characteristics Following the original spice3 convention capacitors specified by their geometrical or physical characteristics are called semiconductor capacitors and are described in the next section In this first form n and n are the positive and negative element nodes respectively and value is the capacitance in Farads Capacitance can be specified in the instance line as in the examples above or in a model line as in the example below Cl 15 5 estd C2 2 7 cstd model cstd C cap 3n Both capacitors have a capacitance of 3nF If
576. stants However there are some circuit elements in Spice which accept arithmetic expressions that are NOT evaluated at this point but only later during circuit analysis These are the arbitrary current and voltage sources B sources 5 as well as E and G sources and R L or C devices The syntactic difference is that compile time expressions are within braces but run time expressions have no braces To make things more complicated the back end ngspice scripting language also accepts arithmetic logic expressions that operate on its own scalar or vector data sets 17 2 Please see also chapt 2 11 It would be desirable to have the same expression syntax operator and function set and prece dence rules for the three contexts mentioned above In the current Numparam implementation that goal is not yet achieved 2 9 func With this line a function may be defined The syntax of its expression is equivalent to the expression syntax from the param line 2 8 5 General form func lt ident gt lt expr gt Examples func icos x cos x 1 func f x y xx y 58 CHAPTER 2 CIRCUIT DESCRIPTION func will initiate a replacement operation After reading the input files and before parameters are evaluated all occurrences of the icos x function will be replaced by cos x 1 All occurrences of f x y will be replaced by x y Function statements may be nested to a depth of t b d 2 10 csparam Create a constant ve
577. t and device simulator can provide greater simulation accuracy than a stand alone circuit or device simulator by numer ically modeling the critical devices in a circuit Compact models can be used for noncritical devices CIDER couples the latest version of SPICE3 version 3F 2 JOHN92 to a internal C based device simulator DSIM SPICE3 provides circuit analyses compact models for semiconductor devices and an interactive user interface DSIM provides accurate one and two dimensional numerical device models based on the solution of Poisson s equation and the electron and hole current continuity equations DSIM incorporates many of the same basic physical models found in the the Stanford two dimensional device simulator PISCES PINT85 Input to CIDER consists of a SPICE like description of the circuit and its compact models and PISCES like descriptions of the structures of numerically modeled devices As a result CIDER should seem familiar to designers already accustomed to these two tools For example SPICE3F 2 input files should run without modification producing identical results CIDER is based on the mixed level circuit and device simulator CODECS MAYA88 and is a replacement for this program The basic algorithms of the two programs are the same Some of the differences between CIDER and CODECS are described below The CIDER input format has greater flexibility and allows increased access to physical model parameters New physical mo
578. t not in SPICE2 Ngspice requires that the following topological constraints are satisfied e The circuit cannot contain a loop of voltage sources and or inductors and cannot contain a cut set of current sources and or capacitors e Each node in the circuit must have a de path to ground e Every node must have at least two connections except for transmission line nodes to permit unterminated transmission lines and MOSFET substrate nodes which have two internal connections anyway 2 2 BASIC LINES 47 2 2 Basic lines 2 2 1 TITLE line Examples POWER AMPLIFIER CIRCUIT x additional lines following Test of CAM cell x additional lines following The title line must be the first in the input file Its contents are printed verbatim as the heading for each section of output As an alternative you may place a TITLE lt any title gt line anywhere in your input deck The first line of your input deck will be overridden by the contents of this line following the TITLE statement TITLE line example Sol ol ol SI ole olle K K le ole ole k ole ol k k k oe oe kk ok ak k ak ok ok x additional lines following TITLE Test of CAM cell x additional lines following will internally be replaced by Internal input deck Test of CAM cell x additional lines following TITLE Test of CAM cell x additional lines following 2 2 2 END Line Examples end The End line must always be the last in the input file Note th
579. t timepoint The timepoint O current 1 previous cm_analog_alloc and cm_event_alloc allow you to allocate storage space for analog and event driven model state information The storage space is not static but rather represents a storage vector of two values which rotate with each accepted simulator time point evaluation This is explained more fully below The tag parameter allows you to specify an integer tag when allocating space This allows more than one rotational storage location per model to be allocated The size parameter specifies the size in bytes of the storage computed by the C language sizeof operator Both cm_analog_alloc and cm_event_alloc will not return pointers to the allocated space as has been available and buggy from the original XSPICE code cm_analog_alloc should be used by an analog model cm_event_alloc should be used by an event driven model cm_analog_get_ptr and cm_event_get_ptr retrieve the pointer location of the rotational storage space previously allocated by cm_analog_alloc or cm_event_alloc Important no tice These functions must be called only after all memory allocation all calls to cm_analog_alloc or cm_event_alloc have been done All pointers returned between calls to memory allocation will become obsolete point to freed memory because of an internal realloc The functions take the integer tag used to allocate the space and an integer from 0 to 1
580. tance 42 cbd Out real Bulk Drain capacitance 43 cbs Out real Bulk Source capacitance 52 cgs Out real Gate Source capacitance 55 cgd Out real Gate Drain capacitance 58 cgb Out real Gate Bulk capacitance 44 cbdO Out real Zero Bias B D junction capacitance 45 cbdsw0 Out real 46 cbsO Out real Zero Bias B S junction capacitance 47 cbsswO Out real 54 cqgs Out real Capacitance due to gate source charge storage 57 cqgd Out real Capacitance due to gate drain charge storage 60 cqgb Out real Capacitance due to gate bulk charge storage 62 cqbd Out real Capacitance due to bulk drain charge storage 64 cqbs Out real Capacitance due to bulk source charge storage 53 qgs Out real Gate Source charge storage 56 qgd Out real Gate Drain charge storage 59 qgb Out real Gate Bulk charge storage 61 qbd Out real Bulk Drain charge storage 63 qbs Out real Bulk Source charge storage 19 p Out real Instantaneous power 75 sens_1 de Out real dc sensitivity wrt length 70 sens_l real Out real real part of ac sensitivity wrt length 71 sens_l imag Out real imag part of ac sensitivity wrt length 74 sens_1_cplx Out complex ac sensitivity wrt length 72 sens_1 mag Out real sensitivity wrt l of ac magnitude 73 sens_1_ph Out real sensitivity wrt l of ac phase 76 sens_w_dc Out real dc sensitivity wrt width 65 sens_w_real Out real dc sensitivity and real part of ac sensitivity wrt width
581. te voltage error tolerance of the program The default value is 1 uv 15 1 2 1 Matrix Conditioning info In most SPICE based simulators problems can arise with certain circuit topologies One of the most common problems is the absence of a DC path to ground at some node This may happen for example when two capacitors are connected in series with no other connection at the common node or when certain code models are cascaded The result is an ill conditioned or nearly singular matrix that prevents the simulation from completing XSPICE introduces a new rshunt option to help eliminate this problem When used this option inserts resistors to ground at all the analog nodes in the circuit In general the value of rshunt should be set to some very high resistance e g 1000 Meg Ohms or greater so that the operation of the circuit 1s essentially unaffected but the matrix problems are corrected If you should encounter a no DC path to ground or a matrix is nearly singular error message with your circuit you should try adding the following option card to your circuit description deck Option rshunt 1 0e12 Usually a value of 1 0e12 is sufficient to correct the matrix problems However if you still have problems you may wish to try lowering this value to 1 0e10 or 1 0e9 15 1 3 Transient Analysis Options CHGTOL x resets the charge tolerance of the program The default value is 1 0e 14 CONVSTEP x relative step limit ap
582. te your own models by writing them in the C programming language The code models are generated upon compiling ngspice They are stored in shared libraries which may be distributed independently from the ngspice sources Upon runtime ngspice will load the code model libraries and make the code model instances available for simulation 24 3 XSPICE Top Level Diagram A top level diagram of the XSPICE system integrated into ngspice is shown in Figure 24 1 The XSPICE Simulator is made up of the NGSPICE core the event driven algorithm circuit description syntax parser extensions a loading routine for code models and the Nutmeg user interface The XSPICE Code Model Subsystem consists of the Code Model Generator 5 stan dard code model library sources with more than 40 code models the sources for Node Type Libraries and all the interfaces to User Defined Code Models and to User Defined Node Types ngspice source distribution XSPICE ngspice code model generator simulator sources Sources for XSPICE extensions predefined code models user defined modul for loading code models code models make SS Soe code model ngspice executable shared libraries analog digital spice2poly load by xtradev xtraevt codemode n n user defined Figure 24 1 ngspice XSPICE Top Level Diagram Chapter 25 Execution Procedures This chapter covers operation of the XSPICE simulator and the Code Model Subsystem It beg
583. ted The parameters aga aga2 lim obtain their numerical values once If the random function appears in a device card e g v11 11 0 agauss 1 2 3 a new random number is generated Random number example using parameters random number tests param aga agauss 1 2 3 param aga2 2 aga param lim limit 0 1 2 func rgauss a b c 5 agauss a b c always same value as defined above vi 10 1lim v2 20 lim may be a different value v3 3 0 Lami t 0 08 always new random values vit 11 0 agauss 1 2 3 v12 12 0 agauss 1 2 3 vi3 13 0 agauss 1 2 3 same value as defined above v14 14 0 aga vi5 15 0 aga vi6 16 0 aga2 using func new random values vi7 17 0 rgauss 0 2 3 vi8 18 0 rgauss 0 2 3 Op control run print v 1 1 2 8 v 11 v 12 vas print v 14 v 15 v 16 v 17 v 18 endc end 21 3 BEHAVIORAL SOURCES B E G R L C WITH RANDOM CONTROL 351 So v1 v2 and v3 will get the same value whereas v4 might differ v11 v12 and v13 will get different values v14 v15 and v16 will obtain the values set above in the param statements func will start its replacement algorithm rgauss a b c will be replaced everywhere by 5 agauss a b c Thus device and model parameters may obtain statistically distributed starting values You simply set a model parameter not to a fixed numerical value but insert a parameter instead
584. temperature range 25 75 C square norm norme 2 in french I m not sure of the English translation 334 CHAPTER 19 TCLSPICE proc cost r10 r12 tref_blt length 0 spice alter rl0 r10 spice alter r12 r12 foreach point temperatures_blt range 0 expr temperatures_blt length 1 tref_blt append iteration point set result blt vector expr 1000 x sum tref_blt expected_blt 2 disp_curve rl0 r12 return result This function displays the expected and effective value of the voltage as well as the r10 and r12 resistor values proc disp_curve rl0 r12 g configure title Valeurs optimales R10 r10 R12 r12 Main loop starts here Optimization blt vector create tref_tmp blt vector create tref_blt blt vector create expected_blt blt vector create temperatures_blt temperatures_blt append temperatures_calc 25 75 30 expected_blt append tref_calc temperatures_blt range O expr temperatures_blt length 1 blt graph g pack g side top fill both expand true g element create real pixels 4 xdata temperatures_blt ydata tref_blt g element create expected fill red pixels O dashes dot xdata temperatures_blt ydata expected_blt Source the circuit and optimize it result is retrieved in r10r12 variable and affected to r10 and r12 with a regular expression A bit ugly spice
585. ter 15 3 2 for more details 17 5 13 Define Define a function General Form define function argl arg2 expression Define the user definable function with the name function and arguments argl arg2 to be expression which may involve the arguments When the function is later used the arguments it is given are substituted for the formal arguments when it is parsed If expression is not present any definition for function is printed and if there are no arguments to define then all currently active definitions are printed Note that you may have different functions defined with the same name but different arities Some useful definitions are Example define max x y x gt y x x lt y x y define min x y x lt y x x gt y y define limit nom avar nom sgauss 0 gt 0 avar avar 17 5 14 Deftype Define a new type for a vector or plot General Form deftype v p typename abbrev defines types for vectors and plots abbrev will be used to parse things like abbrev name and to label axes with M lt abbrev gt instead of numbers It may be omitted Also the command deftype p plottype pattern will assign plottype as the name to any plot with one of the patterns in its Name field Example deftype v capacitance F settype capacitance moscap plot moscap vs v cc 17 5 15 Delete Remove a trace or breakpoint General Form delete debug number Delete the speci
586. the BSIM Model ERL Memo Nos ERL M84 99 and M84 100 Electronics Research Laboratory University of California Berkeley November 1984 Min Chie Jeng Design and Modeling of Deep Submicrometer MOSFETSs ERL Memo Nos ERL M90 90 Electronics Research Laboratory University of California Berkeley October 1990 Soyeon Park Analysis and SPICE implementation of High Temperature Effects on MOS FET Master s thesis University of California Berkeley December 1986 Clement Szeto Simulation of Temperature Effects in MOSFETs STEIM Master s the sis University of California Berkeley May 1988 J S Roychowdhury and D O Pederson Efficient Transient Simulation of Lossy Intercon nect Proc of the 28th ACM IEEE Design Automation Conference June 17 21 1991 San Francisco A E Parker and D J Skellern An Improved FET Model for Computer Simulators IEEE Trans CAD vol 9 no 5 pp 551 553 May 1990 R Saleh and A Yang Editors Simulation and Modeling IEEE Circuits and Devices vol 8 no 3 pp 7 8 and 49 May 1992 H Statz et al GaAs FET Device and Circuit Simulation in SPICE IEEE Transactions on Electron Devices V34 Number 2 February 1987 pp160 169 Weidong Liu et al BSIM3v3 2 3 MOSFET Model User s Manual BSIM3v3 2 3 365 366 BIBLIOGRAPHY 13 Weidong Lui et al BSIM3 v3 3 0 MOSFET Model User s Manual BSIM3v3 3 0 14 15 16 17 18 19 20 21 22 SPI
587. the above circuit line by line not to forget the first line which is a title and will be ignored If you close your input with ctrl Z and return you will get the following output this is valid for MINGW only on the console like a raw file Circuit test s Doing analysis at TEMP 27 000000 and TNOM 27 000000 Title test s Date Sun Jan 15 18 57 13 2012 Plotname DC transfer characteristic Flags real No Variables 2 No Points O 258 CHAPTER 16 STARTING NGSPICE Variables No of Data Columns 2 O v v sweep voltage 1 i v1 current Values O 1 000000000000000e 000 5 000000000000000e 004 1 5 000000000000000e 001 2 500000000000000e 004 2 0 000000000000000e 000 0 000000000000000e 000 3 5 000000000000000e 001 2 500000000000000e 004 4 1 000000000000000e 000 5 000000000000000e 004 122 5 The number 5 of the last line 122 5 shows the number of data points which is missing in the above line No Points 0 because at the time of writing to the console it has not yet been available ctrl Zis not usable here in LINUX a patch to install ctr1 D instead is being evaluated 16 12 Ngspice control via input output fifos The following bash script under LINUX launches ngspice in another thread writes some commands in ngspice input reads the output and prints them on the console 16 12 NGSPICE CONTROL VIA INPUT OUTPUT FIFOS 239 Example usr bin env bash NGSPICE COMMAND ngspice
588. the defined type INPUT_STRUCT_PTR_ARRAY SIZE int The size of the array STRUCT_MEMBER_ID char A string naming some part of the structure PLOT_VAL double The value of the specified structure member for plotting purposes PRINT_VAL char The value of the specified structure member for printing purposes Table 27 4 User Defined Node Macros 422 CHAPTER 27 CODE MODELS AND USER DEFINED NODES Optional functions dismantle Free allocations inside structure but not structure itself invert Invert logical value of structure resolve Determine the resultant when multiple outputs are connected to a node plot_val Output a real value for specified structure component for plotting purposes print_val Output a string value for specified structure component for printing ipc_val Output a binary representation of the structure suitable for sending over the IPC channel The required actions for each of these functions are described in the following subsections In each function mkudndir replaces the XXX with the node type name specified by you when mkudndir is invoked The macros used in implementing the functions are described in a later section 27 8 2 1 Function udn XXX create Allocate space for the data structure defined for the User Defined Node to pass data between models Then assign pointer created by the storage allocator e g malloc to MALLOCED_PTR 27 8 2 2 Function udn XXX initialize Assi
589. the displacement current density Values can be added to or deleted from this list by turning the appropriate flag on or off For vector valued quantities in two dimensions both the X and Y components are saved The vector magnitude can be obtained during post processing Saved solutions can be used in conjunction with the options card and instance lines to reuse previously calculated solutions as initial guesses for new solutions For example it is typical to initialize the device to a known state prior to beginning any DC transfer curve or operating point analysis This state is an ideal candidate to be saved for later use when it is known that many analyses will be performed on a particular device structure 462 CHAPTER 29 CIDER USER S MANUAL 29 14 2 Parameters Name Type Description All Debug Flag Debug all analyses OP Debug Flag OP analyses DC Debug Flag DC analyses TRAN Debug Flag TRAN analyses AC Debug Flag AC analyses PZ Debug Flag PZ analyses Material Flag Physical material information Statistics Resources Flag Resource usage information RootFile String Root of output file names Psi Flag Potential V Equ Psi Flag Equilibrium potential V Vac Psi Flag Vacuum potential V Doping Flag Net doping cm N Conc Flag Electron concentration cm P Conc Flag Hole concentration cm PhiN Flag Electron quasi fermi potential V PhiP Flag Hole quasi fermi potential V PhiC Fla
590. the instance and MODEL cards which define a code model will follow the abstract form described below This form illustrates that the number of inputs and outputs and the number of parameters which can be specified is relatively open ended and can be interpreted in a variety of ways note that angle brackets lt and gt enclose optional inputs Example AXXXXXXX lt v i hvd hid he hed sh 4hd or d gt lt gt RAS UL LNG hid hey pedo ails Bids or d gt lt NIN1 or NINi NIN1 or null gt lt gt lt NIN2 lt gt gt lt v hi vd hid 8 gd h 4hd 4d or vname gt lt gt lt lt hs 400 414 483 200 40 Abd or 4d gt lt NOUT1 or NOUT1 NOUT1 gt lt gt lt NOQUT2 lt gt gt MODELNAME MODEL MODELNAME MODELTYPE lt PARAMNAME1 lt gt VAL1 lt VAL2 lt gt gt PARAMNAME2 gt gt 12 1 CODE MODEL ELEMENT amp MODEL CARDS 135 Square brackets are used to enclose vector input nodes In addition these brackets are used to delineate vectors of parameters The literal string null when included in a node list is interpreted as no connection at that input to the model Null is not allowed as the name of a model s input or output if the model only has one input or one output Also null should only be used to indicate a missing connection for a code model use on other XSPICE component is not interpreted as a missing connection but will
591. the most recent BSIM3 model version 3 3 0 because it contains corrections to all known bugs To achieve that change the version parameter in your modelcard files to VERSION 3 3 0 The older models will not be supported they are made available for reference only 11 2 10 BSIM4 model levels 14 54 This is the newest class of the BSIM family and introduces noise modeling and extrinsic para sitics BSIM4 as the extension of BSIM3 model addresses the MOSFET physical effects into 11 2 MOSFET MODELS NMOS PMOS 131 sub 100nm regime It is a physics based accurate scalable robust and predictive MOSFET SPICE model for circuit simulation and CMOS technology development It is developed by the BSIM Research Group in the Department of Electrical Engineering and Computer Sciences EECS at the University of California Berkeley see BSIM4 home page BSIM4 has a long revision history which is summarized below Release Date Notes Version flag BSIM4 0 0 03 24 2000 BSIM4 1 0 10 11 2000 BSIM4 2 0 04 06 2001 BSIM4 2 1 10 05 2001 4 2 1 BSIM4 3 0 05 09 2003 g 4 3 0 BSIM4 4 0 03 04 2004 4 4 0 BSIM4 5 0 07 29 2005 l 4 5 0 BSIM4 6 0 12 13 2006 BSIM4 6 5 09 09 2009 4 6 5 BSIM4 7 0 04 08 2011 4 7 supported in ngspice using e g the version lt version flag gt flag in the parameter file Parallel processing using OpenMP support is
592. the poles and or zeros in the small signal ac transfer function The program first computes the dc operating point and then determines the linearized small signal models for all the nonlinear devices in the circuit This circuit 1s Temperature TEMP and resistance sweeps have been introduced in Ngspice they were not available in the original code of Spice3f5 1 2 SUPPORTED ANALYSES 39 then used to find the poles and zeros of the transfer function Two types of transfer functions are allowed one of the form output voltage input voltage and the other of the form output voltage input current These two types of transfer functions cover all the cases and one can find the poles zeros of functions like input output impedance and voltage gain The input and output ports are specified as two pairs of nodes The pole zero analysis works with resistors capacitors inductors linear controlled sources independent sources BJTs MOSFETs JFETs and diodes Transmission lines are not supported The method used in the analysis is a sub optimal numerical search For large circuits it may take a considerable time or fail to find all poles and zeros For some circuits the method becomes lost and finds an excessive number of poles or zeros 1 2 5 Small Signal Distortion Analysis The distortion analysis portion of Ngspice computes steady state harmonic and intermodulation products for small input signal magnitudes If signals of a single frequenc
593. the tcl tk based tclspice option see chapt 19 An optimization procedure may be written using a tcl script An example is provided in chapter 19 5 2 22 4 ngspice optimizer using a Python script Werner Hoch has developed a ngspice optimization procedure based on the differential evolu tion algorithm 21 On his web page he provides a Python script containing the control flow and algorithms 22 5 ngspice optimizer using ASCO The ASCO optimizer developed by Joao Ramos also applies the differential evolution al gorithm 21 An enhanced version 0 4 7 1 adding ngspice as a simulation engine may be downloaded here 7z archive format Included are executable files asco asco mpi ngspice c for MS Windows The source code should also compile and function under LINUX not yet tested ASCO is a standalone executable which communicates with ngspice via ngspice input and out put files Several optimization examples originally provided by J Ramos for other simulators are prepared for use with ngspice Parallel processing on a multi core computer has been tested using MPI MPICH2 under MS Windows A processor network will be supported as well A MS Windows console application ngspice_c exe is included in the archive Several stand alone tools are provided but not tested yet Setting up an optimization project with ASCO requires advanced know how of using ngspice There are several sources of information First of all the example
594. tiate tcl 332 CHAPTER 19 TCLSPICE e During optimization loop graphical display of the current temperature response is not yet possible and I don t know why Each time a simulation is performed some memory is allocated for it e The simulation result remains in memory until the libspice library is unloaded typically when the tcl script ends or when a spice clean command is performed In this kind of simulation not cleaning the memory space will freeze your computer and you ll have to restart it Be aware of that 19 5 2 2 testbench3 tcl This calls the shell sh who then runs wish with the file itself bin sh WishFix A exec wish 0 1 Regular package for simulation package require spice Here the important line is source differentiate tcl which contains optimization library source differentiate tcl Generates a temperature vector proc temperatures_calc temp_inf temp_sup points set tstep expr temp_sup temp_inf points set t temp_inf set temperatures for set iO i lt points incr i set t expr t tstep set temperatures temperatures t return temperatures no generates thermistor resistivity as a vector typically run thermistance_calc res B tempera tures_calc temp_inf temp_sup points 19 5 EXAMPLES 333 proc thermistance_calc res B points set tzero 273 15 set tref 25 set thermistance foreach t poi
595. tions This is provided to enable somewhat greater compatibility between numerical MOSFET models and the standard SPICE3 compact MOSFET models The operating temperature of a device can be set independently from that of the rest of the circuit in order to simulate non isothermal circuit operation Finally the name of a file containing an initial state for the device can be specified Remember that if the filename contains capital letters they must be protected by surrounding the filename with double quotes Alternatively the device can be placed in an OFF state thermal equilibrium at the beginning of the analysis For more information on the use of initial conditions see the NGSPICE User s Manual In addition to the element input parameters there are output only parameters that can be shown using the SPICE show command or captured using the save SAVE command These parameters are the elements of the indefinite conductance G capacitance C and ad mittance Y matrices where Y G jwC By default the parameters are computed at 1 Hz Each element is accessed using the name of the matrix g c or y followed by the node indices of the output terminal and the input terminal e g g11 Beware that parameter names are case sensitive for save show so lower case letters must be used 29 19 2 Parameters Name Type Description Level Integer Dimensionality of numerical model Area Real Multiplicative area factor
596. to a file simple table General Form wrdata file vecs Writes out the vectors to file This is a very simple printout of data in array form Column one is the default scale data column two the simulated data If more than one vector is given the third column again is the default 17 5 COMMANDS 299 scale the fourth the data of the second vector The default format is ASCII All vectors have to stem from the same plot otherwise a seg fault may occur No further information is written to the file so you have to keep track of your multiple outputs The format may be changed in the near future output example from two vectors 0 000000e 000 1 845890e 006 0 000000e 000 0 000000e 000 7 629471e 006 4 243518e 006 7 629471e 006 4 930171e 006 1 525894e 007 5 794628e 006 1 525894e 007 4 769020e 006 2 288841e 007 5 086875e 006 2 288841e 007 3 670687e 006 3 051788e 007 3 683623e 006 3 051788e 007 1 754215e 006 3 814735e 007 1 330798e 006 3 814735e 007 1 091843e 006 4 577682e 007 3 804620e 007 4 577682e 007 2 274678e 006 5 340630e 007 9 047444e 007 5 340630e 007 3 815083e 006 6 103577e 007 2 792511e 006 6 103577e 007 4 766727e 006 6 866524e 007 5 657498e 006 6 866524e 007 2 397679e 006 If variable append write is set the data may be added to an existing file 17 5 82 Write Write data to a file Spice3f5 format General Form write file exprs Writes out the expressions to file First vectors are grouped toget
597. to be small enough to get adequate resolution otherwise the command linearize will do sub sampling of your signal 17 5 COMMANDS 281 17 5 34 Listing Print a listing of the current circuit General Form listing logical physical deck expand param If the logical argument is given the listing is with all continuation lines collapsed into one line and if the physical argument is given the lines are printed out as they were found in the file The default is logical A deck listing is just like the physical listing except without the line numbers it recreates the input file verbatim except that it does not preserve case If the word expand is present the circuit is printed with all subcircuits expanded The option param allows to print all parameters and their actual values 17 5 35 Load Load rawfile data General Form load filename Loads either binary or ascii format rawfile data from the files named The default file name is rawspice raw or the argument to the r flag if there was one 17 5 36 Meas Mesurements on simulation data General Form example MEAS DCIACITRANISP result TRIG trig variable VAL val lt TD td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt lt TRIG AT time gt TARG targ_ variable VAL val lt TD td gt lt CROSS CROSS LAST gt lt RISE RISE LAST gt lt FALL FALL LAST gt lt TRIG AT time gt Most of the input forms found in 15 4 may be us
598. to load the default data file rawspice raw if no other files are given ngnutmeg only no spiceinit Don t try to source the file spiceinit upon start up Normally ngspice and ngnutmeg try to find the file in the current directory and if it is not found then in the user s home directory obsolete t TERM terminal TERM The program is being run on a terminal with mfb name term obsolete b batch Run in batch mode Ngspice reads the default input source e g keyboard or reads the given input file and performs the analyses specified output is either Spice2 like line printer plots ascii plots or a ngspice rawfile See the following section for details Note that if the input source is not a terminal e g using the IO redirection notation of lt ngspice defaults to batch mode i overrides This option is valid for ngspice only server Run in server mode This is like batch mode except that a temporary rawfile is used and then written to the standard output preceded by a line with a single after the simulation is done This mode is used by the ngspice daemon This option is valid for ngspice only Example for using pipes from the console window cat adder cir ngspice s more i interactive Run in interactive mode This is useful if the standard input is not a terminal but interactive mode is desired Command completion is not available unless the standard inp
599. to produce the final output at analog node Ipf_out 26 2 2 Running example C3 Now copy the file xspice_c3 cir from directory examples xspice into the current directory cp examples xspice xspice_c3 cir xspice_c3 cir and invoke the new simulator executable as you did in the previous examples ngspice xspice_c3 cir 26 2 XSPICE ADVANCED USAGE 389 Execute the simulation with the run command ngspice 1 gt run After a short time the ngspice prompt should return Results of this simulation are examined in the manner illustrated in the previous two examples You can use the plot command to plot either analog nodes event driven nodes or both For example you can plot the values of the sampled data filter input node and the analog low pass filter output node as follows ngspice 2 gt plot filt_in lpf_out The plot shown in Figure 26 2 should appear r tran1 mixed io types xfilter xla ato ff CAM LM epee eps 200 0 400 0 step Figure 26 2 Nutmeg Plot of Filter Input and Output You can also plot data from nodes inside a subcircuit For example to plot the data on node xla in subcircuit xfilter create a pathname to this node with a dot separator ngspice 3 gt plot xfilter xla 390 CHAPTER 26 EXAMPLE CIRCUITS The output from this command is shown in Figure 26 3 Note that the waveform contains vertical segments These segments are caused by the non zero delays in the real gain
600. to sgauss 0 will return a single value of a random number as a vector of length 1 sunif vector Returns a vector of random real numbers uniformly distributed in the interval 1 1 The length of the vector returned is determined by the input vector The contents of the input vector will not be used A call to sunif O will return a single value of a random number as a vector of length 1 poisson vector Returns a vector with its elements being integers drawn from a Poisson distribution The elements of the input vector real numbers are the expected numbers Complex vectors are allowed real and imaginary values are treated separately exponential vector Returns a vector with its elements real numbers drawn from an exponential distribution The elements of the input vector are the respective mean values real numbers Complex vectors are allowed real and imaginary values are treated separately An input vector may be either the name of a vector already defined or a floating point number a scalar A scalar will result in an output vector of length 1 A number may be written in any format acceptable to ngspice such as 14 6Meg or 1 231e 4 Note that you can either use scientific notation or one of the abbreviations like MEG or G but not both As with ngspice a number may have trailing alphabetic characters 17 3 PLOTS 267 The notation expr num denotes the num th element of expr For multi dimen
601. tor which is currently driving at the out upper limit level will immediately cause a drop in the output regardless of how long the integrator was previously summing positive inputs The incremental value of output below the output upper limit and above the output lower limit at which smoothing begins 1s specified via the limit range parameter In AC analysis the value returned is equal to the gain divided by the radian frequency of analysis Note that truncation error checking is included in the int block This should provide for a more accurate simulation of the time integration function since the model will inherently request smaller time increments between simulation points if truncation errors would otherwise be excessive Example SPICE Usage a13 7 12 time_count 160 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE model time_count int in_offset 0 0 gain 1 0 out_lower_limit 1e12 out_upper_limit 1e12 limit_range 1e 9 out_ic 0 0 12 2 16 S Domain Transfer Function NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default _Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TAB
602. ts the color of the text in the postscript hardcopy output If not set black is assumed on white background white on black background Valid colors are 0 black 1 white 2 red 3 blue 4 orange 5 green 6 pink 7 brown 8 khaki 9 plum 10 orchid 11 violet 12 maroon 13 turquoise 14 sienna 15 coral 16 cyan 17 magenta 18 gray for smith grid 19 gray for smith grid 20 gray for normal grid height The length of the page for asciiplot and print col history The number of events to save in the history list Iprplot5 This is a printf 3s style format string used to specify the command to use for sending plot 5 style plots to a printer or plotter The first parameter supplied is the printer name the second parameter supplied is a file name containing the plot Both parameters are strings It is trivial to cause ngspice to abort by supplying a unreasonable format string Iprps This is a printf 3s style format string used to specify the command to use for sending Postscript plots to a printer or plotter The first parameter supplied is the printer name the second parameter supplied is a file name containing the plot Both parameters are strings It is trivial to cause ngspice to abort by supplying a unreasonable format string modelcard The name of the model card normally MODEL nfreqs The number of frequencies to compute in the Fourier command Defaults to 10 ngbehavior Sets the compatibility mode of ngspice To be set in spinit 16 5
603. ude and frequency of 0 1 and 500 respectively The next device in the circuit is resistor R_Source which is connected between nodes Input and Amp_In with a value of 100 Ohms The remaining device lines in the file are interpreted similarly The control directive that begins with Tran specifies that the simulator should carry out a simulation using the Transient analysis mode In this example the parameters to the transient analysis control directive specify that the maximum time step allowed is 1 microsecond and that the circuit should be simulated for 0 01 seconds of circuit time Other control cards are used for other analysis modes For example if a frequency response plot is desired perhaps to determine the effect of the capacitor in the circuit the following statement will instruct the simulator to perform a frequency analysis from 100 Hz to 10 MHz in decade intervals with ten points per decade ac dec 10 100 10meg To determine the quiescent operating point of the circuit the following statement may be in serted in the file Op A fourth analysis type supported by ngspice is swept DC analysis An example control state ment for the analysis mode is dc Vin 0 1 0 2 05 This statement specifies a DC sweep which varies the source Vin from 100 millivolts to 200 millivolts in steps of 50 millivolts 374 CHAPTER 25 EXECUTION PROCEDURES AMPLIFIER SUBCIRCUIT 100 AMP_IN AMP_OUT R_SOURCE
604. uding schematic capture and circuit simulation 18 8 4 GEDA The gEDA project is developing a full GPL d suite and toolkit of Electronic Design Automation tools for use with a LINUX Ngspice may be integrated into the development flow Two web sites offer tutorials using gschem and gnetlist with ngspice http geda seul org wiki geda csygas http geda seul org wiki geda ngspice_and_gschem Chapter 19 TCLspice Spice historically comes as a simulation engine with a Command Line Interface Spice engine now can be used with friendly Graphical User Interfaces Tclspice represent a third approach to interfacing ngspice simulation functionality Tclspice is nothing more than a new way of compiling and using spice source code Spice is no longer considered as a standalone program but as a library invoked by a TCL interpreter It either permits direct simulation in a friendly TCL shell this is quite analogous to the command line interface of ngspice or it permits the elaboration of more complex more specific or more user friendly simulation programs by writing TCL scripts 19 1 tclspice framework The technical difference between the ngspice CLI interface and tclspice is that the CLI interface is compiled as a standalone program whereas tclspice is a shared object Tclspice is designed to work with tools that expand the capabilities of ngspice TCL for the scripting and programming language interface and BLT for data processing and display Th
605. ulk junction potential 121 cgso InOut real Gate source overlap cap 122 cgdo InOut real Gate drain overlap cap 123 cgbo InOut real Gate bulk overlap cap 131 rsh InOut real Sheet resistance 124 cj InOut real Bottom junction cap per area 125 mj InOut real Bottom grading coefficient 126 cjsw InOut real Side junction cap per area 127 mjsw InOut real Side grading coefficient 128 js InOut real Bulk jet sat current density 130 ld InOut real Lateral diffusion 129 tox InOut real Oxide thickness 132 ud InOut real Surface mobility 132 uo InOut real 133 fe InOut real Forward bias jct fit parm 137 nmos In flag N type MOSfet model 138 pmos In flag P type MOSfet model 135 tpg InOut integer Gate type 134 nsub InOut real Substrate doping 136 nss InOut real Surface state density 139 thom InOut real Parameter measurement temperature 515 516 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 5 5 MOS9 Modified Level 3 MOSFET model 30 5 5 1 MOS9 instance parameters Name Direction Type Description 80 m InOut real Multiplier 211 InOut real Length liw InOut real Width 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 34 id Out r
606. ulk junction saturation A 1 0e 14 1 0e 15 current Is PB Bulk junction potential V 0 8 0 87 CGSO Gate source overlap F m 0 0 4 0e 11 capacitance per meter channel width CGDO Gate drain overlap F m 0 0 4 0e 11 capacitance per meter channel width CGBO Gate bulk overlap F m 0 0 2 0e 11 capacitance per meter channel width RSH Drain and source diffusion Q 0 0 10 sheet resistance CJ Zero bias bulk junction F m 0 0 2 0e 4 bottom cap per sq meter of junction area MJ Bulk junction bottom 0 5 0 5 grading coeff CJSW Zero bias bulk junction F m 0 0 1 0e 9 sidewall cap per meter of junction perimeter MJSW Bulk junction sidewall SY NN 0 33 level2 3 grading coeff JS Bulk junction saturation current TOX Oxide thickness m 1 0e 7 1 0e 7 NSUB Substrate doping cm 0 0 4 0e15 NSS Surface state density cm 0 0 1 0e10 NFS Fast surface state density cm 0 0 1 0e10 11 2 MOSFET MODELS NMOS PMOS 127 Name Parameter Units Default Example TPG Type of gate material 1 1 0 opp to substrate 1 same as substrate 0 Al gate XJ Metallurgical junction depth m 0 0 1M LD Lateral diffusion m 0 0 0 8M UO Surface mobility cm V sec 600 700 UCRIT Critical field for mobility V cm 1 0e4 1 0e4 degradation MOS2 only UEXP Critical field exponent in 0 0 0 1 mobility degradation MOS2 only UTRA Transverse field coeff 0 0 0 3 mobility deleted for MOS2 VMAX Maximum drift ve
607. um and a depth automatically determined from the device doping profile However all these defaults can be overridden on an options card The operating temperature of a device can be set independently from the rest of that of the circuit in order to simulate non isothermal circuit operation Finally the name of a file containing an 29 18 NBJT 469 initial state for the device can be specified Remember that if the filename contains capital letters they must be protected by surrounding the filename with double quotes Alternatively the device can be placed in an OFF state thermal equilibrium at the beginning of the analysis For more information on the use of initial conditions see the NGSPICE User s Manual In addition to the element input parameters there are output only parameters that can be shown using the SPICE showcommand or captured using the save SAVE command These param eters are the elements of the indefinite conductance G capacitance C and admittance Y matrices where Y G jwC By default the parameters are computed at 1Hz Each element is accessed using the name of the matrix g c or y followed by the node indices of the output terminal and the input terminal e g g11 Beware that parameter names are case sensitive for save show so lower case letters must be used 29 18 2 Parameters Name Type Description Level Integer Dimensionality of numerical model Area Real Multipl
608. unning the simulation Copy w asco exe w asco mpi exe and ngspice_c exe console executable of ngspice into the directory and run asco ngspice amp3 or alternatively if MPICH is installed mpiexec n 7 asco mpi ngspice amp3 The following graph 22 1 shows the acceleration of the optimization simulation on a multi core processor i7 with 4 real or 8 virtual cores 500 generations if n is varied Speed is tripled a mere 15 min suffices to optimize 21 parameters of the amplifier 22 5 2 Digital inverter This example is taken from chapter 6 2 1 Tutorial 1 from the ASCO manual In addition to the features alreday mentioned above it adds Monte Carlo and corner simulations The file inv cfg contains the following section O0ptimization Flow Alter yes do we want to do corner analysis MonteCarlo yes do we want to do MonteCarlo analysis 22 5 NGSPICE OPTIMIZER USING ASCO 361 3000 2500 2000 1500 1000 total optimization time sec 500 2 3 4 5 6 7 8 9 number of threads Figure 22 1 Optimization speed AlterMC cost 3 00 point at which we want to start ALTER and or MONTECARLO ExecuteRF no Execute or no the RF module to add RF parasitics SomethingElse Monte Carlo is switched on It uses the AGAUSS function see chapt 21 2 Its parameters are generated by ASCO from the data supplied by the inv cfg section Monte Carlo According to the paper by Pel
609. update puts spice spice_data spice spicetoblt a0 a0 spice spicetoblt bO bO spice spicetoblt al al spice spicetoblt bl bl spice spicetoblt time stime after 100 bltupdate bltupdate chart element create a0 color red xdata stime ydata a0 Chart element create b0 color blue xdata stime ydata bO Chart element create al color yellow xdata stime ydata al Chart element create bl color black xdata stime ydata bl 19 6 Compiling 19 6 1 LINUX Get tcl8 4 from your distribution You will need the blt plotting package compatible to the old tcl 8 4 only from here See also the actual blt wiki configure with tcl make sudo make install 19 6 2 MS Windows Can be done but is tedious Windows XP 32 bit Not tested on Windows 7 T b d Chapter 20 Example Circuits This section starts with an ngspice example to walk you through the basic features of ngspice using its command line user interface The operation of ngspice will be illustrated through several examples chapters 20 1 to 20 7 The first example uses the simple one transistor amplifier circuit illustrated in Figure 20 1 This circuit is constructed entirely with ngspice compatible devices and is used to introduce basic concepts including Invoking the simulator e Running simulations in different analysis modes e Printing and plotting analog results e Examining status including execution time
610. upon initial ization if its output would normally be a ZERO although posting such would certainly cause no harm 12 4 1 Buffer NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name in input Direction in Description cm_d_buffer d_buffer digital one bit wide buffer out output out 12 4 DIGITAL MODELS Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed a no no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value F real 1 0e 12 no yes 183 a no no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The buffer is a single input single output digital buffer which produces as output a time delayed copy of its input The delays associated with an output rise and those as sociated with an output fall may be different The model also posts an input load value in farads based on the parameter input load The output of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Example SPICE Usage a6 1 8 buff1 model buff
611. upported by ngspice is a swept DC analysis To perform this analysis issue the following command ngspice 9 gt de vcc O 15 0 1 This command sweeps the supply voltage vcc from 0 to 15 volts in 0 1 volt increments To plot the results issue the command ngspice 10 gt plot emit base coll Finally to exit the simulator use the quit command and you will be returned to the operating system prompt ngspice 11 gt quit So long 20 2 Differential Pair The following deck determines the dc operating point of a simple differential pair In addition the ac small signal response is computed over the frequency range 1Hz to 100MEGHz 20 3 MOSFET CHARACTERIZATION 343 Example SIMPLE DIFFERENTIAL PAIR VCC 7 0 12 VEE 8 0 12 VIN 1 0 AC 1 RS1 1 2 1K RS2 6 0 1K Q1 3 2 4 MODI Q2 5 6 4 MODI RCI 7 3 10K RC2 7 5 10K RE 4 8 10K MODEL MODI NPN BF 50 VAF 50 IS 1 E 12 RB 100 CJC 5PF TF 6NS TF V 5 VIN AC DEC 10 1 100MEG END 20 3 MOSFET Characterization The following deck computes the output characteristics of a MOSFET device over the range 0 10V for VDS and 0 5V for VGS Example MOS OUTPUT CHARACTERISTICS OPTIONS NODE NOPAGE VDS 3 0 VGS 2 0 M1 1 2 0 0 MODI L 4U W 6U AD 10P AS 10P VIDS MEASURES ID WE COULD HAVE USED VDS BUT ID WOULD BE NEGATIVE VIDS 3 1 MODEL MODI NMOS VTO 2 NSUB 1 0E15 UO 550 DC VDS 0 10 5 VGS 05 1 END 20 4 RTL Inverter The following deck determines t
612. urce ohmic resistance 107 cbd InOut real B D junction capacitance 108 cbs InOut real B S junction capacitance 109 is InOut real Bulk junction sat current 110 pb InOut real Bulk junction potential 111 cgso InOut real Gate source overlap cap 112 cgdo InOut real Gate drain overlap cap 113 cgbo InOut real Gate bulk overlap cap 114 rsh InOut real Sheet resistance 115 cj InOut real Bottom junction cap per area 116 mj InOut real Bottom grading coefficient 117 cjsw InOut real Side junction cap per area 118 mjsw InOut real Side grading coefficient 119 js InOut real Bulk jct sat current density 120 tox InOut real Oxide thickness 121 ld InOut real Lateral diffusion 145 xl InOut real Length mask adjustment 146 wd InOut real Width Narrowing Diffusion 147 xw InOut real Width mask adjustment 148 delvto InOut real Threshold voltage Adjust 148 delvt0 InOut real 122 ud InOut real Surface mobility 122 uo InOut real 123 fe InOut real Forward bias jct fit parm 124 nsub InOut real Substrate doping 125 tpg InOut integer Gate type 126 nss InOut real Surface state density 131 vmax InOut real Maximum carrier drift velocity 135 xj InOut real Junction depth 129 nfs InOut real Fast surface state density 138 xd InOut real Depletion layer width 139 alpha InOut real Alpha 127 eta InOut real Vds dependence of threshold voltage 128 delta InO
613. urrent is assumed to flow from the positive node through the source to the negative node A current source of positive value forces current to flow out of the n node through the source and into the n node Voltage sources in addition to being used for circuit excitation are the ammeters for ngspice that is zero valued voltage sources may be inserted into the circuit for the purpose of measuring current They of course have no effect on circuit Operation since they represent short circuits DC TRAN is the dc and transient analysis value of the source If the source value is zero both for dc and transient analyses this value may be omitted If the source value is time invariant e g a power supply then the value may optionally be preceded by the letters DC ACMAG is the ac magnitude and ACPHASE is the ac phase The source is set to this value in the ac analysis If ACMAG is omitted following the keyword AC a value of unity is assumed If ACPHASE is omitted a value of zero is assumed If the source is not an ac small signal input the keyword AC and the ac values are omitted DISTOF1 and DISTOF2 are the keywords that specify that the independent source has distortion inputs at the frequencies F1 and F2 respectively see the description of the DISTO control line 77 78 CHAPTER 4 VOLTAGE AND CURRENT SOURCES The keywords may be followed by an optional magnitude and phase The default values of the magnitude and phase are 1 0
614. urrent plot to name e g setplot tran2 will make tran2 the current plot A sequence name vector may be used to access the vector from a foreign plot You may generate plots by yourself setplot new will generate a new plot named unknown1 set curplottitle a new plot will set a title set curplotname myplot will set its name as a short description set curplotdate Sat Aug 28 10 49 42 2010 will set its date Note that strings with spaces have to be given with double quotes Of course the notion plot will be used by this manual also in its more common meaning denoting a graphics plot or being a plot command Be careful to get the correct meaning 17 4 Command Interpretation On the ngspice console window or into the Windows GUI you may directly type in any com mand from 17 5 IO redirection is available see chapt 17 8 8 for an example the symbols gt gt gt gt amp gt gt amp and lt have the same effects as in the C shell You may type multiple commands on one line separated by semicolons If a word is typed as a command and there is no built in command with that name the directories in the sourcepath list are searched in order for the file If it is found it is read in as a command file as if it were sourced Before it is read however the variables argc and argv are set to the number of words following the file name on the command line and a list of those words respectively After the file is finished th
615. ut is a terminal however This option is valid for ngspice only r FILE rawfile FILE Use rawfile as the default file into which the results of the simulation are saved This option is valid for ngspice only P pipe Allow a program e g xcircuit to act as a GUI frontend for ngspice through a pipe Thus ngspice will assume that the input pipe is a tty and allows to run in interactive mode output FILE All logs generated during a batch run b will be saved in outfile help A short help statement of the command line syntax version Prints a version information autorun Start simulation immediately as if a control section control run endc had been added to the input file Further arguments to ngspice are taken to be ngspice input files which are read and saved if running in batch mode then they are run immediately Ngspice accepts Spice3 and also most Spice2 input files and outputs ASCII plots Fourier analyses and node printouts as specified in plot four and print cards If an out parameter is given on a width card 15 5 7 the effect is the same as set width Since ngspice ASCII plots do not use multiple ranges however if vectors together on a plot card have different ranges they do not provide as much 250 CHAPTER 16 STARTING NGSPICE information as they do in a scalable graphics plot For ngnutmeg further arguments are taken t
616. ut is still available as open source as a limited edition of the com mercial GENIUS TCAD tool 1 2 Supported Analyses The ngspice simulator supports the following different types of analysis 1 DC Analysis Operating Point and DC Sweep 2 AC Small Signal Analysis 3 Transient Analysis 4 Pole Zero Analysis 5 Small Signal Distortion Analysis 6 Sensitivity Analysis 7 Noise Analysis Applications that are exclusively analog can make use of all analysis modes with the exception of Code Model subsystem that do not implements Pole Zero Distortion Sensitivity and Noise analyses Event driven applications that include digital and User Defined Node types may make use of DC operating point and DC sweep and Transient only In order to understand the relationship between the different analyses and the two underlying simulation algorithms of ngspice it is important to understand what is meant by each analysis type This is detailed below 1 2 1 DC Analyses The dc analysis portion of ngspice determines the dc operating point of the circuit with inductors shorted and capacitors opened The dc analysis options are specified on the DC TF and OP control lines There is assumed to be no time dependence on any of the sources within the system description The simulator algorithm subdivides the circuit into those portions which require the analog simulator algorithm and those which require the event driven algorithm Each subsystem block
617. ut of this model does NOT however respond to the total loading it sees on its output it will always drive the output strongly with the specified delays Example SPICE Usage a6 1 2 8 and1 model andi d_and rise_delay input_load 12 4 4 Nand NAME_TABLE C_Function_Name Spice _Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds 0 5e 12 cm_d_nand d_nand digital nand gate in input in d a yes 2 0 5e 9 fall_delay 0 3e 9 out output out d d no 186 Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed no rise_delay rise delay real 1 0e 9 1 0e 12 no yes input_load input load value F real 1 0e 12 no yes CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE no fall_delay fall delay real 1 0e 9 1 0e 12 no yes Description The digital nand gate is an n input single output nand gate which produces an active 0 value if and only if all of its inputs are 1 values If ANY of the inputs is a 0 the output will be a 1 if neither of these conditions holds the output will be unknown The delays associ
618. ut real Length dependence of mu2b 136 wmu2b InOut real Width dependence of mu2b 137 mu2g InOut real VGS dependence of mu2 138 Imu2g InOut real Length dependence of mu2g 139 wmu2g InOut real Width dependence of mu2g 140 mu30 InOut real VDS dependence of mu in linear term 141 Imu30 InOut real Length dependence of mu30 142 wmu30 InOut real Width dependence of mu30 143 mu3b InOut real VBS dependence of mu3 144 Imu3b InOut real Length dependence of mu3b 145 wmu3b InOut real Width dependence of mu3b 146 mu3g InOut real VGS dependence of mu3 147 Imu3g InOut real Length dependence of mu3g 148 wmu3g InOut real Width dependence of mu3g 149 mu40 InOut real VDS dependence of mu in linear term 150 Imu40 InOut real Length dependence of mu40 151 wmu40 InOut real Width dependence of mu40 152 mu4b InOut real VBS dependence of mu4 153 Imu4b InOut real Length dependence of mu4b 154 wmu4b InOut real Width dependence of mu4b 155 mu4g InOut real VGS dependence of mu4 156 Imu4g InOut real Length dependence of mu4g 157 wmu4g InOut real Width dependence of mu4g 158 ua0 InOut real Linear VGS dependence of mobility 159 luaO InOut real Length dependence of ua0 160 wua0 InOut real Width dependence of ua0 161 uab InOut real VBS dependence of ua 162 luab InOut real Length dependence of uab 163 wuab InOut real Width dependence of uab 164 u
619. ut real Width effect on threshold 140 input_delta InOut real 130 theta InOut real Vgs dependence on mobility 132 kappa InOut real Kappa 141 thom InOut real Parameter measurement temperature 142 kf InOut real Flicker noise coefficient 143 af InOut real Flicker noise exponent 519 520 CHAPTER 30 MODEL AND DEVICE PARAMETERS 30 5 6 BSIM1 Berkeley Short Channel IGFET Model 30 5 6 1 BSIM1 instance parameters Name Direction Type Description 2il InOut real Length liw InOut real Width 14 m InOut real Parallel Multiplier 4 ad InOut real Drain area 3 as InOut real Source area 6 pd InOut real Drain perimeter 5 ps InOut real Source perimeter 8 nrd InOut real Number of squares in drain 7 nrs InOut real Number of squares in source 9 off InOut flag Device is initially off 11 vds InOut real Initial D S voltage 12 vgs InOut real Initial G S voltage 10 vbs InOut real Initial B S voltage 13 ic In unknown vector Vector of DS GS BS initial voltages 30 5 6 2 BSIM1 Model Parameters Name Direction Type Description 101 vfb InOut real Flat band voltage 102 lvfb InOut real Length dependence of vfb 103 wvfb InOut real Width dependence of vfb 104 phi InOut real Strong inversion surface potential 105 Iphi InOut real Length dep
620. utmeg and ngspice may be affected by setting variables with the set command 17 5 55 In addition to the variables mentioned below the set command in ngspice also affects the behavior of the simulator via the options previously described under the section on OPTIONS 15 1 You also may define new variables or alter existing variables inside control endc for later use in your user defined script see chapter 17 8 17 7 VARIABLES 303 The following list is in alphabetical order All of them are acknowledged by ngspice Frontend variables e g on circuits and simulation are not defined in ngnutmeg The predefined variables which may be set or altered by the set command are appendwrite Append to the file when a write command is issued if one already exists brief If set to FALSE the netlist will be printed colorN These variables determine the colors used if X is being run on a color display N may be between 0 and 15 Color 0 is the background color 1 is the grid and text color and colors 2 through 15 are used in order for vectors plotted The value of the color variables should be names of colors which may be found in the file usr lib rgb txt ngspice for Windows does support only white background color0 white with black grid and text or or color0 black with white grid and text cpdebug Print control debugging information curplotdate Sets the date of the current plot curplotname Sets the name of th
621. utput a square wave at that frequency From the above it is easy to see that array sizes of 2 for both the cntl_array and the freq_array will yield a linear variation of the frequency with respect to the control input Any sizes greater than 2 will yield a piecewise linear transfer characteristic For more detail refer to the description of the piecewise linear controlled source which uses a similar method to derive an output value given a control input 172 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Example SPICE Usage ain 1 2 pulsel model pulsel square cntl_array 1 0 5 6 freq_array 10 10 1000 1000 out_low 0 0 out_high 4 5 duty_cycle 0 2 rise time le 6 fall_time 2e 6 12 2 23 Controlled One Shot NAME_TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null Allowed PORT_TABLE Port Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds cm_oneshot oneshot controlled one shot clk clock input in v v vd i id no no clear clear signal in v v vd i id no y
622. verse operation is handled by native spice commands such as alter let and set 19 4 Running TCLspice TCLspice consists of a library or a package to include in your tcl console or script load somepath libspice so package require spice Then you can execute any native spice command by preceding it with spice For example if you want to source the testCapa cir netlist type the following spice source testCapa cir spice spicetoblt example Plotting data is not a matter of spice but of tcl Once the data is stored in a blt vector it can be plotted Example blt graph cimvd title Cim f Vd pack cimvd cimvd element create linel xdata Vcmd ydata Cim With blt graph a plotting structure is allocated in memory With pack it is placed into the output window and becomes visible The last command and not the least plots the function Cim f Vcmd where Cim and Vcmd are two BLT vectors 19 5 examples 19 5 1 Active capacitor measurement In this crude implementation of a circuit described by Marc KODRNJA in his PhD thesis that I found on the Internet This simulation outputs a graph representing the virtual capacitance versus the command voltage The function C f V is calculated point by point For each 19 5 EXAMPLES 329 control voltage value the virtual capacitance is calculated with the voltage and intensity across the output port in a frequency simulation A control value that should be as close t
623. w P Po n 11 1 Leffective Wetfective is used to evaluate the parameter for the actual device specified with Leffective Linput DL 11 2 Weffective input DW a 1 3 Note that unlike the other models in ngspice the BSIM models are designed for use with a process characterization system that provides all the parameters thus there are no defaults for the parameters and leaving one out is considered an error For an example set of parameters and the format of a process file see the SPICE2 implementation notes 3 For more information on BSIM2 see reference 5 11 2 7 BSIM1 model level 4 BSIM1 model the first is a long series is an empirical model Developers placed less empha sis on device physics and based the model on parametrical polynomial equations to model the various physical effects This approach pays in terms of circuit simulation behavior but the ac curacy degrades in the submicron region A known problem of this model is the negative output conductance and the convergence problems both related to poor behavior of the polynomial equations Ngspice BSIM level 4 parameters Name Parameter Units Vw VFB Flat band voltage V PHI Surface inversion potential V Es Kl Body effect coefficient JV K2 Drain source depletion charge sharing f coefficient ETA Zero bias drain induced barrier lowering x coefficient MUZ Zero bias mobility cm V sec DL Sho
624. w UDN directory by editing ng spice rework src xspice icm xtraevt udnpath Ist Add a new line containing lt directory name gt For compiling and linking see chapt 27 5 The UDN Definition File contains a set of C language functions These functions perform operations such as allocating space for data structures initializing them and comparing them to each other Section 27 8 describes the form and function of the User Defined Node Definition File in detail and includes an example UDN Definition File 27 4 Adding a new code model library A group of code models may be assembled into a library A new library is a means to distribute new code models independently from the existing ones This is the way to generate a new code model library cd ng spice rework src xspice icm mkdir lt directory name gt lt directory name gt is the name of the new library Copy empty files modpath Ist and udnpath st into this directory Edit file ng spice rework src xspice icm GNUmakefile in add lt directory name gt to the end of line 10 which starts with CMDIRS That s all you have to do about a new library Of course it is empty right now so you have to define at least one code model according to the procedure described in chapt 27 2 27 5 Compiling and loading the new code model library Compiling is now as simple as issuing the commands 27 6 INTERFACE SPECIFICATION FILE 397 cd ng spice rework release make sudo make install
625. ween in 0 9 and in 1 1 and nowhere else On the other hand if you were to specify the same function using the coordinate pairs 100 100 1 1 and 01 1 you would find that rounding occurs be tween in 19 and in 21 Clearly in the latter case the smoothing might cause an excessive divergence from the intended linearity above and below in 1 Example SPICE Usage a7 2 4 xfer_cntll model xfer_cntl1 pwl x_array 2 0 1 0 2 0 4 0 5 0 y_array 0 2 0 2 0 1 2 0 10 0 input_domain 0 05 fraction TRUE 12 2 8 Filesource NAME_ TABLE C_Function_Name Spice_Model_Name Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits cm_filesource filesource File Source out output out Vv v vd i id yes 1 no timeoffset time offset real 0 0 timescale timescale real 1 0 148 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector no no Vector Bounds Null_ Allowed yes yes PARAMETER_TABLE Parameter_Name timerelative amplstep Description relative time step amplitude Data_Type boolean boolean Default_Value FALSE FALSE Limits Vector no no Vector Bounds 5 Null1_Allowed yes yes PARAMETER_TABLE Parameter_Name amploffset amplscale Description ampl offset amplscale Data_Type real real D
626. ween the terminals of a device It also helps determine what kind of boundary conditions are used as defaults for the device electrodes A previously calculated state stored in the named initial conditions file can be loaded at the beginning of an analysis If it is necessary for each instance of a numerical model to start in a different state then the unique flag can be used to generate unique filenames for each instance by appending the instance name to the given filename This is the same method used by CIDER to generate unique filenames when the states are originally saved If a particular state file does not fit this pattern the filename can be entered directly on the instance line Mask dimension defaults can be set so that device sizes can be specified in terms of area or width Dimensions for the special ID BJT base contact can also be controlled The measurement temperature of material parameters normally taken to be the circuit default can be overridden 460 CHAPTER 29 CIDER USER S MANUAL 29 13 2 Parameters Name Type Description Resistor Flag Resistor Capacitor Flag Capacitor Diode Flag Diode BipolarlIBJT Flag Bipolar transistor MOSFET Flag MOS field effect transistor JFET Flag Junction field effect transistor MESFET Flag MES field effect transistor IC File String Initial conditions filename Unique Flag Append instance name to filename DefA Real Default Mask Area m DefW Real
627. which has only one single ended analog input port 27 7 2 8 Complex Math Functions Complex_t cm_complex_set real_part imag part double real_part The real part of the complex number double imag part The imaginary part of the complex number Complex_t cm_complex_add x y Complex_t x The first operand of x y Complex_t y The second operand of x y Complex_t cm_complex_sub x y Complex_t x The first operand of x y Complex_t y The second operand of x y Complex_t cm_complex_mult x y Complex_t x The first operand of x y Complex_t y The second operand of x y Complex_t cm_complex_div x y Complex_t x The first operand of x y Complex_t y The second operand of x y cm_complex_set takes as input two doubles and converts these to a Complex_t The first double is taken as the real part and the second is taken as the imaginary part of the resulting complex value cm_complex_add cm_complex_sub cm_complex_mult and cm_complex_div each take two complex values as inputs and return the result of a complex addition subtraction multiplication or division respectively 420 CHAPTER 27 CODE MODELS AND USER DEFINED NODES 27 8 User Defined Node Definition File The User Defined Node Definition File udnfunc c defines the C functions which implement basic operations on user defined nodes such as data structure creation initialization
628. which may consist of a token defined in a param card by calling func or by using a built in function including the statistical functions described above The parameter values will be evaluated once immediately after reading the input file 21 3 Behavioral sources B E G R L C with random con trol All sources listed in the section header may contain parameters which will be evaluated before simulation starts as described in the previous section 21 2 In addition the nonlinear voltage or current sources B source 5 as well as their derivatives E and G but also the behavioral R L and C may be controlled during simulation by a random independent voltage source V with TRRANDOM option chapt 4 1 8 An example circuit a Wien bridge oscillator from input file examples Monte_Carlo OpWien sp is distributed with ngspice or available at CVS The two frequency determining pairs of R and C are varied statistically using four independent Gaussian voltage sources as the controlling units An excerpt of this command sequence is shown below The total simulation time ttime is divided into 100 equally spaced blocks Each block will get a new set of control voltages e g VR2 which is Gaussian distributed mean O and absolute deviation 1 The resistor value is calculated with 10 spread the factor 0 033 will set this 10 to be a deviation of 1 sigma from nominal value Examples for control of a behavioral resistor random resistor
629. witch 74 CHAPTER 3 CIRCUIT ELEMENTS AND MODELS 3 2 15 Switch Model SW CSW The switch model allows an almost ideal switch to be described in ngspice The switch is not quite ideal in that the resistance can not change from 0 to infinity but must always have a finite positive value By proper selection of the on and off resistances they can be effectively zero and infinity in comparison to other circuit elements The parameters available are Name Parameter Units Default Switch model VT threshold voltage V 0 0 SW IT threshold current A 0 0 CSW VH hysteresis voltage V 0 0 SW IH hysteresis current A 0 0 CSW RON on resistance Q 1 0 SW CSW ROFF off resistance Q 1 0e 12 SW CSW Or 1 GMIN if you have set GMIN to any other value see the OPTIONS control line 15 1 2 for a description of GMIN its default value results in an off resistance of 1 0e 12 ohms The use of an ideal element that is highly nonlinear such as a switch can cause large discontinu ities to occur in the circuit node voltages A rapid change such as that associated with a switch changing state can cause numerical round off or tolerance problems leading to erroneous results or time step difficulties The user of switches can improve the situation by taking the following steps e First it is wise to set ideal switch impedances just high or low enough to be negligible with respect to other circuit elements Usi
630. xamples ac dec 10 1 10K ac dec 10 1K 100MEG ac lin 100 1 100HZ dec stands for decade variation and nd is the number of points per decade oct stands for octave variation and no is the number of points per octave lin stands for linear variation and np is the number of points fstart is the starting frequency and fstop is the final frequency If this line is included in the input file ngspice performs an AC analysis of the circuit over the specified frequency range Note that in order for this analysis to be meaningful at least one independent source must have been specified with an ac value Typically it does not make much sense to specify more than one ac source If you do the result will be a superposition of all sources thus difficult to interpret Example Basic RC circuit r 12 1 0 c 2 0 1 0 vin 10 dc 0 ac 1 lt the ac source Options noacct ac dec 10 01 10 plot ac vdb 2 xlog end 15 3 ANALYSES 227 In this ac or small signal analysis all non linear devices are linearized around their actual de operating point All Ls and Cs get their imaginary value depending on the actual frequency step Each output vector will be calculated relative to the input voltage current given by the ac value Vin equals to 1 in the example above The resulting node voltages and branch currents are complex vectors Therefore you have to be careful using the plot command Especially you may use the variants of vxx
631. xecution is completed will return with the ngspice prompt When the prompt returns issue the rusage command again to see how much time and memory has been used now 340 CHAPTER 20 EXAMPLE CIRCUITS To examine the results of this transient analysis we can use the plot command First we will plot the nodes labeled 1 and base ngspice 2 gt plot v 1 base The simulator responds by displaying an X Window System plot similar to that shown in Figure 20 2 Figure 20 2 node 1 and node base versus time Notice that we have named one of the nodes in the circuit description with a number 1 while the others are words base This was done to illustrate ngspice s special requirements for plotting nodes labeled with numbers Numeric labels are allowed in ngspice for backwards compatibility with SPICE2 However they require special treatment in some commands such as plot The plot command is designed to allow expressions in its argument list in addition to names of results data to be plotted For example the expression plot base 1 would plot the result of subtracting 1 from the value of node base If we had desired to plot the difference between the voltage at node base and node 1 we would need to enclose the node name 1 in the construction v producing a command such as plot base v 1 Now issue the following command to examine
632. xpected found A scalar connection was expected for a particular port on the code model but the symbol which is used to begin a vector connection list was found ERROR Unexpected A was found where not expected Most likely caused by a missing ERROR Unexpected Arrays of arrays not allowed A character was found within an array list already begun with another character ERROR Tilde not allowed on analog nodes The tilde character was found on an analog connection This symbol which performs state inversion is only allowed on digital nodes and on User Defined Nodes only if the node type definition allows it ERROR Not enough ports An insufficient number of node connections was supplied on the instance line Check the Inter face Specification File for the model to determine the required connections and their types ERROR Expected node instance identifier A special token e g lt gt was found when not expected ERROR Expected node identifier A special token e g lt gt was found when not expected ERROR unable to find definition of model lt name gt A model line for the referenced model was not found ERROR model s Array parameter expected No array delimiter found 28 3 CODE MODEL ERROR MESSAGES 433 An array vector parameter was expected on the model card but enclosing characters were not found to delimit its values ERROR model s Unexpected end of mo
633. y are specified as the input to the circuit the complex values of the second and third harmonics are determined at every point in the circuit If there are signals of two frequencies input to the circuit the analysis finds out the complex values of the circuit variables at the sum and difference of the input frequencies and at the difference of the smaller frequency from the second harmonic of the larger frequency Distortion analysis is supported for the following nonlinear devices e Diodes DIO BJT JFET e MOSFETs levels 1 2 3 6 9 BSIM1 BSIM2 BSIM3 BSIM4 and BSIMSOD e MESFETS All linear devices are automatically supported by distortion analysis If there are switches present in the circuit the analysis continues to be accurate provided the switches do not change state under the small excitations used for distortion calculations 1 2 6 Sensitivity Analysis Ngspice will calculate either the DC operating point sensitivity or the AC small signal sen sitivity of an output variable with respect to all circuit variables including model parameters Ngspice calculates the difference in an output variable either a node voltage or a branch current by perturbing each parameter of each device independently Since the method is a numerical approximation the results may demonstrate second order affects in highly sensitive parameters or may fail to show very low but non zero sensitivity Further since each variable is perturb
634. y profile direction N Type P Type Flag Impurity type Donor Acceptor Phosphorus Arsenic Antimony Boron X Low Real Lowest X location of constant box um X High Real Highest X location of constant box um Y Low Real Lowest Y location of constant box um Y High Real Highest Y location of constant box um Conic Peak conic Real Dopant concentration cm Location Range Real Location of profile edge peak um Char Length Real Characteristic length of profile um Ratio Lat Real Ratio of lateral to primary distances 29 6 3 EXAMPLES This first example adds a uniform background P type doping of 1 0 x 10 fcm7 to an entire device doping uniform p type conc 1 0e16 A Gaussian implantation with rotated lateral falloff such as might be used for a MOSFET source is then added doping gauss lat rotate n type conc 1 0el9 x 1 0 0 x h 0 5 y 1 0 0 y h 0 2 ratio 0 7 29 7 ELECTRODE 451 Alternatively an error function falloff could be used doping gauss lat erfc conc 1 0e19 x 1 0 0 x h 0 5 y 1 0 0 y h 0 2 ratio 0 7 Finally the MOSFET channel implant is extracted from an ASCII format SUPREM3 file The lateral profile is uniform so that the implant is confined between X lum and X 3um The profile begins at Y Oum the high Y value defaults equal to the low Y value doping ascii suprem3 infile implant s3 lat unif boron x 1 1 0 x h 3 0 y 1 0 0 29 6 4 SEE ALSO domain mobility contact boundary 29 7
635. y special character in the first place e The last line must be end The order of the remaining lines is arbitrary except of course that continuation lines must immediately follow the line being continued This feature in the ngspice input language dates back to the punched card times where elements were written on separate cards and cards fre quently fell off Leading white spaces in a line are ignored as well as empty lines Each element in the circuit is specified by an element line that contains e the element name e the circuit nodes to which the element is connected e and the values of the parameters that determine the electrical characteristics of the ele ment The first letter of the element name specifies the element type The format for the ngspice element types is given in what follows In the rest of the manual the strings XXXXXXX YYYYYYY and ZZZZZZZ denote arbitrary alphanumeric strings For example a resistor name must begin with the letter R and can contain one or more characters Hence R R1 RSE ROUT and R3AC2ZY are valid resistor names Details of each type of device are supplied in a following section 3 Fields on a line are separated by one or more blanks a comma an equal sign or a left or right parenthesis extra spaces are ignored A line may be continued by entering a plus in 45 46 CHAPTER 2 CIRCUIT DESCRIPTION column 1 of the following line ngspice continues reading begin
636. y y_array Description x element array y element array Data_Type real real Default Value s Limits z Vector yes yes 146 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Vector_Bounds 2 2 Null_Allowed no no PARAMETER_TABLE Parameter_Name input_domain fraction Description input sm domain smoothing abs switch Data_Type real boolean Default_Value 0 01 TRUE Limits 1ie 12 0 5 z Vector no no Vector_Bounds Null_ Allowed yes yes STATIC_VAR_TABLE Static_Var_Name last_x_value Data_Type pointer Description iteration holding variable for limiting Description The Piece Wise Linear Controlled Source is a single input single output func tion similar to the Gain Block However the output of the PWL Source is not necessarily linear for all values of input Instead it follows an I O relationship specified by you via the x_array and y_array coordinates This is detailed below The x_array and y_array values represent vectors of coordinate points on the x and y axes respectively The x_array values are progressively increasing input coordinate points and the associated y_array values represent the outputs at those points There may be as few as two x_array n y_array n pairs specified or as many as memory and simulation speed allow This permits you to very finely approximate a non linear function by captur ing multiple input output coordinate points Two aspects of the PWL
637. yes 12 3 7 Node bridge from real to analog voltage real_to_v ucm_real_to_v 182 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Description PORT_TABLE Port_Name Description Direction Default_Type Allowed_Types Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed 12 4 Digital Models Node bridge from real to analog voltage in input in real real no no gain gain real 1 0 no yes out output out Vv lv vd i id no no transition _time output transition time real le 9 1e 15 no yes The following digital models are supplied with XSPICE The descriptions included below con sist of an example model Interface Specification File and a description of the model s opera tion This is followed by an example of a simulator deck placement of the model including the MODEL card and the specification of all available parameters Note that these models have not been finalized at this time Some information common to all digital models and or digital nodes is included here The following are general rules which should make working with digital nodes and models more straightforward 1 All digital nodes are initialized to ZERO at the start of a simulation 1 e when INIT TRUE This means that a model need not post an explicit value to an output node
638. you want to simulate temperature dependence of a capacitor you need to specify its temper ature coefficients using a command model line like in the example below CEB 1 2 lu capl dtemp 5 MODEL cap C tcl 0 001 3 2 ELEMENTARY DEVICES 67 The optional initial condition is the initial time zero value of capacitor voltage in Volts Note that the initial conditions if any apply only if the uic option is specified on the tran control line Ngspice calculates the nominal capacitance as described below Chom Value x scale x m 3 6 3 2 6 Semiconductor Capacitors General form CXXXXXXX n n lt value gt lt mname gt lt l length gt lt w width gt lt m val gt lt scale val gt lt temp val gt lt dtemp val gt lt ic init_condition gt Examples CLOAD 2 10 10P CMOD 3 7 CMODEL L 10u W 1u This is the more general form of the Capacitor presented in section 3 2 5 and allows for the calculation of the actual capacitance value from strictly geometric information and the speci fications of the process If value is specified it defines the capacitance and both process and geometrical information are discarded If value is not specified the capacitance is calculated from information contained model mname and the given length and width 1 w keywords re spectively It is possible to specify mname only without geometrical dimensions and set the capacitance in the model line 3 2 5 3 2 7 Semiconductor C
639. ype output voltage input voltage pol stands for pole analysis only zer for zero analysis only and pz for both This feature is provided mainly because if there is a nonconvergence in finding poles or zeros then at least the other can be found Finally node1 and node2 are the two input nodes and node3 and node4 are the two output nodes Thus there is complete freedom regarding the output and input ports and the type of transfer function In interactive mode the command syntax is the same except that the first field is pz instead of pz To print the results one should use the command print all 15 3 7 SENS DC or Small Signal AC Sensitivity Analysis General form SENS OUTVAR SENS OUTVAR AC DEC ND FSTART FSTOP SENS OUTVAR AC OCT NO FSTART FSTOP SENS OUTVAR AC LIN NP FSTART FSTOP Examples SENS V 1 OUT SENS V OUT AC DEC 10 100 100k SENS I VTEST The sensitivity of OUTVAR to all non zero device parameters is calculated when the SENS analysis is specified OUTVAR is a circuit variable node voltage or voltage source branch current The first form calculates sensitivity of the DC operating point value of OUTVAR The second form calculates sensitivity of the AC values of OUTVAR The parameters listed for AC sensitivity are the same as in an AC analysis see AC above The output values are in dimensions of change in output per unit change of input as opposed to percent change in output or per percent change
640. yped If nomoremode is set then data scrolls off the screen without check nonomatch If noglob is unset and a global expression cannot be matched use the global char acters literally instead of complaining noparse Don t attempt to parse input files when they are read in useful for debugging Of course they cannot be run if they are not parsed noprintscale Don t print the scale in the leftmost column when a print col command is given nosort Don t have display sort the variable names nosubckt Don t expand subcircuits notrnoise Switch off the transient noise sources chapt 4 1 7 numdgt The number of digits to print when printing tables of data a print col The default precision is 6 digits On the VAX approximately 16 decimal digits are available using double precision so p should not be more than 16 If the number is negative one fewer digit is printed to ensure constant widths in tables num_threads The number of of threads to be used if OpenMP see chapt 16 10 is selected The default value is 2 plotstyle This should be one of linplot combplot or pointplot linplot the default causes points to be plotted as parts of connected lines combplot causes a comb plot to be done It plots vectors by drawing a vertical line from each point to the X axis as opposed to joining the points pointplot causes each point to be plotted separately pointchars Set a string as a list of characters to be used as points in a po
641. zero i_sink_range serves the same purpose with respect to i_limit_sink and i_neg_pwr that i_source_range serves for 1_limit_source amp i_pos_pwr r_out_domain specifies the incremental value above and below veq vout 0 0 at which r_out will be set to r_out_source and r_out_sink respectively For values of veq vout less than r_out_domain and greater than r_out_domain r_out is interpolated smoothly between r_out_source amp r_out_sink Example SPICE Usage a10 3 10 20 4 amp3 model amp3 ilimit in_offset 0 0 gain 16 0 r_out_source 1 0 r_out_sink 1 0 i_limit_source 1e 3 i_limit_sink 10e 3 v_pwr_range 0 2 i_source_range 1e 6 i_sink_range 1e 6 r_out_domain 1e 6 12 2 13 Hysteresis Block NAME_TABLE C_Function_Name cm_hyst Spice_Model_Name hyst Description hysteresis block PORT_TABLE Port Name in out Description input output Direction in out Default_Type v v Allowed_Types v vd i id v vd i id Vector no no Vector Bounds 156 CHAPTER 12 MIXED MODE AND BEHAVIORAL MODELING WITH XSPICE Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null_ Allowed PARAMETER_TABLE Parameter Name Description Data_Type Default Value Limits Vector Vector Bounds Null Allowed P

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