Texas Instruments SLAU081 User's Manual
Contents
1. 1 2 3 4 Revision History U16B DVdd U13A REV ECN Number Approved 112 O0 Q0 HI 16 T B GND Vec 28 R MOM 18 113 01 01 mo 13 ADC Data n3 VE numm 19 2 Data out MOM MOM 115 03 Q3 18 DSP DX EVM Chix EVM CLKX TP15 R 21 116 04 04 p 10 _ADC TC SYSCLK SYSCLK DVdd Go 23 117 05 05 16 9 START DSP FSX DSP SX 14 GND Vec a Qi 24 18 06 06 E mE DSP DX C55 Q2 25 6 DAC Type DSP XF O 1UF 119 O7 Q7 14 DSP_XF DV L Q3 26 porosiQs nl 5 DSP FSX SAM SANG INIT 27 4 DSP XF DAC Type R39 map 121 09 Q9 2 DAC Type Tok DVdd m A RESET ADC Data out ADC Data out TP14 K 14 GND Yy a i NG CLknod 2 SYSCLK START C54 5 NC 0 1uF 25 NC NG START U10 U16A U14A RESET 3 E OUT RESET D 112 00 Q0 mn T ADE Te 17 112 00 00 ui HET TP19 DVdd Q 8 nzo no HB 90 18 113 01 Q1 no HB 20 DISCH 114 02 Q2 19 12 Qi 19 114 O2 Q2 19 12 Qi vec 20 u Qe 20 u Qe 5 THRES 115 03 Q3 I8 115 O3 Q3 I8 Cen CONT ADC Data n3 21 116 04 04 ph 10 3 2 116104104 g0 Q3 0 1uF TRIG 23 1117 05 05 16 2L MOM 23 117 05 Q5 16 C621 GND 24 118 06 Q6 1517 DAC Type 24 118 06 Q6 15 71 DAC Type NE555D 25 1119 07 07 14 5 EVM OUER 25 1119 07 07 14 8 INIT L ABC Data out mw 120 08 08 13 32 DSP ESX2. 22 Jumpers e E e E up AA AA 2 2 4 Analog I O Signal Conditioning 2 2 2 Channel 0 Analog Input 2 2 3 Channel 0 Analog Output 2 2 4 Signal Generator 2 2 5 Voltage Reference unni kk AA kuwa v sien nes 2 2 6 ADC Supply Voltage 2 2 7 Clock Timer Routing 2 3 SSWITCNES CI 2 3 44 Stand Alone Mode SW1 1 2 4 Tee IEN 25 ADC and DAC Direct Access 2 6 Host Communication 2 6 1 Common Connector 2 6 2 Legacy Connector A Bill of Materials Board Layout and Schematics Figures 2 1 SAM Configuration EE Tables 2 1 2 2 2 3 vi Default Switch Settings Default Jumper Settings e ee Jumper Function Reference cc eect nen Chapter 1 Introduction This chapter contains an overview of the features and functions of the EVM Topic Page EEN 1 2 1 2 Analog Input Conditioning 1 3 1 3 Analog Output Conditioning EEN 1 3 1 4 Prototype Area ala laa sea S are ass 1 3 EVM Modes 1 4 EVM Modes This user s guide has b
3. s ew 9 Norcon i ale I I a ET Reference Designator Description Analog output for one channel DAC 2 8 Connectors Reference Description Function EVM power Analog output option 26 pin DIL header lt NEN 7 Kc EM o E EM puse EN m NECI K is to 20 Ce H 22 es 24 es Getting Started 2 9 Connectors kaa ee RED mm Designator Description Function PUE HAN 6 Fitered output rom dual operational amplifier 2 8 operational ampiir 2 shutdown Sna Reference voltage Analog ground 11 Operational amplifier 1 shutdown signal 12 V supply 13 Nonfiltered output from dual operational amplifier 1 14 Filtered output from dual operational amplifier 1 15 Noninverting input signal to dual operational amplifier 1 16 Noninverting input signal to dual operational amplifier 1 17 Inverting input signal to dual operational amplifier 1 18 Inverting input signal to dual operational amplifier 1 2 10 ADC and DAC Direct Access 2 5 ADC and DAC Direct Access J10 and J11 offer users the facility to directly inspectthe digital signals coming from and going to the ADC and DAC Digital ground S 2 6 Host Communication There are two ways to connect a host system DSP microprocessor Texas Instruments new DSKs provide two dedicated 80 pin conn
4. da TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE DAC Output Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 0 FILE Output conditioning DATE 28 Nov 2001 SIZE A4 sHEET 7 OF 14 1 3 4 Memory Interface Connector Peripheral amp Control Connector 4 Revision History REV ECN Number Approved F 040500 FB12 CLIX pa BLM11A121SGPB FB11 DSP_CLKR CLKR BLM11A121SGPB F eeh 3 FBS e Fox iQ r BLM11A121SGPB 91 Sa FB4 u T Ta DSP_FSR FSR 13 Ta BLM11A121SGPB 15 J T 16 Ma L 18 ga 19 T L 20 21 22 DX BJ LA BLM11A121SGPB 25 T 26 Ek 7 L 28 29 30 DSP DR DR 31 32 BLM11A121SGPB 31 T_34 35 L 36 Elo 37 T T 38 39 40 x ag To BLM11A121SGPB 43 L4 45 L 46 FB10 47 L 48 49 50 TOUT BE LES BLM11A121SGPB ST L ss L 56 EEG 7 L sg 59 60 DSP CLKS CLKS 61 T Ta BLM11A121SGPB 63 Le 65 L 66 67 _ 68 69 L 70 71 72 73 7 L 76 Va L 78 79 80 J13 J12 J15 sila db x 1 2 1 2 1 2 3 4 3 d 3 4 CLKR DX 5 6 5 6 5 6 DR 7 8 7 8 7 8 pa FSX 9 10 9 10 9 10 X3 e ee TEXAS usc B da de E INSTRUMENTS 17 18 17 18 17 18 TOUT lio 20 19 20 19 20 12500 TI Boulevard Dallas Texas 75243 TITLE User Comnectors
5. Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE User connectors DATE 28 Nov 2001 SIZE A4 SHEET g OF 14 1 3 4 4 TO FROMUSER l DVdd Stand Alone Mode CONNECTIONS Ds Toor DEE TOUT h DSP_CLKS DR DEE CLK i DSP Op DSP DX DSP DX DSP DR DSP SX DSP_FSx i DSP FSR DSP XE DSP XF i I EE x l l l l l l LCL CS ADC l l LCL CLKX l l l l l l l l l ADC_Data_out l DAC Data in l l LCL_CS DAC l DAC Write I SYSCLK FS EVM CLKX C LCL_CS_ADC DSP_XF LCL_CLKX DSP_FSX ADC Data out DSP_DX DSP DR gt MOM DAC Type X DAC Data in LCL CS DAC DAC Write SAM MOM DAC Type SYSCLK SYSCLK EVM CLKX DSP XF DSP FSX DSP DX DSP DR DVdd R37 1K SYSCLK DSP_FSR DSP_FSX DSP_TOUT DSP_CLKX DSP_CLKS DVdd R6 430 R11 1K SW1C O Ka Revision History REV ECN Number Approved R71 33 W23 33 J14 R46 49 9K 35 TEXAS ST INSTR MENTS 12500 TI Boulevard Dallas Texas 75243 TITLE Digital Interface Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE ByltldstyRsSDDps DATE 28 Nov 2001 SIZE A4 SHEET 9 OF 14 1 3 4
6. SENSE I i I I PCI 5v I gt 5 Ground 4 TEXAS PCI 12V peu xcu s s INSTRUMENTS Su Ge 12500 TI Boulevard Dallas Texas 75243 I PCI 12V C TITLE I 1 _ 5V_IN gt 45V IN Block Diagram y Engineer Joe Purvis DOCUMENT CONTROL REV ES Drawn By Joe Purvis 9430333 FILE Block Diagram DATE 28 Nov 2001 SIZE A4 SHEET 1 OF 14 1 2 3 4 2 3 4 Revision History REV ECN Number Approved 2 040500 Power FL2 VS Supply 3 gt VIN Vs R70 C11 4 C57 PCLT2V 4 10uF 10uF GND FL3 1 gt 3 Ground gt REF IN R68 PCI GND a V GND GND FL4 NS Supply 1 3 gt WIN Vs Sri C10 C56 PCI 12V KO i 10uF 10uF 0 GND FB13 DVdd 5V_IN gt DVdd DVdd O SM_FB_27 044447 R58 PCI_ 5v 0 Reference gt VIN SENSE gt SENSE VREFP VREFP FL1 EXT VREFP 1 3 EXT_REFP Xi 12500 TI Boulevard Dallas Texas 75243 TITLE Power amp Reference Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Power amp Reference DATE 28 Nov 2001 SIZE A4 sHEET 2 OF 14 2 3 4 1 2 3 4 Revision History REV ECN Number Approved F 040500 TE
7. the digital output from the ADC is fed into the companion DAC and reconstructed User mode is deselected if SAM is selected The DSP will be unable to communicate with either the ADC or the DAC User Mode The EVM typically operates via a DSP or a microprocessor In this mode the user is responsible for generating all the control signals If user mode is selected SAM is deselected Analog Input Conditioning 1 1 1 Stand Alone Mode 1 1 2 User Mode A unique feature of this EVM is the facility it offers the user to closely couple the ADC and DAC with a minimum of user intervention This feature allows the serial bit stream from the digitized analog output to be fed directly to the DAC Therefore the signal that is fed into the ADC can be reconstructed via the DAC No DSP need be present SAM is selected by Switching SW1 1 to the on position LED is on The user can connect the ADC to a DSP orto a microprocessor in two ways 1 Via IDC ribbon cable L Via daughterboard connectors J16 and J17 User mode is selected by Switching SW1 1 to the off position LED is off For example Tl s range of DSP starter kits DSK modules provides a simple low cost solution offering a range of DSK modules for most needs The EVM also supports the TMS320C6000 daughtercard specification SPRA711 in addition to providing support for the Motorola specification for data transfer SPI 1 2 Analog Input Conditioning There are a
8. IDC J4 pin 1 W11 allows selection of either the conditioned or nonconditioned analog input signal W4 allows the user to select either the prototype area output or the output from W11 W2 W2 enables the user to select either the output from the expansion connector or the output from the onboard signal generator W3 W3 completes the selection choices for channel O by determining if the output from W2 or W4 is chosen to be presented to the ADC 2 4 Jumpers 2 2 3 Channel 0 Analog Output With a one channel DAC installed this signal is the primary analog output output A With a two channel DAC installed the pinout of these devices effectively resolves this channel to be the secondary analog output output B Analog Input Configuration Channel 0 Reference Designator Functional Description W19 This jumper selects the source for the analog output on channel 0 When a jumper is installed between pins 1 and 2 the output from the expansion connector s B channel is routed out When the jumper is installed between pins 2 and 3 the output from the onboard signal conditioning is directed through channel 0 2 2 4 Signal Generator Signal Generator Reference Designator Functional Description W9 W9 controls the generation of both onboard test signals A jumper installed between pins 1 and 2 disables the waveform generator 2 2 5 Voltage Reference Voltage Reference Reference Designator Functional Description
9. Input configuration DATE 28 Nov 2001 SIZE A4 sHEET H OF 14 1 2 3 4 Vs U3 V Duty adj Duty Adj Sine Out 49 9K Sine Adj Sine Adj 10 Square Out Timing Cap 8 E FM Sweep Input 7 FM Bias Triangle Out la Not Connected Not connected ll V GND ICL8038 C18 T 10uF C15 0 1uF Vs 10K TLE2082D TLE2082D 4 Revision History REV ECN Number Approved 2 040500 Test Signal 0 Test Signal 1 da TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE Signal Generator Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Signal Generator DATE 28 Nov 2001 SEE A4 sHEET 12 OF 14 1 3 4 4 TP1 sss Jj IN_I TP3 PTI TP2 TP4 BB Output 0 BB Output 1 Revision History REV ECN Number Approved 2 040500 NG TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE Prototype Area Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Prototype Area DATE 28 Nov 2001 SIZE A4 SHEET 13 OF 14 2 3 4 1 2 3 4 Revision History REV ECN Number Ap
10. W16 selects either the onboard reference or an external reference supplied by the user W17 allows the user to vary the reference voltage W14 There are a number of possible DACs that a user can install on this EVM Some have an internal reference that the user can select via software and some do not have an internal reference For the DACs that support an internal reference it is important to have the facility to remove the external reference supplied by the EVM or user to avoid conflicts between the DAC s internal reference and the external reference 2 2 6 ADC Supply Voltage ADC Supply Voltage Reference Designator Functional Description W13 This jumper controls the analog supply voltage When the jumper is installed the supply voltage to the ADC is 3 3 V When the jumper is not installed the supply voltage to the ADC is 5 V Getting Started 2 5 Switches 2 2 7 Clock Timer Routing A variety of options are available to the user Be careful about altering these Clock Timer Routing Reference Designator Functional Description W21 This jumper defines the clock that the ADC and DAC use for all their timing The user can select either the output from W23 or the output from W22 to be the base clock for the system W23 This jumper allows the user to select either an external clock or the onboard 20 MHz oscillator for conversion In addition this signal is fed to W20 W20 provides a route for the EVM to generate CLKS f
11. number of methods to connect analog input signals to the EVM Chapter 2 discusses these alternatives 1 3 Analog Output Conditioning There are a number of methods to connect analog output signals to the EVM Chapter 2 discusses these alternatives 1 4 Prototype Area An area of the PWB has been set aside if none of the signal conditioning options provided are suitable The prototype area has the following features II A matrix of plated through holes PTH 1 SMT pads in a standard 14 pin JEDEC footprint L Convenient points to pick up all power options Introduction 1 3 Chapter 2 Getting Started This chapter describes how the user can modify the various options of this EVM Topic 2 4 Shipping Default Configuration 2 2 AUS t AA EW Che SO De TO Ee EE 2 5 ADC and DAC Direct Eeer 26 Host Communication eeaeee ee AA AA AA 2 1 Shipping Default Configuration It is very important that users feel comfortable with the EVM from the beginning To achieve this each unit is manufactured and shipped in a predetermined condition This allows the user to begin evaluation of the system immediately and to have confidence that the EVM is working To confirm that the EVM is working properly follow the steps below Apply power to the system The green LED will illuminate 2 Ensure stand alone mode SAM LED is on 3 Check TP7 via oscilloscope This will be a sine wave 4 Press the res
12. 26 120 08 Q8 gel DSPAESX TP17 27 121 09 Q9 p 4 DSP XF 27 1121 09 09 p 4 DSPXF p 3 RESET m 3 RESET NC CLK I0 q 2 SYSCLK NC CLK I0 SYSCLK GNC i NC X3 Ti R R EXAS INSTRUMENTS 12500 Tl Boulevard Dallas Texas 75243 TITLE Stand Alone Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Stand Alone Mode DATE 28 Nov 2001 SEE A4 sHEET 10 OF 14 1 2 3 4 1 2 3 4 Revision History REV ECN Number Approved 2 040500 Signal Conditioning Prototype Area DINO OUT 0 BB Output 0 WA gt INO H W3 TP7 wife R9 O BNC_0 8 B 43 Channel 0 C8 W1 J3 6800pF B i B204 B2_OUT gt 2 B203 6 B2_FLT 3 B202 w2 IDC 0 iona q B 4 B201 Signal Generator o 8 Test signal 0 B2 SD B A2 SD Test signal 1 18 A201 We BNC I B U A202 13 9 16 A2 OUT W5 A203 B A204 A2 FLT 14 Vs EA V2 W7 TP6 IDC 1 12 R12 Q See V2 B Channel_1 33 2 VREF2 s Vs F Ar GND 6800p Signal Conditioning Prototype Area OUT_I BB_Output_1 I TE S ws I gt NSTRUMENTS INI OIN I H 12500 TI Boulevard Dallas Texas 75243 TITLE W25 Input Configuration B Engineer Joe Purvis DOCUMENT CONTROL REV T Drawn By Joe Purvis 6430333 FILE
13. 35 TEXAS INSTRUMENTS TLC4541 EVM User s Guide January 2002 AAP Data Acquisition Dallas SLAU081 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subjectto Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed Tl assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards Tl does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or ot
14. AS DVdd DVdd 10uF TP18 TP12 FB3 O Vs BLM11A121SGPB U6 TPS77801D VIN n pa 2 IN TP9 AVdd 2 JENA our OUT BLM11A121SGPB R18 C24 20K 1 C34 10uF GND SENSE FB 4 7uF 0 1uF REF_IN R14 R62 0 0 NM i TP13 FB1 O TEXAS a DEE L NSTRUMENTS T 10uF 12500 Tl Boulevard Dallas Texas 75243 TITLE Power Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Power DATE 28 Nov 2001 SIZE A4 sHEET 3 OF 1 2 3 4 4 VIN C30 2 2uF NR U7 o VRE3050 a Vin 5 Vout a a Q H 9 TRIM o N R25 Not Installed U11 TLE2081 Revision History REV ECN Number Approved 040500 EXT REFP VREFP 35 TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE Reference Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FILE Reference DATE 28 Nov 2001 SIZE A4 sHEET 4 OF 14 4 1 2 3 4 2 040500 Revision History AVdd REV ECN Number Approved C22 0 1uF C19 10uF NM SENSE R19 ADC REF 0 U501 VREFP MSOP ADC 8 C23 C14 10uF 0 1uF In o AWO 2 AN or AINO or AIN SOCKETED ADC 5 X AINI SCLK or AIN1 or AIN 3 5 N u AD
15. C Data out gt LOL CLKX mi ED W10 LCL CS ADC FS da TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE ADC Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FIE ADC DATE 28 Nov 2001 SE A4 sHEET 5 OF 14 1 2 3 4 1 2 3 4 Revision History AVdd REV ECN Number Approved 2 040500 DAC Out C43 C21 DAC OUT SE E VREFP OUT OUTB C41 R54 10uF 10K Y W14 REF 5 gt d ge R55 GND m 10K VS 0 1uF VREF2 wo oo o ve 12 U8 V2 t g TP20 u lt VS Q 4 A FLT A204 E18 SOCKETED DAC DAC Data in lt A203 16 5 A2 OUT A202 K LCL CLKX A201 8 A2 SD HL B2 SD 2 B201 B202 3 B2 FLT B203 i LCL CS DAG B2 OUT B204 DAC Write DAC Out TP21 Q OUTA bod wie TEXAS INSTRUMENTS DAC_OUTA GOU 12500 TI Boulevard Dallas Texas 75243 TITLE DAC Engineer Joe Purvis DOCUMENT CONTROL REV Drawn By Joe Purvis 6430333 FLE DAC DATE 28 Nov 2001 Sze A4 SHEET 6 OF 14 1 2 3 4 4 DAC_OUTA DAC_OUT u12 TLE2081 R35 R26 Trim Revision History REV ECN Number Approved 040500
16. EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES Tl currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive Tl assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the EVM User s Guide and specifically the EVM Warnings and Restrictions notice in the EVM User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For further safety concerns please contact the Tl application engineer Persons handling the product must have electronics training and observe good laboratory practice standards No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such Tl products or services might be or are used Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2002 Texas Instruments Incorporated EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 12 V and the output voltage range of 12 V Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions co
17. a w18 UN W20 W21 Inserted W22 W23 Not inserted 7 These jumpers determine various options for supplying system Not inserted clock This has been designed to be as flexible as possible to Not inserted accommodate many potential options Inserted Inserted ERE R Not inserted Not populated Not populated The hardware that can be reconfigured falls into one of the following sections o Jumpers L Switches LI Connectors Getting Started 2 3 Jumpers 2 2 Jumpers The table below lists the functions that users can reconfigure along with the shipping condition Table 2 3 Jumper Function Reference Function ees Designator Subsection ai _ A 2 2 1 Analog I O Signal Conditioning The TLC4541 supports various signal conditioning configurations The user has the following options L Bypass signal conditioning L Use the onboard signal conditioning This consists of an operational amplifier for each input channel configured with a gain of 1 Use the prototype area for signal conditioning Use the expansion connector via a TI universal operational amplifier evaluation module such as SLOP224 SLOP249 2 2 2 Channel 0 Analog Input This is the primary analog input and can always be connected externally Analog Input Configuration Channel 0 Reference Functional Description Designator W1 allows the user to select between an analog input via BNC J1 or
18. ectors The EVM can be plugged directly onto these DSKs This connector standard is referred to as the common connector Legacy DSKs not equipped with the 80 pin common connectors will communicate via the daisy chained legacy header The following sections discuss each connection method Getting Started 2 41 Host Communication 2 6 1 Common Connector Reference Designator Description 80 pin memory interface connector for C5000 and C6000 DSK EVMs Pins unused by this EVM are omitted for clarity 2 12 eo Pct ground Host Communication Reference f Designator Description Function 80 pin peripheral and control connector for C5000 and C6000 DSK EVMs Pins unused by this EVM are omitted for clarity PCI ground PCI ground PCI ground 55 PCI ground 5 PCI ground rsa or PCI ground PCI ground V FSR F Getting Started 2 13 Host Communication 2 6 2 Legacy Connector 2 14 J12 J13 and J15 are three 2x20 headers daisy chained together and are collectively referred to as the legacy connector The principle behind this arrangement is to eliminate the confused and untidy custom cabling that is typically present when connecting a legacy DSP to an EVM This daisy chained connector method is flexible robust and makes it possible to use a standard flat signal cable assembly improving reliability of communications between host and EVM Two shorting bars are inserted in J12 and J15 these bars perm
19. een written to help you get the most from your evaluation module EVM The TLC4541 EVM is a member of the multipurpose MP family of serial EVMs It provides a platform to demonstrate the performance and functionality of the TLC4541 ADC and the TLV5636 DAC TI s websites are regularly updated They present the latest software additions development information troubleshooting help general background as well as all applicable data sheets For specific questions related to this EVM or device send an email to the Analog Applications Team at dataconvapps list ti com and reference the orderable tool description TLC4541 EVM This user s guide is divided into the following chapters L Chapter 1 offers an overview of the EVM and introduces the general features and functions of the system L Chapter 2 describes the operation of the EVM from a user s view It details options that can be modified connectors used and pinout details L Appendix A details the bill of materials BOM and the schematic along with explanations of certain EVM features This EVM has been designed tested and shipped in a condition that enables the user to begin evaluation with minimal effort There are basically two operating modes for the EVM These modes are mutually exclusive They are Stand Alone Mode SAM Stand alone mode enables the user to check the system without the support of a signal generator pattern generator or DSP In this mode
20. eing sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fitfor commercial use As such the goods being provided may not be complete in terms of required design marketing and or manufacturing related protective considerations including product safety measures typically found in the end product incorporating the goods As a prototype this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive Should this evaluation kit not meet the specifications indicated in the EVM User s Guide the kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE
21. et button SW3 5 Press the start button SW2 6 Check TP20 with an oscilloscope If the system is working properly the signal at TP20 will also be a sine wave The system works as illustrated below Any analog input supplied to the ADC will be digitized and reconstructed by the DAC Figure 2 1 SAM Configuration Control DSP Micro Electronics Interface TP20 The user may probe the data and control signals to observe the signals that allow stand alone mode to function 2 4 Shipping Default Configuration 2 2 The EVM is tested and shipped with jumpers and switches in a predetermined arrangement This arrangement enables users to verify at once that the EVM is working The tables below list switch and jumper settings that the EVM should be set to upon receipt Shipping Default Configuration Table 2 1 Default Switch Settings Default Configuration Description o Table 2 2 Detault Jumper Settings Not inserted Sine wave test signal is selected for channel 0 EAR Ead co N 1 W2 W3 W4 Not inserted Sine wave test signal is output for channel O Not inserted Onboard conditioned input for channel 0 is selected al Not populated Not populated o Not populated Not populated Not populated Not populated 00 Not inserted W10 Inserted W11 W12 Not inserted Inserted W14 W15 W16 W17 W18 W19 Inserted Inserted Not inserted Inserted wit w12 um Wis wie U
22. he host connector mates with J12 Signals on either side of J12 are available on J13 and J15 Getting Started 2 15 Host Communication For clarity the above table can be redrawn with J12 removed The table below shows the signal names and pin assignments that the composite connector shown above must be mapped onto 2 16 Host Communication All of the signals required to interface the EVM to the host are now available on either J13 or J15 This is simply a matter of wire wrapping in the following way wewe m ino Signal EE EA Wire Wrap s13 Jumper ESSE SE 9 J g J J J gJ Jj g g Gil 0 QO QO GO Q QQ Gil NI Q zz Z Z 2 2 Z Z Z Z OO OJ g OJO O JO UO O O Getting Started 2 17 Host Communication 2 18 All of these connectors are shown below Reference Designator Description Signal Name Function 20 pin connector AE EE WEN CE Wu EJ RE SE MES pass ME SLE BE EE EE NE Host Communication Reference Designator Description Signal Name Function 20 pin signal connector 1 ADCselectsignal Select ADC select signal BEE ums reos s jem EE s pem ora vo Getting Started 2 19 Host Communication 2 20 Reference Designator Description Signal Name Function 20 Pin connector 3 pem EON m ROM ECN C HE EE CHE ENE WS EE EX ERES NE Bill of Materials Board Layout and Schematics Thi
23. her Tl intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2002 Texas Instruments Incorporated EVM IMPORTANT NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation kit b
24. it alternate pins on J13 to be DGND If the user has complete discretion over signal routing at the host end itis recommended that the host end connector should reflect the same pinout as J 13 However if the host end connector does not or cannot mirror the pinout for J13 then some degree o signal twisting is necessary This is accomplished on the EVM by removing the shorting bars on J12 and J15 and typically wire wrapping directly onto the appropriate header For example if the host connector on the DSP has the pin assignment described in the following table then a 1 1 mapping is possible and the user should plug a flat 20 way ribbon cable into J13 Host Connector EVM Connector J13 SR SR DGND DGND DGND However if the host connector has a different signal pinout the user should remove the shorting bars from J12 and J15 A flat 20 way IDC ribbon cable can still be used in this case the user should plug the connector into J12 of the EVM Since the cable is now pluggedinto J12 and allthe signals on both sides of the J12 pins are routed to adjacent connector pins J13 and J15 the user can typically wire wrap the associated host signal to the relevant EVM signal E EN pur ET MENO BEI BORD The example shown below demonstrates the steps that must be taken to reassign the connector and wire wrap the correct signals Host Communication Consider a host cable signal assignment as shown below Host Connector T
25. ncerning the input range please contact a TI field representative prior to connecting the input power Applying loads outside ofthe specified output range may resultin unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of devices can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware that these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2002 Texas Instruments Incorporated Contents 1 Introduction cocccccccc AA nnns 1 1 EVM Mode 1 1 1 Stand Alone Mode 1 1 2 User Made 1 2 Analog Input Conditioning 1 3 Analog Output Conditioning 1 4 Prototype Area AA 2 Getting RE En e WEE 2 1 Shipping Default Configuration
26. nectors In addition to jumpers and switches the user also has access to various connectors This section details the pinout of each connector Reference Designator Description Analog input option for channel 0 miniature BNC Cells in grey are not supported tracked directly by this EVM Reference Designator Description Function Analog input option for universal operational amplifier evaluation board SIL PTH not installed Noninverting input signal to dual operational amplifier 2 Noninverting input signal to dual operational amplifier 2 Inverting input signal to dual operational amplifier 2 Inverting input signal to dual operational amplifier 2 Nonfiltered output from dual operational amplifier 2 Filtered output from dual operational amplifier 2 1 V supply mca Operational amplifier 2 shutdown signal NC Reference voltage Analog ground Operational amplifier 1 shutdown signal V supply Nonfiltered output from dual operational amplifier 1 Filtered output from dual operational amplifier 1 Noninverting input signal to dual operational amplifier 1 Noninverting input signal to dual operational amplifier 1 Inverting input signal to dual operational amplifier 1 Inverting input signal to dual operational amplifier 1 Getting Started 2 7 Connectors Reference Description Analog input option 26 pin 1 Channel 0 Channel O input DIL header s ano
27. or a DSP if so desired This jumper enables the user to select either the transmit clock from a DSP or the output from W24 W24 connects or isolates the timer output from a DSP 2 3 Switches There are three switches present on the EVM One 8 pin DIL switch which houses four individual switches these are denoted SW1 1 SW1 2 SW1 3 and SW1 4 Two momentary push button switches Features and functions of each switch Ee O E Designator Function Condition sw Rem sm Ree sw14 _ Reserved O 2 3 1 Stand Alone Mode SW1 1 2 6 SW1 1 chooses either stand alone mode or user mode If the switch is set to the off position SAM is selected and the EVM ignores all signals generated by a DSP In addition the EVM will not output any signals to a DSP or microprocessor In this mode SW2 and SWS are used to reset the EVM s logic and initiate automatic conversions from the ADC in addition to automatically routing the serial bit stream from the ADC to the DAC for reconstruction Reference Designator Initiates ADC and DAC conversions in SAM Forces the EVM s control logic into a known state Connectors If SW1 1 is set to the on position user mode is selected In this case the user has absolute control of the data and control signals for the ADC and DAC With SW1 1 in the on position the logic that generates the control for SAM is disabled and plays no active part in the process 2 4 Con
28. proved F 040500 R3 R4 TLE2081 IN_I C37 0 1uF da TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 TITLE Signal Conditioning Engineer Joe Purvis DOCUMENT CONTROL REV 5K Drawn By Joe Purvis 6430333 FILE Signal Conditioning DATE 28 Nov 2001 SIZE A4 SHEET 14 OF 14 1 2 3 4
29. s appendix contains the bill of materials board layouts and the EVM schematics A 1 4 Revision History REV ECN Number Approved Input Config JI ADC Interface User connectors O BNC 0 DSP CLKS 2 s 5 DSP CLKS ADC Data out rt ADC Data out DSP TOUT 1 DSP TOUT J2 gt BNC 1 SENSE SENSE VREFP VREFP DSP FSX 4 n DSP FSX FS lt gt FS JA DSP FSR 2 gt M gt DSP FSR LCL CS ADC Y LCL CS ADC 2 1 F gt IDC 0 4 3 IDC 1 LCL CLKX LCL CLKXX DSP DX 4 DSP DX 6 5 8 Te DSP DR h w gt lt n P V gt DSP DR 10 9 12 11 Channel 0 2 ASH In 0 14 13 DSP XF C C DSP XF 16 15 Channel 1 3 as s sQ STD In_1 18 17 20 19 DSP CLKX DSP CLKX 22 21 24 23 DSP CLKR 2 M gt DSP CLKR 26 25 DAC J8 LCL CLKX 4 A LCL CS DAC HC LCL CS DAC E DAC Data in p DAC Data in 1 DAC Write C DAG Write ba PCI 5v 18 RRE PCI 12V 20 22 24 PCI_GND SR PCI 12V Power amp Reference dieta EXT VREFP VREFP I 4 Su gt Supply SENSE lt
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