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Philips TDA8767 User's Manual
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1. 66 2 745 4090 Fax 66 2 398 0793 Turkey Talatpasa Cad No 5 80640 GULTEPE ISTANBUL Tel 90 212 279 2770 Fax 90 212 282 6707 Ukraine PHILIPS UKRAINE 4 Patrice Lumumba str Building B Floor 7 252042 KIEV Tel 380 44 264 2776 Fax 380 44 268 0461 United Kingdom Philips Semiconductors Ltd 276 Bath Road Hayes MIDDLESEX UB3 5BxX Tel 44 181 730 5000 Fax 44 181 754 8421 United States 811 East Arques Avenue SUNNYVALE CA 94088 3409 Tel 1 800 234 7381 Fax 1 800 943 0087 Uruguay see South America Vietnam see Singapore Yugoslavia PHILIPS Trg N Pasica 5 v 11000 BEOGRAD Tel 381 11 62 5344 Fax 381 11 63 5777 Internet http www semiconductors philips com SCA62 All rights are reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be accepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights Printed in The Netherlands 545004 750 03 pp20 Philips Semiconductors Date of release 1999 Feb 16 Document order number 9397 750 04713 Lett make things better S PHILIPS
2. analog supply voltage note 1 0 3 7 0 digital supply voltage 7 0 output supply voltage supply voltage difference Vcca Veep Veco Veco Veca Veco input voltage referenced to AGND input voltage for differential clock Vocp drive peak to peak value output current 10 storage temperature 55 150 C operating ambient temperature 0 70 C junction temperature 150 C Note 1 The supply voltages Vcca Vecp and Veco may have any value between 0 3 V and 7 0 V provided that the supply voltage differences AVcc are respected HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling However to be totally safe it is desirable to take normal precautions appropriate to handling integrated circuits THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE TYP UNIT Rin j a thermal resistance from junction to ambient in free air 75 K W 1999 Feb 16 6 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 CHARACTERISTICS VCCA Vo to V44 Vo to Vio V3 to V4 and V41 to V40 4 75 to 5 25 V Vecp V37 to V38 and Vis to V17 4 75 to 5 25 V Veco V33 to V34 3 0 to 5 25 V AGND and DGND shorted together Tamb 0 to 70 C typical values measured at Veca Vecp 5 V and Veco 3 3 V Vilp p Vitp p 2 0 V C_ 15 pF and Tamp 25 C unless otherwise specified SYMBOL P
3. SYMBOL PARAMETER CONDITIONS Voca analog supply voltage Vocp digital supply voltage Vcco output supply voltage loca analog supply current lccD digital supply current output supply current fak 4 MHz fi 400 kHz integral non linearity fak 4 MHz fi 400 kHz DLE differential non linearity fak 4 MHz fi 400 kHz no missing codes fcik max maximum clock frequency TDA8767H 1 TDA8767H 2 TDA8767H 3 Prot total power dissipation 1999 Feb 16 2 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 ORDERING INFORMATION TYPE PACKAGE SAMPLING TDA8767H 1 gd ii n end plastic quad flat package eads TOAS EME lead length 1 3 mm body 10 x 10 x 1 75 mm corer TDA8767H 3 BLOCK DIAGRAM VCCA1 VCCA2 VYCCA3 VCCA4 CLK Vecp1 VYccD2 TC OE MSB TDA8767 Vref OUTPUTS gt data outputs Vi ANALOG TO DIGITAL VI CONVERTER LATCHES sample and hold SH LSB voco IR MBH142 AGND1 AGND2 AGND3 AGND4 DGNDI DGND2 OGND Ve NE analog ground digital ground Fig 1 Block diagram 1999 Feb 16 3 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital TDA8767 Converter ADC PINNING SYMBOL PIN DESCRIPTION SYMBOL PIN DESCRIPTION n c 1 not connected 23 data ae bit 9 Voeca3 3 analog supply voltage 3 5 V 25 data output bit 7 ease a n c 5
4. 16 19 Philips Semiconductors Argentina see South America Australia 34 Waterloo Road NORTH RYDE NSW 2113 Tel 61 2 9805 4455 Fax 61 2 9805 4466 Austria Computerstr 6 A 1101 WIEN P O Box 213 Tel 43 1 60 101 1248 Fax 43 1 60 101 1210 Belarus Hotel Minsk Business Center Bld 3 r 1211 Volodarski Str 6 220050 MINSK Tel 375 172 20 0733 Fax 375 172 20 0773 Belgium see The Netherlands Brazil see South America Bulgaria Philips Bulgaria Ltd Energoproject 15th floor 51 James Bourchier Blvd 1407 SOFIA Tel 359 2 68 9211 Fax 359 2 68 9102 Canada PHILIPS SEMICONDUCTORS COMPONENTS Tel 1 800 234 7381 Fax 1 800 943 0087 China Hong Kong 501 Hong Kong Industrial Technology Centre 72 Tat Chee Avenue Kowloon Tong HONG KONG Tel 852 2319 7888 Fax 852 2319 7700 Colombia see South America Czech Republic see Austria Denmark Sydhavnsgade 23 1780 COPENHAGEN V Tel 45 33 29 3333 Fax 45 33 29 3905 Finland Sinikalliontie 3 FIN 02630 ESPOO Tel 358 9 615 800 Fax 358 9 6158 0920 France 51 Rue Carnot BP317 92156 SURESNES Cedex Tel 33 1 4099 6161 Fax 33 1 4099 6427 Germany HammerbrookstraBe 69 D 20097 HAMBURG Tel 49 40 2353 60 Fax 49 40 2353 6300 Greece No 15 25th March Street GR 17778 TAVROS ATHENS Tel 30 1 489 4339 4239 Fax 30 1 481 4240 Hungary see Austria India Philips INDIA Ltd Band Box Building 2nd floor 254 D Dr Annie Besan
5. be determined in order to obtain a middle voltage of 2 5 V see Table 1 To ensure a sufficient analog input stability the minimum current into these resistors must be about 1 mA 3 Vret must be decoupled to Veca Fig 6 Application diagram differential input mode 1999 Feb 16 13 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital TDA8767 Converter ADC 5V SH 5V mode 220 nF INO I 509 50 Q 509 100 nF 7 44 43 42 41 40 39 38 37 36 35 34 EA CCA t i y s 2 Do LSB 47 L10 100 nF TDA8767H 5V 100 nF ON DOO FR Q oO D8 D9 kk a Vret 12 13 14 15 16 17 18 19 20 21 22 MBH146 D11 MSB chip select input OE output format select TC The analog digital and output supplies should be separated and decoupled 1 At power up a high level clock must be provided within less than 1 us or a pull up resistor must be connected between CLK and Vccp 2 R1 and R2 must be determined in order to obtain a voltage of 2 5 V on V and Vi see Table 1 To ensure a sufficient analog input stability the minimum current into these resistors must be about 1 mA 3 Vret must be decoupled to Veca Fig 7 Application diagram single input mode 1999 Feb 16 14 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital TDA8767 Converter ADC PACKAGE OUTLINE QFP44 plastic quad fla
6. not connected 27 data aut bit 5 not connected D3 29 data output bit 3 analog supply voltage 2 5 V D1 31 data output bit 1 AGND2 10 analog ground 2 data output bit 0 LSB Veco 33 output supply voltage 3 to 5 25 V n c 12 not connected output ground n c 14 not connected CLK 36 clock input digital supply voltage 2 5 V digital supply voltage 1 5 V n c 16 not connected DGND1 38 digital ground 1 sample and hold enable input TC 18 output two s complement CMOS level active HIGH output enable input analog ground 4 CMOS level active LOW a analog supply voltage 4 5 V IR 20 in range output 42 complemen analog input voltage D10 22 data output bit 10 ANA 44 analog ground 1 1999 Feb 16 4 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 3 33 33 2 YST IS STR BS a eO n c Veco Vocat DO VCCA3 D1 AGND3 D2 n c D3 ae TDA8767 D n c D5 n c D6 VCCA2 D7 AGND2 D8 Vref D9 MBH143 IR 20 n c n c n c n c TC 18 E D11 21 D10 22 Vocpe 15 DGND2 17 Fig 2 Pin configuration 1999 Feb 16 5 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital TDA8767 Converter ADC LIMITING VALUES In accordance with the Absolute Maximum Rating System IEC 134 SYMBOL PARAMETER CONDITIONS MIN MAX UNIT
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8. ARAMETER CONDITIONS MIN TYP MAX UNIT Supply Veca analog supply voltage 4 75 5 0 5 25 V digital supply voltage output supply voltage analog supply current digital supply current Icco output supply current fok 20 MHZ fi 4 43 MHz Inputs CLK REFERENCED TO DGND LOW level input voltage HIGH level input voltage LOW level input current Vek 0 3Vecp HIGH level input current Volk 0 7Vccp uA Vak Vccp uA Zi input impedance fek 30 MHz kQ Ci input capacitance fek 30 MHz pF TC SH anD OE REFERENCED TO DGND see Tables 3 and 4 V 2 z 2 ViL LOW level input voltage 0 0 8 ViH HIGH level input voltage 2 0 V lit LOW level input current Vit 0 3Vecp 400 uA liH HIGH level input current Vin 0 7Vccp 20 uA VI AND V4 REFERENCED TO AGND see Tables 1 AND 2 Vref Veca 2 V LOW level input current Vi Vi uA HIGH level input current Vi Vj input impedance fi 4 43 MHz input capacitance fi 4 43 MHz Vios d input offset voltage in Vi Vi output code 2047 differential mode Veca 5 V tbf 25 tbf y Veca 4 75 V tbf 2 25 tbf V Vcca 5 25 V tbf 2 75 tbf V Vios s input offset voltage in single Vi Vios s output mode code 2047 Veca 5V tof 2 5 tof V Voca 4 75 V tbf 2 25 tbf V Veca 5 25 V tbf 2 75 tbf V 1999 Feb 16 7 Philips Semiconductors 12 bit high speed Analog to Digital Converter ADC SYMBOL PARAME
9. INTEGRATED CIRCUITS DATA SHEET TDA8767 12 bit high speed Analog to Digital Converter ADC Preliminary specification 1999 Feb 16 Supersedes data of 1997 Jun 27 File under Integrated Circuits IC02 Philips PHILIPS Semiconductors DH LI p Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 FEATURES 12 bit resolution Sampling rate up to 30 MHz 3 dB bandwidth of 18 MHz No missing codes guaranteed 5 V power supplies Binary or two s complement CMOS outputs In range CMOS output APPLICATIONS e High speed analog to digital conversion for Video signal digitizing High Definition TV HDTV Imaging camera scanner Medical imaging Telecommunication Base station receiver TTL CMOS compatible static digital inputs e 3to 5 V CMOS digital outputs GENERAL DESCRIPTION e TTL compatible clock input The TDA8767 is a bipolar 12 bit Analog to Digital e Power dissipation 335 mW typ Converter ADC for imaging or other applications It converts the analog input signal into 12 bit binary coded digital words at a maximum sampling rate of 30 MHz All digital inputs and outputs are CMOS compatible Low analog input capacitance typ 2 pF no buffer amplifier required No external sample and hold circuit required Differential or single analog Input External amplitude range control Voltage controlled regulator included QUICK REFERENCE DATA
10. N sample N 1 sample N 2 Vj tds th HIGH XX DATA XX 9 Do to D11 NY 30 WY LOW tjy gt MBG855 Fig 3 Timing diagram YccD OE ov output data gt etaz tazL p HIGH output data TEST S1 v CCD talz Vccp 3 3kQ t V TDA8767 f S1 azL CCD 15 pF tgHz DGND ee d tYgZH DGND OE MBH144 foe 100 kHz Fig 4 Timing diagram and test conditions of 3 state output delay time 1999 Feb 16 11 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 tSTLH tSTHL al ja code 1023 VI 50 Yo code 0 5 nsl CLK 50 50 MBD875 gt 2ns 2 ns Fig 5 Analog input settling time diagram 1999 Feb 16 12 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC APPLICATION INFORMATION 5V SH 5V 220 nF jsi 7 No VI 100 Q 100 Q p 100 nF CCA nofi 44 43 42 41 40 39 38 37 36 35 34 j i f DO LSB 2 100 nF 3 ee 4 7 uF R2 4 5 D3 6 TDA8767H D4 7 D5 100 nF 8 Mi 5V 9 ss 100 nF 10 e Vref 11 S 12 13 14 15 16 17 18 19 20 21 22 MBH145 D11 MSB chip select input OE output format select TC The analog digital and output supplies should be separated and decoupled 1 At power up a high level clock must be provided within less than 1 us or a pull up resistor must be connected between CLK and Vccp 2 R1 and R2 must
11. TER CONDITIONS Preliminary specification TDA8767 Voltage controlled regulator input Vet referenced to Veca full scale fixed voltage input voltage amplitude peak to peak value Vref FS lref input current at Vref Vcca 5 V differential mode single mode V 2 5 V Outputs referenced to DGND DIGITAL OUTPUTS D11 TO DO AND IR REFERENCED TO DGND LOW level output voltage HIGH level output voltage output current in 3 state lor 2 mA loH 0 4 mA 0 5 V lt Vo lt Veco Switching characteristics CLOCK FREQUENCY fo see Fig 3 folk min minimum clock frequency SH HIGH maximum clock frequency TDA8767H 1 TDA8767H 2 TDA8767H 3 folk max clock pulse width HIGH clock pulse width LOW top Analog signal processing 50 clock duty factor Vi Vi 2 0 V Vret Veca 2 V see Table 1 LINEARITY integral non linearity fek 4 MHz ramp input differential non linearity offset error GER gain error amplitude spread from device to device fo 4 MHz ramp input no missing codes Veca Veco Veco 5 V Tamb 25 C Vj Vi output code 2047 Voca Vecp Veco 5 V Tamb 25 C Vi Vi 2 0 V BANDWIDTH fok 30 MHz note 1 analog bandwidth analog input settling time LOW to HIGH transition analog input settling time HICH to LOW transition tSTHL 1 dB 3 dB ful
12. board The footprint must incorporate solder thieves at the downstream end For packages with leads on four sides the footprint must be placed at a 45 angle to the transport direction of the printed circuit board The footprint must incorporate solder thieves downstream and at the side corners During placement and before soldering the package must be fixed with a droplet of adhesive The adhesive can be applied by screen printing pin transfer or syringe dispensing The package can be soldered after the adhesive is cured Typical dwell time is 4 seconds at 250 C A mildly activated flux will eliminate the need for removal of corrosive residues in most applications Manual soldering Fix the component by first soldering two diagonally opposite end leads Use a low voltage 24 V or less soldering iron applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE REFLOW BGA SQFP not suitable HLQFP HSQFP HSOP HTSSOP SMS not suitable PLCC SO SOJ suitable LQFP QFP TQFP not recommended SSOP TSSOP VSO not recommend
13. ed Notes 1 All surface mount SMD packages are moisture sensitive Depending upon the moisture content the maximum temperature with respect to time and body size of the package there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them the so called popcorn effect For details refer to the Drypack information in the Data Handbook IC26 Integrated Circuit Packages Section Packing Methods 2 These packages are not suitable for wave soldering as a solder joint between the printed circuit board and heatsink at bottom version can not be achieved and as solder may stick to the heatsink on top version 3 If wave soldering is considered then the package must be placed at a 45 angle to the solder wave direction The package footprint must incorporate solder thieves downstream and at the side corners 4 Wave soldering is only suitable for LQFP TQFP and QFP packages with a pitch e equal to or larger than 0 8 mm it is definitely not suitable for packages with a pitch e equal to or smaller than 0 65 mm 5 Wave soldering is only suitable for SSOP and TSSOP packages with a pitch e equal to or larger than 0 65 mm it is definitely not suitable for packages with a pitch e equal to or smaller than 0 5 mm DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development Preliminary specificat
14. fine solder particles flux and binding agent to be applied to the printed circuit board by screen printing stencilling or pressure syringe dispensing before package placement Several methods exist for reflowing for example infrared convection heating in a conveyor type oven Throughput times preheating soldering and cooling vary between 100 and 200 seconds depending on heating method Typical reflow peak temperatures range from 215 to 250 C The top surface temperature of the packages should preferable be kept below 230 C Wave soldering Conventional single wave soldering is not recommended for surface mount devices SMDs or printed circuit boards with a high component density as solder bridging and non wetting can present major problems To overcome these problems the double wave soldering method was specifically developed If wave soldering is used the following conditions must be observed for optimal results 1999 Feb 16 16 Preliminary specification TDA8767 e Use a double wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave For packages with leads on two sides and a pitch e larger than or equal to 1 27 mm the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed circuit board smaller than 1 27 mm the footprint longitudinal axis must be parallel to the transport direction of the printed circuit
15. ion This data sheet contains preliminary data supplementary data may be published later Product specification This data sheet contains final product specifications Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given it is advisory and does not form part of the specification LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale 1999 Feb 16 17 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 NOTES 1999 Feb 16 18 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 NOTES 1999 Feb
16. l scale square wave note 3 full scale square wave note 3 9 18 tbf gt HARMONICS total harmonic distortion 1999 Feb 16 fak 30 MHz fi 4 43 MHz note 2 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 SYMBOL PARAMETER CONDITIONS SIGNAL TO NOISE RATIO S N signal to noise ratio without harmonics folk 30 MHz fi 4 43 MHz Timing C 15 pF note 4 see Fig 3 tds sampling delay time 2 ns th output hold time 8 ns d t output delay time Veco 4 75 V Veco 3 15 V 1 3 state output delay times see Fig 4 5 18 tazH enable HIGH 4 18 ns taz enable LOW 20 ns taHz disable HIGH ns talz disable LOW ns Notes to the characteristics 1 The 3 dB or 1 dB analog bandwidth is determined by the 3 dB or 1 dB reduction in the reconstructed output the input being a full scale sine wave 2 THD total harmonic distortion is obtained with the addition of the first five harmonics F THD 20 log J 2 2 2 2 2nd 3rd 4th Sth 6th F being the fundamental harmonic referenced at 0 dB for a full scale sine wave input 3 The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full scale input square wave signal in order to sample the signal and obtain correct output data see Fig 5 4 Ou
17. t Road Worli MUMBAI 400 025 Tel 91 22 493 8541 Fax 91 22 493 0966 Indonesia PT Philips Development Corporation Semiconductors Division Gedung Philips JI Buncit Raya Kav 99 100 JAKARTA 12510 Tel 62 21 794 0040 ext 2501 Fax 62 21 794 0080 Ireland Newstead Clonskeagh DUBLIN 14 Tel 353 1 7640 000 Fax 353 1 7640 200 Israel RAPAC Electronics 7 Kehilat Saloniki St PO Box 18053 TEL AVIV 61180 Tel 972 3 645 0444 Fax 972 3 649 1007 Italy PHILIPS SEMICONDUCTORS Piazza IV Novembre 3 20124 MILANO Tel 39 2 6752 2531 Fax 39 2 6752 2557 Japan Philips Bldg 13 37 Kohnan 2 chome Minato ku TOKYO 108 8507 Tel 81 3 3740 5130 Fax 81 3 3740 5077 Korea Philips House 260 199 Itaewon dong Yongsan ku SEOUL Tel 82 2 709 1412 Fax 82 2 709 1415 Malaysia No 76 Jalan Universiti 46200 PETALING JAYA SELANGOR Tel 60 3 750 5214 Fax 60 3 757 4880 Mexico 5900 Gateway East Suite 200 EL PASO TEXAS 79905 Tel 9 5 800 234 7381 Fax 9 5 800 943 0087 For all other countries apply to Philips Semiconductors International Marketing amp Sales Communications Building BE p P O Box 218 5600 MD EINDHOVEN The Netherlands Fax 31 40 27 24825 Philips Electronics N V 1999 a worldwide company Middle East see Italy Netherlands Postbus 90050 5600 PB EINDHOVEN Bldg VB Tel 31 40 27 82785 Fax 31 40 27 88399 New Zealand 2 Wagener Place C P O Box 1041 AUCKLAND Tel 64 9 84
18. t package 44 leads lead length 1 3 mm body 10 x 10 x 1 75 mm SOT307 2 34 HHA ARA AAA Or pin 1 index detail X a he D Hp 4 A DIMENSIONS mm are the original dimensions A max UNIT Ay A3 bp mm 2 10 65 0 25 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION JEDEC EIAJ PROJECTION SOT307 2 E 97 08 01 ISSUE DATE 1999 Feb 16 15 Philips Semiconductors 12 bit high speed Analog to Digital Converter ADC SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found in our Data Handbook IC26 Integrated Circuit Packages document order number 9398 652 90011 There is no soldering method that is ideal for all surface mount IC packages Wave soldering is not always suitable for surface mount ICs or for printed circuit boards with high population densities In these situations reflow soldering is often used Reflow soldering Reflow soldering requires solder paste a suspension of
19. tput data acquisition the output data is available after the maximum delay of ta 1999 Feb 16 9 Philips Semiconductors Preliminary specification 12 bit high speed Analog to Digital Converter ADC TDA8767 Table 1 Output coding with differential inputs typical values to AGND Vi p p Vip p 2 0 V Vret Veca 2 V TWO S COMPLEMENT underflow lt 2 0 gt 3 0 0 000000000000 100000000000 1 000000000001 100000000001 0 2 0 3 0 J J i T J J l T 4095 3 0 2 0 1 111111111111 011111111111 overflow gt 3 0 lt 2 0 0 111111111111 Table 2 Output coding with single input typical values to AGND Ves 2 0 V p p Vret Voca 2 V TWO S COMPLEMENT BINARY OUTPUTS OUTPUTS underflow lt 1 5 0 000000000000 100000000000 1 1 000000000001 100000000001 2047 2 5 1 011111111111 111111111111 L L L L 4094 1 111111111110 011111111110 4095 3 5 1 111111111111 011111111111 Table 3 Mode selection TC OE DO to D11 and IR 0 0 binary active 0 x t 1 high impedance Note 1 Where X don t care Table 4 Sample and hold selection SH SAMPLE AND HOLD active 1 0 inactive tracking mode 1999 Feb 16 10 Philips Semiconductors 12 bit high speed Analog to Digital Preliminary specification Converter ADC HIGH CLK 50 Yo LOW sample
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