NXP Semiconductors PBLS4004D User's Manual
Contents
1. 1200 24 lg mA 24 hFE Ic BU 21 6 A 19 2 A 800 7 1 6 12 9 6 7 2 2 4 8 400 0 8 2 4 3 0 0 107 1 10 102 103 104 0 1 2 3 4 5 Ic mA Vce V Vce 2 5 V Tamb 25 C 1 Tamb 100 C 2 Tamb 25 C 3 Tamb 55 C Fig 5 TR1 PNP DC current gain as a function of Fig 6 TR1 PNP Collector current as a function of collector current typical values collector emitter voltage typical values 10 006aaa467 13 006aaa468 VBE V VBEsat V 7 1 0 9 1 0 6 2 2 0 5 3 Se 3 0 2 0 1 1071 1 10 102 108 104 1071 1 10 102 108 104 Ic mA Ic mA Voe 5 V lc lg 20 1 Tamb 55 C 2 Tamb 25 C 3 Tamb 100 C TR1 PNP Base emitter voltage as a function of collector current typical values 1 Tamb 55 C 2 Tamb 25 C 3 Tamb 100 C TR1 PNP Base emitter saturation voltage as a function of collector current typical values PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 8 o2. 6 January 2009 10 of 15 NXP Semiconductors PB LS4004D 40 V PNP BISS loadswitch 8 Package outline Dimensions in mm Q 04 11 08 Fig 17 Package outline SOT457 SC 74 9 Packing information PBLS4004D 3 Table 8 Packing methods The indicated xxx are the last three digits of the 12NC ordering code Type number Package Description Packing quantity PBLS4004D SOT457 4 mm pitch 8 mm tape and reel T1 2 4 mm pitch 8 mm tape and reel T2 3 3000 10000 115 135 125 165 1 For further information and the availability of packing methods see Section 13 2 T1 normal taping 3 T2 reverse taping NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 11 of 15 NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 10 Soldering 0 45 0 55 EZZ solder lands 0 95 6x 6 3 8 2 825 i 1 777 solder resist RSS solder paste i mun occupied area Dimensions in mm Q 2 4 sot457_fr Fig 18 Reflow soldering footprint SOT457 SC 74 m 5 3 gt EZZ solder lands omits das solder resist 072 L 2x Occupied area m Dimensions in mm
3. PBLS4004D 40 V PNP BISS loadswitch Rev 03 6 January 2009 Product data sheet 1 Product profile 1 1 1 2 1 3 1 4 General description PNP low Vcesat Breakthrough In Small Signal BISS transistor and NPN Resistor Equipped Transistor RET in a SOT457 SC 74 small Surface Mounted Device SMD plastic package Features B Low Vcesat BISS and resistor equipped transistor in one package B Low threshold voltage lt 1 V compared to MOSFET E Low drive power required E Space saving solution B Reduction of component count Applications B Supply line switches B Battery charger switches B High side switches for LEDs drivers and backlights Bi Portable equipment Quick reference data Table 1 Quick reference data Symbol Parameter Conditions Min Typ Max TR1 PNP low Vcesat transistor VcEo collector emitter voltage open base 40 lc collector current 0l 1 RceEsat collector emitter saturation Ilo 2 500 mA 12 240 340 resistance lg 50 mA TR2 NPN resistor equipped transistor VcEo collector emitter voltage open base z 50 lo output current 100 R1 bias resistor 1 input 15 4 22 28 6 R2 R1 bias resistor ratio 0 8 1 1 2 Unit mQ mA kQ 1 Device mounted on a ceramic Printed Circuit Board PCB Al2Os standard footprint 2 Pulse test tp lt 300 us 6 lt 0 02 founded by Philips NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 2 Pin
4. Zih j a K W 102 10 1 1075 10 4 1073 1072 1071 1 10 102 103 Ceramic PCB Al2Os standard footprint Fig 4 TR1 PNP Transient thermal impedance from junction to ambient as a function of pulse duration typical values T Characteristics Table 7 Characteristics Tamb 25 C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit TR1 PNP low Vcesat transistor IcBo collector base cut off Vcg 40 V ilg 20A 0 1 uA current Vcs 40 V le 0 A E 50 uA Tj 150 C IcES collector emitter Vcg 30 V Vgg 0 V 0 1 uA cut off current lego emitter base cut off Veg 5 V l 20A 0 1 uA current Nee DC current gain Vcg 5 V Ilo 1 mA 300 VcE 2 5V lc 100 mA 01 300 800 Vcg 5 V Ic 500 mA 01 215 Vce 5 V Ic 1 A 150 VCEsat collector emitter lc 100 mA lg 1 mA 80 140 mV saturation voltage 500 mA lg 50mA_ Li 120 170 mV lc 1A lg 100 mA n 220 310 mV RCEsat collector emitter lc 500 mA Ig 50 mA H 240 340 mQ saturation resistance VBesa base emitter lc 1 A Ig 50 mA n 11 V saturation voltage VBEon base emitter Vcg 5 V l 1 A 0l 1 V turn on voltage PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 6 of 15 NXP Semiconductors PBLS4004D PBLS4004D_3 Table 7 Characteristics continued Tamb 25
5. PBLS4004D 40 V PNP BISS loadswitch 006aaa038 103 1071 1 10 102 Ic mA Vcg 5V 1 Tamb 150 C 2 Tamb 25 C 3 Tamb 40 C Fig 13 TR2 NPN DC current gain as a function of collector current typical values 10 1 006aaa039 1 VcEsat V 2 3 10 2 1 10 102 lc mA lc lg 20 1 Tamb 100 C 2 Tamb 25 C 3 Tamb 40 C Fig 14 TR2 NPN Collector emitter saturation voltage as a function of collector current typical values 10 006aaa040 Vi on V LLL LLL 1 3 1071 10 1 1 10 102 Ic mA Voe 0 8 V 1 Tamb 40 C 2 Tamb 25 C 3 Tamb 100 C Fig 15 TR2 NPN On state input voltage as a function of collector current typical values 10 006aaa041 Vi off V maa yest 1 2 3 1071 107 1071 1 10 Ic mA Vcg 5V 1 Tamb 40 C 2 Tamb 25 C 3 Tamb 100 C Fig 16 TR2 NPN Off state input voltage as a function of collector current typical values PBLS4004D_3 NXP B V 2009 All rights reserved Product data sheet Rev 03
6. i preferred transport LL rms qa direction during soldering 2 85 gt sot457_fw Fig 19 Wave soldering footprint SOT457 SC 74 PBLS4004D_3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 12 of 15 NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 11 Revision history Table 9 Revision history Document ID Release date Data sheet status Change notice Supersedes PBLS4004D 3 20090106 Product data sheet PBLS4004D 2 Modifications The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors Legal texts have been adapted to the new company name where appropriate e Figure 5 9 and 10 amended Section 12 Legal information updated PBLS4004D 2 20050719 Product data sheet PBLS4004D 1 20041109 Objective data sheet PBLS4004D 1 PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 13 of 15 NXP Semiconductors PBLS4004D 12 Legal information 12 1 Data sheet status 40 V PNP BISS loadswitch Document status JI2 Product statusi Definition Objective short data sheet Development Preliminary short data sheet Qualification Product short data sheet Production This document contains data from the objective specification for product development This document contains dat
7. 14 Contents rrr 15 founded by Please be aware that important notices concerning this document and the product s described herein have been included in section Legal information NXP B V 2009 All rights reserved For more information please visit http www nxp com For sales office addresses please send an email to salesaddresses nxp com Date of release 6 January 2009 Document identifier PBLS4004D 3
8. C unless otherwise specified 40 V PNP BISS loadswitch Symbol fr Cc Parameter transition frequency collector capacitance Conditions lc 50 mA Vcr 10V f 100 MHz Vcs 10 V le i 0 A f 1 MHz TR2 NPN resistor equipped transistor IcBo IcEO lEBo hFE VCEsat Vi oft Vi on R1 R2 R1 Cc collector base cut off current collector emitter cut off current emitter base cut off current DC current gain collector emitter saturation voltage off state input voltage on state input voltage bias resistor 1 input bias resistor ratio collector capacitance Vcs 50 V le 0 A Vcg 30V lg 0A Vcg 30 V lg 0A Tj 150 C Vep 5V Ic 20A Vece 5 V Ic 5 mA lc 10 mA lg 0 5 mA Vce 5 V lc 100 uA Vcg 0 3 V Ic 5 mA Vcg 10 V le ig 0 A f 1 MHz Min 150 15 4 0 8 Ty 22 p Max 12 100 50 180 150 28 6 1 2 2 5 Unit MHz pF nA uA uA uA mV kQ pF 1 Pulse test tp lt 300 us 6 lt 0 02 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 7 of 15 NXP Semiconductors PBLS4004D 40 V PNP BISS loadswitch 006aaa465 006aaa469
9. a from the preliminary specification This document contains the product specification 1 Please consult the most recently issued document before initiating or completing a design 2 The term short data sheet is explained in section Definitions 3 The product status of device s described in this document may have changed since this document was published and may differ in case of multiple devices The latest product status information is available on the Internet at URL http www nxp com 12 2 Definitions Draft The document is a draft version only The content is still under internal review and subject to formal approval which may result in modifications or additions NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information Short data sheet A short data sheet is an extract from a full data sheet with the same product type number s and title A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information For detailed and full information see the relevant full data sheet which is available on request via the local NXP Semiconductors sales office In case of any inconsistency or conflict with the short data sheet the full data sheet shall prevail 12 3 Disclaimers General Information in thi
10. cation Limiting values Stress above one or more limiting values as defined in the Absolute Maximum Ratings System of IEC 60134 may cause permanent damage to the device Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied Exposure to limiting values for extended periods may affect device reliability Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale as published at http www nxp com profile terms including those pertaining to warranty intellectual property rights infringement and limitation of liability unless explicitly otherwise agreed to in writing by NXP Semiconductors In case of any inconsistency or conflict between information in this document and such terms and conditions the latter will prevail No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant conveyance or implication of any license under any copyrights patents or other industrial or intellectual property rights Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document and as such is not complete exhaustive or legally binding 12 4 Trademarks No
11. f 15 NXP Semiconductors PBLS4004D 40 V PNP BISS loadswitch 4 006aaa466 VCEsat V 1071 1 2 3 10 1071 1 10 102 103 104 Ic mA lc lg 20 1 Tamb 100 C 2 Tamb 25 C 3 Tamb 55 C 10 006aaa471 VcEsat V 1071 1071 1 10 10 103 104 Ic mA Tamb 25 C 1 I lg 100 2 Ic lg 50 3 lc lg 10 Fig 11 TR1 PNP Collector emitter saturation resistance as a function of collector current typical values Fig 9 TR1 PNP Collector emitter saturation Fig 10 TR1 PNP Collector emitter saturation voltage as a function of collector current voltage as a function of collector current typical values typical values 103 006aaa470 103 006aaa472 RcEsat RcEsat Q Q 102 102 10 10 1 1 10 1 10 1 107 1 10 102 103 104 1071 1 10 102 103 104 Ic mA Ic mA lc lg 20 Tamb 25 C 1 Tamb 100 C 1 Ic lp 100 2 Tamb 25 C 2 lc lg 50 3 Tamb 55 C 3 lc lg 10 Fig 12 TR1 PNP Collector emitter saturation resistance as a function of collector current typical values PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 9 of 15 NXP Semiconductors
12. ics Table 6 Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per device Rih a thermal resistance from in free air n 312 KW junction to ambient p 3 236 K W B 210 KW Per TR1 PNP low Vcesat transistor Rith i sp thermal resistance from 105 K W junction to solder point 1 Device mounted on an FR4 PCB single sided copper tin plated and standard footprint 2 Device mounted on an FR4 PCB single sided copper tin plated mounting pad for collector 1 cm 3 Device mounted on a ceramic PCB Al2Os standard footprint PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 4 of 15 NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 006aaa462 103 Zih j a K W 102 10 1071 10 5 10 4 1073 10 2 1071 1 10 102 103 FR4 PCB standard footprint Fig 2 TR1 PNP Transient thermal impedance from junction to ambient as a function of pulse duration typical values 103 006aaa463 Zth j a K W 102 10 1 1075 10 4 1073 10 2 1071 1 10 102 103 FR4 PCB mounting pad for collector 1 cm Fig3 TR1 PNP Transient thermal impedance from junction to ambient as a function of pulse duration typical values PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 5 of 15 NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 006aaa464 103
13. ning information Table 2 Pinning Pin Description Simplified outline Graphic symbol 1 emitter TR1 2 base TR1 HE HS pe o 4 3 output collector TR2 L 34 4 GND emitter TR2 4 He Hs RI R2 5 input base TR2 Ta dee 6 collector TR1 1 2 3 sym036 3 Ordering information Table 3 Ordering information Type number Package Name Description Version PBLS4004D SC 74 plastic surface mounted package TSOP6 6 leads SOT457 4 Marking Table 4 Marking codes Type number Marking code PBLS4004D R4 5 Limiting values Table 5 Limiting values In accordance with the Absolute Maximum Rating System IEC 60134 Symbol Parameter Conditions Min Max Unit TR1 PNP low Vcesat transistor VcBo collector base voltage open emitter 40 V VcEo collector emitter voltage open base 40 V VEBO emitter base voltage open collector 5 V lc collector current m 0 7 A a 0 85 A BI 1 A lom peak collector current single pulse tp lt 1 ms 2 A lg base current 0 3 A Iam peak base current single pulse tp lt 1 ms 1 A PBLS4004D_3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 2 of 15 NXP Semiconductors PBLS4004D PBLS4004D 3 Table 5 Limiting values continued 40 V PNP BISS loadswitch In accordance with the Absolute Maximum Rating System IEC 60134 Symb
14. ol Parameter Conditions Prot total power dissipation Tamb 25 C TR2 NPN resistor equipped transistor VcBo collector base voltage open emitter VcEo collector emitter voltage open base VEBO emitter base voltage open collector Vi input voltage positive negative lo output current lcM peak collector current single pulse tj lt 1 ms Prot total power dissipation Tamb 25 C Per device Prot total power dissipation Tamb 25 C Tj junction temperature Tamb ambient temperature Tstg storage temperature 1 2l 3 1 2l 3 Min 65 65 Max 250 350 400 50 50 10 40 10 100 100 200 400 530 600 150 150 150 Unit mW mW mW lt mA mA mW 1 Device mounted on an FR4 PCB single sided copper tin plated and standard footprint 2 Device mounted on an FR4 PCB single sided copper tin plated mounting pad for collector 1 cm 3 Device mounted on a ceramic PCB Al2Os standard footprint NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 3 of 15 NXP Semiconductors P B LS4004D 40 V PNP BISS loadswitch 0 8 006aaa461 Prot W 0 6 ji 2 0 4 0 2 0 0 40 80 120 160 Tamb C 1 Ceramic PCB Al2Os standard footprint 2 FR4 PCB mounting pad for collector 1 cm 3 FR4 PCB standard footprint Fig 1 Power derating curves 6 Thermal characterist
15. s document is believed to be accurate and reliable However NXP Semiconductors does not give any representations or warranties expressed or implied as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document including without limitation specifications and product descriptions at any time and without notice This document supersedes and replaces all information supplied prior to the publication hereof Suitability for use NXP Semiconductors products are not designed authorized or warranted to be suitable for use in medical military aircraft space or life support equipment nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury death or severe property or environmental 13 Contact information damage NXP Semiconductors accepts no liability for inclusion and or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and or use is at the customer s own risk Applications Applications that are described herein for any of these products are for illustrative purposes only NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modifi
16. tice All referenced brands product names service names and trademarks are the property of their respective owners For more information please visit http www nxp com For sales office addresses please send an email to salesaddresses nxp com PBLS4004D 3 NXP B V 2009 All rights reserved Product data sheet Rev 03 6 January 2009 14 of 15 NXP Semiconductors PBLS4004D 40 V PNP BISS loadswitch 14 Contents OND 1 1 1 1 T 2 3 4 5 6 7 8 9 10 11 12 12 1 12 2 12 3 12 4 13 14 Product profile 2 00 e ee eee eens 1 General description 005 1 Feat res c ek eee ee eee eet 1 Applications 0 0 eee eee 1 Quick reference data 1 Pinning information lle 2 Ordering information Lss 2 Marking siete nee ee eee ee 2 Limiting values cece eee eee 2 Thermal characteristics 4 Characteristics 0 cee eee eee 6 Package outline 0 2ee eee ee eee 11 Packing information 0 0006 11 Soldering 2 ragai bd ee dees 12 Revision history cece eens 13 Legal information Lseee 14 Data sheet status 0 0 000 ee 14 Definitions 2 5 ers p e EREGEDP p ERA x 14 Disclaimers 0c cece eee eee 14 Trademarks oz ilado si e pea ERGO 14 Contact information usss
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