Intel ATOM US15W User's Manual
Contents
1. Description Default Setting Optional Setting Reference Designator VID CPU Override4 OUT normal 15716 IN Override to 9b allow manual VID J1B1 15 16 operation I operation 10a CFGO Setting Refer to Section 4 4 J6F1 10b CFG1 Setting Refer to Section 4 4 J7F2 11 Reserved CUT c eH Reserved J7F1 operation 12 PS ON 1 2 normal operation 2 3 Reserved J7H4 5V FET Load 13 Disable 1 X OUT load 1 2 IN no load J4J1 14 ee EE 1 2 IN no load 1 X OUT load 3512 Disable NOTES 1 A jumper consists of two or more pins mounted on the motherboard When a jumper cap is placed over two pins it is designated as IN When there are more than two pins on the jumper the pins to be shorted are indicated as 1 2 to short pin 1 to pin 2 2 3 to short pin 2 to pin 3 etc When no jumper cap is to be placed on the jumper it is designated as OUT 2 When a switch is designated as 1 2 the switch slide is positioned such that pins 1 and 2 are shorted together 3 H8 Jumper programming procedure is shown in Section 4 9 Note VID Override Jumper settings are shown in Appendix B User s Manual 31 Document Number 320264 Reference Board Summary n tel 4 4 BSEL Jumper Settings The jumper settings in Table 10 are provided to accommodate frequency selection for the processor The CK 540 clock chip accepts two signals from the Intel Atom processor Table2. USB Host ports with over current detection J3A1 Top Port 4 Bottom Port 3 JAB1 8 bit SD SDIO MMC Slot 2 J5B1 4 bit SD SDIO MMC Slot 1 User s Manual 28 Document Number 320264 Reference Board Summary n tel 4 3 4 3 1 Caution Configuration Settings Configuration Jumpers Switches Do not move jumpers with the power on Switches may be moved while power is on Always turn off the power and unplug the power cord from the computer before changing jumper settings Otherwise damage to the board could occur Figure 5 shows the location of the major configuration jumpers and switches Table 9 summarizes the jumpers and switches and gives their default and optional settings The Crown Beach board is shipped with the jumpers and switches shunted in the default locations Figure 5 Location of the Configuration Jumpers Switches User s Manual Virtual Battery Switch 1 2 LID Switch 1 2 Jumper 1 x Manual VID Override 15 16 and Manual VID jumpers H8 Reset 1 2 H8 Remote Programming 1 2 BSEL2 2 3 BSEL 0 2 3 BSEL 1 23 Force Shutdown 1 2 PS ON Clear CMOS 1 2 1 x 29 Document Number 320264 Reference Board Summary Table 9 Configuration Jumper Switches Settings User s Manual intel Description Default Setting Optional Setting Reference b Designator Remote H8 1
3. 0 1 1 0 0 0 0 0 9000 0 1 1 0 0 0 1 0 8875 0 1 1 0 0 1 0 0 8750 0 1 1 0 0 1 1 0 8625 0 1 1 0 1 0 0 0 8500 0 1 1 0 1 0 1 0 8375 0 1 1 0 1 1 0 0 8250 0 1 1 0 1 1 1 0 8125 0 1 1 1 0 0 0 0 8000 0 1 1 1 0 0 1 0 7875 0 1 1 1 0 1 0 0 7750 0 1 1 1 0 1 1 0 7625 0 1 1 1 1 0 0 0 7500 0 1 1 1 1 0 1 0 7375 0 1 1 1 1 1 0 0 7250 0 1 1 1 1 1 1 0 7125 1 0 0 0 0 0 0 0 7000 1 0 0 0 0 0 1 0 6875 1 0 0 0 0 1 0 0 6750 L 0 0 0 0 1 1 0 6625 1 0 0 0 1 0 0 0 6500 1 0 0 0 1 0 1 0 6375 1 0 0 0 1 1 0 0 6250 1 0 0 0 1 1 1 0 6125 1 0 0 1 0 0 0 0 6000 1 0 0 1 0 0 1 0 5875 1 0 0 1 0 1 0 0 5750 51 Document Number 320264 Quick Start User s Manual VID6 VID5 VID4 VID3 VID2 VID1 VIDO Vcc V 1 0 0 1 0 1 1 0 5625 1 0 0 1 1 0 0 0 5500 1 0 0 1 1 0 1 0 5375 1 0 0 1 1 1 0 0 5250 1 0 0 1 1 1 1 0 5125 1 0 1 0 0 0 0 0 5000 1 0 1 0 0 0 1 0 4875 1 0 1 0 0 1 0 0 4750 1 0 1 0 0 1 1 0 4625 1 0 1 0 1 0 0 0 4500 1 0 1 0 1 0 1 0 4375 1 0 1 0 1 1 0 0 4250 1 0 1 0 1 1 1 0 4125 1 0 1 1 0 0 0 0 4000 1 0 1 1 0 0 1 0 3875 1 0 1 1 0 1 0 0 3750 1 0 1 1 0 1 1 0 3625 1 0 1 1 1 0 0 0 3500 1 0 1 1 1 0 1 0 3375 1 0 1 1 1 1 0 0 3250 1 0 1 1 1 1 1 0 3125 1 1 0 0 0 0 0 0 3000 52 Document Number 320264 Quick Start in tel Appendix C External Features C 1 External Feature Locations The section describes the modifications that directly support the
4. H8S JTAG Programming Headers The microcontroller firmware for system management keyboard mouse control can be upgraded in two ways 1 By use of a special MS DOS utility in circuit 2 By use of an external computer connected remotely to the system through the serial port on the board H8 In System Programming If the user chooses in system programming of the Crown Beach board ensure that the following files are available on the DOS bootable media 1 EC xx bin EC application 2 Fcntl bin Renesas Technology flash algorithm data file 3 Kscflash exe downloader Boot to a DOS environment on the Crown Beach machine and type kscflash ec xx bin to begin programming the EC H8 Remote Programming If the user chooses to use an external computer remote programming connected to the system through the serial port there are three jumpers that must be set correctly Refer to Table 9 for a summary of these jumpers and refer to the Crown Beach schematic for the location of each jumper The sequence of events necessary to program the H8 is as follows 36 Document Number 320264 Reference Board Summary n tel UE Dr T 9 Extract all files keep them in the same folder to a single directory of your choice on the host machine or on a floppy disk recommended Connect a NULL modem cable to the serial ports of each platform host and unit to be flashed With the board powered off move the jumpers listed
5. m Ca ey Scan Matrix EN sovo EC Keyboard ce H SO DIMM conni q Y MDC Interposer b Ka HD Audio que XDP SMC JTAG Mini PCle Mini PCle SIM E Slot niin g PATA HR Power Reset ATX Power LPC Slot ower Button Button Note The actual labeling on the board is Port 80 and 81 4 2 Connectors Many of the connectors supply operating voltages of 5V DC and 12V DC to devices inside the computer chassis such as fans and internal peripherals Caution Most of these connectors are not over current protected Do not use these connectors for powering devices external to the computer chassis A fault in the load presented User s Manual 27 Document Number 320264 Reference Board Summary intel by the external devices could damage the computer the interconnecting cable or the attached external device 4 2 1 Back Panel Connectors This section describes the board s connectors Figure 4 shows the location of the back panel connectors on the board Figure 4 Back Panel Connectors J1A2 41A1 J2A1 J3A1 J4B4 PSI 2 Stack USB Client USB USB SDIO Slot Stack Stack Note Connector J1A1 USB Client is a USB 2 0 Mini B connector Table 8 Back Panel Connectors Ref Des Description Back Panel Connector PS 2 connector J1A2 Top Mouse Bottom Keyboard J1A1 USB Client connector Port 2 USB Host ports with over current detection J2A1 Top Port 0 Bottom Port 1
6. po USB 1 120 LPC 33Mz SMC KSC 88 1 1 2 0 usBI Port 80 83 CPU amp SCH XDP PCIE SLOT 0 PCIE SLOT 1 MINI PCle SLOT2 SOO MMC CE ATA CE ATA SLOTO SDIO SLOTO SDIO SLOT1 SDIO SLOT2 11 Document Number 320264 Crown Beach Board m tel Figure 2 Crown Beach Board Top View oo 66 bo owi E E 2 1 Getting Started This section identifies the key components features and specifications of the Intel Atom processor with Intel System Controller Hub US15W Development Kit It also describes how to set up the board for operation Development software is included in the kit User s Manual 12 Document Number 320264 Crown Beach Board intel Note This manual assumes a familiarity with basic concepts involved with installing and configuring hardware for a PC 2 2 Overview The development kit contains a baseboard with an Intel Atom processor Z530 Intel System Controller Hub US15W other system board components and peripheral connectors Note The evaluation board is shipped in a closed chassis The user is required to observe extra precautions if the user opens the chassis for any reason Note Review the document provided with the Development Kit titled Important Safety and Regulatory Information This document contains additional safety warnings and cautions 2 3 Major Features Table 3 is a list of the major features for the customer reference board Table
7. 3 V PCIe 22 sloti 3 3 V V3 3 SLOTS V3 3S PCIE SLOT1 R8C5 1 slot 1 PCIe 0 01 3 3 V AUX PCIe 22 slotO 3 3 V V3 3 V3 3 PCIE SLOTO R8C6 1 slot O PCIe 0 01 3 3 V AUX PCIe 22 sloti 3 3V V3 3 V3 3 PCIE SLOT1 R8C7 1 slot 1 0 01 5 V USB Port 6 23 USB 5V V5 V5_USB_P6_P7 R6H2 1 and 7 0 01 23 USB DV V5 V5 USB P5 R6H3 1 5 V USB Port 5 0 01 24 CK540 3 3 V V3 3S V3 3S_CK505 R8U1 1 3 3 V CK505 V3 3S_SDIO_ 0 01 25 SDIO1 3 3 V SLOT1 V3 3S SDIO1 R5M1 1 3 3 V SDIO 1 V3 3S SDIO 0 01 25 SDIOO 3 3 V SLOTO V3 3S SDIOO R6N1 1 3 3 V SDIO 0 V3 3S SDIO 0 01 25 SDIO2 3 3 V SLOT2 V3 3S SDIO2 R4B1 1 3 3 V SDIO 2 H8 0 01 3 3 V 27 Keyboard 3 3 V V3 3A V3 3A KBC R7E2 1 KEYBOARD 0 01 5 V HD 31 HD Conn 5V V5S V5S_PATA R3J1 1 Connector 5 V USB Port 0 0 01 and 1 Back 32 USB 5V V5 V5 USB PO P1 R2N1 1 Panel 5 V USB Port 3 0 01 and 4 Back 32 USB 5V V5 V5 USB P3 P4 R3N1 1 Panel User s Manual 24 Document Number 320264 Power Management em pe 9 gt o c L3 o gt 9 Du 2 a 2 G ri a EL 2970 e E 2 u m e z U o G 7 9 300 v 5 gt n ec ec ec nar 1 05 V Dual VR 1 gt 1 05 V V1 05S VTT Dual VR 0 01 V1 05S VTT C 33 2 12V V12S V1 05B_INPUT R5G1 1 PU 1 05 V Dual VR 2 gt 1 05 V V1 05S SCH Dual VR 0 01 V1 05S SCH 33 1 12V V12S V1 05A_INPUT R5V9 1 VCORE 1 8 V VR 0 01 1 8 V VR 1 36 1 12V V12
8. EFI firmware and driver updates 7 Document Number 320264 Introduction In tel Note Not all peripherals listed will be included with a Crown Beach board 1 2 Terminology Term Definition ACPI Advanced Configuration Power Interface ADD2 Advanced Digital display 2 card ADD2R Advanced Digital display 2 card with PCI E graphics lane reversed not supported on Crown Beach CRB Customer Reference Board BGA Ball Grid Array DDR Double Data Rate DMA Direct Memory Access Duck Bay 3 PCI Express interposer card that provides ExpressCard support for Crown Beach CRB EFI Extensible Firmware Interface FAE Field Application Engineer FSB Front Side Bus FWH Firmware Hub GPIO General Purpose Input Output IDE Integrated Device Electronics IEGD Intel Embedded Graphics Driver IMVP Intel Mobile Voltage Positioning Intel HD Audio Intel High Definition Audio Mott Canyon 4 This Add in Card enables Intel HD Audio functionality Intel SCH Intel System Controller Hub ITP In Target Probe JEDEC Joint Electron Device Engineering Council KBC Keyboard Controller LAN Local Area Network LED Light Emitting Diode LPC Low Pin Count LVDS Low Voltage Differential Signaling MDC Mobile Daughter Card User s Manual 8 Document Number 320264 Introduction Term Definition OS Operating System PATA Parallel AT Atta
9. Subsystem Descriptions o sg ege inen eese kun See EE EENS ENER Ra Pia RR Rede 16 2 5 1 Intel SCH Chipset uge aaa g ng ete rhe hak dE e EENS dE dee dee L 2 5 2 System MEMORY EE 16 2 5 3 MIO 16 2 5 4 PCI Express Slots iei e ege EE QR EE EE 17 2 5 5 Soft Audio Soft Modem 17 2 5 6 PATA StO ra GG assassinada PE 18 2 5 7 USB Connectors aaa gd ea ins a hasa a Sumur natas 18 2 5 8 Heec tcc 18 2 5 9 System Management Controller SMC Keyboard Controller KBC 18 2 5 10 EFI Firmware Hub WH 19 2 5 11 Trusted Platform Module TPM Header 19 20 12 SD SDIO MME seeders site ebe e ENEE eeh e 19 2 5 13 COCKS sistit EE 19 2 5 14 Real Time Clock ssesamanimenio cits tas ve e pra RUNDEN UR Ur EE 19 2 5 15 In Target Probe ITP and Debug Support 20 2 5 16 Power Supply Solution 20 2 5 17 Board SiZe EE 20 2 5 18 Board Technology SEN RERENERERENRENEN ENNEN RENE NER NENNEN ENN sa n nana 20 Power Management seas uuu un er lisa awa enira ea aaa nea a paha anaq Ea a Pa NEE SEENEN praga NEE ENEE dia 21 3 1 Power Measurement Support nemen 21 Reference Board Summary u u en tulio vente Saa ENEE SNE EEN SEENEN SEENEN ENEE a nano 27 4 1 Crown Beach Board Features RENE ENKER EENE NENNEN nenas satus aka pus n dana 27 4 2 E elle ee ER 4 2 1 Back Panel Connectors geen geg gue ern ANEN MENSTER docas SEN dadas er a
10. V12 1 8 INPUT R5C16 1 gt V1 8 0 9 V VR 0 01 1 8 V VR 2 36 2 12V V0 9S V0 9S_DDR2 R5R2 1 gt V0 9 0 01 1 5 V VR gt 38 1 5 V VR 3 3 V V3 3S V3 3S_1 5_INPUT R5F18 1 V1 5S 0 002 39 3 3 V VR 3 3 V V3 3A 51120VBST2_LR R4G14 1 3 3 V VR 0 01 39 3 3 V VR 3 3 V V12A V12A 3 3A INPUT R3W1 1 3 3 V VR 0 01 39 5 V VR 5V V12A V12A 5A INPUT R4W4 1 5 V VR 0 002 39 5V VR 5V V5A 51120 V5A MBL QL R4H3 1 5 V VR Intel 0 01 41 MVP 6 5V V5S V5S_IMVP_IN R3C9 1 Intel MVP 6 42 Intel 12V V12S CPU V12 CPU PHASE R2R8 0 002 Intel MVP 6 MVP 6 5 0 002 44 ATX Conn 12V V12A V12_ATX R1J3 5 12 V ATX conn 0 01 45 S4 5V V5 V5A R4G9 1 5 V S4 0 01 45 S4 3 3 V V3 3 V3 3A R4G12 1 3 3 V S4 0 002 45 S3 5V V5S V5A R4F4 1 5 V S3 0 01 45 S3 3 3 V V3 3S V3 3A R4G10 1 3 3 V S3 User s Manual 25 Document Number 320264 Power Management em User s Manual 4 9 gt 7 c ES L3 o gt 9 8 Du E a 2 G ri a EL 2970 e E 2 tm u e z U o o mg 7 H 300 Ri 5 gt n ec ec ec nar 0 01 45 S3 12V V12S V12S CPU R1H2 1 12 V S3 8 26 Document Number 320264 Reference Board Summary 4 Reference Board Summary 4 1 Crown Beach Board Features Figure 3 Crown Beach Board Feature Placement LID Virtual Battery Port 80 83 SDIO MMC USB 2 0 USB 2 0 Switch Slots Double Stack Mini B PS2 Switch External Port 80 83 conn VID TPM Header WT ome E
11. and observe proper safety cautions and warnings The following sections summarize the necessary hardware and power on instructions Caution Always turn off the power and unplug the power cord before entering protective chassis The user is required to observe extra precautions when handling and operating the system Note Review the document provided with the Development Kit titled Important Safety and Regulatory Information This document contains addition safety warnings and cautions 5 1 Required Peripherals e DDR2 400 or 533 MHz SDRAM SO DIMM e ATX power supply e Keyboard and mouse e Hard drive e Hard drive cable e Graphics option Note PCI Express and ADD2N VGA output provided graphics card Quick Start options are not included in this document User s Manual 39 Document Number 320264 Quick Start in tel 5 2 Graphics Assembly LVDS Panel Figure 9 Samsung 15 inch 381 00 mm Panel LCD Panel mm uuo EZ BT us User s Manual 40 Document Number 320264 Quick Start in tel Complete the following steps to operate the reference board with the Samsung 15 inch 381 00 mm 1024 x 768 LTN150XG LO8 Panel These steps will change if using different displays Step 1 Remove the Orange Yellow tape from the Crown Beach Board Figure 10 Crown Beach Board Lnd 6 1 4g A v 3 User s Manual 41 Document Number 320264 Quick Start in tel Step 2 Att
12. card to a 2 x 8 header J9E2 and 2 x 4 header J9E3 on Crown Beach e Intel HD Audio MDC cards may require sideband signal cables for proper operation e Headers on the Mott Canyon 4 card are provided for both modem and audio sideband signals For additional information see Sheet 21 of the Crown Beach schematics User s Manual 46 Document Number 320264 Quick Start in tel Figure 12 Mott Canyon 4 Interposer Card Audio Jacks Ribbon Cable PCIe Slot Crown Beach A 1 1 Jumper Settings The Mott Canyon 4 Interposer card can select either Primary or Secondary Intel HD Audio functionality for MDCO and MDC1 connectors with two jumper options J16 and J25 In Intel HD Audio mode MDCO is designed to house the primary codec usually audio but could be modem if there is no audio and if necessary MDC1 is designed to house the modem codec MDC2 supports an Intel HD Audio modem only codec The Intel SCH supports up to two SDATA IN channels 0 1 Two jumpers J27 and J28 are used to select the appropriate SDATA IN channels for each of the MDCs Be aware that SDATA IN channels 1 and 2 can be also overridden through jumpers on the evaluation platform If either SDATA IN1 or SDATA IN2 are not shunted properly on the evaluation platform these lines are not available to the Mott Canyon 4 Interposer card Proper operation of the Intel HD Audio interface requires that only one SDATA IN line is routed
13. default Table 12 PCI Express Slot 1 Board Rework to Enable Functionality To enable PCI Express Slot 1 J8C1 Mini Card A J7H1 must be redirected to Slot 1 Rework Enable Slot 1 Populate O Ohms R6D2 R6D4 I mpacted components Comments Remove R6D1 R6D3 R6E2 R6E3 R8F19 R8F21 Rework provides proper connectivity for PCI Express Slot 1 Refer to the Mini Card A sheet of the Crown Beach Schematics and ee layout for details Populate 33 Ohms R8F22 R8F20 User s Manual 35 Document Number 320264 Reference Board Summary n tel 4 8 2 Mini Card B connector J 2G1 is disabled by default To enable the port for Mini Card B J2G1 PCI Express Slot O J7C1 and USB Port O J2A1 devices must be redirected to the Mini Card B connector Table 13 Mini Card B Board Rework to Enable Functionality Rework I mpacted components Comments Enable Mini Card B Rework provides proper USB and SIM card connectivity for wireless WAN cards from Sierra Wireless and Option only However Remove R2B2 R2B4 there are a significant number of additional Populate R2B3 R2B5 R8Y7 no stuff components that must be populated R8W19 R8Y2 R8Y1 for full functionality Refer to the Mini Card B R8W22 sheet of the Crown Beach Schematics for details USB Port 0 functionality through connector J2A1 is disabled when Mini Card B is enabled 4 9 4 9 1 4 9 2 User s Manual
14. 10 BSEL Jumper Settings Processor Intel SCH CPU Override Graphics e J8G3 gt 1 2 a Processor driven J9G3 gt 1 2 No override See note 400 J8635 Open CPU BSEL 1 0 J6F1 gt 2 3 FSB Host CLK 100 MHz J9G32 2 3 CPU BSEL 2 1 J7F2 gt 2 3 Speed MHz Default J8G3 gt Open CPU BSEL 1 0 J6F1 gt 1 2 533 J9G3 gt Open CPU BSEL 2 0 J7F2 gt 2 3 Host CLK 133 MHz NOTE Jumpers J7F2 and J6F1 must be set according to the FSB frequency to ensure 200 MHz operation 4 5 Manual VID Support for CPU User s Manual Note The Crown Beach supports manual VID operation for the processor VR A header J1B1 is provided to incorporate VID override VID override allows for overriding the CPU VID outputs to the CPU VCC CORE VR The intent of the VID override circuit is to enable debugging and testing See Appendix B for the VID code table When manually overriding the VID outputs an open jumper position will result in logic 1 on the corresponding VID signal Closing the jumper position will result in logic O on the corresponding VID signal 32 Document Number 320264 Reference Board Summary n tel Figure 6 Crown Beach Manual VID p A E H MOTUUM UTI vD amp VID 5 VID 4 Jumpe 0 VID 3 Open 1 2 ES VID 1 O VID select Jumper Manual Open CPU 4 6 Power On and Reset Push Buttons The Crown Beach board has two pushbuttons POWER and RESET The P
15. 2 Short to J8E1 1a a Open 3 Programming program H8 J8E4 Remote H8 e a 1b Programming 1 2 normal operation Se EE Unit 3804 BB PROG 1 2 UP normal 2 3 DOWN Virtual operation Battery switch is pulled a Virtual Battery switch low This enables the 2 Eu Battery is pulled high virtual battery and the SW8A1 disabled The system system acts as if it is acts as if itis running running from a battery on AC power Source 1 x OUT normal nud iS operation switc condition 3 ea i System will always act J8A1 amp Virtual battery status as if it is running from a is controlled by SW9A2 battery source 1 x OUT normal 1 2 IN Override 4 Lid Jumper operation switch condition pulled J9A1 No effect on circuit low 1 2 UP normal operation e 5 Lid Switch o 2 3 DOWN LID SW9A1 LID switch is pulled switch is pulled low high 6 Clear RTC 1 x OUT normal 1 2 IN to clear CMOS J4H1 operation 7 Force Shutdown No Stuff Reserved J7G1 8a BSELO Setting No Stuff Reserved J8G2 2 OUT 400 MHz 8b BSEL1 Setting EE BSEL J8G3 Select OUT 533 MHz 2 2 3 400 MHz 8c BSEL2 Setting Leet 3963 Select OUT 533 MHz Manual VIDs IN normal operation VID 6 1 2 1 2 VID 5 3 4 3 4 OUT Refer to 9a pue B GE SS Section 4 5 and J1B1 7 E Appendix B VID 2 9 10 9 10 a VID 1 11 12 11 12 VID 0 13 14 13 14 30 Document Number 320264 Reference Board Summary intel
16. 3 Crown Beach Feature Set Summary Crown Beach Board Comments Implementation osso Intel Atom processor zen 0 55 X 0 52 inch 14 X 13 mm FCBGA Processor with 512KB L2 cache package with 0 0024 inch 0 6 mm ball pitch and 441 pins CPU Voltage Intel Mobile Voltage Positioning 1 Phase Regulator 6 Intel MVP6 0 87 x 0 87 inch 22 X 22 mm FCBGA Chipset Intel SCH US15W package with 0 0024 inch 0 6 mm ball pitch and 1249 pins Board High Density Interconnect Type eier PTS Technology IV 1 6 1 stackup ee HATX 9 6 x 10 4 inch 243 84 x P Board Size 264 16 mm Doubled sided placement Single top side SO DIMM _ Memory connector for single channel Supports up to 2GB of System memory 8 SDRAM devices max single or dual rank One x16 single channel SDVO No integrated VGA support is available Graphics card slot Supports ADD2N cards on the Crown Beach CRB One LVDS Connector VGA supported through ADD2N Card User s Manual 13 Document Number 320264 Crown Beach Board n tel I Crown Beach Board Comments Implementation Single 24 bit LVDS interface Through a 50 pin cable up connector LVDS options Back Light Inverter BLI and separate cables required for each LED backlight support display supported TSSOP 64 pinspackage Main Clock CK540 Integrated CK SSCD and clock expansion buffer ATA Storage PATA66 100 One desktop PATA connector 4 back panel connectors ePorts 1 0 and 4 3 3 cable up ePorts 5 a
17. Crown Beach CRB motherboard and the general chassis information C 1 1 External Feature Location Front of Chassis Figure 13 Front Chassis View 1 Power switch 2 Power LED 3 HDD Activity LED 4 Reset switch User s Manual 53 Document Number 320264 Quick Start in tel 5 DVD ROM Drive C 1 2 External Feature Location Rear of Chassis Figure 14 Rear Chassis View with Board Installed 1 PS 2 mouse port 2 USBC port 3 2 Dual stack USB USB 2 0 ports 4 SDIO ports 5 PS 2 keyboard port User s Manual 54 Document Number 320264
18. Intel Atom Processor and Intel System Controller Hub US15W Development Kit User s Manual July 2008 Document 320264 Revision 1 0 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS NO LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS OTHERWISE AGREED IN WRITING BY INTEL THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them The information here is subject to change without notice Do not finalize a design with this information The products described in t
19. L6448BC26 08D 9 0 inch NEC 228 60 mm 800 x 480 2 CCFL 15x9 N8048BC24 06 Crown Beach Board intel 11 1 inch 281 94 mm 1366 x 768 CCFL 16x9 LTD111EXCS 15 4 inch Samsung 391 16 mm 1280 x 800 CCFL 15x9 LTN154X5 LO6 NOTE The protective tape on top of the Crown Beach LVDS connector must be removed prior to installing an LVDS cable NOTE VGA output is not directly supported Customers can use PCI Express based discrete external 3D graphics cards or a third party component available on an ADD2N card using the SDVO interface 2 5 4 PCI Express Slots e Two PCI Express slots x1 for add in cards e The PCI Express bus complies with the PCI Express Rev 1 0a specification Crown Beach provides two PCI Express Mini Card form factor slots The PCI Express specification pin out is followed by Mini Card Slot A only and not by Mini Card Slot B Mini Card Slot A is enabled by default and to enable Mini Card Slot B rework needs to be performed The slots are not to be used with PCI Express Mini Card based devices Mini Card A J7H1 is designed for use with CM100 CM101 cards from Quanta Mini Card A can be populated with the Kedron Echo Peak or Shirley Peak wireless cards Mini Card B J2G1 is designed for use with Wireless WAN cards from Sierra Wireless and Option 2 5 5 Soft Audio Soft Modem High Definition Soft Audio Soft Modem functionality is enabled through the Mott Canyon 4 daughter card No direct connection is pr
20. OWER button releases power to the entire board causing the board to boot The RESET button forces all systems to warm reset The two buttons are located near the ATX Power connector The POWER button is located at SW3J1 and the RESET button is located at SW2J1 See Figure 7 Figure 7 Crown Beach Power On and Reset Buttons ATH Power User s Manual 33 Document Number 320264 Reference Board Summary 4 7 LEDs intel Figure 8 reveals the location of the LEDs and Table 11 describes the function of the LEDs and their reference designators Table 11 Crown Beach LEDs Function Reference Designator 1 Keyboard number lock CR8E2 2 Keyboard scroll lock CR8E3 3 Keyboard caps lock CR8E1 4 System State S0 CR8E7 5 System State S3 Cold CR7E1 6 System State S4 S5 CR8E5 7 PATA Activity CR6J1 8 VID Setting 0 CR1C1 9 VID Setting 1 CR1C2 10 VID Setting 2 CR1D1 11 VID Setting 3 CR1D2 12 VID Setting 4 CR1D3 13 VID Setting 5 CR1D4 14 VID Setting 6 CR1D5 User s Manual 34 Document Number 320264 Reference Board Summary n tel Figure 8 Crown Beach LEDs Ip PCle PCle Keyboard BA Um z me AN Num Lock id 50 DIMM Conn Z G Scroll ve d Caps Lock 1 A Power management SO S3 S4 S5 PATA Activity LED 4 8 4 8 1 PCI Express X1 Slots and Mini Card Connectors Mini Card A connector J7H1 is enabled by
21. V V1 5S V1 5S MINIPCIE R7W9 1 1 5 V mini PCle 0 01 3 3 V aux mini 14 mini PCle 3 3 V V3 3 V3 3 MINIPCIE R9F1 1 PCle 0 01 15 SDVO 3 3 V V3 3S V3 3S_SDVO R7C1 1 3 3 V SDVO 0 01 16 SDVO 12V V12S V12S SDVO R7B3 1 12 V SDVO 17 LVDS 3 3 V V3 3S V3 3S_LVDS_DDC R5V21 0 01 3 3 V 1 LVDS_DDC 0 01 5 V 17 LVDS 5V V5S V3 3S LVDSBKLT R5V14 196 LVDS BCKLT 0 01 12 V 17 LVDS 12V V12S V12S LVDSBKLT R5V17 1 LVDS BCKLT 0 01 3 3 V 17 LVDS 3 3 V V3 3S V3 3S LVDS VDL R5V28 1 LVDS VDL 0 01 18 SO DIMM 1 8V V1 8 V1 8_ DIMM R6R2 1 SO DIMM_DDR2 0 01 20 FHW 3 3 V V3 3S V3 3S_FWH R7H5 1 3 3 V FWH 0 01 5 V TPM 21 TPM 5V V5 V5 TPM R8N4 1 HEADER 0 01 3 3 V TPM 21 TPM 3 3 V V3 3 V3 3A TPM R8P2 1 HEADER MDC 0 01 3 34 MDC 21 Audio 3 3 V VCCHDA VCCHDA R R8U3 1 HEADER MDC 1 5 V 0 01 1 5 V 3 3 V 21 Audio 3 3V V1 5S V3 3S VCC MDC R9E1 1 MDC HEADER User s Manual 23 Document Number 320264 Power Management em pe 9 gt D c L3 o gt 9 8 Du E a 2 G ri a EL 2 90 e E 2 tm u e z U o o 3 G 9 9 300 u 9 gt Uu E E E vor 0 01 3 3 V TPM 21 TPM 3 3 V V3 3S V3 3S_TPM R8P1 1 HEADER PCIe 0 01 22 slotO 12V V12 SLOTS V12S PCIE SLOTO R8B1 1 12 V PCIe slot O PCIe 0 01 3 3 V PCIe 22 slotO 3 3 V V3 3 SLOTS V3 3S PCIE SLOTO R8C2 1 slot O PCIe 0 01 22 sloti 12V V12 SLOTS V12S PCIE SLOT1 R8B3 1 12 V PCIe slot 1 PCIe 0 01 3
22. ach the LVDS cable to the Samsung panel and Crown Beach Board Figure 11 LVDS Cable Connected to the Crown Beach Board Wy User s Manual 42 Document Number 320264 Quick Start intel Step 3 Connect the Back Light Inverter BLI to the Samsung panel and LVDS cable Step 4 In the Firmware Configuration Menu go to Chipset gt North Bridge Configuration Boot Display Configuration gt Flat Panel Type to 1024x768 Samsung 15 inch 381 00 mm 5 3 Power Up Complete the following steps to operate the reference board 1 Place a DDR2 SO DIMM in memory socket J6D1 2 Install or verify the configuration jumpers as shown in Section 4 3 1 3 Verify presence of RTC battery in Battery Holder at XBT5H1 4 Plug in an ATX power supply into connectors J3J2 and J1J1 the connectors are keyed and will only fit in one position 5 Connect a hard drive to connector J4J3 using a PATA cable red stripe toward pin 1 Connect ATX power to hard drive 6 Connect a PS 2 keyboard to connector J1A2 bottom 7 Connect a PS 2 mouse to connector J1A2 top Note You can reverse the connections of the keyboard and mouse 8 Ifinternal graphics are not used plug a PCI Express Graphics card in the PCI E x1 slot J7C1 and connect a monitor to the card User s Manual 43 Document Number 320264 Quick Start intel Note VGA output is provided by using the ADD2N card on the SDVO port Note The following
23. attery support is provided through switch SW8A1 Use an ATX12V 1 1 specification compliant power supply regardless of supplier or wattage level an ATX12V rating means V5 min current 0 1 A ATX V5 min current 1 0 A among other differences For example the Sparkle Model No FSP300 60BTV meets this requirement and is an ATX12V 1 1 spec compliant power supply Depending on the power supply used Crown Beach may require a load Crown Beach provides FETS to assist with this loading through jumpers J4J1 and J5J2 see Table 9 for jumper settings If the power switch on the ATX power supply is used to shut down the system wait at least 5 seconds before turning the system on again The recommended way to shut down the board is to press and hold the power button switch SW3J1 for 5 seconds until the power supply turns off Using the power supply switch or pulling the plug out of the wall is not recommended Board Size The reference board form factor is similar to the uATX 9 6 x 10 4 inch 243 84 x 264 16 mm specification The back panel jacks may not conform to ATX specifications Board Technology The Crown Beach reference board uses fine pitched BGA packages down to 0 0024 inch 0 6 mm pitch Type IV high density interconnect technology is required for breakout purposes and implemented using a 1 6 1 stack up 8 layers total 8 20 Document Number 320264 Power Management n tel 3 Power Management 3 1 Power Measur
24. chment PC Personal Computer PCB Printed Circuit Board PCIe PCI Express PEG PCI Express Graphics PLL Phase Lock Loop PGA Pin Grid Array RTC Real Time Clock SCH System Controller Hub SD Secure Digital SDVO Serial Digital Video Output SIO Super Input Output SMC System Management Controller SO DIMM Small Outline Dual In line Memory Module TPM Trusted Platform Module TSSOP Thin Shrink Small Outline Package USB Universal Serial Bus VGA Video Graphics Array VID Voltage Identification VR Voltage Regulator XDP Extended Debug Port 1 3 Technical Support Support Services for your hardware and software are provided through the secure Intel Premier Support Web site at https premier intel com After you log on you can obtain technical support review What s New and download any items required to maintain the platform Support is provided through the following product Dev Kit Embedded Atom US15W 1 3 1 Additional Technical Support If you require additional technical support please contact your field sales representative or local distributor User s Manual 9 Document Number 320264 Introduction 1 4 Product Literature Table 1 Intel Literature Centers U S and Canada 1 800 548 4725 U S from overseas 708 296 9333 Euro
25. d MMC rev4 0 specification compliant e All ports operate to 48 MHz Ports O and 1 support 4 bit operation Port 2 supports 8 bit operation e Slot 2 is also routed with stuffing options to the PCI Express Mini Card for wireless solutions Clocks The Crown Beach CRB uses a CK 540 clock solution The BSEL 2 1 signals driven by the processor are used by the CK 540 to configure the FSB frequency Real Time Clock An on board battery maintains power to the real time clock RTC when in a mechanical off state G3 state 19 Document Number 320264 Crown Beach Board intel 2 5 15 Note Note 2 5 16 Note Note Note 2 5 17 2 5 18 User s Manual I n Target Probe ITP and Debug Support Crown Beach provides on board ITP support with an XDP connector Users can debug from the reset vector without EFI or OS dependency up to OS functionality Ports 80 83 are provided as a troubleshooting tool to monitor POST output during EFI execution ITP requires that the CMC load to configure Poulsbo before register accesses can be made The CMC code resides in the FWH on Crown Beach Thus it is required that the FWH flash be programmed and inserted in the FWH socket to use ITP Crown Beach does not support ITP 700 Power Supply Solution Crown Beach can be powered from an ATX power supply desktop solution that contains all of the voltage regulators necessary to power the system up Additionally virtual b
26. day aswaa yaq ga akha Na 49 Intel MVP 6 VID Codes uu ENEE ge EEN he rtp rx e ka REES es KERN ra ERE NE Gra ana 50 External Feat res us uu See EERSTEN ER External Feature Locations iu isis EN ss dE ERENNERT EEN ENNER dE EEN dadas qd amaro 53 External Feature Location Front of Chassis 53 External Feature Location Rear of Chassis 54 4 Document Number 320264 Figures Figure 1 Crown Beach Board Block Diagram emen 11 Figure 2 Crown Beach Board Top View 12 Figure 3 Crown Beach Board Feature Placement r 27 Figure 4 Back Panel Connectors uu NK NENNEN NEEN NENNEN NENNEN NEEN RENE ERAN 28 Figure 5 Location of the Configuration Jumpers Switches 29 Figure 6 Crown Beach Manual VIDE 33 Figure 7 Crown Beach Power On and Reset Buttons 33 Figure 8 Crown Beach LEDS 23 ioi inen deg eA Nee taa a sa a psa s kA Ar Ya ee REP iuda d 35 Figure 9 Samsung 15 inch 381 00 mm Panel emen 40 Figure 10 Crown Beach Board 41 Figure 11 LVDS Cable Connected to the Crown Beach Board 42 Figure 12 Mott Canyon 4 Interposer Card cssssssssssssseeenemememenn enne 47 Figure 13 Front Chassis View sis iiec iesu EHNEN secu sa eria ava ka s Rn ER de aeta dara de 53 Figure 14 Rear Chassis View with Board Installed 54 Tables Table 1 Intel Literature Cente
27. e 28 4 3 Configuration Settings veg esas iunt n easet ka saxo De NEEN EE ap ER Ra AE Ee 29 4 3 1 Configuration Jumpers dGwitches r 29 4 4 BSEL Jumper Settings ener n nene RR inate Ix EPA ENEE ER et 32 3 Document Number 320264 Appendix A A 1 A 1 1 A 1 2 Appendix B Appendix C C 1 C 1 1 C 1 2 User s Manual 4 5 Manual VID Support for CRU see eise asas HERR ER REESEN a camadas ena Rana RR ee 32 4 6 Power On and Reset Push Buttons sssssssssesssesen enne 33 4 7 LEDS gen cea ine ok Gwe a a Sa A 34 4 8 PCI Express X1 Slots and Mini Card Connectors 35 4 8 1 Mini Card A connector J7H1 is enabled by default 35 4 8 2 Mini Card B connector J2G1 is disabled by default 36 4 9 H8S JTAG Programming Headers enne 36 4 9 1 H8 In System Programminmg cese 36 4 9 2 H8 Remote Programming essem 36 4 10 WART Ceppecbor asi esee nennt EE dada aia a na Sad ER aaa IE ERR Ku 38 QuickStart ER 39 5 1 Required Peripherals se NENRKN ENER REENEN ENEN ENNEN REENEN ENEE hana na nn 39 5 2 Graphics Assembly LVDS Panel 40 5 3 Power Up r 43 5 4 EFI Firmware Updates sais u u LS Se EE EE Cra ERAN Ee 45 Daughter arid Plug In Cards uu a nana ten eee ree dus EE dE dE dre trae RR Ade 46 Mott Canyon 4 Interposer Card ua aaa sassa de asia Raga aaa RENE Baa 46 BD leen Lu EE EE 47 Firmware Configuration e droit keen E sra sida SA ae ERR
28. e SDIO MMC interfaces e One channel 24 bit LVDS e One channel SDVO e LPC bus System Memory e Supports a single DDR2 SO DIMM socket SO DIMMs must be un buffered and compliant with Raw Cards A or C as defined by JEDEC e Supports 400 or 533 MHz memory bus frequencies SO DIMM support is only provided for validation purposes The Intel Centrino Atom Processor Technology Platform Design Guide provides component implementations for memory down solutions The DDR2 SODIMM Architecture s Implementation for Intel System Controller Hub SCH US15W whitepaper provides guidelines for implementing a SO DIMM solution although the recommendations are based on simulation only and have not been validated It is recommended that customers validate their designs Display The reference board has two options for displaying video e LVDS location is J5G2 e SDVO location is J7C2 The customer reference board supports single channel LVDS only Table 4 is a listing of displays that have been tested with Crown Beach 16 Document Number 320264 Table 4 Crown Beach Supported LVDS Displays Manufacturer Resolution Back Aspect Type Light Ratio 4 8 inch Samsung 121 92 mm 1024 x 600 11 LED 16x9 LTS480WS CO1 5 6 inch TMD 142 24 mm 1024 x 600 CCFL 16x9 LTDOS6ETOS 7 2 inch 182 88 mm 1280 x 768 32 LED 15x9 LQ072K1LA08 15 inch Samsung 381 00 mm 1024 x 768 CCFL 4x3 LTN150XG LOS 8 4 inch NEC 213 36 mm 640 x 480 2 CCFL 4x3 N
29. ement Support Power measurement resistors are provided to measure the power on many of the subsystems Table 5 Power Measurement Resistor Feature Value Tolerance 1 Value 10 mo NOTE Intel recommends that larger 10 mQ resistors be stuffed for greater accuracy Power on a particular subsystem is calculated using the following formula Equation 1 y R P R value of the sense resistor typically 0 01 Q V the voltage difference measured across the sense resistor Use a high precision digital multi meter tool such as the Agilent 34401A digital multi meter Refer to Table 6 for a comparison of a high precision digital multi meter Agilent 34401A versus a precision digital multi meter Fluke 79 Table 6 Digital Multi Meter Comparison Example System Sense Resistor Value 0 01 Q Voltage Difference Across Resistor 1 492 mV 149 2 mA Calculated Power 0 223 mW User s Manual 21 Document Number 320264 Power Management m tel Agilent 34401A 6 digit Fluke 79 3 digit display display Specification 0 0030 of reading 0 09 2 digits 0 0030 of range Min Voltage displayed 1 49193 mV 1 47 mV Calculated power 0 22258 mW 0 216 mW Max voltage displayed 1 49206 mV 1 51 mV Calculated EST O Rs 22624 mW a 228 mW Error in Error in power 300099 009 403 3 NOTE The precision achieved by using a high precision digital multi meter versus a normal digital m
30. ess the power button on the motherboard at SW3J1 to begin power down If the system is hung it is possible to asynchronously shut the system down by holding the power button down continuously for 4 seconds Note Intel does not recommend powering down the board by shutting off power at the ATX power supply User s Manual 44 Document Number 320264 Quick Start n tel 5 4 EFI Firmware Updates To update the EFI image to a newer release use the EFI binary image and AFUDOS utility included in the latest embedded Intel Atom processor technology firmware kit Do the following 1 Boot into a DOS environment using media which is DOS bootable and includes AFUDOS and the ROM file 2 Run the following command where xxx corresponds to the EFI revision number and y A Alpha B BETA G Gold AFUDOS exe CBCHyxxx rom p b n x c 3 Reboot the system User s Manual 45 Document Number 320264 Quick Start n tel Appendix A Daughter and Plug In Cards A 1 Mott Canyon 4 Interposer Card The Mott Canyon 4 Interposer card is provided to enable Intel HD Audio functionality on the Crown Beach Board Functionality includes e Supports three Mobile Daughter Card MDC headers and up to two Intel High Definition codecs simultaneously e Plugs into a PCI Express slot for mechanical stability only e Electrically connected to the platform through a 26 pin ribbon cable from the Mott Canyon 4 Interposer
31. his document may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order This document contains information on products in the design phase of development Intel and the Intel logo are trademarks of Intel Corporation in the U S and other countries Other names and brands may be claimed as the property of others Copyright 2008 Intel Corporation All rights reserved User s Manual 2 Document Number 320264 Contents User s Manual Intr dUC ION me ETE 7 1 1 About the Development KI u a sas asqa cs cene tasa annua same RER RENE aad n Rana ada 7 1 2 Terminology a sacras sauren ne asas nga no nu xai qaa adaga REPRE se paqaq FE papan dan nona ca grana sata 8 1 3 Technical SUpport pP 9 1 3 1 Additional Technical Support 9 1 4 Product Literature Gg ere ee EE Dee cenae io UAE ERE nun RAE redi 10 1 5 Related Prerethau cce ELT 10 Crown Beach Board sas et tieni ode ONE Estado coa s deg REENEN EE AE e ENEE NEESS 11 2 1 Getting Started esee sesenta xu PRks TAS Ad REENEN Se E 12 2 2 OVERVIEW C 13 2 3 Major F eat pesuu u u g e EEN NEESS EENS 13 2 4 Processor SuppoTFt EE 15 2 4 1 Processor Voltage Regulators rr 15 2 5
32. ideband header are supported e Docking and DMA are not supported by the Intel SCH on Crown Beach e Port 80 83 is implemented using the EPM7064AE device down on the motherboard with 4 seven segment displays on the LPC bus e An option for connecting the cable to front panel or chassis is available System Management Controller SMC Keyboard Controller KBC Renesas Technology H8S serves as both SMC and KBC for the platform The SMC KBC controller supports 18 Document Number 320264 Crown Beach Board intel e Two PS 2 ports Note The two PS 2 ports are for a legacy keyboard and mouse The keyboard plugs into the 2 5 10 2 5 11 2 5 12 2 5 13 2 5 14 User s Manual bottom port and the mouse plugs into the top port e EMA support e Wake runtime SCI events e Power sequencing control EFI Firmware Hub FWH A TSOP socket houses the flash device ST Microelectronics P N M50FW080 that stores the system EFI firmware The EFI firmware can be programmed through a Microsoft MS DOS or Windows based utility Trusted Platform Module TPM Header Crown Beach implements a header at J9B4 to support TPM 1 2 specification compliant devices The same header can be used for legacy connections allowing other SIO solutions to provide floppy COM Parallel and PS 2 functionality SD SDI O MMC Crown Beach provides three ports with the following features e All ports are SD revi 1 specification compliant an
33. in Table 14 to the programming stuffing option Attach an ATX power supply to the system and power up the board Boot the host system into a DOS environment using DOS bootable media Install a serial port onto the target board header J9F1 Hook up a null modem cable From the directory where you extracted the files on the host machine run the kscflash ec xx bin remote command to program H8 through the serial port Follow the flash utility instructions 10 With the board powered off return the jumpers to their default settings Note Make sure the board is not powered on and the power supply is disconnected before moving any of the jumpers User s Manual 37 Document Number 320264 Reference Board Summary Table 14 H8 Programming Jumpers intel Jumper Reference Default Stuffing Option Programming Stuffing Option Designator Remote H8 123 normal operation 1 x link the Host Unit to On Board H8 1 Programming J8D4 Default p Remove Power Supply from the BB_PROG system Remote H8 J8E1 2 Programming 1 X Open 1 2 Short to program H8 JTAG J8E4 4 10 UART Connector UART functionality is added to the Intel SCH SKU Use connector J9G6 for UART connectivity User s Manual 38 Document Number 320264 Quick Start in tel 5 Quick Start The CRB is configured in a protective chassis To access to the board with chassis open use caution when configuring the hardware
34. nd 7 6 One client mode back panel connector USB 8 USB 2 0 ports mini B e Port 2 NOTE All ports are enabled by default except port 5 For more information refer Section 2 5 7 USB Connectors Ports 7 6 are USB 2 0 only 2 SDIO back panel connectors eSlot 2 1 One SDIO backside connector 2 ports Ports O and 1 4 bits SDIO MMC ports e Slot 0 1 port Port 2 8 bits All slots are SDIO Revision 1 1 and MMC Revision 4 0 compliant NOTE For more information refer to Section 2 5 12 SD SDIO MMC 2 x8 option for cable up to SDVO Soft Audio Soft for HDMI Modem One Intel HD Audio MDC Header x1 connector Revision 1 0a compliant PCI Express x1 2 t connector SEH NOTE Slot 1 is non functional by default User s Manual 14 Option for 3 3 V and 1 5 V operation through jumper 2 x4 for Mott Canyon 4 support Document Number 320264 Crown Beach Board intel 2 4 2 4 1 Crown Beach Board Comments Implementation 2 connectors Mini Card connector A PCI Express functionality is enabled by NOTE For more information refer to Mini Card default Section 2 5 4 PCI Express connector NOTE PCI Express signals are Slots left unconnected on Mini Card B em meme mi Backup only provides floppy COM ET Uses TPM header Parallel and PS2 Scan matrix headers and PS 2 in SMC KBC back panel keyboard connector ACPI compliant through H8S 2117 Port 80 Decode PL down on motherboa
35. ovided for Intel HD Audio on User s Manual 17 Document Number 320264 intel 2 5 6 2 5 7 Note 2 5 8 Note 2 5 9 User s Manual Crown Beach The Mott Canyon 4 card is required to enable the High Definition Audio functionality See Appendix A for more information on the Mott Canyon 4 card PATA Storage The Crown Beach Board provides only one desktop 40 pin PATA66 100 connector that supports master and slave devices USB Connectors The Intel SCH provides eight USB 2 0 ports e Four ports are routed to the back panel s two stacked USB connectors USB ports 1 0 and 4 3 are routed to the back of the chassis e Port2 is the client mode connector and is routed to the back of the chassis with a Mini B connector e Ports 7 5 are routed to the front panel headers USB FPIO Duck Bay and Sideband Header and to the Sideband headers Duck Bay Upham USB e For wireless solutions port O is also used with stuffing options for the PCI Express Mini Card OC 7 0 is available for over current detection e Port 5 is disabled by default due to enabling of PCI Express Mini Card A Slot USB port O functionality is impacted if rework is performed to enable the PCI Express Mini Card B Slot LPC Slot The H8S 2117 serves as a keyboard controller on the customer reference board Other solutions such as a mouse controller can be tested in the LPC slot while H8S is held in reset e LPC slot and s
36. pe U K 44 0 1793 431155 Germany 44 0 1793 421333 France 44 0 1793 421777 Japan fax only 81 0 120 47 88 32 1 5 Related Documents You can order product literature from the following Intel literature centers Table 2 is a partial list of the available collateral For the complete list contact your local Intel representative Table 2 Related Documents Document Document Numbers Location Processor and SCH Related Documents Intel Centrino Atom Processor Technology Platform Design Guide Menlow Platform Crown Beach Customer Reference Board Schematic Menlow Platform Ballout Signal and Mechanical Package Intel Atom Processor Z5xx Series Datasheet Intel System Controller Hub Intel SCH Datasheet Intel Atom Processor Z5xx Series Specification Update Intel System Controller Hub Intel SCH Specification Update Contact your FAE for the latest revision Firmware Related Documents Aptio 4 x Whitepaper www ami com aptio User s Manual 10 Document Number 320264 Crown Beach Board 2 Crown Beach Board Figure 1 Crown Beach Board Block Diagram User s Manual Intel Atom Processor Gene kg LvDs FSB DOR2 sDVO x16 mechanically ADD2 N sovo PCIE xi Intel System Controller Hub US Su demie PCIE xi PATA HD AUDIO MDC INTERPOSER HD AUDIO HEADER SOA mo Stro
37. rd Has an option for cable up to front panel with four seven segment displays of chassis Desktop Mode ATX Power Supply Power Supply Virtual Battery SWS8A1 switch ITP Support Extended Debug Port XDP J1E3 XDP connector SO Power On S3 Suspend to RAM S4 Suspend to Disk S5 Soft Off Power Management ACPI Compliant Form Factor Processor Support The reference board supports the Intel Atom processor Z530 with 512 KB cache in a 441 pin FCBGA package No heatsink is required by this processor during room temperature ambient operation Processor Voltage Regulators The reference board uses an onboard Intel MVP6 single phase regulator for the processor core supply The I O voltage is 1 05 V See Section 4 5 for VID jumper location and Appendix B for the VID code table User s Manual 15 Document Number 320264 Crown Beach Board intel 2 5 2 5 1 2 5 2 2 5 3 User s Manual Note Note Subsystem Descriptions Subsystem features refer to the socket and connector locations on the Crown Beach Board Socket and connector locations are labeled with a letter number combination Refer to the silkscreen labeling on Crown Beach Board for location detail Intel SCH Chipset e Processor interface at 400 533 MHz e Single channel DDR2 memory interface running at 400 533 MT s e Two PCI Express ports x1 e Eight USB 2 0 compatible ports e One ATAPI 6 UDMA 100MB s IDE channel e Intel HD Audio e Thre
38. rs aasan asas awaasawanasasasasasa sasana nana 10 Table 2 Related Documents a a ssasssasasssa tik SANI nru NENNE eraan sess a nena ann 10 Table 3 Crown Beach Feature Set Gummar nee 13 Table 4 Crown Beach Supported LVDS DisplayS mee 17 Table 5 Power Measurement Reslstor seems mene 21 Table 6 Digital Multi Meter Comparison mmm 21 Table 7 Crown Beach Voltage Rail 22 Table 8 Back Panel Connectors csssisesensssencasencesane aasawa asa NENNEN arn ni na dna 28 Table 9 Configuration Jumper Switches Gettings a 30 Table 10 BSEL Jumper Settings uuu ua n sasa NEEN nane nasa ag E d casa KEEN dang 32 Table 11 Crown Beach EES G ss geed SEELEN SNE EE 34 Table 12 PCI Express Slot 1 Board Rework to Enable Functionality 35 Table 13 Mini Card B Board Rework to Enable Functionality 36 Table 14 H8 Programming Jumpers ssssssssssessssesemen memes 38 Table 15 Mott Canyon 4 Interposer Card Configuration Jumper Switches 48 Table 16 Voltage Identification Definition sess mmm 50 User s Manual 5 Document Number 320264 Revision History Document Revision Description Number Number 394649 Initial release 320264 Release for public posting User s Manual 6 Document Number 320264 Introduction 1 1 1 User s Manual Note Note Introduction This manual describes the
39. steps are optional depending on the user s needs 1 Attach the Mott Canyon 4 MDC to the MDC header at J9E2 and J9E3 An Intel HD Audio card can be piggybacked onto the Mott Canyon 4 card to provide soft audio and soft modem functionality Adapter cables speakers or a phone line for a modem may be needed depending on the specific card used Attach a desktop CD ROM or mobile CD ROM with adapter with cable to connector J4J3 red stripe toward pin 1 Attach a power cable to connector J3J1 or from an ATX power supply If two IDE devices are used on the same channel one must be set to master and one must be set to slave Check the operating instructions for the IDE devices If desired connect a USB floppy to one of the USB connectors Powering Up the Board 1 2 4 5 Press the power button located at SW3J1 As the system boots press F2 on the keyboard to enter the Firmware setup screen Check time date and configuration settings For most users the default settings should be sufficient for the initial bring up Press F10 to save and exit the Firmware setup The system reboots and is ready for use If the board does not power up completely the Port 80 code on the 7 segment displays CR7B2 and CR7B3 may provide insight into the issue Powering Down the Board There are three options for powering down the Crown Beach CRB 1 2 3 Use OS controlled shutdown through the Windows Start menu or equivalent Pr
40. to one codec at a time User s Manual 47 Document Number 320264 Quick Start intel Table 15 summarizes the default and optional settings for the jumper switches Table 15 Mott Canyon 4 Interposer Card Configuration Jumper Switches MDC 0 1 2 7 8 for MDC1 codec B Default Setting Optional Setting 9 10 for MDC2 codec A 3 4 for MDC0 codec B 1 1 2 for MDC0 codec A 2 ACZ SD 1 Destination 3 4 for MDCO codec B ACZ SD O Destination 5 6 for MDC1 codec A 5 6 for MDC1 codec A 1 2 for MDCO codec A MDC 0 1 2 7 8 for MDC1 codec B 9 10 for MDC2 codec A 1 2 for MDCO codec A ACZ SD 2 Destination 8 3 4 for MDCO codec B MDC 0 1 2 2 10 for MDC2 codec A Lac for MDC1 codec A 1 7 8 for MDC1 codec B 4 MDCO Primary Jumper 2 3 for primary 1 2 for secondary us MDC1 Primary Jumper 2 3 for primary 1 2 for secondary ms 3 3 V Power Option 1 2 for mobile 2 3 for desktop oma 5 0 V Power Option 1 2 for mobile 2 3 for desktop MDCO Docking Emulation Switch 1 2 for off 2 3 for on Enable MDCO Docking Emulation 1 2 for normal 2 3 for docking emulation Dock RST 27 28 29 J16 J25 J24 J32 J33 J26 User s Manual 48 Document Number 320264 Quick Start n tel A 1 2 Firmware Configuration To enable Mott Canyon 4 Interposer card High Definition Audio functionality the Firmware settings may need to be modified To modify the Firmware settings do the following 1 With the system powered off press the po
41. typical hardware set up procedures features and use of the evaluation board and other components included in the Intel Atom processor and Intel System Controller Hub US15W Development Kit This reference board supports the Intel Atom processor and Intel System Controller Hub Intel SCH Read this document in its entirety prior to applying power to the motherboard Intel recommends having both the schematic and board present while reading this document The references in this document correlate to reference designators and board properties of Crown Beach FAB F Customer Reference Board This manual is intended to be used with the Development Kit but can also be used to help bring up a Crown Beach Board although not all associated peripherals will be included with a board About the Development Kit The development kit includes the following e Crown Beach Customer Reference Board with Intel Atom processor Z530 1 6GHz and Intel System Controller Hub US15W e Pre installed jumpers e FWH mounted and flashed with EFI e 1 GB DDR2 SO DIMM e VGA SDVO ADD2N Card e 80 GB Hard Drive with MIDINUX Embedded OS e DVD ROM Drive e IDE cable e Mott Canyon 4 with Intel High Definition Audio Intel HD Audio card e Intel 82574L Gigabit Ethernet Controller e CD with Chipset and Intel Embedded Graphics Drivers IEGD e Chassis with ATX power supply Please refer to Section 5 4 for the location of latest appropriate
42. ulti meter is 33 times more accurate Table 7 summarizes all the power measurement sense resistors located on the Crown Beach board All sense resistors are 0 01 unless otherwise noted Table 7 Crown Beach Voltage Rails Es T gt o 3 8 gt E 9 gt o a G ao a An YKI s s 3 E E G SH a e gt QA c ec ec aor 0 01 11 SCH 1 8V V1 8 V1 8_SM_SCH R5T3 196 DDR2 VR 0 01 11 SCH 1 05 V V1 05S SCH V1 05S SCH VCORE R6T7 1 VCORE 0 01 11 SCH 1 5 V V1 5S SCH V1 5S DLVDS SCH R6T9 1 LVDS 0 01 11 SCH 3 3 V V3 3 V3 3_SCH_SUS R6T13 1 SUS 0 01 11 SCH 3 3 V V3 3S V3 3S_SCH R5T5 1 3 3 V 0 01 11 SCH 1 05 V V1 05S_VTT V1 05S_VTT_SCH R5U35 1 VTT SCH 0 01 11 SCH 1 5 V V1 5S V1 5S_SCH R5T6 1 1 5CORE 0 01 11 SCH 1 5 V V1 5S SCH V1 5S SDVO SCH R6T10 1 SDVO 0 01 11 SCH 1 05 V V1 05S VTT V1 05S VTT CPU R3U1 196 VTT CPU User s Manual 22 Document Number 320264 Power Management 5 em DB pe 9 gt o c L3 o gt 9 8 Du E D g G a a D 2 o e E 2 u u e z U G 7 o 300 u gt wn E E E nar 0 01 11 SCH 1 5 V V1 5S SCH V1 5S PCle SCH R6T6 1 PCIe 0 01 11 SCH 1 8V V1 8 V1 8 SM SCH R5T3 1 DDR2 VR V1 5S DPLLA SCH V1 5S DPLLB SCH V1 5S PClePLL SCH V1 5S HPLL SCH 0 01 12 SCH 1 5 V V1 5S SCH V1 5S AUSBPLL SCH R6T1 1 PLLs 0 01 14 mini PCIe 1 5
43. wer button located at SW3J1 2 Asthe system boots press DEL on the keyboard to enter the Firmware setup screen 3 Move the top cursor using the sideways arrow keys to Chipset 4 Move the screen cursor using the up down arrow keys to South Bridge Configuration and press the Enter key 5 Move the screen cursor to Audio Controller Codec and press the Enter key 6 Select Azalia for the audio codec 7 Savethe settings and exit the Firmware 8 User s Manual 49 Document Number 320264 Quick Start Appendix B Intel MVP 6 VID Table 16 Voltage Identification Definition User s Manual Codes VID6 VID5 VIDA VID3 VID2 VID1 VIDO Vcc V 0 0 1 1 0 0 0 1 2000 0 0 1 1 0 0 1 1 1875 0 0 1 1 0 1 0 1 1750 0 0 1 1 0 1 1 1 1625 0 0 1 1 1 0 0 1 1500 0 0 1 1 1 0 1 1 1375 0 0 1 1 1 1 0 1 1250 0 0 1 1 1 1 1 1 1125 0 1 0 0 0 0 0 1 1000 0 1 0 0 0 0 1 1 0875 0 1 0 0 0 1 0 1 0750 0 1 0 0 0 1 1 1 0625 0 1 0 0 1 0 0 1 0500 0 1 0 0 1 0 1 1 0375 0 1 0 0 1 1 0 1 0250 0 1 0 0 1 1 1 1 0125 0 1 0 1 0 0 0 1 0000 0 1 0 1 0 0 1 0 9875 0 1 0 1 0 1 0 0 9750 0 1 0 1 0 1 1 0 9625 0 1 0 1 1 0 0 0 9500 0 1 0 1 1 0 1 0 9375 50 Document Number 320264 Quick Start User s Manual VID6 VID5 VIDA VID3 VID2 VID1 VI DO Mee V 0 1 0 1 1 1 0 0 9250 0 1 0 1 1 1 1 0 9125
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