Home
Dataram DTM64378A memory module
Contents
1. Bit 0 CL 4 Bit 1 CL 5 Bit 2 Always 1 CL 6 X 14 Bit 3 CL 7 X OxFC Bit 4 CL 8 X Bit 5 CL 9 X Bit 6 CL 10 X Bit 7 CL 11 X CAS Latencies Supported Most Significant Byte Bit 0 CL 12 Bit 1 CL 13 Bit 2 CL 14 15 Bit 3 CL 15 0x00 Bit 4 CL 16 Bit 5 CL 17 Bit 6 CL 18 Bit 7 Reserved 16 Minimum CAS Latency Time tAAmin 13 125ns 0x69 17 Minimum Write Recovery Time tWRmin 15 0ns 0x78 18 Minimum RAS to CAS Delay Time tRCDmin 13 125ns 0x69 19 Minimum Row Active to Row Active Delay Time tRRDmin 6 0ns 0x30 20 Minimum Row Precharge Delay Time tRPmin 13 125ns 0x69 Upper Nibbles for tRAS and tRC 21 Bit 3 Bit 0 tRAS Most Significant Nibble 1 0x11 Bit 7 Bit 4 tRC Most Significant Nibble 1 22 Minimum Active to Precharge Delay Time tRASmin Least 35 0ns 0x18 Significant Byte 23 Minimum Active to Active Refresh Delay Time tRCmin Least 48 125ns 0x81 Significant Byte Minimum Refresh Recovery Delay Time tRFCmin Least 160 0ns 24 Significant Byte i 0x00 25 Minimum Refresh Recovery Delay Time tRFCmin Most 160 0ns 0x05 Significant Byte 26 Minimum Internal Write to Read Command Delay Time 7 5ns 0x3C tWTRmin 27 Minimum Internal Read to Precharge Command Delay Time 7 5ns 0x3C tRTPmin Upper Nibble for tFAW 28 Bit 3 Bit 0 tFAW Most Signifi
2. DQSR5 DQSR5 DQS DAS CS DM DQR 43 40 O 1 0 3 0 DQSR6 DQSR6 DQS DAS DQR 51 48 O 1 0 3 0 DQSR7 DQSR7 x CS DM DQS DOS DAR 59 56 O 1 0 3 0 All 15 OHMS DQ 63 0 O VWA O _DARI63 0 CB 7 0 O VW O _CBRI7 0 DQS 17 0 O VW O DQSR 17 0 DQS 17 0 O VWA O DQSR 17 0 GLOBAL SDRAM CONNECTS All 39 OHMS BA 2 0 R A 15 0 R IRASR ICASR WER VTT All 39 OHMS CKEOR ODTOR RSO VTT CS DM TO SDRAMS All 22 OHMS 1S0 Wr IS1 MN BA 2 0 VW A 15 0 Wv IRAS WA ICAS WW MEW CKEO v y ODTO AWN REG PLL PAR IN Mu CKO 120 OHMS ICKO RSO BA 2 0JR A 15 0JR RASR ICASR IWER CKEOR ODTOR ERR_OUT L R CLK 1 0 JL R CLK 1 0 Rech SDRAMS DQSR9 DQSR9 IDQS DQS CS DM DARI7 4 O 1 0 8 0 DQSR10 DQSR10 IDQS DAS CS DM DQR 15 12 O 1 0 3 0 DQSR11 DQSR11 Ee Das CS DM DQR 23 20 VO 3 0 DQSR12 DQSR12 r pas CS DM DQR 31 28 V O 3 0 DQSR17 DQSR17 IDQS DAS CBR 7 4 O 0 3 0 DQSR13 DQSR13 IDQS DAS CS DM DQR 39 36 O 1 0 3 0 DQSR14 DQSR14 IDQS DAS CS DM DQR 47 44 V O 3 0 DQSR15 DQSR15 IDQS DAS DQR 55 52 VO 3 0 DQSR16 DQSR16 IDQS DAS DQR 63 60 O 1 0 3 0 VDD VDD All 39 OHMS 100 nF All 39
3. signals in a Fly by topology A thermal sensor accurately monitors the DIMM module and can prevent exceeding the maximum operating temperature of 95C Pin Description Front Side Back Side Name Function 1 Vprerpa Di DQ25 61 A2 91 DQ41 121 Vss 151 Vss 181 A1 211 Vss CB 7 0 Data Check Bits 2 Vss 82 Vss 62 Von 92 Vss 122 DQ4 152 DQS12 182 Voo 212 DQS14 DQ 63 0 Data Bits 3 DQO 33 DQS3 63 ci 93 DQS5 123 Da5 153 DQS12 183 Voo 213 DQS14 DQS 17 0 DQS 17 0 Differential Data Strobes 4 DQ1 34 DQS3 64 CK1 94 DQS5 124 Vss 154 Vss 184 CKO 214 Vss CK 1 0 CK 1 0 Differential Clock Inputs 5 Vss 35 Vss 65 Von 95 Vss 125 DQS9 155 DQ30 185 CKO 215 DQ46 CKE 1 0 Clock Enables 6 Dosen op DQ26 66 Voo 96 DQ42 126 DQS9 156 DQ31 186 Von 216 DQ47 ICAS Column Address Strobe 7 DQSO 37 DQ27 67 Vrerca 97 DQ43 127 Vss 157 Vss 187 EVENT 217 Vss IRAS Row Address Strobe 8 Vss 38 Vss 68 Party 98 Vss 128 DQ6 158 CB4 188 AO 218 DQ52 S 3 0 Chip Selects 9 DQ2 39 CBO 69 VDD 99 Doug hoan J159 C5 189 Von 219 DQ53 WE Write Enable 10 DQ3 40 CB1 70 A10 AP 100 DQ49 han Vss 160 Vss 190 BA1 220 Vss A 15 0 Address Inputs 11 Vss WI Vss 71 BAO 101 Vss 131 DQ12 161 DQS17 W i Voo 221 DQS15 BA 2 0 Bank Addresses 12 DQ8 42 DQS8 72 Von 102 DQS6 132 DQ13 162 DQS17 192 RAS 222 DQS15 ODT 1 0 On Die Termination Inputs 13 DQ9 43 DQS8 73 WE 103 DQS6 133 Vss 163 Vss 193 S0 223 Vss SA 2 0 SPD Address 14 Vss 4 Vss 74 ICAS f104
4. 0 Module Nominal Height max in mm 29 lt h lt 30 Hab Bit 7 Bits Reserved 0 Module Maximum Thickness er Bit 3 Bit 0 Front in mm baseline Ge 1 lt th lt 2 Ga Bit 7 Bit 4 Back in mm baseline thickness 1 lt th lt 2 1mm Reference Raw Card Used 62 Bit 4 Bit 0 Reference Raw Card RICE 0x44 Bit 6 Bit 5 Reference Raw Card Revision Rev 2 Bit 7 Reserved 0 Registered DIMM Module Attributes 63 Bit 1 Bit 0 of Registers used on RDIMM 1 Register 0x09 Bit 3 Bit 2 of Rows of DRAMs on RDIMM 2 Rows Bit 7 Bit 4 Reserved 0 Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 cr DIM64378A Mon Wale aed Perfor RDIMM Thermal Heat Spreader Solution 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM 64 Bit 6 Bit 0 Heat Spreader Thermal Characteristics 0 0x00 Bit 7 Heat Spreader Solution No HS 65 Register Manufacturer ID Code Least Significant Byte Optional 0x80 66 Register Manufacturer ID Code Most Significant Byte Optional OxB3 67 Register Revision Number Optional 0x61 Register Type 68 Bit 2 0 Support Device SSTE32882 9x00 Bit 7 3 Reserved 0 69 SSTE32882 RC1 MS Nibble RCO LS Nibble Reserved UNUSED 0x00 SSTE32882 RC3 MS Nibble RC2 LS Nibble Drive Strength Command Address 70 Bit 1 Bit 0 RC2 DA3 4 Value RESE
5. 378A Mon Wale ard Perfor 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM 126 Cyclical Redundancy Code CRC CRC 0xAD 127 Cyclical Redundancy Code CRC CRC Ox9F 128 Module Part Number M 0x4D 129 Module Part Number 3 0x33 130 Module Part Number 9 0x39 131 Module Part Number 3 0x33 132 Module Part Number B 0x42 133 Module Part Number 1 0x31 134 Module Part Number K 0x4B 135 Module Part Number 7 0x37 136 Module Part Number 0 0x30 137 Module Part Number D 0x44 138 Module Part Number H 0x48 139 Module Part Number 0 0x30 140 Module Part Number 0x2D 141 Module Part Number C 0x43 142 Module Part Number K 0x4B 143 Module Part Number 0 0x30 144 Module Part Number 0x20 145 Module Part Number 0x20 146 Module Revision Code UNUSED 0x00 147 Module Revision Code UNUSED 0x00 148 DRAM Manufacturer ID Code Least Significant Byte 0x80 149 DRAM Manufacturer ID Code Most Significant Byte OxCE Ke Manufacturer s Specific Data UNUSED 0x00 hes Open for customer use UNUSED 0x00 Note Serial Presence Detect shown for reference only Some bytes value may vary Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 12 DYPDATARAM DTM64378A ez 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM NEE DATARAM CORPORATION USA Corporate Headquarters P O Box 7528 Princeton NJ 08543 7
6. 528 Voice 609 799 0071 Fax 609 799 6734 www dataram com All rights reserved The information contained in this document has been carefully checked and is believed to be reliable However Dataram assumes no responsibility for inaccuracies The information contained in this document does not convey any license under the copyrights patent rights or trademarks claimed and owned by Dataram No part of this publication may be copied or reproduced in any form or by any means or transferred to any third party without prior written consent of Dataram Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 13
7. Coverage 0 Bit 3 Bit 0 SPD Bytes Used 176 0x92 Bit 6 Bit 4 SPD Bytes Total 256 Bit 7 CRC Coverage gir Ge 1 SPD Revision Rev 1 1 0x11 DDR3 2 key Byte DRAM Device Type spRAM OOB Key Byte Module Type 3 Bit 3 Bit 0 Module Type RDIMM 0x01 Bit 7 Bit 4 Reserved 0 SDRAM Density and Banks 4 Bit 3 Bit 0 Total SDRAM capacity in megabits 2Gb 0x03 Bit 6 Bit 4 Bank Address Bits 8 banks Bit 7 Reserved 0 SDRAM Addressing 5 Bit 2 Bit 0 Column Address Bits 11 Ox1A Bit 5 Bit 3 Row Address Bits 15 Bit 7 6 Reserved 0 6 Reserved 0x00 Module Organization 7 Bit 2 Bit 0 SDRAM Device Width 4 Bits 0x08 Bit 5 Bit 3 Number of Ranks 2 Rank Bit 7 6 Reserved 0 Module Memory Bus Width Bit 2 Bit 0 Primary bus width in bits 64 Bits S 0x0B Bit 4 Bit 3 Bus width extension in bits 8 Bits Bit 7 Bit 5 Reserved 0 Fine Timebase FTB Dividend Divisor 9 Bit 3 Bit 0 Fine Timebase FTB Divisor 1 oe Bit 7 Bit 4 Fine Timebase FTB Dividend 1 1 MTB 10 Medium Timebase MTB Dividend 0 125ns Hall 8 MTB 11 Medium Timebase MTB Divisor 0 125ns SOS 12 SDRAM Minimum Cycle Time tCKmin 1 25ns Ox0A 13 Reserved UNUSED 0x00 Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 8 Ltr DIM64378A pamang Value ard Pevfoevresae 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM CAS Latencies Supported Least Significant Byte
8. Ltr DIM64378A Value ard Pe Features 240 pin JEDEC compliant DIMM 133 35 mm wide by 30 mm high Operating Voltage 1 5V 40 075 I O Type SSTL_15 On board DC temperature sensor with integrated Serial Presence Detect SPD EEPROM Data Transfer Rate 12 8 Gigabytes sec Data Bursts 8 and burst chop 4 mode ZQ Calibration for Output Driver and On Die Termination ODT Programmable ODT Dynamic ODT during Writes Programmable CAS Latency 6 7 8 9 10 and 11 Bi directional Differential Data Strobe signals SDRAM Addressing Row Col Bank 15 11 3 Fully ROHS Compliant Pin Configuration 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Identification DTM64378A 1Gx72 8GB 2Rx4 PC3 12800R 11 11 E2 Performance range Clock Module Speed CL trep trp 800 MHz PC3 12800 11 11 11 667 MHz PC3 10600 10 10 10 667 MHz PC3 10600 9 9 9 533 MHz PC3 8500 8 8 8 533 MHz PC3 8500 7 7 7 400 MHz PC3 6400 6 6 6 Description DTM64378A is a registered 1Gx72 memory module which conforms to JEDEC s DDR3 PC3 12800 standard The assembly is Dual Rank Each Rank is comprised of eighteen Samsung 512Mx4 DDR3 1600 SDRAMs One 2K bit EEPROM is used for Serial Presence Detect and a combination register PLL with Address and Command Parity is also used Both output driver strength and input termination impedance are programmable to maintain signal integrity on the I O
9. OHMS 100 nF LCLK 1 0 oe RCLK1 0 i LCLK 1 0 RCLK 1 0 V DECOUPLING DDSPD Sc Serial PD VDD 4 All Devices CK1 VM REF DQ All SDRAMs 120 Ke OHMS Vss Ss All Devices ICK1 VREF_CA ES All SDRAMs Vet F All SDRAMs EVENT All 240 OHMS TEMPERATURE MONITOR Ga SCL SERIAL PD ZQ Pe ae Vss Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 3 DP DATARAM Opnerany Mate ard Performa Absolute Maximum Ratings Note Operation at or above Absolute Maximum Ratings can adversely affect module reliability DTM64378A 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM PARAMETER Symbol Minimum Maximum Unit Temperature non Operating TsTORAGE 55 100 C Ambient Temperature Operating Ta 0 70 C DRAM Case Temperature Operating Tease 0 95 C Voltage on Vpp relative to Vss Vop 0 4 1 975 V Voltage on Any Pin relative to Vss Vin Vout 0 4 1 975 V Notes DRAM Operating Case Temperature above 85C requires 2X refresh Recommended DC Operating Conditions T 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Minimum Typical Maximum Unit Note Power Supply Voltage Vop 1 425 1 5 1 575 V SPD EEPROM Voltage VDDSPD 3 0 3 3 3 6 V UO Reference Voltage VREFDQ 0 49 Mon 0 50 Mon 0 51 Von V 1 UO Reference Voltage VREFCA 0 49 Vpp 0 50 Von 0 51 Voo V 1 Notes 1 The value of Vrer is expected to equal one half Vpp and to track variations in the Voo DC level P
10. RVED 0x50 Bit 3 Bit 2 RC2 DBA0O 1 Value RESERVED Bit 5 Bit 4 RC3 DA4 3 value Command Address A Outputs Moderate Bit 7 Bit 6 RC3 DBAO 1 value Command Address B Outputs Moderate SSTE32882 RC5 MS Nibble RC4 LS Nibble Drive Strength Control and Clock Bit 1 Bit 0 RC4 DA3 4 Control Signals A Outputs Moderate 71 Bit 3 Bit 2 RC4 DBAO 1 Control Signals B Outputs Moderate 0x55 Bit 5 Bit A RC5 DA4 3 value Y1 Y1 and Y3 Y3 Clock cups Moderate Bit 7 Bit 6 RC5 DBA0 1 value YO YO and Y2 Y2 Clock Moderate Outputs 72 SSTE32882 RC7 MS Nibble RC6 LS Nibble Reserved UNUSED 0x00 73 SSTE32882 RC9 MS Nibble RC8 LS Nibble Reserved UNUSED 0x00 74 SSTE32882 RC11 MS Nibble RC10 LS Nibble Reserved UNUSED 0x00 75 SSTE32882 RC13 MS Nibble RC12 LS Nibble Reserved UNUSED 0x00 76 SSTE32882 RC15 MS Nibble RC14 LS Nibble Reserved UNUSED 0x00 Es Module Specific Section UNUSED 0x00 117 Module Manufacturer ID Code Least Significant Byte UNUSED 0x00 118 Module Manufacturer ID Code Most Significant Byte UNUSED 0x00 119 Module Manufacturing Location 0x80 120 Module Manufacturing Date OxCE 121 Module Manufacturing Date 0x01 122 Module Serial Number 0x00 123 Module Serial Number 0x00 124 Module Serial Number 0x00 125 Module Serial Number 0x00 Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 11 Ltr DIM64
11. SC einen Ipp4R Burst read operating current 2340 mA Burst Remeeh Ipp5B Refresh current 3200 mA Current SES Ipp6 Self refresh temperature current MAX Tc 85 C 462 mA Current Operating Bank Interleave Read Ipp7 All bank interleaved read current 3420 mA Current One module rank in this operation the rest in IDD2P slow exit All module ranks in this operation Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 6 cr DIM64378A Ommy value and Pefornaue 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM AC Operating Conditions PARAMETER Symbol Min Max Unit Internal read command to first data taa 13 125 20 ns CAS to CAS Command Delay tceco 4 tck Clock High Level Width tcH avg 0 47 0 53 tck Clock Cycle Time tck 1 25 2 500 ns Clock Low Level Width tcL avg 0 47 0 53 tck Data Input Hold Time after DQS Strobe toH 45 ps DQ Input Pulse Width toipw 360 ps DQS Output Access Time from Clock tpascK 225 225 ps Write DQS High Level Width tbasH 0 45 0 55 tck avg Write DQS Low Level Width toast 0 45 0 55 tck avg DQS Out Edge to Data Out Edge Skew toasa 100 ps Data Input Setup Time Before DQS Strobe tos 10 ps DQS Falling Edge from Clock Hold Time tosH 0 2 tck avg DQS Falling Edge to Clock Setup Time toss 0 2 tck avg Clock Half Period typ minimum of tcy or teL n
12. Vss 134 DQS10 164 CB6 194 Von 224 DQ54 SCL SPD Clock Input 15 DQS1 45 CB2 75 Von 105 DQ50 135 DQS10 165 CB7 195 ODTO 225 DQ55 SDA SPD Data Input Output 16 DQS1 46 CB3 76 S4 106 DQ51 136 Vss 166 Vss 196 A13 226 Vss EVENT Temperature Sensing 17 Vss WI Vss 77 ODT1 107 Vss 137 DQ14 167 NC TEST 197 Voo 227 DQ60 IRESET Reset for register and DRAMs 18 DQ10 48 Ve 78 Von 108 DQ56 138 DQ15 168 RESET 198 S3 NC 228 DQ61 PAR_IN Parity bit for Addr Ctrl 19 DQ11 49 Ve 79 S2 NC og DQ57 bag Vss 169 CKE1 199 Vss 229 Vss ERR_OUT Error bit for Parity Error 20 Vss 50 CKEO 80 Vss 110 Vss 140 DQ20 170 Mon 200 DQ36 230 DQS16 A12 BC Combination input Addr12 Burst Chop 21 DQ16 51 Von 81 DQ32 111 DQS7 ha DQ21 171 As 201 DQ37 231 DQS16 A10 AP Combination input Addr10 Auto precharge 22 DQ17 52 BA2 82 DQ33 112 DQS7 142 Vss 172 A14 202 Vss 232 Vss Vss Ground 23 Vss 53 Een Du 83 Vss 113 Vss 143 DQS11 173 Mon 203 DQS13 233 DQ62 Ven Power 24 IDQS2 54 Von 84 DQS4 ia DQ58 144 DQS11 174 A12 BC 204 DQS13 234 DQ63 Vopspp SPD EEPROM Power 25 DQS2 55 A11 85 DQS4 us DQ59 145 Vss 175 AQ 205 Vss 235 Vss VREFDa Reference Voltage for DQ s 26 Vss 56 A7 86 Vss 116 Vss 146 DQ22 176 Mon 206 DQ38 236 VppsPo VREFCA Reference Voltage for CA 27 DQ18 57 Von 87 DQ34 117 SAO 147 DQ23 177 A8 207 DQ39 237 SA1 Vrt Termination Voltage 28 DQ19 58 A5 88 DQ35 ug SCL 148 Vss 178 A6 208 Vss 238 SDA NC No Connection 29 Vss 59 Ad 89 Vss 119 SA2 149 DQ28 179 Vo
13. cant Nibble 0 0x00 Bit 7 Bit 4 Reserved 0 29 Minimum Four Activate Window Delay Time tFAWmin Least 30 0ns OxFO Significant Byte 30 SDRAM Optional Features 0x83 Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 9 D2DATARAM DTM64378A pamang Value ard Pafos 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Bit 0 RZQ 6 X Bit 1 RZQ 7 X Bit 6 Bit 2 Reserved Bit 7 DLL Off Mode Support SDRAM Drivers Supported Extended Temperature Range X Extended Temperature Refresh Rate Auto Self Refresh ASR 31 On die Thermal Sensor ODTS Readout 0x01 Reserved Reserved Reserved Partial Array Self Refresh PASR Module Thermal Sensor 32 Bit 6 Bit 0 Thermal Sensor Accuracy 0 0x80 Bit 7 Thermal Sensor With TS SDRAM Device Type Bit 6 Bit 0 Non Standard Device Description 0 33 Bit 7 SDRAM Device Type Std Mono 0x00 34 Fine Offset for SDRAM Minimum Cycle Time tCKmin 1 25ns 0x00 35 Fine Offset for Minimum CAS Latency Time tAAmin 13 125ns 0x00 36 Fine Offset for Minimum RAS to CAS Delay Time tRCDmin 13 125ns 0x00 37 Fine Offset for Minimum Row Precharge Delay Time tRPmin 13 125ns 0x00 Fine Offset for Minimum Active to Active Refresh Delay 48 125ns 38 Time tRCmin 0x00 39 59 Reserved Reserved 0x00 Module Nominal Height 60 Bit 4 Bit
14. eak to peak noise on Vrer may not exceed 1 of its DC value DC Input Logic Levels Single Ended T4 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Minimum Maximum Unit Logical High Logic 1 Vue VREF 0 1 Vpop V Logical Low Logic 0 Vuupe Vss Veer 0 1 V AC Input Logic Levels Single Ended T4 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Minimum Maximum Unit Logical High Logic 1 Vin ac VREF 0 175 V Logical Low Logic 0 Vit ac Vrer 0 175 V Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 4 DY PDATARAM Opnerany value ard Performa DTM64378A 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Differential Input Logic Levels T 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Minimum Maximum Unit Differential Input Logic High VIH DIFF 0 200 DC Vpp AC Vppt0 4 V Differential Input Logic Low Vu pr DC Vss AC Vss 0 4 0 200 V Differential Input Cross Point Voltage relative to VDD 2 Vix O eee y Capacitance T 25 C f 100 MHz PARAMETER Pin Symb Minimu Maximum Unit ol m Input Capacitance Clock CKO CKO Cox 1 5 2 5 pF Input Capacitance Address BA 2 0 A 15 0 RAS CAS AVE Ci 1 5 2 5 pF Input Capacitance Control S 1 0 CKE 1 0 ODT 1 0 Ci 1 5 2 5 pF DQ 63 0 CB 7 0 DQS 17 0 Input Output Capacitance DQS 17 0 Ci
15. n 209 DQ44 239 Vss not used 30 DQ24 60 Von 90 DQ40 120 Vrr 150 DQ29 180 A3 210 DQ45 240 Vrr Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 1 Ltr DIM64378A Opnerany value ard Performa 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Front view 133 35 e 5 250 a lee Ep E 0 374 30 00 J 1 181 Ey S es es 0 681 e OR OUNEN UH nnmnnn Y 5 00 4 0 197 TF Ee 5 175 47 00 i man 4 1 850 es g 123 00 4 843 g Back view Side view wl 3 94 Max 0 155 Max ie ee a J WW 4 00 Min 0 157 Min O mmm om O 1 27 10 AN 0 0500 0 0040 Notes Tolerances on all dimensions except where otherwise indicated are 13 005 All dimensions are expressed millimeters inches tt Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 2 Ltr DIM64378A 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Weg Vue aed Performan RSO DQSRO O DQSRO O Vss O DQS DOS DQRI3 0 O 3 0 DQSR1 O DQSR1 O CS DM DQS DOS CS DM DQR 11 8 VO 3 0 DQSR2 DQSR2 DQS DAS CS DM DQR 19 16 O 1 0 3 0 IDQSR3 DQSR3 DQS DAS CS DM DQR 27 24 O 1 0 3 0 DQSR8 DQSR8 DQS DAS CBR 3 0 VO 3 0 DQSR4 DQSR4 DQS DAS DQR 35 32 VO 3 0
16. o 3 5 pF DC Characteristics Ta 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Minimum Maximum Unit Note Input Leakage Current lit 18 18 HA 1 2 Any input 0 V lt VIN lt VDD Output Leakage Current lot 10 10 HA 2 3 0V lt VOUT lt VDDQ Notes 1 All other pins not under test 0 V 2 Values are shown per pin 3 DQ DQS DQS and ODT are disabled a a a a a ee a a a e E E E Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 5 cr DIM64378A Oger Value aed Performans 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM lbo Specifications and Conditions Ta 0 to 70 C Voltage referenced to Vss 0 V PARAMETER Symbol Test Condition Max unit Value Operating One Bank Active Jop Operating current One bank ACTIVATE to PRECHARGE 1890 mA Precharge Current Operating One i i Bank Active Read Ipp1 Operating current One bank ACTIVATE to READ to 2070 mA PRECHARGE Precharge Current eiie els ors Ipp2P Precharge power down current Slow exit 1062 mA Precharge Power Si Down Current Ipp2P Precharge power down current Fast exit 1170 mA Precharge Standby a Cuivent lbp2N Precharge standby current 1410 mA ees ower Down Ipp3P Active power down current 1350 mA Active Standby lbo3N Active standby current 1940 mA Current Operating Burst F e Write Current lbo4W Burst write operating current 2620 mA Operating Burst
17. s Address and Command Hold Time after Clock Dn 120 ps Address and Command Setup Time before Clock tis 45 ps Load Mode Command Cycle Time turD 4 tck DQ to DQS Hold Lou 0 38 tck avg Active to Precharge Time tras 35 Q tREFI ns Active to Active Auto Refresh Time trc 49 125 ns RAS to CAS Delay trop 13 125 ns Average Periodic Refresh Interval 0 C lt Tcase lt 85 C REFI 7 8 us Average Periodic Refresh Interval 0 C lt Tcase lt 95 C Ion 3 9 us Auto Refresh Row Cycle Time trFc 160 ns Row Precharge Time trp 13 125 ns Read DQS Preamble Time RPRE 0 9 Note 1 tck avg Read DQS Postamble Time trest 0 3 Note 2 tck avg Row Active to Row Active Delay trRD Max 4nCK 6ns ns Internal Read to Precharge Command Delay tRTP Max 4nCK 7 5ns ns Write DQS Preamble Setup Time twPRE 0 9 tck avg Write DQS Postamble Time twpst 0 3 tck avg Write Recovery Time twr 15 ns Internal Write to Read Command Delay twTR Max 4nCK 7 5ns ns Notes 1 The maximum preamble is bound by tLZDQS min 2 The maximum postamble is bound by tHZDQS max l i ell Document 06824 Revision A 4 Aug 11 Dataram Corporation 2011 Page 7 Ltr DIM64378A pamang Value and Pofon Serial Presence Detect 8GB 240 Pin 2Rx4 Registered ECC DDR3 DIMM Byte Function Value Hex Number of Bytes Used Number of Bytes in SPD Device CRC
Download Pdf Manuals
Related Search
Related Contents
Micro Innovations EasyGlide Bula do VIRUDINE TTT - 東京ガス www.iPazzPort.com 取扱説明書 - 三菱電機 Copyright © All rights reserved.
Failed to retrieve file