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Intel BATTLE LAKE S775 I915P

1. A B DFG HIJ K L Cc JE O J 5 l4 ol RN fe NM DW e M ee Th o O A A e sis R O MM A A 7 JJ C a U R II 3 HH el ies d FF DD BB GG EE CC AAZ Y Xx w v OM17051 Figure 1 D915PBL Board Components Table 3 lists the components identified in Figure 1 Table 3 D915PBL Board Components Shown in Figure 1 Item Callout from Figure 1 A S S N lt x S lt c o a o v o z z Alc x o a m o o w Z e Al e I O ai moo ZI A ZIT o mnim oO Oo Description Rear chassis fan connector 2 Speaker PCI Express x1 bus add in card connectors ATAPI CD ROM connector optional S PDIF connector optional Realtek ALC860 audio codec Front panel audio connector PCI Conventional bus add in card connectors Ethernet PLC device optional PCI Express x16 bus add in card connector Rear chassis fan connector 1 Back panel connectors Alte
2. B A C RN a au 2 H y 1 23 h a Jr 2 L d u Z O ep 33 D Tri R 39 1 GG EE CC AA Y W V U TSRQ FF DD BB Z X OM17059 Figure 16 D915PBL Board Component side Connectors 60 Table 16 lists the component side connectors identified in Figure 16 Table 16 Component side Connectors Shown in Figure 16 Item Callout from Figure 16 A a Z N lt x s lt c A o 3 o o z z r x zo a m o o w 0l n m oo O Tn m ol o Description PCI Conventional bus add in card connector 4 Rear chassis fan connector 2 PCI Conventional bus add in card connector 3 PCI Express x1 bus add in card connector 2 ATAPI CD ROM connector optional PCI Express x1 bus add in card connector 1 S PDIF connector optional Front panel audio connector PCI Conventional bus add in card connector 2 Front panel IEEE 1394a connector PCI Conventional bus add in card connector 1 Front panel IEEE 1394a connector PCI Express x16 bus add in card connector Rear chassis fan connector 1 Alternate power connector 12V power connector ATX12V SCSI LED optional Serial port B opt
3. 162 3 REF 6 390 rae OU Fb 0 063 0 005 E e S A gt al a E Q a a o a a D 20 0 254 TYP 0 787 0 10 1 55 REF 159 2 0 12 0 061 6 268 0 005 22 45 0 884 8x R 0 5 MIN 7 012 o 0 276 1 00 6 02 0 039 a 0287 0 00 i 0 00 11 81 11 811 0 465 e 12 00 P 0 567 0 472 16 84 12 81 gt 0 504 esta sw er Ga ee SE ez ae 0 663 a gt aot st N ig CO Ke S2 39 26 2S av oN ot aS or ais 2 9288 ia Zei Sa Ey ox wx Zu a Pictorial View OM17164 Figure 22 I O Shield Dimensions 71 Intel Desktop Board D915PBL Technical Product Specification 2 11 Electrical Considerations 2 11 1 DC Loading Table 34 lists the DC loading characteristics of the board This data is based on a DC analysis of all active components within the board that impact its power delivery subsystems The analysis does not include PCI add in cards Minimum values assume a light load placed on the board that is similar to an environment with no applications running and no USB current draw Maximum values assume a load placed on the board that is similar to a heavy gaming environment with a 500 mA current draw per USB port These calculations are not based on specific processor values or memory configurations but are based on the minimum and maximum current draw possible from the board s power delivery subsystems to t
4. OM16680 Figure 15 Back Panel Connectors Table 15 lists the back panel connectors identified in Figure 15 lt gt NOTE The back panel audio line out connector is designed to power headphones or amplified speakers only Poor audio quality occurs if passive non amplified speakers are connected to this output 58 Technical Reference Table 15 Back Panel Connectors Shown in Figure 15 Item Callout from Figure 15 A OQ Tn m o o WB O z S ry xX c Description PS 2 mouse port Green PS 2 keyboard port Purple Serial port A Teal Parallel port Burgundy Digital audio out coaxial Orange Digital audio out optical Front left right channel audio out Two channel audio line out Retasking Jack D Lime green Surround left right channel audio out Retasking Jack H Black Center channel and LFE subwoofer audio out Retasking Jack G Orange Audio line in Retasking Jack C Blue Mic in Retasking Jack B Pink USB ports two IEEE 1394a connector optional LAN USB ports two 59 Intel Desktop Board D915PBL Technical Product Specification 2 8 2 Component side Connectors Figure 16 shows the locations of the component side connectors on the D915PBL board
5. 915P Chipset consisting of e Intel 82915P Memory Controller Hub MCH e Intel 82801FR UO Controller Hub ICH6 R e 4 Mbit Firmware Hub FWH One PCI Express x16 bus add in card connector Intel High Definition 8 channel 7 1 audio subsystem LPC Bus I O controller Support for USB 2 0 devices IEEE 1394a controller and three IEEE 1394a connectors one back panel connector two front panel connectors e Eight USB ports e One serial port e One parallel port e Four Serial ATA interfaces e One Parallel ATA IDE interface with UDMA 33 ATA 66 100 support e One diskette drive interface e PS 2 keyboard and mouse ports 10 100 Mbits sec LAN subsystem using the Intel 82562EZ Platform LAN Connect PLC device e Intel AMI BIOS resident in the 4 Mbit FWH e Support for Advanced Configuration and Power Interface ACPI Plug and Play and SMBIOS e Support for PCI Local Bus Specification Revision 2 2 e Support for PCI Express Revision 1 0a e Suspend to RAM support e Wake on PCI RS 232 front panel PS 2 devices and USB ports continued Product Description Table 1 Feature Summary continued Expansion e Four PCI Conventional bus connectors Capabilities e Two PCI Express x1 bus add in card connectors e One PCI Express x16 bus add in card connector Hardware Monitor Subsystem e Hardware monitoring and fan control ASIC e Voltage sense to detect out of range power supply voltages e Thermal sense to detect out
6. Description of POST Operation NMI is Disabled To check soft reset power on BIOS stack set Going to disable cache if any POST code to be uncompressed CPU init and CPU data area init to be done CMOS checksum calculation to be done next Any initialization before keyboard BAT to be done next KB controller I B free To issue the BAT command to keyboard controller Any initialization after KB controller BAT to be done next Keyboard command byte to be written Going to issue Pin 23 24 blocking unblocking command Going to check pressing of lt INS gt lt END gt key during power on To init CMOS if Init CMOS in every boot is set or lt END gt key is pressed Going to disable DMA and Interrupt controllers Video display is disabled and port B is initialized Chipset init about to begin 8254 timer test about to start About to start memory refresh test Memory Refresh line is toggling Going to check 15 us ON OFF time To read 8042 input port and disable Megakey GreenPC feature Make BIOS code segment writeable To do any setup before Int vector init Interrupt vector initialization to begin To clear password if necessary Any initialization before setting video mode to be done Going for monochrome mode and color mode setting Different buses init system static output devices to start if present See Section 4 3 for details of different buses To give control for any setup required before optional video ROM c
7. 4 4 4 4 4 4 4 4 4 4 1 1 1 PCI Bus Terminology Change ironia A O Online SUpport sucia esas PIOCCSSOM sail dadas System Memo estr EE eE a ee ebe el Lee SE EE EN Ee EE 1 Hardware Management SubsySteM cccccccccnnnccooccccnnncconannnnnnnnnnnnnnnnnnnnnnnnnnncnnnnnnnnnnnnos 2 Power Manage me ici ai 3 Trusted Platform Module Optional AAA 2 3 A 5 6 ef PCLExpress Connectors srta etn E 9 a al Al PCI Bus Terminology Change Previous generations of Intel Desktop Boards used an add in card connector referred to as PCI This generation of Intel Desktop Boards adds a new technology for add in cards PCI Express The 32 bit parallel bus previously referred to as PCI is now called PCI Conventional Intel Desktop Board D915PBL Technical Product Specification 1 2 Overview 1 2 1 Feature Summary Table 1 summarizes the major features of the Desktop Board D915PBL Table 1 Feature Summary Form Factor Processor Memory Chipset Video Audio HO Control USB IEEE 1394a Interface Peripheral Interfaces LAN Support BIOS Instantly Available PC Technology ATX 12 00 inches by 9 60 inches 304 80 millimeters by 243 84 millimeters Support for an Intel Pentium 4 processor in an LGA775 socket with an 800 or 533 MHz system bus e Four 240 pin DDR2 SDRAM Dual Inline Memory Module DIMM sockets e Support for DDR2 533 MHz or DDR2 400 MHz DIMMs e Support for up to 4 GB of system memory Intel
8. 40 Product Description 1 13 Trusted Platform Module Optional The optional Trusted Platform Module TPM is a component on the desktop board that is specifically designed to enhance platform security above and beyond the capabilities of today s software by providing a protected space for key operations and other security critical tasks Using both hardware and software the TPM protects encryption and signature keys at their most vulnerable stages operations when the keys are being used unencrypted in plain text form The TPM is specifically designed to shield unencrypted keys and platform authentication information from software based attacks 1 13 1 System Requirements e Intel Desktop Board D915PBL e Microsoft Windows 2000 Professional SP4 or Microsoft Windows XP Professional SP1 e NTFS file system required e Microsoft Internet Explorer 5 5 or later e Adobe Acrobat 5 0 or later 1 13 2 Warning of Potential Data Loss A CAUTION Failure to follow the instructions below may cause you to lose data Read and follow these instructions prior to Trusted Platform Module initialization System integrators owners and end users must take precautions to mitigate the chance of data loss Data encrypted by any program utilizing the Trusted Platform Module TPM may become inaccessible or unrecoverable if any of the following occurs e Lost Password Loss of any of the passwords associated with the TPM will render encrypted data
9. Going to adjust memory size depending on relocation shadow Memory size adjusted for relocation shadow Going to clear Hit lt DEL gt message Hit lt DEL gt message cleared lt WAIT gt message displayed About to start DMA and interrupt controller test DMA page register test passed To do DMA 1 base register test DMA 1 base register test passed To do DMA 2 base register test DMA 2 base register test passed To program DMA unit 1 and 2 DMA unit 1 and 2 programming over To initialize 8259 interrupt controller Extended NMI sources enabling is in progress Keyboard test started Clearing output buffer checking for stuck key to issue keyboard reset command Keyboard reset error stuck key found To issue keyboard controller interface test command Keyboard controller interface test over To write command byte and init circular buffer Command byte written global data init done To check for lock key continued 95 Intel Desktop Board D915PBL Technical Product Specification 96 Table 48 Runtime Code Uncompressed in F000 Shadow RAM continued Code 84 85 86 87 88 89 8B 8C 8D 8F 91 95 96 97 98 99 9A 9B 9C 9D 9E A2 A3 A4 A5 A7 A8 A9 AA AB AC AD Description of POST Operation Lock key checking over To check for memory size mismatch with CMOS Memory size check done To display soft error and check for password or bypass setup Password checked About to do programmin
10. PCI Conventional bus configuration address register Reset control register PCI Conventional bus configuration data register Primary Parallel ATA IDE bus master registers Secondary Parallel ATA IDE bus master registers 1 Default but can be changed to another address range 2 Dword access only 3 Byte access only NOTE Some additional I O addresses are not available due to ICH6 R address aliasing The ICH6 R data sheet provides more information on address aliasing For information about Refer to Obtaining the ICH6 R data sheet Section 1 3 page 17 Technical Reference 2 5 PCI Configuration Space Map Table 12 PCI Configuration Space Map Bus Device Function Number hex Number hex Number hex Description 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Note 2 Note 2 Note 2 Note 2 Note 2 Notes CO Jo Memory controller of Intel 82915P component A 00 PCI Express x16 graphics port Note 1 02 fo Integrated graphics controller Integrated graphics controller E Intel High Definition Audio Controller to PCI Express port 1 PCI Express x1 bus connector 1 PCI Express port 3 PCI Express x1 bus connector 2 PCI Express port 4 not used Op fo USB UHCI controller 1 USB UHCI controller 2 USB UHCI controller 3 USB UHCI controller 4 EHCI controller E Cf es PCI controller mt o Parallel ATA IDE controller iF Cif Serial ATA controller mr Im SMBus
11. Temperature Non Operating Operating Shock Unpackaged Packaged Vibration Unpackaged Packaged Specification 40 C to 70 C 0 C to 55 C 50 g trapezoidal waveform Velocity change of 170 inches second Half sine 2 millisecond Velocity Change inches sec 5 Hz to 20 Hz 0 01 g Hz sloping up to 0 02 g Hz 20 Hz to 500 Hz 0 02 g Hz flat 5 Hz to 40 Hz 0 015 g Hz flat 40 Hz to 500 Hz 0 015 g Hz sloping down to 0 00015 g Hz 77 Intel Desktop Board D915PBL Technical Product Specification 2 15 Regulatory Compliance This section describes the Desktop Board s compliance with U S and international safety and electromagnetic compatibility EMC regulations 2 15 1 Safety Regulations Table 38 lists the safety regulations the Desktop Board D915PBL complies with when correctly installed in a compatible host system Table 38 Safety Regulations Regulation UL 60950 1 2003 CSA C22 2 No 60950 1 03 EN 60950 1 2002 IEC 60950 1 2001 First Edition 2 15 2 EMC Regulations Title Information Technology Equipment Safety Part 1 General Requirements USA and Canada Information Technology Equipment Safety Part 1 General Requirements European Union Information Technology Equipment Safety Part 1 General Requirements International Table 39 lists the EMC regulations the Desktop Board D915PBL complies with when correctly installed in a compatible host system Table 39 EMC Re
12. e Pins 1 3 5 and 7 comprise one USB port 67 Intel Desktop Board D915PBL Technical Product Specification e Pins 2 4 6 and 8 comprise one USB port e Use only a front panel USB connector that conforms to the USB 2 0 specification for high speed USB devices Power Power 5 V DC E 5 V DC One D I 3 4 D One USB F 7 USB Port D 6 D Port Ground Ground Key no pin No Connect OM15963 Figure 18 Connection Diagram for Front Panel USB Connectors 2 8 2 7 Front Panel IEEE 1394a Connectors Figure 19 is a connection diagram for the IEEE 1394a connectors Ta tra Ground 3 Ground m 0 im zvoc 12 VDC Key no pin Ground om16107 Figure 19 Connection Diagram for IEEE 1394a Connectors 2 INTEGRATOR S NOTES e The IEEE 1394a connectors are colored blue e The 12 VDC power on the IEEE 1394a connectors is fused e Each IEEE 1394a connector provides one IEEE 1394a port 68 Technical Reference 2 9 Jumper Block A CAUTION Do not move the jumper with the power on Always turn off the power and unplug the power cord from the computer before changing a jumper setting Otherwise the board could be damaged Figure 20 shows the location of the jumper block on the D915PBL board The jumper block determines the BIOS Setup program s mode Table 33 describes the jumper settings for the three modes normal configure and recovery When the j
13. lt F12 gt key during POST automatically forces booting from the LAN To use this key during POST the User Access Level in the BIOS Setup program s Security menu must be set to Full 3 7 3 Booting Without Attached Devices For use in embedded applications the BIOS has been designed so that after passing the POST the operating system loader is invoked even if the following devices are not present e Video adapter e Keyboard e Mouse 3 7 4 Changing the Default Boot Device During POST Pressing the lt F10 gt key during POST causes a boot device menu to be displayed This menu displays the list of available boot devices as set in the BIOS setup program s Boot Device Priority Submenu Table 43 lists the boot device menu options Table 43 Boot Device Menu Options Boot Device Menu Function Keys Description lt P gt or lt gt Selects a default boot device lt Enter gt Exits the menu saves changes and boots from the selected device lt Esc gt Exits the menu without saving changes 87 Intel Desktop Board D915PBL Technical Product Specification 3 8 Fast Booting Systems with Intel Rapid BIOS Boot These factors affect system boot speed e Selecting and configuring peripherals properly e Using an optimized BIOS such as the Intel Rapid BIOS 3 8 1 Peripheral Selection and Configuration The following techniques help improve system boot speed e Choose a hard drive with parameters such as power up to data ready
14. see Table 8 on page 37 e Support for a front panel power and sleep mode switch Table 6 lists the system states based on how long the power switch is pressed depending on how ACPI is configured with an ACPI aware operating system Table 6 Effects of Pressing the Power Switch and the power switch is If the system is in this state pressed for the system enters this state Off Less than four seconds Power on ACPI G2 G5 Soft off ACPI GO working state On Less than four seconds Soft off Standby ACPI GO working state ACPI G1 sleeping state On More than four seconds Fail safe power off ACPI GO working state ACPI G2 G5 Soft off Sleep Less than four seconds Wake up ACPI G1 sleeping state ACPI GO working state Sleep More than four seconds Power off ACPI G1 sleeping state ACPI G2 G5 Soft off 35 Intel Desktop Board D915PBL Technical Product Specification 1 12 1 1 36 System States and Power States Under ACPI the operating system directs all system and device power state transitions The operating system puts devices in and out of low power states based on user preferences and knowledge of how devices are being used by applications Devices that are not being used can be turned off The operating system uses information from applications and user settings to put the system as a whole into a low power state Table 7 lists the power states supported by the board along w
15. DIMM Configuration 19 Intel Desktop Board D915PBL Technical Product Specification 1 5 1 1 Dual Channel Interleaved Mode Configurations Figure 4 shows a dual channel configuration using two DIMMs In this example the DIMMO blue sockets of both channels are populated with identical DIMMs Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17123 Figure 4 Dual Channel Interleaved Mode Configuration with Two DIMMs Figure 5 shows a dual channel configuration using three DIMMs In this example the combined capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMMO blue socket of Channel B O Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17122 Figure 5 Dual Channel Interleaved Mode Configuration with Three DIMMs 20 Product Description Figure 6 shows a dual channel configuration using four DIMMs In this example the combined capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in Channel B Also the DIMMs are matched between DIMMO and DIMM 1 of both channels Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17124 Figure 6 Dual Channel Interleaved Mode Configuration with Four DIMMs 21 Intel Desktop Board D915PBL Technical Produc
16. HDR_BLNK_GRN Out 2 Not connected 2 8 2 5 Front Panel Connector Signal Name Description Front panel green LED 3 HDR_BLNK_YEL Out Front panel yellow LED This section describes the functions of the front panel connector Table 30 lists the signal names of the front panel connector Figure 17 is a connection diagram for the front panel connector Table 30 Front Panel Connector Hard Drive Activity LED Yellow Hard disk LED pull up 750 Q to 5 V Power LED Green Front panel green LED N HDR_BLNK_ Out GRN 3 Hard disk active LED 4 HDR_BLNK_ Out Front panel yellow YEL LED Reset Switch On Off Switch Purple Red 5 Ground Ground 6 FPBUT_IN In Power switch 7 FP_RESET In Reset switch 8 Ground Ground Power Not Connected 9 5 V Power 10 N C Not connected N C 5 VDC Power 2 Reset Switch 3 Switch a Dual colored Single colored Sy Power LED Power LED 0 Hard Drive o SL gt E ya Activity LED 7 EG OM17000 Figure 17 Connection Diagram for Front Panel Connector 66 Technical Reference 2 8 2 5 1 Hard Drive Activity LED Connector Yellow Pins 1 and 3 Yellow can be connected to an LED to provide a visual indicator that data is being read from or written to a hard drive Proper LED function requires one of the following e A Serial ATA hard drive connected to an onboard Serial ATA connector e An IDE hard drive
17. Initialization Checkpoints Checkpoint 2A 38 39 95 Description Different buses init system static and output devices to start if present Different buses init input IPL and general devices to start if present Display different buses initialization error messages Init of different buses optional ROMs from C800 to start While control is inside the different bus routines additional checkpoints are output to port 80h as WORD to identify the routines under execution In these WORD checkpoints the low byte of the checkpoint is the system BIOS checkpoint from which the control is passed to the different bus routines The high byte of the checkpoint is the indication of which routine is being executed in the different buses Table 50 describes the upper nibble of the high byte and indicates the function that is being executed Table 50 Upper Nibble High Byte Functions Value N 9o Oli A o N O Description func 0 disable all devices on the bus concerned func 1 static devices init on the bus concerned func 2 output device init on the bus concerned func 3 input device init on the bus concerned func 4 IPL device init on the bus concerned func 5 general device init on the bus concerned func 6 error reporting for the bus concerned func 7 add on ROM init for all buses 97 Intel Desktop Board D915PBL Technical Product Specification Table 51 describes the lower nibble of the high byte and indicates the bus on w
18. Processor C Intel 82915P MCH D Intel 82801FR ICH6 R Figure 24 Localized High Temperature Zones 75 Intel Desktop Board D915PBL Technical Product Specification Table 36 provides maximum case temperatures for the components that are sensitive to thermal changes The operating temperature current load or operating frequency could affect case temperatures Maximum case temperatures are important when considering proper airflow to cool the board Table 36 Thermal Considerations for Components Component Maximum Case Temperature Intel Pentium 4 processor For processor case temperature see processor datasheets and processor specification updates Intel 82915P MCH 99 C under bias Intel 82801FR ICH6 R 110 C under bias For information about gi Intel Pentium 4 processor datasheets and specification updates Section 1 3 page 17 2 13 Reliability 76 The Mean Time Between Failures MTBF prediction is calculated using component and subassembly random failure rates The calculation is based on the Bellcore Reliability Prediction Procedure TR NWT 000332 Issue 4 September 1991 The MTBF prediction is used to estimate repair rates and spare parts requirements The MTBF data is calculated from predicted data at 55 C The MTBF for the D915PBL board is 110 262 hours Technical Reference 2 14 Environmental Table 37 lists the environmental specifications for the board Table 37 Environmental Specifications Parameter
19. a message during POST identifying the type of BIOS and a revision code The initial production BIOSs are identified as EV91510A 86A When the BIOS Setup configuration jumper is set to configure mode and the computer is powered up the BIOS compares the CPU version and the microcode version in the BIOS and reports if the two match The BIOS Setup program can be used to view and change the BIOS settings for the computer The BIOS Setup program is accessed by pressing the lt F2 gt key after the Power On Self Test POST memory test begins and before the operating system boot begins The menu bar is shown below Maintenance Main Advanced Security Power Boot Exit gt NOTE The maintenance menu is displayed only when the Desktop Board is in configure mode Section 2 9 on page 69 shows how to put the Desktop Board in configure mode 83 Intel Desktop Board D915PBL Technical Product Specification Table 41 lists the BIOS Setup program menu features Table 41 BIOS Setup Program Menu Bar Clears Displays Configures Sets Configures Selects boot Saves or passwords and processor advanced passwords power options discards displays and memory features and security management changes to processor configuration available features features and Setup information through the power supply program chipset controls options Table 42 lists the function keys available for menu screens Table 42 BIOS Setup Program Function Keys BIOS Set
20. boot time that might be so fast that necessary logo screens and POST messages cannot be seen This boot time may be so fast that some drives might be not be initialized at all If this condition should occur it is possible to introduce a programmable delay ranging from three to 30 seconds using the Hard Disk Pre Delay feature of the Advanced Menu in the Drive Configuration Submenu of the BIOS Setup program Overview of BIOS Features 3 9 BIOS Security Features The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer with the following restrictions e The supervisor password gives unrestricted access to view and change all the Setup options in the BIOS Setup program This is the supervisor mode e The user password gives restricted access to view and change Setup options in the BIOS Setup program This is the user mode e If only the supervisor password is set pressing the lt Enter gt key at the password prompt of the BIOS Setup program allows the user restricted access to Setup e If both the supervisor and user passwords are set users can enter either the supervisor password or the user password to access Setup Users have access to Setup respective to which password is entered e Setting the user password restricts who can boot the computer The password prompt will be
21. controller joo 8 00 PCI Conventional bus connector 1 ar 00 PCI Conventional bus connector 2 o2 fo PCI Conventional bus connector 3 03 fo PCI Conventional bus connector 4 II Intel 82562EZ 10 100 Mbits sec LAN PLC if present 1 Present only when a PCI Express x16 graphics card is installed 2 Bus number is dynamic and can change based on add in cards used 53 Intel Desktop Board D915PBL Technical Product Specification 2 6 Interrupts The interrupts can be routed through either the Programmable Interrupt Controller PIC or the Advanced Programmable Interrupt Controller APIC portion of the ICH6 R component The PIC is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts The APIC is supported in Windows 2000 and Windows XP and supports a total of 24 interrupts Table 13 Interrupts IRQ System Resource NMI I O channel check 0 Reserved interval timer 1 Reserved keyboard buffer full 2 Reserved cascade interrupt from slave PIC 3 COM2 Note 1 4 COM1 Note 1 5 LPT2 Plug and Play option User available 6 Diskette drive 7 LPT1 Note 1 8 Real time clock 9 User available 10 User available 11 User available 12 Onboard mouse port if present else user available 13 Reserved math coprocessor 14 Primary IDE Serial ATA if present else user available 15 Secondary IDE Serial ATA if present else user available 16 Note 2 User available through PIRQA 17 Note 2 User avail
22. design motherbd cooling htm All responsibility for determining the adequacy of any thermal or system design remains solely with the reader Intel makes no warranties or representations that merely following the instructions presented in this document will result in a system with adequate thermal performance CAUTION Ensure that the ambient temperature does not exceed the board s maximum operating temperature Failure to do so could cause components to exceed their maximum case temperature and malfunction For information about the maximum operating temperature see the environmental specifications in Section 2 14 Technical Reference A CAUTION Ensure that proper airflow is maintained in the processor voltage regulator circuit Failure to do so may result in damage to the voltage regulator circuit The processor voltage regulator area item A in Figure 24 can reach a temperature of up to 85 C in an open chassis Figure 24 shows the locations of the localized high temperature zones of GZ H B ee B O O D C Item Description A Processor voltage regulator area B
23. found to comply with the limits for a Class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures e Reorient or relocate the receiving antenna e Increase the separation between the equipment and the receiver e Connect the equipment to a different electrical branch circuit from that to which the receiver is connected e Consult the dealer or an experienced radio TV technician for help Any changes or modifications to the equipment not expressly approved by Intel Corporation could void the user s authority to operate the equipment 2 15 2 2 Canadian Compliance Statement This Class B digital apparatus complies with Canadian ICES 003 Cet appereil num rique de la classe B est conforme a la norme NMB 003 du Canada 2 15 3 European Union Declaration of Conformity Statement We Intel Corporatio
24. hardware monitoring and fan control ASIC e All fan connectors support closed loop fan control that can adjust the fan speed or switch the fan on or off as needed e All fan connectors have a 12 V DC connection For information about Refer to The location of the fan connectors Figure 16 page 60 The location of the fan connectors and sensors for thermal monitoring Figure 12 page 33 The signal names of the processor fan connector Table 24 page 63 The signal names of the chassis fan connectors Table 25 page 63 1 12 2 3 LAN Wake Capabilities A CAUTION 38 For LAN wake capabilities the 5 V standby line for the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when implementing LAN wake capabilities can damage the power supply LAN wake capabilities enable remote wake up of the computer through a network The LAN network adapter monitors network traffic at the Media Independent Interface Upon detecting a Product Description Magic Packet frame the LAN subsystem asserts a wake up signal that powers up the computer Depending on the LAN implementation the board supports LAN wake capabilities with ACPI in the following ways e The PCI Express WAKE signal e The PCI Conventional bus PME signal for PCI 2 2 compliant LAN designs e The onboard LAN subsystem 1 12 2 4 Instantly Available PC Technology A CAUTION For Instantly Available PC technology the 5 V st
25. less than eight seconds that minimize hard drive startup delays e Select a CD ROM drive with a fast initialization rate This rate can influence POST execution time e Eliminate unnecessary add in adapter features such as logo displays screen repaints or mode changes in POST These features may add time to the boot process e Try different monitors Some monitors initialize and communicate with the BIOS more quickly which enables the system to boot more quickly 3 8 2 Intel Rapid BIOS Boot 88 Use of the following BIOS Setup program settings reduces the POST execution time In the Boot Menu e Set the hard disk drive as the first boot device As a result the POST does not first seek a diskette drive which saves about one second from the POST execution time e Disable Quiet Boot which eliminates display of the logo splash screen This could save several seconds of painting complex graphic images and changing video modes e Enable Intel Rapid BIOS Boot This feature bypasses memory count and the search for a diskette drive In the Peripheral Configuration submenu disable the LAN device if it will not be used This can reduce up to four seconds of option ROM boot time NOTE It is possible to optimize the boot process to the point where the system boots so quickly that the Intel logo screen or a custom logo splash screen will not be seen Monitors and hard disk drives with minimum initialization times can also contribute to a
26. names of the optional ATAPI CD ROM connector Table 18 page 62 The location of the optional S PDIF connector Figure 16 page 60 The signal names of the optional S PDIF connector Table 17 page 62 28 Product Description 1 9 3 8 Channel 7 1 Audio Subsystem The 8 channel 7 1 audio subsystem includes the following e Intel 82801 FR I O Controller Hub ICH6 R e Realtek ALC880 audio codec e Microphone input that supports a single dynamic condenser or electret microphone The front and back panel audio connectors are configurable through the audio device drivers The available configurable audio ports are shown in Figure 9 Front Panel Audio Connectors Line Out Mic In Retasking Jack F Retasking Jack A or E Port 2 Port 1 Back Panel Audio Connectors Surround Left and Right Retasking Jack H F Line In Retasking Jack C Black Blue Center channel and LFE Subwoofer Retasking Jack G Line Out Retasking Jack D Orange Lime Green Mic In Retasking Jack B Pink S PDIF Digital Audio Out S PDIF Digital Audio Out Coaxial Optical OM16993 Figure 9 Front Back Panel Audio Connector Options 29 Intel Desktop Board D915PBL Technical Product Specification Figure 10 is a block diagram of the audio subsystem Mic In Retasking Jack B _ Line In Retasking Jack C gt gt Line Out Retasking Jack D gt gt 82801
27. of range thermal values e Three fan connectors e Three fan sense inputs used to monitor fan activity e Fan speed control 1 2 2 Manufacturing Options Table 2 describes the manufacturing options on the Desktop Board D915PBL Not every manufacturing option is available in all marketing channels Please contact your Intel representative to determine which manufacturing options are available to you Table 2 Manufacturing Options ATAPI CD ROM A connector for attaching an internal CD ROM drive to the onboard audio subsystem Connector ATX fan Additional fan connector for use in larger chassis connector Intel 82801FRW UO Controller Hub that supports Intel Wireless Connect Technology 1 0 Controller Hub ICH6RW SCSI Hard Drive Allows add in hard drive controllers SCSI or other to use the same LED as the Activity LED onboard IDE controller Connector Serial Port B Second serial port accessible via a connector on the component side of the board S PDIF Connector A 1 x 3 connector mounted on the component side of the board that provides digital audio signals in S PDIF format Trusted Platform A component that enhances platform security Module TPM For information about Refer to Available configurations for the Desktop Board D915PBL Section 1 3 page 17 13 Intel Desktop Board D915PBL Technical Product Specification 1 2 3 Board Layout Figure 1 shows the location of the major components on the Desktop Board D915PBL
28. produto cumpre com as normas da Diretiva Europ ia 89 336 EEC amp 73 23 EEC Espanol Este producto cumple con las normas del Directivo Europeo 89 336 EEC amp 73 23 EEC Svenska Denna produkt har tillverkats i enlighet med EG direktiv 89 336 EEC amp 73 23 EEC 2 15 4 Product Ecology Statements The following information is provided to address worldwide product ecology concerns and regulations 2 15 4 1 Disposal Considerations This product contains the following materials that may be regulated upon disposal lead solder on the printed wiring board assembly 2 15 4 2 Recycling Considerations 80 Intel encourages its customers to recycle its products and their components e g batteries circuit boards plastic enclosures etc whenever possible In the U S a list of recyclers in your area can be found at http www eiae org In the absence of a viable recycling option products and their components must be disposed of in accordance with all applicable local environmental regulations Table 40 lists the board s product certification markings Table 40 Product Certification Markings Description UL joint US Canada Recognized Component mark Includes adjacent UL file number for Intel Desktop Boards E210882 component side FCC Declaration of Conformity logo mark for Class B equipment includes Intel name and D915PBL model designation component side CE mark Declares compliance to European Union EU EMC
29. revision level e Fixed system data such as peripherals serial numbers and asset tags e Resource data such as memory size cache size and processor speed e Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows NT require an additional interface for obtaining the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information 3 5 Legacy USB Support Legacy USB support enables USB devices to be used even when the operating system s USB drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supports USB By default Legacy USB support is set to Enabled Legacy USB support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu 4 POST completes 85 Intel Desktop Board D915PBL Technical Product Specification 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if Legacy USB s
30. 2V Power Connector Signal Name Signal Name 12 V 4 12 V 2 8 2 3 Signal Name 12V Ground Ground 5 V Add in Card Connectors The board has the following add in card connectors PCI Express x16 one connector supporting simultaneous transfer speeds up to 8 GBytes sec PCI Express x1 two PCI Express x1 connectors The x1 interfaces support simultaneous transfer speeds up to 500 MBytes sec PCI Conventional rev 2 2 compliant bus four PCI Conventional bus add in card connectors The SMBus is routed to PCI Conventional bus connector 2 only ATX expansion slot 6 PCI Conventional bus add in cards with SMBus support can access sensor data and other information residing on the Desktop Board Note the following considerations for the PCI Conventional bus connectors All of the PCI Conventional bus connectors are bus master capable SMBus signals are routed to PCI Conventional bus connector 2 This enables PCI Conventional bus add in boards with SMBus support to access sensor data on the boards The specific SMBus signals are as follows The SMBus clock line is connected to pin A40 The SMBus data line is connected to pin A41 65 Intel Desktop Board D915PBL Technical Product Specification 2 8 2 4 Auxiliary Front Panel Power Sleep LED Connector Pins 1 and 3 of this connector duplicate the signals on pins 2 and 4 of the front panel connector Table 29 Auxiliary Front Panel Power Sleep LED Connector Pin 1
31. 3 Intel Desktop Board D9ISPBL Technical Product Specification June 2004 Order Number C68599 001 The Intel Desktop Board D915PBL may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are documented in the Intel Desktop Board D915PBL Specification Update Revision History Revision Revision History Date 001 First release of the Intel Desktop Board D915PBL Technical Product June 2004 Specification This product specification applies to only standard Intel Desktop Board D915PBL with BIOS identifier EV91510A 86A Changes to this specification will be published in the Intel Desktop Board D915PBL Specification Update before being incorporated into a revision of this document INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS NO LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL LIFE SAVING OR LIFE
32. 6 K C8000 DFFFF 96 KB Potential available high DOS memory open to the PCI Conventional bus Dependent on video adapter used 640 K 800 K Video memory and BIOS 639 K 640 K 1KB Extended BIOS data movable by memory manager software 512 K 639 K Extended conventional memory OK 512K Conventional memory 2 3 DMA Channels Table 10 DMA Channels DMA Channel Number System Resource Diskette drive Parallel port for ECP or EPP DMA controller Open N O 0dO A o N 51 Intel Desktop Board D915PBL Technical Product Specification 2 4 Fixed I O Map 52 Table 11 I O Map Address hex 0000 OOFF 0170 0177 01FO 01F7 0228 022F Note 1 0278 027F Note 1 02E8 02EF Note 1 02F8 02FF Note 1 0374 0377 0377 bits 6 0 0378 037F 03E8 O3EF 03F0 03F5 03F4 03F7 03F8 O3FF 04D0 04D1 LPTn 400 OCF8 OCFB Note 2 OCF9 Note 3 OCFC OCFF FFAO FFA7 FFA8 FFAF Notes 256 bytes Used by the Desktop Board D915PBL Refer to the ICH6 R data sheet for dynamic addressing information Secondary Parallel ATA IDE channel command block Primary Parallel ATA IDE channel command block 8 bytes LPT3 8 bytes LPT2 com4 come Secondary Parallel ATA IDE channel control block Secondary IDE channel status port 8 bytes LPT1 COM 6 bytes Diskette channel Primary Parallel ATA IDE channel control block COM1 Edge level triggered PIC ECP port LPTn base address 400h
33. 708 296 9333 Intel Pentium and Celeron are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries Other names and brands may be claimed as the property of others Preface This Technical Product Specification TPS specifies the board layout components connectors power and environmental requirements and the BIOS for the Intel Desktop Board D915PBL It describes the standard product and available manufacturing options Intended Audience The TPS is intended to provide detailed technical information about the Desktop Board D915PBL and its components to the vendors system integrators and other engineers and technicians who need this level of information It is specifically not intended for general audiences What This Document Contains Chapter Description 1 A description of the hardware used on the Desktop Board D915PBL 2 A map of the resources of the Desktop Board 3 The features supported by the BIOS Setup program 4 A description of the BIOS error messages beep codes and POST codes Typographical Conventions This section contains information about the conventions used in this specification Not all of these symbols and abbreviations appear in all specifications of this type Notes Cautions and Warnings gt NOTE Notes call attention to important information S INTEGRATOR S NOTES Integrator s notes are used to call attention to information that may be us
34. ATA For information about Refer to The location of the SCSI hard drive activity LED connector Figure 16 page 60 The signal names of the SCSI hard drive activity LED connector Table 22 page 63 1 6 3 Real Time Clock CMOS SRAM and Battery A coin cell battery CR2032 powers the real time clock and CMOS memory When the computer is not plugged into a wall socket the battery has an estimated life of three years When the computer is plugged in the standby current from the power supply extends the life of the battery The clock is accurate to 13 minutes year at 25 C with 3 3 VSB applied gt NOTE If the battery and AC power fail custom defaults if previously saved will be loaded into CMOS RAM at power on 25 Intel Desktop Board D915PBL Technical Product Specification 1 7 PCl Express Connectors The board provides the following PCI Express connectors e One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes sec e Two PCI Express x1 connectors The x1 interfaces support simultaneous transfer speeds up to 500 MBytes sec The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the underlying PCI Express architecture is compatible with PCI Conventional compliant operating systems Additional features of the PCI Express interface includes the following e Support for the PCI Express enhanced configuration mechanism e Automatic discovery link training and in
35. FR Intel e Front Panel Retasking Jack AE Port 1 gt io SE e ie Definition DZ e Front Panel Retasking Jack F Port 3 gt ICH6 R Mudio Pink Audio Codec a Center and LFE Retasking Jack G Surround Left Right Retasking Jack H gt e CD ROM S PDIF gt OM16994 Figure 10 Audio Subsystem Block Diagram Refer to For information about The back panel audio connectors Section 2 8 1 page 58 1 10 LAN Subsystem The 10 100 Mbits sec LAN subsystem consists of the following 1 10 1 30 The Intel 82801FR ICH6 R An Intel 82562EZ Platform LAN Connect PLC device for 10 100 Mbits sec Ethernet LAN connectivity An RJ 45 LAN connector with integrated status LEDs Additional features of the LAN subsystem include CSMA CD protocol engine LAN Connect Interface LCI between the 82562EZ and the ICH6 R PCI Conventional bus power management Supports ACPI technology Supports LAN wake capabilities Intel 82562EZ Physical Layer Interface Device The Intel 82562EZ provides the following functions Basic 10 100 Ethernet LAN connectivity Full device driver compatibility Programmable transit threshold Configuration EEPROM that contains the MAC address 1 10 1 1 Product Description RJ 45 LAN Connector with Integrated LEDs Two LEDs are built into the RJ 45 LAN connector shown in Figure 11 below Green LED W Yellow LED OM15076 Fi
36. L Technical Product Specification 1 13 3 Security Precautions Security like any other aspect of computer maintenance requires planning What is unique about security has to do with understanding who friends and adversaries are The TPM provides mechanisms to enable the owner user to protect their information from adversaries To provide this protection the TPM effectively puts locks around the data Just like physical locks if keys or combinations are lost the assets 1 e data may be inaccessible not only to adversaries but also to asset owner user The TPM provides two classes of keys migratable and non migratable Migratable keys are designed to protect data that can be used i e unencrypted on more than one platform This has the advantage of allowing the key data to be replicated backed up and restored to another platform This may be because of user convenience someone uses more than one platform or the data needs to be available to more than one person operating on different platforms This type of key also has the advantage in that it can be backed up and restored from a defective platform onto a new platform However migratable keys may not be the appropriate level of protection e g the user wants the data restricted to a single platform needed for the application This requires a non migratable key Non migratable keys carry with them a usage deficit in that while the key may be backed up and restored 1 e protected
37. Pin Signal Name 1 Intruder 2 Ground Table 22 Table 23 SCSI Hard Drive Activity LED Connector Optional Signal Name SCSI_ACT No connect Serial ATA Connectors Signal Name Ground TXP TXN Ground RXN RXP Ground Signal Name Ground 12 V FAN_TACH FAN_CONTROL 2 8 2 1 Chassis Fan Connectors The board has three standard and one optional chassis fan connectors e Front chassis fan e Rear chassis fan 1 e Rear chassis fan 2 e ATX fan connector optional Technical Reference Table 25 lists the signal names for the chassis fan connectors These signal names apply to all chassis fan connectors Table 25 Chassis Fan Connectors Signal Name Control 12 V Tach 63 Intel Desktop Board D915PBL Technical Product Specification 2 8 2 2 Power Supply Connectors 64 The board has three power supply connectors e Main power a 2 x 12 connector This connector is compatible with 2 x 10 connectors previously used on Intel Desktop boards The board supports the use of ATX12V power supplies with either 2 x 10 or 2 x 12 main power cables When using a power supply with a 2 x 10 main power cable attach that cable on the rightmost pins of the main power connector leaving pins 11 12 23 and 24 unconnected e ATX12V power a2 x 2 connector This connector provides power directly to the processor voltage regulator and must always be used Failure to do so will prevent the board from boot
38. S checksum If either it is recovery mode or main BIOS checksum is bad go to check point EO for recovery else go to check point D7 for giving control to main BIOS D7 Find Main BIOS module in ROM image D8 Uncompress the main BIOS module D9 Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000 shadow RAM Table 47 Boot Block Recovery Code Checkpoints Code Description of POST Operation EO Onboard Floppy Controller if any is initialized Compressed recovery code is uncompressed in F000 0000 in Shadow RAM and give control to recovery code in F000 Shadow RAM Initialize interrupt vector tables initialize system timer initialize DMA controller and interrupt controller E8 Initialize extra Intel Recovery Module E9 Initialize floppy drive EA Try to boot from floppy If reading of boot sector is successful give control to boot sector code EB Booting from floppy failed look for ATAPI LS 120 Zip devices EC Try to boot from ATAPI If reading of boot sector is successful give control to boot sector code EF Booting from floppy and ATAPI device failed Give two beeps Retry the booting procedure again go to check point E9 93 Intel Desktop Board D915PBL Technical Product Specification 94 Table 48 Runtime Code Uncompressed in F000 Shadow RAM Code 03 05 06 07 08 0B DC OE OF 10 11 12 13 14 19 1A 23 24 25 27 28 2A 2B 2C 2D 2E 2F 30 31 32 34 37 38 39 3A
39. SUSTAINING APPLICATIONS Intel Corporation may have patents or pending patent applications trademarks copyrights or other intellectual property rights that relate to the presented subject matter The furnishing of documents and other materials and information does not provide any license express or implied by estoppel or otherwise to any such patents trademarks copyrights or other intellectual property rights Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them Intel desktop boards may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained from Intel Corporation P O Box 5937 Denver CO 80217 9808 or call in North America 1 800 548 4725 Europe 44 0 1793 431 155 France 44 0 1793 421 777 Germany 44 0 1793 421 333 other Countries
40. able through PIRQB 18 Note 2 User available through PIRQC 19 Note 2 User available through PIRQD 20 Note 2 User available through PIRQE 21 Note 2 User available through PIRQF 22 Note 2 User available through PIRQG 23 Note 2 User available through PIRQH Notes 1 Default but can be changed to another IRQ 2 Available in APIC mode only 54 Technical Reference 2 7 PCI Conventional Interrupt Routing Map This section describes interrupt sharing and how the interrupt signals are connected between the PCI Conventional bus connectors and onboard PCI Conventional devices The PCI Conventional specification describes how interrupts can be shared between devices attached to the PCI Conventional bus In most cases the small amount of latency added by interrupt sharing does not affect the operation or throughput of the devices In some special cases where maximum performance is needed from a device a PCI Conventional device should not share an interrupt with other PCI Conventional devices Use the following information to avoid sharing an interrupt with a PCI Conventional add in card PCI Conventional devices are categorized as follows to specify their interrupt grouping e INTA By default all add in cards that require only one interrupt are in this category For almost all cards that require more than one interrupt the first interrupt on the card is also classified as INTA e INTB Generally the second inter
41. age Backup Procedures To backup select files without creating a drive image files can be moved from secured programs or drive letters to an unencrypted directory The unencrypted clear text files may then be backed up to a removable media and stored in a secure location The advantage of the clear text backup is that no TPM key is required to restore the data This option is not recommended because the data is exposed during backup and restore 1 13 4 Trusted Platform Module Ownership The Trusted Platform Module is disabled by default when shipped and the owner end customer of the system assumes ownership of the TPM This permits the owner of the system to control initialization of the TPM and create all the passwords associated with the TPM that is used to protect their keys and data System builders integrators may install both the Infineon Security Platform software and the Wave System EMBASSY Trust Suite but SHOULD NOT attempt to use or activate the TPM or either software package 43 Intel Desktop Board D915PBL Technical Product Specification 1 13 5 Enabling the Trusted Platform Module The Trusted Platform Module is disabled by default when shipped to insure that the owner end customer of the system initializes the TPM and configures all security passwords The owner end customer should use the following steps to enable the TPM 1 While the PC is displaying the splash screen or POST screen press the lt F2 gt key to ent
42. ance with the ATX specification 1 800 45 72 6 500 165 10 E GE SY LJ 6 100 154 94 5200 O 132 08 0 00 gt a 2 850 72 39 i 3 100 E 78 74 L_ 6 450 163 83 5 550 2 600 0 00 6 200 140 97 4900 66 04 157 48 124 46 OM17062 Figure 21 D915PBL Board Dimensions 70 Technical Reference 2 10 2 1 0 Shield The back panel I O shield for the board must meet specific dimension and material requirements Systems based on the board need the back panel I O shield to pass certification testing Figure 22 shows the I O shield Dimensions are given in inches to a tolerance of 0 02 inches The figure also indicates the position of each cutout Additional design considerations for I O shields relative to chassis requirements are described in the ATX specification gt NOTE The I O shield drawing in this document is for reference only An I O shield compliant with the ATX chassis specification 2 03 is available from Intel
43. andby line for the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when implementing Instantly Available PC technology can damage the power supply Instantly Available PC technology enables the board to enter the ACPI S3 Suspend to RAM sleep state While in the S3 sleep state the computer will appear to be off the power supply is off and the front panel LED is amber if dual colored or off if single colored When signaled by a wake up device or event the system quickly returns to 1ts last known wake state Table 8 on page 37 lists the devices and events that can wake the computer from the S3 state The board supports the PCI Bus Power Management Interface Specification Add in boards that also support this specification can participate in power management and can be used to wake the computer The use of Instantly Available PC technology requires operating system support and PCI 2 2 compliant add in cards PCI Express add in cards and drivers 1 12 2 5 Resume on Ring The operation of Resume on Ring can be summarized as follows e Resumes operation from ACPI S1 or S3 states e Detects incoming call similarly for external and internal modems e Requires modem interrupt be unmasked for correct operation 1 12 2 6 Wake from USB USB bus activity wakes the computer from ACPI S1 or S3 states gt NOTE Wake from USB requires the use of a USB peripheral that supports Wake fr
44. by current required depends on the wake devices supported and manufacturing options System integrators should refer to the power usage values listed in Table 34 when selecting a power supply for use with the board Additional power required will depend on configurations chosen by the integrator The power supply must comply with the following recommendations found in the indicated sections of the ATX form factor specification The potential relation between 3 3 VDC and 5 VDC power rails Section 4 2 The current capability of the 5 VSB line Section 4 2 1 2 All timing parameters Section 4 2 1 3 All voltage tolerances Section 4 2 2 73 Intel Desktop Board D915PBL Technical Product Specification 2 12 Thermal Considerations A CAUTION A chassis with a maximum internal ambient temperature of 38 C at the processor fan inlet is a requirement Use a processor heatsink that provides omni directional airflow as shown in Figure 23 to maintain required airflow across the processor voltage regulator area SS ATT NAY CH Figure 23 Processor Heatsink for Omni directional Airflow OM16996 A CAUTION 74 Failure to ensure appropriate airflow may result in reduced performance of both the processor and or voltage regulator or in some instances damage to the board For a list of chassis that have been tested with Intel desktop boards please refer to the following website http developer intel com
45. connected to an onboard IDE connector 2 8 2 5 2 Reset Switch Connector Purple Pins 5 and 7 Purple can be connected to a momentary single pole single throw SPST type switch that is normally open When the switch is closed the board resets and runs the POST 2 8 2 5 3 Power Sleep LED Connector Green Pins 2 and 4 Green can be connected to a one or two color LED Table 31 shows the possible states for a one color LED Table 32 shows the possible states for a two color LED Table 31 States for a One Color Power LED LED State Off Steady Green Description Power off sleeping Running Table 32 States for a Two Color Power LED LED State Description Off Power off Steady Green Running Steady Yellow Sleeping gt NOTE The colors listed in Table 31 and Table 32 are suggested colors only Actual LED colors are product or customer specific 2 8 2 5 4 Power Switch Connector Red Pins 6 and 8 Red can be connected to a front panel momentary contact power switch The switch must pull the SW_ON pin to ground for at least 50 ms to signal the power supply to switch on or off The time requirement is due to internal debounce circuitry on the board At least two seconds must pass before the power supply will recognize another on off signal 2 8 2 6 Front Panel USB Connectors Figure 18 is a connection diagram for the front panel USB connectors S INTEGRATOR S NOTES e The 5 VDC power on the USB connector is fused
46. des the nonvolatile storage of the BIOS For information about Refer to The Intel 915P chipset http developer intel com Resources used by the chipset Chapter 2 1 6 1 USB The board supports up to eight USB 2 0 ports supports UHCI and EHCI and uses UHCI and EHCI compatible drivers The ICH6 R provides the USB controller for all ports The port arrangement is as follows e Four ports are implemented with dual stacked back panel connectors adjacent to the audio connectors e Four ports are routed to two separate front panel USB connectors CH NOTE Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements even if no device is attached to the cable Use shielded cable that meets the requirements for full speed devices For information about Refer to The location of the USB connectors on the back panel Figure 15 page 58 The location of the front panel USB connectors Figure 16 page 60 1 6 2 IDE Support The board provides five IDE interface connectors e One parallel ATA IDE connector that supports two devices e Four serial ATA IDE connectors that support one device per connector 1 6 2 1 Parallel ATE IDE Interface The ICH6 R s Parallel ATA IDE controller has one bus mastering Parallel ATA IDE interface The Parallel ATA IDE interface supports the following modes e Programmed I O PIO processor controls data transfer e 8237 style DMA DMA offloads the processor suppor
47. directive 89 336 EEC and Low Voltage directive 73 23 EEC component side The CE mark should also be on the shipping container Australian Communications Authority ACA C Tick mark Includes adjacent Intel supplier code number N 232 The C tick mark should also be on the shipping container Printed wiring board manufacturer s recognition mark consists of a unique UL recognized manufacturer s logo along with a flammability rating solder side Technical Reference 2 15 5 Product Certification Markings Board Level Marking WA US Model Number Trade Name FE FOR HOME OR OFFICE USE Tested To Comply With FCC Standards cE V 0 or 94V 0 81 Intel Desktop Board D915PBL Technical Product Specification 82 3 Overview of BIOS Features What This Chapter Contains Gi Wee Te pects seo oa sea aah a a ot ad a ea et nda ais a vate ace cet asa ena eae aaa 83 3 2 BIOS Flash Memory Organization cios 84 3 3 Resource Configuration NEEN 84 3 4 System Management BIOS GMBIOES unn 85 BO Legacy USB SUDO GE 85 3 0 BIOS EE 86 Bat BOO IESELEN 87 3 8 Fast Booting Systems with Intel Rapid BIOS Boot 88 3 9 BIOS Security FEAS rata 89 3 1 Introduction The board uses an Intel AMI BIOS that is stored in the Firmware Hub FWH and can be updated using a disk based program The FWH contains the BIOS Setup program POST the PCI auto configuration utility and Plug and Play support The BIOS displays
48. displayed before the computer is booted If only the supervisor password is set the computer boots without asking for a password If both passwords are set the user can enter either password to boot the computer e For enhanced security use different passwords for the supervisor and user passwords e Valid password characters are A Z a z and 0 9 Passwords may be up to 16 characters in length Table 44 shows the effects of setting the supervisor password and user password This table is for reference only and is not displayed on the screen Table 44 Supervisor and User Password Functions Supervisor Password to Password Password Set Mode User Mode Setup Options Enter Setup During Boot Neither Can change all Can change all None None None options Note options Note Supervisor Can change all Can change a Supervisor Password Supervisor None only options limited number of options User only N A Can change all Enter Password User User options Clear User Password Supervisor Can change all Can change a Supervisor Password Supervisor or Supervisor or and user set options limited number Enter Password user user of options Note If no password is set any user can change all Setup options 89 Intel Desktop Board D915PBL Technical Product Specification 90 4 Error Messages and Beep Codes What This Chapter Contains 4 1 BIOS Error Messages 4 2 Port 80h POST Codes 4 3 Bus Init
49. e Move the configuration jumper on the board to pins 2 3 Restore power to the PC and power on System should automatically enter BIOS setup Use the arrow keys to select Clear Trusted Platform Module press lt Enter gt If you agree to the warning message select Ok and press lt Enter gt Press the lt F10 gt key to save and exit select Ok and press lt Enter gt Power off the system Review precautions in the WARNING above 10 Restore the configuration jumper on the board to pins 1 2 When cleared the TPM module is disabled by default CHOI AKHRWN gt Product Description 1 13 9 Software Support e For assistance with the Infineon Security Platform Software visit the web at http www infineon com e For assistance with the Wave System EMBASSY Trust Suite visit the web at http www wave com support ets html e For additional information about TPM and enhancing PC security visit https www trustedcomputinggroup org home 47 Intel Desktop Board D915PBL Technical Product Specification 48 2 Technical Reference What This Chapter Contains 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 10 2 11 2 12 2 13 2 14 2 15 ui ele Ter Ve Tu izes eee NT 49 Memory ee 49 DMA CONAM a tad 51 Fixed VO Map EE 52 PCI Configuration Space Map sit A da 53 On Te 54 PCI Conventional Interrupt Routing Map 55 L elle tele 57 Jumper gt ee 69 Mechanical Considerations ccccccceseececeeeeeeeeeee
50. e PME signal wake up support e WAKE signal wake up support LAN wake capabilities and Instantly Available PC technology require power from the 5 V standby line 37 Intel Desktop Board D915PBL Technical Product Specification Resume on Ring enables telephony devices to access the computer when it is in a power managed state The method used depends on the type of telephony device external or internal NOTE The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an operating system that provides full ACPI support 1 12 2 1 Power Connector ATX12V compliant power supplies can turn off the system power through system control When an ACPI enabled system receives the correct command the power supply removes all non standby voltages When resuming from an AC power failure the computer returns to the power state it was in before power was interrupted on or off The computer s response can be set using the Last Power State feature in the BIOS Setup program s Boot menu For information about Refer to The location of the main power connector Figure 16 page 60 The signal names of the main power connector Table 26 page 64 1 12 2 2 Fan Connectors The function operation of the fan connectors is as follows e The fans are on when the board is in the SO or S1 state e The fans are off when the board is off or in the S3 S4 or S5 state e ach fan connector is wired to a fan tachometer input of the
51. e fan connectors Section 1 12 2 2 page 38 1 11 4 Chassis Intrusion and Detection The board supports a chassis security feature that detects if the chassis cover is removed The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion connector When the chassis cover is removed the mechanical switch is in the closed position 1 12 Power Management Power management is implemented at several levels including e Software support through Advanced Configuration and Power Interface ACPI e Hardware support 34 Power connector Fan connectors LAN wake capabilities Instantly Available PC technology Resume on Ring Wake from USB Wake from PS 2 devices Power Management Event signal PME wake up support Product Description 1 12 1 ACPI ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer The use of ACPI with this board requires an operating system that provides full ACPI support ACPI features include e Plug and Play including bus and device enumeration e Power management control of individual devices add in boards some add in boards may require an ACPI aware driver video displays and hard disk drives e Methods for achieving less than 15 watt system operation in the power on standby sleeping state e A Soft off feature that enables the operating system to power off the computer e Support for multiple wake up events
52. e supported in US English Additional languages are available in the Integrator s Toolkit utility Check the Intel website for details 3 6 2 Custom Splash Screen 86 During POST an Intel splash screen is displayed by default This splash screen can be augmented with a custom splash screen The Integrator s Toolkit that is available from Intel can be used to create a custom splash screen NOTE If you add a custom splash screen it will share space with the Intel branded logo Overview of BIOS Features For information about Refer to The Intel World Wide Web site Section 1 3 page 17 3 7 Boot Options In the BIOS Setup program the user can choose to boot from a diskette drive hard drives CD ROM or the network The default setting is for the diskette drive to be the first boot device the hard drive second and the ATAPI CD ROM third The fourth device is disabled 3 7 1 CD ROM Boot Booting from CD ROM is supported in compliance to the El Torito bootable CD ROM format specification Under the Boot menu in the BIOS Setup program ATAPI CD ROM is listed as a boot device Boot devices are defined in priority order Accordingly if there is not a bootable CD in the CD ROM drive the system will attempt to boot from the next defined drive 3 7 2 Network Boot The network can be selected as a boot device This selection allows booting from the onboard LAN or a network add in card with a remote boot ROM installed Pressing the
53. eeeeeeeeeseeeeeaeueneeeeeeeaeeeeteaeseeetsaeaeees 70 Electrical GonsSid rations uu di tddi 72 Thermal Considerations ooccccnccccncccnnncnnnnacanoncncnnncnonannno carac narco na nnn narco arc n nara n nana 74 STE TUE A A as 76 ENVIFON EEN 77 Regulatory COMPlanCe ista 78 2 1 Introduction Sections 2 2 2 6 contain several standalone tables Table 9 describes the system memory map Table 10 lists the DMA channels Table 11 shows the I O map Table 12 defines the PCI Conventional bus configuration space map and Table 13 describes the interrupts The remaining sections in this chapter are introduced by text found with their respective section headings 2 2 Memory Resources 2 2 1 Addressable Memory The board utilizes 4 GB of addressable system memory Typically the address space that is allocated for PCI Conventional bus add in cards PCI Express configuration space BIOS firmware hub and chipset overhead resides above the top of DRAM total system memory On a system that has 4 GB of system memory installed it is not possible to use all of the installed memory due to system address space being allocated for other system critical functions These functions include the following BIOS firmware hub 2 MB Local APIC 19 MB Digital Media Interface 40 MB Front side bus interrupts 17 MB PCI Express configuration space 256 MB MCH base address registers internal graphics ranges PCI Express ports up to 512 MB 49 Int
54. eful to system integrators A CAUTION Cautions are included to help you avoid damaging hardware or losing data Intel Desktop Board D915PBL Technical Product Specification A WARNING Warnings indicate conditions which if not observed can cause personal injury Other Common Notation Used after a signal name to identify an active low signal such as USBPO NxnX When used in the description of a component N indicates component type xn are the relative coordinates of its location on the Desktop Board D915PBL and X is the instance of the particular part at that general location For example J5J1 is a connector located at 5J It is the first connector in the 5J area GB Gigabyte 1 073 741 824 bytes GB sec Gigabytes per second KB Kilobyte 1024 bytes Kbit Kilobit 1024 bits kbits sec 1000 bits per second MB Megabyte 1 048 576 bytes MB sec Megabytes per second Mbit Megabit 1 048 576 bits Mbit sec Megabits per second xxh An address or data value ending with a lowercase h indicates a hexadecimal value x x V Volts Voltages are DC unless otherwise specified This symbol is used to indicate third party brands and names that are the property of their respective owners Contents 1 Product Description 1 1 1 2 Z h dl ld oR Go 1 O ZA o N 1 9 1 10 1 12 1 13 PCI Bus Terminology Changes EE 11 MEIER 12 1 2 1 FSature SUITE iento alain nit iii 12 1 22 Manufacturing Option
55. el Desktop Board D915PBL Technical Product Specification e Memory mapped I O that is dynamically allocated for PCI Conventional and PCI Express add in cards The amount of installed memory that can be used will vary based on add in cards and BIOS settings Figure 14 shows a schematic of the system memory map All installed system memory can be used when there is no overlap of system addresses 4GB Top of System Address Space PCI Memory Range contains PCI chipsets FLASH APIC Reserved 20 MB Direct Media Interface OFFFFFH DMI and ICH ranges approximately 750 MB OFOOOOH OEFFFFH ie Top of usable DRAM memory visible to the 0E0000H operating system ODFFFFH DRAM 0C0000H Range OBFFFFH 1 MB 640 KB DOS 0A0000H Compatibility lt OSFFFFH Memory 00000H S OMB rc gt Figure 14 Detailed System Memory Address Map 50 Upper BIOS area 64 KB Lower BIOS area 64 KB 16 KB x 4 Add in Card BIOS and Buffer area 128 KB 16 KB x 8 Standard PCI ISA Video Memory SMM Memory 128 KB DOS area 640 KB 1 MB 960 KB 896 KB 768 KB 640 KB 0 KB OM17140 Technical Reference 2 2 2 Memory Map Table 9 lists the system memory map Table 9 System Memory Map Address Range decimal Address Range hex Size Description 1024 K 4194304 K Extended memory 960 K 1024 K Runtime BIOS 896 K 960 K Reserved 800 K 89
56. er BIOS 2 Use the arrow keys to go to the Advanced Menu select Peripheral Configuration and then press the lt Enter gt key 3 Select the Trusted Platform Module press lt Enter gt and select Enabled and press lt Enter gt again display should show Trusted Platform Module Enabled 4 Press the lt F10 gt key select Ok and press lt Enter gt 5 System should reboot and start Microsoft Windows 1 13 6 Assuming Trusted Platform Module Ownership 44 Once the TPM has been enabled ownership must be assumed by using the Infineon Security Platform Software The owner end user should follow the steps listed below to take ownership of the TPM 1 Start the system 2 Launch the Infineon Security Platform Initialization Wizard 3 Create Owner password before creating any password review the Password Recommendations made earlier in this document 4 Create a new Recovery Archive note the file name and location 5 Specify a Security Platform Emergency Recovery Token password and location this password should not match the Owner password or any other password 6 Define where to save the Emergency Recovery Token note the file location and name 7 The software will then create recovery archive files and finalize ownership of the TPM 8 After completing the Infineon Security Platform Initialization Wizard the Emergency Recovery Token SPEmRecToken xml must be moved to a removable media floppy CDR flash media
57. es Thermally monitored closed loop fan control for all three fans that can adjust the fan speed or switch the fans on or off as needed SMBus interface For information about Refer to The location of the fan connectors and sensors for thermal monitoring Figure 12 page 33 Product Description 1 11 2 Thermal Monitoring Figure 12 shows the location of the sensors and fan connectors for the D915PBL board OM17055 Item Description A Thermal diode located on processor die B Remote ambient temperature sensor C Ambient temperature sensor internal to hardware monitoring and fan control ASIC D Processor fan E Rear chassis fan 1 F Front chassis fan G ATX fan optional H Rear chassis fan 2 Figure 12 Thermal Monitoring for D915PBL Board 33 Intel Desktop Board D915PBL Technical Product Specification 1 11 3 Fan Monitoring Fan monitoring can be implemented using Intel Desktop Utilities LANDesk software or third party software The level of monitoring and control is dependent on the hardware monitoring ASIC used with the Desktop Board For information about Refer to The functions of th
58. ess space is available Refer to Section 2 2 1 on page 49 for additional information on available memory Product Description 1 5 1 Memory Configurations The Intel 82915P MCH supports two types of memory organization e Dual channel Interleaved mode This mode offers the highest throughput for real world applications Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal If different speed DIMMs are used between channels the slowest memory timing will be used e Single channel Asymmetric mode This mode is equivalent to single channel bandwidth operation for real world applications This mode is used when only a single DIMM is installed or the memory capacities are unequal Technology and device width can vary from one channel to the other If different speed DIMMs are used between channels the slowest memory timing will be used Figure 3 illustrates the memory channel and DIMM configuration gt NOTE The DIMMO sockets of both channels are blue The DIMM1 sockets of both channels are black Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17054 Figure 3 Memory Channel and
59. etc if the file was not saved to a removable media during installation Once this is done the removable media should be stored in a secure location No copies of this Emergency Recovery Token file should remain on the system If a copy remains on the system it could be used to compromise the security of the platform 9 Launch the Infineon Security Platform User Initialization Wizard 10 Create a Basic User password this password is the most frequently used and should not match any other password 11 Select and configure Security Platform features for this user 12 After completing the Infineon Security Platform User Initialization Wizard a copy of the Emergency Recovery Archive SPEmRecArchive xml should be copied to a removable media and stored in a secure location This procedure should be repeated after any password changes or the addition of new users 13 Restart the system 14 To backup the keys for the EMBASSY Trust Suite the Key Transfer Manager software must be configured Launch the Key Transfer Manager from the program menu 15 16 17 18 19 1 13 7 1 13 7 1 Product Description Follow the instructions and create and document the locations for both the archive and restoration key files The key archive should be located on a removable media and stored in a secure location when not in use Create and document the password to protect the key archive Provide the TPM Owner password to allow the Key Tra
60. from hard disk failure they are not protected against system or TPM failure The very nature of a non migratable key is that they can be used on one and only one TPM In the event of a system or TPM failure all non migratable keys and the data associated with them will be inaccessible and unrecoverable CAUTION The following precautions and procedures may assist in recovering from any of the previously listed situations Failure to implement these security precautions and procedures may result in unrecoverable data loss 1 13 3 1 Password Procedures 42 The Infineon Security Platform software allows users to configure passwords from 6 to 255 characters A good password should consist of e At least one upper case letter A to Z e Atleast one numerical character 0 to 9 e At least one symbol character O amp etc Example Passwords I wear a Brown hat 2 worK least once a month or uJGFak amp adf35a9m NOTE Avoid using names or dates that can be easily guessed such as birthdays anniversaries family member names pet names etc All passwords associated with the Infineon Security Platform software Owner Emergency Recovery Token and User passwords and the Wave Systems EMBASSY Trust Suite are NOT RECOVERABLE and cannot be reset without the original text The system owner should document all passwords store them in a secured location vault safe deposit box off site storage etc and have them availab
61. g before setup Programming before setup complete To uncompress SETUP code and execute CMOS setup Returned from CMOS setup program and screen is cleared About to do programming after setup Programming after setup complete Going to display power on screen message First screen message displayed lt WAIT gt message displayed PS 2 Mouse check and extended BIOS data area allocation to be done Setup options programming after CMOS setup about to start Going for hard disk controller reset Hard disk controller reset done Floppy setup to be done next Floppy setup complete Hard disk setup to be done next Init of different buses optional ROMs from C800 to start See Section 4 3 for details of different buses Going to do any init before C800 optional ROM control Any init before C800 optional ROM control is over Optional ROM check and control will be done next Optional ROM control is done About to give control to do any required processing after optional ROM returns control and enable external cache Any initialization required after optional ROM test over Going to setup timer data area and printer base address Return after setting timer and printer base address Going to set the RS 232 base address Returned after RS 232 base address Going to do any initialization before Coprocessor test Required initialization before Coprocessor is over Going to initialize the Coprocessor next Coprocessor initialized Going to d
62. gratable keys Requirements Emergency Recovery Archive created with the Infineon Security Platform Initiation Wizard Emergency Recovery Token created with the Infineon Security Platform Initiation Wizard Emergency Recovery Token Security Password created with the Infineon Security Platform Initiation Wizard Working original operating system OS installation or a restored image of the hard drive Wave Systems Key Transfer Manager archive password TPM Ownership password This recovery procedure only restores the migratable keys from the previously created Recovery Archives 1 2 3 Replace the desktop board with the same model as the failed board Start the original operating system or restore the original hard drive image Start the Infineon Security Platform Initialization Wizard and check the I want to restore the existing Security Platform box 45 Intel Desktop Board D915PBL Technical Product Specification 4 Follow the instructions during the Security Platform Initialization and append the Emergency Recovery Archive to the existing archive 5 Provide all the necessary passwords files and file locations as requested It may take up to 20 minutes for Security Platform Initialization Wizard to restore the security platform settings 6 Start User Initialization Wizard Select Recover Your Basic User Key when prompted Specify the original Basic User Key password and proceed with the wizard 7 When re co
63. gulations Regulation FCC Class B ICES 003 Class B EN55022 1998 Class B EN55024 1998 AS NZS 3548 Class B CISPR 22 3 Edition Class B CISPR 24 1997 VCCI Class B 78 Title Title 47 of the Code of Federal Regulations Parts 2 and 15 Subpart B Radio Frequency Devices USA Interference Causing Equipment Standard Digital Apparatus Canada Limits and methods of measurement of Radio Interference Characteristics of Information Technology Equipment European Union Information Technology Equipment Immunity Characteristics Limits and methods of measurement European Union Australian Communications Authority Standard for Electromagnetic Compatibility Australia and New Zealand Limits and methods of measurement of Radio Disturbance Characteristics of Information Technology Equipment International Information Technology Equipment Immunity Characteristics Limits and Methods of Measurements International Voluntary Control for Interference by Information Technology Equipment Japan Technical Reference 2 15 2 1 FCC Compliance Statement USA Product Type D915PBL Desktop Board This device complies with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 This device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation This equipment has been tested and
64. gure 11 LAN Connector LED Locations Table 5 describes the LED states when the board is powered up and the 10 100 Mbits sec LAN subsystem is operating Table 5 LAN Connector LED States LED Color LED State Condition Green LAN link is not established LAN link is established Blinking LAN activity is occurring Yellow 10 Mbits sec data rate is selected 100 Mbits sec data rate is selected 1 10 2 Alert Standard Format ASF Support The board provides the following ASF support for PCI Express x1 bus add in LAN cards and PCI Conventional bus add in LAN cards installed in PCI Conventional bus slot 2 Monitoring of system firmware progress events including BIOS present Primary processor initialization Memory initialization Video initialization PCI resource configuration Hard disk initialization User authentication Starting operating system boot process Monitoring of system firmware error events including Memory missing Memory failure No video device Keyboard failure Hard disk failure No boot media Boot options to boot from different types of boot devices Reset shutdown power cycle and power up options 31 Intel Desktop Board D915PBL Technical Product Specification 1 10 3 LAN Subsystem Software LAN software and drivers are available from Intel s World Wide Web site For information about Refer to Obtaining LAN software and drivers Section 1 3 page 17 1 10 4 Intel Wireless Connect Technolog
65. he processor memory and USB ports Use the datasheets for add in cards such as PCI to determine the overall system power requirements The selection of a power supply at the system level is dependent on the system s usage model and not necessarily tied to a particular processor speed Table 34 DC Loading Characteristics DC Current at DC Power 5V 12 V 12 V Mode Minimum loading Maximum loading 2 11 2 Add in Board Considerations The board is designed to provide 2 A average of 5 V current for each add in board A fully loaded D915PBL board all six expansion slots and the PCI Express x16 slot filled must not exceed 14 A 2 11 3 Fan Connector Current Capability A CAUTION 72 The processor fan must be connected to the processor fan connector not to a chassis fan connector Connecting the processor fan to a chassis fan connector may result in onboard component damage that will halt fan operation Table 35 lists the current capability of the fan connectors Table 35 Fan Connector Current Capability Maximum Available Current 1000 mA 600 mA 600 mA 600 mA Fan Connector Processor fan Front chassis fan Rear chassis fan Rear chassis fan 2 Technical Reference 2 11 4 Power Supply Considerations A CAUTION The 5 V standby line for the power supply must be capable of providing adequate 5 V standby current Failure to do so can damage the power supply The total amount of stand
66. heck To look for optional video ROM and give control To give control to do any processing after video ROM returns control If EGA VGA not found then do display memory R W test EGA VGA not found Display memory R W test about to begin Display memory R W test passed About to look for the retrace checking Display memory R W test or retrace checking failed To do alternate Display memory R W test Alternate Display memory R W test passed To look for the alternate display retrace checking Video display checking over Display mode to be set next Display mode set Going to display the power on message Different buses init input IPL general devices to start if present See Section 4 3 for details of different buses Display different buses initialization error messages See Section 4 3 for details of different buses New cursor position read and saved To display the Hit lt DEL gt message continued Error Messages and Beep Codes Table 48 Runtime Code Uncompressed in F000 Shadow RAM continued Code 40 42 43 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 57 58 59 60 62 65 66 7F 80 81 82 83 Description of POST Operation To prepare the descriptor tables To enter in virtual mode for memory test To enable interrupts for diagnostics mode To initialize data to check memory wrap around at 0 0 Data initialized Going to check for memory wrap around at 0 0 and findi
67. hich the routines are being executed Table 51 Lower Nibble High Byte Functions Value Description Generic DIM Device Initialization Manager On board System devices ISA devices EISA devices ISA PnP devices PCI devices oy A o N oO 4 4 Speaker A 47 Q inductive speaker is mounted on the board The speaker provides audible error code beep code information during POST For information about Refer to The location of the onboard speaker Figure 1 page 14 4 5 BIOS Beep Codes 98 Whenever a recoverable error occurs during POST the BIOS displays an error message describing the problem see Table 52 The BIOS also issues a beep code one long tone followed by two short tones during POST if the video configuration fails a faulty video card or no card installed or if an external ROM module does not properly checksum to zero An external ROM module for example a video BIOS can also issue audible errors usually consisting of one long tone followed by a series of short tones For more information on the beep codes issued check the documentation for that external device There are several POST routines that issue a POST terminal error and shut down the system if they fail Before shutting down the system the terminal error handler issues a beep code signifying the test point error writes the error to I O port 80h attempts to initialize the video and writes the error in the upper left corner of the screen using both mo
68. i x16 Interface Intel 82915P 3 Intel 82801FR 4 Mbit PCI Express Memory Controller ge UO Controller Hub gt Firmware Hub x16 Hub MCH ICH6 R FWH Connector e BEE A 7 aad el Ga Intel 915P Chipset wel SI Se _Dual Channel 9 Memory Bus 3 TPM Component Channel A 5 6 Optional DIMMs 2 P SMBus OS Optional ChannelB lt S DIMMs 2 10 100 LAN PLC LAN Optional Connector IEEE 1394a Connectors PCI Bus Serial ATA Serial ATA IDE IDE Interface Connectors 4 PCI Bus y PCI Slot 1 PCISIOt 2 lt PCI Slot 3 PCI Slot 4 SMBus Hardware Monitoring and Fan Control ASIC connector or socket 16 High Definition Audio Link Front Panel Retasking Jack A E fs Panel Retasking Jack Ep Audio Codec Mic In Retasking Jack B _ Line In Retasking Jack C w Line Out Retasking Jack D 4 CD ROM S PDIF gt Tiel and LFE Retasking Jack CG Surround Left Right Retasking Jack H Figure 2 Block Diagram OM17131 Product Description 1 3 Online Support To find information about Visit this World Wide Web site Intel Desktop Board D915PBL under http www intel com design motherbd Desktop Board Products or Desktop Board Support http support intel com support motherboards desktop Available configurations for the Desktop http developer intel c
69. ialization Checkpoints IA cece 4 5 BIOS Beep Codes 4 1 BIOS Error Messages Table 45 lists the error messages and provides a brief description of each Table 45 BIOS Error Messages Error Message GA20 Error Pri Master HDD Error Pri Slave HDD Error Pri Master Drive ATAPI Incompatible Pri Slave Drive ATAPI Incompatible A Drive Error Cache Memory Bad CMOS Battery Low CMOS Display Type Wrong CMOS Checksum Bad CMOS Settings Wrong CMOS Date Time Not Set DMA Error FDC Failure HDC Failure Checking NVRAM Explanation An error occurred with Gate A20 when switching to protected mode during the memory test Could not read sector from corresponding drive Corresponding drive in not an ATAPI device Run Setup to make sure device is selected correctly No response from diskette drive An error occurred when testing L2 cache Cache memory may be bad The battery may be losing power Replace the battery soon The display type is different than what has been stored in CMOS Check Setup to make sure type is correct The CMOS checksum is incorrect CMOS memory may have been corrupted Run Setup to reset values CMOS values are not the same as the last boot These values have either been corrupted or the battery has failed The time and or date values stored in CMOS are invalid Run Setup to set correct values Error during read write test of DMA controller Error occurred trying to access diskette dr
70. ice type e Stereo input and output for all jacks e A signal to noise S N ratio of 90 dB S INTEGRATOR S NOTE For the front panel jack sensing and automatic retasking feature to function a front panel daughter card that is designed for Intel High Definition Audio must be used Otherwise an AC 97 style audio front panel connector will be assumed and the Line Out and Mic In functions will be permanent 1 9 1 Audio Subsystem Software Audio software and drivers are available from Intel s World Wide Web site For information about Refer to Obtaining audio software and drivers Section 1 3 page 17 1 9 2 Audio Connectors The board contains audio connector on both the back panel and the component side of the board The component side audio connectors include the following e Front panel audio a 2 x 5 pin connector that provides mic in and line out signals for front panel audio connectors e ATAPI CD ROM an optional 1 x 4 pin ATAPI style connector for connecting an internal ATAPI CD ROM drive to the audio mixer e S PDIF an optional 1 x 3 connector that provides S PDIF output signals The functions of the back panel audio connectors are dependent on which subsystem is present For information about Refer to The location of the front panel audio connector Figure 16 page 60 The signal names of the front panel audio connector Table 19 page 62 The location of the optional ATAPI CD ROM connector Figure 16 page 60 The signal
71. inaccessible No password recovery is available Read the Security Precautions for Password Procedures e Hard Drive Failure In the event of a failure of a hard disk or other storage media that contains encrypted data an image of the hard disk or other storage media must be restored from backup before access to encrypted data may become available The owner user should backup the system hard disk on a regular basis Read the Security Precautions below for Hard Drive Backup Procedures e Platform Failure In the event of a platform failure and or replacement of the motherboard recovery procedures may allow migratable keys to be recovered and may restore access to encrypted data All non migratable keys and their associated data will be lost Both the Infineon Security Platform software and Wave Systems EMBASSY Trust Suite utilize migratable keys Please check any other software that accesses the TPM for migratability Read the Security Precautions for Emergency Recovery File Back Up Procedures e Loss of Trusted Platform Module Ownership Trusted Platform Module Ownership contents may be cleared via a BIOS switch to allow for the transfer of a system to a new owner If TPM ownership is cleared either intentionally or in error recovery procedures may allow the migratable keys to be recovered and may restore access to encrypted data Read the Security Precautions for Emergency Recovery File Back Up Procedures 41 Intel Desktop Board D915PB
72. ing e Alternate power a 1 x 4 connector This connector provides additional power when using high wattage PCI Express x16 graphics cards INTEGRATOR S NOTE When using high wattage PCI Express x16 graphics cards use one of the following power supply configurations to avoid system instability e The preferred method of power delivery is to use a power supply with a 2 x 12 main power cable In this configuration use two connectors to provide power to the board The main power connector The ATX12V connector In this configuration the alternate power connector is not required The 2 x 12 main power cable can provide up to 144 W of power from the 12 V rail e Analternate method of power delivery is to use a power supply has a 2 x 10 main power cable In this configuration use three connectors to provide power to the board The main power connector The ATX12V connector The alternate power connector Table 26 Main Power Connector Pin Signal Name Pin Signal Name 1 3 3 V 13 3 3 V 2 3 3 V 14 12 V 3 Ground 15 Ground 4 5 V 16 PS ON power supply remote on off 5 Ground 17 Ground 6 5 V 18 Ground 7 Ground 19 Ground 8 PWRGD Power Good 20 No connect 9 5 V Standby 21 5 V 10 12 V 22 5 V 11 12 V Note 23 5 V Note 12 2 x 12 connector detect Note 24 Ground Note Note When using a 2 x 10 power supply cable this pin will be unconnected Technical Reference Table 27 ATX1
73. ional Processor fan connector Power connector Diskette drive connector Parallel ATA IDE connector Chassis intrusion connector Front chassis fan connector Serial ATA connector 1 Serial ATA connector 3 Serial ATA connector 2 Serial ATA connector 0 Auxiliary front panel power LED connector Front panel connector ATX fan connector optional Front panel USB connector Front panel USB connector Technical Reference 61 Intel Desktop Board D915PBL Technical Product Specification 62 Table 17 S PDIF Connector Optional Pin Signal Name 1 5 V 2 S PDIF Output 3 Ground Table 18 ATAPI CD ROM Connector Optional Pin Signal Name 1 Left audio input from CD ROM 2 CD audio differential ground 3 CD audio differential ground 4 Right audio input from CD ROM Table 19 Front Panel Audio Connector Pin Signal Name i Signal Name 1 Port E Port 1 Left Channel Ground 3 Port E Port 1 Right Channel Presence dongle present 5 Port F Port 2 Right Channel Port E Port 1 Sense return jack detection 7 Port E Port 1 and Port F Port 2 Key Sense send jack detection 9 Port F Port 2 Left Channel Port F Port 2 Sense return jack detection INTEGRATOR S NOTE The front panel audio connector is colored yellow Table 20 Serial Port B Connector optional Pin Signal Name i Signal Name 1 RXD 3 DTR 5 Ground DSR 7 CTS 9 Not connected Table 21 Chassis Intrusion Connector
74. ith the associated system power targets See the ACPI specification for a complete description of the various system and power States Table 7 Global States GO working state G1 sleeping state G1 sleeping state G1 sleeping state G2 S5 G3 mechanical off AC power is disconnected from the computer Notes Processor Sleeping States States SO working CO working S1 Processor stopped S3 Suspend to RAM Context saved to RAM S4 Suspend to disk Context saved to disk S5 Soft off Context not saved Cold boot is required No power to the system C1 stop grant 1 Total system power is dependent on the system configuration including add in boards and peripherals powered by the system chassis power supply Power States and Targeted System Power Device States DO working state D1 D2 D3 device specification specific D3 no power except for wake up logic D3 no power except for wake up logic D3 no power except for wake up logic D3 no power for wake up logic except when provided by battery or external source Targeted System Power Note 1 Full power gt 30 W 5 W lt power lt 52 5 W Power lt 5 W Note 2 Power lt 5 W Note 2 Power lt 5 W Note 2 No power to the system Service can be performed safely 2 Dependent on the standby power consumption of wake up devices
75. itialization e Support for Active State Power Management ASPM e SMBus 2 0 support e Wake signal supporting wake events from ACPI S1 S3 S4 or S5 e Software compatible with the PCI Power Management Event PME mechanism defined in the PCI Power Management Specification Rev 1 1 1 8 1 0 Controller 26 The I O controller provides the following features e Two serial ports Serial Port B is optional e One parallel port with Extended Capabilities Port ECP and Enhanced Parallel Port EPP support e Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems e PS 2 style mouse and keyboard interfaces e Interface for one 1 44 MB or 2 88 MB diskette drive e Intelligent power management including a programmable wake up event interface e PCI Conventional bus power management support The BIOS Setup program provides configuration options for the I O controller Product Description 1 8 1 Serial Ports The Desktop Board can support up to two serial port connectors Serial port A is located on the back panel Serial port B optional is accessible using a connector on the component side of board The serial ports support data transfers at speeds up to 115 2 kbits sec with BIOS support For information about Refer to The location of the serial port A connector Figure 15 page 58 The location of the serial port B connector Figure 16 page 60 The signal names of the serial port B connector Table 20
76. ive controller Error occurred trying to access hard disk controller NVRAM is being checked to see if it is valid continued 91 Intel Desktop Board D915PBL Technical Product Specification Table 45 BIOS Error Messages continued Error Message Explanation Update OK NVRAM was invalid and has been updated Updated Failed NVRAM was invalid but was unable to be updated Keyboard Error Error in the keyboard connection Make sure keyboard is connected properly KB Interface Error Keyboard interface test failed Memory Size Decreased Memory size has decreased since the last boot If no memory was removed then memory may be bad Memory Size Increased Memory size has increased since the last boot If no memory was added there may be a problem with the system Memory Size Changed Memory size has changed since the last boot If no memory was added or removed then memory may be bad No Boot Device Available System did not find a device to boot Off Board Parity Error A parity error occurred on an off board card This error is followed by an address On Board Parity Error A parity error occurred in onboard memory This error is followed by an address Parity Error A parity error occurred in onboard memory at an unknown address NVRAM CMOS PASSWORD cleared by NVRAM CMOS and passwords have been cleared The system Jumper should be powered down and the jumper removed lt CTRL_N gt Pressed CMOS is ignored and NVRAM is cleared User m
77. le for future use These documents should be updated after any password changes Product Description 1 13 3 2 Emergency Recovery File Back Up Procedures The Emergency Recovery Token SPEmRecToken xml must be saved or moved to a removable media floppy USB drive CDR flash media etc Once this is done the removable media should be stored in a secure location DO NOT LEAVE ANY COPIES of the Emergency Recovery Token on the hard drive or within any hard drive image backups If a copy of the Emergency Recovery Token remains on the system it could be used to compromise the Trusted Platform Module and platform After completing the Infineon Security Platform User Initialization Wizard a copy of the Emergency Recovery Archive SPEmRecArchive xml should be copied to a removable media and stored in a secure location This procedure should be repeated after any password changes or the addition of a new user 1 13 3 3 Hard Drive Image Backup Procedures To allow for emergency recovery from a hard drive failure frequent images of the hard drive should be created and stored in a secure location In the event of a hard drive failure the latest image can be restored to a new hard drive and access to the encrypted data may be re established gt NOTE All encrypted and unencrypted data that was added after the last image was created will be lost 1 13 3 4 Clear Text Backup Optional It is recommended that system owners follow the Hard Drive Im
78. m memory Refer to Section 2 2 1 on page 49 for information on the total amount of addressable memory e Minimum total system memory 128 MB e Non ECC DIMMs e Serial Presence Detect e DDR2 533 MHz or DDR2 400 MHz SDRAM DIMMs NOTES e Remove the PCI Express x16 video card before installing or upgrading memory to avoid interference with the memory retention mechanism e To be fully compliant with all applicable DDR SDRAM memory specifications the board should be populated with DIMMs that support the Serial Presence Detect SPD data structure This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance If non SPD memory is installed the BIOS will attempt to correctly configure the memory settings but performance and reliability may be impacted or the DIMMs may not function under the determined frequency Table 4 lists the supported DIMM configurations Table 4 Supported Memory Configurations DIMM oom Se E SDRAM Organization Number of SDRAM Capacity Configuration pene Front side Back side Devices 2048 MB DS 1 Gbit 128 M x 8 128Mx8 16 Note In the second column DS refers to double sided memory modules containing two rows of SDRAM and SS refers to single sided memory modules containing one row of SDRAM INTEGRATOR S NOTE It is possible to install four 2048 MB 2 GB modules for a total of 8 GB of system memory however only 4 GB of addr
79. n declare under our sole responsibility that the product Intel Desktop Board D915PBL is in conformity with all applicable essential requirements necessary for CE marking following the provisions of the European Council Directive 89 336 EEC EMC Directive and Council Directive 73 23 EEC Safety Low Voltage Directive The product is properly CE marked demonstrating this conformity and is for distribution within all member states of the EU with no restrictions C This product follows the provisions of the European Directives 89 336 EEC and 73 23 EEC Dansk Dette produkt er i overensstemmelse med det europ iske direktiv 89 336 EEC amp 73 23 EEC Dutch Dit product is in navolging van de bepalingen van Europees Directief 89 336 EEC amp 73 23 EEC 79 Intel Desktop Board D915PBL Technical Product Specification Suomi T m tuote noudattaa EU direktiivin 89 336 EEC amp 73 23 EEC m r yksi Fran ais Ce produit est conforme aux exigences de la Directive Europ enne 89 336 EEC amp 73 23 EEC Deutsch Dieses Produkt entspricht den Bestimmungen der Europ ischen Richtlinie 89 336 EEC amp 73 23 EEC Icelandic Pessi vara stenst regluger Evr pska Efnahags Bandalagsins n mer 89 336 EEC amp 73 23 EEC Italiano Questo prodotto conforme alla Direttiva Europea 89 336 EEC amp 73 23 EEC Norsk Dette produktet er 1 henhold til bestemmelsene 1 det europeiske direktivet 89 336 EEC amp 73 23 EEC Portuguese Este
80. nannncnononcnnnnnnnns 43 Intel Desktop Board D915PBL Technical Product Specification 1 13 5 Enabling the Trusted Platform Module 44 1 13 6 Assuming Trusted Platform Module Ownership oooooooccccnnccccnnccnaoccccnoncccnnnnnns 44 1 13 7 Recovery PICAS i ieee Nendo ie nde eens 45 1 13 8 Clearing Trusted Platform Module Ownershinp 46 113 9 DOUE Ud 47 2 Technical Reference 2 1 ug te ier Le iii A serge Gund IAE TOS 49 2 2 Memory Resources mx dina apes no eee ees ect eee eee eee 49 2 2 1 Addressable Memory scsi iii 49 2 2 2 Memory AID EE 51 PRE DMA GRacias 51 24 EXE VO MAD aria A a a a 52 2 5 PCI Configuration Space Matt ugereegt 53 cb ANterrupiSiiaaranis canas dada Ed a ai ai 54 2 7 PCI Conventional Interrupt Routing Map 55 O ss E EE Ee 57 2 8 1 Back Panel COMECIONS cuca 58 2 8 2 Component side Connechors ttrt ttAttEEEEAAEEEEEEEEEEEEEEEEEn 60 2 9 Jumper Blocker EES 69 2 10 Mechanical COnSiderations 0 it 70 2 10 1 D915PBL Board Form Rc Pursisid iaa ias 70 210 2 WO Shield cosita eee tee 71 2 11 El tri al Considerations usais o asis 72 2 Mil DG LON crac cdt 72 2 11 2 Add in Board Considerations econo is leales tod cia 72 2 11 3 Fan Connector Current Capability ooooooocccnnnnccnnnccccccccncnncccnnnnanancncnnnncnnnnnnnns 72 2 11 4 Power Supply Considerations cccccccccceceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeeeees 73 2 12 Thermal Considerations ii A a Meco 74 Se eut ee 76 2 14 Environmental nui dadas a
81. ne logical drive As data is written or retrieved from the logical drive both drives operate in parallel thus increasing the throughput e RAID 1 supports data mirroring Two physical drives of identical size maintain duplicate sets of all data on separate disk drives Level 1 provides the highest data reliability because two complete copies of all information are maintained 1 6 2 4 RAID Boot Configuration Overview A RAID array can be created by using the existing Serial ATA ports correctly configuring the BIOS and installing drivers The following steps are required to successfully establish a RAID configuration 1 Enable RAID Support in BIOS 2 Create a RAID array using the Intel Application Accelerator IAA utility 3 Install the IAA RAID driver 4 Format the RAID array 5 Install the AA Companion Utility this step is optional For information about Refer to Serial ATA RAID configuration http developer intel com design motherbd bl index htm 1 6 2 5 SCSI Hard Drive Activity LED Connector Optional The SCSI hard drive activity LED connector is a 1 X 2 pin connector that allows an add in hard drive controller to use the same LED as the onboard IDE controller For proper operation this connector should be wired to the LED output of the add in hard drive controller The LED indicates when data is being read from or written to either the add in hard drive controller or the onboard IDE controller Parallel ATA or Serial
82. nfiguring the Personal Secure Drive select I want to change my Personal Secure Drive setting confirm the drive letter and name are correct and then proceed through the rest of the wizard 8 Restart the system when requested 9 To restore access to the EMBASSY Trust Suite right mouse click on the Key Transfer Manager icon located in the taskbar in the lower right corner of the screen and select Restore TPM Keys 10 Provide all the necessary passwords files and file locations as requested by the Key Transfer Manager 11 Upon successful completion of all steps you should be able to access previously encrypted files 1 13 8 Clearing Trusted Platform Module Ownership A WARNING 46 Disconnect the desktop board s power supply from its AC power source before you connect or disconnect cables or install or remove any board components Failure to do this can result in personal injury or equipment damage Some circuitry on the desktop board can continue to operate even though the front panel power switch is off CAUTION DATA ENCRYPTED BY ANY PROGRAM UTILIZING THE TPM WILL BECOME INACCESSIBLE IF TPM OWNERSHIP IS CLEARED Recovery procedures may allow the migratable keys to be recovered and might restore access to encrypted data Review the Recovery Procedures for detailed instructions The TPM may be cleared to transfer ownership of the platform to a new owner Observe precautions in the above WARNING then open the system cas
83. ng the total system memory size Memory wrap around test done Memory size calculation over About to go for writing patterns to test memory Pattern to be tested written in extended memory Going to write patterns in base 640k memory Patterns written in base memory Going to find out amount of memory below 1M memory Amount of memory below 1M found and verified Going to find out amount of memory above 1M memory Amount of memory above 1M found and verified Check for soft reset and going to clear memory below 1M for soft reset If power on go to check point 4Eh Memory below 1M cleared SOFT RESET Going to clear memory above 1M Memory above 1M cleared SOFT RESET Going to save the memory size Go to check point 52h Memory test started NOT SOFT RESET About to display the first 64k memory size Memory size display started This will be updated during memory test Going for sequential and random memory test Memory testing initialization below 1M complete Going to adjust displayed memory size for relocation shadow Memory size display adjusted due to relocation shadow Memory test above 1M to follow Memory testing initialization above 1M complete Going to save memory size information Memory size information is saved CPU registers are saved Going to enter in real mode Shutdown successful CPU in real mode Going to disable gate A20 line and disable parity NMI A20 address line parity NMI disable successful
84. nochrome and color adapters If POST completes normally the BIOS issues one short beep before passing control to the operating system Table 52 Beep Codes Beep Description CPU error Memory error System failure System failure NI OI wow Video error
85. nsfer Manager to create the archive and restoration key files Upon completing the configuration of the Key Transfer Manager it will place an icon in the task bar and automatically back up all new and updated keys associated with the EMBASSY Trust Suite If the removable media that contains the archive file is not present when a new key is generated then keys will have to be manually backed up using the Key Transfer Manager when the removable media is available All passwords associated with the Infineon Security Platform Software Owner Emergency Recovery Token and User passwords and Wave Systems EMBASSY Trust Suite and Key Transfer Manager are not recoverable and cannot be reset without the original text These passwords should be documented and stored in a secured location vault safe deposit box off site storage etc in case they are needed in the future These documents and files should be updated after any password changes Recovery Procedures Recovering from Hard Disk Failure Restore the latest hard drive image from backup to the new hard drive no TPM specific recovery 1s necessary 1 13 7 2 Recovering from Desktop Board or TPM Failure This procedure may restore the migratable keys from the Emergency Recovery Archive and does not restore any previous keys or content to the TPM This recovery procedure may restore access to the Infineon Security Platform software and Wave Systems EMBASSY Trust Suite that are secured with mi
86. nt Panel Power Sleep LED Connector A 66 Front Panel DONNA AAA A ATA AA TARA ease AA 66 States for a One Color Power LED 67 States for a Two Color Power LED cuicos adi 67 BIOS Setup Configuration Jumper Geitngs 69 DO Loading Characteristics incas e a eee 72 Fan Connector Current Capability oooooonnnonncccnnnnccinnncnnocccnnnncnonannnanoncnnnnnnnnnnnnn nn nc 72 Thermal Considerations for COMPONENTS oooooooococccccnccnnnnnnnnnnnnnnnnonononnnnnnnnnnnnnononnnnnnnns 76 Environmental SpeciicationS ss uti id 77 e Ee EE 78 EMC Regulations cusco 78 Product Certification MSEKIEI IE ed ect EN BIOS Setup Program Menu Barak Eege 84 BIOS Setup Program Function Keys cocina id 84 Boot Device Menu Options cccccccccccceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseseeeeeneneees 87 Supervisor and User Password Functions cccccccccccccccccceceeececeecececeeeeeeeeeeeeeeeeeess 89 BIOS Error MESSAGES EE 91 Uncompressed INIT Code Checkpooimts AAA 93 47 48 49 51 52 Contents Boot Block Recovery Code Checkpoints AA 93 Runtime Code Uncompressed in F000 Shadow RAM sssennnsnnnnnnnnennsnnnnrenneeesnenna 94 Bus Initialization Checkpoints acia ia Ra 97 Upper Nibble High Byte Functions 97 Lower Nibble High Byte FUNCHONS e disci eel ob hia ee es 98 NN A A E E ee ee ee E A 98 Intel Desktop Board D915PBL Technical Product Specification 1 Product Description What This Chapter Contains 4 4 4
87. o any initialization after Coprocessor test Initialization after Coprocessor test is complete Going to check extended keyboard keyboard ID and num lock Going to display any soft errors Soft error display complete Going to set keyboard typematic rate Keyboard typematic rate set To program memory wait states Going to enable parity NMI NMI and parity enabled Going to do any initialization required before giving control to optional ROM at E000 Initialization before E000 ROM control over E000 ROM to get control next Returned from E000 ROM control Going to do any initialization required after E000 optional ROM control Initialization after E000 optional ROM control is over Going to display the system configuration Put INT13 module runtime image to shadow Generate MP for multiprocessor support if present Put CGA INT10 module if present in Shadow continued Error Messages and Beep Codes Table 48 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation AE Uncompress SMBIOS module and init SMBIOS code and form the runtime SMBIOS image in shadow B1 Going to copy any code to specific area 00 Copying of code to specific area done Going to give control to INT 19 boot loader 4 3 Bus Initialization Checkpoints The system BIOS gives control to the different buses at several checkpoints to do various tasks Table 49 describes the bus initialization checkpoints Table 49 Bus
88. oard Dimensions ia lnea 70 22 tO Shield DIMENSIONS civic et ante edited eee 71 23 Processor Heatsink for Omni directional Aitlow 74 24 Localized High Temperature Zones nana 75 vii Intel Desktop Board D915PBL Technical Product Specification Tables viii Feature SUMMA Vaticana esca 12 Manufacturing Options usina 13 D915PBL Board Components Shown in Figure 1 15 Supported Memory Configurations ANEN 18 LAN Connector LED States iii a a A EARE a wana 31 Effects of Pressing the Power Switch EEN 35 Power States and Targeted System Power EEN 36 Wake up Devices and Events 37 System Memory Map EE 51 DMA CHAM MGS A A E EEE R E 51 VOI MAD ita arar osa 52 PCI Configuration Space Map sans A e d 53 Srita A A A Aas EE ee 54 PCI Interrupt oppe MAD siii dat 56 Back Panel Connectors Shown in Figure 18 59 Component side Connectors Shown in Figure 18 61 E NIE e CIE 62 ATAPI CD ROM Connector Optional 62 Front Panel Audio Connector iia AA eesti Giana be 62 Serial Port B Connector optional ENEE 62 BIEN ele ee EE 62 SCSI Hard Drive Activity LED Connector Optional 63 Serial A TA COMBO E 63 Processor Fan CONAN 63 Chassis Fan GOnn ctors sisc csccciescscccetectucetatsacenctedaccataacaceasdadaucadateaceactedaceataasaceaudadaccane 63 Main Power Connector ionene A means 64 ATX12V e ee leede 65 Alternate Power Connector cooooooocccccccncncncnnnnnnnnnnnnnnnononnnnnnnnnnnononnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnns 65 Auxiliary Fro
89. om USB 1 12 2 7 Wake from PS 2 Devices PS 2 device activity wakes the computer from an ACPI S1 or S3 state 1 12 2 8 PME Signal Wake up Support When the PME signal on the PCI Conventional bus is asserted the computer wakes from an ACPI S1 S3 S4 or S5 state with Wake on PME enabled in BIOS 39 Intel Desktop Board D915PBL Technical Product Specification 1 12 2 9 WAKE Signal Wake up Support When the WAKE signal on the PCI Express bus is asserted the computer wakes from an ACPI S1 S3 S4 or S5 state 1 12 2 10 5 V Standby Power Indicator LED The 5 V standby power indicator LED shows that power is still present even when the computer appears to be off Figure 13 shows the location of the standby power indicator LED on the D915PBL board A CAUTION If AC power has been switched off and the standby power indicator is still lit disconnect the power cord before installing or removing any devices connected to the board Failure to do so could damage the board and any attached devices OM17056 Figure 13 Location of the Standby Power Indicator LED
90. om design motherbd bl bl_available htm Board D915PBL Processor data sheets http www intel com design litcentr ICH6 R addressing http developer intel com design chipsets datashts Custom splash screens http intel com design motherbd gen_indx htm Audio software and utilities http www intel com design motherbd LAN software and drivers http www intel com design motherbd 1 4 Processor The board is designed to support Intel Pentium 4 processors in an LGA775 processor socket with an 800 or 533 MHz system bus See the Intel web site listed below for the most up to date list of supported processors For information about Refer to Supported processors for the D915PBL board http www intel com design motherbd bl bl_proc htm A CAUTION Use only the processors listed on web site above Use of unsupported processors can damage the board the processor and the power supply S INTEGRATOR S NOTE Use only ATX12V compliant power supplies For information about Refer to Power supply connectors Section 2 8 2 2 page 64 17 Intel Desktop Board D915PBL Technical Product Specification 1 5 System Memory The board has four DIMM sockets and support the following memory features e 1 8 V only DDR2 SDRAM DIMMs with gold plated contacts e Unbuffered single sided or double sided DIMMs with the following restriction Double sided DIMMS with x16 organization are not supported e 4GB maximum total syste
91. or Figure 16 page 60 1 6 2 2 Serial ATA Interfaces 24 The ICH6 R s Serial ATA controller offers four independent Serial ATA ports with a theoretical maximum transfer rate of 150 MB s per port One device can be installed on each port for a maximum of four Serial ATA devices A point to point interface is used for host to device connections unlike Parallel ATA IDE which supports a master slave configuration and two devices per channel For compatibility the underlying Serial ATA functionality is transparent to the operating system The Serial ATA controller can operate in both legacy and native modes In legacy mode standard IDE I O and IRQ resources are assigned IRQ 14 and 15 In Native mode standard PCI Conventional bus resource steering is used Native mode is the preferred mode for configurations using the Windows XP and Windows 2000 operating systems NOTE Many Serial ATA drives use new low voltage power connectors and require adaptors or power supplies equipped with low voltage power connectors For more information see http www serialata org For information about Refer to The location of the Serial ATA IDE connectors Figure 16 page 60 Product Description 1 6 2 3 Serial ATA RAID The ICH6 R supports RAID Redundant Array of Independent Drives level 0 and RAID level 1 on the Serial ATA ports as follows e RAID 0 supports data striping Two physical drives of identical size can be teamed together to create o
92. page 62 1 8 2 Parallel Port The 25 pin D Sub parallel port connector is located on the back panel Use the BIOS Setup program to set the parallel port mode For information about Refer to The location of the parallel port connector Figure 15 page 58 1 8 3 Diskette Drive Controller The I O controller supports one diskette drive Use the BIOS Setup program to configure the diskette drive interface For information about Refer to The location of the diskette drive connector Figure 16 page 60 1 8 4 Keyboard and Mouse Interface PS 2 keyboard and mouse connectors are located on the back panel gt NOTE The keyboard is supported in the bottom PS 2 connector and the mouse is supported in the top PS 2 connector Power to the computer should be turned off before a keyboard or mouse is connected or disconnected For information about Refer to The location of the keyboard and mouse connectors Figure 15 page 58 27 Intel Desktop Board D915PBL Technical Product Specification 1 9 Audio Subsystem The board supports the Intel High Definition audio subsystem based on the Realtek ALC880 codec The audio subsystem supports the following features e Advanced jack sense front and rear panel that enables the audio codec to recognize the device that is connected to an audio port All jacks are capable of retasking according to user s definition or can be automatically switched depending on the recognized dev
93. rnate power connector 12V power connector ATX12V LGA775 processor socket Processor fan connector Intel 82915P MCH DIMM Channel A sockets Serial port B connector optional DIMM Channel B sockets SCSI LED optional 1 O controller Power connector Diskette drive connector Parallel ATE IDE connector Battery Chassis intrusion connector BIOS Setup configuration jumper block 4 Mbit Firmware Hub FWH Front chassis fan connector Serial ATA connectors Auxiliary front panel power LED connector Front panel connector ATX fan connector optional Front panel USB connector Intel 82801FR I O Controller Hub ICH6 R Front panel IEEE 1394a connectors IEEE 1394a controller PCI Conventional bus add in card connectors Product Description 15 Intel Desktop Board D915PBL Technical Product Specification 1 2 4 Block Diagram Figure 2 is a block diagram of the major functional areas of the board LAN Gigabit Ethernet SEIN a Controller Optional Connector PCIE 1 Sie Ee USB Back Panel Front Panel PCI Express x1 Slot 2 USB Ports Serial Ports _ LPC Bus Parallel ATA Parallel ATA a oe ee A IDE Connector IDE Interface Controller WPS Mouse PS 2 Keyboard _ LGA775 System Bus Diskette Drive Processor Socket 800 533 MHz Connector LPC Bus PCI Express Le eya M Y w
94. rupt on add in cards that require two or more interrupts is classified as INTB This is not an absolute requirement e INTC and INTD Generally a third interrupt on add in cards is classified as INTC and a fourth interrupt is classified as INTD The ICH6 R has eight Programmable Interrupt Request PIRQ input signals All PCI Conventional interrupt sources either onboard or from a PCI Conventional add in card connect to one of these PIRQ signals Some PCI Conventional interrupt sources are electrically tied together on the board and therefore share the same interrupt Table 14 shows an example of how the PIRQ signals are routed For example using Table 14 as a reference assume an add in card using INTA is plugged into PCI Conventional bus connector 3 In PCI bus connector 3 INTA is connected to PIRQB which is already connected to the ICH6 R audio controller The add in card in PCI Conventional bus connector 3 now shares an interrupt with the onboard interrupt source 55 Intel Desktop Board D915PBL Technical Product Specification Table 14 PCI Interrupt Routing Map PCI Interrupt Source IEEE 1394a controller PCI bus connector 1 PCI bus connector 2 PCI bus connector 3 PCI bus connector 4 gt NOTE In PIC mode the ICH6 R can connect each PIRQ line internally to one of the IRQ signals 3 4 5 6 7 9 10 11 12 14 and 15 Typically a device that does not share a PIRQ line will have a unique interrupt However in certain in
95. s 77 245 Regulatory EERSTEN dee RE e Aen 78 2 15 1 Safety Regulations cocoa 78 215 2 EMC Regulations prene iia 78 2 15 3 European Union Declaration of Conformity Statement ooonnnnnnnnccnnnnnicinnnnns 79 2 15 4 Product Ecology Gtatements uk 80 2 15 5 Product Certification Markings Board Level 81 Overview of BIOS Features Sel WATOCUCTION id A A ET 83 3 2 BIOS Flash Memory Organization sisi iii iia 84 3 3 Resource Configuration t tol sl A ae 84 3 3 1 PCI Autoconfiguration wine ee aa a eae ane aaa 84 3 3 2 PCI IDE GU pOT animist a a E a E aS 84 3 4 System Management BIOS MIO 85 3 5 Legacy USB SUD DOM cta aaa 85 36 BIOS Updates ai 86 3 6 1 language SUP POM EE 86 vi Contents 3 6 2 Custom Splash SCN acts oe eee eM oe ee ee 86 kee ELL E 87 3 7 1 CD ROM Boot tainted alien enn 87 3 7 2 Network Boot eer ccs cosas a tunes 87 3 7 3 Booting Without Attached Devices nnne 87 3 7 4 Changing the Default Boot Device During POST 87 3 8 Fast Booting Systems with Intel Rapid BIOS DGoot 88 3 8 1 Peripheral Selection and Configuration cccceeeeceeeeeeeeeeeeeeeeeeeeeeeaeees 88 3 8 2 Intel Rapid BIOS BOE usas ii 88 TT 89 4 Error Messages and Beep Codes 4 1 BIOS Error Messages vicio a E y 91 42 Port SON POST Codes cuac ori 93 4 3 BUS Initialization Checkpoints TT 97 44 e E E saepeatHepaeetec aul 98 4 5 BIOS Beep DOOS EEN 98 Figures 1 D915PBL Board Components sicnnscagnsidvdvianveacindwasioa
96. s cocina iets ieee 13 1 2 3 Board EE ee ee A 14 1 2 4 BlOCk DIO AM candado 16 Online e en 17 PROCESS LE 17 System Memory EEN 18 1 5 1 Energie Ee TEE 19 EA A a A 23 1 6 1 USD asno dai 23 1 6 2 IDE Tele EE E 23 1 6 3 Real Time Clock CMOS SRAM and Batten 25 POIL Express E EC 26 ee el 26 1 8 1 Uer 27 1 8 2 Parallel POM tit SS SS A ee 27 1 8 3 Diskette Drive Controller cosita coto lt otrora co 27 1 8 4 Keyboard and Mouse Interface cocino 27 le e Subsystem EE EE 28 1 9 1 Audio EE EE 28 1 9 2 A dio eene 28 1 9 3 8 Channel 7 1 Audio Gubevstem ANNE 29 LAN SUD e E 30 1 10 1 Intel 82562EZ Physical Layer Interface Device ooocoiicccnnnnciccncnccninccnnons 30 1 10 2 Alert Standard Format ASF Support m oooocccccncccccnncnoooncnnnncncnnnnananoncnnnnnnnnnnnnns 31 1 10 3 LAN Subsystem Software ssccocticrarica nilo el aa 32 1 10 4 Intel Wireless Connect Technology Optional 32 Hardware Management Subsystem kee 32 1 11 1 Hardware Monitoring and Fan Control AGINN 32 Tet Thermal MONTON csc soul ten es A A cea ated lia ae 33 LS Fal le e tie Le aida da tes t 34 1 11 4 Chassis Intrusion and Detechon EEN 34 Power Eet 34 UNE WE A ceca oa sa ee tee nets Seana ean wre ese een enter 35 112 2 Hardware SUPRA A naw a 37 Trusted Platform Module Optional 41 LASA System Requirements asias ias 41 1 13 2 Warning of Potential Dataloes nanena 41 1 13 3 Security EE 42 1 13 4 Trusted Platform Module Ownership ooooocccccncccccnncooonnccnoncnonann
97. t Specification 1 5 1 2 Single Channel Asymmetric Mode Configurations gt NOTE Dual channel Interleaved mode configurations provide the highest memory throughput Figure 7 shows a single channel configuration using one DIMM In this example only the DIMMO blue socket of Channel A is populated Channel B is not populated Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17125 Figure 7 Single Channel Asymmetric Mode Configuration with One DIMM Figure 8 shows a single channel configuration using three DIMMs In this example the combined capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the DIMMO blue socket of Channel B Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 OM17126 Figure 8 Single Channel Asymmetric Mode Configuration with Three DIMMs 22 Product Description 1 6 Intel 915P Chipset The Intel 915P chipset consists of the following devices e Intel 82915P Memory Controller Hub MCH with Direct Media Interface DMI interconnect e Intel 82801 FR I O Controller Hub ICH6 R with DMI interconnect e Firmware Hub FWH The MCH is a centralized controller for the system bus the memory bus the PCI Express bus and the DMI interconnect The ICH6 R is a centralized controller for the board s I O paths The FWH provi
98. terrupt constrained situations it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal Refer to Table 13 for the allocation of PIRQ lines to IRQ signals in APIC mode 56 ICH6 R PIRQ Signal Name mm e s mm we ma e o O me m m m PCI interrupt assignments to the USB ports Serial ATA ports and PCI Express ports are dynamic Technical Reference 2 8 Connectors A CAUTION Only the following connectors have overcurrent protection back panel USB front panel USB and PS 2 The other internal connectors are not overcurrent protected and should connect only to devices inside the computer s chassis such as fans and internal peripherals Do not use these connectors to power devices external to the computer s chassis A fault in the load presented by the external devices could cause damage to the computer the power cable and the external devices themselves This section describes the board s connectors The connectors can be divided into these groups e Back panel I O connectors see page 58 e Component side I O connectors see page 60 57 Intel Desktop Board D915PBL Technical Product Specification 2 8 1 Back Panel Connectors Figure 15 shows the location of the back panel connectors The back panel connectors are color coded The figure legend Table 15 lists the colors used when applicable
99. ting transfer rates of up to 16 MB sec 23 Intel Desktop Board D915PBL Technical Product Specification e Ultra DMA DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 33 MB sec e ATA 66 DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB sec ATA 66 protocol is similar to Ultra DMA and is device driver compatible e ATA 100 DMA protocol on IDE bus allows host and target throttling The ICH6 R s ATA 100 logic can achieve read transfer rates up to 100 MB sec and write transfer rates up to 88 MB sec gt NOTE ATA 66 and ATA 100 are faster timings and require a specialized cable to reduce reflections noise and inductive coupling The Parallel ATA IDE interface also supports ATAPI devices such as CD ROM drives and ATA devices using the transfer modes The BIOS supports Logical Block Addressing LBA and Extended Cylinder Head Sector ECHS translation modes The drive reports the transfer rate and translation mode to the BIOS The board supports Laser Servo LS 120 diskette technology through the Parallel ATA IDE interfaces An LS 120 drive can be configured as a boot device by setting the BIOS Setup program s Boot menu to one of the following e ARMD FDD ATAPI removable media device floppy disk drive e ARMD HDD ATAPI removable media device hard disk drive For information about Refer to The location of the Parallel ATA IDE connect
100. to optimize capacity and performance To take advantage of the high capacities typically available today hard drives are automatically configured for Logical Block Addressing LBA and 84 Overview of BIOS Features to PIO Mode 3 or 4 depending on the capability of the drive You can override the auto configuration options by specifying manual configuration in the BIOS Setup program To use ATA 66 100 features the following items are required e An ATA 66 100 peripheral device e An ATA 66 100 compatible cable e ATA 66 100 operating system device drivers gt NOTE Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device For example do not connect an ATA hard drive as a slave to an ATAPI CD ROM drive 3 4 System Management BIOS SMBIOS SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the Management Information Format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as third party management software to use SMBIOS The BIOS stores and reports the following SMBIOS information e BIOS data such as the BIOS
101. umper is set to configure mode and the computer is powered up the BIOS compares the processor version and the microcode version in the BIOS and reports if the two match OM17061 Figure 20 Location of the Jumper Block Table 33 BIOS Setup Configuration Jumper Settings Function Mode Jumper Setting Configuration Normal The BIOS uses current configuration information and passwords for booting Configure After the POST runs Setup runs automatically The maintenance menu is displayed Recovery The BIOS attempts to recover the BIOS configuration A recovery diskette is required 69 Intel Desktop Board D915PBL Technical Product Specification 2 10 Mechanical Considerations 2 10 1 D915PBL Board Form Factor The D915PBL board is designed to fit into an ATX form factor chassis Figure 21 illustrates the mechanical form factor of the board Dimensions are given in inches millimeters The outer dimensions are 12 00 inches by 9 60 inches 304 80 millimeters by 243 84 millimeters Location of the I O connectors and mounting holes are in compli
102. up Program Function Key Description lt gt Or lt gt Selects a different menu screen Moves the cursor left or right lt P gt or lt gt Selects an item Moves the cursor up or down lt Tab gt Selects a field Not implemented lt Enter gt Executes command or selects the submenu lt F9 gt Load the default configuration values for the current menu lt F10 gt Save the current values and exits the BIOS Setup program lt Esc gt Exits the menu 3 2 BIOS Flash Memory Organization The Firmware Hub FWH includes a 4 Mbit 512 KB symmetrical flash memory device 3 3 Resource Configuration 3 3 1 PCI Autoconfiguration The BIOS can automatically configure PCI devices PCI devices may be onboard or add in cards Autoconfiguration lets a user insert or remove PCI cards without having to configure the system When a user turns on the system after adding a PCI card the BIOS automatically configures interrupts the I O space and other system resources Any interrupts set to Available in Setup are considered to be available for use by the add in card 3 3 2 PCI IDE Support If you select Auto in the BIOS Setup program the BIOS automatically sets up the PCI IDE connector with independent I O channel support The IDE interface supports hard drives up to ATA 66 100 and recognizes any ATAPI compliant devices including CD ROM drives tape drives and Ultra DMA drives The BIOS determines the capabilities of each drive and configures them
103. upport was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and Legacy USB support from the BIOS is no longer used To install an operating system that supports USB verify that Legacy USB support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions 3 6 BIOS Updates The BIOS can be updated using either of the following utilities which are available on the Intel World Wide Web site e Intel Express BIOS Update utility which enables automated updating while in the Windows environment Using this utility the BIOS can be updated from a file on a hard disk a 1 44 MB diskette or a CD ROM or from the file location on the Web e Intel Flash Memory Update Utility which requires creation of a boot diskette and manual rebooting of the system Using this utility the BIOS can be updated from a file on a 1 44 MB diskette from a legacy diskette drive or an LS 120 diskette drive or a CD ROM Both utilities verify that the updated BIOS matches the target system to prevent accidentally installing an incompatible BIOS NOTE Review the instructions distributed with the upgrade utility before attempting a BIOS update For information about Refer to The Intel World Wide Web site Section 1 3 page 17 3 6 1 Language Support The BIOS Setup program and help messages ar
104. used in the system Product Description 1 12 1 2 Wake up Devices and Events Table 8 lists the devices or specific events that can wake the computer from specific states Table 8 Wake up Devices and Events These devices events can wake up the computer from this state LAN S1 S3 S4 S5 Note Modem back panel Serial Port A 1 S3 PME signal S1 S3 S4 S5 Note Power switch S1 S3 S4 S5 PS 2 devices 1 3 RTC alarm 1 S3 S4 S5 USB S1 S3 WAKE signal S1 S3 S4 S5 Note For LAN and PME signal S5 is disabled by default in the BIOS Setup program Setting this option to Power On will enable a wake up event from LAN in the S5 state NOTE The use of these wake up events from an ACPI state requires an operating system that provides full ACPI support In addition software drivers and peripherals must fully support ACPI wake events 1 12 2 Hardware Support A CAUTION Ensure that the power supply provides adequate 5 V standby current if LAN wake capabilities and Instantly Available PC technology features are used Failure to do so can damage the power supply The total amount of standby current required depends on the wake devices supported and manufacturing options The board provides several power management hardware features including e Power connector e Fan connectors e LAN wake capabilities e Instantly Available PC technology e Resume on Ring e Wake from USB e Wake from PS 2 keyboard
105. ust enter Setup 92 Error Messages and Beep Codes 4 2 Port 80h POST Codes During the POST the BIOS generates diagnostic progress codes POST codes to I O port 80h If the POST fails execution stops and the last POST code generated is left at port 80h This code is useful for determining the point where an error occurred Displaying the POST codes requires a PCI bus add in card often called a POST card The POST card can decode the port and display the contents on a medium such as a seven segment display o gt NOTE The POST card must be installed in PCI bus connector 1 The tables below offer descriptions of the POST codes generated by the BIOS Table 46 defines the uncompressed INIT code checkpoints Table 47 describes the boot block recovery code checkpoints and Table 48 lists the runtime code uncompressed in F000 shadow RAM Some codes are repeated in the tables because that code applies to more than one operation Table 46 Uncompressed INIT Code Checkpoints Code Description of POST Operation DO NMI is Disabled Onboard KBC RTC enabled if present Init code Checksum verification starting D1 Keyboard controller BAT test CPU ID saved and going to 4 GB flat mode D3 Do necessary chipset initialization start memory refresh and do memory sizing D4 Verify base memory D5 Init code to be copied to segment 0 and control to be transferred to segment 0 D6 Control is in segment 0 To check recovery mode and verify main BIO
106. vnnioraantcaawadinavnnih 14 Ze Blok EE hee aAa T ea EE 16 3 Memory Channel and DIMM ConfiguratiON cooononoccccnnncccinnncnoncccnnnnccnanananancccnnnnncnnnnnns 19 4 Dual Channel Interleaved Mode Configuration with Two DiMMs 20 5 Dual Channel Interleaved Mode Configuration with Three DIMMS 20 6 Dual Channel Interleaved Mode Configuration with Four DiMMs 21 7 Single Channel Asymmetric Mode Configuration with One DIMNM 22 8 Single Channel Asymmetric Mode Configuration with Three DIMMS 22 9 Front Back Panel Audio Connector Options ooooooooocococooooooccnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnns 29 10 Audio Subsystem Block Diagram oocoooccncccccccccccccnnnnanancnnnnncnnnnnnnn ono ncnnnnnnnnnnnnnnnncnnnnnn 30 11 LAN Connector LED Locations a eee 31 12 Thermal Monitoring for DO15PBL Board 33 13 Location of the Standby Power Indicator LED ooonncnonccccnnnncccnncanoonccnnnncnnnnnnananccnnnnnnos 40 14 Detailed System Memory Address Map EEN 50 15 Back Panel Conecto Sereen e aaaea ai 58 16 D915PBL Board Component side Connectors cccccceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeess 60 17 Connection Diagram for Front Panel Connector oooococcccccnnccccnnonanoncccnnnnncnanannoncccnnnnnns 66 18 Connection Diagram for Front Panel USB Connectors AA 68 19 Connection Diagram for IEEE 1394a Connechors 68 20 LOGation orthe Jumper Blocs A it e 69 21 DEIER B
107. y Optional Intel Wireless Connect Technology is available for Intel 82801FBW ICH6RW based SKUs that use an Intel PRO Wireless 2225BG add in card Intel Wireless Connect Technology enables any desktop PC to join a wireless network or provide wireless Access Point services to a home or small office network through a wireless configuration wizard Intel Wireless Connect Technology features the following Wireless LAN protocols 802 11 b g 11 Mbps performance with 802 11b 54 Mbps performance with 802 11g WEP WPA TKIP 802 1x and MAC Address filtering for security Wi Fi and WHQL certified Integrated Access Point that can support up to 16 clients 1 11 Hardware Management Subsystem 1 11 1 32 The hardware management features enable the Desktop Board to be compatible with the Wired for Management WfM specification The Desktop Board has several hardware management features including the following Fan monitoring and control through the hardware monitoring and fan control ASIC Thermal and voltage monitoring Chassis intrusion detection Hardware Monitoring and Fan Control ASIC The features of the hardware monitoring and fan control ASIC include Internal ambient temperature sensor Two remote thermal diode sensors for direct monitoring of processor temperature and ambient temperature sensing Power supply monitoring of five voltages 5 V 12 V 3 3 VSB 1 5 V and VCCP to detect levels above or below acceptable valu

Intel BATTLE LAKE S775 I915P

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