ENCORE ENF656-EHW-INPR
Contents
1. V 22 bis V 22 V 21 and Bell 212A Bell 103 Both families implement a standard TIES Data mode AT command set which is compatible with any communication application software that supports the Hayes AT command set Fax Mode In fax mode the chipsets operate at up to 14 4 kbps transmit and receive and implement all the data rates and modulation schemes for ITU T standards V 17 V 29 V 27 ter and V 21 ch2 The chipsets implement a standard Fax mode AT command set compatible with any communication application software that supports EIA TIA 578 Fax Class 1 standards Voice Mode All chipsets support Telephone Emulation mode IS 101 voice commands and record and playback message capabilities Telephone Emulation mode allows a handset microphone speaker and modem to be used as a complete telephone In Telephone Emulation mode the received data from the AFE MD1724 microphone interface is looped back to the AFE analog transmit pins In voice mode the message record and playback abilities are accessed by the extended IS 101 AT commands Error Correction and Data Compression Modes The Intel platform supports error correction V 42 MNP 2 4 and data compression V 44 and V 42 bis MNP 5 Error correction ensures error free data transfer Data compression substantially increases the modem data throughput over the basic data rate throughput Depending on the data stream MNP 5 can provide compression ratios of up to two to one Alternately2. The 536EPXX offers a complete telephony interface with Caller ID voice mail answering machine capabilities tone generation and detection call progress control telephone emulation and full duplex digital speakerphone All voice features are fully compliant with Microsoft s Unimodem V and TAPI standards and all voice commands comply with IS 101 voice command standards Intel also provides DAA design recommendations that support international telephony applications Reference Design Available Intel provides a reference design that demonstrates chipset applications for several common configurations The design documentation includes a schematic OrCAD bill of materials block diagram and a description of operation Minimal Component Design The 536EPXX was designed to reduce part count board area and the amount of silicon used These design considerations significantly reduce the cost of 536EPXX without sacrificing quality or performance The 536EPXX solution is a sleek compact and cost effective alternative to both software and hardware only modems Reduced EMI RFI Emissions A single low frequency crystal serves as a clock for the DSP in the 536EPXX chipsets The single crystal design minimizes high frequency harmonics and simplifies EMI RFI design considerations Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V 92 Chipset 536EPXX Figure 3 Functional Block Diagrams 536EPU G HOST o TIP COM
3. A iabe 92 41333 40000 PCM 8000 Baseband Variable at 38666 37333 p 36000 34666 33333 32000 30666 29333 28000 48000 46666 45333 44000 42666 41333 V 92 40000 38666 Mode 37333 36000 V 34 TCM 3200 Variable Variable transmit 24666 33333 3000 nth 32000 30666 29333 28000 26666 25333 24000 Data 33 600 31 200 28 800 26 400 24 000 21 600 V 34 19 200 16 800 TCM Variable Variable Variable 14 400 12 000 9600 7200 4800 2400 14 400 TCM 2400 1800 128 12 000 TCM 2400 1800 64 V 32 bis 9600 TCM 2400 1800 32 7200 TCM 2400 1800 16 4800 TCM 2400 1800 4 9600 TCM 2400 1800 32 v 32 9600 QAM 2400 1800 16 4800 QAM 2400 1800 4 V 22 bis 2400 QAM 600 1200 2400 16 V 22 1200 DPSK 600 1200 2400 4 V21 300 FSK 300 es 2 Data cont Bel 1200 DPSK 600 1200 2400 4 Beli 1270 M 2225 M 103 300 FSK 300 1070 S 2025 S 2 a V 92 data receive rates providers up to 56 kbps can be achieved only in connections with equipment compatible ISPs internet service b FCC regulations do not allow the 57 333 56 000 and 54 666 kbps data rates to be supported 29 Intel supports the normal and expanded constellations for each baud and data rate Intel supports five of the six baud rates specified by the ITU T International Telecommunications Union Telecommunications 2400 2743 3000 3200 and 3429 symbols second The ITU T s optional baud rate of 2800 symbols second is not suppo
4. ITU T V 44 can provide up to 25 more compression then the V 42 bis Intel Confidential PreliminaryDatasheet Ital 7 1 5 7 1 6 7 2 7 2 1 7 2 2 Important 7 2 3 7 2 4 7 2 5 7 2 6 Host Accelerated Modem 56K V 92 Chipset 536EPXX Videoconferencing V 80 Support The 536EPXX supports the ITU V 80 recommendation This option ensures compatibility with host based H 324 videoconferencing application software The 536EPXX chipsets support both transparent and framed submodes of the V 80 synchronous access mode plus Voice Call First and full duplex speakerphone Loopback Test Modes In all modes except V 92 modem to DTE and modem to modem communication integrity can be tested with loopback tests The AT amp T1 command initiates the local analog loopback test Other Features Full Duplex Speakerphone The 536EPXX supports full duplex speakerphone with internal adaptive echo cancellation Phone users can talk simultaneously without the remote user hearing an echo Transmit Levels The factory default transmit level for V 92 and V 34 transmission is 10 dBm 1 dB at Tip and Ring Data and fax use separate transmission levels The transmit level can be programmed using the international configuration utility Current download speeds are limited to 53 33 kbps due to FCC rules that restrict modem power output Transmit Tone Levels The modem generates DTMF answer call and guard tones The specifications
5. The AFEs require a 5 V power supply however the interface is 3 3 V capable CODEC DAA The 536EPXX chipset uses a Silicon DAA to interface to the telephone line The Silicon DAA replaces an analog front end AFE an isolation transformer relays opto isolators and a hybrid Preliminary Datasheet Intel Confidential 21 536EPXX Host Accelerated Modem 56K V 92 Chipset ntel 7 0 Modes of Operation T 1 7 1 1 7 1 2 7 1 3 7 1 4 22 The 536EPXX chipset family provides complete modem functions for the following modes Group 3 Fax Data IS 101 Voice V 42 MNP 2 4 Microcom Networking Protocol Classes 2 through 4 Error correction V 44 V 42 bis MNP 5 Microcom Networking Protocol Class 5 and Videoconferencing Each mode has its own unique AT command set The data rates and modulation schemes for Data and Fax modes are presented in Table 15 on page 25 Additionally special modes of operation exist for power management and loopback testing Modes Data Mode In data mode the 536EPXX chipsets send at an effective rate of 33 6 kbps and receive at 53 333 kbps using ITU V 92 The 56K receive rates can be achieved only in connections with equipment compatible ISPs internet service providers See Table 15 on page 25 for connection rates Both chipset families implement all data rates and modulation schemes for ITU T International Telecommunications Union Telecommunications standards V 34 V 32 bis V 32
6. design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained by calling 1 800 548 4725 or by visiting Intel s website at http www intel com Copyright Intel Corporation 2001 Third party brands and names are the property of their respective owners 2 Intel Confidential Preliminary Datasheet Host Accelerated Modem 56K V 92 Chipset 536EPXX Overview 1 1 1 2 The software upgradable 536EPXX chipset and reference design from Intel is targeted at modem and computer manufacturers This new product is a leap forward in technology performance and cost savings The 536EPXX is a Host Accelerated Modem solution that combines and optimizes the best features from software and hardware modems This unique hybrid delivers superior performance and is a price competive modem The 536EPXX uses the host computer s CPU to replace the modem s controller without degrading CPU performance Since today s CPUs are well equipped to handle Digital Signal Processing DSP some of the DSP functions are diverted to the CPU However to prevent a decrease in CPU and modem performance
7. voice Versatile 56K Platform With many advanced features already built in the 536EPXX is a versatile platform for future development By using the host computer s CPU the 536EPXX can leverage the latest developments in CPU technology These advances can be taken advantage of quickly because the controller code can be modified in a code development environment Thus new features and products can be brought to market faster and less expensively than ever before And end users can easily upgrade to the newest communication technology by downloading and installing software upgrades directly from the modem or computer manufacturer s internet site Integrated PCI amp Mini PCI Interface The integrated design supports PCI and Mini PCI interfaces and allows the device to transfer data from the DSP to the host system s CPU faster than ISA or serial solutions The integrated interface also eliminates the ISA bridge chip requirement which helps to reduce part count board space and cost Preliminary Datasheet Intel Confidential 7 536EPXX Host Accelerated Modem 56K V 92 Chipset ntel 1 3 1 4 1 5 1 6 1 7 Satisfies Legacy Applications The 536EPXX supports all PC based communication requirements Its robust host based controller software and powerful DSP support all standard AT commands for data Class 1 fax and IS 101 voice Comprehensive Telephony Features Voice telephony is becoming increasingly important
8. 000 Intel ID 8086 1000h Preliminary Datasheet Intel Confidential 27 536EPXX Host Accelerated Modem 56K V 92 Chipset ntel Table 16 PCI Subsystem Vendor ID and Subsystem ID with No EEPROM Continued 8 2 8 3 8 3 1 8 3 2 28 GPIO 10 8 Subsystem Vendor Subsystem ID 001 Intel ID 8086 1001h 010 Intel ID 2 8086 1002h 011 Intel ID 8086 1003h 100 Intel ID 2 8086 1004h 101 Intel ID 8086 1005h 110 Intel ID 8086 1006h 111 Intel ID 8086 1007h DAA Interface A DAA Data Access Arrangement is the interface between the modem chipset and the telephone network The DAA interface controls the telephone line off hook relays detects ring signals and transmits and receives analog signals ACPI Interface The 536EPXX supports the ACPI Advanced Configuration and Power Interface power management specification the operating system puts system components into low power states when not active These chipsets support three power states DO D2 and 03 DO All PCI bus functions must support the DO state and go to DO before use On power up the function is in an uninitialized state When initialized by system software the function goes to DO active D2 D2 may be entered when a PCI bus function is idle This provides significant power savings and allows the function to return to the original condition In this state only PCI configuratio
9. 536EPXX Host Accelerated Modem 56K V 92 Chipset Preliminary Datasheet Product Features m Merges benefits from software and m PCtelephony hardware modems International telephony support m Uses host s CPU without degrading Voice compression ADPCM linear and performance CLI m Distributes functions optimally between CPU and DSP 4800 7200 8000 9600 and 11025 samples sec m Cost savings P CPU eliminates need for controller chip echo cancelled digital E speakerphone E eee Telephone emulation for headset Superior price performance ratio applications m Data modulation IS 101 Voice commands Data rates up to 56 ITU V 80 for videoconferencing ITU V 92 V 90 compliant m Power requirements ITU T V 34 33 600 to 2 400 bps DSP 3 3 V Pad 1 3 V Core ITU T V 32 bis V 23 V 22 bis V 21 Automatic sleep and wake up modes Bell 212A and 103 ACPI advanced configuration power Error correction ITU V 42 and MNP 2 interface 4 m Packaging Data compression ITU V 44 V 42 bis DSP 128 pin LQFP and MNP 5 AFE 44 pin VQFP m Exceeds Microsoft PC 00 requirements m Microsoft Windows TAPI compliant m AT command driven m Fax modulation ITU T V 17 V 26ter V 29 to 14 400 bps Fax Class 1 commands m PCI PCI 2 2 compliant T Maximum speed allowed by the FCC is 53 333 kbps Notice This document contains preliminary informa
10. ITU T Answer tone 2225 Hz Data Bell mode 1800 Hz Guard tone Data fax answer mode 550 Hz Table 14 DTMF Tone Pairs Dial Tone 1 Tone 2 Digit Hz Hz 0 941 1336 1 697 1209 2 697 1336 3 697 1447 4 770 1209 5 770 1336 6 770 1477 852 1209 8 852 1336 9 852 1447 941 1209 941 1447 697 1633 Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V 92 Chipset 536EPXX Table 14 DTMF Tone Pairs Continued Dial Tone 1 Tone 2 Digit Hz Hz B 770 1633 852 1633 941 1633 Table 15 Communication Modes and Data Rates Application Mode Data Rate bps Modulation ne ad ia ee M 14 400 TCM 2400 1800 128 12 000 TCM 2400 1800 64 9600 TCM 2400 1800 32 7200 TCM 2400 1800 16 Fax 9600 QAM 2400 1700 16 V 29 7200 QAM 2400 1700 8 4800 QAM 2400 1700 4 ore 4800 DPSK 1600 1800 8 2400 DPSK 1200 1800 4 V 21 300 FSK 300 1650 M 1850 S 2 Preliminary Datasheet Intel Confidential 25 536EPXX Host Accelerated Modem 56K V 92 Chipset Table 15 Communication Modes and Data Rates Continued Ital Baud Rate Carrier Constellation Application Mode Data Rate bps Modulation symbols sec Frequency Hz Points 57333 56000 54666 53333 52000 50666 49333 48000 Medea 46666 45333 44000 42666
11. PUTER Silicon O RING CODEC DAA DQ82536 wan gt 536EPA HOST COMPUTER MD1724 DQ82536 IICROPHONE SPEAKER OPTIONAL gt me ed es Preliminary Datasheet Intel Confidential 19 536EPXX Host Accelerated Modem 56K V 92 Chipset ntel Figure 3 Functional Block Diagrams Continued 536EPUS GS GL HOST COMPUTER Silicon TIP CODEC DAA RING DSP DQ82536 AFE NVRAM C gt m OPTIONAL HOST COMPUTER DQ82536 i OPTIONAL NVRAM MD1724 OPTIONAL m 20 Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V 92 Chipset 536EPXX Chipset Descriptions 6 1 6 1 1 6 2 6 3 The 536EPXX is a Host Accelerated Modem chipset family consisting of a DSP digital signal processor and a Silicon Laboratories CODEC DAA or an Intel Analog Front End AFE These chipsets support a variety of applications and need no additional firmware development The current 536EPXXchipsets are shown in Table 12 Chipset Composition PCI amp Mini PCI with their corresponding DSP and AFE device part numbers Please contact Intel to verify current part numbers and technical information Host Controller Software The host based controller software contains code for all controller functions for Group 3 Fax mode Data mode including error correction and data compression and Voi
12. a separate and less expensive DSP chip is used to share the load Maximum system and modem performance is maintained by splitting the processing optimally between the CPU and the DSP Unlike software modems there is no performance penalty because the CPU does not handle all of the controller and DSP functions Instead functions have been strategically optimized for accelerated performance by either the CPU or the DSP depending on which device can perform them most efficiently delivering a price performance ratio neither software nor hardware only modems can match Optimizing CPU usage in this manner eliminates the need for a controller and reduces the size of the DSP thereby reducing part count board size and the amount of silicon used These cost saving advantages make the 536EPXX a superior high performance and feature rich alternative to software modems With an integrated PCI interface this ITU V 92 solution provides a complete set of standard data fax voice and speakerphone features Effective data receive rates of up to 56K 53 333 kbps FCC max ensures interoperability with major Internet service providers around the world Chipset features also include ITU V 80 videoconferencing The 536EPXX exceeds Microsoft PC 00 specifications for Windows and is TAPI and PCI 2 1 compliant It satisfies legacy applications and supports all requirements for PC based communications including all standard AT commands for data Class 1 fax and IS 101
13. ce mode Digital Signal Processor DSP The DQ82536 digital signal processor DSP performs all digital signal processing functions for the chipset including modulation echo cancellation call progress monitoring and voice processing The DSP requires a 3 3 V and 1 3 V power supply which takes advantage of the latest manufacturing technologies The PCI bus accommodates either 5 V or 3 3 V designs reducing power consumption Analog Front End Device AFE The MD1724 AFE device uses Delta Sigma techniques to convert analog information from a telephone line to digital information that can be processed by the DSP In addition to its analog circuitry the modem s Delta Sigma function incorporates unique and proprietary digital to analog and analog to digital features These features improve receiver accuracy which in turn improves performance at low levels of receive signal Compared to other analog front end technologies the Delta Sigma implementation better stabilizes the function of the AFE devices and makes them less sensitive to board layout than other analog front end technologies Since a significant amount of signal processing is performed by digital rather than analog techniques Delta Sigma analog to digital conversion considerably improves signal quality For basic data fax and voice modes of operation a single AFE device is needed For full duplex echo cancelled speakerphone applications an additional AFE device is required
14. for each tone are provided in Table 13 and Table 14 on page 24 The transmit level can be programmed using the Intel configuration utility Receive Level The receiver can accommodate a receive signal from 9 dBm to 43 dBm The DCD data carrier detect function is activated at 43 dBm and above it is deactivated at 48 dBm and below Receiver Tracking The receiver compensates for up to 7 Hz of carrier frequency offset in V 34 mode Equalizers Automatic adaptive and compromise equalizers are provided to compensate for line distortions Preliminary Datasheet Intel Confidential 23 536EPXX Host Accelerated Modem 56K V 92 Chipset 7 2 7 Call Progress 7 2 8 Caller ID 7 2 9 24 intel The modem monitors the detection of call progress tones during call origination and reports them to the DTE Call progress tones include dial busy ringback and answer Caller ID is a service that allows the user to see the caller s telephone number and name Caller ID also provides information on call date and time International Support The Intel chipsets support international applications For information on specific countries contact your local Intel sales office at the address listed on the back cover of this document Table 13 Transmit Tones Tone Value Application 1100 Hz Fax originator Calling tone 1300 Hz Data originator 2100 Hz Data fax
15. n access is allowed Memory and I O access is not allowed Configuration space must be accessible by system software while D2 is active System software must restore the function to DO active before memory or I O space can be accessed Initiated activity such as bus mastering and functional interrupt request generation occur only after the function has been restored to active state Intel Confidential PreliminaryDatasheet intel Important 8 3 3 8 3 4 8 3 5 8 3 6 Host Accelerated Modem 56K V 92 Chipset 536EPXX A minimum recovery time of 200us from D2 to DO is required before the next function can be accessed Attempted access sooner than this could result in undefined system behavior D3colq Switching from main supply outputs to the auxiliary power source requires strict power budgeting of slots determining those to consume full 3 3V ux power A PCI function must draw no more than 20 mA through the 3 3V pin when if the PME En bit is cleared If a PCI function has been enabled for PME generation before entering D3 g the PCI add in card can continue to draw up to 375 mA through the 3 3V pin while in Speaker Interface The AFE device internally implements both the volume control and amplifier necessary to drive an external speaker The output of the internal amplifier can be connected directly to a speaker or to the input of the host speaker amplifier The internal amplifier is capable of drivi
16. ng a maximum load of 40 Q The speaker volume is controlled by the ATLn command Microphone Interface The MD1724 AFE device provides a microphone interface that connects a microphone or handset to the modem with a minimum of external parts This microphone input can then be used for local Voice record mode or for Telephone Emulation mode General Purpose I O Interface To customize the modem design the DSP provides 14 general purpose pins that can be used to control or monitor external circuitry Some of the general purpose pins can be configured for specific functions such as a Caller ID relay CIDREL Pin functions can be controlled via the host controller code Some Voice mode functions are enhanced by adding external circuitry for remote hang up detection extension phone pickup or hang up detection Preliminary Datasheet Intel Confidential 29
17. rted e The high and low carrier frequencies specified by ITU T are supported for each baud rate 26 Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V 92 Chipset 536EPXX Hardware Interfaces Figure 4 The 536EPXX chipset supports hardware interfaces for the host expansion bus non volatile RAM NVRAM CODEC DAA speaker microphone and general purpose I O functions The hardware interfaces are demonstrated below Modem System Block Diagram 536EPXX HOST COMPUTER 536EPXX Lo TIP o RING gt covec HH paa DSP DQ82536 AFE MICROPHONE SPEAKER I gt MD1724 OPTIONAL 8 1 Table 16 NVRAM Interface 536EPXX is designed to support either 2K or 4k EEPROM in x8 or x16 mode NVRAM can be used to customize the Subsystem Vendor ID and Subsystem ID per the manufacturer s requirement 536EPXX can also be used without the in this case 536EPXX will default to one of the ID s listed in Table 16 depending on how the GPIO 8 through 11 are tied PCI configuration data to use Table 16 describes this PCI Subsystem Vendor ID and Subsystem ID with No EEPROM GPIO 10 8 Subsystem Vendor Subsystem ID 000 Reserved 1040h 001 Reserved 1040h 010 Reserved 1040h 011 Reserved 1040h 100 Reserved 1040h 101 Reserved 1040h 110 Reserved 1040h 111 Reserved 1040h
18. tion on new products in production The specifications are subject to change without notice Verify with your local Intel sales office that you have the latest datasheet before finalizing a design Intel Confidential Order Number 273503 001 June 2001 Information in this document is provided in connection with Intel products No license express or implied by estoppel or otherwise to any intellectual property rights is granted by this document Except as provided in Intel s Terms and Conditions of Sale for such products Intel assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not intended for use in medical life saving or life sustaining applications Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them The 536EPXX may contain
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