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Supermicro MBD-H8DSL-HTI-O

1. DBS 5 mt VGA COM1 Kybd mg JPG1 LAN2 LAN1 USBO 1 Mouse DB4 1 DP1 Gc FANS JPL N o o JPC2 Broadcom JSMB1 BCM5704 S a L o Jc 5 S JWOL 5 JPX1A a al lal e e x gt 5 5 JI euni 3 5 18 1818 al BIOS H S SS SiS CPU2 a E g N ISI Z l 2 Z 3 a a a O Battery lt a HT 1000 N bel e 2 E A Speaker p 5 S S 2 E E o 8 S 5 wn ei lt Sl Jal ls E 5 2 5 o a a a a S 2 S e q a lt a SI SIS i S JSLED J27 CPU1 H S S S a 8 ljajja a 2 JPF _ JWOR JOH1 Cou L 3 FAN4 Floppy FAN3 FAN2 FAN1 J3P JF1 JAR IDE 1 JW Notes Jumpers not indicated are for test purposes only Jumpers J3P JAR JBTI JD1 JI C1 2 JPF JPG1 JPL JPX1A JPX1B JWD Connectors 1U IPMI COM1 COM2 FAN1 5 Floppy IDE 1 J1B4 J32 JD1 JF1 JL1 JOH1 JPI2C JPW2 JPWF JSLED JSMB1 JWOL JWOR LAN1 2 SATAQ 3 USB0O 1 2 3 VGA Onboard LEDs DB1 DB8 DP1 Description 3rd Power Fail Detect Alarm Reset CMOS Clear Onboard Spkr En Disable DC to PCI Enable Disable Power Force On VGA Enable Disable LAN Enable Disable PCI X Slot 6 Freq Select PCI X Slot 6 Freq Select Watch Dog Description IPMI 2 0 Slot COM 1 2 Serial Port Header Fan Headers Floppy Disk Drive Connector IDE 1 Connector Chapter 1 Introduction H8DSL HTi
2. 144 bit 200 400 MT s 144 bit 200 400 MT s 16 x 16 1 GB 133 MHz PCI X Slot ATI Rage XL 8 MB ServerWorks ATA100 S it Broadcom HT 1000 BCM5704C USB 2 0 4 Ports 2 LPC Link L gt BIOS Floppv Disk Drive Serial COM SC Ports 2 gt PS 2 Kybd Mouse Figure 1 3 ServerWorks HT 1000 Chipset System Block Diagram Note This is a general block diagram and may not exactly represent the features on your serverboard See the previous pages for the actual specifications of your serverboard Chapter 1 Introduction 1 2 Chipset Overview The H8DSL HTi serverboard is based on the ServerWorks HT 1000 HyperTrans port Systeml O hub chipset The HT 1000 chipset provides high performance scalability and reliability Its HyperTransport architecture reduces IO bottlenecks to improve overall system performance System memory controllers are integrated into the processors to decrease latency HT 1000 HyperTransport UO Hub The HT 1000 I O hub interconnects the processors with the I O bridge via a Hvper Transport bus to provide an interface between the various subsystems including the I O functions SATA subsystem the onboard graphics the IDE controller and the USB ports HyperTransport Technology HyperTransport technology i
3. 12V Vcc DDRA VTT DDRB VTT 1 2V for Hyper Transport 2 5V 5V standby 2 5V standby and battery voltage 4 12 Chapter 4 BIOS gt System Fan Monitor Fan Speed Control Modes This feature allows the user to determine how the system will control the speed of the onboard fans The fan speed is controlled by the CPU die temperature When the CPU die temperature is higher the fan speed will be higher as well Select Server Mode if your system is used as a Server Select Disable to disable the fan speed control function to allow the onboard fans to continuously run at full speed 12V The options are 1 Disable Full Speed and 2 Server Mode FANT Speed through FANS Speed The speeds of the onboard fans in rpm are displayed here 4 13 H8DSL HTi User s Manual 4 4 Boot Menu gt Boot Settings Configuration Quick Boot If Enabled this option will skip certain tests during POST to reduce the time needed for the system to boot up The options are Enabled and Disabled Quiet Boot If Disabled normal POST messages will be displayed on boot up If Enabled this display the OEM logo instead of POST messages Add On ROM Display Mode This setting controls the display of add on ROM read only memory messages Select Force BIOS to allow the computer system to force a third party BIOS to display during system boot Select Keep Current to allow the computer system to display the BIOS information during system boo
4. 1f vou wish to have the OS on a SATA RAID arrav vou must first complete the step below Building a Driver Diskette You must first build a driver diskette from the Supermicro CD ROM that was included with the system You will have to create this disk on a computer that is already running and with the OS installed Note that this driver only works with Windows 2003 After building the driver diskette insert the driver floppy into the floppy drive in your system must be an IDE floppy and not a USB floppy and insert the OS Installation CD into your CD ROM or DVD drive Boot up the system and press the lt F6 gt key You will then be able to create a partition on the disk where the OS will be installed After the OS is installed the system will automatically roboot You can now skip ahead to section entitled Enabling SATA RAID in the BIOS Installing the Operating System If the operating system has not yet been installed you should install it now With the Windows OS installation CD in the CD ROM drive restart the system When you see the prompt hit the lt F6 gt key to enter Windows setup Follow the prompts as they appear to install the OS Once installed proceed to the next step to enable RAID and set up your RAID drives 2 23 H8DSL HTi User s Manual Enabling SATA RAID in the BIOS Before setting up your RAID drives you must change some settings in BIOS Boot up the system and hit the lt Del gt key to enter the BIOS Setup
5. Explanation of Jumpers A 2 15 CMOS Clear sese 2 15 PCI X Slot Frequency Select 2 2 16 Onboard Speaker Enable Disable 2 16 Watch Dog Enable Disable 2 16 VGA iEnable Disable s 1s22 is9s i EES EENNdEEESERNEEEdEERNEENEdEE EENS 2 17 Power Force OM iii d aa aa Na rar Er inas 2 17 DC to PCI Enable Disable 2 17 3rd Power Supply Fail Signal Enable Disable 2 17 LAN Enable Disable AAA 2 18 2 8 Onboard Indicators nr i EA AAA 2 18 LANT2 DEDS ee EE 2 18 ag Power LED isti kinet ageet Eeer 2 18 POST Code LEDS 2 19 2 9 Floppy IDE and SATA Drive Connections c nn 2 20 Floppy CONNE tOT se serer ka a a d a 2 20 IDE e claie eT i a a B da a Be a 2 21 SAMA 9 ele Sereen n Ea 2 22 2 10 Enabling SATA RAID ENEE E E NEEN 2 23 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures sese nr 3 1 Before Power ON sseugeseek near fi pan tap a 3 1 NO POWO T 3 1 Klee e WEE 3 1 H8DSL HTi User s Manual MG6MlOry EMrOrs u sie imine er e we ke ee ap IE 3 2 Losing the Svstem s Setup Configuration s 3 2 3 2 Technical Support Procedures nn 3 2 3 3 Frequently Asked Questions 3 3 3 4 Returning Merchandise for Service 3 4 Chapter 4 BIOS 4 1 IMtFO UGLOMI EE 4 1 4 2 M in Setup EE 4 2 4 3 Advanced Settings Menu 4 2 4 4 JBoot MGM EE 4 14 ASS SECUN E UE 4 16 4 6 419 MON caress iii ek a g gala E RER 4 16 Appendices Appendix A BIOS Error Beep Codes sse A 1 Appendix B BIOS POST Checkpoint Codes nn B
6. chapter when installing the processor s and memorv modules and when installing the serverboard in a chassis Also refer to this chapter to connect the floppv and hard disk drives the serial ports the mouse and kevboard and the twisted wires for the power and reset buttons and the svstem LEDs If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is pro vided Instructions are also included for contacting technical support In addition you can visit our web site for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A lists BIOS Error Beep Code Messages Appendix B lists BIOS POST Checkpoint Codes H8DSL HTi User s Manual Table of Contents Preface About This ET EE lii Manual Organization osieseuggdgeegREDeeEk a Sab a ra ea pi brejk lii Chapter 1 Introduction let e e 1 1 Ee Al EE 1 1 SDSL FIT MAGS asked a eee ances ak wl 1 3 H8DSL HTi Serverboard Layout nn 1 4 H8DSL HTi Quick Reference 22 arnein a a ani iaae 1 5 Serverb ard Features iii aa 1 6 ServerWorks HT 1000 Chipset System Block Diagram 1 8 l 2 e le e E 1 9 1 3 PG Health MONTONG sawsniinanieiriatiia tapit dia pv ima Nee 1 10 1 4 Power Configuration Settings see ee
7. Force On function If enabled system power will always stay on If disabled the default setting the user needs to depress the power button to power up the system IC to PCI Enable Disable JI C1 2 pair of jumpers allow you to connect the System Management Bus to any one of the PCI slots The default setting is closed for both jumpers to en able the connection Both connectors must have the same setting JEC1 is for data and JI C2 is for the clock See the table on right for jumper settings 3rd Power Supply Fail Signal Enable Disable The system can notify you in the event of a power supply failure This feature assumes that three redundant power supply units are installed in the chas sis If you only have one or two power supplies installed you should disable J3P to prevent false alarms See the table on the right for jumper settings 2 17 Chapter 2 Installation VGA Enable Disable Jumper Settings JPG1 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled Power Force On Jumper Settings JPF Jumper Setting Definition Closed Force On Open Disabled PC to PCI Enable Disable Jumper Settings JEC1 JEC2 Jumper Setting Definition Closed Enabled Open Disabled 3rd Power Supply Fail Signal Jumper Settings J3P Jumper Setting Definition Open Disabled Closed Enabled H8DSL HTi User s Manual LAN Enable Disable
8. Power Button connection is located on pins 1 and 2 of JF1 Mo mentarilv contacting both pins will power on off the svstem This button can also be configured to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode depress the button for at least 4 seconds Refer to the table on the right for pin definitions USBO 1 Universal Serial Bus Ports Two Universal Serial Bus ports USB2 0 are located to the right of the mouse port See the table on the right for pin definitions USB2 3 Headers Two additional USB2 0 head ers USB2 3 are included on the serverboard These may be con nected to provide front side access USB cables not included are needed for the connections See the table on the right for pin definitions 2 11 Pin Chapter 2 Installation Reset Button Definitions JF1 Pin Definition 8 Reset Ground Power Button Pin Definitions JF1 Pin Definition 1 PW_ON Universal Serial Bus Ports Pin Definitions USBO 1 USBO Pin Definition Pin Definition Pin f a A Go N USB2 Definition Pin Definition Extra Universal Serial Bus Headers Pin Definitions USB2 3 PO Ground USB1 5V PO PO Ground USB3 4 d 5V 2 PO 3 PO 4 Ground 5 No connection H8DSL HTi User s Manual Serial Ports mee Serial Port Pin Definitions COM1 COM2 The COM1 seri
9. Security Menu AMI BIOS provides a Supervisor and a User password If you use both passwords the Supervisor password must be set first Change Supervisor Password Select this option and press lt Enter gt to access the sub menu and then type in the password Change User Password Select this option and press lt Enter gt to access the sub menu and then type in the password Boot Sector Virus Protection This option is near the bottom of the Security Setup screen Select Disabled to deactivate the Boot Sector Virus Protection Select Enabled to enable boot sector protection When Enabled AMI BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive The options are Enabled and Disabled 4 6 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen Save Changes and Exit When you have completed the system configuration changes select this option to leave BIOS Setup and reboot the computer so the new system configuration parameters can take effect Select Save Changes and Exit from the Exit menu and press lt Enter gt Discard Changes and Exit Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer Select Discard Changes and Exit from the Exit menu and press lt Enter gt Discard Changes Select this option and press
10. This allows the user to define an overheat temperature When this temperature is exceeded or when a fan failure occurs then the Overheat Fan Fail warning LED is triggered Auto Switching Voltage Regulator for the CPU Core The 3 phase switching voltage regulator for the CPU core can support up to 80A and auto sense voltage IDs ranging from 0 875 V to 1 6V This will allow the regulator to run cooler and thus make the system more stable Chapter 1 Introduction 1 4 Power Configuration Settings This section describes the features of vour serverboard that deal with power and power settings Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses anv kev the CPU will wake up and the LED will automaticallv stop blinking and remain on BIOS Support for USB Kevboard If a USB keyboard is the only keyboard in the system it will function like a normal keyboard during system boot up Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up Dur ing the SoftOff state the ATX power supply provides power to keep the requ
11. hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Floppy Connector Floppy Drive Connector Pin Definitions FI The floppy connector is located E beside the IDEH1 connector ia eee See the table on the right for SER S BER pin definitions PNP S Reserved Key 6 FDEDIN GND 8 Index GND 10 Motor Enable GND 12 Drive Select B GND 14 Drive Select A GND 16 Motor Enable GND 18 DIR GND 20 STEP GND 22 Write Data GND 24 Write Gate GND 26 Track 00 GND 28 Write Protect GND 30 Read Data GND 32 Side 1 Select GND 34 Diskette 2 20 IDE Connector There are no jumpers to con figure the onboard IDE connec tor See the table on the right for pin definitions Pin 2 21 IDE Drive Connector Pin Definitions IDE 1 Definition Reset IDE Host Data 7 Host Data 6 Host Data 5 Host Data 4 Host Data 3 Host Data 2 Host Data 1 Host Data 0 Ground DRQ3 UO Write O Read IOCHRDY DACK3 IRQ14 Addri Addro Chip Select 0 Activity Chapter 2 Installation 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Definition Ground Host Data 8 Host Data 9 Host Data 10 Host Data 11 Host Data 12 Host Data 13 Host Data 14 Host Data 15 Key Ground Ground Ground BALE Ground IOCS16 Ground Addr2 Chip Select 1 Ground H8DSL HTi User s Manual
12. interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next Next programming the flash ROM The memory refresh line is toggling Checking the 15 second on off time next Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before passing control to the video ROM is done Look ing for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required pro cessing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configura tion before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed In terrupt vector initialization is about to begin B 3 H8DSL HTi User s Manual Checkpoint 25h 27h 28h 2Ah 2Eh 2Fh 30h 31h 32h 34h 37h 38h 39h 3Ah 3Bh 40h 42h 43h 44h 45h 46h 47h 48h 49h 4Bh Code Description Interrupt vector initialization is done Clearing the password if the POST DIAG switch is on Any initialization before setting video mode will be done next Initialization before setting the video mode is complete Configuring the mono chrome mode and color mo
13. on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your current BIOS before downloading Select your mainboard model on the web page and download the corresponding BIOS file to your computer Unzip the BIOS update file in which you will find the readme txt flash instructions the amiflash exe BIOS flash utility and the BIOS image xxx rom files Copy these files to a bootable floppy disk insert the disk into drive A and reboot the system At the DOS prompt after rebooting enter the command amiflash without quotation marks then type in the BIOS file that you want to update with xxxx rom Question What s on the CD that came with my serverboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 3 H8DSL HTi User s Manual Question Why can t I turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power But ton Mode setting When the On Off feature is enabled the serverboard will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count th
14. the IDE hard drive LED cable to display disk activity Refer to the table on the right for pin definitions NIC1 LED The NIC1 Network Interface Control ler LED connection is located on pins 11 and 12 of JF1 Attach the NIC1 LED cable to displav network activitv Refer to the table on the right for pin definitions NIC2 LED The NIC2 Network Interface Control ler LED connection is located on pins 9 and 10 of JF1 Attach the NIC2 LED cable to display network activity Refer to the table on the right for pin definitions Overheat Fan Fail LED Connect an LED to the OH connection on pins 7 and 8 of JF1 to provide ad vanced warning of chassis overheat ing Refer to the table on the right for pin definitions Power Fail LED The Power Fail LED connection is lo cated on pins 5 and 6 of JF1 See the table on the right for pin definitions Note This feature is only available when using redundant power supplies 2 10 HDD LED Pin Definitions JF1 Pin Definition Vcc HD Active Pin Definition 11 vec Pin Definition Vcc OH Fan Fail LED Pin Definitions JF1 Pin Definition T VEC Control Power Fail LED Pin Definitions JF1 Pin Definition 5 VEC Control Reset Button The Reset Button connection is located on pins 3 and 4 of JF1 and attaches to the reset switch on the computer chassis See the table on the right for pin definitions Power Button The
15. the keys noted in the Available Keys window navigate through the available disks shown in the Disks window and select those you wish to add to your array When selected a disk will be highlighted in green Create Array After selecting the disks for your array you are ready to select the type of array to create Array types may be limited by the number of disks selected and the RAID levels supported by your system After selecting the array type you will be prompted to choose the caching mode read write read only or none After this selection you have the array set up Press the lt C gt key to confirm the configuration of your array and reboot the system Note a RAID controller program RAIDCore may be downloaded from the Broad com web site On their home page www broadcom com click on Downloads amp Sup port gt RAID Driver Downloads then under Operating Systems click on Windows 2 24 Chapter 2 Installation Figure 2 5 HT1000 RAID Utilitv Screen HT1000 Array Configuration Build AC 210 2006043 2 ing process irom where IN l l frrays ail Sake En RAIDI 496GB Ready 0 00 49608B InArray 1 01 4966B InArray Main Menu Available Keys lt t lt 4 4 lt Choose Esc Back Controllers Found 1 lt Enter gt Select Menu Item On the next page you will see the Windows Media Kit Download this and install to your system for RAID management Installing Other Software Drivers The Su
16. vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket 4 With the CPU inserted into the socket inspect the four corners of the CPU to make sure that it is properly installed and flush with the socket 5 Gently press the CPU socket lever down until it locks in the plastic tab For a dual processor system repeat these steps to install another CPU into the CPU 2 socket Note if using a single processor only CPU 1 DIMM slots are addressable 2 3 H8DSL HTi User s Manual Installing the Heatsink Retention Modules Two heatsink retention modules BKT 0005 and four screws are optional items that may be included in the retail box Once installed these are used to help attach the heatsinks to the CPUs To install position the module so that the CPU backplate standoffs insert through the holes on the heatsink retention module and the four feet on the module contact the serverboard Secure the retention module to the backplate with two of the screws provided See Figure 2 1 Repeat for the second CPU socket Note BKT 0005 is included for use with non proprietary heatsinks only When installing proprietary heatsinks only BKT 0004 CPU backplate is needed The BKT 0005 retention module was designed to provide compatibility with clip and cam type heatsinks from third parties Figure 2 1 CPU Backplate Heatsink Retention Module Installation I Mounting scr
17. was found Issuing the keyboard controller interface test command next 82h The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next 83h The command byte was written and global data initialization has completed Check ing for a locked key next 84h Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next 85h The memory size check is done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next B 5 H8DSL HTi User s Manual Checkpoint 86h 87h Code Description The password was checked Performing any required programming before WIN BIOS Setup next The programming before WINBIOS Setup has completed Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next The programming after WINBIOS Setup has completed Displaying the power on screen message next Programming the WINBIOS Setup options next The WINBIOS Setup options are programmed Resetting the hard disk controller next The hard disk controller has been reset Configuring the floppy drive controller next The floppy drive controller has been configured Configuring the hard disk drive controller next Initializing the bus option ROMs from C800 next See the last page of this
18. x key Vcc Vcc NIC1 Vcc NIC2 Vcc OH Fan Fail LED Vcc Vcc Reset Button Power Button 2 1 Power LED HDD LED Power Fail LED Ground Ground 2 8 Chapter 2 Installation 2 6 Connecting Cables ATX Power 24 pin Connector Pin Definitions J1B4 Primarv ATX Power Definition Definition Connector FT SR The main power supplv connector on 12V 3 3V the H8DSL HTi J1B4 meets the SSI COM COM Superset ATX specification PS_ON 5V You must also connect the J32 power SaM connector J32 below See the table on the right for pin definitions COM COM Res NC 5V 5V 5V Secondary Power Connector Pins Definition In addition to the Primary ATX power connector above a Secondary 12v 4 pin connector J32 has been included for use with heavy load sys tems See the table on the right for pin definitions 1 amp 2 Ground NMI Button NMI Button Pin Definitions JF1 The non maskable interrupt button Pin Definition header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions 19 Control Ground Power LED The Power LED connection is located on pins 15 and 16 of JF1 Refer to the table on the right for pin definitions 2 9 Power LED Pin Definitions JF1 Pin Definition 15 Vcc Control H8DSL HTi User s Manual HDD LED The HDD IDE Hard Disk Drive LED connection is located on pins 13 and 14 of JF1 Attach
19. 1 vi Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer e One 1 H8DSL HTi serverboard Two 2 CPU backplates BKT 0004 e Two 2 heatsink retention modules BKT 0005L One 1 IDE cable CBL 036L 02 One 1 floppy cable CBL 022 One 1 IO shield CSE PT7 e One 1 CD containing drivers utilities and user s manual 1 1 H8DSL HTi User s Manual Notes 1 2 Chapter 1 Introduction Figure 1 1 HaDSL HTI Image oam d j Se 7 w E 3 8 4 SLE em l 3 H8DSL HTi User s Manual Figure 1 2 H8DSL HTi Serverboard Layout not drawn to scale
20. A 68 Illuminated LED 1 Unilluminated LED 0 Reading the POST Code LEDs When on each of the eight separate LEDs represent the value of the number shown beside it in the diagram on the left Add up the numerical values of each illuminated LED in the DB5 DB8 column to get the high left digit and those in the DB1 DB4 column to get the low right digit of the correspond ing POST code Example The example on the left indicates a hexa decimal POST code of C6 This is deter mined in the following manner DB1 DB4 low digit 4 2 6 DB5 DB8 high digit 8 4 12 decimal 12 hexidecimal C Decimal Hexidecimal Equivalent 0 9 0 9 10 11 12 13 14 15 TH n D 000 P 2 19 H8DSL HTi User s Manual 2 9 Floppy IDE and SATA Drive Connections Use the following information to connect the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires e Ared mark on a wire typically designates the location of pin 1 e Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B e The 80 wire ATA100 IDE hard disk drive cable that came with your system has two connectors to support two drives The blue connector connects to the on board IDE connector interface and the other connector s to your
21. C Health Monitoring e Onboard monitors for CPU core voltages 5Vin 12Vin 12V DDR voltages 1 2V for Hyper Transport 2 5V 5Vstby 2 5Vstby and battery voltage e Fan status monitor with firmware software speed control in BIOS e Watch Dog NMI e Environmental temperature monitoring via BIOS e Power up mode control for recovery from AC power loss e System resource alert e Hardware BIOS virus protection e Auto switching voltage regulator for the CPU core 1 6 Chapter 1 Introduction ACPI Features Slow blinking LED for suspend state indicator BIOS support for USB kevboard Main switch override mechanism Internal external modem ring on Onboard UO On chip SATA controller supporting four 4 SATA ports RAID 0 1 and 10 One 1 ATA100 IDE port One 1 floppv port interface up to 2 88 MB Two 2 Fast UART 16550 compatible serial connectors 1 header 1 port Broadband BCM5704C Ethernet controller supports two Gigabit LAN ports PS 2 mouse and PS 2 kevboard ports Four 4 USB 2 0 ports two ports two headers ATI Rage 8 MB XL graphics chip VGA port Other Wake on Ring JWOR Wake on LAN JWOL CD Utilities BIOS flash upgrade utilitv Dimensions e Extended ATX form factor 9 6 x 13 05 244 x 331 mm 1 7 H8DSL HTi User s Manual HTX Slot 184 pin DIMMs 16 x 16 1 GB x2 184 pin DIMMs AMD AMD Opteron Opteron Processor 2 Processor 1
22. Change the setting of jumper JPL to Jumper Settings JPL enable or disable the LAN1 and LAN2 Jumper Setting Definition Gigabit Ethernet ports See the table Pins 1 2 Enabled on the right for jumper settings The Pins 2 3 Disabled default setting is enabled 2 8 Onboard Indicators LAN1 LAN2 LEDs The Ethernet ports located beside the VGA port have two LEDs On each Gb LAN port the right yellow LED indicates activity while the left orange LED indicates when there is a connection link See the table on the right for the functions associated with the left connection LED LAN Left LED Connection Indicator LED Color Definition Off No Connection Orange Connection 3 3V Power LED When illuminated the DP1 LED indicates that power from the pow State Svstem Status er supplv is being supplied to the serverboard DP1 indicates the pres ence of 3 3V See the table on the right for DP1 LED states On Power present on serverboard Off No power present on serverboard 2 18 POST Code LEDs Chapter 2 Installation Eight surface mounted LEDs are located near one end of the 1UIPMI slot These LEDs are used to provide POST code information See the diagrams below for reading the LEDs and refer to Appendix B for a complete list of POST codes t Toward edge of board 1 DB1 4 CZ DA 3 D e1 DB5 8 2 4 e8 Example 2 1 DBi4 2 es A 68 e DB5 8 e
23. H8DSL HTi USER S MANUAL Revision 1 0 The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibilitv for anv inaccuracies that mav be contained in this document makes no commitment to update or to keep current the information in this manual or to notifv anv person or organization of the updates The manufacturer reserves the right to make changes to the product described in this manual at anv time and without notice This product including software if anv and documentation mav not in whole or in part be copied photocopied reproduced translated or reduced to anv medium or machine without prior written consent IN NO EVENT WILL THE MANUFACTURER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITV TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITV OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITV FOR ANV HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes The manufacturer s total liability for
24. PS Revision This setting allows the user to select the MPS revision level The options are 1 1 and 1 4 gt Remote Access Configuration Remote Access Use this setting to Enable or Disable remote access If Enabled is selected you can select a Remote Access type 4 11 H8DSL HTi User s Manual gt USB Configuration This screen will display the module version and all USB enabled devices Legacy USB Support Select Enabled to enable the support for USB Legacy Disable Legacy support if there are no USB devices installed in the system The options are Enabled and Disabled USB 2 0 Controller Mode Select the controller mode for your USB ports Options are HiSpeed and FullSpeed HiSpeed 480 Mbps FullSpeed 12 Mbps BIOS EHCI Hand Off Enable or Disable a workaround for OS s without EHCI hand off support gt System Health Monitor CPU Overheat Temperature Use the and keys to set the CPU temperature threshold to between 65 and 90 C When this threshold is exceeded the overheat LED on the chas sis will light up and an alarm will sound The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set The default setting is 72 C The other items in the submenu are all systems monitor displays for the follow ing information CPU1 Temperature CPU2 Temperature for dual CPU systems System Tem perature CPU1 Vcore CPU2 Vcore for dual CPU systems 5Vin 12Vin
25. Quick Reference Default Setting Closed Enabled Open Disabled See Section 2 7 Pins 6 7 Enabled Closed Enabled Open Normal Pins 1 2 Enabled Pins 1 2 Enabled Pins 2 3 133 MHz Open Auto Pins 1 2 Reset Primary ATX Power Connector Auxiliary Power Connector Power LED Speaker Header Front Panel Headers Chassis Intrusion Header Overheat LED Header SMBus Power Header 8 Pin Power Connector Power Fault Header SATA Activity LED Header System Management Bus Header Wake On LAN Header Wake On Ring Header Gigabit Ethernet Ports Serial ATA Ports SATAO 1 2 3 Universal Serial Bus Ports 0 1 and Headers 2 3 Video Monitor Port Description POST Code LEDs 3 3V Standby Power LED 1 5 H8DSL HTi User s Manual Serverboard Features CPU e Single or dual AMD Opteron 200 series 64 bit processors in 940 pin microPGA ZIF sockets Memory e Eight dual single channel DIMM slots supporting up to 32 GB of registered ECC DDR333 266 or up to 16 GB of registered ECC DDR400 SDRAM Note Memory capacities are halved for single CPU systems Refer to Section 2 4 before installing Chipset e ServerWorks HT 1000 Expansion Slots e One 1 64 bit 133 100 MHz PCI X slot 3 3V or e One 1 HT Hyper Transport slot Only one of these two slots may be populated at a time BIOS e 8 Mb Firmware Hub AMIBIOS Flash ROM e DMI 2 3 PCI 2 2 ACPI 1 0 ACPI 2 0 is BIOS supported Plug and Play PnP P
26. R Slot Release Tab il IN Release Tab 2 6 Chapter 2 Installation Populating Memorv Banks for 128 bit Operation x lt ISA lt Ei XX E XX BI x lt ES lt ES XX ES XX Es Notes X indicates a populated DIMM slot If adding at least four DIMMs with two CPUs installed the configurations with DIMMs spread over both CPUs and not like the con figuration in row 5 will result in optimized performance Note that the first two DIMMs must be installed in the CPU1 memorv slots Populating Memorv Banks for 64 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B 2 7 H8DSL HTi User s Manual 2 5 UO Port and Control Panel Connections The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the various I O ports Figure 2 3 I O Port Locations and Definitions Mouse Green Sato O O aee USB0 1 COM1 Port VGA Port Ports Turquoise Blue JLAN1 JLAN2 Sief OOOOO Cou Ss Ce esr ir i Keyboard Purple Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 4 JF1 Front Control Panel Header JF1 20 19 Ground NMI x key
27. SATA Ports j SATA0 SATA3 There are no jumpers to con figure the SATA ports See Pin Definition the table on the right for pin l Ground definitions 2 TXP 3 TXN 4 Ground 5 RXN 6 RXP 7 Ground 2 22 Chapter 2 Installation 2 10 Enabling SATA RAID Now that the hardware is set up vou must now install the operating svstem and the SATA RAID drivers if vou wish to use RAID with vour SATA drives The installation procedure differs depending on whether vou wish to have the operating svstem installed on a RAID arrav or on a separate non RAID IDE drive See the instructions below for details Serial ATA SATA Serial ATA SATA is a phvsical storage interface that emplovs a single cable with a minimum of four wires to create a point to point connection between devices This connection is a serial link that supports a SATA transfer rate from 150 MBps The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA and can extend up to one meter in length compared to only 40 cm for PATA cables Overall SATA provides better functionalitv than PATA Installing the OS SATA Driver Before installing the OS operating svstem and SATA RAID driver vou must decide if vou wish to have the operating svstem installed as part of a bootable RAID arrav or installed to a separate non RAID IDE hard drive If on a separate IDE drive skip ahead to section entitled Enabling SATA RAID in the BIOS
28. The options are Power Off and Last State Watch Dog Timer This setting is used to enable or disabled the Watch Dog Timer function It must be used in conjunction with the Watch Dog jumper see Chapter 2 Options are Disabled and Enabled gt Chipset Menu gt North Bridge Configuration gt Memory Configuration Memclock Mode This setting determines how the memory clock is set Auto has the memory clock set by the code and Limit allows the user to set a standard value MCT Timing Mode Sets the timing mode for memory Options are Auto and Manual 4 7 H8DSL HTi User s Manual User Config Mode Options are Auto and Manual Bank Interleaving This setting is used to determine whether bank interleaving is to be employed The options are Auto and Disabled Burst Length Use this setting to set the memory burst length 64 bit Dq must use 4 beats Options are 8 beats 4 beats and 2 beats Enable Clock to All DIMMs This setting allows the user to enable unused clocks to DIMMs even if DIMM slots are empty Options are Enabled and Disabled Node Interleaving Use this setting to Enable or Disable node interleaving gt ECC Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati cally Options are Enabled and Disabled MCA DRAM ECC Logging When Enabled MCA DRAM ECC logging and reporting is enabled Options are Enabled and Disabled ECC Chip Kill Allows the user to Ena
29. Utlility After the Setup Utility loads 1 Use the arrow keys to move to the Advanced menu Scroll down with the arrow keys to SATA Configuration and press lt Enter gt When the submenu opens use the arrow keys to select HT 1000 SATA and enable this setting if not already enabled Then in the same submenu scroll down to the SATA Mode setting and select the RAID option 2 Hit the lt Esc gt key until you return to the main Setup menu then scroll over to the Exit menu Select Save Changes and Exit and hit lt Enter gt then hit lt Enter gt again to verify 3 After exiting the BIOS Setup Utility the system will reboot When the system is rebooting press the lt Ctrl gt and lt R gt keys simultaneously This will activate the HT 1000 RAID Utility program Using the HT 1000 RAID Utility The HT 1000 RAID Utility program is where you can define the drives you want to include in the RAID array and the mode and type of RAID The utility is comprised of three main windows as shown in Figure 2 5 The Disks window on the right will list all available drives The procedure below outlines the steps necessary to create a RAID array as seen in the Main Menu window of the RAID utility In each step note the Available Keys window in the bottom right of the screen These are the keys used to perform the various functions in each step Initialize Disks s The first step is to initialize drives as part of the RAID array Using
30. aker you should close pins 6 and 7 with a jumper SMBus Header The System Management Bus header is located at JSMB1 Connect the ap propriate cable here to utilize SMB on your system See the table on the right for pin definitions SMBus Power EC Header The JPEC header is for the SMB power connector which may be used to monitor the status of the power sup ply See the table on the right for pin definitions Overheat LED Connect an LED to the JOH1 header to provide warning of a chassis over heating condition See the table on the right for pin definitions 2 13 Chapter 2 Installation PWR LED Connector Pin Definitions JD1 Pin Definition 1 Vcc 2 Vcc Vcc Pin Definitions JD1 Pin Definition Red wire Speaker data No connection Buzzer signal Speaker data SMBus Pin Definitions JSMB1 Pin Definition Data Ground Clock SMB Power I C Pin Definitions JPEC Pin Definition Clock SMB Data N A N A Overheat LED Pin Definitions JOH1 Pin Definition 1 5V 2 OH Active H8DSL HTi User s Manual Wake On Ring The Wake On Ring header is desig Wake On Ring l l Pin Definitions nated JWOR This function allows JWOR your computer to receive and wake Pin Definition up bv an incoming call to the modem 1 Ground Black when in suspend state See the table Wake up on the right for pin definition
31. al port is located on Pin Definition Pin Definition the I O backplane COM2 is a header 1 DCD DSR located near the BIOS chip See the RXD RTS table on the right for pin definitions TXD ETS DTR RI Ground NC Note NC indicates no connection Fan Header Fan Headers Pin Definitions FAN1 5 Pin Definition The H8DSL HTi has five 3 pin fan A A 1 Ground Black headers Fan speed is controlled via 2 12V 9 5V Red Thermal Management with a BIOS 3 Tachometer setting See the table on the right for pin definitions Note Fan speed may controlled by a BIOS setting to change with system temperature Server Mode setting As a result pin 2 may be either 12V or 9 5V See page 4 13 ATX PS 2 Keyboard and PS 2 Keyboard and Mouse Port PS 2 Mouse Ports Pin Definitions KB Mouse The ATX PS 2 keyboard and the PS 2 ole Dennton E ein mouse ports are located to the left of i pala Z Me the COM1 port See the table on the 2 Ne 9 Clock right for pin definitions E we LAN1 2 Ethernet Ports Two Gigabit Ethernet ports desig nated LANT and LANZ are located beside the VGA port These ports accept RJ45 type cables 2 12 Power LED Speaker On JD1 pins 1 2 and 3 are for the power LED and pins 4 through 7 are for the speaker See the tables on the right for pin definitions Note The speaker connector pins are for use with an external speaker If you wish to use the onboard spe
32. all claims will not exceed the price paid for the hardware product Manual Revision 1 0 Release Date April 21 2006 Unless you request and receive written permission from the manufacturer you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2006 All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for svstem integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the H8DSL HTi serverboard The H8DSL HTi is based on the ServerWorks HT 1000 chipset and supports single or dual AMD Opteron processors single or dual core in 940 pin microPGA ZIF sockets and up to 32 GB of registered ECC DDR333 266 or 16 GB of registered ECC DDR400 SDRAM Please refer to the serverboard specifications pages on our web site for updates on supported processors This product is intended to be professionallv installed Manual Organization Chapter 1 includes a checklist of what should be included in vour serverboard box describes the features specifications and performance of the serverboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this
33. ble or Disable ECC Chip Kill DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately even with background scrubbing on Options are Enabled and Disabled DRAM BG Scrub Corrects memory errors so later reads are correct Options are Dis abled and various times in nanoseconds and microseconds 4 8 Chapter 4 BIOS L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Data Cache BG Scrub Allows L1 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Memorv Timing Parameters Select CPU Node0 or CPU Node to view the parameters for that node in the field below gt HT1000 SouthBridge Configuration HIDE XIOAPIC PCI Functions The options are Yes and No gt S ATA Configuration HT1000 S ATA Use this setting to Enable or Disable the on chip SATA controller S ATA Mode Use this select either IDE MMIO or RAID as the SATA mode 4 9 H8DSL HTi User s Manual gt ACPI Configuration gt Advanced ACPI Configuration ACPI Version Features Select which version of ACPI you wish to use Options are ACPI v 1 0 ACPI v 2 0 and ACPI v 3 0 ACPI APIC Support Select Enabled to allow the ACPI APIC Table Pointer to be included in the RSDT pointer list The options are Enabled and Disabled ACPI OEMB Table This setting when enabled will include an OEMB tab
34. chapter for additional information Initializing before passing control to the adaptor ROM at C800 Initialization before the C800 adaptor ROM gains control has completed The adap tor ROM check is next The adaptor ROM had control and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control Any initialization required after the option ROM test has completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initializa tion before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coproces sor next Coprocessor initialized Performing any required initialization after the Coproces sor test next Initialization after the Coprocessor testis complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard tvpematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000
35. creen You can always return to the Main setup screen by selecting the Main tab on the top of the screen The Main Setup screen provides you with a system overview which includes the version built date and ID of the AMIBIOS the type speed and number of the processors in the system and the amount of memory installed in the system System Time System Date You can edit this field to change the system time and date Highlight System Time or System Date using the lt Arrow gt keys Enter new values through the keyboard Press the lt Tab gt key or the lt Arrow gt keys to move between fields The date must be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu gt CPU Configuration Sub Menu GART Error Reporting This setting is used for testing only MTRR Mapping This determines the method used for programming CPU MTRRs when 4 GB or more memory is present The options are Continuous which makes the PCI hole non cacheable and Discrete which places the PCI hole below the 4 GB boundary 4 2 Chapter 4 BIOS gt IDE Configuration Onboard PCI IDE Controller The following options are available to set the IDE controller status Disabled will disable the controller Primary will enable the primary IDE controller There is no Secondary option since only one IDE sl
36. de settings next Bus initialization system static output devices will be done next if present See the last page for additional information Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next The EGA VGA controller was not found The display memory read write test is about to begin The display memory read write test passed Look for retrace checking next The display memory read write test or retrace checking failed Performing the alter nate display memory read write test next The alternate display memory read write test passed Looking for alternate display retrace checking next Video display checking is over Setting the display mode next The display mode is set Displaying the power on message next Initializing the bus input IPL general devices next if present See the last page of this chapter for additional information Displaying bus initialization error messages See the last page of this chapter for additional information The new cursor position has been read and saved Displaying the Hit lt DEL gt mes sage next The Hit lt DEL gt message is displayed The protected mode memory test is about to start Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupt
37. e L 1 11 tS e T e Pele etiestgeg eedEegA eedA gege Edge ANER deed A aS E aA 1 12 il 6 Super L t 1 13 Chapter 2 Installation 2 1 Static Sensitive Devices ENEE 2 1 2 2 Mounting the Serverboard into a Chassis sese eee eee 2 2 2 3 Processor and Heatsink Installation 2 2 2 4 Installing Memory tics i iio ake nanan 2 2 5 2 5 I O Port and Control Panel Connections sese eee 2 8 2 6 Connecting Cables veveccccicsvinscedsimencdsseewncnnadsavececavenwesca dE EEeEEEN 2 9 Primary ATX Power Connector 2 9 Secondary Power Connector nn 2 9 NMI BUM ON e i kk p aaa aS NE 2 9 Power VED ii At 2 9 PAID DEED iii i ef a ERE EEE 2 10 Ties i a E ae OENE 2 10 INIG JIEE B TTT 2 10 Overheat Fan Fail LED 2 2 4 2m si Ada ai a aN tee 2 10 Power Fail LED syssanta taS eaa a pa att 2 10 Reser Button crire vinoni rei aa ap ab fada 2 11 Power Button A 2 11 Universal Serial Bus Ports USBO 1 L 2 11 iv Table of Contents E RE 2 11 serial POS is ps oa capac eae eee ga ves wee sean eee deena 2 12 Fam e ET 2 12 ATX PS 2 Keyboard and PS 2 Mouse Ports Lee 2 12 LAN1 2 Ethernet Ports L nn 2 12 Power LED Speaker isisisi naana aaaea araneae eniin 2 13 SMBus Header nn mnn 2 13 SMBus Power Header eee mnn 2 13 Overheat LED g ss kin i ki ak EE 2 13 Wake On Ring L nanna nn nn nn nn nn nn Din iaaa na 2 14 Wake e EI NEE 2 14 CHASSIS INtFUSIOM sisina d EEE Een 2 14 dees 2 14 2 17 Jumper Settings sis via iri ka e a f p DEL 2 15
38. e first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the serverboard 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS A 1 Introduction This chapter describes the AMIBIOS Setup utility for the HSDSL HTI The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of our web sit
39. e for any changes to BIOS that may not be reflected in this manual Starting the Setup Utility To enter the BIOS Setup Utility hit the lt Delete gt key while the system is booting up In most cases the lt Delete gt key is used to invoke the BIOS setup screen There are a few cases when other keys are used such as lt F1 gt lt F2 gt etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured The right frame displays the key legend Above the key legend is an area reserved for a text mes sage When an option is selected in the left frame it is highlighted in white Often a text message will accompany it Note that BIOS has default text messages built in We retain the option to include omit or change any of these text messages Set tings printed in Bold are the default values A P indicates a submenu Highlighting such an item and pressing the lt Enter gt key will open the list of settings within that submenu The BIOS setup utility uses a key based navigation system called hot keys Most of these hot keys lt F1 gt lt F10 gt lt Enter gt lt ESC gt lt Arrow gt keys etc can be used at any time during the setup navigation process 4 1 H8DSL HTi User s Manual 4 2 Main Menu When you first enter AMI BIOS Setup Utility you will see the Main setup s
40. e if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 4 3 H8DSL HTi User s Manual data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 for a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive DMA Mode Select the DMA mode of the drive Options are SWDMAO SWDMA1 SWD MA2 MWDMAO MWDMA1 MWDMAZ UDMAO UDMA1 and UDMA2 S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to sup port hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Dis abled to deactivate the function The options are Enabled and Disabled Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being wri
41. ed to segment 0 and control will be transferred to segment 0 H8DSL HTi User s Manual B 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution Checkpoint Code Description EOh The onboard floppv controller if available is initialized Next beginning the base 512 KB memorv test Eth Initializing the interrupt vector table next E2h Initializing the DMA and Interrupt controllers next E6h Enabling the floppy drive controller and Timer IRQs Enabling internal cache mem ory Edh Initializing the floppy drive Eeh Looking for a floppy diskette in drive A Reading the first sector of the diskette Efh A read error occurred while reading the floppy drive in drive A FOh Next searching for the AMIBOOT ROM file in the root directory Eih The AMIBOOT ROM file is not in the root directory F2h Next reading and analyzing the floppy diskette FAT to find the clusters occupied by the AMIBOOT ROM file F3h Next reading the AMIBOOT ROM file cluster by cluster F4h The AMIBOOT ROM file is not the correct size om Next disabling internal cache memory FBh Next detecting the type of flash ROM FCh Next erasing the flash ROM FDh Next programming the flash ROM FFh Flash ROM programming was successful Next restarting the system BIOS B 2 Appendix B BIOS POST Checkpoint Codes B 3 Uncompressed Initialization Codes The following runt
42. ements which support ACPI H8DSL HTi User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electric Static Discharge ESD can damage electronic components To prevent damage to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions e Use a grounded wrist strap designed to prevent static discharge e Touch a grounded metal object before removing the board from the antistatic bag e Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts e When handling chips or modules avoid touching their pins e Put the serverboard and peripherals back into their antistatic bags when not in use e For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the serverboard e Use only the correct type of CMOS onboard battery as specified by the manufac turer Do not install the CMOS onboard battery upside down which may result in a possible explosion Unpacking The serverboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Installation Procedures Follow the procedures as listed below to install the serverboard into a chassis 1 Instal
43. ew Mounting screw l 1 Heatsink retention module r CPU socket BE Serverboard T T Ze EH release paper CPU backplate Installing the Heatsink We recommend the use of active type heatsinks except for 1U systems Connect the heatsink fans to a fan header near the CPU To install the heatsinks please follow the instructions included with your heatsink package not included 2 4 Chapter 2 Installation 2 4 Installing Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage 1 Insert each memory module vertically into its slot paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly see Figure 2 2 See support information below 2 Gently press down on the memory module until it snaps into place Notes each processor has its own built in memory controller so CPU2 DIMMs cannot be addressed if only a single CPU is installed 128 MB 256 MB 512 MB 1 GB 2 GB and 4 GB memory modules are supported With Opteron 246 C stepping CPUs and above It is highly recommended that you remove the power cord from the system before installing or changing any memory modules Support The H8DSL HTi supports single or dual channel registered ECC DDR400 333 266 SDRAM Both interleaved and non interleaved memory are supported so you may populate any number of DIMM slots see note on previous page and charts on fo
44. g the displayed 51h The memory size display was adjusted for relocation and shadowing 52h The memory above 1 MB has been tested and initialized Saving the memory size information next 53h The memory size information and the CPU registers are saved Entering real mode next 54h Shutdown was successful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next 57h The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next 58h The memory size was adjusted for relocation and shadowing Clearing the Hit lt DEL gt message next 59h The Hit lt DEL gt message is cleared The lt WAIT gt message is displayed Starting the DMA and interrupt controller test next 60h The DMA page register test passed Performing the DMA Controller 1 base register test next 62h The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next 65h The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next 66h Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next 67h Completed 8259 interrupt controller initialization 7Fh 80h The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next Extended NMI source enabling is in progress 81h A keyboard reset error or stuck key
45. h the exception of Beep Code 8 are fatal errors POST codes may be read on the LEDs located beside the IPMI header on the serverboard See the description of the POST code LEDs in Chapter 5 A 1 AMIBIOS Error Beep Codes Beep Code Error Message Description 1 beep Refresh Circuits have been reset Ready to power up 5 short 1 long Memory error No memory detected in system 8 beeps Display memory read write error Video adapter missing or with faulty memory A 1 H8DSL HTi User s Manual Notes A 2 Appendix B BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test it writes checkpoint codes to I O port 0080h Ifthe computer cannot complete the boot process diagnostic equipment can be attached to the computer to read I O port 0080h B 1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution Checkpoint Code Description DOh The NMI is disabled Power on delay is starting Next the initialization code check sum will be verified Dih Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next D3h Starting memory sizing next D4h Returning to real mode Executing any OEM patches and setting the Stack next D5h Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copi
46. ime checkpoint codes are listed in order of execution These codes are uncompressed in FOOOOh shadow RAM Checkpoint Code Description 03h 05h The NMI is disabled Next checking for a soft reset or a power on condition The BIOS stack has been built Next disabling cache memory 07h 08h Next initializing the CPU and the CPU data area O6h Uncompressing the POST code next The CMOS checksum calculation is done next OAh The CMOS checksum calculation is done Initializing the CMOS status register for date and time next OBh The CMOS status register is initialized Next performing any required initialization before the keyboard BAT command is issued OCh The keyboard controller input buffer is free Next issuing the BAT command to the keyboard controller OEh The keyboard controller BAT command result has been verified Next performing any necessary initialization after the keyboard controller BAT command test OFh The initialization after the keyboard controller BAT command test is done The key board command byte is written next 10h The keyboard controller command byte is written Next issuing the Pin 23 and 24 blocking and unblocking command 11h Next checking if lt End or lt Ins gt keys were pressed during power on Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the lt End gt key was pressed Next disabling DMA controllers 1 and 2 and
47. ired circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the serverboard Wake On Ring Header JWOR Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply H8DSL HTi User s Manual 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates of 1 GHz and faster The H8DSL HTi accommodates 12V ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inad equate A 2 amp current supply on a 5V Standby rail is strongly recommended It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specification 1 1 or above Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Warning To prevent the possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down Chap
48. l the processor s and the heatsink s 2 Install the serverboard in the chassis 3 Install the memory and add on cards 4 Finally connect the cables and install the drivers 2 1 H8DSL HTi User s Manual 2 2 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the serverboard and the chassis match Although a chassis may have both plastic and metal mounting fasteners metal ones are highly recommended because they ground the serverboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly 1 Check the compatibility of the serverboard ports and the I O shield The H8DSL HTi serverboard requires a chassis that can support extended ATX boards 9 6 x 13 05 in size Make sure that the I O ports on the serverboard align with their respective holes in the I O shield at the rear of the chassis 2 Mounting the serverboard onto the serverboard tray in the chassis Carefully mount the serverboard onto the tray by aligning the serverboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to the tray tighten until just snug if too tight you might strip the threads Metal screws provide an electrical contact t
49. le pointer to pointer lists Options are Enabled and Disabled Headless Mode Select Enabled to activate the Headless Operation Mode through ACPI The options are Enabled and Disabled gt Event Log Configuration View Event Log Highlight this item and press lt Enter gt to view the contents of the event log Mark All Events as Read Highlight this item and press lt Enter gt to mark the DMI events as read Clear Event Log This setting will clear all event logs when set to OK The options are OK and Cancel Event Log Statistics Highlight this item and press lt Enter gt to view details on the count of total unread events 4 10 Chapter 4 BIOS gt Hyper Transport Configuration CPUO CPU1 HT Link Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz 600 MHz 800 MHz and 1 GHz CPUO CPU1 HT Link Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit 8 bit and 16 bit HT1000 HT Link Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz 600 MHz and 800 MHz HT1000 HT Link Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit and 8 bit gt MPS Configuration M
50. llowing page The CPU2 DIMM slots can only be accessed when two CPUs are installed however the CPU2 DIMM slots are not required to be populated when two CPUs are installed Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved 128 bit memory which is faster than non interleaved 64 bit memory Optimizing memory performance If two processors are installed it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots e g first populate CPU1 slots 1A and 1B then CPU2 slots 1A and 1B then the next two CPU1 slots etc This balances the load over both CPUs to optimize performance See chart on page 2 7 Maximum memory two CPUs 32 GB for DDR333 266 and 16 GB for DDR400 If only one CPU is installed maximum supported memory is halved 16 GB for DDR333 266 and 8 GB for DDR400 H8DSL HTi User s Manual Figure 2 2 Side and Top Views of DDR Installation To Install Insert module vertically and press down until it snaps into place The release tabs should close if they do not you should close them yourself To Remove Use your thumbs to gently push each re lease tab outward to release the DIMM from the slot Notch b 4 Notch seg Note Notch egen should align with the receptive point on the slot Note the notch in the slot and on the bottom of the DIMM These prevent the DIMM from being installed incorrectiv Top View of DD
51. lt Enter gt to discard all the changes and return to AMI BIOS Utility Program 4 16 Chapter 4 BIOS Load Optimal Defaults To set this feature select Load Optimal Defaults from the Exit menu and press lt Enter gt Then Select OK to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for all computer applications Load Fail Safe Defaults To set this feature select Load Fail Safe Defaults from the Exit menu and press lt Enter gt The Fail Safe settings are designed for maximum system stability but not maximum performance H8DSL HTi User s Manual Notes 4 18 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the svstem is powered on errors mav occur Non fatal errors are those which in most cases allow the svstem to continue the boot up process The error messages normallv appear on the screen Fatal errors are those which will not allow the svstem to continue the boot up pro cedure If a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed wit
52. means the jumper is on and Open means the jumper is off the pins CMOS Clear JBTI is used to clear CMOS and will also clear any passwords Instead of pins this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS To clear CMOS 1 First power down the system and unplug the power cord s 2 With the power disconnected short the CMOS pads with a metal object such as a small screwdriver for at least four seconds 3 Remove the screwdriver or shorting device 4 Reconnect the power cord s and power on the system Notes Do not use the PW ON connector to clear CMOS The onboard batterv does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds be JBT1 contact pads 2 15 H8DSL HTi User s Manual PCI X Slot Frequency Select Jumpers JPX1A and JPX1B are both used to set the speed of PCI X slot 6 The recommended default set ting is with JPX1A on pins 2 3 and JPX1B open Auto for a setting of 133 MHz One of these two jumpers must be left open when setting the speed See the tables on the right for jumper settings Onboard Speaker Enable Disable The JD1 header allows you to use either an external speaker or the internal onboard speaker To use the internal onboard speaker close pins 6 and 7 with a jumper To use an external speaker connect the speaker wires to pins 4 through 7 of JD1 See the table on the right for setting
53. next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 6 Checkpoint A9h Aah Abh BOh Bih 00h Appendix B BIOS POST Checkpoint Codes Code Description Returned from adaptor ROM at EOOOh control Performing any initialization required after the E000 option ROM had control next Initialization after E000 option ROM control has completed Displaying the system configuration next Uncompressing the DMI data and executing DMI POST initialization next Copying any code to specific areas The system configuration is displayed Code copying to specific areas is done Passing control to INT 19h boot loader next B 7 H8DSL HTi User s Manual Notes B 8
54. ny hardware components Before Power On 1 Check that the onboard Power LED is lit DP1 on the serverboard 2 Make sure that the 8 pin processor power connector at JPW2 is connected to your power supply 3 Make sure that no short circuits exist between the serverboard and chassis 4 Disconnect all ribbon wire cables from the serverboard including those for the keyboard and mouse 5 Remove all add on cards 6 Install a CPU and heatsink making sure it is fully seated and connect the chas sis speaker and the power LED to the serverboard Check all jumper settings as well 7 Use the correct type of onboard CMOS battery as recommended by the manufac turer To avoid possible explosion do not install the CMOS battery upside down No Power 1 Make sure that no short circuits exist between the serverboard and the chas sis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your serverboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 H8DSL HTi User s Manual NOTE If you are a system integrator VAR
55. o the serverboard ground to provide a continuous ground for the system 2 3 Processor and Heatsink Installation sor Always connect the power cord last and always remove it be Exercise extreme caution when handling and installing the proces fore adding removing or changing any hardware components Installing the CPU Backplates Two CPU backplates BKT 0004 are optional items that may be included in the retail box The backplates prevent the CPU area of the serverboard from bending and provide a base for attaching the heatsink retention modules To install begin by peeling off the release paper to expose the adhesive On the underside of the serverboard locate the two holes on either side of the CPU socket Attach the adhesive side of the backplate to the board by inserting the standoffs into the two holes and applying light pressure so that the backplate sticks to the underside of the board Repeat for the second CPU socket See Figure 2 1 2 2 Chapter 2 Installation Installing the Processor install to the CPU 1 socket first 1 Lift the lever on CPU socket 1 until it points straight up 2 Use your thumb and your index fin ger to hold the CPU Locate pin 1 on the CPU socket and pin 1 on the CPU Both are marked with a triangle Triangles 3 Align pin 1 of the CPU with pin 1 of the socket Once aligned carefully place the CPU into the socket Do not drop the CPU on the socket move the CPU horizontally or
56. ons are Disabled 16K 32K and 64K gt Super IO Configuration Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller Serial Port1 Address This option specifies the base I O port address and Interrupt Request address of serial port 1 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 3F8 IRQ4 to allow the serial port to use 3F8 as its O port address and IRQ 4 for the interrupt address The options are Disabled 3F8 IRQA 3E8 IRQ4 and 2E8 IRQ3 4 6 Chapter 4 BIOS Serial Port2 Address This option specifies the base I O port address and Interrupt Request address of serial port 2 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its O port address and IRQ 3 for the interrupt address The options are Disabled 2F8 IRQ3 3E8 IRQ4 and 2E8 IRQ3 Serial Port 2 Mode Tells BIOS which mode to select for serial port 2 The options are Normal Sharp IR SIR and Consumer KBC Clock Source The options for the KBC clock source are 8 MHz 12 MHz and 16 MHz Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power
57. or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 You should be using registered ECC DDR memory see next page Also it is recommended that you use the same memory type and speed for all DIMMs in the system See Section 2 4 for memory details and limitations 3 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 4 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a serverboard manufacturer we do not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please review the Troubleshooting P
58. ot is provided on the board Primary IDE Master Slave Highlight one of the two items above and press lt Enter gt to access the submenu for that item Type Select the type of device connected to the system The options are Not In stalled Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive In the LBA mode the maximum drive capacity is 137 GB For drive capacities of over 137 GB your system must be equipped with 48 bit LBA mode addressing If not contact your manufacturer or install an ATA 133 IDE controller card that supports 48 bit LBA mode The options are Disabled and Auto Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sector at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled PIO Mode PIO Programmable I O mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this valu
59. permicro CD that came packaged with your motherboard has additional drivers After inserting this CD into your CD ROM drive the display shown in Fig ure 2 6 should appear If this display does not appear click on the My Computer icon and then on the icon representing your CD ROM drive Finally double click on the S Setup icon Click the icons showing a hand writing on paper to view the readme files for each item Click the tabs to the right of these in order from top to bottom to install each item one at a time After installing each item you must reboot the system before moving on to the next item on the list You should install everything here except for the SUPER Doctor utility which is optional The bottom icon with a CD on it allows you to view the entire contents of the CD 2 25 H8DSL HTi User s Manual Figure 2 6 Driver Installation Display Screen SS H8DSL HTi Server Board Drivers amp Tools WinXP SUPERMICRO Drivers amp Tools ServerWorks HT1000 Chipset HSDSL HTI Series 2 26 Chapter 3 Troubleshooting 3 1 Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot vour svstem If vou have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Always disconnect the AC power cord before adding changing or installing a
60. rocedures and Frequently Asked Questions FAQs sections in this chapter or see the FAQs on our web site before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site Note Not all BIOS can be flashed depending on the modifications to the boot block code Chapter 3 Troubleshooting 3 If you still cannot resolve the problem include the following information when contacting us for technical support e Serverboard model and PCB revision number e BIOS release date version this can be seen on the initial display when your system first boots up e System configuration An example of a Technical Support form is posted on our web site 4 Distributors For immediate assistance please have your account number ready when contacting our technical support department by e mail 3 3 Frequently Asked Questions Question What type of memory does my serverboard support Answer The H8DSL HTi supports up to 32 GB of registered ECC DDR333 266 or up to 16 GB of registered ECC DDR400 interleaved or non interleaved SDRAM with two CPUs installed With only one CPU installed the maximum memory support is halved See Section 2 4 for details on installing memory Question How do l update my BIOS Answer It is recommended that you not upgrade your BIOS if you are not experi encing problems with your system Updated BIOS files are located on our web site Please check our BIOS warning message and the information
61. s You must have a Wake On Ring card and cable to use this feature Wake On LAN Wake On LAN Pin Definitions The Wake On LAN header is desig JWOL nated JWOL See the table on the Pin Definition right for pin definitions You must 1 5V Standby have a LAN card with a Wake On LAN 2 Ground connector and cable to use the Wake Wake up On LAN feature Chassis Intrusion Chassis Intrusion Pin Definitions JL1 A Chassis Intrusion header is located Pin Definition at JL1 Attach the appropriate cable 1 Intrusion Input to inform you of a chassis intrusion Ground Pin Definition The SCSI LED header is designated JSLED This header is used to display all SATA activity See the table on the right for pin definitions Pins 6 9 are no connection Pin 10 is absent SATAQ Activity SATA1 Activity SATAZ Activity SATAS Activity Common 2 14 Chapter 2 Installation 2 7 Jumper Settings Explanation of Jumpers To modify the operation of the 3 2 1 serverboard jumpers can be used to a Pelejsj choose between optional settings at Jumpers create shorts between two pins to change the function of the Jumper connector Pin 1 is identified with a square solder pad on the printed L j H H 3 2 1 circuit board See the diagram at Setting Be right for an example of jumping pins 1 and 2 Refer to the serverboard layout page for jumper locations Note 1 On two pin jumpers Closed
62. s a high speed low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi processor systems The end result is a significant increase in bandwidth within the chipset 1 9 H8DSL HTi User s Manual 1 3 PC Health Monitoring This section describes the PC health monitoring features of the H8DSL HTi The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Voltage Monitors for the CPU core voltages 5Vin 12Vin 12V DDR voltages 1 2V for HT 2 5V 5Vstby 2 5Vstby and battery voltage The onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Real time readings of these voltage levels are all displayed in the System Health Monitor section of BIOS Fan Status Monitor with Firmware Software Speed Control The PC health monitor can check the RPM status of the cooling fans The onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This feature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS
63. s and the table associated with the Power LED Speaker connection previous section for pin definitions Watch Dog JWDI1 controls the Watch Dog function Watch Dog is a system monitor that can reboot the system when a software application hangs Pins 1 2 will cause WD to reset the system if an applica tion has frozen Pins 2 3 will generate a non maskable interrupt signal for the application that is frozen See the table on the right for jumper settings Watch Dog must also be enabled in BIOS 2 16 Slot 6 Frequency Select Jumper Settings JPX1A Jumper Setting Definition Pins 1 2 100 MHz PCI X Pins 2 3 133 MHz PCI Open Auto Slot 6 Frequency Select Jumper Settings JPX1B Jumper Setting Definition Pins 1 2 66 MHz PCI X Pins 2 3 66 MHz PCI Open Pins 6 7 Jump for onboard speaker 4 7 Onboard Speaker Enable Disable Pin Definitions JD1 Definition Attach external speaker wires Watch Dog Jumper Settings JWD1 Jumper Setting Definition Pins 1 2 Reset Pins 2 3 NMI Open Disabled Note When enabled the user needs to write their own application software in or der to disable the Watch Dog Timer VGA Enable Disable JPG1 allows you to enable or disable the VGA port The default position is on pins 1 and 2 to enable VGA See the table on the right for jumper set tings Power Force On JPF allows you to enable or disable the Power
64. s enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total sys tem memory size next The memory wraparound test is done Memory size calculation has been done Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix B BIOS POST Checkpoint Codes Checkpoint Code Description 4Ch The memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next 4Dh The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next 4Eh The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next 4Fh The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next memory size for relocation and shadowing next 50h The memory below 1 MB has been tested and initialized Adjustin
65. t Boot up Num Lock Set this to On to allow the Number Lock setting to be modified during boot up The options are On and Off PS 2 Mouse Support This setting is to specify PS 2 mouse support The options are Auto Enabled and Disabled Wait for F1 If Error Enable to activate the Wait for F1 if Error function The options are Enabled and Disabled Hit DEL Message Display Enable to display the message telling the user to hit the DEL key to enter the setup utility The options are Enabled and Disabled Interrupt 19 Capture Enable to allow ROMs to trap Interrupt 19 The options are Enabled and Dis abled 4 14 Chapter 4 BIOS gt Boot Device Priority This feature allows the user to prioritize the sequence for the Boot Device with the devices installed in the system The recommended settings with generic names are 1st Boot Device Removeable drive e g floppy drive 2nd Boot Device CD DVD 3rd Boot Device Hard drive 4th Boot Device LAN gt Hard Disk Drives This feature allows the user to prioritize the Boot sequence from available hard drives 1st Drive 2nd Drive Specify the boot sequence for the available hard drives on the system gt Removable Drives This feature allows the user to specify the Boot sequence from available remov able drives 1st Drive Specifies the boot sequence for the 1st Removable Drive 4 15 H8DSL HTi User s Manual 4 5
66. ter 1 Introduction 1 6 Super UO The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports two 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART in cludes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through a SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can be flexibly adjusted to meet ISA PnP requir
67. to allow or restrict the system from giving the VGA adapter card an interrupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly The options are Enabled and Disabled 4 5 H8DSL HTi User s Manual PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering Select Enabled to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives The options are Disabled and Enabled Offboard PCI ISA IDE Card This option allows the user to assign a PCI slot number to an Off board PCI ISA IDE card in order for it to function properly The options are Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 and PCI Slot6 IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 This feature specifies the availability of an IRQ to be used by a PCI PnP device Select Reserved for the IRQ to be used by a Legacy ISA device The options are Available and Reserved DMA Channel0 Channel1 Channel3 Channel5 Channel6 Channel7 Select Available to indicate that a specific DMA channel is available to be used by a PCI PnP device Select Reserved if the DMA channel specified is reserved for a Legacy ISA device The options are Available and Reserved Reserved Memory Size This feature specifies the size of memory block to be reserved for Legacy ISA devices The opti
68. tten to HDD The options are Enabled or Disabled IDE Detect Time Out Sec This feature allows the user to set the time out value for detecting ATA ATA PI devices installed in the system The options are O sec 5 10 15 20 25 30 and 35 ATA PI 80Pin Cable Detection This setting allows AMI BIOS to auto detect the 80 Pin ATA PI cable The op tions are Host amp Device Host and Device 4 4 Chapter 4 BIOS gt Floppy Configuration Floppy A Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 44 MB 312 and 2 88 MB 374 Floppy B Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 44 MB 3 and 2 88 MB 37 gt PCI PnP Menu Clear NVRAM Select Yes to clear NVRAM during boot up The options are Yes and No Plug amp Play OS Select Yes to allow the OS to configure Plug amp Play devices This is not required for system boot if your system has an OS that supports Plug amp Play Select No to allow AMIBIOS to configure all devices in the system PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus Select a value to set the PCI latency in PCI clock cycles Options are 32 64 96 128 160 192 224 and 248 Allocate IRQ to PCI VGA Set this value

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